On 10/30/2018 04:33 PM, Stefan Roese wrote:
> On 30.10.18 16:18, Marek Vasut wrote:
>>> > Of course would this be good. But perhaps we can make this SPL
>>> > binary size check "better" by not changing the INIT_RAM_SIZE
>>> > define. Its definitely possible - I just don't know how
On 10/30/2018 10:36 AM, Stefan Roese wrote:
> Hi Simon,
>
> On 30.10.18 10:07, Simon Goldschmidt wrote:
>>
>>
>> Stefan Roese mailto:s...@denx.de>> schrieb am Di., 30. Okt.
>> 2018, 10:00:
>>
>> Commit 768f23dc8ae3 ("ARM: socfpga: Put stack at the end of SRAM")
>> broke
>> those socfpga
On 30.10.18 16:18, Marek Vasut wrote:
> Of course would this be good. But perhaps we can make this SPL
> binary size check "better" by not changing the INIT_RAM_SIZE
> define. Its definitely possible - I just don't know how hard
> (I didn't look into this).
On 10/30/2018 04:00 PM, Simon Goldschmidt wrote:
>
>
> Marek Vasut mailto:ma...@denx.de>> schrieb am Di., 30.
> Okt. 2018, 14:24:
>
> On 10/30/2018 02:13 PM, Stefan Roese wrote:
> > On 30.10.18 14:02, Simon Goldschmidt wrote:
> >>
> >>
> >> Stefan Roese mailto:s...@denx.de>
Marek Vasut schrieb am Di., 30. Okt. 2018, 14:24:
> On 10/30/2018 02:13 PM, Stefan Roese wrote:
> > On 30.10.18 14:02, Simon Goldschmidt wrote:
> >>
> >>
> >> Stefan Roese mailto:s...@denx.de>> schrieb am Di., 30. Okt.
> >> 2018, 13:50:
> >>
> >> On 30.10.18 13:37, Simon Goldschmidt wrote:
>
On 10/30/2018 02:13 PM, Stefan Roese wrote:
> On 30.10.18 14:02, Simon Goldschmidt wrote:
>>
>>
>> Stefan Roese mailto:s...@denx.de>> schrieb am Di., 30. Okt.
>> 2018, 13:50:
>>
>> On 30.10.18 13:37, Simon Goldschmidt wrote:
>> > On Tue, Oct 30, 2018 at 12:28 PM Stefan Roese >
On 30.10.18 14:02, Simon Goldschmidt wrote:
Stefan Roese mailto:s...@denx.de>> schrieb am Di., 30. Okt.
2018, 13:50:
On 30.10.18 13:37, Simon Goldschmidt wrote:
> On Tue, Oct 30, 2018 at 12:28 PM Stefan Roese mailto:s...@denx.de>> wrote:
>>
>> On 30.10.18 12:17, Simon
Stefan Roese schrieb am Di., 30. Okt. 2018, 13:50:
> On 30.10.18 13:37, Simon Goldschmidt wrote:
> > On Tue, Oct 30, 2018 at 12:28 PM Stefan Roese wrote:
> >>
> >> On 30.10.18 12:17, Simon Goldschmidt wrote:
> >>
> >>
> >>
> >>> > diff --git a/include/configs/socfpga_common.h
>
On 30.10.18 13:37, Simon Goldschmidt wrote:
On Tue, Oct 30, 2018 at 12:28 PM Stefan Roese wrote:
On 30.10.18 12:17, Simon Goldschmidt wrote:
> diff --git a/include/configs/socfpga_common.h
b/include/configs/socfpga_common.h
> index 2330143cf1..bd8f5c8c41
On Tue, Oct 30, 2018 at 12:28 PM Stefan Roese wrote:
>
> On 30.10.18 12:17, Simon Goldschmidt wrote:
>
>
>
> > > diff --git a/include/configs/socfpga_common.h
> > b/include/configs/socfpga_common.h
> > > index 2330143cf1..bd8f5c8c41 100644
> > > ---
On 30.10.18 12:17, Simon Goldschmidt wrote:
> diff --git a/include/configs/socfpga_common.h
b/include/configs/socfpga_common.h
> index 2330143cf1..bd8f5c8c41 100644
> --- a/include/configs/socfpga_common.h
> +++
Simon Goldschmidt schrieb am Di., 30.
Okt. 2018, 11:34:
>
>
> Stefan Roese schrieb am Di., 30. Okt. 2018, 10:36:
>
>> Hi Simon,
>>
>> On 30.10.18 10:07, Simon Goldschmidt wrote:
>> >
>> >
>> > Stefan Roese mailto:s...@denx.de>> schrieb am Di., 30. Okt.
>> 2018, 10:00:
>> >
>> > Commit
Stefan Roese schrieb am Di., 30. Okt. 2018, 10:36:
> Hi Simon,
>
> On 30.10.18 10:07, Simon Goldschmidt wrote:
> >
> >
> > Stefan Roese mailto:s...@denx.de>> schrieb am Di., 30. Okt.
> 2018, 10:00:
> >
> > Commit 768f23dc8ae3 ("ARM: socfpga: Put stack at the end of SRAM")
> broke
> >
Hi Simon,
On 30.10.18 10:07, Simon Goldschmidt wrote:
Stefan Roese mailto:s...@denx.de>> schrieb am Di., 30. Okt.
2018, 10:00:
Commit 768f23dc8ae3 ("ARM: socfpga: Put stack at the end of SRAM") broke
those socfpga boards that keep the bootcounter at the end of the
internal SRAM
Stefan Roese schrieb am Di., 30. Okt. 2018, 10:00:
> Commit 768f23dc8ae3 ("ARM: socfpga: Put stack at the end of SRAM") broke
> those socfpga boards that keep the bootcounter at the end of the
> internal SRAM as the bootcounter needs 8 bytes by default and thus the
> very first SPL call to
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