On 14.11.2014 21:16, Marek Vasut wrote:
On Wednesday, November 12, 2014 at 06:51:42 PM, Pavel Machek wrote:
Hi!
You tripped my spell-checker, sorry.
This patch adds the driver for the Designware master SPI controller. This
IP core is integrated on the Altera SoCFPGA. This implementation is a
On Saturday, November 15, 2014 at 02:33:27 PM, Stefan Roese wrote:
On 14.11.2014 21:16, Marek Vasut wrote:
On Wednesday, November 12, 2014 at 06:51:42 PM, Pavel Machek wrote:
Hi!
You tripped my spell-checker, sorry.
This patch adds the driver for the Designware master SPI
On Wednesday, November 12, 2014 at 06:51:42 PM, Pavel Machek wrote:
Hi!
You tripped my spell-checker, sorry.
This patch adds the driver for the Designware master SPI controller. This
IP core is integrated on the Altera SoCFPGA. This implementation is a
driver model (DM) implementation.
Hi!
You tripped my spell-checker, sorry.
This patch adds the driver for the Designware master SPI controller. This
IP core is integrated on the Altera SoCFPGA. This implementation is a
driver model (DM) implementation. So multiple SPI drivers can be used.
Thats necessary, since SoCFPGA also
On Friday, November 07, 2014 at 01:50:31 PM, Stefan Roese wrote:
This patch adds the driver for the Designware master SPI controller. This
IP core is integrated on the Altera SoCFPGA. This implementation is a
driver model (DM) implementation. So multiple SPI drivers can be used.
Thats
Hi Stefan,
On 7 November 2014 05:50, Stefan Roese s...@denx.de wrote:
This patch adds the driver for the Designware master SPI controller. This
IP core is integrated on the Altera SoCFPGA. This implementation is a
driver model (DM) implementation. So multiple SPI drivers can be used.
Thats
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