On Thursday, September 25, 2014 at 03:27:44 PM, Hans de Goede wrote:
Hi,
On 09/24/2014 09:04 PM, Marek Vasut wrote:
On Wednesday, September 24, 2014 at 02:06:02 PM, Hans de Goede wrote:
Hi Marek,
Here is v2 of my Add a better USB keyboard polling method patch-set.
Changes in v2:
On Tuesday, September 23, 2014 at 04:08:28 PM, Stefan Roese wrote:
Hi SoCFPGA-developers!
So this is my 2nd posting regarding the Candence SPI driver on SoCFPGA.
I got it working now. But only with one quick-hack, as you can see in
patch 4/4. Which disabled the dcache. Or more precise,
On Wednesday, September 24, 2014 at 05:38:07 PM, Pavel Machek wrote:
Hi!
From: Pavel Machek pa...@denx.de
Split the SoCFPGA configuration into SoC-specific part which is
common for all boards (socfpga_cyclone5_common.h) and a board
specific part. There is currently only one
On Wednesday, September 24, 2014 at 04:10:29 PM, Dinh Nguyen wrote:
On Sun, 21 Sep 2014, Marek Vasut wrote:
From: Pavel Machek pa...@denx.de
Split the SoCFPGA configuration into SoC-specific part which is
common for all boards (socfpga_cyclone5_common.h) and a board
specific part.
Hi Albert,
Le 24/09/2014 09:34, Albert ARIBAUD a écrit :
Hi Georges,
On Sun, 21 Sep 2014 23:33:48 +0200, Georges Savoundararadj
savou...@gmail.com mailto:savou...@gmail.com wrote:
Before the commit 41623c91, the exception vector was in a .text
section which is allocatable. After this, the
The following changes since commit e3a4facdfc07179ebe017a07b8de6224a935a9f3:
checkpatch: remove unnecessary + after {8,8} (2014-09-25 09:31:24 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-nand-flash.git master
for you to fetch changes up to
Tom,
The following changes since commit 47d3debe1ab8315dc9ade22279e02f60eceda25b:
Merge git://git.denx.de/u-boot-dm (2014-09-23 15:21:43 -0400)
are available in the git repository at:
u-boot
git://git.denx.de/u-boot-fsl-qoriq.git master
for you to fetch changes up to
On 07/14/2014 04:45 AM, Prabhakar Kushwaha wrote:
LS2085a has 2 regions in system memory map. Region1 is default map from
where system boots. Once u-boot is moved to DDR, IFC is re-mapped to
Region2.
So, update gd-env_addr to reflect correct address.
Signed-off-by: Prabhakar Kushwaha
On 09/22/2014 09:27 PM, Prabhakar Kushwaha wrote:
Freescale's flash control driver is using architecture specific timer API
i.e. usec2ticks
Replace usec2ticks with get_timer() (generic timer API)
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Changes for v2: updated
On 07/15/2014 08:51 PM, Prabhakar Kushwaha wrote:
Add support of NOR and NAND flash for simulator target.
Here
IFC - CS0: NOR flash
IFC - CS1: NAND flash
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Applied to u-boot-fsl-qoriq, awaiting upstream.
York
On 09/08/2014 12:19 PM, York Sun wrote:
From: Arnab Basu arnab.b...@freescale.com
This is being done so that it can be used outside 'fdt_support.c'. Making
life more convenient when reading device node properties that can be 32
or 64 bits long.
Signed-off-by: Arnab Basu
On 09/17/2014 12:38 AM, Vijay Rai wrote:
As the board was basically designed for T1040RDB so there are 5 DTSEC ports,
DTSEC1 and DTSEC2 are connected to L2 switch and not usable in T1042 mode
only 3 ports DTSEC3 to DTSEC5 are usable
Signed-off-by: Vijay Rai vijay@freescale.com
On Thu, Sep 25, 2014 at 03:28:37PM -0500, Scott Wood wrote:
The following changes since commit e3a4facdfc07179ebe017a07b8de6224a935a9f3:
checkpatch: remove unnecessary + after {8,8} (2014-09-25 09:31:24 -0400)
are available in the git repository at:
On Tue, Sep 23, 2014 at 10:44:17AM -0500, Felipe Balbi wrote:
If CONFIG_SPL_BUILD and CONFIG_ENV_IS_IN_FAT are
defined, u-boot spl will fail to build. Fix that.
Signed-off-by: Felipe Balbi ba...@ti.com
ping
---
common/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git
On Tue, Sep 23, 2014 at 10:44:18AM -0500, Felipe Balbi wrote:
By using CONFIG_ENV_IS_IN_FAT it's far easier
to have a private, minimal environment for e.g.
booting off of network or mounting rootfs on NFS
without having to modify the configuration header.
Signed-off-by: Felipe Balbi
The email address of Rajeshwari Shinde rajeshwar...@samsung.com
is not working.
Squash the maintainership of Snow board to
Chander Kashyap who is the maintainer of SMDK5250 board.
Likewise, pass the maintainership of SMDK5420 board to
Akshay Saraswat, the maintainer of Peach Pit.
Signed-off-by:
sorry for send this patch two times, It shows being held until the list
moderator can review it for approval.
I think maybe I didn't register the correct mail address and sent it
again. but it still show wait for moderator review.
At last I register my private mail address to this list and found
T2080 v1.0 has this errata while v1.1 has fixed
this errata by hardware, add a new function to
check the SVR_SOC_VER, SVR_MAJ and SVR_MIN first,
if the cpu is T2080 and version is not v1.0, doesn't
run the a007212 errata_workaround.
Signed-off-by: Zhao Qiang b45...@freescale.com
---
T2080 v1.0 has this errata while v1.1 has fixed
this errata by hardware, add a new function to
check the SVR_SOC_VER, SVR_MAJ and SVR_MIN first,
if the cpu is T2080 and version is not v1.0, doesn't
run the a007186 errata_workaround.
Signed-off-by: Zhao Qiang b45...@freescale.com
---
On 9/25/14 9:37 PM, Zhao Qiang b45...@freescale.com wrote:
T2080 v1.0 has this errata while v1.1 has fixed
this errata by hardware, add a new function to
check the SVR_SOC_VER, SVR_MAJ and SVR_MIN first,
if the cpu is T2080 and version is not v1.0, doesn't
run the a007212 errata_workaround.
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