[U-Boot] [PATCH 1/4] drivers/ddr/fsl: Update DDR driver for DDR4

Add/update registers for DDR4, including DQ mappings. Allow raw timing method used for all controllers. Update mode_9 register to 0x500 for improved stability. Check DDR controller version number individually in case a SoC has multiple DDR controllers of different versions. Increase read-write

[U-Boot] [PATCH 3/4] driver/ddr/fsl: Add built-in memory test for DDR4 driver

Add built-in memory test to catch errors after DDR is initialized, before any other transactions. To enable this test, define CONFIG_FSL_DDR_BIST. An environmental variable ddr_bist is checked before starting test. It takes a while (several seconds) depending on system memory size. Signed-off-by:

[U-Boot] [PATCH 4/4] driver/ddr/fsl: Add workaround for DDR erratum A008511

This erratum only applies to general purpose DDR controllers in LS2. It shouldn't be applied to DP-DDR controller. Check DDRC versoin number before applying workaround. Signed-off-by: York Sun york...@freescale.com --- drivers/ddr/fsl/fsl_ddr_gen4.c | 96

Re: [U-Boot] am335x: GPMC: reading speed with prefetch mode

On 03/19/2015 04:13 PM, Yegor Yefremov wrote: Strange. Have tried with nand read command, but still the same result with and without CONFIG_NAND_OMAP_GPMC_PREFETCH : [2.150655 0.001006] NAND read: device 0 offset 0x26, size 0x120 [15.978943 13.828288] 18874368 bytes read: OK What

Re: [U-Boot] am335x: GPMC: reading speed with prefetch mode

On Thu, Mar 19, 2015 at 2:56 PM, Daniel Mack dan...@zonque.org wrote: Hi, On 03/19/2015 02:41 PM, Yegor Yefremov wrote: I've got v2015.04-rc4 running on my custom am335x (600MHz) based board. My 8-bit NAND chip: [17.297793 0.004021] omap-gpmc 5000.gpmc: GPMC revision 6.0 [17.303850

[U-Boot] [PATCH 2/8] fsl-ch3/README: Add description for NOR flash layout (firmware images)

From: Bhupesh Sharma bhupesh.sha...@freescale.com This patch adds description for NOR flash layout (firmware images) in the README file for LS2085A platforms. Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com --- arch/arm/cpu/armv8/fsl-lsch3/README | 25 + 1

[U-Boot] [PATCH 8/8] driver/i2c/mxc: Add I2C3 and I2C4 for LS2085A

LS2085A uses mxc I2C driver and has four I2C buses. Signed-off-by: York Sun york...@freescale.com CC: Heiko Schocher h...@denx.de --- drivers/i2c/mxc_i2c.c | 16 +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index

[U-Boot] [PATCH] cmd_mem: Store last address/size/etc as ulong

From: Scott Wood scottw...@freescale.com Otherwise the high 32 bits get truncated on 64-bit U-boot. Signed-off-by: Scott Wood scottw...@freescale.com CC: Simon Glass s...@chromium.org --- common/cmd_mem.c |6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git

[U-Boot] [PATCH] drivers/net/e1000.c: Cleanup whitespace

From: Minghuan Lian minghuan.l...@freescale.com The patch removes unnecessary whitespace to fix checkpatch's warning: unnecessary whitespace before a quoted newline Signed-off-by: Minghuan Lian minghuan.l...@freescale.com CC: Joe Hershberger joe.hershber...@ni.com --- drivers/net/e1000.c |8

[U-Boot] [PATCH 01/28] armv8/fsl-lsch3: Implement workaround for erratum A008585

Generic Timer may contain an erroneous value. The workaround is to read it twice until getting the same value. Signed-off-by: York Sun york...@freescale.com --- arch/arm/cpu/armv8/generic_timer.c | 11 +++ arch/arm/include/asm/arch-fsl-lsch3/config.h |1 + 2 files

[U-Boot] [PATCH 04/28] armv8/ls2085a: Fix generic timer clock source

The timer clock is system clock divided by 4, not fixed 12MHz. This is common to the SoC, not board specific. Signed-off-by: York Sun york...@freescale.com --- README |8 arch/arm/cpu/armv8/fsl-lsch3/cpu.c | 24

[U-Boot] [PATCH 02/28] armv8/ls2085a: Update common header file

From: Prabhakar Kushwaha prabha...@freescale.com ls2085a_common.h contains hard-coded information for NOR/NAND flash, I2C, DDR, etc. These are platform specific. Move them out of common header file and placed into respective board header files. Move TEXTBASE to 1MB offset to fit NOR flash with

[U-Boot] [PATCH 05/28] armv8/ls2085a: Add support for reset request

From: pankaj chauhan pankaj.chau...@freescale.com Add support for reset_cpu() by asserting RESET_REQ_B. Signed-off-by: pankaj chauhan pankaj.chau...@freescale.com --- arch/arm/cpu/armv8/fsl-lsch3/cpu.c | 11 +++ board/freescale/ls2085a/ls2085a.c |7 --- 2 files changed, 11

[U-Boot] [PATCH 06/28] armv8/fsl-lsch3: Set nodes in DVM domain

From: Scott Wood scottw...@freescale.com This is required for TLB invalidation broadcasts to work. Signed-off-by: Scott Wood scottw...@freescale.com --- arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S |9 + arch/arm/include/asm/arch-fsl-lsch3/config.h |6 ++ 2 files changed, 15

[U-Boot] [PATCH 10/28] armv8/fsl-lsch3: Use correct compatible for serial clock fixup

From: Scott Wood scottw...@freescale.com The serial nodes in the fsl-lsch3 device trees have compatible = fsl,ns16550, ns16550a -- so don't look for ns16550. Signed-off-by: Scott Wood scottw...@freescale.com --- arch/arm/cpu/armv8/fsl-lsch3/fdt.c |2 +- 1 file changed, 1 insertion(+), 1

[U-Boot] [PATCH 09/28] armv8/ls2085a: Add workaround for USB erratum A-008751

From: Scott Wood scottw...@freescale.com Without this USB may not work according to the erratum text, though I did not notice a problem without it. Signed-off-by: Scott Wood scottw...@freescale.com --- arch/arm/cpu/armv8/fsl-lsch3/soc.c | 11 +++

[U-Boot] [PATCH 08/28] fsl-lsch3: Introduce place for common early SoC init

From: Scott Wood scottw...@freescale.com Signed-off-by: Scott Wood scottw...@freescale.com --- arch/arm/cpu/armv8/fsl-lsch3/Makefile |1 + arch/arm/cpu/armv8/fsl-lsch3/soc.c| 14 ++ arch/arm/include/asm/arch-fsl-lsch3/soc.h |8

[U-Boot] [PATCH 12/28] armv8: Add SerDes framework for LayerScape Architecture

From: Minghuan Lian minghuan.l...@freescale.com Add support of SerDes framework for LayerScape Architecture. - Add support of 2 SerDes block - Add SerDes protocol parsing and detection - Create table of SerDes protocol supported by LS2085A Signed-off-by: Prabhakar Kushwaha

[U-Boot] [PATCH 17/28] armv8/fsl-lsch3: Enable system error aborts

From: Scott Wood scottw...@freescale.com This lets us see the problems (close to) when they happen, rather than Linux hanging when it enables them prior to having a working console. Signed-off-by: Scott Wood scottw...@freescale.com --- arch/arm/cpu/armv8/fsl-lsch3/cpu.c |4 1 file

[U-Boot] [PATCH 15/28] net/memac_phy: reuse driver for little endian SoCs

From: Shaohui Xie shaohui@freescale.com The memac for PHY management on little endian SoCs is similar on big endian SoCs, so we modify the driver by using I/O accessor function to handle the endianness, so the driver can be reused on little endian SoCs, we introduce

[U-Boot] [PATCH 14/28] drivers/fsl-mc: Changed MC firmware loading for new boot architecture

From: J. German Rivera german.riv...@freescale.com Changed MC firmware loading to comply with the new MC boot architecture. Flush D-cache hierarchy after loading MC images. Add environment variables mcboottimeout for MC boot timeout in milliseconds, mcmemsize for MC DRAM block size. Check MC boot

[U-Boot] [PATCH 07/28] armv8/fsl-lsch3: Update early MMU table

During booting, IFC is mapped to low region. After booting up, IFC is remapped to high region for larger space. The environmental variables are also stored at high region. In order to read the variables during booting, a virtual mapping is required. Cache was enabled for entire IFC space before.

[U-Boot] [PATCH 11/28] driver/ldpaa_eth: Update ldpaa ethernet driver

From: Prabhakar Kushwaha prabha...@freescale.com Fix flush_dcache_range() input parameter to use start and end addresses. Change ethernet interface name to DPNI. Update entry criteria for ldpaa_eth_stop. Ethernet stack first stop the device before performing next operation. At the time of

[U-Boot] [PATCH 19/28] armv8/ls2085aqds: Add support of LS2085AQDS platform

The LS2080AQDS is an evaluatoin platform that supports the LS2080A family SoCs. This patch add basic support of the platform. Signed-off-by: York Sun york...@freescale.com Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com ---

[U-Boot] [PATCH 18/28] driver/ldpaa: Add support of WRIOP static data structure

From: Prabhakar Kushwaha prabha...@freescale.com Wire rate IO Processor (WRIOP) provide support of receive and transmit ethernet frames from the ethernet MAC. Here Each WRIOP block supports upto 64 DPMACs. Create a house keeping data structure to support upto 16 DPMACs and store external phy

[U-Boot] [PATCH 16/28] armv8/fsl-ch3: Add support to print RCW configuration

From: Bhupesh Sharma bhupesh.sha...@freescale.com This patch adds support to print out the Reset Configuration Word information. Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com Signed-off-by: York Sun york...@freescale.com --- arch/arm/cpu/armv8/fsl-lsch3/cpu.c | 14 ++

[U-Boot] [PATCH 13/28] net/phy/cortina: Fix compilation warning

From: pankaj chauhan pankaj.chau...@freescale.com Fix comilation warning which is emitted when firmware address is more than 32 bit. Signed-off-by: pankaj chauhan pankaj.chau...@freescale.com CC: Joe Hershberger joe.hershber...@ni.com --- drivers/net/phy/cortina.c |4 ++-- 1 file changed, 2

[U-Boot] [PATCH 24/28] armv8/ls2085aqds: NAND boot support

From: Scott Wood scottw...@freescale.com This adds NAND boot support for LS2085AQDS, using SPL framework. To form a NAND image, append u-boot-with-spl.bin after a proper nand boot RCW and flash to the beginning of NAND. Signed-off-by: Scott Wood scottw...@freescale.com --- arch/arm/Kconfig

[U-Boot] [PATCH 27/28] ls2085a: esdhc: Add esdhc support for ls2085a

From: Yangbo Lu yangbo...@freescale.com This patch adds esdhc support for ls2085a. Signed-off-by: Yangbo Lu yangbo...@freescale.com --- arch/arm/cpu/armv8/fsl-lsch3/cpu.c | 10 +++ arch/arm/cpu/armv8/fsl-lsch3/fdt.c |7 +

[U-Boot] [PATCH 03/28] armv8/fsl-lsch3: Fix platform clock calculation

Platform clock is half of platform PLL. There is an additional divisor in place. Clean up code copied from powerpc. Signed-off-by: York Sun york...@freescale.com --- arch/arm/cpu/armv8/fsl-lsch3/speed.c |7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git

[U-Boot] [PATCH 26/28] armv8/ls2085ardb: Enable NAND SPL support

From: Scott Wood scottw...@freescale.com Enable NAND boot support using SPL framework. To boot from NAND, either use DIP switches on board, or qixis_reset nand command. Signed-off-by: Scott Wood scottw...@freescale.com --- arch/arm/Kconfig |1 +

[U-Boot] [PATCH 23/28] driver/ifc: Add 64KB page support

From: Jaiprakash Singh b44...@freescale.com IFC has two register pages.Till IFC version 1.4 each register page is 4KB each.But IFC ver 2.0 register page size is 64KB each.IFC regiters structure is break into two viz FCM and RUNTIME.FCM(Flash control machine) registers are defined in PAGE0 and

[U-Boot] [PATCH 21/28] drivers/fsl-mc: Autoload AOIP image from NOR flash

From: J. German Rivera german.riv...@freescale.com Load AIOP image from NOR flash into DDR so that the MC firmware the MC fw can start it at boot time. Signed-off-by: J. German Rivera german.riv...@freescale.com Change-Id: I19e23d983e7f947a4398e0421600057e0d7be6a3 [York Sun: This is a debug

[U-Boot] [PATCH 22/28] board/ls2085qds: Add support ethernet

From: Prabhakar Kushwaha prabha...@freescale.com Add support of ethernet: - eth.c: mapping lane to slot for (0x2A, 0x07) - ls2085a.c: To enable/disable dpmac and get link type Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com Change-Id: I6d79a9633f3e31b3c23c839b9e9660ee59f0cc0c ---

[U-Boot] [PATCH 28/28] armv8/fsl-lsch3: Implement workaround for I2C issue

This erratum requires setting GLITCH_EN bit in debug register. Signed-off-by: York Sun york...@freescale.com --- arch/arm/cpu/armv8/fsl-lsch3/soc.c | 30 ++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-lsch3/soc.c

[U-Boot] [PATCH 20/28] armv8/ls2085ardb: Add support of LS2085ARDB platform

The LS2080ARDB is a evaluation platform that supports LS2080A family SoCs. This patch add sbasic support for the platform. Signed-off-by: York Sun york...@freescale.com Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com

[U-Boot] [PATCH 25/28] freescale/qixis: Add support for booting from NAND

From: Scott Wood scottw...@freescale.com Use qixis_reset nand to reset the board to boot from NAND. Signed-off-by: Scott Wood scottw...@freescale.com --- board/freescale/common/qixis.c | 31 +-- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git

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