Some images to be validated are relocated to a dynamic
address at run time. So, these addresses cannot be known
befor hand while signing the images and creating the header
offline.
So, support is required to pass the image address to the
validate function as an argument.
If an address is provided
Hi Simon,
On Fri, Nov 27, 2015 at 12:50 AM, Simon Glass wrote:
> Hi Bin,
>
> On 25 November 2015 at 17:46, Bin Meng wrote:
>> NORTHBRIDGE_INTEL_SANDYBRIDGE is for sandybridge, not ivybridge.
>>
>> Signed-off-by: Bin Meng
>>
>> ---
>>
On Tuesday, December 08, 2015 at 04:38:22 AM, Simon Glass wrote:
> Add a compatible string to allow this to be specified in the device tree
> if needed.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/usb/host/ehci-pci.c | 5 +
> 1 file changed, 5 insertions(+)
For LS1043, SEC read/writes are made snoopable by setting
the corresponding bits in SCFG to avoid coherency issues.
Signed-off-by: Aneesh Bansal
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
New Patch set created with an
LS1043ARDB Secure Boot Target from NOR has been added.
- Configs defined to enable esbc_validate.
- ESBC Address in header is made 64 bit.
- SMMU is re-configured in Bypass mode.
Signed-off-by: Aneesh Bansal
---
Changes in v5:
- Commit Subject modified
- Call to
For Setting and clearing the bits in SEC Block registers
sec_clrbits32() and sec_setbits32() are used which work as
per endianness of CAAM block.
So these must be used with SEC register address as argument.
If the value is read in a local variable, then the functions
will not behave correctly
uintptr_t which is a typdef for unsigned long is needed for creating
pointers (32 or 64 bit depending on Core) from 32 bit variables
storing the address.
If a 32 bit variable (u32) is typecasted to a pointer (void *),
compiler gives a warning in case size of pointer on the core is 64 bit.
The
usec2ticks() function has been defined for ARMv8 which will
be used by SEC Driver.
Signed-off-by: Aneesh Bansal
---
Changes in v5:
- Commit Subject modified
Changes in v4: None
Changes in v3: None
Changes in v2: None (New Patch set created with an additional
Separate functions are created for reading and checking the
sanity of Public keys:
- read_validate_single_key
- read_validate_ie_tbl
- read_validate_srk_table
Signed-off-by: Saksham Jain
Signed-off-by: Aneesh Bansal
---
During U-Boot bringup, various other images like (MC, AIP etc.) are
loaded from within U-Boot. In case of secure boot, these images must
also be validated. Thus the existing Secure Boot validation code is
made modular and the prototype for the function is changed.
This patchset is dependent on
The prototype and defination of function fsl_secboot_validate
has been changed to support calling this function from another
function within u-boot.
Only two aruments needed:
1) header address - Mandatory
2) SHA256 string - optional
Signed-off-by: Saksham Jain
The code for image hash calculation, hash calculation from
RSA signature and comparison of hashes has been mobed to a
separate function.
Signed-off-by: Saksham Jain
Signed-off-by: Aneesh Bansal
---
board/freescale/common/fsl_validate.c | 98
Hi Jagan,
On Mon, Dec 7, 2015 at 9:14 PM, Jagan Teki wrote:
> Hi Bin,
>
> On 7 December 2015 at 00:04, Jagan Teki wrote:
>> This series bypasses MTD changes from previous series[1][2] and
>> entire series tunned spi-flash layer for better code handling.
On 08.12.2015 12:13, Pavel Machek wrote:
Usage:
ubifsmount
- mount 'volume-name' volume
In the mean time, I was not able to get ubifsmount works.
Appreciate
for any quick advise? Else will look into the code tomorrow as my
bed
is calling me :)
I usually write ubinized image into the
On Tuesday, December 08, 2015 at 01:34:53 PM, Chin Liang See wrote:
> On Mon, 2015-12-07 at 18:46 +0100, Marek Vasut wrote:
> > On Monday, December 07, 2015 at 03:56:01 PM, Chin Liang See wrote:
> > [...]
> >
> > > > The cpu_eth_init() could use improvement, but we don't support
> > > > generic
>
Use tabs instead of space for indentation.
Signed-off-by: Michal Simek
---
drivers/i2c/muxes/Kconfig | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig
index
Fix typo in command description.
Signed-off-by: Michal Simek
---
drivers/i2c/muxes/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig
index bd3e078d629e..4051923115a5 100644
---
Hi Tom/Wolfgang,
"Need a separate repo for spi-nor and related subsystem."
Why?
- Currently I'm using u-boot-spi for both spi and spi-flash - some
flash stuff been added to spi area which is hard for
adding/maintaining new features.
- Both are two separate(not different) Subsystems one is
The arch/arm/lib/cache-cp15.c checks for CONFIG_ARMV7 and if this macro is
set, it configures TTBR0 register. This register must be configured for the
cache on ARMv7 to operate correctly.
The problem is that noone actually sets the CONFIG_ARMV7 macro and thus the
TTBR0 is not configured at all.
Hi Jagan,
On Fri, Dec 4, 2015 at 2:57 AM, Simon Glass wrote:
> Hi,
>
> On 3 December 2015 at 06:27, Bin Meng wrote:
>> Hi Jagan,
>>
>> On Thu, Dec 3, 2015 at 6:24 PM, Jagan Teki wrote:
>>> Hi Bin,
>>>
>>> On 3 December 2015 at 10:14,
On Mon, 2015-12-07 at 18:46 +0100, Marek Vasut wrote:
> On Monday, December 07, 2015 at 03:56:01 PM, Chin Liang See wrote:
> [...]
> > > The cpu_eth_init() could use improvement, but we don't support
> > > generic
> > > reset handling yet I believe. That's the only thing which is
> > > obviously
>
On Tuesday, December 08, 2015 at 12:13:23 PM, Pavel Machek wrote:
[...]
> > > Thanks for the pointers.
> > >
> > > I checked the source and enabled the debug message. Noticed my failure
> > > is due to small LEB and PEB size. It was set to 4k which is the sub
> > > -sector erase size of NOR
On Tuesday, December 08, 2015 at 01:04:29 PM, Stefan Roese wrote:
> On 08.12.2015 12:13, Pavel Machek wrote:
> > Usage:
> > ubifsmount
> >
> > - mount 'volume-name' volume
> >
> > In the mean time, I was not able to get ubifsmount works.
> > Appreciate
> >
Hi Simon,
On Tue, Dec 1, 2015 at 12:11 PM, Simon Glass wrote:
> At some point we may need to distinguish between different types of PCHs,
> but for existing supported platforms we only need to worry about version 7
> and version 9 bridges. Add a driver for the PCH9.
>
>
Hi Simon,
On Tue, Dec 1, 2015 at 12:11 PM, Simon Glass wrote:
> At some point we may need to distinguish between different types of PCHs,
> but for existing supported platforms we only need to worry about version 7
> and version 9 bridges. Add a driver for the PCH7.
>
>
On Tue, Dec 1, 2015 at 12:11 PM, Simon Glass wrote:
> This function is only available for compatibility with old code. Avoid
> using it in the uclass.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/pci/pci_auto.c | 14 +++---
> 1 file changed, 7
Hi Simon,
On Tue, Dec 1, 2015 at 12:11 PM, Simon Glass wrote:
> A Peripheral Controller Hub is an Intel concept - it is like the peripherals
I believe the name is Platform Controller Hub.
> on an SoC and is often in a separate chip from the CPU. Even when it is not
> it is
Hi Simon,
On Tue, Dec 1, 2015 at 12:11 PM, Simon Glass wrote:
> Add a driver-model version of the pci_write_bar32 function so that this is
> supported in the new API.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/pci/pci-uclass.c | 8
>
Hi Simon,
On Tue, Dec 1, 2015 at 12:11 PM, Simon Glass wrote:
> This function should not be used by driver-model code, so move it to the
> compatibility portion.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/pci/pci-uclass.c | 16 +---
>
Enable u-boot,dm-pre-reloc for sdhci for zc706, zed and zybo.
And create alises for it.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynq-zc706.dts | 2 ++
arch/arm/dts/zynq-zed.dts | 2 ++
arch/arm/dts/zynq-zybo.dts | 2 ++
3 files changed, 6 insertions(+)
diff
> > > > Usage:
> > > > ubifsmount
> > > >
> > > > - mount 'volume-name' volume
> > > >
> > > > In the mean time, I was not able to get ubifsmount works.
> > > > Appreciate
> > > > for any quick advise? Else will look into the code tomorrow as my
> > > > bed
> > > > is calling me :)
> > >
>
Hi Simon,
On Tue, Dec 1, 2015 at 12:11 PM, Simon Glass wrote:
> At present this SPI driver works by searching the PCI buses for its
> peripheral. It also uses the legacy PCI API.
>
> In addition the driver has code to determine the type of Intel PCH that is
> used (version 7
The arch/arm/lib/cache-cp15.c checks for CONFIG_ARMV7 and if this macro is
set, it configures TTBR0 register. This register must be configured for the
cache on ARMv7 to operate correctly.
The problem is that noone actually sets the CONFIG_ARMV7 macro and thus the
TTBR0 is not configured at all.
Hi Alexey,
On Tue, 2015-12-01 at 20:23 +0100, Marek Vasut wrote:
> On Tuesday, December 01, 2015 at 08:08:10 PM, Alexey Brodkin wrote:
> > Hi Marek,
>
> Hi!
>
> > On Mon, 2015-11-30 at 19:06 +0100, Marek Vasut wrote:
> > > On Monday, November 30, 2015 at 06:53:25 PM, Alexey Brodkin wrote:
> > >
When the Zynq Boot ROM code loads the payload from QSPI it uses the
LQSPI feature of the QSPI device, however it does not clean up its
configuration before handing over to the payload which leaves the device
confgured to by-pass the standard non-linear operating mode.
This ensures the Linear QSPI
Update the ZYBO device tree and enable config options that relate to the
added devices in the device tree.
Signed-off-by: Nathan Rossi
Cc: Albert Aribaud
Cc: Michal Simek
Cc: Simon Glass
---
On Sunday 06 December 2015 08:13 PM, Jagan Teki wrote:
> On 6 December 2015 at 11:33, Mugunthan V N wrote:
>> On Thursday 03 December 2015 09:37 PM, Jagan Teki wrote:
>>> On 19 November 2015 at 12:35, Mugunthan V N wrote:
spi bus can support dual
On Tuesday, December 08, 2015 at 02:21:06 PM, Marek Vasut wrote:
> The arch/arm/lib/cache-cp15.c checks for CONFIG_ARMV7 and if this macro is
> set, it configures TTBR0 register. This register must be configured for the
> cache on ARMv7 to operate correctly.
>
> The problem is that noone actually
Hi Simon,
On Tue, Dec 8, 2015 at 9:23 PM, Bin Meng wrote:
> Hi Simon,
>
> On Tue, Dec 1, 2015 at 12:11 PM, Simon Glass wrote:
>> A Peripheral Controller Hub is an Intel concept - it is like the peripherals
>
> I believe the name is Platform Controller Hub.
Hi Tom,
The following changes since commit 8356431bf8df6d47255d6a74ca9dce53d75265c7:
Prepare v2016.01-rc2 (2015-12-07 14:23:45 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-arc.git
for you to fetch changes up to 8555dd88cd1a7b5dd1e76c111fe635a92223b98b:
On Tue, Dec 08, 2015 at 02:33:25PM +, Alexey Brodkin wrote:
> Hi Tom,
>
> The following changes since commit 8356431bf8df6d47255d6a74ca9dce53d75265c7:
>
> Prepare v2016.01-rc2 (2015-12-07 14:23:45 -0500)
>
> are available in the git repository at:
>
> git://git.denx.de/u-boot-arc.git
On Wed, Dec 09, 2015 at 12:44:43AM +1000, Nathan Rossi wrote:
> Clean up the param checking, removing some code paths that will never
> happen.
>
> Signed-off-by: Nathan Rossi
> Cc: Michal Simek
> Cc: Tom Rini
Reported-by:
The Device Model sequence alias feature is required by some Uclasses.
Specifically SPI which picks the bus to use based on the sequence.
Without this the SPI Uclass will not probe any bus and will fail which
prevents SPL from using SPI flash as a boot location.
Signed-off-by: Nathan Rossi
Clean up the param checking, removing some code paths that will never
happen.
Signed-off-by: Nathan Rossi
Cc: Michal Simek
Cc: Tom Rini
---
tools/zynqimage.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff
On 8 December 2015 at 20:35, Mugunthan V N wrote:
> On Sunday 06 December 2015 08:13 PM, Jagan Teki wrote:
>> On 6 December 2015 at 11:33, Mugunthan V N wrote:
>>> On Thursday 03 December 2015 09:37 PM, Jagan Teki wrote:
On 19 November 2015 at
Hi Simon,
On 8 December 2015 at 08:22, Simon Glass wrote:
> Hi Jagan,
>
> On 3 December 2015 at 03:10, Jagan Teki wrote:
>> Hi Simon,
>>
>> I re-phrase all the question from previous thread and continue in this for
>> more discussion on spi-nor
Hi Mans,
On 12/08/2015 08:38 AM, Mans Rullgard wrote:
> If fecmxc_initialize_multi() fails, it frees but does not unregister
> the mdio bus, causing subsequent uses of the "mii" command to crash.
> Fix this by adding mdio_unregister() calls where needed.
>
> Signed-off-by: Mans Rullgard
On 8 December 2015 at 17:27, Bin Meng wrote:
> Hi Jagan,
>
> On Fri, Dec 4, 2015 at 2:57 AM, Simon Glass wrote:
>> Hi,
>>
>> On 3 December 2015 at 06:27, Bin Meng wrote:
>>> Hi Jagan,
>>>
>>> On Thu, Dec 3, 2015 at 6:24 PM, Jagan Teki
Hi Mans,
On 12/08/2015 08:38 AM, Mans Rullgard wrote:
> If the host clock frequency is higher than 100 MHz, the MDIO hold
> time needs to be increased from its current setting of one cycle in
> order to meet the specified minium of 10 ns. Writing an appropriate
> value to the HOLDTIME field of
If the host clock frequency is higher than 100 MHz, the MDIO hold
time needs to be increased from its current setting of one cycle in
order to meet the specified minium of 10 ns. Writing an appropriate
value to the HOLDTIME field of the MII_SPEED register achieves this.
Comment copied from Linux
Eric Nelson writes:
> Hi Mans,
>
> On 12/08/2015 08:38 AM, Mans Rullgard wrote:
>> If fecmxc_initialize_multi() fails, it frees but does not unregister
>> the mdio bus, causing subsequent uses of the "mii" command to crash.
>> Fix this by adding mdio_unregister() calls where
If fecmxc_initialize_multi() fails, it frees but does not unregister
the mdio bus, causing subsequent uses of the "mii" command to crash.
Fix this by adding mdio_unregister() calls where needed.
Signed-off-by: Mans Rullgard
---
drivers/net/fec_mxc.c | 2 ++
1 file changed, 2
Hi York,
> -Original Message-
> From: York Sun [mailto:york...@freescale.com]
> Sent: Saturday, December 05, 2015 1:35 AM
> To: Yoder Stuart-B08248 ; Kushwaha
> Prabhakar-B32579
> Cc: u-boot@lists.denx.de
> Subject: Re: [PATCH] driver:
Dear Marek,
In message <201512081439.50797.ma...@denx.de> you wrote:
>
> Please ignore, after discussing this on IRC, we decided on doing
> s/CONFIG_ARMV7/CONFIG_CPU_V7/g instead.
As IRC si (to the best or my knowledge?) not logged anywhere, I would
like to hear the rationale for this
On 12/08/2015 12:24 AM, Aneesh Bansal wrote:
> uintptr_t which is a typdef for unsigned long is needed for creating
> pointers (32 or 64 bit depending on Core) from 32 bit variables
> storing the address.
> If a 32 bit variable (u32) is typecasted to a pointer (void *),
> compiler gives a
Hi Nathan,
On 8 December 2015 at 07:44, Nathan Rossi wrote:
> The Device Model sequence alias feature is required by some Uclasses.
>
> Specifically SPI which picks the bus to use based on the sequence.
> Without this the SPI Uclass will not probe any bus and will fail
On 8 December 2015 at 04:03, Michal Simek wrote:
> Enable u-boot,dm-pre-reloc for sdhci for zc706, zed and zybo.
> And create alises for it.
>
> Signed-off-by: Michal Simek
> ---
>
> arch/arm/dts/zynq-zc706.dts | 2 ++
>
On 8 December 2015 at 03:18, Michal Simek wrote:
> Use tabs instead of space for indentation.
>
> Signed-off-by: Michal Simek
> ---
>
> drivers/i2c/muxes/Kconfig | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(-)
On 7 December 2015 at 20:26, Tom Rini wrote:
> Coverity notes that we do not ensure when we copy ifname we still have
> space left to ensure NULL termination. As cannot control the size of
> ifr_name we must make sure that our argument will not overflow the
> buffer.
>
>
Hi Tom,
On 7 December 2015 at 20:26, Tom Rini wrote:
> Coverity notes that we do not ensure when we copy in the product/vendor
> strings that they have NULL termination. In this case the answer is to
> increase the buffer we have and then set the last entry to NULL.
>
>
On 8 December 2015 at 03:18, Michal Simek wrote:
> Fix typo in command description.
>
> Signed-off-by: Michal Simek
> ---
>
> drivers/i2c/muxes/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass
On 7 December 2015 at 20:26, Tom Rini wrote:
> Coverity notes that we do not ensure a NULL terminated string here as we
> could fill the entire buffer with our strncpy call. Fix this by
> subtracting one.
>
> Reported-by: Coverity (CID 131093)
> Cc: Simon Glass
On 7 December 2015 at 14:37, York Sun wrote:
> As the name may be confusing, the CONFIG_SYS_MEM_TOP_HIDE reserves
> some memory from the end of ram, tracked by gd->ram_size. It is not
> always the top of u-boot visible memory. Rewrite the macro with a
> weak function to
On Tue, 2015-12-08 at 12:34 -0700, Simon Glass wrote:
> Hi Sjoerd,
>
> On 8 December 2015 at 00:27, Sjoerd Simons
> wrote:
> >
> > On Mon, 2015-12-07 at 17:39 -0700, Simon Glass wrote:
> > > > diff --git a/lib/Makefile b/lib/Makefile
> > > > index 1f1ff6f..ae84833
On 7 December 2015 at 02:39, Bin Meng wrote:
> Currently OF_BAD_ADDR is always -1ULL. When using OF_BAD_ADDR as the
> return value of dev_get_addr(), it creates potential size mismatch
> as dev_get_addr() uses FDT_ADDR_T_NONE as the return value which can
> be either -1U or
Hi Sjoerd,
On 8 December 2015 at 00:27, Sjoerd Simons
wrote:
>
> On Mon, 2015-12-07 at 17:39 -0700, Simon Glass wrote:
> > > diff --git a/lib/Makefile b/lib/Makefile
> > > index 1f1ff6f..ae84833 100644
> > > --- a/lib/Makefile
> > > +++ b/lib/Makefile
> > > @@
On 7 December 2015 at 06:28, Bin Meng wrote:
> With recent ns16550 driver changes, we only changed the legacy UART
> (at I/O port 0x3f8) compatible string, but forgot to change the PCI
> UART compatible string. Now fix it.
>
> Signed-off-by: Bin Meng
> ---
Hi Scott,
On 8 December 2015 at 12:36, Scott Wood wrote:
> On Tue, 2015-12-08 at 12:34 -0700, Simon Glass wrote:
>> Hi Sjoerd,
>>
>> On 8 December 2015 at 00:27, Sjoerd Simons
>> wrote:
>> >
>> > On Mon, 2015-12-07 at 17:39 -0700, Simon
Hi Heiko,
Thank you very much for your review.
> -Original Message-
> From: Heiko Schocher [mailto:h...@denx.de]
> Sent: 2015年12月9日 13:32
> To: Yang, Wenyou
> Cc: U-Boot Mailing List
> Subject: Re: [U-Boot] [PATCH 0/3] ARM: at91: add
Hi Bin,
On 07.12.2015 10:39, Bin Meng wrote:
Currently OF_BAD_ADDR is always -1ULL. When using OF_BAD_ADDR as the
return value of dev_get_addr(), it creates potential size mismatch
as dev_get_addr() uses FDT_ADDR_T_NONE as the return value which can
be either -1U or -1ULL depending on
On 8.12.2015 16:03, Tom Rini wrote:
> On Wed, Dec 09, 2015 at 12:44:43AM +1000, Nathan Rossi wrote:
>
>> Clean up the param checking, removing some code paths that will never
>> happen.
>>
>> Signed-off-by: Nathan Rossi
>> Cc: Michal Simek
>> Cc:
Due to introducing the new peripheral clock handle functions,
use these functions to reduce the duplicated code.
Signed-off-by: Wenyou Yang
---
Changes in v2: None
drivers/net/at91_emac.c |9 -
drivers/usb/host/ehci-atmel.c |8
Due to introducing the new peripheral clock handle functions,
use these functions to reduce duplicated code.
Signed-off-by: Wenyou Yang
---
Changes in v2:
- fix checkpatch warning.
board/atmel/at91rm9200ek/at91rm9200ek.c |1 -
board/atmel/at91rm9200ek/led.c
Due to introducing the new peripheral clock handle functions,
use these functions to clean up the duplicated code.
Meanwhile, remove unneeded header file include, at91_pmc.h.
Signed-off-by: Wenyou Yang
---
Changes in v2: None
Hello Wenyou,
Am 09.12.2015 um 08:15 schrieb Wenyou Yang:
Build SPL with taurus_defconfig defconfig file.
It build fails with following log message:
---8<
$ make mrproper
$ make taurus_defconfig
$ make SPL
[...]
LD spl/lib/built-in.o
LDS spl/u-boot-spl.lds
LD spl/u-boot-spl
From: Tang Yuantian
Freescale ARM-based Layerscape contains a SATA controller
which comply with the serial ATA 3.0 specification and the
AHCI 1.3 specification.
This patch adds SATA feature on ls2080aqds, ls2080ardb and
ls1043aqds boards.
Signed-off-by: Tang
To avoid the duplicated code, add the PMC_PLLICPR init function.
Signed-off-by: Wenyou Yang
---
Changes in v2:
- move at91_pllicpr_init() definition to the common file, clock.c.
- fix checkpatch errors.
arch/arm/mach-at91/clock.c |7 +++
Due to introducing the PMC_PLLICPR init function, use this
function to clean up the code.
Signed-off-by: Wenyou Yang
---
Changes in v2: None
board/atmel/sama5d3_xplained/sama5d3_xplained.c |4 +---
board/atmel/sama5d3xek/sama5d3xek.c |4 +---
To reduce the duplicated code, add PLLICPR init function, use
the function to clean up the PMC_PLLICPR directly writing code.
It is based on the following patch set.
[PATCH 0/5] ARM: at91: improve peripheral and system clock handle
functions
[PATCH 0/4] ARM: at91: add UTMI PLL
Due to introducing the PMC_PLLICPR init function, use this
function to clean up the code.
Signed-off-by: Wenyou Yang
---
Changes in v2: None
arch/arm/mach-at91/spl_at91.c |5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git
To reduce the duplicated code, rework the peripheral's and
system's clock handle functions, use these functions to replace
the clock handle code.
Changes in v2:
- fix checkpatch warning.
Wenyou Yang (5):
ARM: at91: asm/at91_pmc.h: fix trival register offset
ARM: at91: clock: add a new file
Remove unnecessary #ifdef CPU_HAS_PCR.
Signed-off-by: Wenyou Yang
---
Changes in v2: None
arch/arm/mach-at91/include/mach/at91_pmc.h |8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h
Hello Heiko,
Thank you for your review.
> -Original Message-
> From: Heiko Schocher [mailto:h...@denx.de]
> Sent: 2015年12月9日 14:56
> To: Yang, Wenyou
> Cc: U-Boot Mailing List
> Subject: Re: [U-Boot] [PATCH 4/5] board: atmel: clean up
To reduce the duplicated code, add a new file to accommodate
the peripheral's and system's clock handle code, shared with
the SoCs with different ARM core.
Signed-off-by: Wenyou Yang
---
Changes in v2: None
arch/arm/mach-at91/Makefile |1 +
Hello Heiko,
> -Original Message-
> From: Heiko Schocher [mailto:h...@denx.de]
> Sent: 2015年12月9日 15:39
> To: Yang, Wenyou
> Cc: U-Boot Mailing List ; andreas.de...@googlemail.com;
> Meier, Roger
> Subject: Re: [PATCH]
On Tue, Dec 08, 2015 at 12:35:23PM -0700, Simon Glass wrote:
> Hi Tom,
>
> On 7 December 2015 at 20:26, Tom Rini wrote:
> > Coverity notes that we do not ensure when we copy in the product/vendor
> > strings that they have NULL termination. In this case the answer is to
> >
With driver model timer support, there should not be an explict
call to timer_init(). Remove this call for x86.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v2: None
common/board_f.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Right now i8254_init() is called from timer_init() in the tsc timer
driver. But actually i8254 and tsc are completely different things.
Since tsc timer has been converted to driver model, we should find
a new place that is appropriate for U-Boot to call i8254_init(),
which is now x86_cpu_init_f().
Hi Tom,
On Dec 8, 2015 4:28 PM, "Tom Rini" wrote:
>
> On Tue, Dec 08, 2015 at 12:35:23PM -0700, Simon Glass wrote:
> > Hi Tom,
> >
> > On 7 December 2015 at 20:26, Tom Rini wrote:
> > > Coverity notes that we do not ensure when we copy in the
On Tue, Dec 08, 2015 at 04:42:17PM -0700, Simon Glass wrote:
> Hi Tom,
>
> On Dec 8, 2015 4:28 PM, "Tom Rini" wrote:
> >
> > On Tue, Dec 08, 2015 at 12:35:23PM -0700, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On 7 December 2015 at 20:26, Tom Rini
Hi Tom,
This includes fixes to PCI UART on CrownBay and Galileo, and minor
changes to x86 timer.
The following changes since commit 8555dd88cd1a7b5dd1e76c111fe635a92223b98b:
axs10x: add support of generic EHCI USB 2.0 controller (2015-12-08
17:29:56 +0300)
are available in the git repository
On Tue, Dec 08, 2015 at 12:35:18PM -0700, Simon Glass wrote:
> On 7 December 2015 at 20:26, Tom Rini wrote:
> > Coverity notes that we do not ensure a NULL terminated string here as we
> > could fill the entire buffer with our strncpy call. Fix this by
> > subtracting one.
>
On Wed, Dec 9, 2015 at 3:34 AM, Simon Glass wrote:
> On 7 December 2015 at 06:28, Bin Meng wrote:
>> With recent ns16550 driver changes, we only changed the legacy UART
>> (at I/O port 0x3f8) compatible string, but forgot to change the PCI
>> UART
On Wed, Dec 9, 2015 at 9:31 AM, Bin Meng wrote:
> With driver model timer support, there should not be an explict
> call to timer_init(). Remove this call for x86.
>
> Signed-off-by: Bin Meng
> Acked-by: Simon Glass
>
applied to
Hi Bin,
On Sun, Dec 6, 2015 at 7:53 PM, Bin Meng wrote:
> Hi Joe,
>
> On Tue, Nov 3, 2015 at 8:24 PM, Bin Meng wrote:
>> In fdt_fixup_ethernet() only "usbethaddr" is handled to fix up the
>> first usb ethernet port MAC address. Other additional usb
On Wed, Dec 9, 2015 at 3:34 AM, Simon Glass wrote:
> On 7 December 2015 at 02:39, Bin Meng wrote:
>> Currently OF_BAD_ADDR is always -1ULL. When using OF_BAD_ADDR as the
>> return value of dev_get_addr(), it creates potential size mismatch
>> as
On Wed, Dec 9, 2015 at 9:31 AM, Bin Meng wrote:
> Right now i8254_init() is called from timer_init() in the tsc timer
> driver. But actually i8254 and tsc are completely different things.
> Since tsc timer has been converted to driver model, we should find
> a new place that
Due to introducing the new UTMI PLL clock handle functions,
use these function to reduce the duplicated code.
Signed-off-by: Wenyou Yang
---
drivers/usb/host/ehci-atmel.c | 39 ---
drivers/usb/host/ohci-at91.c | 20
Hello Wenyou,
Am 09.12.2015 um 05:36 schrieb Wenyou Yang:
To avoid the duplicated code, add the PMC_PLLICPR init function.
Signed-off-by: Wenyou Yang
---
arch/arm/mach-at91/armv7/clock.c |7 +++
arch/arm/mach-at91/include/mach/at91_pmc.h |7
On Wed, Dec 09, 2015 at 09:31:26AM +0800, Miao Yan wrote:
> 2015-12-02 20:44 GMT+08:00 Bin Meng :
> > On Wed, Dec 2, 2015 at 3:39 PM, Miao Yan wrote:
> >> VxWorks 7 kernels retrieve 'local-mac-addr' from dtb and use
> >> that for NIC MAC address. As a
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