Re: [U-Boot] [RFC V1] arm: config: enforce -fno-pic for gcc

[Peng Fan]

Hi Albert,

Gentle ping! Sorry for missing to mail you when I sent out the patch.

Thanks,
Peng.
On Mon, Dec 14, 2015 at 03:28:56PM +0800, Peng Fan wrote:
>Hi Albert,
>
>Do you have any comments on this patch?
>
>Regards,
>Peng.
>
>On Sat, Dec 05, 2015 at 03:53:46PM +0800, Peng Fan wrote:
>>Android's tool chain enable the -mandroid at default.
>>This option will enable the -fpic, which cause uboot compilation
>>failure:
>>"
>> LD  u-boot
>> u-boot contains unexpected relocations: R_ARM_ABS32
>> R_ARM_RELATIVE
>>"
>>
>>In my testcase, arm-linux-androideabi-gcc-4.9 internally
>>enables '-fpic', so when compiling code, there will be
>>relocation entries using type R_ARM_GOT_BREL and .got
>>section. When linking all the built-in.o using ld, there
>>will be R_ARM_ABS32 relocation entry and .got section
>>in the final u-boot elf image. This can not be handled
>>by u-boot, since u-boot only expects R_ARM_RELATIVE
>>relocation entry.
>>arm-poky-linux-gnueabi-gcc-4.9 default does not enable '-fpic',
>>so there is not .got section and R_ARM_GOT_BREL in built-in.o.
>>And in the final u-boot elf image, all relocation entries are
>>R_ARM_RELATIVE.
>>
>>we can pass '-fno-pic' to xxx-gcc to disable pic. whether
>>the toolchain internally enables or disables pic, '-fno-pic'
>>can work well.
>>
>>Signed-off-by: Peng Fan 
>>Cc: Albert Aribaud 
>>---
>> arch/arm/config.mk | 1 +
>> 1 file changed, 1 insertion(+)
>>
>>diff --git a/arch/arm/config.mk b/arch/arm/config.mk
>>index 0550225..2b6322a 100644
>>--- a/arch/arm/config.mk
>>+++ b/arch/arm/config.mk
>>@@ -106,6 +106,7 @@ ALL-y += checkarmreloc
>> # instruction. Relocation is not supported for that case, so disable
>> # such usage by requiring word relocations.
>> PLATFORM_CPPFLAGS += $(call cc-option, -mword-relocations)
>>+PLATFORM_CPPFLAGS += $(call cc-option, -fno-pic)
>> endif
>> 
>> # limit ourselves to the sections we want in the .bin.
>>-- 
>>2.6.2
>>
>>
>
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[U-Boot] [PATCH V3] usb:ci_udc: Remove ULPI setting for i.MX OTG controller

[Peng Fan]

From: "Ye.Li" 

All the i.MX6, i.MX23 and i.MX28 OTG controllers only support UTMI
interface. Set to ULPI is not correct, even the controller will
reject this setting in PORTSC register.

Signed-off-by: Ye.Li 
Signed-off-by: Peng Fan 
---

Hi Marek,
 In V2: https://patchwork.ozlabs.org/patch/541663/
 The reason still use DBG, but not change to debug, is that the driver
 use DBG for debugging and error handling usage.
 So In this patch, I still keep DBG. If you think, it better to switch
 to use function debug, I can write another patch to convert all the
 DBGs to debug for ci_udc driver.

Regards,
Peng.

Changes since v2:
 - Correct code indent.
Changes since v1:
 - Add error handling for udc probe

 drivers/usb/gadget/ci_udc.c | 14 +++---
 1 file changed, 3 insertions(+), 11 deletions(-)

diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c
index 1ba5054..d36bcf6 100644
--- a/drivers/usb/gadget/ci_udc.c
+++ b/drivers/usb/gadget/ci_udc.c
@@ -1018,18 +1018,10 @@ int usb_gadget_register_driver(struct usb_gadget_driver 
*driver)
return ret;
 
ret = ci_udc_probe();
-#if defined(CONFIG_USB_EHCI_MX6) || defined(CONFIG_USB_EHCI_MXS)
-   /*
-* FIXME: usb_lowlevel_init()->ehci_hcd_init() should be doing all
-* HW-specific initialization, e.g. ULPI-vs-UTMI PHY selection
-*/
-   if (!ret) {
-   struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
-
-   /* select ULPI phy */
-   writel(PTS(PTS_ENABLE) | PFSC, >portsc);
+   if (ret) {
+   DBG("udc probe failed, returned %d\n", ret);
+   return ret;
}
-#endif
 
ret = driver->bind();
if (ret) {
-- 
2.6.2

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[U-Boot] [PATCH v4 1/8] x86: qemu: add fw_cfg support

[Miao Yan]

The QEMU fw_cfg interface allows the guest to retrieve various
data information from QEMU. For example, APCI/SMBios tables, number
of online cpus, kernel data and command line, etc.

This patch adds support for QEMU fw_cfg interface.

Signed-off-by: Miao Yan 
---
Changes in v4:
  - cleanups
  - change 'fw load' to take second parameter for initrd load address

 arch/x86/cpu/qemu/Makefile |   2 +-
 arch/x86/cpu/qemu/fw_cfg.c | 268 +
 arch/x86/cpu/qemu/fw_cfg.h |  97 
 arch/x86/cpu/qemu/qemu.c   |   3 +
 4 files changed, 369 insertions(+), 1 deletion(-)
 create mode 100644 arch/x86/cpu/qemu/fw_cfg.c
 create mode 100644 arch/x86/cpu/qemu/fw_cfg.h

diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index 3f3958a..ad424ec 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -7,5 +7,5 @@
 ifndef CONFIG_EFI_STUB
 obj-y += car.o dram.o
 endif
-obj-y += qemu.o
+obj-y += qemu.o fw_cfg.o
 obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o dsdt.o
diff --git a/arch/x86/cpu/qemu/fw_cfg.c b/arch/x86/cpu/qemu/fw_cfg.c
new file mode 100644
index 000..9de8680
--- /dev/null
+++ b/arch/x86/cpu/qemu/fw_cfg.c
@@ -0,0 +1,268 @@
+/*
+ * (C) Copyright 2015 Miao Yan 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "fw_cfg.h"
+
+static bool fwcfg_present;
+static bool fwcfg_dma_present;
+
+static void qemu_fwcfg_read_entry_pio(uint16_t entry,
+   uint32_t size, void *address)
+{
+   uint32_t i = 0;
+   uint8_t *data = address;
+
+   /*
+* writting FW_CFG_INVALID will cause
+* read operation to resume at
+* last offset, otherwise read will
+* start at offset 0
+*/
+
+   if (entry != FW_CFG_INVALID)
+   outw(entry, FW_CONTROL_PORT);
+   while (size--)
+   data[i++] = inb(FW_DATA_PORT);
+}
+
+static void qemu_fwcfg_read_entry_dma(uint16_t entry,
+   uint32_t size, void *address)
+{
+   struct fw_cfg_dma_access dma;
+
+   dma.length = cpu_to_be32(size);
+   dma.address = cpu_to_be64((uintptr_t)address);
+   dma.control = cpu_to_be32(FW_CFG_DMA_READ);
+
+   /*
+* writting FW_CFG_INVALID will cause
+* read operation to resume at
+* last offset, otherwise read will
+* start at offset 0
+*/
+
+   if (entry != FW_CFG_INVALID)
+   dma.control |= cpu_to_be32(FW_CFG_DMA_SELECT | (entry << 16));
+
+   barrier();
+
+   debug("qemu_fwcfg_dma_read_entry: addr %p, length %u control 0x%x\n",
+ address, size, be32_to_cpu(dma.control));
+
+   outl(cpu_to_be32((uint32_t)), FW_DMA_PORT_HIGH);
+
+   while (be32_to_cpu(dma.control) & ~FW_CFG_DMA_ERROR)
+   __asm__ __volatile__ ("pause");
+}
+
+static bool qemu_fwcfg_present(void)
+{
+   uint32_t qemu;
+
+   qemu_fwcfg_read_entry_pio(FW_CFG_SIGNATURE, 4, );
+   return be32_to_cpu(qemu) == QEMU_FW_CFG_SIGNATURE;
+}
+
+static bool qemu_fwcfg_dma_present(void)
+{
+   uint8_t dma_enabled;
+
+   qemu_fwcfg_read_entry_pio(FW_CFG_ID, 1, _enabled);
+   if (dma_enabled & FW_CFG_DMA_ENABLED)
+   return true;
+
+   return false;
+}
+
+static void qemu_fwcfg_read_entry(uint16_t entry,
+   uint32_t length, void *address)
+{
+   if (fwcfg_dma_present)
+   qemu_fwcfg_read_entry_dma(entry, length, address);
+   else
+   qemu_fwcfg_read_entry_pio(entry, length, address);
+}
+
+int qemu_fwcfg_online_cpus(void)
+{
+   uint16_t nb_cpus;
+
+   if (!fwcfg_present)
+   return 1;
+
+   qemu_fwcfg_read_entry(FW_CFG_NB_CPUS, 2, _cpus);
+
+   return le16_to_cpu(nb_cpus);
+}
+
+static int qemu_fwcfg_setup_kernel(void *load_addr, void *initrd_addr)
+{
+   char *data_addr;
+   uint32_t setup_size, kernel_size, cmdline_size, initrd_size;
+
+   qemu_fwcfg_read_entry(FW_CFG_SETUP_SIZE, 4, _size);
+   qemu_fwcfg_read_entry(FW_CFG_KERNEL_SIZE, 4, _size);
+
+   if (setup_size == 0 || kernel_size == 0) {
+   printf("warning: no kernel available\n");
+   return -1;
+   }
+
+   data_addr = load_addr;
+   qemu_fwcfg_read_entry(FW_CFG_SETUP_DATA,
+ le32_to_cpu(setup_size), data_addr);
+   data_addr += le32_to_cpu(setup_size);
+
+   qemu_fwcfg_read_entry(FW_CFG_KERNEL_DATA,
+ le32_to_cpu(kernel_size), data_addr);
+   data_addr += le32_to_cpu(kernel_size);
+
+   data_addr = initrd_addr;
+   qemu_fwcfg_read_entry(FW_CFG_INITRD_SIZE, 4, _size);
+   if (initrd_size == 0) {
+   printf("warning: no initrd available\n");
+   } else {
+   qemu_fwcfg_read_entry(FW_CFG_INITRD_DATA,
+ le32_to_cpu(initrd_size), data_addr);
+ 

[U-Boot] [PATCH v4 5/8] x86: qemu: add qemu_fwcfg_fdt_fixup()

[Miao Yan]

Add a function to fix up 'cpus' node in dts files for qemu target.

Signed-off-by: Miao Yan 
---
Changes in v4:
  - fix a typo in commit log

 arch/x86/cpu/qemu/fw_cfg.c | 65 ++
 arch/x86/cpu/qemu/fw_cfg.h | 11 
 2 files changed, 76 insertions(+)

diff --git a/arch/x86/cpu/qemu/fw_cfg.c b/arch/x86/cpu/qemu/fw_cfg.c
index 9de8680..5b1caa8 100644
--- a/arch/x86/cpu/qemu/fw_cfg.c
+++ b/arch/x86/cpu/qemu/fw_cfg.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "fw_cfg.h"
 
 static bool fwcfg_present;
@@ -103,6 +104,70 @@ int qemu_fwcfg_online_cpus(void)
return le16_to_cpu(nb_cpus);
 }
 
+void qemu_fwcfg_fdt_fixup(void *fdt_addr, int cpu_num)
+{
+   int i;
+   char cpus[10];
+   int off, err, sub_off, id;
+
+   off = fdt_path_offset(fdt_addr, "/cpus");
+   if (off != -FDT_ERR_NOTFOUND) {
+   printf("error detecting cpus subnode: %s (%d)\n",
+  fdt_strerror(off), off);
+   return;
+   }
+
+   off = fdt_add_subnode(fdt_addr, 0, "cpus");
+   if (off < 0) {
+   printf("error adding cpus subnode: %s (%d)\n",
+  fdt_strerror(off), off);
+   return;
+   }
+
+   for (i = cpu_num - 1; i >= 0; i--) {
+   sprintf(cpus, "%s@%d", "cpu", i);
+   sub_off = fdt_add_subnode(fdt_addr, off, cpus);
+   if (sub_off < 0) {
+   printf("error adding subnode cpu %d: %s (%d)\n",
+  i, fdt_strerror(sub_off), sub_off);
+   return;
+   }
+
+   id = cpu_to_fdt32(i);
+   err = fdt_setprop(fdt_addr, sub_off, "intel,apic-id",
+   (void *), sizeof(id));
+   if (err < 0) {
+   printf("error adding apic-id %d: %s (%d)\n",
+  i, fdt_strerror(err), err);
+   return;
+   }
+
+   err = fdt_setprop(fdt_addr, sub_off, "reg",
+   (void *), sizeof(id));
+   if (err < 0) {
+   printf("error adding reg %d: %s (%d)\n",
+  i, fdt_strerror(err), err);
+   return;
+   }
+
+   err = fdt_setprop(fdt_addr, sub_off, "compatible",
+   "cpu-qemu", sizeof("cpu-qemu"));
+   if (err < 0) {
+   printf("error adding compatible %d: %s (%d)\n",
+  i, fdt_strerror(err), err);
+   return;
+   }
+
+   err = fdt_setprop(fdt_addr, sub_off, "device_type",
+   "cpu", sizeof("cpu"));
+   if (err < 0) {
+   printf("error adding device_type %d: %s (%d)\n",
+  i, fdt_strerror(err), err);
+   return;
+   }
+   }
+}
+
 static int qemu_fwcfg_setup_kernel(void *load_addr, void *initrd_addr)
 {
char *data_addr;
diff --git a/arch/x86/cpu/qemu/fw_cfg.h b/arch/x86/cpu/qemu/fw_cfg.h
index 03ac27d..f2c9221 100644
--- a/arch/x86/cpu/qemu/fw_cfg.h
+++ b/arch/x86/cpu/qemu/fw_cfg.h
@@ -94,4 +94,15 @@ void qemu_fwcfg_init(void);
 
 int qemu_fwcfg_online_cpus(void);
 
+/**
+ * Fix 'cpu' node in device tree for qemu targets
+ *
+ * @fdt_addr: device tree blob address
+ * @cpu_num:  cpu number in system
+ *
+ * @return:   None
+ */
+
+void qemu_fwcfg_fdt_fixup(void *fdt_addr, int cpu_num);
+
 #endif
-- 
1.9.1

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[U-Boot] [PATCH v4 4/8] x86: use actual CPU number for allocating memory

[Miao Yan]

Use actual CPU number, instead of maximum cpu configured,
to allocate stack memory in 'load_sipi_vector'

Signed-off-by: Miao Yan 
---
 arch/x86/cpu/mp_init.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 2f34317..2a3ce48 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -210,7 +210,7 @@ static int save_bsp_msrs(char *start, int size)
return msr_count;
 }
 
-static int load_sipi_vector(atomic_t **ap_countp)
+static int load_sipi_vector(atomic_t **ap_countp, int num_cpus)
 {
struct sipi_params_16bit *params16;
struct sipi_params *params;
@@ -239,7 +239,7 @@ static int load_sipi_vector(atomic_t **ap_countp)
params->idt_ptr = (uint32_t)x86_get_idt();
 
params->stack_size = CONFIG_AP_STACK_SIZE;
-   size = params->stack_size * CONFIG_MAX_CPUS;
+   size = params->stack_size * num_cpus;
stack = memalign(size, 4096);
if (!stack)
return -ENOMEM;
@@ -483,7 +483,7 @@ int mp_init(struct mp_params *p)
mp_info.records = p->flight_plan;
 
/* Load the SIPI vector */
-   ret = load_sipi_vector(_count);
+   ret = load_sipi_vector(_count, num_cpus);
if (ap_count == NULL)
return -1;
 
-- 
1.9.1

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[U-Boot] [PATCH v4 6/8] x86: qemu: fix up cpu node in device tree

[Miao Yan]

Remove 'cpus' node in dts files for QEMU targets,
retrieve cpu number through 'fw_cfg' interface and
fix up device tree blob at runtime.

Signed-off-by: Miao Yan 
---
 arch/x86/cpu/qemu/qemu.c |  4 
 arch/x86/dts/qemu-x86_i440fx.dts | 19 +--
 arch/x86/dts/qemu-x86_q35.dts| 19 +--
 3 files changed, 6 insertions(+), 36 deletions(-)

diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index d9ae066..3be3af0 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -15,6 +15,8 @@
 
 static bool i440fx;
 
+DECLARE_GLOBAL_DATA_PTR;
+
 static void qemu_chipset_init(void)
 {
u16 device, xbcs;
@@ -93,6 +95,8 @@ int arch_early_init_r(void)
 {
qemu_chipset_init();
 
+   qemu_fwcfg_fdt_fixup((void *)gd->fdt_blob, qemu_fwcfg_online_cpus());
+
return 0;
 }
 
diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts
index 4332204..79bafbd 100644
--- a/arch/x86/dts/qemu-x86_i440fx.dts
+++ b/arch/x86/dts/qemu-x86_i440fx.dts
@@ -26,24 +26,7 @@
stdout-path = "/serial";
};
 
-   cpus {
-   #address-cells = <1>;
-   #size-cells = <0>;
-
-   cpu@0 {
-   device_type = "cpu";
-   compatible = "cpu-qemu";
-   reg = <0>;
-   intel,apic-id = <0>;
-   };
-
-   cpu@1 {
-   device_type = "cpu";
-   compatible = "cpu-qemu";
-   reg = <1>;
-   intel,apic-id = <1>;
-   };
-   };
+   /* cpu node will be dynamically filled by U-Boot */
 
tsc-timer {
clock-frequency = <10>;
diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts
index 3e2cfac..9563344 100644
--- a/arch/x86/dts/qemu-x86_q35.dts
+++ b/arch/x86/dts/qemu-x86_q35.dts
@@ -37,24 +37,7 @@
stdout-path = "/serial";
};
 
-   cpus {
-   #address-cells = <1>;
-   #size-cells = <0>;
-
-   cpu@0 {
-   device_type = "cpu";
-   compatible = "cpu-qemu";
-   reg = <0>;
-   intel,apic-id = <0>;
-   };
-
-   cpu@1 {
-   device_type = "cpu";
-   compatible = "cpu-qemu";
-   reg = <1>;
-   intel,apic-id = <1>;
-   };
-   };
+   /* cpu node will be dynamically filled by U-Boot */
 
tsc-timer {
clock-frequency = <10>;
-- 
1.9.1

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[U-Boot] [PATCH v4 7/8] x86: qemu: adjust ramdisk load address

[Miao Yan]

By default, ramdisk load address is defined to 0200 in
env string. When loading bzImage to 10 (default address), there's
a chance that the ramdisk header would be overwritten by
the kernel. Thus increase the gap and make ramdisk load at 0400
by default.

Signed-off-by: Miao Yan 
---
 include/configs/qemu-x86.h | 13 +
 1 file changed, 13 insertions(+)

diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h
index 4258dcb..657b8af 100644
--- a/include/configs/qemu-x86.h
+++ b/include/configs/qemu-x86.h
@@ -57,4 +57,17 @@
 #undef CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_IS_NOWHERE
 
+/* default ramdisk load address */
+#define CONFIG_RAMDISK_ADDR0x0400
+
+#undef CONFIG_EXTRA_ENV_SETTINGS
+#define CONFIG_EXTRA_ENV_SETTINGS  \
+   CONFIG_STD_DEVICES_SETTINGS \
+   "pciconfighost=1\0" \
+   "netdev=eth0\0" \
+   "consoledev=ttyS0\0"\
+   "othbootargs=acpi=off\0"\
+   "ramdiskaddr=0x400\0"   \
+   "ramdiskfile=initramfs.gz\0"
+
 #endif /* __CONFIG_H */
-- 
1.9.1

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[U-Boot] [PATCH v4 3/8] x86: fix a typo in function name

[Miao Yan]

Rename 'find_cpu_by_apid_id' to 'find_cpu_by_apic_id'. This
should be a typo.

Signed-off-by: Miao Yan 
---
 arch/x86/cpu/mp_init.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 4334f5b..2f34317 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -104,7 +104,7 @@ static void ap_do_flight_plan(struct udevice *cpu)
}
 }
 
-static int find_cpu_by_apid_id(int apic_id, struct udevice **devp)
+static int find_cpu_by_apic_id(int apic_id, struct udevice **devp)
 {
struct udevice *dev;
 
@@ -137,7 +137,7 @@ static void ap_init(unsigned int cpu_index)
enable_lapic();
 
apic_id = lapicid();
-   ret = find_cpu_by_apid_id(apic_id, );
+   ret = find_cpu_by_apic_id(apic_id, );
if (ret) {
debug("Unknown CPU apic_id %x\n", apic_id);
goto done;
@@ -432,7 +432,7 @@ static int init_bsp(struct udevice **devp)
lapic_setup();
 
apic_id = lapicid();
-   ret = find_cpu_by_apid_id(apic_id, devp);
+   ret = find_cpu_by_apic_id(apic_id, devp);
if (ret) {
printf("Cannot find boot CPU, APIC ID %d\n", apic_id);
return ret;
-- 
1.9.1

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[U-Boot] [PATCH v4 8/8] x86: qemu: add documentaion for the fw_cfg interface

[Miao Yan]

Document the usage of 'fw' command

Signed-off-by: Miao Yan 
---
Changes in v4:
  - limit maximum supported cpu number to 32

 doc/README.x86 | 35 ---
 1 file changed, 32 insertions(+), 3 deletions(-)

diff --git a/doc/README.x86 b/doc/README.x86
index 1271e5e..aa3010d 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -295,9 +295,38 @@ show QEMU's VGA console window. Note this will disable 
QEMU's serial output.
 If you want to check both consoles, use '-serial stdio'.
 
 Multicore is also supported by QEMU via '-smp n' where n is the number of cores
-to instantiate. Currently the default U-Boot built for QEMU supports 2 cores.
-In order to support more cores, you need add additional cpu nodes in the device
-tree and change CONFIG_MAX_CPUS accordingly.
+to instantiate. Note, due space limitations in dtb, the maximum supported CPU
+number is 32.
+
+The fw_cfg interface in QEMU also provides information about kernel data, 
initrd
+,command-line arguments and more. U-Boot supports directly accessing these 
informtion
+from fw_cfg interface, this saves the time of loading them from hard disk or
+network again, through emulated devices. To use it , simply providing them in
+QEMU command line:
+
+$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 -kernel 
/path/to/bzImage
+-append 'root=/dev/ram console=ttyS0' -initrd /path/to/initrd -smp 8
+
+Note: -initrd and -smp are both optional
+
+Then start QEMU, in U-Boot command line use the following U-Boot command to 
setup kernel:
+
+ => fw
+fw - QEMU firmware interface
+
+Usage:
+fw 
+- list : print firmware(s) currently loaded
+- cpus : print online cpu number
+- load   : load kernel and initrd (if any) and 
setup for zboot
+
+=> fw load
+loading kernel to address 0200 initrd 0400, size 0x1b1ab50
+
+Here the kernel (bzImage) is loaded to 0200 and initrd is to 0x0400. 
Then, 'zboot'
+can be used to boot the kernel:
+
+=> zboot 0200 - 0400 1b1ab50
 
 CPU Microcode
 -
-- 
1.9.1

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Re: [U-Boot] [PATCH v4 5/8] x86: qemu: add qemu_fwcfg_fdt_fixup()

[Simon Glass]

Hi Maio,

On 30 December 2015 at 19:55, Miao Yan  wrote:
> Add a function to fix up 'cpus' node in dts files for qemu target.
>
> Signed-off-by: Miao Yan 
> ---
> Changes in v4:
>   - fix a typo in commit log
>
>  arch/x86/cpu/qemu/fw_cfg.c | 65 
> ++
>  arch/x86/cpu/qemu/fw_cfg.h | 11 
>  2 files changed, 76 insertions(+)

I'm sorry for not reviewing this earlier (Christmas and all that). I
don't think you need to update the device tree to make this work.

Here's my suggestion:

- At present cpu_x86_bind() sets up the CPU APIC ID from the device tree
- You can bind new CPU devices in your code on start-up
- You can check if you have CPUs which are not available in the device
list, by using uclass_find_first/next_device() to iterate through the
devices without probing them
- Then to create a new one, call device_bind_driver() with the /cpus
node as the parent
- After binding, update the parent platform data:

  struct cpu_platdata *plat = dev_get_parent_platdata(dev);

   plat->cpu_id = ...

- Then when it comes to probing, you will have all the devices you
need, and you don't need to adjust the device tree. The device tree
can just hold a single device, for example.

I think it is better to do this than adjust the device tree because it
removes the 32-CPU limit and should be faster. It is also simpler as
it is a more direct method. Also I believe you only need to do this
after relocation - e.g. in arch_early_init_r(), which is before
mp_init() is called from cpu_init_r().

I wonder if there is a general way to probe available CPUs (and their
APIC IDs)? Or is qemu the only 'CPU' with this feature?

Regards,
Simon
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Re: [U-Boot] [PATCH v4 4/8] x86: use actual CPU number for allocating memory

[Simon Glass]

On 30 December 2015 at 19:55, Miao Yan  wrote:
> Use actual CPU number, instead of maximum cpu configured,
> to allocate stack memory in 'load_sipi_vector'
>
> Signed-off-by: Miao Yan 
> ---
>  arch/x86/cpu/mp_init.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v4 7/8] x86: qemu: adjust ramdisk load address

[Simon Glass]

Hi Miao,

On 30 December 2015 at 19:55, Miao Yan  wrote:
> By default, ramdisk load address is defined to 0200 in
> env string. When loading bzImage to 10 (default address), there's
> a chance that the ramdisk header would be overwritten by
> the kernel. Thus increase the gap and make ramdisk load at 0400
> by default.
>
> Signed-off-by: Miao Yan 
> ---
>  include/configs/qemu-x86.h | 13 +
>  1 file changed, 13 insertions(+)

Reviewed-by: Simon Glass 

But you add other env options here to. Can you mention more of these
in the commit message too?

>
> diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h
> index 4258dcb..657b8af 100644
> --- a/include/configs/qemu-x86.h
> +++ b/include/configs/qemu-x86.h
> @@ -57,4 +57,17 @@
>  #undef CONFIG_ENV_IS_IN_SPI_FLASH
>  #define CONFIG_ENV_IS_NOWHERE
>
> +/* default ramdisk load address */
> +#define CONFIG_RAMDISK_ADDR0x0400
> +
> +#undef CONFIG_EXTRA_ENV_SETTINGS
> +#define CONFIG_EXTRA_ENV_SETTINGS  \
> +   CONFIG_STD_DEVICES_SETTINGS \
> +   "pciconfighost=1\0" \
> +   "netdev=eth0\0" \
> +   "consoledev=ttyS0\0"\
> +   "othbootargs=acpi=off\0"\
> +   "ramdiskaddr=0x400\0"   \
> +   "ramdiskfile=initramfs.gz\0"
> +
>  #endif /* __CONFIG_H */
> --
> 1.9.1
>

Regards,
Simon
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Re: [U-Boot] [PATCH v4 8/8] x86: qemu: add documentaion for the fw_cfg interface

[Simon Glass]

Hi Miao,

On 30 December 2015 at 19:55, Miao Yan  wrote:
> Document the usage of 'fw' command
>
> Signed-off-by: Miao Yan 
> ---
> Changes in v4:
>   - limit maximum supported cpu number to 32
>
>  doc/README.x86 | 35 ---
>  1 file changed, 32 insertions(+), 3 deletions(-)
>
> diff --git a/doc/README.x86 b/doc/README.x86
> index 1271e5e..aa3010d 100644
> --- a/doc/README.x86
> +++ b/doc/README.x86
> @@ -295,9 +295,38 @@ show QEMU's VGA console window. Note this will disable 
> QEMU's serial output.
>  If you want to check both consoles, use '-serial stdio'.
>
>  Multicore is also supported by QEMU via '-smp n' where n is the number of 
> cores
> -to instantiate. Currently the default U-Boot built for QEMU supports 2 cores.
> -In order to support more cores, you need add additional cpu nodes in the 
> device
> -tree and change CONFIG_MAX_CPUS accordingly.

This is a little unclear, because it seems like your code actually
fixes this by automatically supporting more CPUs.

> +to instantiate. Note, due space limitations in dtb, the maximum supported CPU
> +number is 32.
> +
> +The fw_cfg interface in QEMU also provides information about kernel data, 
> initrd
> +,command-line arguments and more. U-Boot supports directly accessing these 
> informtion
> +from fw_cfg interface, this saves the time of loading them from hard disk or
> +network again, through emulated devices. To use it , simply providing them in
> +QEMU command line:
> +
> +$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 -kernel 
> /path/to/bzImage
> +-append 'root=/dev/ram console=ttyS0' -initrd /path/to/initrd -smp 8
> +
> +Note: -initrd and -smp are both optional
> +
> +Then start QEMU, in U-Boot command line use the following U-Boot command to 
> setup kernel:
> +
> + => fw
> +fw - QEMU firmware interface
> +
> +Usage:
> +fw 
> +- list : print firmware(s) currently loaded
> +- cpus : print online cpu number
> +- load   : load kernel and initrd (if any) and 
> setup for zboot
> +
> +=> fw load
> +loading kernel to address 0200 initrd 0400, size 0x1b1ab50
> +
> +Here the kernel (bzImage) is loaded to 0200 and initrd is to 0x0400. 
> Then, 'zboot'
> +can be used to boot the kernel:
> +
> +=> zboot 0200 - 0400 1b1ab50
>
>  CPU Microcode
>  -
> --
> 1.9.1
>

Great documentation!

Regards,
Simon
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Re: [U-Boot] [PATCH v4 1/8] x86: qemu: add fw_cfg support

[Simon Glass]

Hi Miao,

On 30 December 2015 at 19:55, Miao Yan  wrote:
> The QEMU fw_cfg interface allows the guest to retrieve various
> data information from QEMU. For example, APCI/SMBios tables, number
> of online cpus, kernel data and command line, etc.
>
> This patch adds support for QEMU fw_cfg interface.
>
> Signed-off-by: Miao Yan 
> ---
> Changes in v4:
>   - cleanups
>   - change 'fw load' to take second parameter for initrd load address
>
>  arch/x86/cpu/qemu/Makefile |   2 +-
>  arch/x86/cpu/qemu/fw_cfg.c | 268 
> +
>  arch/x86/cpu/qemu/fw_cfg.h |  97 
>  arch/x86/cpu/qemu/qemu.c   |   3 +
>  4 files changed, 369 insertions(+), 1 deletion(-)
>  create mode 100644 arch/x86/cpu/qemu/fw_cfg.c
>  create mode 100644 arch/x86/cpu/qemu/fw_cfg.h

Reviewed-by: Simon Glass 

But a few nits...

>
> diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
> index 3f3958a..ad424ec 100644
> --- a/arch/x86/cpu/qemu/Makefile
> +++ b/arch/x86/cpu/qemu/Makefile
> @@ -7,5 +7,5 @@
>  ifndef CONFIG_EFI_STUB
>  obj-y += car.o dram.o
>  endif
> -obj-y += qemu.o
> +obj-y += qemu.o fw_cfg.o

Can you put the new file first, so that the list is in alphabetical order?

>  obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o dsdt.o
> diff --git a/arch/x86/cpu/qemu/fw_cfg.c b/arch/x86/cpu/qemu/fw_cfg.c
> new file mode 100644
> index 000..9de8680
> --- /dev/null
> +++ b/arch/x86/cpu/qemu/fw_cfg.c
> @@ -0,0 +1,268 @@
> +/*
> + * (C) Copyright 2015 Miao Yan 
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "fw_cfg.h"
> +
> +static bool fwcfg_present;
> +static bool fwcfg_dma_present;
> +
> +static void qemu_fwcfg_read_entry_pio(uint16_t entry,
> +   uint32_t size, void *address)

Function comment - what does this do?

> +{
> +   uint32_t i = 0;
> +   uint8_t *data = address;
> +
> +   /*
> +* writting FW_CFG_INVALID will cause
> +* read operation to resume at
> +* last offset, otherwise read will
> +* start at offset 0

Please can you format comments to 75 columns or thereabout?

> +*/
> +
> +   if (entry != FW_CFG_INVALID)
> +   outw(entry, FW_CONTROL_PORT);
> +   while (size--)
> +   data[i++] = inb(FW_DATA_PORT);
> +}
> +
> +static void qemu_fwcfg_read_entry_dma(uint16_t entry,
> +   uint32_t size, void *address)
> +{
> +   struct fw_cfg_dma_access dma;
> +
> +   dma.length = cpu_to_be32(size);
> +   dma.address = cpu_to_be64((uintptr_t)address);
> +   dma.control = cpu_to_be32(FW_CFG_DMA_READ);
> +
> +   /*
> +* writting FW_CFG_INVALID will cause
> +* read operation to resume at
> +* last offset, otherwise read will
> +* start at offset 0
> +*/
> +
> +   if (entry != FW_CFG_INVALID)
> +   dma.control |= cpu_to_be32(FW_CFG_DMA_SELECT | (entry << 16));
> +
> +   barrier();
> +
> +   debug("qemu_fwcfg_dma_read_entry: addr %p, length %u control 0x%x\n",
> + address, size, be32_to_cpu(dma.control));
> +
> +   outl(cpu_to_be32((uint32_t)), FW_DMA_PORT_HIGH);
> +
> +   while (be32_to_cpu(dma.control) & ~FW_CFG_DMA_ERROR)
> +   __asm__ __volatile__ ("pause");
> +}
> +
> +static bool qemu_fwcfg_present(void)
> +{
> +   uint32_t qemu;
> +
> +   qemu_fwcfg_read_entry_pio(FW_CFG_SIGNATURE, 4, );
> +   return be32_to_cpu(qemu) == QEMU_FW_CFG_SIGNATURE;
> +}
> +
> +static bool qemu_fwcfg_dma_present(void)
> +{
> +   uint8_t dma_enabled;
> +
> +   qemu_fwcfg_read_entry_pio(FW_CFG_ID, 1, _enabled);
> +   if (dma_enabled & FW_CFG_DMA_ENABLED)
> +   return true;
> +
> +   return false;
> +}
> +
> +static void qemu_fwcfg_read_entry(uint16_t entry,
> +   uint32_t length, void *address)
> +{
> +   if (fwcfg_dma_present)
> +   qemu_fwcfg_read_entry_dma(entry, length, address);
> +   else
> +   qemu_fwcfg_read_entry_pio(entry, length, address);
> +}
> +
> +int qemu_fwcfg_online_cpus(void)
> +{
> +   uint16_t nb_cpus;
> +
> +   if (!fwcfg_present)
> +   return 1;

-ENODEV

> +
> +   qemu_fwcfg_read_entry(FW_CFG_NB_CPUS, 2, _cpus);
> +
> +   return le16_to_cpu(nb_cpus);
> +}
> +
> +static int qemu_fwcfg_setup_kernel(void *load_addr, void *initrd_addr)

Function comment

> +{
> +   char *data_addr;
> +   uint32_t setup_size, kernel_size, cmdline_size, initrd_size;
> +
> +   qemu_fwcfg_read_entry(FW_CFG_SETUP_SIZE, 4, _size);
> +   qemu_fwcfg_read_entry(FW_CFG_KERNEL_SIZE, 4, _size);
> +
> +   if (setup_size == 0 || kernel_size == 0) {
> +   printf("warning: no kernel available\n");
> +   return -1;
> +   }
> +
> +   data_addr = load_addr;
> 

Re: [U-Boot] [PATCH v4 3/8] x86: fix a typo in function name

[Simon Glass]

On 30 December 2015 at 19:55, Miao Yan  wrote:
> Rename 'find_cpu_by_apid_id' to 'find_cpu_by_apic_id'. This
> should be a typo.
>
> Signed-off-by: Miao Yan 
> ---
>  arch/x86/cpu/mp_init.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v4 2/8] x86: qemu: add a cpu uclass driver for qemu target

[Simon Glass]

On 30 December 2015 at 19:55, Miao Yan  wrote:
> Add a cpu uclass driver for qemu. Previously, the qemu
> target gets cpu number from board dts files, which are
> manually created at compile time. This does not scale
> when more cpus are assigned to guest as the dts files
> must be modified as well.
>
> This patch adds a cpu uclass driver for qemu targets
> to directly read online cpu number from firmware.

Please try to wrap your commit messages to around 75 columns.

>
> Signed-off-by: 
> ---
>  arch/x86/cpu/qemu/Makefile   |  2 +-
>  arch/x86/cpu/qemu/cpu.c  | 57 
> 
>  arch/x86/dts/qemu-x86_i440fx.dts |  4 +--
>  arch/x86/dts/qemu-x86_q35.dts|  4 +--
>  4 files changed, 62 insertions(+), 5 deletions(-)
>  create mode 100644 arch/x86/cpu/qemu/cpu.c

Reviewed-by: Simon Glass 
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[U-Boot] sf: About sandbox flash driver

[Jagan Teki]

Hi Simon,

Few question wrt sandbox flash driver - drivers/mtd/spi/sandbox.c

1) Does this driver used for creating flash emulation environment? or
something else?
2) Can't it use spi_flash.c core for all spi flash operations, how
different is this?

Please let me know your inputs.

thanks!
-- 
Jagan.
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Re: [U-Boot] [PATCH] igep00x0: Do not include config_distro_defaults.h directly

[Enric Balletbo Serra]

Hi Ladislav,

Thanks for the patch, some comments below

2015-12-30 2:50 GMT+01:00 Ladislav Michl :
> File is already included:
> omap3_igep00x0.h -> ti_omap3_common.h -> ti_armv7_omap.h ->
> ti_armv7_common.h -> config_distro_defaults.h
>
> Signed-off-by: Ladislav Michl 
> ---
>  include/configs/omap3_igep00x0.h | 10 +++---
>  1 file changed, 3 insertions(+), 7 deletions(-)
>
> diff --git a/include/configs/omap3_igep00x0.h 
> b/include/configs/omap3_igep00x0.h
> index cf2bc3e..a64b38f 100644
> --- a/include/configs/omap3_igep00x0.h
> +++ b/include/configs/omap3_igep00x0.h
> @@ -43,7 +43,7 @@
>  #else
>  #error "status LED not defined for this machine."
>  #endif
> -#define RED_LED_DEV0
> +#define RED_LED_DEV0

any reason for this change ?


>  #define STATUS_LED_BIT RED_LED_GPIO
>  #define STATUS_LED_STATE   STATUS_LED_ON
>  #define STATUS_LED_PERIOD  (CONFIG_SYS_HZ / 2)
> @@ -56,7 +56,7 @@
>  #define CONFIG_OMAP3_GPIO_6/* GPIO160..191 is in GPIO bank 6 */
>
>  /* USB */
> -#define CONFIG_USB_MUSB_UDC1
> +#define CONFIG_USB_MUSB_UDC1

and this ?

>  #define CONFIG_USB_OMAP3   1
>  #define CONFIG_TWL4030_USB 1
>
> @@ -81,12 +81,8 @@
>  #define CONFIG_CMD_DHCP
>  #define CONFIG_CMD_PING
>
> -/*#undef CONFIG_ENV_IS_NOWHERE*/
> -

and this ?

>  #ifndef CONFIG_SPL_BUILD
>
> -#include 
> -
>  /* Environment */
>  #define ENV_DEVICE_SETTINGS \
> "stdin=serial\0" \
> @@ -138,7 +134,7 @@
>  #if defined(CONFIG_CMD_NET)
>  #define CONFIG_SMC911X
>  #define CONFIG_SMC911X_32_BIT
> -#define CONFIG_SMC911X_BASE0x2C00
> +#define CONFIG_SMC911X_BASE0x2C00

again, any reason for this change?

>  #endif /* (CONFIG_CMD_NET) */
>
>  /* OneNAND boot config */
> --
> 2.1.4
>
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Also, can you send this patch and the other patch (igep00x0: cleanup
ethernet support) as numbered patch series?

Thanks,

Enric
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Re: [U-Boot] [PATCH 1/2] arm: Replace test for CONFIG_ARMV7 with CONFIG_CPU_V7

[Albert ARIBAUD]

Hello Marek,

On Tue, 29 Dec 2015 19:44:01 +0100, Marek Vasut  wrote:
> The arch/arm/lib/cache-cp15.c checks for CONFIG_ARMV7 and if this macro is
> set, it configures TTBR0 register. This register must be configured for the
> cache on ARMv7 to operate correctly.
> 
> The problem is that noone actually sets the CONFIG_ARMV7 macro and thus the
> TTBR0 is not configured at all. On SoCFPGA, this produces all sorts of minor
> issues which are hard to replicate, for example certain USB sticks are not
> detected or QSPI NOR sometimes fails to write pages completely.
> 
> The solution is to replace CONFIG_ARMV7 test with CONFIG_CPU_V7 one. This is
> correct because the code which added the test(s) for CONFIG_ARMV7 was added
> shortly after CONFIG_ARMV7 was replaced by CONFIG_CPU_V7 and this code was
> not adjusted correctly to reflect that change.

Analysis of the series shows that:

- it does not change the values of DCACHE_OFF, DCACHE_WRITETHROUGH and
  DCACHE_WRITEBACK;

- it does change the value of DCACHE_WRITEALLOC from 0x16 to 0x101E, but
  DCACHE_WRITEALLOC is only used when CONFIG_SYS_ARM_CACHE_WRITEALLOC is
  defined, which does not happen throughout U-Boot, as shown by a search
  for "WRITEALLOC".

- it sets inner and outer region cache control bits in TTBR0, to match
  the cacheability of the DDR in which the MMU table resides.

Marek performed tests of patch 1/2 only (with the S bit set) and of
the whole series (wih the S bit clear). With patch 1/2 only, Marek could
witness the performance hit described by Stefan Roese; with the whole
series, Marek saw no performance hit any more.

I will therefore take this patch series in, since it fixes an obvious
issue in the U-Boot code and does not show any adverse effect.

Amicalement,
-- 
Albert.
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Re: [U-Boot] [PATCH] nios2: set up the debug UART early

[Chin Liang See]

On Wed, 2015-12-30 at 20:32 +0800, Thomas Chou wrote:
> Set up the debug UART early if enabled, so that it is ready to use.
> 
> Signed-off-by: Thomas Chou 
> ---
>  arch/nios2/cpu/start.S | 7 +++
>  1 file changed, 7 insertions(+)
> 
> 

Acked-by: Chin Liang See 

Thanks
Chin Liang
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[U-Boot] [PATCH v4 2/8] x86: qemu: add a cpu uclass driver for qemu target

[Miao Yan]

Add a cpu uclass driver for qemu. Previously, the qemu
target gets cpu number from board dts files, which are
manually created at compile time. This does not scale
when more cpus are assigned to guest as the dts files
must be modified as well.

This patch adds a cpu uclass driver for qemu targets
to directly read online cpu number from firmware.

Signed-off-by: 
---
 arch/x86/cpu/qemu/Makefile   |  2 +-
 arch/x86/cpu/qemu/cpu.c  | 57 
 arch/x86/dts/qemu-x86_i440fx.dts |  4 +--
 arch/x86/dts/qemu-x86_q35.dts|  4 +--
 4 files changed, 62 insertions(+), 5 deletions(-)
 create mode 100644 arch/x86/cpu/qemu/cpu.c

diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index ad424ec..027a12f 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -7,5 +7,5 @@
 ifndef CONFIG_EFI_STUB
 obj-y += car.o dram.o
 endif
-obj-y += qemu.o fw_cfg.o
+obj-y += qemu.o fw_cfg.o cpu.o
 obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o dsdt.o
diff --git a/arch/x86/cpu/qemu/cpu.c b/arch/x86/cpu/qemu/cpu.c
new file mode 100644
index 000..9bf9a7c
--- /dev/null
+++ b/arch/x86/cpu/qemu/cpu.c
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2015, Miao Yan 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "fw_cfg.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int cpu_qemu_bind(struct udevice *dev)
+{
+   struct cpu_platdata *plat = dev_get_parent_platdata(dev);
+
+   plat->cpu_id = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+ "intel,apic-id", -1);
+
+   return 0;
+}
+
+int cpu_qemu_get_desc(struct udevice *dev, char *buf, int size)
+{
+   if (size < CPU_MAX_NAME_LEN)
+   return -ENOSPC;
+
+   cpu_get_name(buf);
+
+   return 0;
+}
+
+static int cpu_qemu_get_count(struct udevice *dev)
+{
+   return qemu_fwcfg_online_cpus();
+}
+
+static const struct cpu_ops cpu_qemu_ops = {
+   .get_desc   = cpu_qemu_get_desc,
+   .get_count  = cpu_qemu_get_count,
+};
+
+static const struct udevice_id cpu_qemu_ids[] = {
+   { .compatible = "cpu-qemu" },
+   { }
+};
+
+U_BOOT_DRIVER(cpu_qemu_drv) = {
+   .name   = "cpu_qemu",
+   .id = UCLASS_CPU,
+   .of_match   = cpu_qemu_ids,
+   .bind   = cpu_qemu_bind,
+   .ops= _qemu_ops,
+};
diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts
index 8a06229..4332204 100644
--- a/arch/x86/dts/qemu-x86_i440fx.dts
+++ b/arch/x86/dts/qemu-x86_i440fx.dts
@@ -32,14 +32,14 @@
 
cpu@0 {
device_type = "cpu";
-   compatible = "cpu-x86";
+   compatible = "cpu-qemu";
reg = <0>;
intel,apic-id = <0>;
};
 
cpu@1 {
device_type = "cpu";
-   compatible = "cpu-x86";
+   compatible = "cpu-qemu";
reg = <1>;
intel,apic-id = <1>;
};
diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts
index 0b685c8..3e2cfac 100644
--- a/arch/x86/dts/qemu-x86_q35.dts
+++ b/arch/x86/dts/qemu-x86_q35.dts
@@ -43,14 +43,14 @@
 
cpu@0 {
device_type = "cpu";
-   compatible = "cpu-x86";
+   compatible = "cpu-qemu";
reg = <0>;
intel,apic-id = <0>;
};
 
cpu@1 {
device_type = "cpu";
-   compatible = "cpu-x86";
+   compatible = "cpu-qemu";
reg = <1>;
intel,apic-id = <1>;
};
-- 
1.9.1

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[U-Boot] [PATCH v4 0/8] x86: qemu: add fw_cfg interface support for qemu-x86 targets

[Miao Yan]

The fw_cfg interface provided by QEMU allow guests to retrieve various 
information
about the system, e.g. cpu number, variaous firmware data, kernel setup, etc. 
The
fw_cfg interface can be accessed through 3 IO ports (on x86), using x86 in/out
instructions.

  - 0x510: select configuration items to access
  - 0x511: reading this port will return data selected in 0x510 
  - 0x514: this can be used to detect if DMA interface is available

If fw_cfg DMA interface is available, it can be used to accelerate
accesses.

This patchset adds the following supports for qemu-x86 targets: 

  + the fw_cfg driver itself

  + add a U-Boot command 'fw' to support direct accessing kernel informtion
from fw_cfg interface, this saves the time of loading them from hard disk or
network again, through emulated devices.

  + use fw_cfg to get cpu number at runtime, so smp boot no longer relies on
the cpu node hard-coded in dts files.

Changes in v4:
  - drop [PATCH v3 7/8] and limit maximum supported cpu number
  - chance 'fw load' to take second parameter for initrd load address
  - change default initrd load address for qemu-x86

Miao Yan (8):
  x86: qemu: add fw_cfg support
  x86: qemu: add a cpu uclass driver for qemu target
  x86: fix a typo in function name
  x86: use actual CPU number for allocating memory
  x86: qemu: add qemu_fwcfg_fdt_fixup()
  x86: qemu: fix up cpu node in device tree
  x86: qemu: adjust ramdisk load address
  x86: qemu: add documentaion for the fw_cfg interface

 arch/x86/cpu/mp_init.c   |  12 +-
 arch/x86/cpu/qemu/Makefile   |   2 +-
 arch/x86/cpu/qemu/cpu.c  |  57 +++
 arch/x86/cpu/qemu/fw_cfg.c   | 333 +++
 arch/x86/cpu/qemu/fw_cfg.h   | 108 +
 arch/x86/cpu/qemu/qemu.c |   7 +
 arch/x86/dts/qemu-x86_i440fx.dts |  19 +--
 arch/x86/dts/qemu-x86_q35.dts|  19 +--
 doc/README.x86   |  35 +++-
 include/configs/qemu-x86.h   |  13 ++
 10 files changed, 559 insertions(+), 46 deletions(-)
 create mode 100644 arch/x86/cpu/qemu/cpu.c
 create mode 100644 arch/x86/cpu/qemu/fw_cfg.c
 create mode 100644 arch/x86/cpu/qemu/fw_cfg.h

-- 
1.9.1

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Re: [U-Boot] [PATCH v2 0/8] sf: Add flash_ids inside Core

[Jagan Teki]

Hi Bin,

On 30 December 2015 at 10:15, Bin Meng  wrote:
> Hi Jagan,
>
> On Tue, Dec 29, 2015 at 5:49 PM, Jagan Teki  wrote:
>> This series handle flash_ids stuff inside spi_flash core.
>>
>> Changes for v2:
>> - Remove SECT_4K flag for s25fl128s
>>
>> Jagan Teki (8):
>>   sf: Add spi_flash_ids local to core
>>   sf: Rename SST_WR to SST_WRITE
>>   sf: Remove SPI_NOR_DUAL|QUAD_READ
>>   sf: Use sf_params in sandbox
>>   sf: Remove SECT_32K
>>   sf: Add SECT_4K_PMC
>>   sf: Use CONFIG_SPI_FLASH_USE_4K_SECTORS
>>   sf: Fix few naming convension for read modes
>>
>>  drivers/mtd/spi/Makefile  |   4 +-
>>  drivers/mtd/spi/sf_internal.h |   5 +-
>>  drivers/mtd/spi/spi_flash.c   | 446 
>> +++---
>>  include/linux/err.h   |   5 +
>>  4 files changed, 383 insertions(+), 77 deletions(-)
>>
>> --
>
> I will find some time to review and test this series.

Pls- use u-boot-spi/next for testing.

thanks!
-- 
Jagan.
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Re: [U-Boot] [PATCH v5 4/5] mips: ath79: add spi driver

[Antony Pavlov]

On Wed, 30 Dec 2015 01:51:47 +0100
Marek Vasut  wrote:

> On Wednesday, December 30, 2015 at 12:46:23 AM, Thomas Chou wrote:
> > Hi Marek,
> > 
> > On 2015年12月29日 21:25, Marek Vasut wrote:
> > > On Tuesday, December 29, 2015 at 02:00:27 PM, Thomas Chou wrote:
> > >> Hi Wills,
> > >> 
> > >> On 2015年12月29日 19:17, Wills Wang wrote:
> > >>> diff --git a/arch/mips/mach-ath79/Kconfig
> > >>> b/arch/mips/mach-ath79/Kconfig index 1d92a5b..b5668e9 100644
> > >>> --- a/arch/mips/mach-ath79/Kconfig
> > >>> +++ b/arch/mips/mach-ath79/Kconfig
> > >>> @@ -15,6 +15,7 @@ config SOC_AR933X
> > >>> 
> > >>> select SYS_MIPS_CACHE_INIT_RAM_LOAD
> > >>> select MIPS_TUNE_24KC
> > >>> select AR933X_UART
> > >>> 
> > >>> +   select ATH79_SPI
> > >> 
> > >> Both AR933X_UART and ATH79_SPI should not be selected with mach Kconfig.
> > >> They should go with board defconfig.
> > >> 
> > >>> diff --git a/drivers/spi/ath79_spi.c b/drivers/spi/ath79_spi.c
> > >>> 
> > >>> +static inline void ath79_spi_delay(int max_hz)
> > >>> +{
> > >>> +   uint64_t tick = get_tbclk();
> > >>> +
> > >>> +   do_div(tick, max_hz);
> > >>> +   tick = get_ticks() + tick + 1;  /* get current timestamp */
> > >>> +   while (get_ticks() < tick)  /* loop till event */
> > >>> +/*NOP*/;
> > >>> +}
> > >> 
> > >> Use udelay() instead.
> > > 
> > > You mean get_timer() based delay loop, yes ?
> > 
> > Sorry, my mistake. Just realized that we don't have nano delay yet. The
> > code above is fine.
> 
> Just skimming through the code, it seems like bitbanging the SPI using the
> generic soft-spi driver might be easier ;-/

AR9331 SPI controller has special shift register for reading received data,
so you have no need in reading every single receiving MISO bit with separate
gpio access, this can give a small speedup. Next, in openwrt tree there is
a dirty-hacky ath79-spi linux kernel patch for very impressive SPI flash
read speedup (2 MiB/s instead of 20 KiB/s, I have no precise bandwidth
results at the moment).
So for better performance it is reasonable to have separate ath79-spi driver.

-- 
Best regards,
  Antony Pavlov
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Re: [U-Boot] [PATCH v3 7/8] x86: reserve more spaces for dtb

[Miao Yan]

Hi Bin,

2015-12-30 12:04 GMT+08:00 Bin Meng :
> Hi Miao,
>
> On Tue, Dec 29, 2015 at 6:35 PM, Miao Yan  wrote:
>> Reserve more spaces for x86 dtb files. Otherwise when booting
>> on qemu targets, fixing 'cpu' node may fail due to lack
>> of space left in dtb.
>>
>> Signed-off-by: Miao Yan 
>> ---
>>  arch/x86/dts/Makefile | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile
>> index 64e5694..753e8fa 100644
>> --- a/arch/x86/dts/Makefile
>> +++ b/arch/x86/dts/Makefile
>> @@ -15,7 +15,7 @@ dtb-y += bayleybay.dtb \
>>
>>  targets += $(dtb-y)
>>
>> -DTC_FLAGS += -R 4 -p 0x1000
>> +DTC_FLAGS += -R 4 -p 0x3000
>
> This changes bloat the code size too much. It increase 8KB to all the
> x86 dtb files. Is there another way to fix this?

I'll drop this patch, and mention that we support 32 cpus in the
document, since increasing dtb size for all x86 targets isn't
desirable.




>
>>
>>  PHONY += dtbs
>>  dtbs: $(addprefix $(obj)/, $(dtb-y))
>> --
>
> Regards,
> Bin
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Re: [U-Boot] [PATCH v3 8/8] x86: qemu: add documentaion for the fw_cfg interface

[Miao Yan]

Hi Bin,

2015-12-30 12:04 GMT+08:00 Bin Meng :
> Hi Miao,
>
> On Tue, Dec 29, 2015 at 6:35 PM, Miao Yan  wrote:
>> Document the usage of 'fw' command
>>
>> Signed-off-by: Miao Yan 
>> ---
>> Changes in v2:
>>   - various cleanup
>>
>>  doc/README.x86 | 36 +---
>>  1 file changed, 33 insertions(+), 3 deletions(-)
>>
>> diff --git a/doc/README.x86 b/doc/README.x86
>> index 1271e5e..0687dc1 100644
>> --- a/doc/README.x86
>> +++ b/doc/README.x86
>> @@ -295,9 +295,39 @@ show QEMU's VGA console window. Note this will disable 
>> QEMU's serial output.
>>  If you want to check both consoles, use '-serial stdio'.
>>
>>  Multicore is also supported by QEMU via '-smp n' where n is the number of 
>> cores
>> -to instantiate. Currently the default U-Boot built for QEMU supports 2 
>> cores.
>> -In order to support more cores, you need add additional cpu nodes in the 
>> device
>> -tree and change CONFIG_MAX_CPUS accordingly.
>> +to instantiate. U-Boot uses fw_cfg interface provided by QEMU to detect 
>> certain
>> +system information, such as cpu number, so 'n' can be any number allowed by
>> +QEMU.
>> +
>> +The fw_cfg interface in QEMU also provides information about kernel data, 
>> initrd
>> +,command-line arguments and more. U-Boot supports directly accessing these 
>> informtion
>> +from fw_cfg interface, this saves the time of loading them from hard disk or
>> +network again, through emulated devices. To use it , simply providing them 
>> in
>> +QEMU command line:
>> +
>> +$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 -kernel 
>> /path/to/bzImage
>> +-append 'root=/dev/sda1 console=ttyS0' -initrd /path/to/initrd -smp 8
>> +
>> +Note: -initrd and -smp are both optional
>> +
>> +Then start QEMU, in U-Boot command line use the following U-Boot command to 
>> setup kernel:
>> +
>> + => fw
>> +fw - QEMU firmware interface
>> +
>> +Usage:
>> +fw 
>> +- list: print firmware(s) currently loaded
>> +- cpus: print online cpu number
>> +- load  : load kernel (if any) to address 
>> +
>> +=> fw load
>> +loading kernel to address 0100, initrd 015dd010
>> +
>> +Here the kernel (bzImage) is loaded to 0100 and initrd is to 0x15dd010. 
>> Then, 'zboot'
>> +can be used to boot the kernel:
>> +
>> +=> zboot 0100 - 015dd010
>
> This still does not work. The last parameter (initrd_size) should not
> be omitted. Please enhance the 'fw load' command to print out the
> initrd size.

OK.

>
> Did you test the initrd? Kernel does not boot with initird, showing
>
> [3.092767] Unpacking initramfs...
> [3.094766] Initramfs unpacking failed: junk in compressed archive


Seems the default load address is overwritten during the process, which
somehow impacts initramfs.

I will change that to 0200 by default, and also initrd_start needs
to be page size aligned. I'll fix that too.


>
>>
>>  CPU Microcode
>>  -
>> --
>
> Regards,
> Bin
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Re: [U-Boot] [Patch V3] i2c: mxc: add a condition in case the parameter is NULL

[Qianyu Gong]

Hi Stefano,

Could you please help to merge this patch? Thanks very much.

Regards,
Qianyu

> -Original Message-
> From: Qianyu Gong
> Sent: Monday, December 21, 2015 1:42 PM
> To: h...@denx.de; Gong Qianyu-B52263 
> Cc: u-boot@lists.denx.de; Stefano Babic 
> Subject: RE: [U-Boot] [Patch V3] i2c: mxc: add a condition in case the 
> parameter is
> NULL
> 
> 
> 
> > -Original Message-
> > From: Heiko Schocher [mailto:h...@denx.de]
> > Sent: Friday, December 18, 2015 6:24 PM
> > To: Gong Qianyu-B52263
> > Cc: u-boot@lists.denx.de; Stefano Babic
> > Subject: Re: [U-Boot] [Patch V3] i2c: mxc: add a condition in case the
> > parameter is NULL
> >
> > Hello Gong Qianyu,
> >
> > added Stefano Babic to cc as he is the imx maintainer.
> >
> > Am 18.12.2015 um 10:38 schrieb Gong Qianyu:
> > > This could avoid executing the code that only applies to i.MX platforms.
> > >
> > > The bus_i2c_init() is called before relocation and will assgin value
> > > to a static variable. If U-Boot is then still running in a flash
> > > device, it's theoretically not allowed to write data to flash
> > > without an erasing operation. For i.MX platforms, the U-Boot is
> > > always running in DDR.
> > >
> > > Actually it causes asynchronous error when the ARM64 system error
> > > report is enabled and the flash write protect is set.
> > >
> > > Signed-off-by: Gong Qianyu 
> > > ---
> > > V3:
> > >   - Sorry..Remove an unrelated line in other file.
> > >
> > >   drivers/i2c/mxc_i2c.c | 12 ++--
> > >   1 file changed, 10 insertions(+), 2 deletions(-)
> >
> > Ok, from my side, but it would be better to switch your board(s) to
> > support DM and get rid of this old stuff from this driver.
> >
> > Reviewed-by: Heiko Schocher 
> >
> > bye,
> > Heiko
> 
> Thanks. But I have no control over this driver. Maybe they are considering to
> convert it later.
> 
> Regards,
> Qianyu
> 
> > >
> > > diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index
> > > fa4c82f..b2d15c9 100644
> > > --- a/drivers/i2c/mxc_i2c.c
> > > +++ b/drivers/i2c/mxc_i2c.c
> > > @@ -581,8 +581,16 @@ void bus_i2c_init(int index, int speed, int unused,
> > >   return;
> > >   }
> > >
> > > - mxc_i2c_buses[index].idle_bus_fn = idle_bus_fn;
> > > - mxc_i2c_buses[index].idle_bus_data = idle_bus_data;
> > > + /*
> > > +  * Warning: Be careful to allow the assignment to a static
> > > +  * variable here. This function could be called while U-Boot is
> > > +  * still running in flash memory. So such assignment is equal
> > > +  * to write data to flash without erasing.
> > > +  */
> > > + if (idle_bus_fn)
> > > + mxc_i2c_buses[index].idle_bus_fn = idle_bus_fn;
> > > + if (idle_bus_data)
> > > + mxc_i2c_buses[index].idle_bus_data = idle_bus_data;
> > >
> > >   ret = enable_i2c_clk(1, index);
> > >   if (ret < 0) {
> > >
> >
> > --
> > DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [U-Boot] [PATCH 0/3] This series adds support for fastboot related to USB.

[Lukasz Majewski]

Hi Frank

>  [PATCH 1/3] Modified the check condition for max packet size of
> ep_in in high speed
> 
>  [PATCH 2/3] Fixed the error that the last packet transmission could
> not be terminated
> 
>  [PATCH 3/3] Add usb phy control to support fastboot for rk3036
> 
>  Tested on RK3036 SDK board, it works Okay.

I'm out of office till the beginning of Jan 2016.

I will review and read your logs (with the max packet problem) when I
come back.

> 
>  board/evb_rk3036/evb_rk3036/evb_rk3036.c   |   30 +
>  drivers/usb/gadget/Makefile|1 +
>  drivers/usb/gadget/dwc2_udc_otg.c  |4 +--
>  drivers/usb/gadget/dwc2_udc_otg_regs.h |5 +++
>  drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c |2 +-
>  drivers/usb/gadget/rk_otg_phy.c|   48
> 
> include/configs/rk3036_common.h|   20  7
> files changed, 107 insertions(+), 3 deletions(-) create mode 100644
> drivers/usb/gadget/rk_otg_phy.c
> 

Best regards,
Lukasz Majewski


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Re: [U-Boot] [PATCH v2 0/8] sf: Add flash_ids inside Core

[Mugunthan V N]

On Tuesday 29 December 2015 03:19 PM, Jagan Teki wrote:
> This series handle flash_ids stuff inside spi_flash core.
> 
> Changes for v2:
>   - Remove SECT_4K flag for s25fl128s
> 
> Jagan Teki (8):
>   sf: Add spi_flash_ids local to core
>   sf: Rename SST_WR to SST_WRITE
>   sf: Remove SPI_NOR_DUAL|QUAD_READ
>   sf: Use sf_params in sandbox
>   sf: Remove SECT_32K
>   sf: Add SECT_4K_PMC
>   sf: Use CONFIG_SPI_FLASH_USE_4K_SECTORS
>   sf: Fix few naming convension for read modes
> 
>  drivers/mtd/spi/Makefile  |   4 +-
>  drivers/mtd/spi/sf_internal.h |   5 +-
>  drivers/mtd/spi/spi_flash.c   | 446 
> +++---
>  include/linux/err.h   |   5 +
>  4 files changed, 383 insertions(+), 77 deletions(-)
> 

Tested this series on AM437x SK and DRA74 EVM.

Tested-by: Mugunthan V N 

Regards
Mugunthan V N
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[U-Boot] Pull request: u-boot-spi/next

[Jagan Teki]

Hi Tom,

Please pull this PR.

thanks!
Jagan.

The following changes since commit 312db9f75f50b339310474d72c8524cef2bd7931:

  armv7: omap-common: Rework SPL board_mmc_init() (2015-12-14 13:42:54 -0500)

are available in the git repository at:

  git://git.denx.de/u-boot-spi.git master

for you to fetch changes up to 25aade812e40f2e869575199c64e35ebcdf5554b:

  defconfig: am437x_sk_evm: enable spi driver model (2015-12-29 13:27:46 +0530)


Jagan Teki (24):
  sf: Get spi locally from spi_flash
  spi: make mode visible to both dm and non-dm
  spi: Use mode instead of op_mode_tx
  spi: Rename SPI_TX_BP|QPP to SPI_TX_BYTE|QUAD
  sf: Move spi_read_cmds_array locally
  sf: Rename spi_flash_set_* functions
  sf: Rename bank_end to bar_end in read_bar
  sf: Remove spi_flash_remove
  sf: Minor cleanup
  sf: Use BIT macro
  sf: Fix quad bit set for micron devices
  sf: Read back and check once spansion quad bit set
  sf: Read back and check once macronix quad bit set
  sf: Write quad bit along with read status
  spi: Remove SPI_OPM_RX_EXTN
  spi: Remove SPI_OPM_RX_DIO|QIOF
  spi: Rename SPI_OPM_RX_* to SPI_RX_*
  spi: Rename op_mode_rx to mode_rx
  spi: Move flags macro's to spi_slave{} members
  spi: Fix bit assignment with flags
  spi: Use BIT macro
  spi: Minor cleanup
  sf: Make IO modes at last in read modes
  spi: Add SPI_TX_DUAL mode

Mugunthan V N (17):
  drivers: spi: ti_qspi: do not hard code chip select for memory map 
configuration
  drivers: spi:ti_qspi: change ti_qspi_slave to ti_qspi_priv for driver 
model conversion
  drivers: spi: ti_qspi: prepare driver for DM conversion
  dm: core: Add a new api to get indexed device address
  spi: Add support for dual and quad mode
  dra7xx_evm: qspi: do not define DM_SPI and DM_SPI_FLASH for spl
  dts: dra7: add spi alias for qspi
  drivers: spi: ti_qspi: convert driver to adopt device driver model
  arm: dts: dra7: add qspi register maps for memory map and control module
  arm: dts: am437x-gp-evm: add spi-flash comaptible for flash
  arm: dts: dra7-evm: add spi-flash comaptible for flash
  arm: dts: dra72-evm: add spi-flash comaptible for flash
  defconfig: dra72_evm: enable spi driver model
  defconfig: dra74_evm: enable spi driver model
  am43xx_evm: qspi: do not define DM_SPI and DM_SPI_FLASH for spl
  arm: dts: am4372: add qspi register maps for memory map
  defconfig: am437x_sk_evm: enable spi driver model

 arch/arm/dts/am4372.dtsi|   5 +-
 arch/arm/dts/am437x-sk-evm.dts  |   2 +-
 arch/arm/dts/dra7-evm.dts   |   2 +-
 arch/arm/dts/dra7.dtsi  |   8 +-
 arch/arm/dts/dra72-evm.dts  |   2 +-
 configs/am437x_sk_evm_defconfig |   3 +
 configs/dra72_evm_defconfig |   2 +
 configs/dra74_evm_defconfig |   2 +
 drivers/core/device.c   |  31 ++-
 drivers/mtd/spi/sf-uclass.c |   7 +-
 drivers/mtd/spi/sf_internal.h   |  55 +++--
 drivers/mtd/spi/sf_probe.c  |   2 +-
 drivers/mtd/spi/spi_flash.c | 185 +-
 drivers/spi/ich.c   |   4 +-
 drivers/spi/spi-uclass.c|  38 ++-
 drivers/spi/ti_qspi.c   | 524 
 include/configs/am43xx_evm.h|   2 +
 include/configs/dra7xx_evm.h|   5 +
 include/dm/device.h |  11 +
 include/spi.h   |  75 +++---
 include/spi_flash.h |   2 -
 21 files changed, 667 insertions(+), 300 deletions(-)
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Re: [U-Boot] [PATCH v3 1/8] x86: qemu: add fw_cfg support

[Miao Yan]

Hi Bin,

2015-12-30 12:04 GMT+08:00 Bin Meng :
> Hi Miao,
>
> On Tue, Dec 29, 2015 at 6:35 PM, Miao Yan  wrote:
>> The QEMU fw_cfg interface allows the guest to retrieve various
>> data information from QEMU. For example, APCI/SMBios tables, number
>> of online cpus, kernel data and command line, etc.
>>
>> This patch adds support for QEMU fw_cfg interface.
>>
>> Signed-off-by: Miao Yan 
>> ---
>> Changes in v2:
>>   - rewrite command handling logic
>>   - various cleanups
>>
>> Changes in v3:
>>   - fix an error in do_qemu_fw()
>>
>>  arch/x86/cpu/qemu/Makefile |   2 +-
>>  arch/x86/cpu/qemu/fw_cfg.c | 241 
>> +
>>  arch/x86/cpu/qemu/fw_cfg.h |  97 ++
>>  arch/x86/cpu/qemu/qemu.c   |   3 +
>>  4 files changed, 342 insertions(+), 1 deletion(-)
>>  create mode 100644 arch/x86/cpu/qemu/fw_cfg.c
>>  create mode 100644 arch/x86/cpu/qemu/fw_cfg.h
>>
>> diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
>> index 3f3958a..ad424ec 100644
>> --- a/arch/x86/cpu/qemu/Makefile
>> +++ b/arch/x86/cpu/qemu/Makefile
>> @@ -7,5 +7,5 @@
>>  ifndef CONFIG_EFI_STUB
>>  obj-y += car.o dram.o
>>  endif
>> -obj-y += qemu.o
>> +obj-y += qemu.o fw_cfg.o
>>  obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o dsdt.o
>> diff --git a/arch/x86/cpu/qemu/fw_cfg.c b/arch/x86/cpu/qemu/fw_cfg.c
>> new file mode 100644
>> index 000..bb6a11e
>> --- /dev/null
>> +++ b/arch/x86/cpu/qemu/fw_cfg.c
>> @@ -0,0 +1,241 @@
>> +/*
>> + * (C) Copyright 2015 Miao Yan 
>> + *
>> + * SPDX-License-Identifier:GPL-2.0+
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include "fw_cfg.h"
>> +
>> +static bool fwcfg_present;
>> +static bool fwcfg_dma_present;
>> +
>> +static void qemu_fwcfg_read_entry_pio(uint16_t entry,
>> +   uint32_t size, void *address)
>> +{
>> +   uint32_t i = 0;
>> +   uint8_t *data = address;
>> +
>> +   if (entry != FW_CFG_INVALID)
>
> As we discussed in the v1 thread, can you please put a comment block
> here to describe the QEMU internals (ie: what happens if entry ==
> FW_CFG_INVALID)?
>
>> +   outw(entry, FW_CONTROL_PORT);
>> +   while (size--)
>> +   data[i++] = inb(FW_DATA_PORT);
>> +}
>> +
>> +static void qemu_fwcfg_read_entry_dma(uint16_t entry,
>> +   uint32_t size, void *address)
>> +{
>> +   struct fw_cfg_dma_access dma;
>> +
>> +   dma.length = cpu_to_be32(size);
>> +   dma.address = cpu_to_be64((uintptr_t)address);
>> +   dma.control = cpu_to_be32(FW_CFG_DMA_READ);
>> +   if (entry != FW_CFG_INVALID)
>
> ditto.
>
>> +   dma.control |= cpu_to_be32(FW_CFG_DMA_SELECT | (entry << 
>> 16));
>> +
>> +   barrier();
>> +
>> +   debug("qemu_fwcfg_dma_read_entry: addr %p, length %u control 0x%x\n",
>> + address, size, be32_to_cpu(dma.control));
>> +
>> +   outl(cpu_to_be32((uint32_t)), FW_DMA_PORT_HIGH);
>> +
>> +   while (dma.control & ~FW_CFG_DMA_ERROR)
>> +   __asm__ __volatile__ ("pause");
>
> For some reason, with the v3 patch U-Boot hangs here. I changed to use
> pio to read the entry then U-Boot can boot. Can you please check this?

Removing some checks in v3 exposed a bug with older qemu versions. I'll
fix this.


>
>> +}
>> +
>> +static bool qemu_fwcfg_present(void)
>> +{
>> +   uint32_t qemu;
>> +
>> +   qemu_fwcfg_read_entry_pio(FW_CFG_SIGNATURE, 4, );
>> +   return be32_to_cpu(qemu) == QEMU_FW_CFG_SIGNATURE;
>> +}
>> +
>> +static bool qemu_fwcfg_dma_present(void)
>> +{
>> +   uint8_t dma_enabled;
>> +
>> +   qemu_fwcfg_read_entry_pio(FW_CFG_ID, 1, _enabled);
>> +   if (dma_enabled & FW_CFG_DMA_ENABLED)
>> +   return 1;
>
> return true;
>
>> +
>> +   return 0;
>
> return false;
>
>> +}
>> +
>> +static void qemu_fwcfg_read_entry(uint16_t entry,
>> +   uint32_t length, void *address)
>> +{
>> +   if (fwcfg_dma_present)
>> +   qemu_fwcfg_read_entry_dma(entry, length, address);
>> +   else
>> +   qemu_fwcfg_read_entry_pio(entry, length, address);
>> +}
>> +
>> +int qemu_fwcfg_online_cpus(void)
>> +{
>> +   uint16_t nb_cpus;
>> +
>> +   if (!fwcfg_present)
>> +   return 1;
>> +
>> +   qemu_fwcfg_read_entry(FW_CFG_NB_CPUS, 2, _cpus);
>> +
>> +   return le16_to_cpu(nb_cpus);
>> +}
>> +
>> +static int qemu_fwcfg_setup_kernel(void *load_addr)
>> +{
>> +   char *data_addr;
>> +   uint32_t setup_size, kernel_size, cmdline_size, initrd_size;
>> +
>> +   qemu_fwcfg_read_entry(FW_CFG_SETUP_SIZE, 4, _size);
>> +   qemu_fwcfg_read_entry(FW_CFG_KERNEL_SIZE, 4, _size);
>> +
>> +   if (setup_size == 0 || kernel_size == 0) {
>> +   printf("warning: no kernel available\n");
>> +   return -1;
>> +   }
>> +
>> +   data_addr = load_addr;
>> +   

Re: [U-Boot] [PATCH v5 4/5] mips: ath79: add spi driver

[Marek Vasut]

On Wednesday, December 30, 2015 at 09:32:52 AM, Antony Pavlov wrote:
> On Wed, 30 Dec 2015 01:51:47 +0100
> 
> Marek Vasut  wrote:
> > On Wednesday, December 30, 2015 at 12:46:23 AM, Thomas Chou wrote:
> > > Hi Marek,
> > > 
> > > On 2015年12月29日 21:25, Marek Vasut wrote:
> > > > On Tuesday, December 29, 2015 at 02:00:27 PM, Thomas Chou wrote:
> > > >> Hi Wills,
> > > >> 
> > > >> On 2015年12月29日 19:17, Wills Wang wrote:
> > > >>> diff --git a/arch/mips/mach-ath79/Kconfig
> > > >>> b/arch/mips/mach-ath79/Kconfig index 1d92a5b..b5668e9 100644
> > > >>> --- a/arch/mips/mach-ath79/Kconfig
> > > >>> +++ b/arch/mips/mach-ath79/Kconfig
> > > >>> @@ -15,6 +15,7 @@ config SOC_AR933X
> > > >>> 
> > > >>>   select SYS_MIPS_CACHE_INIT_RAM_LOAD
> > > >>>   select MIPS_TUNE_24KC
> > > >>>   select AR933X_UART
> > > >>> 
> > > >>> + select ATH79_SPI
> > > >> 
> > > >> Both AR933X_UART and ATH79_SPI should not be selected with mach
> > > >> Kconfig. They should go with board defconfig.
> > > >> 
> > > >>> diff --git a/drivers/spi/ath79_spi.c b/drivers/spi/ath79_spi.c
> > > >>> 
> > > >>> +static inline void ath79_spi_delay(int max_hz)
> > > >>> +{
> > > >>> + uint64_t tick = get_tbclk();
> > > >>> +
> > > >>> + do_div(tick, max_hz);
> > > >>> + tick = get_ticks() + tick + 1;  /* get current timestamp */
> > > >>> + while (get_ticks() < tick)  /* loop till event */
> > > >>> +  /*NOP*/;
> > > >>> +}
> > > >> 
> > > >> Use udelay() instead.
> > > > 
> > > > You mean get_timer() based delay loop, yes ?
> > > 
> > > Sorry, my mistake. Just realized that we don't have nano delay yet. The
> > > code above is fine.
> > 
> > Just skimming through the code, it seems like bitbanging the SPI using
> > the generic soft-spi driver might be easier ;-/
> 
> AR9331 SPI controller has special shift register for reading received data,
> so you have no need in reading every single receiving MISO bit with
> separate gpio access, this can give a small speedup. Next, in openwrt tree
> there is a dirty-hacky ath79-spi linux kernel patch for very impressive
> SPI flash read speedup (2 MiB/s instead of 20 KiB/s, I have no precise
> bandwidth results at the moment).
> So for better performance it is reasonable to have separate ath79-spi
> driver.

OK

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/2] spl: dm: Add SPL_DM_SEQ_ALIAS config option

[Marek Vasut]

On Wednesday, December 30, 2015 at 06:52:24 AM, Nathan Rossi wrote:
[...]
> > TBH I don't think this is the best solution. We should select things
> > which are required all the time. For zynq case this selection is
> > necessary just for qspi boot mode. There are other boot modes which
> > doesn't require it that's why for these mods this is just additional
> > code. If you think that this is need/good to select by default for your
> > SoC then this can be done separately.
> 
> Sorry for the slow response/follow up on this.
> 
> So as I understand it makes sense for this to be configured slightly
> differently depending on when the boot options that need this are
> available. I guess this also makes sense as SPI is not the only user
> of the seq alias feature.
> 
> I am sorting out v2 of this series for the additional patches to add
> the config for socfpga and mvebu, just want to clarify that this would
> be the preferred way (given recent comments) to enable it for the
> corresponding platforms:
>  * socfpga -> enable in each defconfig

If the feature is imperative for the platform to work, just enable it in
Kconfig too, just like on mvebu.

>  * mvebu -> enable in arch/arm/Kconfig for ARCH_MVEBU (aka auto selecting)
> 
> > Note: Agree with Marek that will be good to check where exactly the
> > problem is that this config option is necessary to enable even for case
> > where only on qspi is in the system.
> 
> I had a bit of a look into this, it would require changes to allow for
> it to fall-back to finding and using the first device which is matched
> for the uclass (instead of relying on just CONFIG_SF_DEFAULT_BUS), it
> would probably be an intrusive change to sf-uclass. A simpler solution
> might be to just default seq numbers to 0 when seq alias is not
> enabled? would allow for the change to work with other uclasses that
> use seq alias.
> 
> Regards,
> Nathan
> 
> > Acked-by: Michal Simek 
> > 
> > Thanks,
> > Michal

Best regards,
Marek Vasut
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Re: [U-Boot] Pull request: u-boot-spi/next

[Jagan Teki]

Tom,

Please note that subject shows u-boot-spi/next but it actually
u-boot-spi/master and of course PR shows the repo as master (not
next).

On 30 December 2015 at 16:01, Jagan Teki  wrote:
> Hi Tom,
>
> Please pull this PR.
>
> thanks!
> Jagan.
>
> The following changes since commit 312db9f75f50b339310474d72c8524cef2bd7931:
>
>   armv7: omap-common: Rework SPL board_mmc_init() (2015-12-14 13:42:54 -0500)
>
> are available in the git repository at:
>
>   git://git.denx.de/u-boot-spi.git master
>
> for you to fetch changes up to 25aade812e40f2e869575199c64e35ebcdf5554b:
>
>   defconfig: am437x_sk_evm: enable spi driver model (2015-12-29 13:27:46 
> +0530)
>
> 
> Jagan Teki (24):
>   sf: Get spi locally from spi_flash
>   spi: make mode visible to both dm and non-dm
>   spi: Use mode instead of op_mode_tx
>   spi: Rename SPI_TX_BP|QPP to SPI_TX_BYTE|QUAD
>   sf: Move spi_read_cmds_array locally
>   sf: Rename spi_flash_set_* functions
>   sf: Rename bank_end to bar_end in read_bar
>   sf: Remove spi_flash_remove
>   sf: Minor cleanup
>   sf: Use BIT macro
>   sf: Fix quad bit set for micron devices
>   sf: Read back and check once spansion quad bit set
>   sf: Read back and check once macronix quad bit set
>   sf: Write quad bit along with read status
>   spi: Remove SPI_OPM_RX_EXTN
>   spi: Remove SPI_OPM_RX_DIO|QIOF
>   spi: Rename SPI_OPM_RX_* to SPI_RX_*
>   spi: Rename op_mode_rx to mode_rx
>   spi: Move flags macro's to spi_slave{} members
>   spi: Fix bit assignment with flags
>   spi: Use BIT macro
>   spi: Minor cleanup
>   sf: Make IO modes at last in read modes
>   spi: Add SPI_TX_DUAL mode
>
> Mugunthan V N (17):
>   drivers: spi: ti_qspi: do not hard code chip select for memory map 
> configuration
>   drivers: spi:ti_qspi: change ti_qspi_slave to ti_qspi_priv for driver 
> model conversion
>   drivers: spi: ti_qspi: prepare driver for DM conversion
>   dm: core: Add a new api to get indexed device address
>   spi: Add support for dual and quad mode
>   dra7xx_evm: qspi: do not define DM_SPI and DM_SPI_FLASH for spl
>   dts: dra7: add spi alias for qspi
>   drivers: spi: ti_qspi: convert driver to adopt device driver model
>   arm: dts: dra7: add qspi register maps for memory map and control module
>   arm: dts: am437x-gp-evm: add spi-flash comaptible for flash
>   arm: dts: dra7-evm: add spi-flash comaptible for flash
>   arm: dts: dra72-evm: add spi-flash comaptible for flash
>   defconfig: dra72_evm: enable spi driver model
>   defconfig: dra74_evm: enable spi driver model
>   am43xx_evm: qspi: do not define DM_SPI and DM_SPI_FLASH for spl
>   arm: dts: am4372: add qspi register maps for memory map
>   defconfig: am437x_sk_evm: enable spi driver model
>
>  arch/arm/dts/am4372.dtsi|   5 +-
>  arch/arm/dts/am437x-sk-evm.dts  |   2 +-
>  arch/arm/dts/dra7-evm.dts   |   2 +-
>  arch/arm/dts/dra7.dtsi  |   8 +-
>  arch/arm/dts/dra72-evm.dts  |   2 +-
>  configs/am437x_sk_evm_defconfig |   3 +
>  configs/dra72_evm_defconfig |   2 +
>  configs/dra74_evm_defconfig |   2 +
>  drivers/core/device.c   |  31 ++-
>  drivers/mtd/spi/sf-uclass.c |   7 +-
>  drivers/mtd/spi/sf_internal.h   |  55 +++--
>  drivers/mtd/spi/sf_probe.c  |   2 +-
>  drivers/mtd/spi/spi_flash.c | 185 +-
>  drivers/spi/ich.c   |   4 +-
>  drivers/spi/spi-uclass.c|  38 ++-
>  drivers/spi/ti_qspi.c   | 524 
> 
>  include/configs/am43xx_evm.h|   2 +
>  include/configs/dra7xx_evm.h|   5 +
>  include/dm/device.h |  11 +
>  include/spi.h   |  75 +++---
>  include/spi_flash.h |   2 -
>  21 files changed, 667 insertions(+), 300 deletions(-)

thanks!
-- 
Jagan.
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Re: [U-Boot] [PATCH v2 8/8] sf: Fix few naming convension for read modes

[Mugunthan V N]

On Tuesday 29 December 2015 03:19 PM, Jagan Teki wrote:
> spi_read_cmds =>  read_mode
> e_rd_cmd => flash_read
> spi_read_cmds_array => flash_read_cmd
> 
> All these are flash specific notation used in spi_flash
> core hence renamed to proper naming convensions related
> to flash.

$sub and commit: s/convension/convention

Regards
Mugunthan V N
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[U-Boot] [PATCH v2] Fix GCC format-security errors and convert sprintfs.

[ben . whitten]

From: Ben Whitten 

With format-security errors turned on, GCC picks up the use of sprintf with
a format parameter not being a string literal.

Simple uses of sprintf are also converted to use strcpy.

Signed-off-by: Ben Whitten 
---
Changes for v2:
- Replaced single string uses of sprintf with strcpy
- Detected more occurrences of potential errors.

 arch/mips/mach-au1x00/au1x00_eth.c  |  2 +-
 arch/powerpc/cpu/mpc8260/ether_scc.c|  2 +-
 arch/powerpc/cpu/mpc8xx/fec.c   |  2 +-
 arch/powerpc/cpu/mpc8xx/scc.c   |  2 +-
 arch/powerpc/cpu/mpc8xx/video.c |  4 ++--
 board/freescale/b4860qds/eth_b4860qds.c |  8 
 board/freescale/corenet_ds/eth_hydra.c  |  2 +-
 board/freescale/corenet_ds/eth_superhydra.c |  2 +-
 board/freescale/ls1021aqds/eth.c|  2 +-
 board/freescale/ls1043aqds/eth.c|  2 +-
 board/freescale/ls2080aqds/eth.c|  2 +-
 board/freescale/t102xqds/eth_t102xqds.c |  2 +-
 board/freescale/t1040qds/eth.c  |  2 +-
 board/freescale/t208xqds/eth_t208xqds.c |  2 +-
 board/freescale/t4qds/eth.c |  2 +-
 board/gdsys/common/ihs_mdio.c   |  2 +-
 board/keymile/common/common.c   |  4 ++--
 board/mpl/common/common_util.c  |  8 
 board/samsung/universal_c210/universal.c|  4 ++--
 board/siemens/rut/board.c   |  2 +-
 board/vscom/baltos/board.c  |  2 +-
 common/cmd_elf.c| 13 -
 common/cmd_mtdparts.c   |  2 +-
 common/cmd_nvedit.c |  2 +-
 disk/part_dos.c |  4 ++--
 disk/part_efi.c |  2 +-
 disk/part_iso.c |  2 +-
 drivers/block/sata_dwc.c|  4 ++--
 drivers/net/altera_tse.c|  2 +-
 drivers/net/at91_emac.c |  2 +-
 drivers/net/ax88180.c   |  2 +-
 drivers/net/cpsw.c  |  2 +-
 drivers/net/davinci_emac.c  |  2 +-
 drivers/net/designware.c|  2 +-
 drivers/net/dm9000x.c   |  2 +-
 drivers/net/fm/memac_phy.c  |  2 +-
 drivers/net/fm/tgec_phy.c   |  2 +-
 drivers/net/fsl_mdio.c  |  2 +-
 drivers/net/ftgmac100.c |  2 +-
 drivers/net/ftmac100.c  |  2 +-
 drivers/net/greth.c |  4 ++--
 drivers/net/keystone_net.c  |  2 +-
 drivers/net/ldpaa_eth/ldpaa_eth.c   |  4 ++--
 drivers/net/lpc32xx_eth.c   |  2 +-
 drivers/net/mpc512x_fec.c   |  2 +-
 drivers/net/mpc5xxx_fec.c   |  2 +-
 drivers/net/mvgbe.c |  2 +-
 drivers/net/ne2000_base.c   |  2 +-
 drivers/net/pch_gbe.c   |  2 +-
 drivers/net/sh_eth.c|  2 +-
 drivers/net/tsec.c  |  2 +-
 drivers/usb/gadget/f_fastboot.c |  6 +++---
 include/configs/tam3517-common.h|  2 +-
 scripts/kconfig/mconf.c |  2 +-
 54 files changed, 76 insertions(+), 73 deletions(-)

diff --git a/arch/mips/mach-au1x00/au1x00_eth.c 
b/arch/mips/mach-au1x00/au1x00_eth.c
index d6ebe07..3f9f91e 100644
--- a/arch/mips/mach-au1x00/au1x00_eth.c
+++ b/arch/mips/mach-au1x00/au1x00_eth.c
@@ -279,7 +279,7 @@ int au1x00_enet_initialize(bd_t *bis){

memset(dev, 0, sizeof *dev);

-   sprintf(dev->name, "Au1X00 ethernet");
+   strcpy(dev->name, "Au1X00 ethernet");
dev->iobase = 0;
dev->priv   = 0;
dev->init   = au1x00_init;
diff --git a/arch/powerpc/cpu/mpc8260/ether_scc.c 
b/arch/powerpc/cpu/mpc8260/ether_scc.c
index 5ba8bed..fff8f2b 100644
--- a/arch/powerpc/cpu/mpc8260/ether_scc.c
+++ b/arch/powerpc/cpu/mpc8260/ether_scc.c
@@ -355,7 +355,7 @@ int mpc82xx_scc_enet_initialize(bd_t *bis)
dev = (struct eth_device *) malloc(sizeof *dev);
memset(dev, 0, sizeof *dev);

-   sprintf(dev->name, "SCC");
+   strcpy(dev->name, "SCC");
dev->init   = sec_init;
dev->halt   = sec_halt;
dev->send   = sec_send;
diff --git a/arch/powerpc/cpu/mpc8xx/fec.c b/arch/powerpc/cpu/mpc8xx/fec.c
index 2e19603..ea4ab3a 100644
--- a/arch/powerpc/cpu/mpc8xx/fec.c
+++ b/arch/powerpc/cpu/mpc8xx/fec.c
@@ -148,7 +148,7 @@ int fec_initialize(bd_t *bis)
/* for FEC1 make sure that the name of the interface is the same
   as the old one for compatibility reasons */
if (i == 0) {
-   sprintf (dev->name, "FEC");
+   strcpy(dev->name, "FEC");
} else {
sprintf (dev->name, "FEC%d",

[U-Boot] [PATCH] nios2: set up the debug UART early

[Thomas Chou]

Set up the debug UART early if enabled, so that it is ready to use.

Signed-off-by: Thomas Chou 
---
 arch/nios2/cpu/start.S | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/nios2/cpu/start.S b/arch/nios2/cpu/start.S
index 54787c5..1caee0c 100644
--- a/arch/nios2/cpu/start.S
+++ b/arch/nios2/cpu/start.S
@@ -106,6 +106,13 @@ _reloc:
stw r0, 4(sp)
mov fp, sp
 
+#ifdef CONFIG_DEBUG_UART
+   /* Set up the debug UART */
+   movhi   r2, %hi(debug_uart_init@h)
+   ori r2, r2, %lo(debug_uart_init@h)
+   callr   r2
+#endif
+
/* Allocate and zero GD, update SP */
mov r4, sp
movhi   r2, %hi(board_init_f_mem@h)
-- 
2.5.0

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