From: Rick Chen
This patch will fix prior_stage_fdt_address write failure problem, when
AE350 was booting from flash.
When AE350 was booting from falsh, prior_stage_fdt_address will be in
flash address, we shall avoid it to be written.
Signed-off-by: Rick Chen
Cc: Greentime Hu
---
From: Rick Chen
When AE350 was booting from ram, use CONFIG_OF_PRIOR_STAGE instead
of CONFIG_OF_BOARD.
Signed-off-by: Rick Chen
Cc: Greentime Hu
---
configs/ae350_rv32_defconfig | 2 +-
configs/ae350_rv64_defconfig | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git
On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han wrote:
>
> Modify the Freescale ESPI driver to support the driver model.
> Also resolved the following problems:
>
> = WARNING ==
> This board does not use CONFIG_DM_SPI. Please update
> the board before v2019.04
Hi Stefano,
On Mon, Apr 15, 2019 at 5:16 AM Stefano Babic wrote:
> On 15/04/19 10:02, jorisoffouga wrote:
> > Hi Stefano
> >
> > I think this series should be applied for 2019.04 ?
>
>
> 2019.04 is out, this goes to 2019.07
It seems this series was missed in your first pull request to Tom?
On Wed, Apr 24, 2019 at 1:00 AM Jun Nie wrote:
>
> Copy device tree files from Linux directly.
>
> Signed-off-by: Jun Nie
There is a series from Joris that does the pico-mx7d DM conversion.
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Currently packet data is wrongly extracted when metadata is NULL.
Fix it and negate the if check.
Signed-off-by: Keerthy
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/ti/k3-udma.c
Hi Peng,
Yes, this works.
Best regards,
Sven
> On 24 Apr 2019, at 10:59, Peng Fan wrote:
>
>
>
>> -Original Message-
>> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Peng Fan
>> Sent: 2019年4月24日 16:57
>> To: Sven Schwermer ; Marcel Ziswiler
>>
>> Cc: Marek Vasut ;
> Subject: Re: [RFC PATCH v3] usb: limit USB_MAX_XFER_BLK to 256
>
> Hi Peng,
>
> Yes, this works.
Thanks for verification, so it is same issue.
Thanks,
Peng.
>
> Best regards,
> Sven
>
> > On 24 Apr 2019, at 10:59, Peng Fan wrote:
> >
> >
> >
> >> -Original Message-
> >> From:
Signed-off-by: Priyanka Jain
Signed-off-by: Sriram Dash
Signed-off-by: Ashish Kumar
Signed-off-by: Rajat Srivastava
---
v3: No change. Rebased to top.
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 6 ++
1 file changed, 6 insertions(+)
diff --git
Enable AHB support for Flexspi controller interface meaning
memory can be accessed via md command using absolute addresses
Signed-off-by: Yogesh Gaur
Signed-off-by: Ashish Kumar
Signed-off-by: Rajat Srivastava
---
v4:
- Remove unnecessary dependencies of FSPI_AHB_EN_4BYTE config
- Enable
On 4/23/19 5:02 PM, Tom Rini wrote:
> On Tue, Apr 23, 2019 at 04:55:00PM -0500, Dinh Nguyen wrote:
>> Hi,
>>
>> This is V4 of the series to add a UCLASS_CACHE dm driver to handling
>> the configuration of cache settings. Place this new driver under
>> /drivers/cache. In this initial revision,
Patch series to support for ROHM BD71837 and BD71847 PMICs.
ROHM BD71837 and BD71847 is PMIC intended for powering single-core,
dual-core, and quad-core SoC’s such as NXP-i.MX 8M. BD71847 is used
for example on NXP imx8mm EVK.
Series adds PMIC driver with register read and write support, and
https://source.codeaurora.org/external/imx/uboot-imx
cherry picked, styled and merged commits:
- MLK-18387 pmic: Add pmic driver for BD71837: e9a3bec2e95a
- MLK-18590 pmic: bd71837: Change to use new fdt API: acdc5c297a96
Signed-off-by: Ye Li
Signed-off-by: Matti Vaittinen
---
Changelog v1 =>
BD71837 and BD71847 is PMIC intended for powering single-core,
dual-core, and quad-core SoC’s such as NXP-i.MX 8M. BD71847
is used for example on NXP imx8mm EVK.
Add regulator driver for ROHM BD71837 and BD71847 PMICs.
BD71837 contains 8 bucks and 7 LDOS. BD71847 is reduced
version containing 6
Maximum write size in a single write operation in
spi_nor_write_data() function can be equal to slave
tx buffer, which is adjusted in spi_mem_adjust_op_size()
and write operation gets fragmented.
Previously data write for the above fragmentation
didn't incorporate write enable and status checks.
Signed-off-by: Ashish Kumar
Signed-off-by: Rajat Srivastava
---
drivers/spi/fsl_qspi.c | 38 +-
1 file changed, 25 insertions(+), 13 deletions(-)
diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index 1598c4f698..1d26c6344b 100644
---
From: Ashish Kumar
Signed-off-by: Ashish Kumar
---
drivers/mtd/spi/spi-nor-ids.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index ec929760ee..a89c1910d9 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++
Signed-off-by: Rajat Srivastava
---
configs/ls1046aqds_qspi_defconfig | 1 +
configs/ls1046aqds_sdcard_qspi_defconfig| 1 +
configs/ls1046aqds_tfa_defconfig| 1 +
configs/ls1046ardb_emmc_defconfig | 1 +
Signed-off-by: Rajat Srivastava
---
configs/ls2080aqds_nand_defconfig | 1 +
configs/ls2080aqds_qspi_defconfig | 1 +
configs/ls2080aqds_sdcard_defconfig | 1 +
configs/ls2081ardb_defconfig | 1 +
configs/ls2088ardb_qspi_SECURE_BOOT_defconfig |
From: Ashish Kumar
Signed-off-by: Ashish Kumar
Signed-off-by: Rajat Srivastava
---
configs/ls1088aqds_qspi_SECURE_BOOT_defconfig| 1 +
configs/ls1088aqds_qspi_defconfig| 1 +
configs/ls1088aqds_sdcard_qspi_defconfig | 1 +
On 4/24/19 1:56 PM, Peng Fan wrote:
> Update the mmc maintainer from Jaehoon to me.
>
> Cc: Jaehoon Chung
> Signed-off-by: Peng Fan
Acked-by: Marek Vasut
> ---
> MAINTAINERS| 2 +-
> doc/git-mailrc | 3 ++-
> 2 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/MAINTAINERS
On Wed, Apr 24, 2019 at 07:32:14AM -0500, Dinh Nguyen wrote:
>
>
> On 4/23/19 5:02 PM, Tom Rini wrote:
> > On Tue, Apr 23, 2019 at 04:55:00PM -0500, Dinh Nguyen wrote:
> >> Hi,
> >>
> >> This is V4 of the series to add a UCLASS_CACHE dm driver to handling
> >> the configuration of cache
Some Freescale QSPI controllers require driver to send only 16 bytes
aligned data to TxFIFO while performing flash write operation. The extra
data is not actually written on flash. The patch enables driver to send
16 bytes aligned data to TxFIFO, provided the config is enabled.
The reason behind
From: Ashish Kumar
Enable config in LS2088A boards to send only 16 bytes aligned
data to TxFIFO while writing to flash.
Signed-off-by: Rajat Srivastava
Signed-off-by: Ashish Kumar
---
configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 1 +
configs/ls2088ardb_qspi_defconfig | 1 +
2
From: Ashish Kumar
This config makes driver send only 16 bytes aligned data
to TxFIFO while writing on flash.
Signed-off-by: Rajat Srivastava
Signed-off-by: Ashish Kumar
---
drivers/spi/Kconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/spi/Kconfig
From: Ashish Kumar
Enable config in LS2080A boards to send only 16 bytes aligned
data to TxFIFO while writing to flash.
Signed-off-by: Rajat Srivastava
Signed-off-by: Ashish Kumar
---
configs/ls2080aqds_nand_defconfig | 1 +
configs/ls2080aqds_qspi_defconfig | 1 +
From: Ashish Kumar
Enable config in LS1088A boards to send only 16 bytes aligned
data to TxFIFO while writing to flash.
Signed-off-by: Rajat Srivastava
Signed-off-by: Ashish Kumar
---
configs/ls1088aqds_qspi_SECURE_BOOT_defconfig| 1 +
configs/ls1088aqds_qspi_defconfig
Enable config in LS1088A boards to send only 16 bytes aligned
data to TxFIFO while writing to flash.
Signed-off-by: Pankit Garg
Signed-off-by: Rajat Srivastava
---
configs/ls1088ardb_tfa_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/ls1088ardb_tfa_defconfig
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