Re: [U-Boot] [PATCH 013/126] dm: test: Correct a stray backslash in dm_test_destroy()

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> This should perhaps be a period but it is not necessary. Remove it.
>
> Signed-off-by: Simon Glass 
> ---
>
>  test/dm/test-main.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/test/dm/test-main.c b/test/dm/test-main.c
> index 74f77ccc849..c944ab9c5f2 100644
> --- a/test/dm/test-main.c
> +++ b/test/dm/test-main.c
> @@ -64,7 +64,7 @@ static int dm_test_destroy(struct unit_test_state *uts)
>
> /*
>  * If the uclass doesn't exist we don't want to create it. So
> -* check that here before we call uclass_find_device()/
> +* check that here before we call uclass_find_device()

I tend to use a period since it's a complete sentence.

>  */
> uc = uclass_find(id);
> if (!uc)
> --

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH V2 1/3] watchdog: designware: Migrate CONFIG_DESIGNWARE_WATCHDOG to Kconfig

2019-10-04 Thread Marek Vasut
On 10/4/19 10:59 AM, Ley Foon Tan wrote:
> On Thu, Oct 3, 2019 at 9:00 PM Marek Vasut wrote:
>>
>> Migrate CONFIG_DESIGNWARE_WATCHDOG to Kconfig and update the headers
>> accordingly, no functional change. The S10 enables the WDT only in
>> SPL, but does not enable it in U-Boot itself, hence disable it in
>> the config again.
>> ---
>> V2: Use non-DM watchdog in SPL on S10
>> ---
>>  configs/socfpga_stratix10_defconfig   | 1 +
>>  configs/socfpga_vining_fpga_defconfig | 1 +
> 
> All socfpga deconfig files need to add CONFIG_DESIGNWARE_WATCHDOG too.
> socfpga_common.h is used by Gen5 and A10 platform.

Only those which defined CONFIG_HW_WATCHDOG need to enable the
CONFIG_DESIGNWARE_WATCHDOG, right ? (see below)

[...]

>> diff --git a/include/configs/socfpga_common.h 
>> b/include/configs/socfpga_common.h
>> index b11fe021a7..32b9131be0 100644
>> --- a/include/configs/socfpga_common.h
>> +++ b/include/configs/socfpga_common.h
>> @@ -104,12 +104,9 @@
>>  /*
>>   * L4 Watchdog
>>   */
>> -#ifdef CONFIG_HW_WATCHDOG
>> -#define CONFIG_DESIGNWARE_WATCHDOG
>>  #define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
>>  #define CONFIG_DW_WDT_CLOCK_KHZ25000
>>  #define CONFIG_WATCHDOG_TIMEOUT_MSECS  3
>> -#endif

[...]
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Re: [U-Boot] [PATCH] MAINTAINERS, git-mailrc: Update the maintainer for socfpga

2019-10-04 Thread Marek Vasut
On 10/4/19 10:43 AM, Ley Foon Tan wrote:
> This updates MAINTAINERS and git-mailrc to add me as maintainer for
> socfpga.
> 
> Signed-off-by: Ley Foon Tan 

Acked-by: Marek Vasut 
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Re: [U-Boot] [PATCH 007/126] dm: test: Fix running of multiple test from command line

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> At present when multiple 'ut dm' commands are executed, all but the first
> is run with a flat tree, even if live tree is enabled. This is because the
> live tree node pointer is set to NULL and never restored.
>
> This does not affect normal test running, which just runs all the test in
> one go, but can be confusing when several individual tests are run during
> the same U-Boot run.
>
> Correct this by restoring the pointer.
>
> Fixes: c166c47ba3 (dm: test: Add support for running tests with livetree)
> Signed-off-by: Simon Glass 
> ---
>
>  test/dm/test-main.c | 6 +-
>  1 file changed, 5 insertions(+), 1 deletion(-)
>

Reviewed-by: Bin Meng 
Tested-by: Bin Meng 
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Re: [U-Boot] [PATCH V2 2/3] watchdog: designware: Convert to DM and DT probing

2019-10-04 Thread Ley Foon Tan
On Thu, Oct 3, 2019 at 9:00 PM Marek Vasut  wrote:
>
> Convert the designware watchdog timer driver to DM and add DT probing
> support. Perform minor coding style clean up, like drop superfluous
> braces. There ought to be no functional change.

All watchdog DT nodes with compatible "snps,dw-wdt" need to add
"u-boot,dm-pre-reloc;".

>
> Signed-off-by: Marek Vasut 
> Cc: Chin Liang See 
> Cc: Dalon Westergreen 
> Cc: Dinh Nguyen 
> Cc: Jagan Teki 
> Cc: Ley Foon Tan 
> Cc: Philipp Tomisch 
> Cc: Simon Goldschmidt 
> Cc: Tien Fong Chee 
> ---
> V2: - Support both DM and non-DM probing
> - Fix watchdog stop handling by setting CR bit
> ---
>  configs/socfpga_stratix10_defconfig   |   2 +
>  configs/socfpga_vining_fpga_defconfig |   1 +

Same here. All socfpga defconfig files need to add CONFIG_WDT.

>  drivers/watchdog/Kconfig  |   2 +-
>  drivers/watchdog/designware_wdt.c | 122 ++
>  include/configs/socfpga_stratix10_socdk.h |   1 +
>  5 files changed, 104 insertions(+), 24 deletions(-)
>
> diff --git a/configs/socfpga_stratix10_defconfig 
> b/configs/socfpga_stratix10_defconfig
> index 462082b67b..752fa545bd 100644
> --- a/configs/socfpga_stratix10_defconfig
> +++ b/configs/socfpga_stratix10_defconfig
> @@ -57,3 +57,5 @@ CONFIG_DM_USB=y
>  CONFIG_USB_DWC2=y
>  CONFIG_USB_STORAGE=y
>  CONFIG_DESIGNWARE_WATCHDOG=y
> +CONFIG_WDT=y
> +# CONFIG_SPL_WDT is not set
> diff --git a/configs/socfpga_vining_fpga_defconfig 
> b/configs/socfpga_vining_fpga_defconfig
> index 03c43fa8b9..def7a3eca7 100644
> --- a/configs/socfpga_vining_fpga_defconfig
> +++ b/configs/socfpga_vining_fpga_defconfig
> @@ -91,4 +91,5 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525
>  CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
>  CONFIG_USB_GADGET_DWC2_OTG=y
>  CONFIG_USB_GADGET_DOWNLOAD=y
> +CONFIG_WDT=y
>  CONFIG_DESIGNWARE_WATCHDOG=y
> diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
> index 6fd9b0a177..bfb91af947 100644
> --- a/drivers/watchdog/Kconfig
> +++ b/drivers/watchdog/Kconfig
> @@ -38,7 +38,7 @@ config ULP_WATCHDOG
>
>  config DESIGNWARE_WATCHDOG
> bool "Designware watchdog timer support"
> -   select HW_WATCHDOG
> +   select HW_WATCHDOG if !WDT
> help
>Enable this to support Designware Watchdog Timer IP, present e.g.
>on Altera SoCFPGA SoCs.
> diff --git a/drivers/watchdog/designware_wdt.c 
> b/drivers/watchdog/designware_wdt.c
> index c668567c66..a7b735979a 100644
> --- a/drivers/watchdog/designware_wdt.c
> +++ b/drivers/watchdog/designware_wdt.c
> @@ -4,7 +4,8 @@
>   */
>
>  #include 
> -#include 
> +#include 
> +#include 
>  #include 
>  #include 
>
> @@ -17,46 +18,51 @@
>  #define DW_WDT_CR_RMOD_VAL 0x00
>  #define DW_WDT_CRR_RESTART_VAL 0x76
>
> +struct designware_wdt_priv {
> +   void __iomem*base;
> +};
> +
>  /*
>   * Set the watchdog time interval.
>   * Counter is 32 bit.
>   */
> -static int designware_wdt_settimeout(unsigned int timeout)
> +static int designware_wdt_settimeout(void __iomem *base, unsigned int 
> clk_khz,
> +unsigned int timeout)
>  {
> signed int i;
>
> /* calculate the timeout range value */
> -   i = (log_2_n_round_up(timeout * CONFIG_DW_WDT_CLOCK_KHZ)) - 16;
> -   if (i > 15)
> -   i = 15;
> -   if (i < 0)
> -   i = 0;
> +   i = log_2_n_round_up(timeout * clk_khz) - 16;
> +   i = clamp(i, 0, 15);
> +
> +   writel(i | (i << 4), base + DW_WDT_TORR);
>
> -   writel((i | (i << 4)), (CONFIG_DW_WDT_BASE + DW_WDT_TORR));
> return 0;
>  }
>
> -static void designware_wdt_enable(void)
> +static void designware_wdt_enable(void __iomem *base)
>  {
> -   writel(((DW_WDT_CR_RMOD_VAL << DW_WDT_CR_RMOD_OFFSET) |
> - (0x1 << DW_WDT_CR_EN_OFFSET)),
> - (CONFIG_DW_WDT_BASE + DW_WDT_CR));
> +   writel((DW_WDT_CR_RMOD_VAL << DW_WDT_CR_RMOD_OFFSET) |
> +   BIT(DW_WDT_CR_EN_OFFSET),
> +   base + DW_WDT_CR);
>  }
>
> -static unsigned int designware_wdt_is_enabled(void)
> +static unsigned int designware_wdt_is_enabled(void __iomem *base)
>  {
> -   unsigned long val;
> -   val = readl((CONFIG_DW_WDT_BASE + DW_WDT_CR));
> -   return val & 0x1;
> +   return readl(base + DW_WDT_CR) & BIT(0);
>  }
>
> -#if defined(CONFIG_HW_WATCHDOG)
> -void hw_watchdog_reset(void)
> +static void designware_wdt_reset_common(void __iomem *base)
>  {
> -   if (designware_wdt_is_enabled())
> +   if (designware_wdt_is_enabled(base))
> /* restart the watchdog counter */
> -   writel(DW_WDT_CRR_RESTART_VAL,
> -  (CONFIG_DW_WDT_BASE + DW_WDT_CRR));
> +   writel(DW_WDT_CRR_RESTART_VAL, base + DW_WDT_CRR);
> +}
> +
> +#if !CONFIG_IS_ENABLED(WDT)
> +void hw_watchdog_reset(void)
> +{
> +   designware_wdt_reset_common((void __iomem *)CONFIG_DW_WDT_BASE);
>  }
>
>  void 

[U-Boot] [PATCH 1/2] mx28evk: README: Fix location for the generic mxs README

2019-10-04 Thread Fabio Estevam
doc/README.mxs no longer exists. It has been renamed doc/imx/common/mxs.txt,
so fix the mx28evk README accordingly.

Signed-off-by: Fabio Estevam 
---
 board/freescale/mx28evk/README | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/freescale/mx28evk/README b/board/freescale/mx28evk/README
index b8bee8931c..d32f0efb33 100644
--- a/board/freescale/mx28evk/README
+++ b/board/freescale/mx28evk/README
@@ -58,5 +58,5 @@ It is possible to solder a SOIC memory on U49 or use a DIP8 
on J89.
 To get SPI communication to work R320, R321,R322 and C178 need to be populated.
 Look in the schematics for the proper component values.
 
-Follow the instructions from doc/README.mxs to generate a bootable SD card or
-to generate a binary to be flashed into SPI NOR.
+Follow the instructions from doc/imx/common/mxs.txt to generate a bootable
+SD card or to generate a binary to be flashed into SPI NOR.
-- 
2.17.1

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[U-Boot] [PATCH 2/2] imx: mxs: Fix location for the elftosb tool

2019-10-04 Thread Fabio Estevam
The Denx FTP location is no longer reachable.

Switch to the Timesys repository instead.

Signed-off-by: Fabio Estevam 
---
 doc/imx/common/mxs.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/doc/imx/common/mxs.txt b/doc/imx/common/mxs.txt
index e23ab9cc6d..372062c0ea 100644
--- a/doc/imx/common/mxs.txt
+++ b/doc/imx/common/mxs.txt
@@ -57,7 +57,7 @@ writing of this document, that is "10.12.01". To obtain the 
file from command
 line, use:
 
$ VER="10.12.01"
-   $ wget ftp://ftp.denx.de/pub/tools/elftosb-${VER}.tar.gz
+   $ wget 
http://repository.timesys.com/buildsources/e/elftosb/elftosb-10.12.01/elftosb-${VER}.tar.gz
 
 Extract the file:
 
-- 
2.17.1

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[U-Boot] [PATCH] MAINTAINERS, git-mailrc: Update the maintainer for socfpga

2019-10-04 Thread Ley Foon Tan
This updates MAINTAINERS and git-mailrc to add me as maintainer for
socfpga.

Signed-off-by: Ley Foon Tan 
---
 MAINTAINERS| 1 +
 doc/git-mailrc | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index e752e4b3de..a9a1049eaf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -111,6 +111,7 @@ F:  cmd/arm/
 ARM ALTERA SOCFPGA
 M: Marek Vasut 
 M: Simon Goldschmidt 
+M: Ley Foon Tan 
 S: Maintainted
 T: git https://gitlab.denx.de/u-boot/custodians/u-boot-socfpga.git
 F: arch/arm/mach-socfpga/
diff --git a/doc/git-mailrc b/doc/git-mailrc
index 6f383b1f60..fdfec85928 100644
--- a/doc/git-mailrc
+++ b/doc/git-mailrc
@@ -28,6 +28,7 @@ alias jaehoonJaehoon Chung 
 alias jagan  Jagan Teki 
 alias jhersh Joe Hershberger 
 alias kevery Kever Yang 
+alias leyfoonLey Foon Tan 
 alias lukma  Lukasz Majewski 
 alias macpaulMacpaul Lin 
 alias marex  Marek Vasut 
@@ -66,7 +67,7 @@ alias s3csamsung
 alias s5pc   samsung
 alias samsunguboot, prom
 alias snapdragon uboot, mateusz
-alias socfpgauboot, marex, dinh, simongoldschmidt
+alias socfpgauboot, marex, dinh, simongoldschmidt, leyfoon
 alias sunxi  uboot, jagan, maxime
 alias tegra  uboot, sjg, Tom Warren , Stephen 
Warren 
 alias tegra2 tegra
-- 
2.19.0

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Re: [U-Boot] [PATCH] efi_loader: device_path: allow for arbitrary length of file path

2019-10-04 Thread Heinrich Schuchardt

On 10/4/19 6:45 AM, AKASHI Takahiro wrote:

This patch will lift the upper limit of maximum path length.

Signed-off-by: AKASHI Takahiro 


Thanks for addressing this issue.

Please, have a look at the side effects to our implementation of the
device path to text protocol. Here I assumed that a device node is at
most 512 bytes long. This will no longer hold true after your patch.

I think we should fix the device path to text protocol first before
merging this patch.


---
  lib/efi_loader/efi_device_path.c | 8 +---
  1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
index 86297bb7c116..13a2b5e29db1 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -1017,8 +1017,7 @@ efi_status_t efi_dp_from_name(const char *dev, const char 
*devnr,
struct blk_desc *desc = NULL;
disk_partition_t fs_partition;
int part = 0;
-   char filename[32] = { 0 }; /* dp->str is u16[32] long */
-   char *s;
+   char *filename, *s;


Below we are replacing slashes '/' by backslashes '\'. So shouldn't this
variable be called filepath?



if (path && !file)
return EFI_INVALID_PARAMETER;
@@ -1042,13 +1041,16 @@ efi_status_t efi_dp_from_name(const char *dev, const 
char *devnr,
if (!path)
return EFI_SUCCESS;

-   snprintf(filename, sizeof(filename), "%s", path);
+   filename = strdup(path);


Windows has a maximum file path length of 260 characters. Can we assume
in EFI that a path has a maximum length of 260 characters too?

At least we must ensure that the node length does not exceed 65535
bytes, the maximum possible value in the node length field.

Best regards

Heinrich


+   if (!filename)
+   return EFI_OUT_OF_RESOURCES;
/* DOS style file path: */
s = filename;
while ((s = strchr(s, '/')))
*s++ = '\\';
*file = efi_dp_from_file(((!is_net && device) ? desc : NULL),
 part, filename);
+   free(filename);

return EFI_SUCCESS;
  }



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Re: [U-Boot] [PATCH 020/126] sandbox: pci: Drop the get_devfn() method

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> This method is not used anymore since the bus/device/function of PCI
> devices can be obtained from their (parent's per-child) platform data.
> Drop it.
>
> Signed-off-by: Simon Glass 
> ---
>
>  drivers/misc/swap_case.c | 8 
>  include/pci.h| 7 ---
>  2 files changed, 15 deletions(-)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH 019/126] sandbox: swap_case: Use statics where possible

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> Some functions and a struct should be marked static since they are not
> used outside this file. Update them.
>
> Signed-off-by: Simon Glass 
> ---
>
>  drivers/misc/swap_case.c | 10 +-
>  1 file changed, 5 insertions(+), 5 deletions(-)
>

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Re: [U-Boot] [PATCH 017/126] sandbox: Rename PCI ID for swap_case to be more specific

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> Rename this ID to SANDBOX_PCI_SWAP_CASE_EMUL_ID since it is more
> descriptive and allows us to add new PCI emulators without any conflict or
> confusion.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/sandbox/include/asm/test.h | 2 +-
>  drivers/misc/swap_case.c| 5 +++--
>  test/dm/pci.c   | 6 +++---
>  3 files changed, 7 insertions(+), 6 deletions(-)
>

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Re: [U-Boot] [PATCH 015/126] sandbox: spmi: Add ranges property for address translation

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> At present address translation does not work since there is no ranges
> property in the spmi nodes. Add empty ranges properties and a little more
> logging so that this shows the error:
>
>/tmp/b/sandbox/u-boot -d /tmp/b/sandbox/arch/sandbox/dts/test.dtb \
> -c "ut dm spmi_access_peripheral" -L7 -v
>...
>pm8916_gpio_probe() bad address: returning err=-22
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/sandbox/dts/test.dts  |  2 ++
>  drivers/gpio/pm8916_gpio.c | 12 ++--
>  2 files changed, 8 insertions(+), 6 deletions(-)
>

Reviewed-by: Bin Meng 
Tested-by: Bin Meng 
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Re: [U-Boot] [PATCH 018/126] sandbox: Add support for clrsetio_32() and friends

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> These functions are available on x86 but not sandbox. They are useful
> shortcuts and clarify the code, so add them to sandbox.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/sandbox/include/asm/io.h | 42 ++-
>  arch/sandbox/lib/pci_io.c | 12 +-
>  2 files changed, 42 insertions(+), 12 deletions(-)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH 024/126] sandbox: pci: Increase the memory space

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> Increase the memory space so we can support the p2sb bus which needs
> multiples of 1MB.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/sandbox/dts/test.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

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Re: [U-Boot] [PATCH 016/126] sandbox: mmc: Fix up MMC emulator for valgrind

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> At present running sandbox with valgrind produces some warnings due to the
> MMC emulator not filling in all the expected fields. Fix it.
>
> Signed-off-by: Simon Glass 
> ---
>
>  drivers/mmc/sandbox_mmc.c | 4 
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/mmc/sandbox_mmc.c b/drivers/mmc/sandbox_mmc.c
> index 2fa7d8c3dcd..7ca8da0946c 100644
> --- a/drivers/mmc/sandbox_mmc.c
> +++ b/drivers/mmc/sandbox_mmc.c
> @@ -27,6 +27,7 @@ static int sandbox_mmc_send_cmd(struct udevice *dev, struct 
> mmc_cmd *cmd,
>  {
> switch (cmd->cmdidx) {
> case MMC_CMD_ALL_SEND_CID:
> +   memset(cmd->response, '\0', 16);

sizeof(cmd->response)

> break;
> case SD_CMD_SEND_RELATIVE_ADDR:
> cmd->response[0] = 0 << 16; /* mmc->rca */
> @@ -43,11 +44,14 @@ static int sandbox_mmc_send_cmd(struct udevice *dev, 
> struct mmc_cmd *cmd,
> case MMC_CMD_SEND_CSD:
> cmd->response[0] = 0;
> cmd->response[1] = 10 << 16;/* 1 << block_len */
> +   cmd->response[2] = 0;
> +   cmd->response[3] = 0;
> break;
> case SD_CMD_SWITCH_FUNC: {
> if (!data)
> break;
> u32 *resp = (u32 *)data->dest;
> +   resp[3] = 0;
> resp[7] = cpu_to_be32(SD_HIGHSPEED_BUSY);
> if ((cmd->cmdarg & 0xF) == UHS_SDR12_BUS_SPEED)
> resp[4] = (cmd->cmdarg & 0xF) << 24;
> --

Reviewed-by: Bin Meng 
Tested-by: Bin Meng 
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Re: [U-Boot] [PATCH 021/126] sandbox: net: Suppress the MAC-address warnings

2019-10-04 Thread Bin Meng
Hi Simon,

On Sat, Oct 5, 2019 at 10:16 AM Bin Meng  wrote:
>
> Hi Simon,
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
> >
> > These warnings appear every thing sandbox is run (see below) and dwarf the
> > actual useful output. Suppress them.
> >
> > Hopefully at some point a way can be found to fix the root cause.
>
> Does removing ethaddr env from SANDBOX_ETH_SETTINGS in sandbox.h fix
> this problem?

I was able to reproduce this, and confirmed that removing ethaddr*
envs from SANDBOX_ETH_SETTINGS in sandbox.h could fix the issue you
were seeing.

Regards,
Bin
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Re: [U-Boot] [PATCH 021/126] sandbox: net: Suppress the MAC-address warnings

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> These warnings appear every thing sandbox is run (see below) and dwarf the
> actual useful output. Suppress them.
>
> Hopefully at some point a way can be found to fix the root cause.
>
> U-Boot 2019.10-rc2
>
> Model: sandbox
> DRAM:  128 MiB
>
> Warning: host_lo MAC addresses don't match:
> Address in ROM is  a6:28:b7:47:28:93
> Address in environment is  00:00:11:22:33:44
>
> Warning: host_enp5s0 MAC addresses don't match:
> Address in ROM is  a6:28:b7:47:28:93
> Address in environment is  00:00:11:22:33:45
>
> Warning: host_eth6 using MAC address from ROM
>
> Warning: host_docker0 MAC addresses don't match:
> Address in ROM is  a6:28:b7:47:28:93
> Address in environment is  00:00:11:22:33:46
>
> Warning: host_docker_gwbridge using MAC address from ROM

I am not sure how to reproduce this. Joe, do you know anything?

>
> Warning: host_veth1118e68 MAC addresses don't match:
> Address in ROM is  a6:28:b7:47:28:93
> Address in environment is  00:00:11:22:33:47
> WDT:   Not found!
> MMC:
> In:cros-ec-keyb
> Out:   vidconsole
> Err:   vidconsole
> Model: sandbox
> SCSI:
> Net:   eth0: host_lo, eth1: host_enp5s0, eth2: host_eth6, eth3: host_docker0, 
> eth4: host_docker_gwbridge, eth5: host_veth1118e68
> Error: eth@10002000 address not set.
> , eth-1: eth@10002000
> Test 'pmc_base' not found
>
> Warning: host_lo MAC addresses don't match:
> Address in ROM is  2a:24:9a:31:90:f8
> Address in environment is  00:00:11:22:33:44
>
> Warning: host_enp5s0 MAC addresses don't match:
> Address in ROM is  ce:23:d9:74:6f:6c
> Address in environment is  00:00:11:22:33:45
>
> Warning: host_eth6 using MAC address from ROM
>
> Warning: host_docker0 MAC addresses don't match:
> Address in ROM is  ee:22:1c:3b:be:bc
> Address in environment is  00:00:11:22:33:46
>
> Warning: host_docker_gwbridge using MAC address from ROM
>
> Warning: host_veth1118e68 MAC addresses don't match:
> Address in ROM is  ae:20:9e:3d:a4:9f
> Address in environment is  00:00:11:22:33:47
>
> Signed-off-by: Simon Glass 
> ---
>
>  net/eth-uclass.c | 34 ++
>  1 file changed, 22 insertions(+), 12 deletions(-)
>

Regards,
Bin
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Re: [U-Boot] [PATCH 023/126] sandbox: Add a -T flag to use the test device tree

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> U-Boot already supports using -D to indicate that it should use the normal
> device tree. It is sometimes useful to run with the test device tree, e.g.
> when running a test. Add a -T option for this along with some
> documentation.
>
> It can be used like this:
>
>/tmp/b/sandbox/u-boot -T -c "ut dm pci_busdev"
>
> (this will use /tmp/b/sandbox/arch/sandbox/dts/test.dtb as the DT)
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/sandbox/cpu/start.c | 25 +
>  doc/arch/sandbox.rst |  9 +
>  2 files changed, 34 insertions(+)
>

Reviewed-by: Bin Meng 
Tested-by: Bin Meng 
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Re: [U-Boot] [PATCH 026/126] pci: sandbox: Move the emulators into their own node

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> Sandbox i2c works using emulation drivers which are currently children of

pci

> the i2c device:

pci

>
> pci-controller {
> pci@1f,0 {
> compatible = "pci-generic";
> reg = <0xf800 0 0 0 0>;
> emul@1f,0 {
> compatible = "sandbox,swap-case";
> };
> };
> };
>
> In this case the emulation device is attached to pci device on address
> f800 (device 1f, function 0) and provides the swap-case functionality.
>
> However this is not ideal, since every device on a PCI bus has a child
> device. This is only really the case for sandbox, but we want to avoid
> special-case code for sandbox.
>
> Worse, child devices cannot be probed before their parents. This forces
> us to use 'find' rather than 'get' to obtain the emulator device. In fact
> the emulator devices are never probed. There is code in
> sandbox_pci_emul_post_probe() which tries to track when emulators are
> active, but at present this does not work.
>
> A better approach seems to be to add a separate node elsewhere in the
> device tree, an 'emulation parent'. This could be given a bogus address
> (such as -1) to hide the emulators away from the 'pci' command, but it
> seems better to keep it at the root node to avoid such hacks.
>
> Then we can use a phandle to point from the  evice to the correct

typo: device


> emulator, and only on sandbox. The code to find an emulator does not
> interfere with normal pci operation.
>
> Add a new UCLASS_PCI_EMUL_PARENT uclass which allows finding an emulator
> given a bus, and finding a bus given an emulator. Update the existing
> device trees and the code for finding an emulator.
>
> This brings PCI emulators more into line with I2C.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/sandbox/dts/sandbox.dtsi | 11 +++---
>  arch/sandbox/dts/test.dts | 38 +++
>  doc/driver-model/pci-info.rst | 23 +++--
>  drivers/pci/pci-emul-uclass.c | 37 --
>  include/dm/uclass-id.h|  1 +
>  5 files changed, 77 insertions(+), 33 deletions(-)
>
> diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi
> index c6d5650c20b..f09bc70b0da 100644
> --- a/arch/sandbox/dts/sandbox.dtsi
> +++ b/arch/sandbox/dts/sandbox.dtsi
> @@ -103,9 +103,14 @@
> pci@1f,0 {
> compatible = "pci-generic";
> reg = <0xf800 0 0 0 0>;
> -   emul@1f,0 {
> -   compatible = "sandbox,swap-case";
> -   };
> +   sandbox,emul = <_case_emul>;
> +   };
> +   };
> +
> +   emul {
> +   compatible = "sandbox,pci-emul-parent";
> +   swap_case_emul: emul@1f,0 {
> +   compatible = "sandbox,swap-case";
> };
> };
>
> diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
> index 5669ede7051..a2e75981f0b 100644
> --- a/arch/sandbox/dts/test.dts
> +++ b/arch/sandbox/dts/test.dts
> @@ -452,24 +452,31 @@
> pci@0,0 {
> compatible = "pci-generic";
> reg = <0x 0 0 0 0>;
> -   emul@0,0 {
> -   compatible = "sandbox,swap-case";
> -   };
> +   sandbox,emul = <_case_emul0>;

_case_emul0_0

> };
> pci@1,0 {
> compatible = "pci-generic";
> reg = <0x0800 0 0 0 0>;
> -   emul@0,0 {
> -   compatible = "sandbox,swap-case";
> -   use-ea;
> -   };
> +   sandbox,emul = <_case_emul1>;

_case_emul0_1

> };
> pci@1f,0 {
> compatible = "pci-generic";
> reg = <0xf800 0 0 0 0>;
> -   emul@1f,0 {
> -   compatible = "sandbox,swap-case";
> -   };
> +   sandbox,emul = <_case_emul1f>;

_case_emul0_1f

> +   };
> +   };
> +
> +   pci-emul0 {
> +   compatible = "sandbox,pci-emul-parent";
> +   swap_case_emul0: emul@0,0 {
> +   compatible = "sandbox,swap-case";
> +   };
> +   swap_case_emul1: emul@1,0 {
> +   compatible = "sandbox,swap-case";
> +   use-ea;
> +   };
> +   swap_case_emul1f: emul@1f,0 {
> +   compatible = "sandbox,swap-case";
> };
> };
>
> @@ -499,9 +506,14 @@
> pci@1f,0 {
> 

Re: [U-Boot] [PATCH 028/126] pci: Show the result of binding a device

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> Update the debugging info a little to show the result of trying to bind
> a PCI device.
>
> Signed-off-by: Simon Glass 
> ---
>
>  drivers/pci/pci-uclass.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH 029/126] pci: Disable autoconfig in SPL

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> At present U-Boot runs autoconfig in SPL but this is best left to U-Boot
> proper. For TPL and SPL we can normally used fixed BARs and save code size
> and time.
>
> Signed-off-by: Simon Glass 
> ---
>
>  drivers/pci/pci-uclass.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH 027/126] pci: sandbox: Probe PCI emulation devices when used

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> At present PCI emulation devices are not probed before use, since they
> used to be children of the device that used them, and children cannot be
> probed before their parents.
>
> Now that PCI emulation devices are attached to the root node, we can
> simply probe them, and avoid using the internal function.
>
> Signed-off-by: Simon Glass 
> ---
>
>  drivers/pci/pci-emul-uclass.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
>

Reviewed-by: Bin Meng 
Tested-by: Bin Meng 
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Re: [U-Boot] [PATCH 030/126] pci: Correct 'specifified' and 'Plese' typos

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> Fix these spelling errors the header file and documentation.

in the header

>
> Fix a small typo in the PCI documentation.
>
> Signed-off-by: Simon Glass 
> ---
>
>  doc/driver-model/pci-info.rst | 2 +-
>  include/pci.h | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>

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Re: [U-Boot] [PATCH 2/8] ARM: socfpga: arria10: Sync A10 SoCDK devicetrees

2019-10-04 Thread Marek Vasut
On 10/5/19 12:30 AM, Dalon Westergreen wrote:
> From: Dalon Westergreen 
> 
> Sync devicetree from 5.2 kernel.

Linux 5.3 was already released, can you update this ?
Also, make sure to list the exact commit ID in the commit message when
importing stuff from Linux.
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Re: [U-Boot] [PATCH 3/8] ARM: socfpga: arria10: Add common u-boot devicetree include

2019-10-04 Thread Marek Vasut
On 10/5/19 12:30 AM, Dalon Westergreen wrote:
> From: Dalon Westergreen 
> 
> Add a common u-boot devicetree include file for the SocFPGA
> Arria10 device.

Isn't arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi doing basically
the same thing, except more fine-grained ?

> diff --git a/arch/arm/dts/socfpga_arria10-common-u-boot.dtsi 
> b/arch/arm/dts/socfpga_arria10-common-u-boot.dtsi
> new file mode 100644
> index 00..bd4f1271f3
> --- /dev/null
> +++ b/arch/arm/dts/socfpga_arria10-common-u-boot.dtsi
> @@ -0,0 +1,206 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright Altera Corporation (C) 2014. All rights reserved.
> + */
> +
> +/ {
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + chosen {
> + tick-timer = 
> + u-boot,dm-pre-reloc;
> + };
> +
> + memory@0 {
> + u-boot,dm-pre-reloc;
> + };
> +
> + soc {
> + u-boot,dm-pre-reloc;
> +
> + clkmgr@ffd04000 {
> + u-boot,dm-pre-reloc;
> +
> + clocks {
> + u-boot,dm-pre-reloc;
> +
> + cb_intosc_hs_div2_clk {
> + u-boot,dm-pre-reloc;
> + };
> +
> + cb_intosc_ls_clk {
> + u-boot,dm-pre-reloc;
> + };
> +
> + f2s_free_clk {
> + u-boot,dm-pre-reloc;
> + };
> +
> + osc1 {
> + u-boot,dm-pre-reloc;
> + };
> +
> + main_pll@40 {
> + u-boot,dm-pre-reloc;
> +
> + main_mpu_base_clk {
> + u-boot,dm-pre-reloc;
> + };
> +
> + main_noc_base_clk {
> + u-boot,dm-pre-reloc;
> + };
> +
> + main_emaca_clk@68 {
> + u-boot,dm-pre-reloc;
> + };

Do we really need all this in SPL for every board ?
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Re: [U-Boot] [PATCH 1/8] ARM: socfpga: arria10: Add qts-filter for arria10 socfpga

2019-10-04 Thread Marek Vasut
On 10/5/19 12:30 AM, Dalon Westergreen wrote:
> From: Dalon Westergreen 
> 
> Add a script to process hps handoff data and generate a header
> for inclusion in u-boot specific devicetree addons.  The header
> should be included in the top level u-boot.dtsi.

A10 should already be completely DT based and should directly use the DT
generated by quartus, why is this script needed?

Also, if this is to be included in u-boot.dtsi , how does this work with
multiple distinct boards ?
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Re: [U-Boot] [PATCH 4/8] ARM: socfpga: arria10: Add generic handoff devicetree include

2019-10-04 Thread Marek Vasut
On 10/5/19 12:30 AM, Dalon Westergreen wrote:
> From: Dalon Westergreen 
> 
> Generic handoff devicetree include uses a header generated by
> the qts-filter-a10.sh script in mach-socfpga.  The script
> creates the header based on design specific implementations
> for clock and pinmux configurations.

[...]

> diff --git a/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi 
> b/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi

[...]

> - clock_manager@0xffd04000 {
> + clkmgr@0xffd04000 {
> + compatible = "altr,socfpga-a10-clk-init";
> + reg = <0xffd04000 0x0200>;
> + reg-names = "soc_clock_manager_OCP_SLV";
>   u-boot,dm-pre-reloc;
>  
>   mainpll {
> + vco0-psrc = ;
> + vco1-denom = ;
> + vco1-numer = ;

But these bits are board-specific , they shouldn't be in common DT.
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Re: [U-Boot] [PATCH 025/126] sandbox: Allow use of real I/O with readl(), etc.

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> At present these functions are stubbed out. For more comprehensive testing
> with PCI devices it is useful to be able to fully emulate I/O access. Add
> simple implementations for these.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/sandbox/cpu/cpu.c   | 51 
>  arch/sandbox/include/asm/io.h| 27 +++--
>  arch/sandbox/include/asm/state.h |  1 +
>  drivers/nvme/nvme.h  |  4 +--
>  4 files changed, 72 insertions(+), 11 deletions(-)
>
> diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
> index fdfb209f77d..f3af88d79e9 100644
> --- a/arch/sandbox/cpu/cpu.c
> +++ b/arch/sandbox/cpu/cpu.c
> @@ -225,6 +225,57 @@ phys_addr_t map_to_sysmem(const void *ptr)
> return mentry->tag;
>  }
>
> +unsigned int sandbox_read(const void *addr, enum sandboxio_size_t size)
> +{
> +   struct sandbox_state *state = state_get_current();
> +
> +   if (!state->allow_memio)
> +   return 0;
> +
> +   switch (size) {
> +   case SB_SIZE_8:
> +   return *(u8 *)addr;
> +   case SB_SIZE_16:
> +   return *(u16 *)addr;
> +   case SB_SIZE_32:
> +   return *(u32 *)addr;
> +   case SB_SIZE_64:
> +   return *(u64 *)addr;
> +   }
> +
> +   return 0;
> +}
> +
> +void sandbox_write(void *addr, unsigned int val, enum sandboxio_size_t size)

const void *addr

> +{
> +   struct sandbox_state *state = state_get_current();
> +
> +   if (!state->allow_memio)
> +   return;
> +
> +   switch (size) {
> +   case SB_SIZE_8:
> +   *(u8 *)addr = val;
> +   break;
> +   case SB_SIZE_16:
> +   *(u16 *)addr = val;
> +   break;
> +   case SB_SIZE_32:
> +   *(u32 *)addr = val;
> +   break;
> +   case SB_SIZE_64:
> +   *(u64 *)addr = val;
> +   break;
> +   }
> +}
> +
> +void sandbox_set_enable_memio(bool enable)
> +{
> +   struct sandbox_state *state = state_get_current();
> +
> +   state->allow_memio = enable;
> +}
> +
>  void sandbox_set_enable_pci_map(int enable)
>  {
> enable_pci_map = enable;
> diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h
> index 481787b516b..2bbaff26a61 100644
> --- a/arch/sandbox/include/asm/io.h
> +++ b/arch/sandbox/include/asm/io.h
> @@ -6,6 +6,13 @@
>  #ifndef __SANDBOX_ASM_IO_H
>  #define __SANDBOX_ASM_IO_H
>
> +enum sandboxio_size_t {
> +   SB_SIZE_8,
> +   SB_SIZE_16,
> +   SB_SIZE_32,
> +   SB_SIZE_64,
> +};
> +
>  void *phys_to_virt(phys_addr_t paddr);
>  #define phys_to_virt phys_to_virt
>
> @@ -38,18 +45,20 @@ static inline void unmap_sysmem(const void *vaddr)
>  /* Map from a pointer to our RAM buffer */
>  phys_addr_t map_to_sysmem(const void *ptr);
>
> -/* Define nops for sandbox I/O access */
> -#define readb(addr) ((void)addr, 0)
> -#define readw(addr) ((void)addr, 0)
> -#define readl(addr) ((void)addr, 0)
> +unsigned int sandbox_read(const void *addr, enum sandboxio_size_t size);
> +void sandbox_write(void *addr, unsigned int val, enum sandboxio_size_t size);
> +
> +#define readb(addr) sandbox_read(addr, SB_SIZE_8)
> +#define readw(addr) sandbox_read(addr, SB_SIZE_16)
> +#define readl(addr) sandbox_read(addr, SB_SIZE_32)
>  #ifdef CONFIG_SANDBOX64
> -#define readq(addr) ((void)addr, 0)
> +#define readq(addr) sandbox_read(addr, SB_SIZE_64)
>  #endif
> -#define writeb(v, addr) ((void)addr)
> -#define writew(v, addr) ((void)addr)
> -#define writel(v, addr) ((void)addr)
> +#define writeb(v, addr) sandbox_write(addr, v, SB_SIZE_8)
> +#define writew(v, addr) sandbox_write(addr, v, SB_SIZE_16)
> +#define writel(v, addr) sandbox_write(addr, v, SB_SIZE_32)
>  #ifdef CONFIG_SANDBOX64
> -#define writeq(v, addr) ((void)addr)
> +#define writeq(v, addr) sandbox_write(addr, v, SB_SIZE_64)
>  #endif
>
>  /*
> diff --git a/arch/sandbox/include/asm/state.h 
> b/arch/sandbox/include/asm/state.h
> index 2d773d3fa6b..ad3e94beb9a 100644
> --- a/arch/sandbox/include/asm/state.h
> +++ b/arch/sandbox/include/asm/state.h
> @@ -102,6 +102,7 @@ struct sandbox_state {
> ulong next_tag; /* Next address tag to allocate */
> struct list_head mapmem_head;   /* struct sandbox_mapmem_entry */
> bool hwspinlock;/* Hardware Spinlock status */
> +   bool allow_memio;   /* Allow readl() etc. to work */
>
> /*
>  * This struct is getting large.
> diff --git a/drivers/nvme/nvme.h b/drivers/nvme/nvme.h
> index 922f7abfe85..c56ea7e58e6 100644
> --- a/drivers/nvme/nvme.h
> +++ b/drivers/nvme/nvme.h
> @@ -536,7 +536,7 @@ struct nvme_completion {
>  static inline u64 nvme_readq(__le64 volatile *regs)
>  {
>  #if BITS_PER_LONG == 64
> -   return readq(regs);
> +   return readq((__le64  *)regs);

This cast is not needed

>  #else
> __u32 

[U-Boot] [PATCH 3/8] ARM: socfpga: arria10: Add common u-boot devicetree include

2019-10-04 Thread Dalon Westergreen
From: Dalon Westergreen 

Add a common u-boot devicetree include file for the SocFPGA
Arria10 device.

Signed-off-by: Dalon Westergreen 
---
 .../dts/socfpga_arria10-common-u-boot.dtsi| 206 ++
 1 file changed, 206 insertions(+)
 create mode 100644 arch/arm/dts/socfpga_arria10-common-u-boot.dtsi

diff --git a/arch/arm/dts/socfpga_arria10-common-u-boot.dtsi 
b/arch/arm/dts/socfpga_arria10-common-u-boot.dtsi
new file mode 100644
index 00..bd4f1271f3
--- /dev/null
+++ b/arch/arm/dts/socfpga_arria10-common-u-boot.dtsi
@@ -0,0 +1,206 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright Altera Corporation (C) 2014. All rights reserved.
+ */
+
+/ {
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   chosen {
+   tick-timer = 
+   u-boot,dm-pre-reloc;
+   };
+
+   memory@0 {
+   u-boot,dm-pre-reloc;
+   };
+
+   soc {
+   u-boot,dm-pre-reloc;
+
+   clkmgr@ffd04000 {
+   u-boot,dm-pre-reloc;
+
+   clocks {
+   u-boot,dm-pre-reloc;
+
+   cb_intosc_hs_div2_clk {
+   u-boot,dm-pre-reloc;
+   };
+
+   cb_intosc_ls_clk {
+   u-boot,dm-pre-reloc;
+   };
+
+   f2s_free_clk {
+   u-boot,dm-pre-reloc;
+   };
+
+   osc1 {
+   u-boot,dm-pre-reloc;
+   };
+
+   main_pll@40 {
+   u-boot,dm-pre-reloc;
+
+   main_mpu_base_clk {
+   u-boot,dm-pre-reloc;
+   };
+
+   main_noc_base_clk {
+   u-boot,dm-pre-reloc;
+   };
+
+   main_emaca_clk@68 {
+   u-boot,dm-pre-reloc;
+   };
+
+   main_emacb_clk@6c {
+   u-boot,dm-pre-reloc;
+   };
+
+   main_emac_ptp_clk@70 {
+   u-boot,dm-pre-reloc;
+   };
+
+   main_gpio_db_clk@74 {
+   u-boot,dm-pre-reloc;
+   };
+
+   main_sdmmc_clk@78 {
+   u-boot,dm-pre-reloc;
+   };
+
+   main_s2f_usr0_clk@7c {
+   u-boot,dm-pre-reloc;
+   };
+
+   main_s2f_usr1_clk@80 {
+   u-boot,dm-pre-reloc;
+   };
+
+   main_hmc_pll_ref_clk@84 {
+   u-boot,dm-pre-reloc;
+   };
+
+   main_periph_ref_clk@9c {
+   u-boot,dm-pre-reloc;
+   };
+   };
+
+   periph_pll@c0 {
+   u-boot,dm-pre-reloc;
+
+   peri_mpu_base_clk {
+   u-boot,dm-pre-reloc;
+   };
+
+   peri_noc_base_clk {
+   u-boot,dm-pre-reloc;
+   };
+
+   peri_emaca_clk@e8 {
+   u-boot,dm-pre-reloc;
+   };
+
+   peri_emacb_clk@ec {
+   

[U-Boot] [PATCH 0/8] ARM: socfpga: arria10: Cleanup devicetree and

2019-10-04 Thread Dalon Westergreen
From: Dalon Westergreen 

This series sync the arria10 devicetree to the kernel devicetree
and cleans up the inclusion of u-boot specific requirements.  It
also adds a new qts-filter-a10.sh script to allow for generation
of project specific settings required for configuration of the
device clocks, PLLs, and pinmux.

Dalon Westergreen (8):
  ARM: socfpga: arria10: Add qts-filter for arria10 socfpga
  ARM: socfpga: arria10: Sync A10 SoCDK devicetrees
  ARM: socfpga: arria10: Add common u-boot devicetree include
  ARM: socfpga: arria10: Add generic handoff devicetree include
  ARM: socfpga: arria10: Add handoff header for A10 SoCDK SDMMC
  ARM: socfpga: arria10: Add u-boot include for A10 SoCDK SDMMC
devicetree
  ARM: socfpga: arria10: Remove old A10 SoCDK Handoff dtsi
  ARM: socfpga: Update README.socfpga to add qts-filter-a10

 .../dts/socfpga_arria10-common-u-boot.dtsi| 206 +++
 arch/arm/dts/socfpga_arria10.dtsi | 104 +++---
 .../dts/socfpga_arria10_handoff_u-boot.dtsi   | 232 +++-
 arch/arm/dts/socfpga_arria10_socdk.dtsi   |  75 ++--
 .../socfpga_arria10_socdk_sdmmc-u-boot.dtsi   |  34 ++
 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts  |  53 +--
 .../socfpga_arria10_socdk_sdmmc_handoff.dtsi  | 329 --
 .../dts/socfpga_arria10_socdk_sdmmc_handoff.h | 305 
 arch/arm/mach-socfpga/qts-filter-a10.sh   | 141 
 doc/README.socfpga|  37 +-
 10 files changed, 1035 insertions(+), 481 deletions(-)
 create mode 100644 arch/arm/dts/socfpga_arria10-common-u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi
 delete mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi
 create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.h
 create mode 100755 arch/arm/mach-socfpga/qts-filter-a10.sh

-- 
2.21.0

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[U-Boot] [PATCH 1/8] ARM: socfpga: arria10: Add qts-filter for arria10 socfpga

2019-10-04 Thread Dalon Westergreen
From: Dalon Westergreen 

Add a script to process hps handoff data and generate a header
for inclusion in u-boot specific devicetree addons.  The header
should be included in the top level u-boot.dtsi.

Signed-off-by: Dalon Westergreen 
---
 arch/arm/mach-socfpga/qts-filter-a10.sh | 141 
 1 file changed, 141 insertions(+)
 create mode 100755 arch/arm/mach-socfpga/qts-filter-a10.sh

diff --git a/arch/arm/mach-socfpga/qts-filter-a10.sh 
b/arch/arm/mach-socfpga/qts-filter-a10.sh
new file mode 100755
index 00..ddb0d0a6f3
--- /dev/null
+++ b/arch/arm/mach-socfpga/qts-filter-a10.sh
@@ -0,0 +1,141 @@
+#!/bin/bash
+
+#
+# helper function to convert from DOS to Unix, if necessary, and handle
+# lines ending in '\'.
+#
+fix_newlines_in_macros() {
+   sed -n ':next;s/\r$//;/[^\\]\\$/ {N;s/\\\n//;b next};p' $1
+}
+
+#filter out only what we need from a10 hps.xml
+grep_a10_hps_config() {
+   egrep "clk_hz|i_clk_mgr|i_io48_pin_mux|AXI_SLAVE|AXI_MASTER"
+}
+
+#
+# Process hps.xml
+# $1:  hps.xml
+# $2:  Output File
+#
+process_a10_hps_config() {
+   hps_xml="$1"
+   outfile="$2"
+
+   (cat << EOF
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Altera Arria10 SoCFPGA configuration
+ */
+
+#ifndef __SOCFPGA_ARRIA10_CONFIG_H__
+#define __SOCFPGA_ARRIA10_CONFIG_H__
+
+EOF
+
+   echo "/* Clocks */"
+   fix_newlines_in_macros \
+   ${hps_xml} | egrep "clk_hz" |
+   awk -F"'" '{ gsub("\\.","_",$2) ; \
+   print "#define" " " toupper($2) " " $4}' |
+   sed 's/\.[0-9]//' |
+   sed 's/I_CLK_MGR_//' |
+   sort
+   fix_newlines_in_macros \
+   ${hps_xml} | egrep "i_clk_mgr_mainpll" |
+   awk -F"'" '{ gsub("\\.","_",$2) ; \
+   print "#define" " " toupper($2) " " $4}' |
+   sed 's/\.[0-9]//' |
+   sed 's/I_CLK_MGR_//' |
+   sort
+   fix_newlines_in_macros \
+   ${hps_xml} | egrep "i_clk_mgr_perpll" |
+   awk -F"'" '{ gsub("\\.","_",$2) ; \
+   print "#define" " " toupper($2) " " $4}' |
+   sed 's/\.[0-9]//' |
+   sed 's/I_CLK_MGR_//' |
+   sort
+   fix_newlines_in_macros \
+   ${hps_xml} | egrep "i_clk_mgr_clkmgr" |
+   awk -F"'" '{ gsub("\\.","_",$2) ; \
+   print "#define" " " toupper($2) " " $4}' |
+   sed 's/\.[0-9]//' |
+   sed 's/I_CLK_MGR_//' |
+   sort
+   fix_newlines_in_macros \
+   ${hps_xml} | egrep "i_clk_mgr_alteragrp" |
+   awk -F"'" '{ gsub("\\.","_",$2) ; \
+   print "#define" " " toupper($2) " " $4}' |
+   sed 's/\.[0-9]//' |
+   sed 's/I_CLK_MGR_//' |
+   sort
+   echo "#define ALTERAGRP_MPUCLK ((ALTERAGRP_MPUCLK_PERICNT << 16) | \\"
+   echo "  (ALTERAGRP_MPUCLK_MAINCNT))"
+   echo "#define ALTERAGRP_NOCCLK ((ALTERAGRP_NOCCLK_PERICNT << 16) | \\"
+   echo "  (ALTERAGRP_NOCCLK_MAINCNT))"
+
+   echo
+   echo "/* Pin Mux Configuration */"
+   fix_newlines_in_macros \
+   ${hps_xml} | egrep "i_io48_pin_mux" |
+   awk -F"'" '{ gsub("\\.","_",$2) ; \
+   print "#define" " " toupper($2) " " $4}' |
+   sed 's/I_IO48_PIN_MUX_//' |
+   sed 's/SHARED_3V_IO_GRP_//' |
+   sed 's/FPGA_INTERFACE_GRP_//' |
+   sed 's/DEDICATED_IO_GRP_//' |
+   sed 's/CONFIGURATION_DEDICATED/CONFIG/' |
+   sort
+
+   echo
+   echo "/* Bridge Configuration */"
+   fix_newlines_in_macros \
+   ${hps_xml} | egrep "AXI_SLAVE|AXI_MASTER" |
+   awk -F"'" '{ gsub("\\.","_",$2) ; \
+   print "#define" " " toupper($2) " " $4}' |
+   sed 's/true/1/' |
+   sed 's/false/0/' |
+   sort
+
+   echo
+   echo "/* Voltage Select for Config IO */"
+   echo "#define CONFIG_IO_BANK_VSEL \\"
+   echo "  (((CONFIG_IO_BANK_VOLTAGE_SEL_CLKRST_IO & 0x3) << 8) | \\"
+   echo "  (CONFIG_IO_BANK_VOLTAGE_SEL_PERI_IO & 0x3))"
+
+   echo
+   echo "/* Macro for Config IO bit mapping */"
+   echo -n "#define CONFIG_IO_MACRO(NAME) "
+   echo "(((NAME ## _RTRIM & 0xff) << 19) | \\"
+   echo "  ((NAME ## _INPUT_BUF_EN & 0x3) << 17) | \\"
+   echo "  ((NAME ## _WK_PU_EN & 0x1) << 16) | \\"
+   echo "  ((NAME ## _PU_SLW_RT & 0x1) << 13) | \\"
+   echo "  ((NAME ## _PU_DRV_STRG & 0xf) << 8) | \\"
+   echo "  ((NAME ## _PD_SLW_RT 

[U-Boot] [PATCH 2/8] ARM: socfpga: arria10: Sync A10 SoCDK devicetrees

2019-10-04 Thread Dalon Westergreen
From: Dalon Westergreen 

Sync devicetree from 5.2 kernel.

Signed-off-by: Dalon Westergreen 
---
 arch/arm/dts/socfpga_arria10.dtsi| 104 ++-
 arch/arm/dts/socfpga_arria10_socdk.dtsi  |  75 +++--
 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts |  53 +-
 3 files changed, 100 insertions(+), 132 deletions(-)

diff --git a/arch/arm/dts/socfpga_arria10.dtsi 
b/arch/arm/dts/socfpga_arria10.dtsi
index c11a5c0cc1..b175e05735 100644
--- a/arch/arm/dts/socfpga_arria10.dtsi
+++ b/arch/arm/dts/socfpga_arria10.dtsi
@@ -1,17 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright Altera Corporation (C) 2014. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program.  If not, see .
  */
 
 #include 
@@ -21,11 +10,6 @@
#address-cells = <1>;
#size-cells = <1>;
 
-   chosen {
-   tick-timer = 
-   u-boot,dm-pre-reloc;
-   };
-
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -60,7 +44,6 @@
device_type = "soc";
interrupt-parent = <>;
ranges;
-   u-boot,dm-pre-reloc;
 
amba {
compatible = "simple-bus";
@@ -85,6 +68,7 @@
#dma-requests = <32>;
clocks = <_main_clk>;
clock-names = "apb_pclk";
+   microcode-cached;
};
};
 
@@ -99,35 +83,29 @@
clkmgr@ffd04000 {
compatible = "altr,clk-mgr";
reg = <0xffd04000 0x1000>;
-   u-boot,dm-pre-reloc;
 
clocks {
#address-cells = <1>;
#size-cells = <0>;
-   u-boot,dm-pre-reloc;
 
cb_intosc_hs_div2_clk: 
cb_intosc_hs_div2_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
-   u-boot,dm-pre-reloc;
};
 
cb_intosc_ls_clk: cb_intosc_ls_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
-   u-boot,dm-pre-reloc;
};
 
f2s_free_clk: f2s_free_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
-   u-boot,dm-pre-reloc;
};
 
osc1: osc1 {
#clock-cells = <0>;
compatible = "fixed-clock";
-   u-boot,dm-pre-reloc;
};
 
main_pll: main_pll@40 {
@@ -138,7 +116,6 @@
clocks = <>, 
<_intosc_ls_clk>,
 <_free_clk>;
reg = <0x40>;
-   u-boot,dm-pre-reloc;
 
main_mpu_base_clk: 
main_mpu_base_clk {
#clock-cells = <0>;
@@ -152,7 +129,6 @@
compatible = 
"altr,socfpga-a10-perip-clk";
clocks = <_pll>;
div-reg = <0x144 0 11>;
-   u-boot,dm-pre-reloc;
};
 
main_emaca_clk: 
main_emaca_clk@68 {
@@ -228,7 +204,6 @@
clocks = <>, 
<_intosc_ls_clk>,
 

[U-Boot] [PATCH 5/8] ARM: socfpga: arria10: Add handoff header for A10 SoCDK SDMMC

2019-10-04 Thread Dalon Westergreen
From: Dalon Westergreen 

Add the qts-filter-a10.sh generated handoff data for the arria10
socdk sdmmc uboot devicetree.

Signed-off-by: Dalon Westergreen 
---
 .../dts/socfpga_arria10_socdk_sdmmc_handoff.h | 305 ++
 1 file changed, 305 insertions(+)
 create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.h

diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.h 
b/arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.h
new file mode 100644
index 00..3fdc04
--- /dev/null
+++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.h
@@ -0,0 +1,305 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Altera Arria10 SoCFPGA configuration
+ */
+
+#ifndef __SOCFPGA_ARRIA10_CONFIG_H__
+#define __SOCFPGA_ARRIA10_CONFIG_H__
+
+/* Clocks */
+#define CB_INTOSC_LS_CLK_HZ 6000
+#define EMAC0_CLK_HZ 25000
+#define EMAC1_CLK_HZ 25000
+#define EMAC2_CLK_HZ 25000
+#define EOSC1_CLK_HZ 2500
+#define F2H_FREE_CLK_HZ 2
+#define H2F_USER0_CLK_HZ 4
+#define H2F_USER1_CLK_HZ 4
+#define L3_MAIN_FREE_CLK_HZ 2
+#define SDMMC_CLK_HZ 2
+#define TPIU_CLK_HZ 1
+#define MAINPLLGRP_CNTR15CLK_CNT 900
+#define MAINPLLGRP_CNTR2CLK_CNT 900
+#define MAINPLLGRP_CNTR3CLK_CNT 900
+#define MAINPLLGRP_CNTR4CLK_CNT 900
+#define MAINPLLGRP_CNTR5CLK_CNT 900
+#define MAINPLLGRP_CNTR6CLK_CNT 900
+#define MAINPLLGRP_CNTR7CLK_CNT 900
+#define MAINPLLGRP_CNTR7CLK_SRC 0
+#define MAINPLLGRP_CNTR8CLK_CNT 900
+#define MAINPLLGRP_CNTR9CLK_CNT 900
+#define MAINPLLGRP_CNTR9CLK_SRC 0
+#define MAINPLLGRP_MPUCLK_CNT 0
+#define MAINPLLGRP_MPUCLK_SRC 0
+#define MAINPLLGRP_NOCCLK_CNT 0
+#define MAINPLLGRP_NOCCLK_SRC 0
+#define MAINPLLGRP_NOCDIV_CSATCLK 0
+#define MAINPLLGRP_NOCDIV_CSPDBGCLK 1
+#define MAINPLLGRP_NOCDIV_CSTRACECLK 1
+#define MAINPLLGRP_NOCDIV_L4MAINCLK 0
+#define MAINPLLGRP_NOCDIV_L4MPCLK 0
+#define MAINPLLGRP_NOCDIV_L4SPCLK 2
+#define MAINPLLGRP_VCO0_PSRC 0
+#define MAINPLLGRP_VCO1_DENOM 1
+#define MAINPLLGRP_VCO1_NUMER 191
+#define PERPLLGRP_CNTR2CLK_CNT 7
+#define PERPLLGRP_CNTR2CLK_SRC 1
+#define PERPLLGRP_CNTR3CLK_CNT 900
+#define PERPLLGRP_CNTR3CLK_SRC 1
+#define PERPLLGRP_CNTR4CLK_CNT 19
+#define PERPLLGRP_CNTR4CLK_SRC 1
+#define PERPLLGRP_CNTR5CLK_CNT 499
+#define PERPLLGRP_CNTR5CLK_SRC 1
+#define PERPLLGRP_CNTR6CLK_CNT 9
+#define PERPLLGRP_CNTR6CLK_SRC 1
+#define PERPLLGRP_CNTR7CLK_CNT 900
+#define PERPLLGRP_CNTR8CLK_CNT 900
+#define PERPLLGRP_CNTR8CLK_SRC 0
+#define PERPLLGRP_CNTR9CLK_CNT 900
+#define PERPLLGRP_EMACCTL_EMAC0SEL 0
+#define PERPLLGRP_EMACCTL_EMAC1SEL 0
+#define PERPLLGRP_EMACCTL_EMAC2SEL 0
+#define PERPLLGRP_GPIODIV_GPIODBCLK 32000
+#define PERPLLGRP_VCO0_PSRC 0
+#define PERPLLGRP_VCO1_DENOM 1
+#define PERPLLGRP_VCO1_NUMER 159
+#define CLKMGR_TESTIOCTRL_DEBUGCLKSEL 16
+#define CLKMGR_TESTIOCTRL_MAINCLKSEL 8
+#define CLKMGR_TESTIOCTRL_PERICLKSEL 8
+#define ALTERAGRP_MPUCLK_MAINCNT 1
+#define ALTERAGRP_MPUCLK_PERICNT 900
+#define ALTERAGRP_NOCCLK_MAINCNT 11
+#define ALTERAGRP_NOCCLK_PERICNT 900
+#define ALTERAGRP_MPUCLK ((ALTERAGRP_MPUCLK_PERICNT << 16) | \
+   (ALTERAGRP_MPUCLK_MAINCNT))
+#define ALTERAGRP_NOCCLK ((ALTERAGRP_NOCCLK_PERICNT << 16) | \
+   (ALTERAGRP_NOCCLK_MAINCNT))
+
+/* Pin Mux Configuration */
+#define CONFIG_IO_10_INPUT_BUF_EN 0
+#define CONFIG_IO_10_PD_DRV_STRG 0
+#define CONFIG_IO_10_PD_SLW_RT 0
+#define CONFIG_IO_10_PU_DRV_STRG 0
+#define CONFIG_IO_10_PU_SLW_RT 0
+#define CONFIG_IO_10_RTRIM 1
+#define CONFIG_IO_10_WK_PU_EN 1
+#define CONFIG_IO_11_INPUT_BUF_EN 0
+#define CONFIG_IO_11_PD_DRV_STRG 0
+#define CONFIG_IO_11_PD_SLW_RT 0
+#define CONFIG_IO_11_PU_DRV_STRG 0
+#define CONFIG_IO_11_PU_SLW_RT 0
+#define CONFIG_IO_11_RTRIM 1
+#define CONFIG_IO_11_WK_PU_EN 1
+#define CONFIG_IO_12_INPUT_BUF_EN 1
+#define CONFIG_IO_12_PD_DRV_STRG 10
+#define CONFIG_IO_12_PD_SLW_RT 1
+#define CONFIG_IO_12_PU_DRV_STRG 8
+#define CONFIG_IO_12_PU_SLW_RT 1
+#define CONFIG_IO_12_RTRIM 1
+#define CONFIG_IO_12_WK_PU_EN 1
+#define CONFIG_IO_13_INPUT_BUF_EN 1
+#define CONFIG_IO_13_PD_DRV_STRG 10
+#define CONFIG_IO_13_PD_SLW_RT 1
+#define CONFIG_IO_13_PU_DRV_STRG 8
+#define CONFIG_IO_13_PU_SLW_RT 1
+#define CONFIG_IO_13_RTRIM 1
+#define CONFIG_IO_13_WK_PU_EN 1
+#define CONFIG_IO_14_INPUT_BUF_EN 1
+#define CONFIG_IO_14_PD_DRV_STRG 10
+#define CONFIG_IO_14_PD_SLW_RT 1
+#define CONFIG_IO_14_PU_DRV_STRG 8
+#define CONFIG_IO_14_PU_SLW_RT 1
+#define CONFIG_IO_14_RTRIM 1
+#define CONFIG_IO_14_WK_PU_EN 1
+#define CONFIG_IO_15_INPUT_BUF_EN 1
+#define CONFIG_IO_15_PD_DRV_STRG 10
+#define CONFIG_IO_15_PD_SLW_RT 1
+#define CONFIG_IO_15_PU_DRV_STRG 8
+#define CONFIG_IO_15_PU_SLW_RT 1
+#define CONFIG_IO_15_RTRIM 1
+#define CONFIG_IO_15_WK_PU_EN 1
+#define CONFIG_IO_16_INPUT_BUF_EN 0
+#define CONFIG_IO_16_PD_DRV_STRG 10
+#define CONFIG_IO_16_PD_SLW_RT 1
+#define CONFIG_IO_16_PU_DRV_STRG 8
+#define CONFIG_IO_16_PU_SLW_RT 1
+#define CONFIG_IO_16_RTRIM 1
+#define CONFIG_IO_16_WK_PU_EN 0
+#define CONFIG_IO_17_INPUT_BUF_EN 1
+#define 

[U-Boot] [PATCH 4/8] ARM: socfpga: arria10: Add generic handoff devicetree include

2019-10-04 Thread Dalon Westergreen
From: Dalon Westergreen 

Generic handoff devicetree include uses a header generated by
the qts-filter-a10.sh script in mach-socfpga.  The script
creates the header based on design specific implementations
for clock and pinmux configurations.

Signed-off-by: Dalon Westergreen 
---
 .../dts/socfpga_arria10_handoff_u-boot.dtsi   | 232 --
 1 file changed, 216 insertions(+), 16 deletions(-)

diff --git a/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi 
b/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi
index ef215230c2..69854352a0 100644
--- a/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi
+++ b/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi
@@ -1,91 +1,291 @@
 // SPDX-License-Identifier: GPL-2.0+ OR X11
 
 / {
-   chosen {
-   u-boot,dm-pre-reloc;
-   };
-
clocks {
+   #address-cells = <1>;
+   #size-cells = <1>;
u-boot,dm-pre-reloc;
 
-   altera_arria10_hps_eosc1 {
+   altera_arria10_hps_eosc1: altera_arria10_hps_eosc1 {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = ;
+   clock-output-names = "altera_arria10_hps_eosc1-clk";
u-boot,dm-pre-reloc;
};
 
-   altera_arria10_hps_cb_intosc_ls {
+   altera_arria10_hps_cb_intosc_ls: 
altera_arria10_hps_cb_intosc_ls {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = ;
+   clock-output-names = 
"altera_arria10_hps_cb_intosc_ls-clk";
u-boot,dm-pre-reloc;
};
 
-   altera_arria10_hps_f2h_free {
+   /* Clock source: altera_arria10_hps_f2h_free */
+   altera_arria10_hps_f2h_free: altera_arria10_hps_f2h_free {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = ;
+   clock-output-names = "altera_arria10_hps_f2h_free-clk";
u-boot,dm-pre-reloc;
};
};
 
-   clock_manager@0xffd04000 {
+   clkmgr@0xffd04000 {
+   compatible = "altr,socfpga-a10-clk-init";
+   reg = <0xffd04000 0x0200>;
+   reg-names = "soc_clock_manager_OCP_SLV";
u-boot,dm-pre-reloc;
 
mainpll {
+   vco0-psrc = ;
+   vco1-denom = ;
+   vco1-numer = ;
+   mpuclk-cnt = ;
+   mpuclk-src = ;
+   nocclk-cnt = ;
+   nocclk-src = ;
+   cntr2clk-cnt = ;
+   cntr3clk-cnt = ;
+   cntr4clk-cnt = ;
+   cntr5clk-cnt = ;
+   cntr6clk-cnt = ;
+   cntr7clk-cnt = ;
+   cntr7clk-src = ;
+   cntr8clk-cnt = ;
+   cntr9clk-cnt = ;
+   cntr9clk-src = ;
+   cntr15clk-cnt = ;
+   nocdiv-l4mainclk = ;
+   nocdiv-l4mpclk = ;
+   nocdiv-l4spclk = ;
+   nocdiv-csatclk = ;
+   nocdiv-cstraceclk = ;
+   nocdiv-cspdbgclk = ;
u-boot,dm-pre-reloc;
};
 
perpll {
+   vco0-psrc = ;
+   vco1-denom = ;
+   vco1-numer = ;
+   cntr2clk-cnt = ;
+   cntr2clk-src = ;
+   cntr3clk-cnt = ;
+   cntr3clk-src = ;
+   cntr4clk-cnt = ;
+   cntr4clk-src = ;
+   cntr5clk-cnt = ;
+   cntr5clk-src = ;
+   cntr6clk-cnt = ;
+   cntr6clk-src = ;
+   cntr7clk-cnt = ;
+   cntr8clk-cnt = ;
+   cntr8clk-src = ;
+   cntr9clk-cnt = ;
+   emacctl-emac0sel = ;
+   emacctl-emac1sel = ;
+   emacctl-emac2sel = ;
+   gpiodiv-gpiodbclk = ;
u-boot,dm-pre-reloc;
};
 
alteragrp {
+   nocclk = ;
+   mpuclk = ;
u-boot,dm-pre-reloc;
};
};
 
-   pinmux@0xffd07000 {
+   i_io48_pin_mux: pinmux@0xffd07000 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "pinctrl-single";
+   reg = <0xffd07000 0x0800>;
+   reg-names = 

[U-Boot] [PATCH 8/8] ARM: socfpga: Update README.socfpga to add qts-filter-a10

2019-10-04 Thread Dalon Westergreen
From: Dalon Westergreen 

Update the readme to add a simple description of using
the qts-filter-a10.sh script.

Signed-off-by: Dalon Westergreen 
---
 doc/README.socfpga | 37 +
 1 file changed, 33 insertions(+), 4 deletions(-)

diff --git a/doc/README.socfpga b/doc/README.socfpga
index cae0ef1a21..c5a3b11133 100644
--- a/doc/README.socfpga
+++ b/doc/README.socfpga
@@ -16,9 +16,9 @@ controller support within SOCFPGA
 #define CONFIG_SYS_MMC_MAX_BLK_COUNT   256
 -> Using smaller max blk cnt to avoid flooding the limited stack in OCRAM
 
---
-Generating the handoff header files for U-Boot SPL
---
+-
+Cyclone5 / Arria 5 Generating the handoff header files for U-Boot SPL
+-
 
 This text is assuming quartus 16.1, but newer versions will probably work just 
fine too;
 verified with DE1_SOC_Linux_FB demo project 
(https://github.com/VCTLabs/DE1_SOC_Linux_FB).
@@ -32,7 +32,7 @@ Rebuilding your Quartus project
 
 Choose one of the follwing methods, either command line or GUI.
 
-Using the comaand line
+Using the command line
 ~~
 
 First run the embedded command shell, using your path to the Quartus install:
@@ -147,3 +147,32 @@ Note: file sizes will differ slightly depending on the 
selected board.
 
 Now your board is ready for full mainline support including U-Boot SPL.
 The Preloader will not be needed any more.
+
+--
+Arria10 Generating the handoff header files for U-Boot SPL
+--
+
+A header file for inclusion in a devicetree for Arria10 can be generated
+by the qts-filter-a10.sh script directly from the hps_isw_handoff/hps.xml
+file generated during the FPGA project compilation.  The header contains
+all PLL, clock, pinmux, and bridge configurations required.
+
+Please look at the socfpga_arria10_socdk_sdmmc-u-boot.dtsi for an example
+that includes use of the generated handoff header.
+
+Devicetree header generation
+
+
+The qts-filter-a10.sh script can process the compile time genetated hps.xml
+to create the appropriate devicetree header.
+
+
+  $ ./arch/arm/mach-socfpga/qts-filter-a10.sh \
+ \
+
+
+hps_xml  - hps_isw_handoff/hps.xml from Quartus project
+output_file  - Output filename and location for header file
+
+The script generates a single header file names  that should
+be placed in arch/arm/dts.
-- 
2.21.0

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[U-Boot] [PATCH 7/8] ARM: socfpga: arria10: Remove old A10 SoCDK Handoff dtsi

2019-10-04 Thread Dalon Westergreen
From: Dalon Westergreen 

This file is no longer needed and has been replaced with
socfpga_arria10_handoff_u-boot.dtsi and a generated header.

Signed-off-by: Dalon Westergreen 
---
 .../socfpga_arria10_socdk_sdmmc_handoff.dtsi  | 329 --
 1 file changed, 329 deletions(-)
 delete mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi

diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi 
b/arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi
deleted file mode 100644
index 60c419251b..00
--- a/arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi
+++ /dev/null
@@ -1,329 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
-/*
- * Copyright (C) 2016-2017 Intel Corporation
- *
- *
- * This code was generated by a tool based on
- * handoffs from both Qsys and Quartus.
- *
- * Changes to this file may be lost if
- * the code is regenerated.
- *
- */
-
-/ {
-   #address-cells = <1>;
-   #size-cells = <1>;
-   model = "SOCFPGA Arria10 Dev Kit";  /* Bootloader setting: 
uboot.model */
-
-   /* Clock sources */
-   clocks {
-   #address-cells = <1>;
-   #size-cells = <1>;
-
-   /* Clock source: altera_arria10_hps_eosc1 */
-   altera_arria10_hps_eosc1: altera_arria10_hps_eosc1 {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-frequency = <2500>;
-   clock-output-names = "altera_arria10_hps_eosc1-clk";
-   };
-
-   /* Clock source: altera_arria10_hps_cb_intosc_ls */
-   altera_arria10_hps_cb_intosc_ls: 
altera_arria10_hps_cb_intosc_ls {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-frequency = <6000>;
-   clock-output-names = 
"altera_arria10_hps_cb_intosc_ls-clk";
-   };
-
-   /* Clock source: altera_arria10_hps_f2h_free */
-   altera_arria10_hps_f2h_free: altera_arria10_hps_f2h_free {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-frequency = <2>;
-   clock-output-names = "altera_arria10_hps_f2h_free-clk";
-   };
-   };
-
-   /*
-* Driver: altera_arria10_soc_clock_manager_arria10_uboot_driver
-* Version: 1.0
-* Binding: device
-*/
-   i_clk_mgr: clock_manager@0xffd04000 {
-   compatible = "altr,socfpga-a10-clk-init";
-   reg = <0xffd04000 0x0200>;
-   reg-names = "soc_clock_manager_OCP_SLV";
-
-   /* Address Block: 
soc_clock_manager_OCP_SLV.i_clk_mgr_mainpllgrp */
-   mainpll {
-   vco0-psrc = <0>;/* Field: vco0.psrc */
-   vco1-denom = <1>;   /* Field: vco1.denom */
-   vco1-numer = <191>; /* Field: vco1.numer */
-   mpuclk-cnt = <0>;   /* Field: mpuclk.cnt */
-   mpuclk-src = <0>;   /* Field: mpuclk.src */
-   nocclk-cnt = <0>;   /* Field: nocclk.cnt */
-   nocclk-src = <0>;   /* Field: nocclk.src */
-   cntr2clk-cnt = <900>;   /* Field: cntr2clk.cnt */
-   cntr3clk-cnt = <900>;   /* Field: cntr3clk.cnt */
-   cntr4clk-cnt = <900>;   /* Field: cntr4clk.cnt */
-   cntr5clk-cnt = <900>;   /* Field: cntr5clk.cnt */
-   cntr6clk-cnt = <900>;   /* Field: cntr6clk.cnt */
-   cntr7clk-cnt = <900>;   /* Field: cntr7clk.cnt */
-   cntr7clk-src = <0>; /* Field: cntr7clk.src */
-   cntr8clk-cnt = <900>;   /* Field: cntr8clk.cnt */
-   cntr9clk-cnt = <900>;   /* Field: cntr9clk.cnt */
-   cntr9clk-src = <0>; /* Field: cntr9clk.src */
-   cntr15clk-cnt = <900>;  /* Field: cntr15clk.cnt */
-   nocdiv-l4mainclk = <0>; /* Field: nocdiv.l4mainclk */
-   nocdiv-l4mpclk = <0>;   /* Field: nocdiv.l4mpclk */
-   nocdiv-l4spclk = <2>;   /* Field: nocdiv.l4spclk */
-   nocdiv-csatclk = <0>;   /* Field: nocdiv.csatclk */
-   nocdiv-cstraceclk = <1>;/* Field: 
nocdiv.cstraceclk */
-   nocdiv-cspdbgclk = <1>; /* Field: nocdiv.cspdbgclk */
-   };
-
-   /* Address Block: soc_clock_manager_OCP_SLV.i_clk_mgr_perpllgrp 
*/
-   perpll {
-   vco0-psrc = <0>;/* Field: vco0.psrc */
-   vco1-denom = <1>;   /* Field: vco1.denom */
-   vco1-numer = <159>; /* Field: vco1.numer */
-

[U-Boot] [PATCH 6/8] ARM: socfpga: arria10: Add u-boot include for A10 SoCDK SDMMC devicetree

2019-10-04 Thread Dalon Westergreen
From: Dalon Westergreen 

Rather then modifying the devicetree to add u-boot specific
requirements, use the -u-boot.dtsi convention to allow
binman to merge the devicetree appropriately.

Signed-off-by: Dalon Westergreen 
---
 .../socfpga_arria10_socdk_sdmmc-u-boot.dtsi   | 34 +++
 1 file changed, 34 insertions(+)
 create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi

diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi 
b/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi
new file mode 100644
index 00..3f41b1950b
--- /dev/null
+++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2014-2015 Altera Corporation 
+ */
+
+#include 
+#include "socfpga_arria10_handoff_u-boot.dtsi"
+#include "socfpga_arria10-common-u-boot.dtsi"
+
+/ {
+   chosen {
+   firmware-loader = <_loader0>;
+   };
+
+   fs_loader0: fs-loader {
+   u-boot,dm-pre-reloc;
+   compatible = "u-boot,fs-loader";
+   phandlepart = < 1>;
+   };
+};
+
+_mgr {
+   u-boot,dm-pre-reloc;
+   altr,bitstream = "fit_spl_fpga.itb";
+};
+
+ {
+   u-boot,dm-pre-reloc;
+};
+
+ {
+   u-boot,dm-pre-reloc;
+};
+
-- 
2.21.0

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Re: [U-Boot] [PATCH v3 2/2] efi: device path for nvme

2019-10-04 Thread Heinrich Schuchardt
On 10/3/19 4:24 PM, Patrick Wildt wrote:
> This allows our EFI API to create a device path node for NVMe
> devices.  It adds the necessary device path struct, uses the
> nvme namespace accessor to retrieve the id and eui64, and also
> provides support for the device path text protocol.
>
> Signed-off-by: Patrick Wildt 
> ---

I have tested with an NVMe drive mounted on a MACCHIATObin and saw
consistent device paths and GUIDs in U-Boot, UEFI Shell and Debian:

In U-Boot:

=> efidebug devices
Device   Device Path
 
7fb90380
/VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/NVMe(0x1,00-25-38-b5-81-e6-05-65)

In UEFI Shell (started from U-Boot):

 BLK1: Alias(s):

/VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/NVMe(0x1,00-25-38-b5-81-e6-05-65)

In Debian:

$ smartctl -a /dev/nvme0n1
Namespace 1 IEEE EUI-64:002538 b581e60565

The first bytes match the brand of the drive:

http://standards-oui.ieee.org/oui.txt:
002538 Samsung Electronics Co., Ltd., Memory Division

Tested-by: Heinrich Schuchardt 
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Re: [U-Boot] [PATCH 021/126] sandbox: net: Suppress the MAC-address warnings

2019-10-04 Thread Bin Meng
Hi Simon,

On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> These warnings appear every thing sandbox is run (see below) and dwarf the
> actual useful output. Suppress them.
>
> Hopefully at some point a way can be found to fix the root cause.

Does removing ethaddr env from SANDBOX_ETH_SETTINGS in sandbox.h fix
this problem?

>
> U-Boot 2019.10-rc2
>
> Model: sandbox
> DRAM:  128 MiB
>
> Warning: host_lo MAC addresses don't match:
> Address in ROM is  a6:28:b7:47:28:93
> Address in environment is  00:00:11:22:33:44
>
> Warning: host_enp5s0 MAC addresses don't match:
> Address in ROM is  a6:28:b7:47:28:93
> Address in environment is  00:00:11:22:33:45
>
> Warning: host_eth6 using MAC address from ROM
>
> Warning: host_docker0 MAC addresses don't match:
> Address in ROM is  a6:28:b7:47:28:93
> Address in environment is  00:00:11:22:33:46
>
> Warning: host_docker_gwbridge using MAC address from ROM
>
> Warning: host_veth1118e68 MAC addresses don't match:
> Address in ROM is  a6:28:b7:47:28:93
> Address in environment is  00:00:11:22:33:47
> WDT:   Not found!
> MMC:
> In:cros-ec-keyb
> Out:   vidconsole
> Err:   vidconsole
> Model: sandbox
> SCSI:
> Net:   eth0: host_lo, eth1: host_enp5s0, eth2: host_eth6, eth3: host_docker0, 
> eth4: host_docker_gwbridge, eth5: host_veth1118e68
> Error: eth@10002000 address not set.
> , eth-1: eth@10002000
> Test 'pmc_base' not found
>
> Warning: host_lo MAC addresses don't match:
> Address in ROM is  2a:24:9a:31:90:f8
> Address in environment is  00:00:11:22:33:44
>
> Warning: host_enp5s0 MAC addresses don't match:
> Address in ROM is  ce:23:d9:74:6f:6c
> Address in environment is  00:00:11:22:33:45
>
> Warning: host_eth6 using MAC address from ROM
>
> Warning: host_docker0 MAC addresses don't match:
> Address in ROM is  ee:22:1c:3b:be:bc
> Address in environment is  00:00:11:22:33:46
>
> Warning: host_docker_gwbridge using MAC address from ROM
>
> Warning: host_veth1118e68 MAC addresses don't match:
> Address in ROM is  ae:20:9e:3d:a4:9f
> Address in environment is  00:00:11:22:33:47
>
> Signed-off-by: Simon Glass 
> ---
>
>  net/eth-uclass.c | 34 ++
>  1 file changed, 22 insertions(+), 12 deletions(-)
>

Regards,
Bin
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Re: [U-Boot] [PATCH 022/126] sandbox: pci: Move pci_offset_to_barnum() to pci.h

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> This function is useful in PCI emulators. More it into the header file to
> avoid duplicating it in other drivers.
>
> Signed-off-by: Simon Glass 
> ---
>
>  drivers/misc/swap_case.c | 7 ++-
>  include/pci.h| 4 
>  2 files changed, 6 insertions(+), 5 deletions(-)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH V2 1/3] watchdog: designware: Migrate CONFIG_DESIGNWARE_WATCHDOG to Kconfig

2019-10-04 Thread Ley Foon Tan
On Thu, Oct 3, 2019 at 9:00 PM Marek Vasut  wrote:
>
> Migrate CONFIG_DESIGNWARE_WATCHDOG to Kconfig and update the headers
> accordingly, no functional change. The S10 enables the WDT only in
> SPL, but does not enable it in U-Boot itself, hence disable it in
> the config again.
>
> Signed-off-by: Marek Vasut 
> Cc: Chin Liang See 
> Cc: Dalon Westergreen 
> Cc: Dinh Nguyen 
> Cc: Jagan Teki 
> Cc: Ley Foon Tan 
> Cc: Philipp Tomisch 
> Cc: Simon Goldschmidt 
> Cc: Tien Fong Chee 
> ---
> V2: Use non-DM watchdog in SPL on S10
> ---
>  configs/socfpga_stratix10_defconfig   | 1 +
>  configs/socfpga_vining_fpga_defconfig | 1 +

All socfpga deconfig files need to add CONFIG_DESIGNWARE_WATCHDOG too.
socfpga_common.h is used by Gen5 and A10 platform.

Regards
Ley Foon


>  drivers/watchdog/Kconfig  | 7 +++
>  include/configs/socfpga_common.h  | 3 ---
>  include/configs/socfpga_stratix10_socdk.h | 6 --
>  scripts/config_whitelist.txt  | 1 -
>  6 files changed, 13 insertions(+), 6 deletions(-)
>
> diff --git a/configs/socfpga_stratix10_defconfig 
> b/configs/socfpga_stratix10_defconfig
> index ad83f50032..462082b67b 100644
> --- a/configs/socfpga_stratix10_defconfig
> +++ b/configs/socfpga_stratix10_defconfig CONFIG_DESIGNWARE_WATCHDOG
> @@ -56,3 +56,4 @@ CONFIG_USB=y
>  CONFIG_DM_USB=y
>  CONFIG_USB_DWC2=y
>  CONFIG_USB_STORAGE=y
> +CONFIG_DESIGNWARE_WATCHDOG=y
> diff --git a/configs/socfpga_vining_fpga_defconfig 
> b/configs/socfpga_vining_fpga_defconfig
> index 96f806ab5f..03c43fa8b9 100644
> --- a/configs/socfpga_vining_fpga_defconfig
> +++ b/configs/socfpga_vining_fpga_defconfig
> @@ -91,3 +91,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525
>  CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
>  CONFIG_USB_GADGET_DWC2_OTG=y
>  CONFIG_USB_GADGET_DOWNLOAD=y
> +CONFIG_DESIGNWARE_WATCHDOG=y
> diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
> index a66a9bcbe2..6fd9b0a177 100644
> --- a/drivers/watchdog/Kconfig
> +++ b/drivers/watchdog/Kconfig
> @@ -36,6 +36,13 @@ config ULP_WATCHDOG
> help
>   Say Y here to enable i.MX7ULP watchdog driver.
>
> +config DESIGNWARE_WATCHDOG
> +   bool "Designware watchdog timer support"
> +   select HW_WATCHDOG
> +   help
> +  Enable this to support Designware Watchdog Timer IP, present e.g.
> +  on Altera SoCFPGA SoCs.
> +
>  config WDT
> bool "Enable driver model for watchdog timer drivers"
> depends on DM
> diff --git a/include/configs/socfpga_common.h 
> b/include/configs/socfpga_common.h
> index b11fe021a7..32b9131be0 100644
> --- a/include/configs/socfpga_common.h
> +++ b/include/configs/socfpga_common.h
> @@ -104,12 +104,9 @@
>  /*
>   * L4 Watchdog
>   */
> -#ifdef CONFIG_HW_WATCHDOG
> -#define CONFIG_DESIGNWARE_WATCHDOG
>  #define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
>  #define CONFIG_DW_WDT_CLOCK_KHZ25000
>  #define CONFIG_WATCHDOG_TIMEOUT_MSECS  3
> -#endif
>
>  /*
>   * MMC Driver
> diff --git a/include/configs/socfpga_stratix10_socdk.h 
> b/include/configs/socfpga_stratix10_socdk.h
> index 7b55dd14da..353e08f982 100644
> --- a/include/configs/socfpga_stratix10_socdk.h
> +++ b/include/configs/socfpga_stratix10_socdk.h
> @@ -162,14 +162,16 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
>   */
>  #ifdef CONFIG_SPL_BUILD
>  #define CONFIG_HW_WATCHDOG
> -#define CONFIG_DESIGNWARE_WATCHDOG
> +#else
> +#undef CONFIG_HW_WATCHDOG
> +#undef CONFIG_DESIGNWARE_WATCHDOG
> +#endif
>  #define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
>  #ifndef __ASSEMBLY__
>  unsigned int cm_get_l4_sys_free_clk_hz(void);
>  #define CONFIG_DW_WDT_CLOCK_KHZ(cm_get_l4_sys_free_clk_hz() 
> / 1000)
>  #endif
>  #define CONFIG_WATCHDOG_TIMEOUT_MSECS  3000
> -#endif
>
>  /*
>   * SPL memory layout
> diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
> index b18eab1707..839eda8c0f 100644
> --- a/scripts/config_whitelist.txt
> +++ b/scripts/config_whitelist.txt
> @@ -320,7 +320,6 @@ CONFIG_DEFAULT_IMMR
>  CONFIG_DEF_HWCONFIG
>  CONFIG_DELAY_ENVIRONMENT
>  CONFIG_DESIGNWARE_ETH
> -CONFIG_DESIGNWARE_WATCHDOG
>  CONFIG_DEVELOP
>  CONFIG_DEVICE_TREE_LIST
>  CONFIG_DFU_ALT
> --
> 2.23.0
>
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Re: [U-Boot] [PATCH 011/126] dm: core: Correct the return value for uclass_find_first_device()

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> This function returns -ENODEV when there is no device. This is
> inconsistent with other functions, such as uclass_find_next_device(),
> which returns 0.
>
> Update it and tidy up the incorrect '-1' values in the comments.
>
> Signed-off-by: Simon Glass 
> ---
>
>  drivers/core/uclass.c| 2 +-
>  include/dm/uclass-internal.h | 4 ++--
>  test/dm/core.c   | 3 +--
>  3 files changed, 4 insertions(+), 5 deletions(-)
>

Reviewed-by: Bin Meng 
Tested-by: Bin Meng 
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Re: [U-Boot] [PATCH 014/126] fdt: Show the preprocessed .dts file on error

2019-10-04 Thread Bin Meng
Hi Simon,

On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> When device-tree compilation fails it is sometimes tricky to see which
> line is broken, since the input file to dtc is a pre-processed version
> of the device tree.
>
> Add a line that points to the file that needs to be checked:
>
> Output is something like this:
>
> Error: arch/x86/dts/.chromebook_coral.dtb.pre.tmp:170.15-16 syntax error

This line already provides information that you need.

> FATAL ERROR: Unable to parse input tree
> Check /tmp/b/chromebook_coral/arch/x86/dts/.chromebook_coral.dtb.pre.tmp

I don't understand why we need another line that provides the same information.

>for errors
>
> Signed-off-by: Simon Glass 
> ---
>
>  scripts/Makefile.lib | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>

Regards,
Bin
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Re: [U-Boot] [PATCH 012/126] dm: core: Add device_foreach_child()

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> We have a 'safe' version of this function but sometimes it is not needed.
> Add a normal version too and update a few places that can use it.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/arm/mach-uniphier/pinctrl-glue.c | 4 ++--
>  drivers/block/blk-uclass.c| 4 ++--
>  include/dm/device.h   | 9 +
>  3 files changed, 13 insertions(+), 4 deletions(-)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH 009/126] dm: core: Call ofdata_to_platdata() with of-platdata

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> At present this function is never called when of-platdata is enabled since
> we never have a device tree. However, this function is responsible for
> copying over the of-platdata, so we must call it. Otherwise the probe()
> method would have to be used.
>
> Correct this and fix the sandbox serial driver to not read from the device
> tree and try to write to what is read-only platdata on some platforms.
>
> Fixes: 396e343b3d (dm: core: Allow binding a device from a live tree)
> Signed-off-by: Simon Glass 
> ---
>
>  drivers/core/device.c| 3 ++-
>  drivers/serial/sandbox.c | 2 ++
>  2 files changed, 4 insertions(+), 1 deletion(-)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH 010/126] dm: doc: Correct of-platdata CONFIG_IS_ENABLED() condition

2019-10-04 Thread Bin Meng
Hi Simon,

On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> This condition is not correct since it should not include an SPL_ prefix.
> Fix it and also add a note about the driver name in the same file.
>
> Signed-off-by: Simon Glass 
> ---
>
>  doc/driver-model/of-plat.rst | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/doc/driver-model/of-plat.rst b/doc/driver-model/of-plat.rst
> index a38e58e4d29..557957d2a16 100644
> --- a/doc/driver-model/of-plat.rst
> +++ b/doc/driver-model/of-plat.rst
> @@ -269,7 +269,7 @@ For example:
>  };
>
>  U_BOOT_DRIVER(mmc_drv) = {
> -.name   = "mmc",
> +.name   = "vendor_mmc",  /* matches compatible string */

This single line change only does half of what the commit message
says. Where is the other half?

>  .id = UCLASS_MMC,
>  .of_match   = mmc_ids,
>  .ofdata_to_platdata = mmc_ofdata_to_platdata,
> --

Regards,
Bin
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Re: [U-Boot] [PATCH 008/126] dm: test: Don't fail when tests are skipped due to build

2019-10-04 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> At present tests that are marked as only for livetree fail when executed
> on sandbox_flattree. They cannot actually be executed, but we should not
> resport them as 'not found', since this causes errors. Instead, they
> should be silently skipped.
>
> Signed-off-by: Simon Glass 
> ---
>
>  test/dm/test-main.c | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
>

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[U-Boot] [PATCH 2/4] arm64: xilinx: Move firmware functions from platform to driver

2019-10-04 Thread Michal Simek
versal_pm_request() and invoke_smc() are almost the same. Only one
difference is that versal_pm_request is adding PM_SIP_SVC offset to api_id.
The patch is moving platform implementation to firmware driver code for
synchronization.

Signed-off-by: Michal Simek 
---

 arch/arm/mach-versal/cpu.c| 26 -
 arch/arm/mach-versal/include/mach/sys_proto.h |  3 --
 arch/arm/mach-zynqmp/cpu.c| 26 -
 arch/arm/mach-zynqmp/include/mach/sys_proto.h |  2 -
 drivers/firmware/firmware-zynqmp.c| 38 ++-
 drivers/fpga/versalpl.c   |  1 +
 include/zynqmp_firmware.h |  4 ++
 7 files changed, 42 insertions(+), 58 deletions(-)

diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c
index 0d10e7f194db..46ab5348d732 100644
--- a/arch/arm/mach-versal/cpu.c
+++ b/arch/arm/mach-versal/cpu.c
@@ -10,7 +10,6 @@
 #include 
 #include 
 #include 
-#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -109,28 +108,3 @@ int reserve_mmu(void)
return 0;
 }
 #endif
-
-int versal_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
- u32 arg3, u32 *ret_payload)
-{
-   struct pt_regs regs;
-
-   if (current_el() == 3)
-   return 0;
-
-   regs.regs[0] = PM_SIP_SVC | api_id;
-   regs.regs[1] = ((u64)arg1 << 32) | arg0;
-   regs.regs[2] = ((u64)arg3 << 32) | arg2;
-
-   smc_call();
-
-   if (ret_payload) {
-   ret_payload[0] = (u32)regs.regs[0];
-   ret_payload[1] = upper_32_bits(regs.regs[0]);
-   ret_payload[2] = (u32)regs.regs[1];
-   ret_payload[3] = upper_32_bits(regs.regs[1]);
-   ret_payload[4] = (u32)regs.regs[2];
-   }
-
-   return regs.regs[0];
-}
diff --git a/arch/arm/mach-versal/include/mach/sys_proto.h 
b/arch/arm/mach-versal/include/mach/sys_proto.h
index c282078f8626..31af049a21c9 100644
--- a/arch/arm/mach-versal/include/mach/sys_proto.h
+++ b/arch/arm/mach-versal/include/mach/sys_proto.h
@@ -12,6 +12,3 @@ enum {
 
 void tcm_init(u8 mode);
 void mem_map_fill(void);
-
-int versal_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
- u32 arg3, u32 *ret_payload);
diff --git a/arch/arm/mach-zynqmp/cpu.c b/arch/arm/mach-zynqmp/cpu.c
index bb21cbcadf69..ef73a75cf9a3 100644
--- a/arch/arm/mach-zynqmp/cpu.c
+++ b/arch/arm/mach-zynqmp/cpu.c
@@ -154,32 +154,6 @@ unsigned int zynqmp_get_silicon_version(void)
 #define ZYNQMP_MMIO_READ   0xC214
 #define ZYNQMP_MMIO_WRITE  0xC213
 
-int __maybe_unused invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2,
- u32 arg3, u32 *ret_payload)
-{
-   /*
-* Added SIP service call Function Identifier
-* Make sure to stay in x0 register
-*/
-   struct pt_regs regs;
-
-   regs.regs[0] = pm_api_id;
-   regs.regs[1] = ((u64)arg1 << 32) | arg0;
-   regs.regs[2] = ((u64)arg3 << 32) | arg2;
-
-   smc_call();
-
-   if (ret_payload != NULL) {
-   ret_payload[0] = (u32)regs.regs[0];
-   ret_payload[1] = upper_32_bits(regs.regs[0]);
-   ret_payload[2] = (u32)regs.regs[1];
-   ret_payload[3] = upper_32_bits(regs.regs[1]);
-   ret_payload[4] = (u32)regs.regs[2];
-   }
-
-   return regs.regs[0];
-}
-
 static int zynqmp_mmio_rawwrite(const u32 address,
  const u32 mask,
  const u32 value)
diff --git a/arch/arm/mach-zynqmp/include/mach/sys_proto.h 
b/arch/arm/mach-zynqmp/include/mach/sys_proto.h
index 69e729fb7625..10b70761de4a 100644
--- a/arch/arm/mach-zynqmp/include/mach/sys_proto.h
+++ b/arch/arm/mach-zynqmp/include/mach/sys_proto.h
@@ -50,8 +50,6 @@ void handoff_setup(void);
 
 int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value);
 int zynqmp_mmio_read(const u32 address, u32 *value);
-int invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3,
-  u32 *ret_payload);
 
 void initialize_tcm(bool mode);
 void mem_map_fill(void);
diff --git a/drivers/firmware/firmware-zynqmp.c 
b/drivers/firmware/firmware-zynqmp.c
index 42a627e1dd05..11f5030e85c7 100644
--- a/drivers/firmware/firmware-zynqmp.c
+++ b/drivers/firmware/firmware-zynqmp.c
@@ -7,10 +7,10 @@
 
 #include 
 #include 
+#include 
 
 #if defined(CONFIG_ZYNQMP_IPI)
 #include 
-#include 
 #include 
 
 #define PMUFW_PAYLOAD_ARG_CNT  8
@@ -147,6 +147,42 @@ U_BOOT_DRIVER(zynqmp_power) = {
 };
 #endif
 
+int __maybe_unused invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2,
+ u32 arg3, u32 *ret_payload)
+{
+   /*
+* Added SIP service call Function Identifier
+* Make sure to stay in x0 register
+*/
+   struct pt_regs regs;
+
+   if (current_el() == 3)
+   return 0;
+
+   regs.regs[0] = pm_api_id;
+   regs.regs[1] = ((u64)arg1 << 32) | arg0;
+   regs.regs[2] 

[U-Boot] [PATCH 4/4] arm64: zynqmp: Convert invoke_smc() to xilinx_pm_request()

2019-10-04 Thread Michal Simek
Remove macros which use PM_SIP_SVC offset and convert invoke_smc() to
xilinx_pm_request() which do calculation with PM_SIP_SVC already.

Signed-off-by: Michal Simek 
---

 arch/arm/mach-zynqmp/cpu.c | 11 ---
 board/xilinx/zynqmp/cmds.c |  4 ++--
 drivers/firmware/firmware-zynqmp.c | 15 ---
 drivers/fpga/zynqmppl.c| 16 +---
 include/zynqmp_firmware.h  |  4 
 5 files changed, 19 insertions(+), 31 deletions(-)

diff --git a/arch/arm/mach-zynqmp/cpu.c b/arch/arm/mach-zynqmp/cpu.c
index ef73a75cf9a3..0d79ba5b1459 100644
--- a/arch/arm/mach-zynqmp/cpu.c
+++ b/arch/arm/mach-zynqmp/cpu.c
@@ -151,9 +151,6 @@ unsigned int zynqmp_get_silicon_version(void)
return ZYNQMP_CSU_VERSION_SILICON;
 }
 
-#define ZYNQMP_MMIO_READ   0xC214
-#define ZYNQMP_MMIO_WRITE  0xC213
-
 static int zynqmp_mmio_rawwrite(const u32 address,
  const u32 mask,
  const u32 value)
@@ -186,8 +183,8 @@ int zynqmp_mmio_write(const u32 address,
if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3)
return zynqmp_mmio_rawwrite(address, mask, value);
else
-   return invoke_smc(ZYNQMP_MMIO_WRITE, address, mask,
- value, 0, NULL);
+   return xilinx_pm_request(PM_MMIO_WRITE, address, mask,
+value, 0, NULL);
 
return -EINVAL;
 }
@@ -203,8 +200,8 @@ int zynqmp_mmio_read(const u32 address, u32 *value)
if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) {
ret = zynqmp_mmio_rawread(address, value);
} else {
-   ret = invoke_smc(ZYNQMP_MMIO_READ, address, 0, 0,
-0, ret_payload);
+   ret = xilinx_pm_request(PM_MMIO_READ, address, 0, 0,
+   0, ret_payload);
*value = ret_payload[1];
}
 
diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c
index f53a1b63bea6..d3bb57a2e94a 100644
--- a/board/xilinx/zynqmp/cmds.c
+++ b/board/xilinx/zynqmp/cmds.c
@@ -51,8 +51,8 @@ static int do_zynqmp_verify_secure(cmd_tbl_t *cmdtp, int 
flag, int argc,
   (ulong)(key_ptr + KEY_PTR_LEN));
}
 
-   ret = invoke_smc(ZYNQMP_SIP_SVC_PM_SECURE_IMG_LOAD, src_lo, src_hi,
-key_lo, key_hi, ret_payload);
+   ret = xilinx_pm_request(PM_SECURE_IMAGE, src_lo, src_hi,
+   key_lo, key_hi, ret_payload);
if (ret) {
printf("Failed: secure op status:0x%x\n", ret);
} else {
diff --git a/drivers/firmware/firmware-zynqmp.c 
b/drivers/firmware/firmware-zynqmp.c
index e8fbf1f5644d..8c6b71cd7076 100644
--- a/drivers/firmware/firmware-zynqmp.c
+++ b/drivers/firmware/firmware-zynqmp.c
@@ -54,7 +54,7 @@ static int send_req(const u32 *req, size_t req_len, u32 *res, 
size_t res_maxlen)
if (IS_ENABLED(CONFIG_SPL_BUILD))
return ipi_req(req, req_len, res, res_maxlen);
 
-   return invoke_smc(req[0] + PM_SIP_SVC, 0, 0, 0, 0, res);
+   return xilinx_pm_request(req[0], 0, 0, 0, 0, res);
 }
 
 unsigned int zynqmp_firmware_version(void)
@@ -147,8 +147,8 @@ U_BOOT_DRIVER(zynqmp_power) = {
 };
 #endif
 
-int __maybe_unused invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2,
- u32 arg3, u32 *ret_payload)
+int __maybe_unused xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
+u32 arg3, u32 *ret_payload)
 {
/*
 * Added SIP service call Function Identifier
@@ -159,7 +159,7 @@ int __maybe_unused invoke_smc(u32 pm_api_id, u32 arg0, u32 
arg1, u32 arg2,
if (current_el() == 3)
return 0;
 
-   regs.regs[0] = pm_api_id;
+   regs.regs[0] = PM_SIP_SVC | api_id;
regs.regs[1] = ((u64)arg1 << 32) | arg0;
regs.regs[2] = ((u64)arg3 << 32) | arg2;
 
@@ -176,13 +176,6 @@ int __maybe_unused invoke_smc(u32 pm_api_id, u32 arg0, u32 
arg1, u32 arg2,
return regs.regs[0];
 }
 
-int __maybe_unused xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
-u32 arg3, u32 *ret_payload)
-{
-   return invoke_smc(PM_SIP_SVC | api_id, arg0, arg1, arg2, arg3,
- ret_payload);
-}
-
 static const struct udevice_id zynqmp_firmware_ids[] = {
{ .compatible = "xlnx,zynqmp-firmware" },
{ .compatible = "xlnx,versal-firmware-wip"},
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index c2670271c8ea..d129b5459c00 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -227,11 +227,12 @@ static int zynqmp_load(xilinx_desc *desc, const void 
*buf, size_t bsize,
buf_hi = upper_32_bits(bin_buf);
 
if (xilfpga_old)
-   ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, buf_lo, buf_hi,
-   

[U-Boot] [PATCH 0/4] xilinx: firmware: Synchronization firmware functions

2019-10-04 Thread Michal Simek
Hi,

Versal and ZynqMP are using the same firmware interface that's why some
synchronization should be done.
Still there are zynqmp_mmio_read/write which should be converted.
Patches are done in steps for easier reviewing.

Thanks,
Michal


Michal Simek (4):
  arm64: versal: Clean pm_api_id usage
  arm64: xilinx: Move firmware functions from platform to driver
  arm64: versal: Rename versal_pm_request to xilinx_pm_request
  arm64: zynqmp: Convert invoke_smc() to xilinx_pm_request()

 arch/arm/mach-versal/cpu.c| 25 
 arch/arm/mach-versal/include/mach/sys_proto.h | 58 ---
 arch/arm/mach-zynqmp/cpu.c| 37 ++--
 arch/arm/mach-zynqmp/include/mach/sys_proto.h |  2 -
 board/xilinx/zynqmp/cmds.c|  4 +-
 drivers/clk/clk_versal.c  | 15 ++---
 drivers/firmware/firmware-zynqmp.c| 33 ++-
 drivers/fpga/versalpl.c   |  3 +-
 drivers/fpga/zynqmppl.c   | 16 ++---
 include/zynqmp_firmware.h | 54 -
 10 files changed, 107 insertions(+), 140 deletions(-)

-- 
2.17.1

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[U-Boot] [PATCH 3/3] gitlab-ci: Switch to Ubuntu 18.04 image

2019-10-04 Thread Tom Rini
In order to run all filesystem tests we need to have newer ext4 tools,
move up to Ubuntu 18.04 'bionic' for our base.  We need to change
slightly how we invoke the provided grub-mkimage.  This will also make
future python3 work easier.

Signed-off-by: Tom Rini 
---
 .gitlab-ci.yml | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 7ca71a0d6b37..27c65fcf956d 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -2,7 +2,7 @@
 
 # Grab our configured image.  The source for this is found at:
 # https://gitlab.denx.de/u-boot/gitlab-ci-runner
-image: trini/u-boot-gitlab-ci-runner:xenial-20190720-02Aug2019
+image: trini/u-boot-gitlab-ci-runner:bionic-20190912.1-03Oct2019
 
 # We run some tests in different order, to catch some failures quicker.
 stages:
@@ -22,8 +22,9 @@ stages:
 - . /tmp/venv/bin/activate
 - pip install pytest==2.8.7
 - pip install python-subunit
-- grub-mkimage -o ~/grub_x86.efi -O i386-efi normal  echo lsefimmap lsefi 
lsefisystab efinet tftp minicmd
-- grub-mkimage -o ~/grub_x64.efi -O x86_64-efi normal  echo lsefimmap 
lsefi lsefisystab efinet tftp minicmd
+- pip install coverage
+- grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal  echo 
lsefimmap lsefi lsefisystab efinet tftp minicmd
+- grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal  echo 
lsefimmap lsefi lsefisystab efinet tftp minicmd
 - mkdir ~/grub2-arm
 - ( cd ~/grub2-arm; wget -O - 
http://download.opensuse.org/ports/armv7hl/distribution/leap/42.2/repo/oss/suse/armv7hl/grub2-arm-efi-2.02~beta2-87.1.armv7hl.rpm
 | rpm2cpio | cpio -di )
 - mkdir ~/grub2-arm64
-- 
2.17.1

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[U-Boot] [PATCH 2/3] gitlab-ci: Have buildman use /tmp for output

2019-10-04 Thread Tom Rini
When running as another user we might not be able to use '..' for
certain directories and this is the default for buildman.  Specify an
output directory instead.

Signed-off-by: Tom Rini 
---
 .gitlab-ci.yml | 26 +-
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index a1c5b4fc766f..7ca71a0d6b37 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -36,9 +36,9 @@ stages:
 # use clang only do one configuration.
 - if [[ "${BUILDMAN}" != "" ]]; then
 ret=0;
-tools/buildman/buildman -P -E ${BUILDMAN} ${OVERRIDE}|| ret=$?;
+tools/buildman/buildman -o /tmp -P -E ${BUILDMAN} ${OVERRIDE}|| ret=$?;
 if [[ $ret -ne 0 && $ret -ne 129 ]]; then
-  tools/buildman/buildman -sdeP ${BUILDMAN};
+  tools/buildman/buildman -o /tmp -sdeP ${BUILDMAN};
   exit $ret;
 fi;
   fi
@@ -46,7 +46,7 @@ stages:
 # never prevent any test from running. That way, we can always pass
 # "-k something" even when $TEST_PY_TEST_SPEC doesnt need a custom
 # value.
-- export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/.bm-work/${TEST_PY_BD};
+- export UBOOT_TRAVIS_BUILD_DIR=/tmp/.bm-work/${TEST_PY_BD};
   export PATH=/opt/qemu/bin:/tmp/uboot-test-hooks/bin:/usr/bin:/bin;
   export PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci;
   if [[ "${TEST_PY_BD}" != "" ]]; then
@@ -64,9 +64,9 @@ build all 32bit ARM plaforms:
   stage: world build
   script:
 - ret=0;
- ./tools/buildman/buildman -P -E arm -x aarch64 || ret=$?;
+ ./tools/buildman/buildman -o /tmp -P -E arm -x aarch64 || ret=$?;
  if [[ $ret -ne 0 && $ret -ne 129 ]]; then
-   ./tools/buildman/buildman -sdeP;
+   ./tools/buildman/buildman -o /tmp -sdeP;
exit $ret;
  fi;
 
@@ -78,9 +78,9 @@ build all 64bit ARM plaforms:
 - . /tmp/venv/bin/activate
 - pip install pyelftools
 - ret=0;
- ./tools/buildman/buildman -P -E aarch64 || ret=$?;
+ ./tools/buildman/buildman -o /tmp -P -E aarch64 || ret=$?;
  if [[ $ret -ne 0 && $ret -ne 129 ]]; then
-   ./tools/buildman/buildman -sdeP;
+   ./tools/buildman/buildman -o /tmp -sdeP;
exit $ret;
  fi;
 
@@ -89,9 +89,9 @@ build all PowerPC plaforms:
   stage: world build
   script:
 - ret=0;
- ./tools/buildman/buildman -P -E powerpc || ret=$?;
+ ./tools/buildman/buildman -o /tmp -P -E powerpc || ret=$?;
  if [[ $ret -ne 0 && $ret -ne 129 ]]; then
-   ./tools/buildman/buildman -sdeP;
+   ./tools/buildman/buildman -o /tmp -sdeP;
exit $ret;
  fi;
 
@@ -100,9 +100,9 @@ build all other plaforms:
   stage: world build
   script:
 - ret=0;
- ./tools/buildman/buildman -P -E -x arm,powerpc || ret=$?;
+ ./tools/buildman/buildman -o /tmp -P -E -x arm,powerpc || ret=$?;
  if [[ $ret -ne 0 && $ret -ne 129 ]]; then
-   ./tools/buildman/buildman -sdeP;
+   ./tools/buildman/buildman -o /tmp -sdeP;
exit $ret;
  fi;
 
@@ -162,10 +162,10 @@ Run binman, buildman, dtoc and patman testsuites:
   virtualenv /tmp/venv;
   . /tmp/venv/bin/activate;
   pip install pyelftools;
-  export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/.bm-work/sandbox_spl;
+  export UBOOT_TRAVIS_BUILD_DIR=/tmp/.bm-work/sandbox_spl;
   export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt";
   export PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}";
-  ./tools/buildman/buildman -P sandbox_spl;
+  ./tools/buildman/buildman -o /tmp -P sandbox_spl;
   ./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test;
   ./tools/buildman/buildman -t;
   ./tools/dtoc/dtoc -t;
-- 
2.17.1

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Re: [U-Boot] [PATCH 2/3] imx: add the i.MX8M reset controller node

2019-10-04 Thread Fabio Estevam
Hi Patrick,

On Fri, Oct 4, 2019 at 12:50 PM Patrick Wildt  wrote:

> yes, that's true.  It does make sense to sync the device trees and
> do the name change.  Can the diff with the reset controller driver
> (patch 1/3) be merged anyway, and I'll follow up with the DTS change?
> Would be easier for me to handle the number of patches to submit.

I think so.

Stefano is the one who will apply your patch if he is happy with it.

Regards,

Fabio Estevam
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[U-Boot] [gitlab-ci-runner][PATCH 2/2] Dockerfile: Update to current bionic tag

2019-10-04 Thread Tom Rini
As part of this we stop installing python-pytest (we enforce a specific
version via pip in tests) as well as python-coverage (this can and
should be done via pip as well).

Signed-off-by: Tom Rini 
---
 Dockerfile | 12 +++-
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/Dockerfile b/Dockerfile
index c7b35026a171..bf840a5f1b33 100644
--- a/Dockerfile
+++ b/Dockerfile
@@ -2,7 +2,7 @@
 # This Dockerfile is used to build an image containing basic stuff to be used
 # to build U-Boot and run our test suites.
 
-FROM ubuntu:xenial-20190720
+FROM ubuntu:bionic-20190912.1
 MAINTAINER Tom Rini 
 LABEL Description=" This image is for building U-Boot inside a container"
 
@@ -10,9 +10,9 @@ LABEL Description=" This image is for building U-Boot inside 
a container"
 ENV DEBIAN_FRONTEND=noninteractive
 
 # Add LLVM repository
-RUN apt-get update && apt-get install -y wget xz-utils && rm -rf 
/var/lib/apt/lists/*
+RUN apt-get update && apt-get install -y gnupg2 wget xz-utils && rm -rf 
/var/lib/apt/lists/*
 RUN wget -O - https://apt.llvm.org/llvm-snapshot.gpg.key | apt-key add -
-RUN echo deb http://apt.llvm.org/xenial/ llvm-toolchain-xenial-7 main | tee 
/etc/apt/sources.list.d/llvm.list
+RUN echo deb http://apt.llvm.org/bionic/ llvm-toolchain-bionic-7 main | tee 
/etc/apt/sources.list.d/llvm.list
 
 # Manually install the kernel.org "Crosstool" based toolchains for gcc-7.3
 RUN wget -O - 
https://mirrors.edge.kernel.org/pub/tools/crosstool/files/bin/x86_64/7.3.0/x86_64-gcc-7.3.0-nolibc_aarch64-linux.tar.xz
 | tar -C /opt -xJ
@@ -52,6 +52,7 @@ RUN apt-get update && apt-get install -y \
grub-efi-ia32-bin \
iasl \
iputils-ping \
+   libisl15 \
liblz4-tool \
libpixman-1-dev \
libpython-dev \
@@ -63,10 +64,8 @@ RUN apt-get update && apt-get install -y \
lzop \
picocom \
python \
-   python-coverage \
python-dev \
python-pip \
-   python-pytest \
python-virtualenv \
python3-sphinx \
rpm2cpio \
@@ -79,6 +78,9 @@ RUN apt-get update && apt-get install -y \
zip \
&& rm -rf /var/lib/apt/lists/*
 
+# Manually install libmpfr4 for the toolchains
+RUN wget 
http://mirrors.kernel.org/ubuntu/pool/main/m/mpfr4/libmpfr4_3.1.4-1_amd64.deb 
&& dpkg -i libmpfr4_3.1.4-1_amd64.deb && rm libmpfr4_3.1.4-1_amd64.deb
+
 # Build GRUB UEFI targets grubarm.efi and grubaa64.efi
 RUN git clone git://git.savannah.gnu.org/grub.git /tmp/grub && \
cd /tmp/grub && \
-- 
2.17.1

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[U-Boot] [gitlab-ci-runner][PATCH 1/2] Dockerfile: Switch to non-root user

2019-10-04 Thread Tom Rini
Add a 'uboot' user / group, allow them sudo access and make use of them
in the container.

Signed-off-by: Tom Rini 
---
 Dockerfile | 5 +
 1 file changed, 5 insertions(+)

diff --git a/Dockerfile b/Dockerfile
index 1d7a3dae39d0..c7b35026a171 100644
--- a/Dockerfile
+++ b/Dockerfile
@@ -136,6 +136,11 @@ RUN git clone git://git.qemu.org/qemu.git /tmp/qemu && \
make -j$(nproc) all install && \
rm -rf /tmp/qemu
 
+# Create our user/group
+RUN echo uboot ALL=NOPASSWD: ALL > /etc/sudoers.d/uboot
+RUN useradd -m -U uboot
+USER uboot:uboot
+
 # Create the buildman config file
 RUN /bin/echo -e "[toolchain]\nroot = /usr" > ~/.buildman
 RUN /bin/echo -e "kernelorg = /opt/gcc-7.3.0-nolibc/*" >> ~/.buildman
-- 
2.17.1

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Re: [U-Boot] [PATCH 2/3] imx: add the i.MX8M reset controller node

2019-10-04 Thread Patrick Wildt
On Fri, Oct 04, 2019 at 09:39:29AM -0300, Fabio Estevam wrote:
> Hi Patrick,
> 
> On Thu, Oct 3, 2019 at 11:12 AM Patrick Wildt  wrote:
> >
> > This patch adds the reset controller node to the i.MX8MQ SoC
> > device tree.
> >
> > Signed-off-by: Patrick Wildt 
> > ---
> >  arch/arm/dts/fsl-imx8mq.dtsi | 7 +++
> >  1 file changed, 7 insertions(+)
> >
> > diff --git a/arch/arm/dts/fsl-imx8mq.dtsi b/arch/arm/dts/fsl-imx8mq.dtsi
> > index c35c23e293..d843b401be 100644
> > --- a/arch/arm/dts/fsl-imx8mq.dtsi
> > +++ b/arch/arm/dts/fsl-imx8mq.dtsi
> > @@ -19,6 +19,7 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include 
> >
> >  / {
> > @@ -269,6 +270,12 @@
> > #clock-cells = <1>;
> > };
> >
> > +   src: reset-controller@3039 {
> > +   compatible = "fsl,imx8mq-src", "syscon";
> > +   reg = <0x0 0x3039 0x0 0x1>;
> > +   #reset-cells = <1>;
> 
> This reset-controller node is already part of the upstream kernel imx8mq.dtsi.
> 
> What about syncing the U-Boot version with the one from kernel 5.3.2?
> Also, please note the dtsi name change.
> 
> Thanks

Hi Fabio,

yes, that's true.  It does make sense to sync the device trees and
do the name change.  Can the diff with the reset controller driver
(patch 1/3) be merged anyway, and I'll follow up with the DTS change?
Would be easier for me to handle the number of patches to submit.

Thank you for the review!

Best regards,
Patrick

> 
> > +   };
> > +
> > gpc: gpc@303a {
> > compatible = "fsl,imx8mq-gpc", "fsl,imx7d-gpc", "syscon";
> > reg = <0x0 0x303a 0x0 0x1>;
> > --
> > 2.23.0
> >
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[U-Boot] [PATCH 1/3] buildman: Perform tests in /tmp

2019-10-04 Thread Tom Rini
We may not always be able to write to the default output directory but
we will always have a usable /tmp.  Make the buildman tests use /tmp

Cc: Simon Glass 
Signed-off-by: Tom Rini 
---
 tools/buildman/func_test.py | 24 
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/tools/buildman/func_test.py b/tools/buildman/func_test.py
index 119d02cbb2b6..99cf46772639 100644
--- a/tools/buildman/func_test.py
+++ b/tools/buildman/func_test.py
@@ -421,7 +421,7 @@ class TestFunctional(unittest.TestCase):
 def testCurrentSource(self):
 """Very simple test to invoke buildman on the current source"""
 self.setupToolchains();
-self._RunControl()
+self._RunControl('-o', '/tmp')
 lines = terminal.GetPrintTestLines()
 self.assertIn('Building current source for %d boards' % len(boards),
   lines[0].text)
@@ -434,7 +434,7 @@ class TestFunctional(unittest.TestCase):
 def testBadToolchain(self):
 """Test that missing toolchains are detected"""
 self.setupToolchains();
-ret_code = self._RunControl('-b', TEST_BRANCH)
+ret_code = self._RunControl('-b', TEST_BRANCH, '-o', '/tmp')
 lines = terminal.GetPrintTestLines()
 
 # Buildman always builds the upstream commit as well
@@ -458,13 +458,13 @@ class TestFunctional(unittest.TestCase):
 
 def testBranch(self):
 """Test building a branch with all toolchains present"""
-self._RunControl('-b', TEST_BRANCH)
+self._RunControl('-b', TEST_BRANCH, '-o', '/tmp')
 self.assertEqual(self._builder.count, self._total_builds)
 self.assertEqual(self._builder.fail, 0)
 
 def testCount(self):
 """Test building a specific number of commitst"""
-self._RunControl('-b', TEST_BRANCH, '-c2')
+self._RunControl('-b', TEST_BRANCH, '-c2', '-o', '/tmp')
 self.assertEqual(self._builder.count, 2 * len(boards))
 self.assertEqual(self._builder.fail, 0)
 # Each board has a mrproper, config, and then one make per commit
@@ -472,34 +472,34 @@ class TestFunctional(unittest.TestCase):
 
 def testIncremental(self):
 """Test building a branch twice - the second time should do nothing"""
-self._RunControl('-b', TEST_BRANCH)
+self._RunControl('-b', TEST_BRANCH, '-o', '/tmp')
 
 # Each board has a mrproper, config, and then one make per commit
 self.assertEqual(self._make_calls, len(boards) * (self._commits + 2))
 self._make_calls = 0
-self._RunControl('-b', TEST_BRANCH, clean_dir=False)
+self._RunControl('-b', TEST_BRANCH, '-o', '/tmp', clean_dir=False)
 self.assertEqual(self._make_calls, 0)
 self.assertEqual(self._builder.count, self._total_builds)
 self.assertEqual(self._builder.fail, 0)
 
 def testForceBuild(self):
 """The -f flag should force a rebuild"""
-self._RunControl('-b', TEST_BRANCH)
+self._RunControl('-b', TEST_BRANCH, '-o', '/tmp')
 self._make_calls = 0
-self._RunControl('-b', TEST_BRANCH, '-f', clean_dir=False)
+self._RunControl('-b', TEST_BRANCH, '-f', '-o', '/tmp', 
clean_dir=False)
 # Each board has a mrproper, config, and then one make per commit
 self.assertEqual(self._make_calls, len(boards) * (self._commits + 2))
 
 def testForceReconfigure(self):
 """The -f flag should force a rebuild"""
-self._RunControl('-b', TEST_BRANCH, '-C')
+self._RunControl('-b', TEST_BRANCH, '-C', '-o', '/tmp')
 # Each commit has a mrproper, config and make
 self.assertEqual(self._make_calls, len(boards) * self._commits * 3)
 
 def testErrors(self):
 """Test handling of build errors"""
 self._error['board2', 1] = 'fred\n'
-self._RunControl('-b', TEST_BRANCH)
+self._RunControl('-b', TEST_BRANCH, '-o', '/tmp')
 self.assertEqual(self._builder.count, self._total_builds)
 self.assertEqual(self._builder.fail, 1)
 
@@ -507,13 +507,13 @@ class TestFunctional(unittest.TestCase):
 # not be rebuilt
 del self._error['board2', 1]
 self._make_calls = 0
-self._RunControl('-b', TEST_BRANCH, clean_dir=False)
+self._RunControl('-b', TEST_BRANCH, '-o', '/tmp', clean_dir=False)
 self.assertEqual(self._builder.count, self._total_builds)
 self.assertEqual(self._make_calls, 0)
 self.assertEqual(self._builder.fail, 1)
 
 # Now use the -F flag to force rebuild of the bad commit
-self._RunControl('-b', TEST_BRANCH, '-F', clean_dir=False)
+self._RunControl('-b', TEST_BRANCH, '-o', '/tmp', '-F', 
clean_dir=False)
 self.assertEqual(self._builder.count, self._total_builds)
 self.assertEqual(self._builder.fail, 0)
 self.assertEqual(self._make_calls, 3)
-- 
2.17.1

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[U-Boot] [PATCH 1/4] arm64: versal: Clean pm_api_id usage

2019-10-04 Thread Michal Simek
Copy enum values from platform code to firmware code. IDs are shared
between ZynqMP and Versal.

Signed-off-by: Michal Simek 
---

 arch/arm/mach-versal/cpu.c|  1 +
 arch/arm/mach-versal/include/mach/sys_proto.h | 55 ---
 drivers/clk/clk_versal.c  |  1 +
 include/zynqmp_firmware.h | 50 -
 4 files changed, 51 insertions(+), 56 deletions(-)

diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c
index 909949a76ab8..0d10e7f194db 100644
--- a/arch/arm/mach-versal/cpu.c
+++ b/arch/arm/mach-versal/cpu.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arm/mach-versal/include/mach/sys_proto.h 
b/arch/arm/mach-versal/include/mach/sys_proto.h
index 2f5ad02bf476..c282078f8626 100644
--- a/arch/arm/mach-versal/include/mach/sys_proto.h
+++ b/arch/arm/mach-versal/include/mach/sys_proto.h
@@ -8,61 +8,6 @@ enum {
TCM_SPLIT,
 };
 
-enum pm_api_id {
-   PM_GET_API_VERSION = 1,
-   PM_SET_CONFIGURATION,
-   PM_GET_NODE_STATUS,
-   PM_GET_OPERATING_CHARACTERISTIC,
-   PM_REGISTER_NOTIFIER,
-   PM_REQUEST_SUSPEND,
-   PM_SELF_SUSPEND,
-   PM_FORCE_POWERDOWN,
-   PM_ABORT_SUSPEND,
-   PM_REQUEST_WAKEUP,
-   PM_SET_WAKEUP_SOURCE,
-   PM_SYSTEM_SHUTDOWN,
-   PM_REQUEST_NODE,
-   PM_RELEASE_NODE,
-   PM_SET_REQUIREMENT,
-   PM_SET_MAX_LATENCY,
-   PM_RESET_ASSERT,
-   PM_RESET_GET_STATUS,
-   PM_MMIO_WRITE,
-   PM_MMIO_READ,
-   PM_PM_INIT_FINALIZE,
-   PM_FPGA_LOAD,
-   PM_FPGA_GET_STATUS,
-   PM_GET_CHIPID,
-   PM_SECURE_SHA = 26,
-   PM_SECURE_RSA,
-   PM_PINCTRL_REQUEST,
-   PM_PINCTRL_RELEASE,
-   PM_PINCTRL_GET_FUNCTION,
-   PM_PINCTRL_SET_FUNCTION,
-   PM_PINCTRL_CONFIG_PARAM_GET,
-   PM_PINCTRL_CONFIG_PARAM_SET,
-   PM_IOCTL,
-   PM_QUERY_DATA,
-   PM_CLOCK_ENABLE,
-   PM_CLOCK_DISABLE,
-   PM_CLOCK_GETSTATE,
-   PM_CLOCK_SETDIVIDER,
-   PM_CLOCK_GETDIVIDER,
-   PM_CLOCK_SETRATE,
-   PM_CLOCK_GETRATE,
-   PM_CLOCK_SETPARENT,
-   PM_CLOCK_GETPARENT,
-   PM_SECURE_IMAGE,
-   PM_FPGA_READ = 46,
-   PM_SECURE_AES,
-   PM_CLOCK_PLL_GETPARAM = 49,
-   PM_REGISTER_ACCESS = 52,
-   PM_EFUSE_ACCESS,
-   PM_FEATURE_CHECK = 63,
-   PM_API_MAX,
-};
-
-#define PM_SIP_SVC 0xC200
 #define PAYLOAD_ARG_CNT4U
 
 void tcm_init(u8 mode);
diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c
index df87645774c5..e0fa661be9e0 100644
--- a/drivers/clk/clk_versal.c
+++ b/drivers/clk/clk_versal.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define MAX_PARENT 100
 #define MAX_NODES  6
diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h
index a20cbcdb869e..742934814cb0 100644
--- a/include/zynqmp_firmware.h
+++ b/include/zynqmp_firmware.h
@@ -11,7 +11,55 @@
 enum pm_api_id {
PM_GET_API_VERSION = 1,
PM_SET_CONFIGURATION,
-   PM_SECURE_IMAGE = 45,
+   PM_GET_NODE_STATUS,
+   PM_GET_OPERATING_CHARACTERISTIC,
+   PM_REGISTER_NOTIFIER,
+   PM_REQUEST_SUSPEND,
+   PM_SELF_SUSPEND,
+   PM_FORCE_POWERDOWN,
+   PM_ABORT_SUSPEND,
+   PM_REQUEST_WAKEUP,
+   PM_SET_WAKEUP_SOURCE,
+   PM_SYSTEM_SHUTDOWN,
+   PM_REQUEST_NODE,
+   PM_RELEASE_NODE,
+   PM_SET_REQUIREMENT,
+   PM_SET_MAX_LATENCY,
+   PM_RESET_ASSERT,
+   PM_RESET_GET_STATUS,
+   PM_MMIO_WRITE,
+   PM_MMIO_READ,
+   PM_PM_INIT_FINALIZE,
+   PM_FPGA_LOAD,
+   PM_FPGA_GET_STATUS,
+   PM_GET_CHIPID,
+   PM_SECURE_SHA = 26,
+   PM_SECURE_RSA,
+   PM_PINCTRL_REQUEST,
+   PM_PINCTRL_RELEASE,
+   PM_PINCTRL_GET_FUNCTION,
+   PM_PINCTRL_SET_FUNCTION,
+   PM_PINCTRL_CONFIG_PARAM_GET,
+   PM_PINCTRL_CONFIG_PARAM_SET,
+   PM_IOCTL,
+   PM_QUERY_DATA,
+   PM_CLOCK_ENABLE,
+   PM_CLOCK_DISABLE,
+   PM_CLOCK_GETSTATE,
+   PM_CLOCK_SETDIVIDER,
+   PM_CLOCK_GETDIVIDER,
+   PM_CLOCK_SETRATE,
+   PM_CLOCK_GETRATE,
+   PM_CLOCK_SETPARENT,
+   PM_CLOCK_GETPARENT,
+   PM_SECURE_IMAGE,
+   PM_FPGA_READ = 46,
+   PM_SECURE_AES,
+   PM_CLOCK_PLL_GETPARAM = 49,
+   PM_REGISTER_ACCESS = 52,
+   PM_EFUSE_ACCESS,
+   PM_FEATURE_CHECK = 63,
+   PM_API_MAX,
 };
 
 #define PM_SIP_SVC  0xc200
-- 
2.17.1

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[U-Boot] [PATCH 3/4] arm64: versal: Rename versal_pm_request to xilinx_pm_request

2019-10-04 Thread Michal Simek
Use generic name instead of Versal specific because this should be also
used on ZynqMP.

Signed-off-by: Michal Simek 
---

 drivers/clk/clk_versal.c   | 14 +++---
 drivers/firmware/firmware-zynqmp.c |  2 +-
 drivers/fpga/versalpl.c|  2 +-
 include/zynqmp_firmware.h  |  2 +-
 4 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c
index e0fa661be9e0..7e97b0c4bf3a 100644
--- a/drivers/clk/clk_versal.c
+++ b/drivers/clk/clk_versal.c
@@ -363,7 +363,7 @@ static u32 versal_clock_get_div(u32 clk_id)
u32 ret_payload[PAYLOAD_ARG_CNT];
u32 div;
 
-   versal_pm_request(PM_CLOCK_GETDIVIDER, clk_id, 0, 0, 0, ret_payload);
+   xilinx_pm_request(PM_CLOCK_GETDIVIDER, clk_id, 0, 0, 0, ret_payload);
div = ret_payload[1];
 
return div;
@@ -373,7 +373,7 @@ static u32 versal_clock_set_div(u32 clk_id, u32 div)
 {
u32 ret_payload[PAYLOAD_ARG_CNT];
 
-   versal_pm_request(PM_CLOCK_SETDIVIDER, clk_id, div, 0, 0, ret_payload);
+   xilinx_pm_request(PM_CLOCK_SETDIVIDER, clk_id, div, 0, 0, ret_payload);
 
return div;
 }
@@ -383,7 +383,7 @@ static u64 versal_clock_ref(u32 clk_id)
u32 ret_payload[PAYLOAD_ARG_CNT];
int ref;
 
-   versal_pm_request(PM_CLOCK_GETPARENT, clk_id, 0, 0, 0, ret_payload);
+   xilinx_pm_request(PM_CLOCK_GETPARENT, clk_id, 0, 0, 0, ret_payload);
ref = ret_payload[0];
if (!(ref & 1))
return ref_clk;
@@ -402,7 +402,7 @@ static u64 versal_clock_get_pll_rate(u32 clk_id)
u32 parent_rate, parent_id;
u32 id = clk_id & 0xFFF;
 
-   versal_pm_request(PM_CLOCK_GETSTATE, clk_id, 0, 0, 0, ret_payload);
+   xilinx_pm_request(PM_CLOCK_GETSTATE, clk_id, 0, 0, 0, ret_payload);
res = ret_payload[1];
if (!res) {
printf("0%x PLL not enabled\n", clk_id);
@@ -412,9 +412,9 @@ static u64 versal_clock_get_pll_rate(u32 clk_id)
parent_id = clock[clock[id].parent[0].id].clk_id;
parent_rate = versal_clock_ref(parent_id);
 
-   versal_pm_request(PM_CLOCK_GETDIVIDER, clk_id, 0, 0, 0, ret_payload);
+   xilinx_pm_request(PM_CLOCK_GETDIVIDER, clk_id, 0, 0, 0, ret_payload);
fbdiv = ret_payload[1];
-   versal_pm_request(PM_CLOCK_PLL_GETPARAM, clk_id, 2, 0, 0, ret_payload);
+   xilinx_pm_request(PM_CLOCK_PLL_GETPARAM, clk_id, 2, 0, 0, ret_payload);
frac = ret_payload[1];
 
freq = (fbdiv * parent_rate) >> (1 << frac);
@@ -441,7 +441,7 @@ static u32 versal_clock_get_parentid(u32 clk_id)
u32 id = clk_id & 0xFFF;
 
if (versal_clock_mux(clk_id)) {
-   versal_pm_request(PM_CLOCK_GETPARENT, clk_id, 0, 0, 0,
+   xilinx_pm_request(PM_CLOCK_GETPARENT, clk_id, 0, 0, 0,
  ret_payload);
parent_id = ret_payload[1];
}
diff --git a/drivers/firmware/firmware-zynqmp.c 
b/drivers/firmware/firmware-zynqmp.c
index 11f5030e85c7..e8fbf1f5644d 100644
--- a/drivers/firmware/firmware-zynqmp.c
+++ b/drivers/firmware/firmware-zynqmp.c
@@ -176,7 +176,7 @@ int __maybe_unused invoke_smc(u32 pm_api_id, u32 arg0, u32 
arg1, u32 arg2,
return regs.regs[0];
 }
 
-int __maybe_unused versal_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
+int __maybe_unused xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
 u32 arg3, u32 *ret_payload)
 {
return invoke_smc(PM_SIP_SVC | api_id, arg0, arg1, arg2, arg3,
diff --git a/drivers/fpga/versalpl.c b/drivers/fpga/versalpl.c
index 8337b8306d76..4bcc2132432b 100644
--- a/drivers/fpga/versalpl.c
+++ b/drivers/fpga/versalpl.c
@@ -39,7 +39,7 @@ static int versal_load(xilinx_desc *desc, const void *buf, 
size_t bsize,
buf_lo = lower_32_bits(bin_buf);
buf_hi = upper_32_bits(bin_buf);
 
-   ret = versal_pm_request(VERSAL_PM_LOAD_PDI, VERSAL_PM_PDI_TYPE, buf_lo,
+   ret = xilinx_pm_request(VERSAL_PM_LOAD_PDI, VERSAL_PM_PDI_TYPE, buf_lo,
buf_hi, 0, ret_payload);
if (ret)
puts("PL FPGA LOAD fail\n");
diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h
index 088ba30e0bb8..84090208e50c 100644
--- a/include/zynqmp_firmware.h
+++ b/include/zynqmp_firmware.h
@@ -83,7 +83,7 @@ unsigned int zynqmp_firmware_version(void);
 void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size);
 int invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3,
   u32 *ret_payload);
-int versal_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
+int xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
  u32 arg3, u32 *ret_payload);
 
 #endif /* _ZYNQMP_FIRMWARE_H_ */
-- 
2.17.1

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Re: [U-Boot] [PATCH 2/3] imx: add the i.MX8M reset controller node

2019-10-04 Thread Fabio Estevam
Hi Patrick,

On Thu, Oct 3, 2019 at 11:12 AM Patrick Wildt  wrote:
>
> This patch adds the reset controller node to the i.MX8MQ SoC
> device tree.
>
> Signed-off-by: Patrick Wildt 
> ---
>  arch/arm/dts/fsl-imx8mq.dtsi | 7 +++
>  1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm/dts/fsl-imx8mq.dtsi b/arch/arm/dts/fsl-imx8mq.dtsi
> index c35c23e293..d843b401be 100644
> --- a/arch/arm/dts/fsl-imx8mq.dtsi
> +++ b/arch/arm/dts/fsl-imx8mq.dtsi
> @@ -19,6 +19,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>
>  / {
> @@ -269,6 +270,12 @@
> #clock-cells = <1>;
> };
>
> +   src: reset-controller@3039 {
> +   compatible = "fsl,imx8mq-src", "syscon";
> +   reg = <0x0 0x3039 0x0 0x1>;
> +   #reset-cells = <1>;

This reset-controller node is already part of the upstream kernel imx8mq.dtsi.

What about syncing the U-Boot version with the one from kernel 5.3.2?
Also, please note the dtsi name change.

Thanks

> +   };
> +
> gpc: gpc@303a {
> compatible = "fsl,imx8mq-gpc", "fsl,imx7d-gpc", "syscon";
> reg = <0x0 0x303a 0x0 0x1>;
> --
> 2.23.0
>
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Re: [U-Boot] [RESEND PATCH v3 1/2] Makefile: Add target to generate hex output for combined spl and dtb

2019-10-04 Thread Tom Rini
On Fri, Sep 27, 2019 at 11:27:56AM -0700, Dalon Westergreen wrote:

> From: Dalon Westergreen 
> 
> Stratix10 requires a hex image of the spl plus spl devicetree offset to
> the Stratix10 onchip memory located at SPL_TEXT_BASE.  This patch adds
> a target to generate a hex file from the u-boot-spl binary including the
> dtb offset at SPL_TEST_BASE.
> 
> Objcopy is used to convert the $(SPL_BIN).bin, which includes the spl
> dtb, to a hex file.  the --change-address option is used to offset the
> hex to SPL_TEXT_BASE as objcopy on the spl binary will not result in
> a hex file appropriately offset at SPL_TEXT_BASE.
> 
> Signed-off-by: Dalon Westergreen 
> 
> ---
> Changes in v3:
>  -> Cleanup commit message and better describe the problem being
> resolved
>  -> Remove extraneous hunk
>  -> use SPL_BIN instead of u-boot-spl
> Changes in v2:
>  -> Move spl hex file generation to SPL Makefile
>  -> Create hexfile from $(SPL_BIN).bin which will include the dtb
> ifneq(build_dtb,)
> ---
>  Makefile | 8 +++-
>  scripts/Makefile.spl | 7 +++
>  2 files changed, 10 insertions(+), 5 deletions(-)
> 
> diff --git a/Makefile b/Makefile
> index 1d9ade948b..0bc9d1589f 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -1152,11 +1152,6 @@ OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
>   $(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \
>   $(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),-R .bootpg -R 
> .resetvec)
>  
> -OBJCOPYFLAGS_u-boot-spl.hex = $(OBJCOPYFLAGS_u-boot.hex)
> -
> -spl/u-boot-spl.hex: spl/u-boot-spl FORCE
> - $(call if_changed,objcopy)
> -
>  binary_size_check: u-boot-nodtb.bin FORCE
>   @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \
>   map_size=$(shell cat u-boot.map | \
> @@ -1756,6 +1751,9 @@ spl/u-boot-spl.bin: spl/u-boot-spl
>   @:
>   $(SPL_SIZE_CHECK)
>  
> +spl/u-boot-spl.hex: spl/u-boot-spl
> + @:
> +
>  spl/u-boot-spl: tools prepare \
>   $(if 
> $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb) \
>   $(if 
> $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_TPL_OF_PLATDATA),dts/dt.dtb)
> diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
> index 7af6b120b6..551002194e 100644
> --- a/scripts/Makefile.spl
> +++ b/scripts/Makefile.spl
> @@ -216,6 +216,8 @@ ifneq 
> ($(CONFIG_TARGET_SOCFPGA_GEN5)$(CONFIG_TARGET_SOCFPGA_ARRIA10),)
>  ALL-y+= $(obj)/$(SPL_BIN).sfp
>  endif
>  
> +ALL-$(CONFIG_TARGET_SOCFPGA_STRATIX10) += $(obj)/$(SPL_BIN).hex
> +
>  ifdef CONFIG_ARCH_SUNXI
>  ALL-y+= $(obj)/sunxi-spl.bin
>  
> @@ -363,6 +365,11 @@ endif
>  $(obj)/$(SPL_BIN).sfp: $(obj)/$(SPL_BIN).bin FORCE
>   $(call if_changed,mkimage)
>  
> +OBJCOPYFLAGS_$(SPL_BIN).hex := -I binary -O ihex 
> --change-address=$(CONFIG_SPL_TEXT_BASE)
> +
> +$(obj)/$(SPL_BIN).hex: $(obj)/$(SPL_BIN).bin FORCE
> + $(call if_changed,objcopy)
> +
>  quiet_cmd_mksunxiboot = MKSUNXI $@
>  cmd_mksunxiboot = $(objtree)/tools/mksunxiboot \
>   --default-dt $(CONFIG_DEFAULT_DEVICE_TREE) $< $@

SoCFPGA folks?  This has been posted a few times, is this OK for the
next release?  Thanks

-- 
Tom


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Re: [U-Boot] [PATCH 1/3] imx: add support for i.MX7/i.MX8MQ reset controller

2019-10-04 Thread Fabio Estevam
Hi Patrick,

On Thu, Oct 3, 2019 at 11:08 AM Patrick Wildt  wrote:
>
> Add support for the reset controller that's used on the i.MX7D
> and i.MX8MQ.  This will be needed to be able to assert the PCIe
> reset pins.  Bindings taken from Linux, driver implementation
> mostly taken from Linux and adjusted to U-Boot infrastructure.
>
> Signed-off-by: Patrick Wildt 
> ---

Just a suggestion for future submissions: when submitting a new
version, always describe what has changed.

Reviewed-by: Fabio Estevam 
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[U-Boot] [PATCH] arm64: versal: Enable clock driver

2019-10-04 Thread Michal Simek
Enable clock driver for Versal.

Signed-off-by: Michal Simek 
---

 configs/xilinx_versal_virt_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/xilinx_versal_virt_defconfig 
b/configs/xilinx_versal_virt_defconfig
index 75f8b983080d..f924d3e54221 100644
--- a/configs/xilinx_versal_virt_defconfig
+++ b/configs/xilinx_versal_virt_defconfig
@@ -45,6 +45,7 @@ CONFIG_OF_BOARD=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_IP_DEFRAG=y
 CONFIG_TFTP_BLOCKSIZE=4096
+CONFIG_CLK_VERSAL=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_CADENCE=y
-- 
2.17.1

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Re: [U-Boot] [PATCH v3 1/4] fs: export fs_close()

2019-10-04 Thread Heinrich Schuchardt
On 10/4/19 5:05 AM, AKASHI Takahiro wrote:
> This function is always paired with either fs_set_blk_desc() or
> fs_set_blk_desc_with_part(). So just export it.
>
> Signed-off-by: AKASHI Takahiro 
> ---
>  fs/fs.c  | 2 +-
>  include/fs.h | 7 +++
>  2 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/fs/fs.c b/fs/fs.c
> index d8a4ced4698e..64ba25fea8bf 100644
> --- a/fs/fs.c
> +++ b/fs/fs.c
> @@ -389,7 +389,7 @@ int fs_set_blk_dev_with_part(struct blk_desc *desc, int 
> part)
>   return -1;
>  }
>
> -static void fs_close(void)
> +void fs_close(void)
>  {
>   struct fstype_info *info = fs_get_info(fs_type);
>
> diff --git a/include/fs.h b/include/fs.h
> index 7601b0343bcd..5a1244d57fd2 100644
> --- a/include/fs.h
> +++ b/include/fs.h
> @@ -37,6 +37,13 @@ int fs_set_blk_dev(const char *ifname, const char 
> *dev_part_str, int fstype);
>   */
>  int fs_set_blk_dev_with_part(struct blk_desc *desc, int part);
>
> +/**
> + * fs_close() - Unset current block device and partition
> + *
> + * Should be paired with either fs_set_blk_dev() or fs_set_dev_with_part()

This "paired" implies that one should call one of the name functions
afterwards which may not be necessary. I would suggest:

"fs_close() closes the connection to a file system which opened with
either fs_set_blk_dev() or fs_set_dev_with_part(). Many file functions
implicitly call fs_close(), e.g. fs_closedir(), fs_exist(), fs_ln(),
fs_ls(), fs_mkdir(), fs_read(), fs_size(), fs_write(), fs_unlink()."

Best regards

Heinrich Schuchardt

> + */
> +void fs_close(void);
> +
>  /**
>   * fs_get_type_name() - Get type of current filesystem
>   *
>

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Re: [U-Boot] [PATCH 2/3] gitlab-ci: Have buildman use /tmp for output

2019-10-04 Thread Stephen Warren

On 10/4/19 10:12 AM, Tom Rini wrote:

When running as another user we might not be able to use '..' for
certain directories and this is the default for buildman.  Specify an
output directory instead.


What if multiple invocations run in parallel on the same machine? 
They'll use the same path and collide. What about using mkdtemp() or 
similar?

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Re: [U-Boot] [PATCH 2/3] gitlab-ci: Have buildman use /tmp for output

2019-10-04 Thread Tom Rini
On Fri, Oct 04, 2019 at 10:34:05AM -0600, Stephen Warren wrote:
> On 10/4/19 10:12 AM, Tom Rini wrote:
> > When running as another user we might not be able to use '..' for
> > certain directories and this is the default for buildman.  Specify an
> > output directory instead.
> 
> What if multiple invocations run in parallel on the same machine? They'll
> use the same path and collide. What about using mkdtemp() or similar?

Within the confines of gitlab (as this runs in a container), that's not
possible and this is no less safe than today.

-- 
Tom


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Re: [U-Boot] [PATCH v3 2/4] fs: add fs_get_type() for current filesystem type

2019-10-04 Thread Heinrich Schuchardt
On 10/4/19 5:05 AM, AKASHI Takahiro wrote:
> This function is a variant of fs_get_type_name() and returns a filesystem
> type with which the current device is associated.
> We don't want to export fs_type variable directly because we have to take
> care of it consistently within fs.c.
>
> Signed-off-by: AKASHI Takahiro 

Looking at fs/fs.c there seems to be a lot of inconsistency in the usage
of FS_TYPE_ANY. Some of the file system functions set fs_type =
FS_TYPE_ANY before calling fs_close(). Others don't. Shouldn't we move
those assignments to fs_close() to get consistency?

FS_TYPE_ANY seems to be misnomer and could be replaced by FS_TYPE_NONE.

Please, use scripts/get_maintainer in future to determine the addressees
of patches. I have put the missing ones on CC now.

Reviewed-by: Heinrich Schuchardt 


> ---
>  fs/fs.c  | 13 +
>  include/fs.h | 10 ++
>  2 files changed, 23 insertions(+)
>
> diff --git a/fs/fs.c b/fs/fs.c
> index 64ba25fea8bf..e5307dbeaa37 100644
> --- a/fs/fs.c
> +++ b/fs/fs.c
> @@ -307,6 +307,19 @@ static struct fstype_info *fs_get_info(int fstype)
>   return info;
>  }
>
> +/**
> + * fs_get_type() - Get type of current filesystem
> + *
> + * Return: filesystem type
> + *
> + * Returns filesystem type representing the current filesystem, or
> + * FS_TYPE_ANY for any unrecognised filesystem.
> + */
> +int fs_get_type(void)
> +{
> + return fs_type;
> +}
> +
>  /**
>   * fs_get_type_name() - Get type of current filesystem
>   *
> diff --git a/include/fs.h b/include/fs.h
> index 5a1244d57fd2..6dfdb5c5307a 100644
> --- a/include/fs.h
> +++ b/include/fs.h
> @@ -44,6 +44,16 @@ int fs_set_blk_dev_with_part(struct blk_desc *desc, int 
> part);
>   */
>  void fs_close(void);
>
> +/**
> + * fs_get_type() - Get type of current filesystem
> + *
> + * Return: filesystem type
> + *
> + * Returns filesystem type representing the current filesystem, or
> + * FS_TYPE_ANY for any unrecognised filesystem.
> + */
> +int fs_get_type(void);
> +
>  /**
>   * fs_get_type_name() - Get type of current filesystem
>   *
>

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Re: [U-Boot] [PATCH 1/3] buildman: Perform tests in /tmp

2019-10-04 Thread Stephen Warren

On 10/4/19 10:12 AM, Tom Rini wrote:

We may not always be able to write to the default output directory but
we will always have a usable /tmp.


Is that a valid assumption? Surely $TMPDIR should be used if set in the 
environment, falling back to a hard-coded /tmp if that isn't set?

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Re: [U-Boot] [PATCH 1/3] buildman: Perform tests in /tmp

2019-10-04 Thread Tom Rini
On Fri, Oct 04, 2019 at 10:32:42AM -0600, Stephen Warren wrote:
> On 10/4/19 10:12 AM, Tom Rini wrote:
> > We may not always be able to write to the default output directory but
> > we will always have a usable /tmp.
> 
> Is that a valid assumption? Surely $TMPDIR should be used if set in the
> environment, falling back to a hard-coded /tmp if that isn't set?

$TMPDIR is most portable but as far as Linux goes, there needs to be
/tmp, yes?

-- 
Tom


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Re: [U-Boot] [PATCH 1/3] buildman: Perform tests in /tmp

2019-10-04 Thread Stephen Warren

On 10/4/19 11:26 AM, Tom Rini wrote:

On Fri, Oct 04, 2019 at 10:32:42AM -0600, Stephen Warren wrote:

On 10/4/19 10:12 AM, Tom Rini wrote:

We may not always be able to write to the default output directory but
we will always have a usable /tmp.


Is that a valid assumption? Surely $TMPDIR should be used if set in the
environment, falling back to a hard-coded /tmp if that isn't set?


$TMPDIR is most portable but as far as Linux goes, there needs to be
/tmp, yes?


I don't think there absolutely has to be, no. Calling tempfile.mkdtemp() 
will "just work" and do the right thing in all cases.

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Re: [U-Boot] [PATCH v3 4/4] efi_loader: disk: install file system protocol to a whole disk

2019-10-04 Thread Heinrich Schuchardt
On 10/4/19 5:05 AM, AKASHI Takahiro wrote:
> Currently, a whole disk without any partitions is not associated
> with EFI_SIMPLE_FILE_SYSTEM_PROTOCOL. So even if it houses some
> file system, there is a chance that we may not be able to access
> it, particularly, when accesses are to be attempted after searching
> that protocol against a device handle.
>
> With this patch, EFI_SIMPLE_FILE_SYSTEM_PROTOCOL is installed
> to such a disk if part_get_info() shows there is no partition
> table installed on it.
>
> Signed-off-by: AKASHI Takahiro 
> ---
>  lib/efi_loader/efi_disk.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
> index 27329cadb6f1..4e1a1efed7ec 100644
> --- a/lib/efi_loader/efi_disk.c
> +++ b/lib/efi_loader/efi_disk.c
> @@ -329,7 +329,8 @@ static efi_status_t efi_disk_add_dev(
>  diskobj->dp);
>   if (ret != EFI_SUCCESS)
>   return ret;
> - if (part >= 1 && efi_fs_exists(desc, part)) {
> + /* partitions or whole disk without partitions */
> + if (efi_fs_exists(desc, part)) {

As described in response to an earlier version of the patch series we
should only install the EFI protocols if no partition table exits.

Best regards

Heinrich Schuchardt

>   diskobj->volume = efi_simple_file_system(desc, part,
>diskobj->dp);
>   ret = efi_add_protocol(>header,
>

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[U-Boot] [PATCH 1/1] Revert "env: solve compilation error in SPL"

2019-10-04 Thread Tom Rini
This reverts commit 7d4776545b0f8a8827e5d061206faf61c9ba6ea9.  The
changes here break environment validation and furthermore do not seem to
be required.

Signed-off-by: Tom Rini 
---
Here is what, sadly, is going to I feel be the most frustraiting part of
the regression here.  The problem that I'm sure was encountered during
development that needed this change is not present in mainline.  I've
done my usual world build with this revert applied and the only changes
are that the platforms that had a regression have their functionality
back.

 env/common.c | 7 +--
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/env/common.c b/env/common.c
index 3fb60509dd85..4daaa6faea60 100644
--- a/env/common.c
+++ b/env/common.c
@@ -24,10 +24,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #include 
 
 struct hsearch_data env_htab = {
-#if CONFIG_IS_ENABLED(ENV_SUPPORT)
-   /* defined in flags.c, only compile with ENV_SUPPORT */
.change_ok = env_flags_validate,
-#endif
 };
 
 /*
@@ -229,9 +226,7 @@ void env_relocate(void)
 #if defined(CONFIG_NEEDS_MANUAL_RELOC)
env_reloc();
env_fix_drivers();
-
-   if (env_htab.change_ok)
-   env_htab.change_ok += gd->reloc_off;
+   env_htab.change_ok += gd->reloc_off;
 #endif
if (gd->env_valid == ENV_INVALID) {
 #if defined(CONFIG_ENV_IS_NOWHERE) || defined(CONFIG_SPL_BUILD)
-- 
2.17.1

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Re: [U-Boot] [PATCH v3 3/4] efi_loader: disk: install FILE_SYSTEM_PROTOCOL only if available

2019-10-04 Thread Heinrich Schuchardt
On 10/4/19 5:05 AM, AKASHI Takahiro wrote:
> In the current implementation, EFI_SIMPLEFILE_SYSTEM_PROTOCOL is always
> installed to all the partitions even if some of them may house no file
> system.
>
> With this patch, that protocol will be installed only if any file system
> exists.

I generally prefer if each individual patch also has a version history.

>
> Signed-off-by: AKASHI Takahiro 
> ---
>  lib/efi_loader/efi_disk.c | 16 +++-
>  1 file changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
> index 9007a5f77f3d..27329cadb6f1 100644
> --- a/lib/efi_loader/efi_disk.c
> +++ b/lib/efi_loader/efi_disk.c
> @@ -9,6 +9,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>
> @@ -262,6 +263,19 @@ efi_fs_from_path(struct efi_device_path *full_path)
>   return handler->protocol_interface;
>  }
>

Please, add:

/**
 * efi_fs_exists() - check if a partition bears a file system
 *
 * @desc:   block device descriptor
 * @part:   partition number
 * Return:  1 if a file system exists on the partition
 *  0 otherwise
 */

Otherwise

Reviewed-by: Heinrich Schuchardt 

> +static int efi_fs_exists(struct blk_desc *desc, int part)
> +{
> + if (fs_set_blk_dev_with_part(desc, part))
> + return 0;
> +
> + if (fs_get_type() == FS_TYPE_ANY)
> + return 0;
> +
> + fs_close();
> +
> + return 1;
> +}
> +
>  /*
>   * Create a handle for a partition or disk
>   *
> @@ -315,7 +329,7 @@ static efi_status_t efi_disk_add_dev(
>  diskobj->dp);
>   if (ret != EFI_SUCCESS)
>   return ret;
> - if (part >= 1) {
> + if (part >= 1 && efi_fs_exists(desc, part)) {
>   diskobj->volume = efi_simple_file_system(desc, part,
>diskobj->dp);
>   ret = efi_add_protocol(>header,
>

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Re: [U-Boot] [PATCH 1/3] buildman: Perform tests in /tmp

2019-10-04 Thread Tom Rini
On Fri, Oct 04, 2019 at 12:40:02PM -0600, Stephen Warren wrote:
> On 10/4/19 11:26 AM, Tom Rini wrote:
> > On Fri, Oct 04, 2019 at 10:32:42AM -0600, Stephen Warren wrote:
> > > On 10/4/19 10:12 AM, Tom Rini wrote:
> > > > We may not always be able to write to the default output directory but
> > > > we will always have a usable /tmp.
> > > 
> > > Is that a valid assumption? Surely $TMPDIR should be used if set in the
> > > environment, falling back to a hard-coded /tmp if that isn't set?
> > 
> > $TMPDIR is most portable but as far as Linux goes, there needs to be
> > /tmp, yes?
> 
> I don't think there absolutely has to be, no. Calling tempfile.mkdtemp()
> will "just work" and do the right thing in all cases.

OK, that wasn't too bad, waiting for any other feedback before v2'ing,
thanks.

-- 
Tom


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