> From: Sean Anderson [mailto:sean...@gmail.com]
> Sent: Wednesday, December 25, 2019 1:28 PM
> To: U-Boot Mailing List
> Cc: Rick Jian-Zhi Chen(陳建志)
> Subject: [PATCH v2] riscv: Add option to print registers on exception
>
> When debugging, it can be helpful to see more information about an
пн, 30 дек. 2019 г. в 11:59, Jagan Teki :
>
> Hi,
>
> On Mon, Dec 30, 2019 at 2:11 PM Matwey V. Kornilov
> wrote:
> >
> > Hello,
> >
> > Thank you for the patch set.
> > Currently, I have the following concern about documentation and
> > overall proposed u-boot deploy procedure.
> >
> > There is
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Jagan Teki
> Sent: Monday, December 30, 2019 9:14 PM
> To: Heinrich Schuchardt
> Cc: Tom Rini; U-Boot-Denx
> Subject: Re: [PATCH 1/1] doc: fix AX25-AE350 RISC-V documentation
>
> On Sat, Dec 28, 2019 at 12:21 AM Heinrich Schuchardt
Add Pinctrl driver for MediaTek MT8512 SoC.
Signed-off-by: mingming lee
---
drivers/pinctrl/mediatek/Kconfig | 4 +
drivers/pinctrl/mediatek/Makefile | 1 +
drivers/pinctrl/mediatek/pinctrl-mt8512.c | 387 ++
3 files changed, 392 insertions(+)
create
Add clock driver for MediaTek MT8512 SoC, include topckgen,
apmixedsys and infracfg support.
Signed-off-by: mingming lee
---
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8512.c | 873 +
include/dt-bindings/clock/mt8512-clk.h | 197
This patch adds mmc support for MediaTek MT8512/MT8110 SoCs.
MT8512/MT8110 SoCs puts the tune register at top layer, so
need add new code to support it.
Signed-off-by: mingming lee
---
drivers/mmc/mtk-sd.c | 134 ---
1 file changed, 101 insertions(+), 33
Add support for MediaTek MT8512 SoC. This include the file
that will initialize the SoC after boot and its device tree.
Signed-off-by: mingming lee
---
Changes for v2:
-Sort device nodes reg address order and alphabetically.
---
arch/arm/dts/mt8512.dtsi | 115
Add configurable pcw_chg_reg/ibits/fmin to mtk_pll to support mt8512
---
drivers/clk/mediatek/clk-mtk.c | 25 +
drivers/clk/mediatek/clk-mtk.h | 3 +++
2 files changed, 20 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mtk.c
This patch series adds basic boot support on eMMC for the MediaTek
MT8512 SoC based boards. This series add the clock, pinctrl drivers
and the SoC initializaton code.
---
Changes for v2:
- Sort device nodes reg address order and alphabetically.
- Split the changes in mtk clk for 8512 into
For CMD21 tuning data, the 128/64 bytes data may coming in very
short time, before msdc_start_data(), the read data has already
come, in this case, clear MSDC_INT will cause the interrupt disappear
and lead to the thread hang.
the solution is just clear all interrupts before command was sent.
> > From: Sean Anderson [mailto:sean...@gmail.com]
> > Sent: Wednesday, December 18, 2019 10:36 AM
> > To: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> > Subject: [PATCH] riscv: Fix breakage caused by linker relaxation
> >
> > Due to the two-instruction sequence needed to access arbitrary
On Tue, Dec 31, 2019 at 12:41 AM Tom Rini wrote:
>
> On Tue, Dec 17, 2019 at 08:52:01PM +0100, Marek Vasut wrote:
> > On 12/17/19 8:32 PM, Heinrich Schuchardt wrote:
> > > On 12/17/19 1:19 PM, Marek Vasut wrote:
> > >> On 12/17/19 12:59 PM, Heinrich Schuchardt wrote:
> > >>> On 12/17/19 12:19 PM,
On 12/31/19 3:56 AM, Sughosh Ganu wrote:
On Sat, 28 Dec 2019 at 13:22, Heinrich Schuchardt mailto:xypron.g...@gmx.de>> wrote:
On 12/27/19 3:23 PM, Sughosh Ganu wrote:
> Add a random number generator(rng) uclass to facilitate adding
drivers
> for rng devices. I plan to add an
The default value of CONFIG_SYS_MALLOC_F_LEN (0x400)
leaves U-Boot with not enough memory to load i2c driver
before relocate, causing it to hang.
Change the default value of CONFIG_SYS_MALLOC_F_LEN
for below SoCs,
- LS1012A
- LS1021A
- LS1043A
- LS1046A
Reviewed-by: Priyanka Jain
Signed-off-by:
Add support of driver model of pcf8563
Signed-off-by: Biwen Li
---
Changes in v8:
- none
Changes in v7:
- none
Changes in v6:
- none
Changes in v5:
- none
Changes in v4:
- update commit messages
- update copyright
Changes in v3:
-
Fix below SPL build error when DM_I2C is enabled,
- arch/arm/cpu/armv8/built-in.o: In function `board_init_f:
arch/arm/cpu/armv8/fsl-layerscape/spl.c:74: undefined reference to
`i2c_init_all'
arch/arm/cpu/armv8/fsl-layerscape/spl.c:74:(.text.board_init_f+0x30):
relocation truncated to fit:
This adds DM_FLAG_PRE_RELOC flag to probe i2c driver
before relocation
Reviewed-by: Priyanka Jain
Signed-off-by: Biwen Li
---
Changes in v8:
- none
Changes in v7:
- remove copyright
Changes in v6:
- none
Changes in v5:
- none
Changes in v4:
- update
On Mon, Dec 30, 2019 at 10:29 PM Jagan Teki wrote:
>
> OpenSBI build steps are marked as normal text in
> AX25-AE350 documentation.
>
> Move them into code-block so-that it can show it
> as build steps.
>
> Cc: Heinrich Schuchardt
> Signed-off-by: Jagan Teki
> ---
>
Hi Fabio,
> Subject: Re: [PATCH 00/22] imx: add i.MX8MP support
>
> Hi Peng,
>
> On Mon, Dec 30, 2019 at 7:08 AM Peng Fan wrote:
>
> > imx: add i.MX8MP EVK board
>
> Please add a README file mentioning the exact firmware/AT-F versions that
> need to be used to boot i.MX8MP EVK board.
This
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1012A
Reviewed-by: Priyanka Jain
Signed-off-by: Biwen Li
---
Changes in v8:
- none
Changes in v7:
- none
Changes in v6:
- correct dependencies
Changes in v5:
- update subject
Changes in v4:
-
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1046A
Reviewed-by: Priyanka Jain
Signed-off-by: Biwen Li
---
Changes in v8:
- none
Changes in v7:
- none
Changes in v6:
- correct dependencies
Changes in v5:
- update subject
Changes in v4:
-
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1043A
Reviewed-by: Priyanka Jain
Signed-off-by: Biwen Li
---
Changes in v8:
- none
Changes in v7:
- none
Changes in v6:
- correct dependencies
Changes in v5:
- update subject
Changes in v4:
-
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1021A
Reviewed-by: Priyanka Jain
Signed-off-by: Biwen Li
---
Changes in v8:
- set default i2c bus number
with I2C_SET_DEFAULT_BUS_NUM and
I2C_DEFAULT_BUS_NUMBER
Changes in v7:
- none
Changes in v6:
Add new set_clr_upd mux type and related operation to
mtk common clock driver to support mt8512
---
drivers/clk/mediatek/clk-mtk.c | 43 +-
drivers/clk/mediatek/clk-mtk.h | 23 ++
2 files changed, 55 insertions(+), 11 deletions(-)
diff --git
This adds a general board file based on MT8512 SoCs from MediaTek.
Apart from the generic parts (cpu) we add some low level init codes
and initialize the early clocks.
This commit is adding the basic boot support for the MT8512 eMMC board.
Signed-off-by: mingming lee
---
arch/arm/dts/Makefile
пн, 30 дек. 2019 г. в 11:28, Jagan Teki :
>
> All rockchip platforms support TPL or SPL-based bootloader
> in mainline with U-Boot proper as final stage. For each
> stage we need to burn the image on to flash with respective
> offsets.
>
> This patch creates a single boot image component using
> -
> From: Jagan Teki [mailto:ja...@amarulasolutions.com]
> Sent: Monday, December 30, 2019 10:29 PM
> To: Rick Jian-Zhi Chen(陳建志); Bin Meng
> Cc: u-boot@lists.denx.de; Jagan Teki; Heinrich Schuchardt
> Subject: [PATCH] doc: fix opensbi build steps for AX25-AE350
>
> OpenSBI build steps are marked as
On Sat, 28 Dec 2019 at 13:22, Heinrich Schuchardt
wrote:
> On 12/27/19 3:23 PM, Sughosh Ganu wrote:
> > Add a random number generator(rng) uclass to facilitate adding drivers
> > for rng devices. I plan to add an implementation of the
> > EFI_RNG_PROTOCOL, which would get the random number from
On Mon, Dec 30, 2019 at 10:55 PM Michael Nazzareno Trimarchi
wrote:
>
> Hi
>
> On Mon, Dec 30, 2019 at 1:04 PM Jagan Teki wrote:
> >
> > From: Michael Trimarchi
> >
> > LAN8720 needs a reset of every clock enable. The reset needs
> > to be done at device level, due the flag
Hi,
On Mon, Dec 30, 2019 at 2:11 PM Matwey V. Kornilov
wrote:
>
> Hello,
>
> Thank you for the patch set.
> Currently, I have the following concern about documentation and
> overall proposed u-boot deploy procedure.
>
> There is a use case, when I have to use Rockchip proprietary TPL
> binary
Add i.MX8MP pinfunc header for dts usage
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mp-pinfunc.h | 931 ++
1 file changed, 931 insertions(+)
create mode 100644 arch/arm/dts/imx8mp-pinfunc.h
diff --git a/arch/arm/dts/imx8mp-pinfunc.h
i.MX8MP has similar architecture as i.MX8MN, but it has different
clk root and index, so add that to make i.MX8MP could use
the non-dm clock driver.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/clock.h| 3 +-
arch/arm/include/asm/arch-imx8m/clock_imx8mm.h | 112
i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks
and ctrl register bit definitions, so update to reflect that.
Reviewed-by: Ye Li
Signed-off-by: Peng Fan
---
drivers/misc/mxc_ocotp.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/misc/mxc_ocotp.c
Add i.MX8MP compatible to let the pinctrl driver could support
i.MX8MP.
Reviewed-by: Ye Li
Signed-off-by: Peng Fan
---
drivers/pinctrl/nxp/pinctrl-imx8m.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/nxp/pinctrl-imx8m.c
b/drivers/pinctrl/nxp/pinctrl-imx8m.c
index
i.MX8MP follows i.MX8MN, so just let it use spl_board_boot_device
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/spl.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index dde1635a9d..5a6493a625 100644
---
Add rockchip image type support. right now the image
type marked with rksd, So create image type variable
with required image type like rksd or rkspi.
Cc: Kever Yang
Cc: Matwey V. Kornilov
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Makefile | 10 +-
1 file changed, 9
This is v5 set for Binman support in rockchip, [1] here is
previous patchset.
This series add single boot image with binman for arm32 and
pad_cat for arm64 rockchip platforms both TPL + SPL and SPL-alone
targets.
Changes for v5:
- collect kever review tag
- drop idbloader.img from clean target
Hello,
Thank you for the patch set.
Currently, I have the following concern about documentation and
overall proposed u-boot deploy procedure.
There is a use case, when I have to use Rockchip proprietary TPL
binary and deploy it instead of u-boot's one together with u-boot SPL
and ITB images.
It
On 12/30/19 2:34 AM, Cristian Ciocaltea wrote:
This test verifies the implementation of the 'bootm' extension that
handles UEFI binaries inside FIT images (enabled via CONFIG_BOOTM_EFI).
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Heinrich Schuchardt
The drivers/clk/imx/*.c are used for CLK dm case, the
clock_imx8mm.c is used for non CLK dm case, let's split
it. Sometimes it is hard to enable CLK dm in SPL stage,
considering code size, malloc size requirement, the splittion
will make it easy to use non CLK dm in SPL stage.
Signed-off-by: Peng
i.MX8MP ROM support ROMAPI as i.MX8MN, so make
SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MP
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/Kconfig | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index
From: Ye Li
PCA9450 PMIC series is used to support iMX8MM (PCA9450A) and
iMX8MN (PCA9450B). Add the PMIC driver for both PCA9450A and PCA9450B.
Signed-off-by: Robin Gong
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
drivers/power/pmic/Kconfig| 7 +++
drivers/power/pmic/Makefile
The i.MX8M Plus Media Applications Processor is part of the growing
mScale family targeting the consumer and industrial market. It brings
an effective Machine Learning and AI accelerator that enables a new
class of applications. It is built in Samsung 14LPP to achieve both
high performance and low
i.MX8MP does not have LVTTL, it has a PE property
Signed-off-by: Peng Fan
---
arch/arm/include/asm/mach-imx/iomux-v3.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h
b/arch/arm/include/asm/mach-imx/iomux-v3.h
index
Add imximage-8mp-lpddr4.cfg for imximage usage, almost same
as i.MX8MN ddr4 cfg, but with different ddr firmware
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/imximage-8mp-lpddr4.cfg | 17 +
1 file changed, 17 insertions(+)
create mode 100644
We will generate DRAM 4000MT/s as default for i.MX8MP.
So need DRAM PLL to generate 1000Mhz clock to DDR PHY and controller.
Signed-off-by: Peng Fan
---
drivers/ddr/imx/imx8m/ddrphy_utils.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/ddr/imx/imx8m/ddrphy_utils.c
4000MTS DDR needs 1GHz fracpll, so add the entry
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/clock_imx8mm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c
b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
index ee44ba75fe..68575a2bd3 100644
---
On 12/30/19 11:22 AM, Daniel Schwierzeck wrote:
>
> Am 30.12.19 um 10:19 schrieb Mauro Condarelli:
>> I am having problems with this patch.
>>
>> Problem is "reset"command fails (for my board) with:
>>> => reset
>>> resetting ...
>>> ### ERROR ### Please RESET the board ###
>> I traced down
Add basic i.MX8MP EVK board support
U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)
power_pca9450b_init
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Failed to find clock node. Check device tree
WDT: Not found!
Add pin header file for i.MX8MP
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/imx8mp_pins.h | 1080 +
1 file changed, 1080 insertions(+)
create mode 100644 arch/arm/include/asm/arch-imx8m/imx8mp_pins.h
diff --git
Add i.MX8MP clk driver for i.MX8MP CLK driver model usage
Signed-off-by: Peng Fan
Cc: Lukasz Majewski
---
V1:
To align with linux coding style, the 80 chars warning is not fixed.
drivers/clk/imx/Kconfig | 16 ++
drivers/clk/imx/Makefile | 2 +
drivers/clk/imx/clk-imx8mp.c | 362
Add imx_clk_mux2_flags which will be used by i.MX8MP
Signed-off-by: Peng Fan
Cc: Lukasz Majewski
---
drivers/clk/imx/clk.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 07dcf94ea5..60f287046b 100644
---
i.IMX8M Plus is part of the i.MX8M SoC family, targeting industrial
and consumer market. It includes an ML and AI accelerator, together
with 4 Cortex-A53 core, DSP, GPU, VPU, M7 and etc.
This patchset is to add the support.
CI: https://travis-ci.org/MrVan/u-boot/builds/630883217
Peng Fan
Add i.MX8MP clock header
Signed-off-by: Peng Fan
---
include/dt-bindings/clock/imx8mp-clock.h | 300 +++
1 file changed, 300 insertions(+)
create mode 100644 include/dt-bindings/clock/imx8mp-clock.h
diff --git a/include/dt-bindings/clock/imx8mp-clock.h
i.MX8MP use 0x182 as dummy id, 0xFF is not able the get the highest
bit, so enlarge bit mask to 0x1FF to make it could detect
cpu type correctly
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/cpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/cpu.c
Add Kconfig entry for i.MX8MP
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index eb4a73b3e2..251feb2074 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++
Support get i.MX8MP cpu id and cpu type
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx/cpu.h | 1 +
arch/arm/include/asm/mach-imx/sys_proto.h | 1 +
arch/arm/mach-imx/cpu.c | 2 ++
arch/arm/mach-imx/imx8m/soc.c | 7 +--
4 files changed, 9
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/imx8m/soc.c
On Sun, Dec 29, 2019 at 06:46:40PM +0100, Heinrich Schuchardt wrote:
> Provide dictionary env__efi_fit_tftp_file describing the file used for the
> UEFI FIT image test.
>
> Cf. "test/py: Create a test for launching UEFI binaries from FIT images"
>
Provide dictionary env__efi_fit_tftp_file describing the file used for the
UEFI FIT image test.
Signed-off-by: Heinrich Schuchardt
---
Tested with
https://gitlab.denx.de/u-boot/custodians/u-boot-efi/pipelines/1714
v2:
remove quotes around tftp_dir
---
py/travis-ci/travis_tftp.py
Add U-Boot specific dtsi file for rk3036 SoC. This
would help to add U-Boot specific dts nodes, properties
which are common across rk3036.
Right now, the file is empty, will add required changes
in future patches.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Most of the platforms uses the platform type and particular
boot stage on their image naming conventions in makefile
like,
u-boot-sunxi-with-spl.bin - Allwinner U-Boot with SPL
u-boot-spl-mtk.bin - Mediatek SPL bin
This would help to understand the users to what that
particular image belongs to?
Add SPL-alone mkimage tooling support via Makefile for
few platforms or boards used in rockchip family.
With this users would get rid of explicitly creating
mkimage tool for rockchip rksd or rkspi boot modes.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Makefile | 10 +-
1
Most of the platforms uses the platform type on their boot
stage image naming conventions in makefile like,
u-boot-x86-start16-tpl.bin - x86 start16 TPL bin
u-boot-spl-mtk.bin - Mediatek SPL bin
This would help to understand the users to what that
particular image belongs to? and less confused.
All rockchip platforms support TPL or SPL-based bootloader
in mainline with U-Boot proper as final stage. For each
stage we need to burn the image on to flash with respective
offsets.
This patch creates a single boot image component using
- binman, for arm32 rockchip platforms
- pad_cat, for
Rockchip has documentation file, doc/README.rockchip but
which is not so readable to add or understand the existing
contents. Even the format that support is legacy readme
in U-Boot.
Add rockchip specific documentation file using new rst
format, which describes the information about Rockchip
On 28.12.19 13:08, Jagan Teki wrote:
> On Fri, Dec 27, 2019 at 6:49 PM Soeren Moch wrote:
>> On 27.12.19 13:04, Jagan Teki wrote:
>>> On Fri, Dec 27, 2019 at 4:00 PM Soeren Moch wrote:
Hi!
On 27.12.19 07:50, Jagan Teki wrote:
> Hi Kever,
>
> On Mon, Dec 23, 2019 at
I am having problems with this patch.
Problem is "reset"command fails (for my board) with:
> => reset
> resetting ...
> ### ERROR ### Please RESET the board ###
I traced down problem to "drivers/sysreset/sysreset-uclass.c" requesting
"uclass_first_device(UCLASS_SYSRESET, )", while
Am 30.12.19 um 10:19 schrieb Mauro Condarelli:
> I am having problems with this patch.
>
> Problem is "reset"command fails (for my board) with:
>> => reset
>> resetting ...
>> ### ERROR ### Please RESET the board ###
> I traced down problem to "drivers/sysreset/sysreset-uclass.c" requesting
>
On Tue, Dec 17, 2019 at 9:37 PM Sergei Trofimovich wrote:
>
> The build failure was originally reported on arm64-musl
> target at https://bugs.gentoo.org/703132. Here is the amd64-musl
> variant:
>
> ```
> $ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-only_defconfig
> -j$(nproc)
>
Series of patches that fixes dt and board changes in
i.MX6 based Engicam board.
Any inputs?
Jagan.
Jagan Teki (3):
dt-bindings: sound: Add fsl-imx-audmux.h from v5.4
ARM: dts: icorem6: Sync engicam device trees from v5.4
ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6DL
Michael
From: Michael Trimarchi
Engicam i.CoreM6 1.5 Quad/Dual MIPI dtsi is reusing fec node
from Engicam i.CoreM6 dtsi but have sampe copy of phy-reset-gpio
and phy-mode properties.
So, drop this phy reset methods from imx6qdl-icore-1.5 dsti file.
Cc: Jacopo Mondi
Signed-off-by: Michael Trimarchi
The EDIMM STARTER KIT i.Core 1.5 MIPI Evaluation is based on
the 1.5 version of the i.Core MX6 cpu module. The 1.5 version
differs from the original one for a few details, including the
ethernet PHY interface clock provider.
With this commit, the ethernet interface works properly:
SMSC
Sync Engicam device tree file from v5.4 linux-next.
Signed-off-by: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/dts/imx6dl-icore-mipi.dts | 11 +-
arch/arm/dts/imx6dl-icore-rqs.dts| 43 +---
arch/arm/dts/imx6dl-icore.dts| 47 +---
arch/arm/dts/imx6q-icore-mipi.dts
From: Michael Trimarchi
According to the SOM and reference board the clock
can be taken from the external pin or provided from
ENET_REF_CLK. Add a new function that make the proper
set according the board type.
Signed-off-by: Michael Trimarchi
Signed-off-by: Jagan Teki
---
From: Michael Trimarchi
Now all the fec related phy properties are now accessible
via dts. So drop the explicit config items from common
config file, imx6-engicam.h
Signed-off-by: Michael Trimarchi
Signed-off-by: Jagan Teki
---
include/configs/imx6-engicam.h | 11 ---
1 file changed,
Hi Stefano,
On Sat, Dec 28, 2019 at 2:33 PM Stefano Babic wrote:
>
>
>
> On 28/11/19 14:56, Igor Opaniuk wrote:
> > From: Igor Opaniuk
> >
> > Currently imx-specific bootaux command doesn't support ELF format
> > firmware for Cortex-M4 core.
> >
> > This patches introduces a PoC implementation
Sync fsl-imx-audmux.h from v5.4 linux-next.
Signed-off-by: Michael Trimarchi
Signed-off-by: Jagan Teki
---
include/dt-bindings/sound/fsl-imx-audmux.h | 64 ++
1 file changed, 64 insertions(+)
create mode 100644 include/dt-bindings/sound/fsl-imx-audmux.h
diff --git
From: Michael Trimarchi
Make easy to map fdt file to board in order to use
this information later to apply specific change to
specific board combination.
Signed-off-by: Michael Trimarchi
Signed-off-by: Jagan Teki
---
board/engicam/common/board.c | 67 ++--
1
From: Michael Trimarchi
LAN8720 needs a reset of every clock enable. The reset needs
to be done at device level, due the flag PHY_RST_AFTER_CLK_EN.
So, add phy-handle by creating mdio child node inside fec.
This will eventually move the phy-reset-gpio which is defined
in fec node.
On Mon, Dec 30, 2019 at 8:39 PM Sergei Trofimovich wrote:
>
> On Mon, 30 Dec 2019 20:24:08 +0900
> Masahiro Yamada wrote:
>
> > On Tue, Dec 17, 2019 at 9:37 PM Sergei Trofimovich
> > wrote:
> > >
> > > The build failure was originally reported on arm64-musl
> > > target at
On Tue, Dec 17, 2019 at 03:41:40PM +0100, Michal Simek wrote:
> Qemu v4.2.0 maps bootmode registers to address space which was the reason
> why board_late_init() was disabled and accesses were failing.
>
> With new Qemu board_late_init() can be called without any issue.
>
> Signed-off-by: Michal
This patch gets rid of the warning messages like:
uboot-test-hooks/py/travis-ci/travis_tftp.py:43: ResourceWarning:
unclosed file <_io.BufferedReader name='.bm-work/qemu_arm/u-boot.bin'>
Signed-off-by: Cristian Ciocaltea
---
Changes in v2:
* The warning line number in the comment relies on
On Sat, Dec 28, 2019 at 12:21 AM Heinrich Schuchardt wrote:
>
> Since commit 04883bf7acca ("doc: update AX25-AE350 RISC-V documentation")
> `make htmldocs` produces a log of warnings like
>
> doc/board/AndesTech/ax25-ae350.rst:373:
> WARNING: Block quote ends without a blank line; unexpected
On Fri, Dec 20, 2019 at 11:16:38AM +0530, Lokesh Vutla wrote:
>
>
> On 17/12/19 5:44 PM, Igor Opaniuk wrote:
> > From: Igor Opaniuk
> >
> > This reverts commit f0cc4eae9a1702a768817ea25d9f23cece69d021
> >
> > This was previously reported that f0cc4eae9a ("core: device:
> > use
OpenSBI build steps are marked as normal text in
AX25-AE350 documentation.
Move them into code-block so-that it can show it
as build steps.
Cc: Heinrich Schuchardt
Signed-off-by: Jagan Teki
---
doc/board/AndesTech/ax25-ae350.rst | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
From: Igor Opaniuk
Currently imx-specific bootaux command doesn't support ELF format
firmware for Cortex-M4 core.
This patches introduces a PoC implementation of handling elf firmware
(load_elf_image_phdr() was copy-pasted from elf.c just for PoC).
ELF64 binaries isn't supported yet.
This has
On 30/12/19 13:04, Igor Opaniuk wrote:
> Hi Stefano,
>
> On Sat, Dec 28, 2019 at 2:33 PM Stefano Babic wrote:
>>
>>
>>
>> On 28/11/19 14:56, Igor Opaniuk wrote:
>>> From: Igor Opaniuk
>>>
>>> Currently imx-specific bootaux command doesn't support ELF format
>>> firmware for Cortex-M4 core.
>>>
On 12/30/19 11:22 AM, Daniel Schwierzeck wrote:
>
> Am 30.12.19 um 10:19 schrieb Mauro Condarelli:
>> I am having problems with this patch.
>>
>> Problem is "reset"command fails (for my board) with:
>>> => reset
>>> resetting ...
>>> ### ERROR ### Please RESET the board ###
>> I traced down
On 11/12/19 17:21, Fabio Estevam wrote:
> Hi Baruch,
>
> On Wed, Dec 11, 2019 at 12:25 PM Baruch Siach wrote:
>
>> I'm not talking about the selection of firmware package version. It is
>> just that the firmware-imx-8.0.bin archive (another typo), extract into
>> firmware-imx-8.0/, not
Hi Jagan,
On Sat, 21 Dec 2019 13:24:39 +0530
Jagan Teki wrote:
> Enable winbond SPI flash for ROC-PC-RK3399 board.
s/ROC-PC-RK3399/RockPro64/
>
> Signed-off-by: Jagan Teki
> ---
> arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 4
> configs/rockpro64-rk3399_defconfig| 2 ++
>
On Mon, 30 Dec 2019 20:24:08 +0900
Masahiro Yamada wrote:
> On Tue, Dec 17, 2019 at 9:37 PM Sergei Trofimovich wrote:
> >
> > The build failure was originally reported on arm64-musl
> > target at https://bugs.gentoo.org/703132. Here is the amd64-musl
> > variant:
> >
> > ```
> > $ LANG=C make
On Tue, Dec 17, 2019 at 08:52:01PM +0100, Marek Vasut wrote:
> On 12/17/19 8:32 PM, Heinrich Schuchardt wrote:
> > On 12/17/19 1:19 PM, Marek Vasut wrote:
> >> On 12/17/19 12:59 PM, Heinrich Schuchardt wrote:
> >>> On 12/17/19 12:19 PM, Marek Vasut wrote:
> On 12/17/19 12:14 PM, Heinrich
The build failure was originally reported on arm64-musl
target at https://bugs.gentoo.org/703132. Here is the amd64-musl
variant:
```
$ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-only_defconfig
-j$(nproc)
$ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-all
On 12/30/19 4:49 AM, Cristian Ciocaltea wrote:
This patch gets rid of the warning messages like:
uboot-test-hooks/py/travis-ci/travis_tftp.py:43: ResourceWarning:
unclosed file <_io.BufferedReader name='.bm-work/qemu_arm/u-boot.bin'>
Signed-off-by: Cristian Ciocaltea
---
Changes in v2:
* The
Hi
On Mon, Dec 30, 2019 at 1:04 PM Jagan Teki wrote:
>
> From: Michael Trimarchi
>
> LAN8720 needs a reset of every clock enable. The reset needs
> to be done at device level, due the flag PHY_RST_AFTER_CLK_EN.
>
> So, add phy-handle by creating mdio child node inside fec.
> This will
The build failure was originally reported on arm64-musl
target at https://bugs.gentoo.org/703132. Here is the amd64-musl
variant:
```
$ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-only_defconfig
-j$(nproc)
$ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-all
On 12/30/19 3:52 AM, Heinrich Schuchardt wrote:
Provide dictionary env__efi_fit_tftp_file describing the file used for the
UEFI FIT image test.
diff --git a/py/travis-ci/travis_tftp.py b/py/travis-ci/travis_tftp.py
+def efifit2env(addr=None):
+"""Create dictionary describing file for
On 12/30/19 5:38 PM, Stephen Warren wrote:
On 12/30/19 3:52 AM, Heinrich Schuchardt wrote:
Provide dictionary env__efi_fit_tftp_file describing the file used for
the
UEFI FIT image test.
diff --git a/py/travis-ci/travis_tftp.py b/py/travis-ci/travis_tftp.py
+def efifit2env(addr=None):
+
On 12/30/19 12:05 PM, Heinrich Schuchardt wrote:
On 12/30/19 5:38 PM, Stephen Warren wrote:
On 12/30/19 3:52 AM, Heinrich Schuchardt wrote:
Provide dictionary env__efi_fit_tftp_file describing the file used for
the
UEFI FIT image test.
diff --git a/py/travis-ci/travis_tftp.py
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