On Tue, 4 Feb 2020 11:49:59 -0500
Tom Rini tr...@konsulko.com wrote:
...
> > config VIDEO_BPP32
> > bool "Support 32-bit-per-pixel displays"
> > depends on DM_VIDEO
> > - default y if X86
> > + default y if DM_VIDEO && !VIDEO_BPP_OPT_OUT
> > help
> > Support drawing text and
On Mon, Feb 03, 2020 at 02:49:24PM +0530, Jagan Teki wrote:
> Add distro boot command support for SPI flash in Rockchip.
>
> This distro boot will read the boot script at specific
> location at the flash and start sourcing the same.
>
> Included the SF device at the last of the target devices
>
On Mon, Feb 03, 2020 at 01:59:14PM +, Oliver Graute wrote:
> As proposed here:
>
> https://lists.denx.de/pipermail/u-boot/2020-January/396749.html
>
> Both of my imx8qm boards (Advantech and Congatec) aren't booting
> 2020.01 without this change. Whats the proper way to fix this on my side?
Hi,
On Thu, Dec 19, 2019 at 1:42 PM David Abdurachmanov
wrote:
>
> On Thu, Dec 19, 2019 at 12:18 AM Vagrant Cascadian wrote:
> >
> > On 2019-12-18, David Abdurachmanov wrote:
> > > On Wed, Dec 18, 2019 at 3:13 AM Vagrant Cascadian
> > > wrote:
> > >>
> > >> On 2019-09-25, Vagrant Cascadian
On Thu, Jun 6, 2019 at 5:06 PM Eric Lin wrote:
>
> This patch adds Kconfig entries for the F (Single-Precision)
> and D (Double-Precision) floating point instruction-set extensions.
>
> Signed-off-by: Eric Lin
> ---
> Changes for v2:
> - Grammatical correction in commit message "adds"
>
On Tue, Feb 04, 2020 at 12:06:30PM +0530, Keerthy wrote:
> Move the generic elf loading/validating functions to lib/
> so that they can be re-used and accessed by code existing
> outside cmd.
>
> While at it remove the duplicate static version of load_elf_image_phdr
> under
fdt_high value of 0x disables fdt relocation on boot. We don't
need that for Cubox-i/Hummingboard. Rely on generic code to find the
optimal fdt location at boot time.
Signed-off-by: Baruch Siach
---
include/configs/mx6cuboxi.h | 1 -
1 file changed, 1 deletion(-)
diff --git
Hi All,
May I know what are the next steps in making forward progress on this?
Best Regards,
Thiru
On 1/12/2020 11:34 PM, Thirupathaiah Annapureddy wrote:
> Add a driver for a firmware TPM running inside TEE.
>
> Documentation of the firmware TPM:
>
Thank You Simon for the review.
May I know what are the next steps in making forward progress on this?
Best Regards,
Thiru
On 1/7/2020 12:33 AM, Simon Goldschmidt wrote:
> On Tue, Jan 7, 2020 at 7:21 AM Thirupathaiah Annapureddy
> wrote:
>>
>> boot_fdt_add_mem_rsv_regions() scans the
Hi Rick,
When going through all patches in the RISC-V queue, I found this old
patch was not applied. Is it still needed?
Anyway, see my review comments below.
On Mon, Oct 8, 2018 at 1:43 PM Andes wrote:
>
> From: Rick Chen
>
> Add to print board and bit information message.
nits: please
On 2/4/20 11:04 AM, Bin Meng wrote:
> Hi Sean,
>
> On Tue, Feb 4, 2020 at 10:48 PM Sean Anderson wrote:
>> In any case, the errors I get are
>>
>> arch/riscv/cpu/cpu.c: Assembler messages:
>> arch/riscv/cpu/cpu.c:94: Error: unknown CSR `CSR_MSCOUNTEREN'
>> arch/riscv/cpu/cpu.c:94: Error: unknown
On Tue, Feb 04, 2020 at 09:28:38AM +0530, Lokesh Vutla wrote:
> Hi Tom,
>
> Please find the pull request for v2020.04-rc2 containing TI specific changes.
> This PR is a re spin of previous PR[0] without mmc changes and fetched
> few dt changes and watchdog fixes.
>
> [0]
On Mon, Feb 03, 2020 at 10:48:10PM +0100, Anatolij Gustschin wrote:
> Enable all BPP options by default to avoid empty video console
> output (this was the case before commit 2cc393f32fd9 ("video: make
> BPP and ANSI configs optional")). But also support optional selection
> of only required
On Tue, Feb 04, 2020 at 06:19:39PM +0100, Anatolij Gustschin wrote:
> On Tue, 4 Feb 2020 11:49:59 -0500
> Tom Rini tr...@konsulko.com wrote:
> ...
> > > config VIDEO_BPP32
> > > bool "Support 32-bit-per-pixel displays"
> > > depends on DM_VIDEO
> > > - default y if X86
> > > + default y if
Hello Heiko,
thanks a lot for your annotations and suggestions. I will have a look at
them and give you feedback ASAP.
Regards
Stefan
Am 04.02.20 um 07:58 schrieb Heiko Schocher:
Hello Stefan,
Am 03.02.2020 um 21:40 schrieb Stefan Bosch:
Changes in relation to FriendlyARM's U-Boot
On Tue, Jan 28, 2020 at 2:41 PM Pragnesh Patel
wrote:
>
>
> >-Original Message-
> >From: Jagan Teki
> >Sent: 27 January 2020 13:22
> >To: Pragnesh Patel
> >Cc: U-Boot-Denx ; Atish Patra
> >; palmerdabb...@google.com; Bin Meng
> >; Paul Walmsley ( Sifive)
> >; Troy Benjegerdes ( Sifive)
Hi Sean,
On Tue, Feb 4, 2020 at 10:48 PM Sean Anderson wrote:
>
> On 2/4/20 9:38 AM, Bin Meng wrote:
> > Hi Sean,
> >
> > On Tue, Feb 4, 2020 at 10:19 PM Sean Anderson wrote:
> >> I believe the macro compiles to "csrs CSR_FOO". At least with my
> >> gcc/binutils (9.2.0/2.33.1) this style is not
This partially reverts changes by commit 2cc393f32fd9
("video: make BPP and ANSI configs optional") since it
caused issues with other boards (missing LCD console
output on pinebook, x86 platform or sandbox). Enable
all disabled options again and opt out of not supported
color depth in board
From: Igor Opaniuk
Remove 'fdt_high' and 'initrd_high' environment variables (set to 0x)
from default environment which prevents relocation of FDT and initrd.
Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
initrd.
Signed-off-by: Igor Opaniuk
---
From: Igor Opaniuk
Remove 'fdt_high' and 'initrd_high' environment variables (set to 0x)
from default environment which prevents relocation of FDT and initrd.
Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
initrd.
Signed-off-by: Igor Opaniuk
---
From: Igor Opaniuk
Remove 'fdt_high' and 'initrd_high' environment variables (set to 0x)
from default environment which prevents relocation of FDT and initrd.
Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
initrd.
Signed-off-by: Igor Opaniuk
---
From: Igor Opaniuk
Remove 'fdt_high' and 'initrd_high' environment variables (set to 0x)
from default environment which prevents relocation of FDT and initrd.
Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
initrd.
Signed-off-by: Igor Opaniuk
---
From: Igor Opaniuk
Remove 'fdt_high' and 'initrd_high' environment variables (set to 0x)
from default environment which prevents relocation of FDT and initrd.
Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
initrd.
Signed-off-by: Igor Opaniuk
---
On Fri, 2019-11-22 at 18:19 -0800, Atish Patra wrote:
> On Wed, 2019-11-13 at 11:47 -0800, Atish Patra wrote:
> > On Wed, 2019-11-13 at 15:36 +0200, David Abdurachmanov wrote:
> > > On Sat, Nov 9, 2019 at 2:14 AM Atish Patra
> > > wrote:
> > > > Add compressed Image parsing support so that booti
The Primary to Sideband Bridge (P2SB) is not specific to Apollo Lake, so
move its driver to a common location within arch/x86.
Signed-off-by: Wolfgang Wallner
---
This commit follows a similar rational as the recent moving of the ITSS
driver from Apollo Lake to the intel_common directory, and
On Tue, Feb 4, 2020 at 8:20 AM Simon Glass wrote:
>
> Add nodes to the device tree for Cr50 and other available I2C ports. Also
> enable the ACPI interrupt driver.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Move intel-clock.h inclusion to the correct patch
>
>
On Tue, Feb 4, 2020 at 8:20 AM Simon Glass wrote:
>
> At present driver model supports the IRQ uclass but there is no way to
> request a particular interrupt for a driver.
>
> Add a mechanism, similar to clock and reset, to read the interrupts
> required by a device from the device tree and to
On Tue, Feb 4, 2020 at 8:20 AM Simon Glass wrote:
>
> ACPI GPEs are used to signal interrupts from peripherals that are accessed
> via ACPI. In U-Boot these are modelled as interrupts using a separate
> interrupt controller. Configuration is via the device tree.
>
> Add a simple driver for this.
The dts is taken from the linux-next commit:
98d25b0b266d Merge branch 'sunxi/dt-for-5.6' into sunxi/for-next
The Bluetooth controller of this device ships with a default adress,
use the new CONFIG_FIXUP_BDADDR option to fix it up.
Signed-off-by: Andre Heider
Acked-by: Maxime Ripard
---
Hi Jagan,
On 21/01/2020 08:43, Jagan Teki wrote:
On Tue, Dec 3, 2019 at 2:15 PM Andre Heider wrote:
Taken from the kernel tag v5.4.
Drop the /omit-if-no-ref/ keyword as it's not supported by u-boot.
Please sync it from v5.6
98d25b0b266d Merge branch 'sunxi/dt-for-5.6' into sunxi/for-next
On Tue, Feb 4, 2020 at 8:20 AM Simon Glass wrote:
>
> Add an IRQ type to each driver and use irq_first_device_type() to find
> and probe the correct one.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Move 'success' comment into previous patch
>
> arch/x86/cpu/apollolake/fsp_s.c |
On Tue, Feb 4, 2020 at 8:20 AM Simon Glass wrote:
>
> There can be different types of interrupt controllers in a system and some
> drivers may need to distinguish between these. In general this can be
> handled using the device tree by adding the interrupt information to
> device nodes.
>
>
On Tue, Feb 4, 2020 at 8:20 AM Simon Glass wrote:
>
> Allow this driver to be used in TPL by setting up the interrupt type
> correctly.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
> arch/x86/cpu/intel_common/itss.c | 10 ++
> 1 file changed, 10 insertions(+)
>
Changes since v3:
* use dts files from linux-next 98d25b0b266d
* added commit description to "sunxi: board: extract creating a unique sid into
a helper function"
* added Maxime's Acked-by
Changes since v2:
* drop "sunxi: board: Use eth_env_set_enetaddr_by_index()" as it breaks
compilation
Taken from the linux-next commit:
98d25b0b266d Merge branch 'sunxi/dt-for-5.6' into sunxi/for-next
Drop the /omit-if-no-ref/ keyword as it's not supported by u-boot.
Signed-off-by: Andre Heider
Acked-by: Maxime Ripard
---
arch/arm/dts/sun50i-h6-beelink-gs1.dts | 48 +++-
Refactor setup_environment() so we can use the created sid for a
Bluetooth address too.
Signed-off-by: Andre Heider
Acked-by: Maxime Ripard
---
board/sunxi/board.c | 105
1 file changed, 58 insertions(+), 47 deletions(-)
diff --git
Some Bluetooth controllers, like the BCM4345C5 of the Orange Pi 3,
ship with the controller default address.
Add a config option to fix it up so it can function properly.
Signed-off-by: Andre Heider
Tested-by: Ondrej Jirman
Acked-by: Maxime Ripard
---
arch/arm/mach-sunxi/Kconfig | 11
On Tue, Feb 4, 2020 at 4:04 PM Wolfgang Wallner
wrote:
>
> The Primary to Sideband Bridge (P2SB) is not specific to Apollo Lake, so
> move its driver to a common location within arch/x86.
>
> Signed-off-by: Wolfgang Wallner
>
> ---
> This commit follows a similar rational as the recent moving of
Hi Simon,
On Tue, Feb 4, 2020 at 8:20 AM Simon Glass wrote:
>
> H1 is a Google security chip present in recent Chromebooks, Pixel phones
> and other devices. Cr50 is the name of the software that runs on H1 in
> Chromebooks.
>
> This chip is used to handle TPM-like functionality and also has
On Tue, Feb 4, 2020 at 8:20 AM Simon Glass wrote:
>
> Enable TPM2 so that we can use cr50.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Update the commit message
> - Add new patches to handle requesting interrupts and interrupt state
>
> configs/chromebook_coral_defconfig | 3 ++-
On Tue, Feb 4, 2020 at 8:20 AM Simon Glass wrote:
>
> Add definitions for access and status.
>
> Need to drop the mixed case.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
> include/tpm-v2.h | 31 +++
> 1 file changed, 31 insertions(+)
>
On 04/02/2020 09:02, Andre Heider wrote:
Hi Jagan,
On 21/01/2020 08:43, Jagan Teki wrote:
On Tue, Dec 3, 2019 at 2:15 PM Andre Heider wrote:
Taken from the kernel tag v5.4.
Drop the /omit-if-no-ref/ keyword as it's not supported by u-boot.
Please sync it from v5.6
98d25b0b266d Merge
>-Original Message-
>From: Kuldeep Singh
>Sent: Wednesday, November 6, 2019 4:38 PM
>To: u-boot@lists.denx.de
>Cc: Priyanka Jain ; Kuldeep Singh
>
>Subject: [PATCH 4/4] configs: lx2160a: Enable FSPI support
>
>Enable FSPI controller support. So, flash environment can now be used
>
On Sat, Jan 11, 2020 at 1:32 AM Sean Anderson wrote:
>
> If CONFIG_CMDLINE=n, common/cli.c calls board_run_command. This fails to
> link on most architectures. However, the sandbox architecture has an
> implementation which we can use.
>
> Signed-off-by: Sean Anderson
> ---
> Changes for v2:
>
Hi Sean,
On Mon, Jan 20, 2020 at 7:13 AM Sean Anderson wrote:
>
> Currently, the sf command will probe anything attached to an spi bus,
> regardless
> of whether it is UCLASS_SPI_FLASH. This came up when testing the mmc_spi
> driver,
Did you do something like:
=> sf probe 1 0
?
> which is
My main motivation of this series is the last patch
"mmc: sdhci: fix missing cache invalidation after reading by DMA".
Currently, read data are occasionally corrupted due to the
missing cache invalidation.
To fix it nicely (adds dma_unmap_single(), which follows the
Linux coding style), I did
This driver currently performs cache operation before the DMA start,
but does nothing after the DMA completion.
When reading data by DMA, the cache invalidation is needed also after
finishing the DMA transfer. Otherwise, the CPU might read data from
the cache instead of from the main memory when
Make dma_map_single() return the dma address, and remove the
pointless volatile.
Signed-off-by: Masahiro Yamada
---
arch/arm/include/asm/dma-mapping.h | 5 +++--
arch/nds32/include/asm/dma-mapping.h | 5 +++--
arch/riscv/include/asm/dma-mapping.h | 5 +++--
arch/x86/include/asm/dma-mapping.h
dma_unmap_single() takes the dma address, not virtual address.
Signed-off-by: Masahiro Yamada
---
arch/arm/include/asm/dma-mapping.h | 4 +---
arch/nds32/include/asm/dma-mapping.h | 4 +---
arch/riscv/include/asm/dma-mapping.h | 4 +---
arch/x86/include/asm/dma-mapping.h | 4 +---
Hi Sean,
On Mon, Feb 3, 2020 at 4:10 AM Sean Anderson wrote:
>
> Where possible, I have tried to find compatible drivers based on the layout of
> registers. However, I have not tested most of this functionality, and most
> devices should be considered descriptive at best. I would appreciate if
Hi Sagar,
On Wed, Jan 29, 2020 at 2:02 AM Sagar Shrikant Kadam
wrote:
>
> Currently device ID for flash mounted on HiFive Unleashed is added to
> U-Boot. Also there are few patches about to go in mainline (Thanks to
> Jagan Tekki and Bin Meng).
>
> This series addresses few issues discussed
Hi Tom, Wolfgang,
On 03/02/20 5:34 pm, Peng Fan wrote:
>> Subject: Re: [PATCH v2 02/10] mmc: Add init() API
>>
>> Hi Peng,
>>
>> On 01/02/20 6:43 pm, Peng Fan wrote:
Subject: Re: [PATCH v2 02/10] mmc: Add init() API
Hi Simon,
On 29/01/20 1:33 pm, Simon Goldschmidt wrote:
On Mon, Feb 3, 2020 at 1:40 AM Sean Anderson wrote:
>
> The cpu clock is probably already enabled if we are executing code
> (though we could be executing from a different core). This patch
> prevents the cpu clock or its parents from being disabled.
>
> Signed-off-by: Sean Anderson
> ---
>
On Mon, Feb 3, 2020 at 1:38 AM Sean Anderson wrote:
>
> Instead of always using the "clock-frequency" property to determine cpu
> frequency, try using a clock in "clocks" if it exists. This patch also fixes a
> bug where there could be spurious higher frequencies if sizeof(u32) !=
>
Hi Sean,
On Mon, Feb 3, 2020 at 4:01 AM Sean Anderson wrote:
>
> This patch adds a generic reset driver. It is designed to be useful when one
> has
> a register in a regmap which contains bits that reset other devices. I thought
> this seemed like a very generic use, so here is a generic
Switch over to ADMA from SDMA.
Signed-off-by: Masahiro Yamada
---
configs/uniphier_v8_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index 9ad4bd68b6c8..55f7516e3992 100644
---
On Mon, Feb 3, 2020 at 4:02 AM Sean Anderson wrote:
>
> This type of bus is used in Linux to designate busses which have power domains
> and/or clocks which need to be enabled before their child devices can be used.
> Because power domains are automatically enabled before probing in u-boot, we
>
On Tue, Feb 4, 2020 at 4:51 AM Sean Anderson wrote:
>
> This adds a subcommand to dm to dump out what drivers are installed, and their
> compatible strings. I have found this useful in ensuring that I have the
> correct
> drivers compiled, and that I have put in the correct compatible strings.
>
The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and
define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER).
Unify the code.
Signed-off-by: Masahiro Yamada
---
drivers/mmc/sdhci.c | 22 --
include/sdhci.h | 2 ++
2 files changed, 10 insertions(+), 14 deletions(-)
diff
Use {lower,upper}_32_bits() instead of the combination of cast
and shift.
Signed-off-by: Masahiro Yamada
---
drivers/mmc/sdhci.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index b4713e7b9bba..fefe81016eb1 100644
---
host->mmc is already (struct mmc *).
memalign() returns an opaque pointer, so there is no need for casting.
Signed-off-by: Masahiro Yamada
---
drivers/mmc/sdhci.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index
Using the global variable does not look nice.
Add a new field sthci::align_buffer to point to the bounce buffer.
Signed-off-by: Masahiro Yamada
---
drivers/mmc/sdhci.c | 27 +--
include/sdhci.h | 1 +
2 files changed, 14 insertions(+), 14 deletions(-)
diff --git
Copied from Linux kernel.
include/linux/mmc/host.h
Signed-off-by: Masahiro Yamada
---
include/mmc.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/mmc.h b/include/mmc.h
index b5cb514f57d6..71e2e1735ad5 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -12,6 +12,7 @@
Currently, sdhci_prepare_dma() calls flush_cache() regardless of the
DMA direction.
Actually, cache invalidation is enough when reading data from the device.
This is correctly handled by dma_map_single(), which mimics the DMA-API
in Linux kernel. Drivers can be agnostic which cache operation
Hi Sean,
On Mon, Feb 3, 2020 at 4:04 AM Sean Anderson wrote:
>
> This header depended on bd_t and ulong, but did not include the appropriate
> headers.
>
> Signed-off-by: Sean Anderson
> ---
> arch/riscv/include/asm/global_data.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git
Hi Sean,
On Mon, Feb 3, 2020 at 4:05 AM Sean Anderson wrote:
>
> Some older processors (notably the Kendryte K210) use an older version of the
> RISC-V privileged specification. The primary changes between the old and new
> are
> in virtual memory, and in the merging of three separate counter
On Mon, Feb 3, 2020 at 4:06 AM Sean Anderson wrote:
>
> Currently, one cannot use a reset driver on RISC-V. Follow the MIPS example,
> and
> disable the default reset handler when the sysreset driver is enabled.
>
> Signed-off-by: Sean Anderson
> ---
> Changes for v3:
> - New
>
>
Hi Sean,
On Mon, Feb 3, 2020 at 4:11 AM Sean Anderson wrote:
>
> The Sipeed Maix series is a collection of boards built around the RISC-V
> Kendryte K210 processor. This processor contains several peripherals to
> accelerate neural network processing and other "ai" tasks. This includes a
>
On 03/02/20, Fabio Estevam wrote:
> On Mon, Feb 3, 2020 at 12:33 PM Oliver Graute wrote:
>
> > Yes, but phy addr 0 is currently not working that way for me. So I tried
> > to solve it by autodetecting the phy. Please see this thread:
>
> Looking at your other patch, it looks like you have:
>
>
The following changes since commit 31a790bee939e227dfc7e6a6a323b2b13180707f:
Merge branch 'master' of git://git.denx.de/u-boot-usb (2020-02-02
15:26:53 -0500)
are available in the Git repository at:
git://git.denx.de/u-boot-socfpga.git master
for you to fetch changes up to
> Subject: [PATCH] mx6ullevk: Enable Ethernet support
>
> Add Ethernet support using DM_ETH.
>
> Signed-off-by: Fabio Estevam
Reviewed-by: Peng Fan
> ---
> board/freescale/mx6ullevk/mx6ullevk.c | 47
> +++
> configs/mx6ull_14x14_evk_defconfig| 8 +
>
On Tue, Feb 04, 2020 at 02:58:01PM +0800, Bin Meng wrote:
> Hi Tom,
>
> This PR includes the following changes for v2020.04:
>
> - Various minor fixes for x86
> - Switch to ACPI mode on Intel edison
> - Support run-time configuration for NS16550 driver
> - Update coreboot and slimbootloader
> Subject: [v8 1/8] rtc: pcf8563: Add driver model support
>
> Add support of driver model of pcf8563
>
> Signed-off-by: Biwen Li
> ---
> Changes in v8:
> - none
>
> Changes in v7:
> - none
>
> Changes in v6:
> - none
>
> Changes in v5:
> - none
>
> Changes in v4:
>
On 2/5/20 1:28 AM, Atish Patra wrote:
On Sat, Feb 1, 2020 at 8:55 AM Heinrich Schuchardt wrote:
RISC-V patches are developed for OpenSBI and Linux to replace random boot
by sequential CPU bring-up.
In this scenario the id of the active hart has to be passed from boot stage
to boot stage.
clear_bss is already used by 3 arches (x86, arc, xtensa), so make it generic
and provide a weak nop stub for it. This also removes arch-specific ifdef
duplications around clear_bss.
Signed-off-by: Ovidiu Panait
---
common/board_f.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
> Subject: [PATCH 1/2] mx6ul_evk: Move CONFIG_FEC_MXC to defconfig
>
> CONFIG_FEC_MXC is supported in Kconfig, so it is preferred to move it to
> defconfig file.
>
> Signed-off-by: Fabio Estevam
Reviewed-by: Peng Fan
> ---
> configs/mx6ul_14x14_evk_defconfig | 1 +
>
> Subject: [PATCH 2/2] mx6ul_evk: Remove FEC related board code
>
> mx6ul_evk uses DM_ETH, so there is no need to have board code to setup the
> FEC IOMUX and to register the network ports via the old board_eth_init()
> method.
>
> Remove these FEC related pieces of code.
>
> Signed-off-by:
> Subject: Re: [PATCH v2 04/10] mmc: sdhci: Expose sdhci_init() as non-static
>
> Hi,
>
> On 31/01/20 3:55 am, Simon Goldschmidt wrote:
> > Am 30.01.2020 um 23:21 schrieb Jaehoon Chung:
> >> Hi Simon,
> >>
> >> On 1/29/20 11:16 PM, Simon Goldschmidt wrote:
> >>> On Wed, Jan 29, 2020 at 12:00 AM
On Wed, 5 Feb 2020 at 05:53, Heinrich Schuchardt wrote:
>
> RISC-V booting currently is based on a per boot stage lottery to determine
> the active CPU. The Hart State Management (HSM) SBI extension replaces
> this lottery by using a dedicated primary CPU.
>
> Cf. Hart State Management Extension,
> Subject: [PATCH] mmc: fsl_esdhc: actually enable cache snooping on mpc830x
+ Y.b
Are you ok with this patch?
Thanks,
Peng.
>
> The reference manuals for MPC8308 and MPC8309 both say that the esdhcctl
> aka DMA Control Register "is implemented as SDHCCR" in the System
> configuration
> Subject: [PATCH v2] mx6sxsabresd: Keep only one target
>
> Currently there are two targets for the i.MX6SX SabreSD board:
> mx6sxsabresd_defconfig and mx6sxsabresd_spl_defconfig.
>
> This brings additional maintainance effort without a clear advantage.
>
> Keep only the mx6sxsabresd_defconfig
Hi Peng,
On 05/02/20 12:58 pm, Peng Fan wrote:
>> Subject: Re: [PATCH v2 04/10] mmc: sdhci: Expose sdhci_init() as non-static
>>
>> Hi,
>>
>> On 31/01/20 3:55 am, Simon Goldschmidt wrote:
>>> Am 30.01.2020 um 23:21 schrieb Jaehoon Chung:
Hi Simon,
On 1/29/20 11:16 PM, Simon
Currently, there's no way to fetch the value of an environment
variable whose name is stored in some other variable, or generated from
such - in non-working pseudo-code,
${${varname}}
${array${index}}
This forces some scripts to needlessly duplicate logic and hardcode
assumptions. For
So far we have avoided adding a clock driver for Intel devices. But the
Designware I2C driver needs a different clock (133MHz) on Intel devices
than on others (166MHz). Add a simple driver that provides this
information.
This driver can be expanded later as needed.
Signed-off-by: Simon Glass
These are actually working correctly, so update the status.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v3: None
Changes in v2: None
doc/board/google/chromebook_coral.rst | 2 --
1 file changed, 2 deletions(-)
diff --git a/doc/board/google/chromebook_coral.rst
Enable the Intel clock driver and modify coral's device tree to use it.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v3: None
Changes in v2:
- Move intel-clock.h inclusion to the correct patch
arch/x86/cpu/apollolake/Kconfig | 3 +++
arch/x86/dts/chromebook_coral.dts | 5
This config is not actually used here and in U-Boot it seems better to set
this using the device tree for each individual controller. The monolithic
config of the FSP-S is only necessary if the FSP is actually configuring
something, but here it is not.
The FSP-S does enable/disable the various
Now that we have uclass_first_device_drvdata(), use it from the I2C driver
to reduce code duplication.
Signed-off-by: Simon Glass
Reviewed-by: Heiko Schocher
Reviewed-by: Bin Meng
---
Changes in v3: None
Changes in v2:
- Add new patch to change tegra driver to use helper function
At present we have uclass_foreach_dev() which requires that uclass_get()
be called beforehand to find the uclass. This is good if we suspect that
that function might fail, but often we know that the uclass is available.
Add a new helper which does this uclass_get() automatically, so that only
the
Now that we have uclass_first_device_drvdata(), use it from syscon to
reduce code duplication.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v3: None
Changes in v2:
- Add new patch to change syscon to use helper function
drivers/core/syscon-uclass.c | 15 ---
1
There can be different types of interrupt controllers in a system and some
drivers may need to distinguish between these. In general this can be
handled using the device tree by adding the interrupt information to
device nodes.
However on x86 devices we have interrupt controllers which are not
This series adds a driver for the Cr50 security chip and enables it on
coral. This supports the 'tpm' command.
In order to make this work a few other changes are included:
- Additional UCLASS_IRQ operations to support requesting and reading
interrupts, using the device tree
- A driver for ACPI
search for gpio label if gpio name from bankname is not found.
This makes sense on boards with different hardware verions. You
can now search for the gpio label name, and can give the gpio
a unique name. The real gpio pin number is not needed in board
code anymore.
while at it add basic gpio hog
dm_gpio_lookup_name() searches for a gpio through
the bank name. But we have also gpio labels, and it
makes sense to search for a gpio also in the labels
we have defined, if no gpio is found through the
bank name definition.
This is useful for example if you have a wp pin on
different gpios on
currently gpio hog function is not tested with "ut dm gpio"
so add some basic tests for gpio hog functionality.
For this enable GPIO_HOG in sandbox_defconfig, add
in DTS some gpio hog entries, and add testcase in
"ut dm gpio" command.
Signed-off-by: Heiko Schocher
---
Changes in v3: None
>-Original Message-
>From: Michael Walle
>Sent: Wednesday, December 18, 2019 4:40 AM
>To: u-boot@lists.denx.de
>Cc: Vignesh R ; Prabhakar X
>; Kuldeep Singh ;
>Priyanka Jain ; Michael Walle
>Subject: [PATCH v4 2/3] arm: ls1028a: use the new flexspi driver
>
>Also align the fspi node with
>-Original Message-
>From: Kuldeep Singh
>Sent: Wednesday, November 6, 2019 4:38 PM
>To: u-boot@lists.denx.de
>Cc: Priyanka Jain ; Kuldeep Singh
>
>Subject: [PATCH 1/4] arm: dts: ls1028a: Add FSPI node properties
>
>Align flexspi node properties with linux device-tree properties Tested on
>-Original Message-
>From: U-Boot On Behalf Of Alison Wang
>Sent: Tuesday, January 21, 2020 1:03 PM
>To: Priyanka Jain ; u-boot@lists.denx.de
>Cc: Alison Wang ; Peng Ma
>Subject: [PATCH] configs: ls1021a: Reserve low memory for CMA
>
>The default reserved memory for CMA is high memory.
Hi Thirupathaiah,
On Tue, 4 Feb 2020 at 10:08, Thirupathaiah Annapureddy
wrote:
>
> Hi All,
>
> May I know what are the next steps in making forward progress on this?
Can you please add a test for this? We need a sandbox driver of some
sort - see the existing sandbox TPM driver.
Regards,
Simon
Hi Baruch,
On Tue, Feb 4, 2020 at 1:57 PM Baruch Siach wrote:
>
> fdt_high value of 0x disables fdt relocation on boot. We don't
> need that for Cubox-i/Hummingboard. Rely on generic code to find the
> optimal fdt location at boot time.
>
> Signed-off-by: Baruch Siach
> ---
>
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