Hello,
I try to use the usb on u imx8mm but the usb controller does not seem
recognized:
u-boot => usb start
starting USB ...
Do you have an idea ?
Best regards
Joris Offouga
Hi
On Sat, Jun 20, 2020 at 2:35 PM Michael Nazzareno Trimarchi
wrote:
>
> Hi
>
> On Sat, Jun 20, 2020 at 2:30 PM Marek Vasut wrote:
> >
> > Add extension to the 'mmc' command to read out the card registers.
> > Currently, only the eMMC OCR/CID/CSD/EXTCSD/RCA/DSR register are
> > supported. A
Hi Stefan,
On Wed, Jun 17, 2020 at 6:40 PM Stefan Roese wrote:
>
> Hi Rayagonda,
>
> On 17.06.20 09:44, Rayagonda Kokatanur wrote:
> > Hi Stefan,
> >
> > On Thu, Jun 11, 2020 at 4:19 PM Stefan Roese wrote:
> >>
> >> Hi Rayagonda,
> >>
> >> On 10.06.20 18:35, Rayagonda Kokatanur wrote:
> >>> Hi
On Fri, Jun 19, 2020 at 2:08 PM Marek Vasut wrote:
>
> On 6/19/20 5:52 PM, Adam Ford wrote:
> > On Fri, Jun 19, 2020 at 9:18 AM Marek Vasut wrote:
> >>
> >> On 6/19/20 3:58 PM, Adam Ford wrote:
> >>> This sync's the clock tables with the official release from
> >>> Renesas' repo based on U-Boot
Enable QE bit for ISSI flash chips.
QE enablement logic is similar to what Macronix
has, so reuse the existing code itself.
Signed-off-by: Pragnesh Patel
---
drivers/mtd/spi/spi-nor-core.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c
Hi Sughosh,
> On Wed, 17 Jun 2020 at 08:25, AKASHI Takahiro
> wrote:
>
> > This function is essentially independent from tffp, and will also be
> > utilised in implementing UEFI capsule update in a later commit.
> > So just give it a more generic name.
> > In addition, a new configuration
U-Boot cmd "cpu detail" shows inconsistent CPU features and is missing
clk_request and free handlers.
The current "cpu detail" sometimes shows "Microcode" as a feature, which
is not the case with FU540-C000 on HiFive Unleashed board.
Patch 1: add clk request handler to check if valid clock id is
All cpu cores within FU540-C000 having split I/D caches.
Set the L1 cache feature bit using the i-cache-size as one of the
property from device tree indicating that L1 cache is present
on the cpu core.
=> cpu detail
0: cpu@0 rv64imac
ID = 0, freq = 999.100 MHz: L1 cache
1: cpu@1
Add clk_request handler to check if a valid clock is requested.
Here clk_free handler is added for debug purpose which will display
details of clock passed to clk_free.
Signed-off-by: Sagar Shrikant Kadam
Reviewed-by: Pragnesh Patel
---
drivers/clk/sifive/fu540-prci.c | 21
Add cpu aliases to U-Boot specific dtsi for hifive-unleashed.
Without aliases we see that the CPU device sequence numbers are set
randomly and the cpu list/detail command will show it as follows:
=> cpu list
1: cpu@0 rv64imac
0: cpu@1 rv64imafdc
2: cpu@2 rv64imafdc
3: cpu@3
The cmd "cpu detail" fetches uninitialized cpu feature information
and thus displays wrong / inconsitent details as below. FU540-C000 doesn't
have any microcode, yet the cmd display's it.
=> cpu detail
0: cpu@0 rv64imac
ID = 0, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
On 6/21/20 3:37 PM, Adam Ford wrote:
[...]
> static const struct mstp_stop_table r8a774a1_mstp_table[] = {
> { 0x, 0, 0x, 0 },
> { 0xc3e81000, 0, 0xc3e81000, 0 },
> { 0x000E0FDC, 0, 0x000E0FDC, 0 },
> { 0xD00C7C1F, 0, 0xD00C7C1F, 0 },
> { 0x8004, 0, 0x8004, 0 },
> {
Hi Neil,
On Thu, 18 Jun 2020 at 20:11, Neil Armstrong wrote:
>
> From: Pascal Vizeli
>
> Add a proper Odroid-N2 board support to handle the Ethernet MAC
> address stored in the in-SoC eFuses.
>
This feature need to be implemented for all Amlogic SoC boards,
since many boards link libretech-cc
On Sun, Jun 21, 2020 at 12:19:17AM +0530, Sughosh Ganu wrote:
> On Wed, 17 Jun 2020 at 08:26, AKASHI Takahiro
> wrote:
>
> > In this commit, a very simple firmware management protocol driver
> > is implemented. It will take a common FIT image firmware in a capsule
> > file and apply the data
It is not supported for now.
Regards,
Peng.
Subject: Usb on imx8mm
Hello,
I try to use the usb on u imx8mm but the usb controller does not seem
recognized:
u-boot => usb start
starting USB ...
Do you have an idea ?
Best regards
Joris Offouga
Hi Sagar,
> From: Sagar Shrikant Kadam [mailto:sagar.ka...@sifive.com]
> Sent: Sunday, June 21, 2020 9:10 PM
> To: u-boot@lists.denx.de
> Cc: Rick Jian-Zhi Chen(陳建志); lu...@denx.de; bmeng...@gmail.com;
> ja...@amarulasolutions.com; pragnesh.pa...@sifive.com; anup.pa...@wdc.com;
>
On Sun, Jun 21, 2020 at 12:05:29AM +0530, Sughosh Ganu wrote:
> On Wed, 17 Jun 2020 at 08:25, AKASHI Takahiro
> wrote:
>
> > This function is essentially independent from tffp, and will also be
> > utilised in implementing UEFI capsule update in a later commit.
> > So just give it a more generic
On Sun, Jun 21, 2020 at 12:27:07AM +0530, Sughosh Ganu wrote:
> On Wed, 17 Jun 2020 at 08:26, AKASHI Takahiro
> wrote:
>
> > In this commit, a very simple firmware management protocol driver
> > is implemented. It will take a binary image in a capsule file and
> > apply the data using dfu
Hi Heinrich,
On Sun, Jun 21, 2020 at 12:37 AM Heinrich Schuchardt wrote:
>
> Hello Tom,
>
> somehow or test set up for RISC-V is not matching our QEMU version:
>
> https://gitlab.denx.de/u-boot/custodians/u-boot-efi/-/jobs/112284
>
> 1046 test/py/u_boot_spawn.py:170: Timeout
> 1047
Hello Rick,
> -Original Message-
> From: Rick Chen
> Sent: Monday, June 22, 2020 7:24 AM
> To: Sagar Kadam
> Cc: U-Boot Mailing List ; Lukasz Majewski
> ; Bin Meng ; Jagan Teki
> ; Pragnesh Patel
> ; Anup Patel ; Simon
> Glass ; Sean Anderson ; rick
> ; Alan Kao ;
>
> -Original Message-
> From: Tom Rini
> Sent: Friday, June 19, 2020 8:07 PM
> To: Priyanka Jain
> Cc: Kuldeep Singh ; Joe Hershberger
> ; u-boot@lists.denx.de; Schrempf Frieder
>
> Subject: Re: [EXT] Re: [RESEND][Patch v4] net: pfe_eth: Use spi_flash_read
> API to access flash memory
The current URL for the pico imx6ul board is not valid anymore. Change
to a different URL that works.
Signed-off-by: Fabio Estevam
---
board/technexion/pico-imx6ul/README | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/technexion/pico-imx6ul/README
Jaehoon,
> Subject: [PATCH v4] mmc: sdhci: Fix HISPD bit handling
Are you fine with this v4?
Thanks,
Peng.
>
> SDHCI HISPD bits need to be configured based on desired mmc timings mode
> and some HISPD quirks.
>
> So, handle the HISPD bit based on the mmc computed selected mode(timing
>
Lukasz,
On Sun, Jun 21, 2020 at 09:38:32AM +0200, Lukasz Majewski wrote:
> Hi Sughosh,
>
> > On Wed, 17 Jun 2020 at 08:25, AKASHI Takahiro
> > wrote:
> >
> > > This function is essentially independent from tffp, and will also be
> > > utilised in implementing UEFI capsule update in a later
On Sun, Jun 21, 2020 at 12:09:23AM +0530, Sughosh Ganu wrote:
> On Wed, 17 Jun 2020 at 08:26, AKASHI Takahiro
> wrote:
>
> > In this commit, a very simple firmware management protocol driver
> > is implemented. It will take a common FIT image firmware in a capsule
> > file and apply the data
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