[PATCH] ARM: da850-evm: Unify config options with Kconfig
There are two options that are currently whitelisted, but they
are redundant, because there are not necessary since Kconfig options
exist to basically state the same thing.
CONFIG_DIRECT_NOR_BOOT and CONFIG_USE_NOR are both set together and
only used by the da850 when booting from NOR, however the only time
CONFIG_MTD_NOR_FLASH is configured is when booting from NOR. Since
NOR doesn't need SPL, the options for SPL can be moved to a check for
building SPL instead of checking for NOR.
This patch removes the checks for these two config options and unifies
the checks around the Kconfig option of CONFIG_MTD_NOR_FLASH.
Since this board is the only board that uses these two config options,
they can be removed from the whitelist table.
Signed-off-by: Adam Ford
diff --git a/board/davinci/da8xxevm/da850evm.c
b/board/davinci/da8xxevm/da850evm.c
index a3b0f8bf09..c91aeb8dbf 100644
--- a/board/davinci/da8xxevm/da850evm.c
+++ b/board/davinci/da8xxevm/da850evm.c
@@ -205,7 +205,7 @@ int misc_init_r(void)
}
static const struct pinmux_config gpio_pins[] = {
-#ifdef CONFIG_USE_NOR
+#ifdef CONFIG_MTD_NOR_FLASH
/* GP0[11] is required for NOR to work on Rev 3 EVMs */
{ pinmux(0), 8, 4 },/* GP0[11] */
#endif
@@ -235,7 +235,7 @@ const struct pinmux_resource pinmuxes[] = {
PINMUX_ITEM(emifa_pins_cs3),
PINMUX_ITEM(emifa_pins_cs4),
PINMUX_ITEM(emifa_pins_nand),
-#elif defined(CONFIG_USE_NOR)
+#elif defined(CONFIG_MTD_NOR_FLASH)
PINMUX_ITEM(emifa_pins_cs2),
PINMUX_ITEM(emifa_pins_nor),
#endif
@@ -341,7 +341,7 @@ int board_init(void)
DAVINCI_SYSCFG_SUSPSRC_UART2),
_syscfg_regs->suspsrc);
-#ifdef CONFIG_USE_NOR
+#ifdef CONFIG_MTD_NOR_FLASH
/* Set the GPIO direction as output */
clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
diff --git a/configs/da850evm_direct_nor_defconfig
b/configs/da850evm_direct_nor_defconfig
index ab86108d66..b46ab3c2cf 100644
--- a/configs/da850evm_direct_nor_defconfig
+++ b/configs/da850evm_direct_nor_defconfig
@@ -10,7 +10,6 @@ CONFIG_ENV_SIZE=0x2800
CONFIG_ENV_SECT_SIZE=0x2
CONFIG_DM_GPIO=y
CONFIG_NR_DRAM_BANKS=1
-CONFIG_SYS_EXTRA_OPTIONS="USE_NOR,DIRECT_NOR_BOOT"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw
noinitrd ip=dhcp"
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 4d651264dd..c825a0440b 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -13,10 +13,6 @@
/*
* Board
*/
-/* check if direct NOR boot config is used */
-#ifndef CONFIG_DIRECT_NOR_BOOT
-#define CONFIG_USE_SPIFLASH
-#endif
/*
* SoC Configuration
@@ -28,7 +24,7 @@
#define CONFIG_SYS_HZ_CLOCKclk_get(DAVINCI_AUXCLK_CLKID)
#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
-#ifdef CONFIG_DIRECT_NOR_BOOT
+#ifdef CONFIG_MTD_NOR_FLASH
#define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11)
#endif
@@ -107,10 +103,6 @@
#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID)
-#ifdef CONFIG_USE_SPIFLASH
-#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x4
-#endif
-
/*
* I2C Configuration
*/
@@ -171,7 +163,7 @@
#define CONFIG_NET_RETRY_COUNT 10
#endif
-#ifdef CONFIG_USE_NOR
+#ifdef CONFIG_MTD_NOR_FLASH
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
#define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */
#define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE
@@ -224,16 +216,11 @@
#define CONFIG_CLOCKS
#endif
-#if !defined(CONFIG_MTD_RAW_NAND) && \
- !defined(CONFIG_USE_NOR) && \
- !defined(CONFIG_USE_SPIFLASH)
-#endif
-
/* USB Configs */
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
-#ifndef CONFIG_DIRECT_NOR_BOOT
+#ifdef CONFIG_SPL_BUILD
/* defines for SPL */
#define CONFIG_SYS_SPL_MALLOC_START(CONFIG_SYS_TEXT_BASE - \
CONFIG_SYS_MALLOC_LEN)
@@ -248,12 +235,12 @@
/* additions for new relocation code, must added to all boards */
#define CONFIG_SYS_SDRAM_BASE 0xc000
-#ifdef CONFIG_DIRECT_NOR_BOOT
+#ifdef CONFIG_MTD_NOR_FLASH
#define CONFIG_SYS_INIT_SP_ADDR0x8001ff00
#else
#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_SDRAM_BASE + 0x1000
- /* Fix this */ \
GENERATED_GBL_DATA_SIZE)
-#endif /* CONFIG_DIRECT_NOR_BOOT */
+#endif /* CONFIG_MTD_NOR_FLASH */
#include
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 916768f361..770bcaf223 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -313,7 +313,6 @@ CONFIG_DFU_ENV_SETTINGS
CONFIG_DHCP_MIN_EXT_LEN
CONFIG_DIALOG_POWER
CONFIG_DIMM_SLOTS_PER_CTLR
-CONFIG_DIRECT_NOR_BOOT
CONFIG_DISCONTIGMEM
CONFIG_DISCOVER_PHY
CONFIG_DISPLAY_AER_
@@ -4161,7 +4160,6 @@ CONFIG_USB_XHCI_EXYNOS
CONFIG_USB_XHCI_OMAP
Re: [PATCH v3 06/15] board: ns3: default reset type to L3
Hi Simon,
On Fri, Jun 26, 2020 at 6:42 AM Simon Glass wrote:
>
> Hi Rayagonda,
>
> On Wed, 10 Jun 2020 at 04:42, Rayagonda Kokatanur
> wrote:
> >
> > Default "reset" from u-boot to L3 reset.
>
> U-Boot
Thank you, will fix this.
>
> > "reset" command with argument will trigger L1 reset.
> >
> > Signed-off-by: Rajesh Ravi
> > Signed-off-by: Bharat Kumar Reddy Gooty
> > Signed-off-by: Rayagonda Kokatanur
> > ---
> > board/broadcom/bcmns3/ns3.c | 20 ++--
> > 1 file changed, 18 insertions(+), 2 deletions(-)
> >
> > diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
> > index 5e644bd466..1221f26ddc 100644
> > --- a/board/broadcom/bcmns3/ns3.c
> > +++ b/board/broadcom/bcmns3/ns3.c
> > @@ -68,7 +68,23 @@ int dram_init_banksize(void)
> > return 0;
> > }
> >
> > -void reset_cpu(ulong addr)
> > +void reset_cpu(ulong level)
> > {
>
> This should be in a sysreset driver. It supports different reset types.
I checked the sysreset driver and found a generic/common psci driver -
drivers/sysreset/sysreset_psci.c.
We could use this common driver in our platform.
Right now this common driver uses the same command or function_id for
both WARM and COLD reset.
But in our case we should use different commands for WARM and COLD reset.
I am planning to add one kconfig option (USE_FN64_CMD) through which
we can select different commands or the same command for COLD reset.
Something like this,
static int psci_sysreset_request(struct udevice *dev, enum sysreset_t type)
{
unsigned long function_id;
switch (type) {
case SYSRESET_WARM:
function_id = PSCI_0_2_FN_SYSTEM_RESET;
break;
case SYSRESET_COLD:
if (CONFIG_IS_ENABLED(USE_FN64_CMD))
function_id = PSCI_0_2_FN64_SYSTEM_RESET;
else
function_id = PSCI_0_2_FN_SYSTEM_RESET;
break;
case SYSRESET_POWER_OFF:
function_id = PSCI_0_2_FN_SYSTEM_OFF;
break;
default:
return -ENOSYS;
}
invoke_psci_fn(function_id, 0, 0, 0);
return -EINPROGRESS;
}
This way any platform can define/select USE_FN64_CMD if they need
different commands for WARM reset.
Please let me know about this approach.
Best regards,
Rayagonda
>
> > - psci_system_reset();
> > +#define L3_RESET 30
> > + u32 reset_level, strap_val;
> > +
> > + /* Default reset type is L3 reset */
> > + if (!level) {
> > + /*
> > +* Encoding: u-boot reset command expects decimal argument
> > +* strap val = 1st decimal digit;reset level = 2nd decimal
> > digit
> > +*/
> > + strap_val = L3_RESET % 10;
> > + level = L3_RESET / 10;
> > + reset_level = level % 10;
> > + psci_system_reset2(reset_level, strap_val);
> > + } else {
> > + /* U-boot cmd "reset" with any arg will trigger L1 reset */
> > + psci_system_reset();
> > + }
> > }
> > --
> > 2.17.1
> >
>
> Regards,
> Simon
[PATCH] configs: powerpc: add usb (host) mass storage support
commit 0cfccb54014b ("configs: Resync with savedefconfig")
removed CONFIG_USB_STORAGE from some powerpc platforms' defconfig
files, whicih would block the use case of system loading rootfs
from USB drives, add them back.
Signed-off-by: Ran Wang
---
configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 +
configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 +
configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 +
configs/P1020RDB-PC_36BIT_defconfig | 1 +
configs/P1020RDB-PC_NAND_defconfig | 1 +
configs/P1020RDB-PC_SDCARD_defconfig | 1 +
configs/P1020RDB-PC_SPIFLASH_defconfig | 1 +
configs/P1020RDB-PC_defconfig| 1 +
configs/P1020RDB-PD_NAND_defconfig | 1 +
configs/P1020RDB-PD_SDCARD_defconfig | 1 +
configs/P1020RDB-PD_SPIFLASH_defconfig | 1 +
configs/P1020RDB-PD_defconfig| 1 +
configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 +
configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 +
configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 +
configs/P2020RDB-PC_36BIT_defconfig | 1 +
configs/P2020RDB-PC_NAND_defconfig | 1 +
configs/P2020RDB-PC_SPIFLASH_defconfig | 1 +
configs/P2020RDB-PC_defconfig| 1 +
configs/P2041RDB_NAND_defconfig | 1 +
configs/P2041RDB_SDCARD_defconfig| 1 +
configs/P2041RDB_SPIFLASH_defconfig | 1 +
configs/P2041RDB_defconfig | 1 +
configs/P3041DS_NAND_defconfig | 1 +
configs/P3041DS_SDCARD_defconfig | 1 +
configs/P3041DS_SPIFLASH_defconfig | 1 +
configs/P3041DS_defconfig| 1 +
configs/P4080DS_SDCARD_defconfig | 1 +
configs/P4080DS_SPIFLASH_defconfig | 1 +
configs/P4080DS_defconfig| 1 +
configs/P5040DS_NAND_defconfig | 1 +
configs/P5040DS_SDCARD_defconfig | 1 +
configs/P5040DS_SPIFLASH_defconfig | 1 +
configs/P5040DS_defconfig| 1 +
configs/T1024RDB_NAND_defconfig | 1 +
configs/T1024RDB_SDCARD_defconfig| 1 +
configs/T1024RDB_SPIFLASH_defconfig | 1 +
configs/T1024RDB_defconfig | 1 +
configs/T1042D4RDB_NAND_defconfig| 1 +
configs/T1042D4RDB_SDCARD_defconfig | 1 +
configs/T1042D4RDB_SPIFLASH_defconfig| 1 +
configs/T1042D4RDB_defconfig | 1 +
configs/T2080RDB_NAND_defconfig | 1 +
configs/T2080RDB_SDCARD_defconfig| 1 +
configs/T2080RDB_SPIFLASH_defconfig | 1 +
configs/T2080RDB_defconfig | 1 +
configs/T4240RDB_SDCARD_defconfig| 1 +
configs/T4240RDB_defconfig | 1 +
48 files changed, 48 insertions(+)
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig
b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index 6ee52fe..7e32dbe 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -82,4 +82,5 @@ CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
+CONFIG_USB_STORAGE=y
CONFIG_DM_USB=y
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index 489b91d..1ad4cd8 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -77,4 +77,5 @@ CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
+CONFIG_USB_STORAGE=y
CONFIG_DM_USB=y
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 4a8e4e3..ba2a68e 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -79,4 +79,5 @@ CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
+CONFIG_USB_STORAGE=y
CONFIG_DM_USB=y
diff --git a/configs/P1020RDB-PC_36BIT_defconfig
b/configs/P1020RDB-PC_36BIT_defconfig
index f9a4b73..508806b 100644
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -66,4 +66,5 @@ CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
+CONFIG_USB_STORAGE=y
CONFIG_DM_USB=y
diff --git a/configs/P1020RDB-PC_NAND_defconfig
b/configs/P1020RDB-PC_NAND_defconfig
index 5c8231c..7e844da 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -81,4 +81,5 @@ CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
+CONFIG_USB_STORAGE=y
CONFIG_DM_USB=y
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig
b/configs/P1020RDB-PC_SDCARD_defconfig
index ad2bb90..32f9902 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -76,4 +76,5 @@ CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
+CONFIG_USB_STORAGE=y
CONFIG_DM_USB=y
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig
b/configs/P1020RDB-PC_SPIFLASH_defconfig
index b8055e4..36e3026 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
Re: [PATCH v1 08/43] acpi: Export functions to write sized values
Hi Simon, On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote: > > At present only acpigen_write_integer() is exported for use by other code. > But in some cases it is useful to call the specific function depending on > the size of the value. > > Export these functions and add a test. > > Signed-off-by: Simon Glass > --- > > include/acpi/acpigen.h | 46 ++ > test/dm/acpigen.c | 45 - > 2 files changed, 90 insertions(+), 1 deletion(-) > Since the acpigen_write_integer() patch has not been applied, could you please squash this patch into: [v3,15/35] acpi: Support writing an integer http://patchwork.ozlabs.org/project/uboot/patch/20200614025523.40183-5-...@chromium.org/ Regards, Bin
Re: [PATCH v1 04/43] acpi: Allow creating the GNVS to fail
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote: > > In some cases an internal error may prevent this from working. Update the > function return value and report the error. At present the API for writing > tables does not easily support reporting errors, but once it is fully > updated to use a context pointer, this will be easier. > > Signed-off-by: Simon Glass > --- > > Changes in v1: > - Add linux/err.h header > > arch/x86/cpu/baytrail/acpi.c | 4 +++- > arch/x86/cpu/quark/acpi.c | 4 +++- > arch/x86/cpu/tangier/acpi.c | 4 +++- > arch/x86/include/asm/acpi_table.h | 10 +- > arch/x86/lib/acpi_table.c | 11 +-- > 5 files changed, 27 insertions(+), 6 deletions(-) > Reviewed-by: Bin Meng
Re: [PULL] u-boot-mips
On Tue, Jun 30, 2020 at 01:10:53AM +0200, Daniel Schwierzeck wrote: > Hi Tom, > > actually I wanted to send this much earlier but I hope it's still okay. > > This enables Qemu tests for the MIPS Malta board in all variants (32/64 bit, > big/little endian) in Gitlab CI, Travis CI and Azure Pipelines. This allows > to deprecate the qemu_mips board in the future because there is no Linux > support > anymore for ages and Qemu deprecated the generic MIPS board as well in favour > of > Malta. > > I had to include the PCNET patches because otherwise the Malta 64bit targets > had stability issues in the Qemu network test case. Thus it's not just cleanup > and DM conversion, but also bugfixing ;) > > https://gitlab.denx.de/u-boot/custodians/u-boot-mips/pipelines/3824 > https://travis-ci.org/github/danielschwierzeck/u-boot/builds/703302746 > https://dev.azure.com/danielschwierzeck/u-boot/_build/results?buildId=8=results Is it OK for this to go in to -next at this point? Thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v1 06/43] dm: core: Add a way of overriding the ACPI device path
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote: > > Some devices such as GPIO need to override the normal path that would be > generated by driver model. Add a device-tree property for this. > > Signed-off-by: Simon Glass > --- > > doc/device-tree-bindings/device.txt | 23 +++ > drivers/core/acpi.c | 19 +++ > include/dm/acpi.h | 13 + > 3 files changed, 55 insertions(+) > Reviewed-by: Bin Meng
Re: [PATCH v1 07/43] dm: acpi: Add support for the NHLT table
Hi Simon,
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the
> audio codecs and connections in a system. Various devices can contribute
> information to produce the table.
>
> Add core support for this, based on a structure which is built up through
> calls to the driver.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/core/acpi.c | 15 +++
> include/dm/acpi.h | 26 ++
> 2 files changed, 41 insertions(+)
>
> diff --git a/drivers/core/acpi.c b/drivers/core/acpi.c
> index ea304a3067..a5053fec6f 100644
> --- a/drivers/core/acpi.c
> +++ b/drivers/core/acpi.c
> @@ -31,6 +31,7 @@ enum method_t {
> METHOD_WRITE_TABLES,
> METHOD_FILL_SSDT,
> METHOD_INJECT_DSDT,
> + METHOD_SETUP_NHLT,
Do we really need to promote this to be an ACPI core method? Can we
reuse the SSDT/DSDT one?
> };
>
> /* Prototype for all methods */
> @@ -239,6 +240,8 @@ acpi_method acpi_get_method(struct udevice *dev, enum
> method_t method)
> return aops->fill_ssdt;
> case METHOD_INJECT_DSDT:
> return aops->inject_dsdt;
> + case METHOD_SETUP_NHLT:
> + return aops->setup_nhlt;
> }
> }
>
> @@ -325,3 +328,15 @@ int acpi_write_dev_tables(struct acpi_ctx *ctx)
>
> return ret;
> }
> +
> +int acpi_setup_nhlt(struct acpi_ctx *ctx, struct nhlt *nhlt)
> +{
> + int ret;
> +
> + log_debug("Setup NHLT\n");
> + ctx->nhlt = nhlt;
> + ret = acpi_recurse_method(ctx, dm_root(), METHOD_SETUP_NHLT,
> TYPE_NONE);
> + log_debug("Setup finished, err=%d\n", ret);
> +
> + return ret;
> +}
> diff --git a/include/dm/acpi.h b/include/dm/acpi.h
> index b6308b9fa6..a7f8e10ee2 100644
> --- a/include/dm/acpi.h
> +++ b/include/dm/acpi.h
> @@ -27,6 +27,8 @@
>
> #if !defined(__ACPI__)
>
> +struct nhlt;
> +
> /** enum acpi_dump_option - selects what ACPI information to dump */
> enum acpi_dump_option {
> ACPI_DUMP_LIST, /* Just the list of items */
> @@ -44,6 +46,9 @@ enum acpi_dump_option {
> * adding a new table. The RSDP holds pointers to the RSDT and XSDT.
> * @rsdt: Pointer to the Root System Description Table
> * @xsdt: Pointer to the Extended System Description Table
> + * @nhlt: Intel Non-High-Definition-Audio Link Table (NHLT) pointer, used to
> + * build up information that audio codecs need to provide in the NHLT
> ACPI
> + * table
> * @len_stack: Stack of 'length' words to fix up later
> * @ltop: Points to current top of stack (0 = empty)
> */
> @@ -53,6 +58,7 @@ struct acpi_ctx {
> struct acpi_rsdp *rsdp;
> struct acpi_rsdt *rsdt;
> struct acpi_xsdt *xsdt;
> + struct nhlt *nhlt;
> char *len_stack[ACPIGEN_LENSTACK_SIZE];
> int ltop;
> };
> @@ -106,6 +112,15 @@ struct acpi_ops {
> * @return 0 if OK, -ve on error
> */
> int (*inject_dsdt)(const struct udevice *dev, struct acpi_ctx *ctx);
> +
> + /**
> +* setup_nhlt() - Set up audio information for this device
> +*
> +* The method can add information to ctx->nhlt if it likes
> +*
> +* @return 0 if OK, -ENODATA if nothing to add, -ve on error
> +*/
> + int (*setup_nhlt)(const struct udevice *dev, struct acpi_ctx *ctx);
> };
>
> #define device_get_acpi_ops(dev) ((dev)->driver->acpi_ops)
> @@ -170,6 +185,17 @@ int acpi_fill_ssdt(struct acpi_ctx *ctx);
> */
> int acpi_inject_dsdt(struct acpi_ctx *ctx);
>
> +/**
> + * acpi_setup_nhlt() - Set up audio information
> + *
> + * This is called to set up the nhlt information for all devices.
> + *
> + * @ctx: ACPI context to use
> + * @nhlt: Pointer to nhlt information to add to
> + * @return 0 if OK, -ve on error
> + */
> +int acpi_setup_nhlt(struct acpi_ctx *ctx, struct nhlt *nhlt);
> +
> /**
> * acpi_dump_items() - Dump out the collected ACPI items
> *
> --
Regards,
Bin
Re: [PATCH v1 10/43] acpi: Support generation of a generic register
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote: > > Allow writing out a generic register. > > Signed-off-by: Simon Glass > --- > > include/acpi/acpi_device.h | 1 + > include/acpi/acpigen.h | 28 +++ > lib/acpi/acpigen.c | 71 ++ > test/dm/acpigen.c | 46 > 4 files changed, 146 insertions(+) > Reviewed-by: Bin Meng
[PATCH v2 1/3] dma: ti: Add static PSIL endpoint information
Much of PSIL endpoint configuration for a given SoC can be known at
compile time, therefore pass them for platform specific data instead of
DT.
Add per SoC's specific PSIL endpoint data. This is to bring driver in
sync with upstream DT.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/Kconfig | 3 +
drivers/dma/ti/Makefile| 1 +
drivers/dma/ti/k3-psil-am654.c | 175 ++
drivers/dma/ti/k3-psil-j721e.c | 222 +
drivers/dma/ti/k3-psil-priv.h | 43 +++
drivers/dma/ti/k3-psil.c | 42 +++
drivers/dma/ti/k3-psil.h | 67 ++
7 files changed, 553 insertions(+)
create mode 100644 drivers/dma/ti/k3-psil-am654.c
create mode 100644 drivers/dma/ti/k3-psil-j721e.c
create mode 100644 drivers/dma/ti/k3-psil-priv.h
create mode 100644 drivers/dma/ti/k3-psil.c
create mode 100644 drivers/dma/ti/k3-psil.h
diff --git a/drivers/dma/ti/Kconfig b/drivers/dma/ti/Kconfig
index 3d5498326c..9d7a1efb2b 100644
--- a/drivers/dma/ti/Kconfig
+++ b/drivers/dma/ti/Kconfig
@@ -12,3 +12,6 @@ config TI_K3_NAVSS_UDMA
help
Support for UDMA used in K3 devices.
endif
+
+config TI_K3_PSIL
+ bool
diff --git a/drivers/dma/ti/Makefile b/drivers/dma/ti/Makefile
index de2f9ac91a..d6999573b8 100644
--- a/drivers/dma/ti/Makefile
+++ b/drivers/dma/ti/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0+
obj-$(CONFIG_TI_K3_NAVSS_UDMA) += k3-udma.o
+obj-$(CONFIG_TI_K3_PSIL) += k3-psil.o k3-psil-am654.o k3-psil-j721e.o
diff --git a/drivers/dma/ti/k3-psil-am654.c b/drivers/dma/ti/k3-psil-am654.c
new file mode 100644
index 00..a896a15908
--- /dev/null
+++ b/drivers/dma/ti/k3-psil-am654.c
@@ -0,0 +1,175 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
+ * Author: Peter Ujfalusi
+ */
+
+#include
+
+#include "k3-psil-priv.h"
+
+#define PSIL_PDMA_XY_TR(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ }, \
+ }
+
+#define PSIL_PDMA_XY_PKT(x)\
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .pkt_mode = 1, \
+ }, \
+ }
+
+#define PSIL_ETHERNET(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_NATIVE, \
+ .pkt_mode = 1, \
+ .needs_epib = 1,\
+ .psd_size = 16, \
+ }, \
+ }
+
+#define PSIL_SA2UL(x, tx) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_NATIVE, \
+ .pkt_mode = 1, \
+ .needs_epib = 1,\
+ .psd_size = 64, \
+ .notdpkt = tx, \
+ }, \
+ }
+
+/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
+static struct psil_ep am654_src_ep_map[] = {
+ /* SA2UL */
+ PSIL_SA2UL(0x4000, 0),
+ PSIL_SA2UL(0x4001, 0),
+ PSIL_SA2UL(0x4002, 0),
+ PSIL_SA2UL(0x4003, 0),
+ /* PRU_ICSSG0 */
+ PSIL_ETHERNET(0x4100),
+ PSIL_ETHERNET(0x4101),
+ PSIL_ETHERNET(0x4102),
+ PSIL_ETHERNET(0x4103),
+ /* PRU_ICSSG1 */
+ PSIL_ETHERNET(0x4200),
+ PSIL_ETHERNET(0x4201),
+ PSIL_ETHERNET(0x4202),
+ PSIL_ETHERNET(0x4203),
+ /* PRU_ICSSG2 */
+ PSIL_ETHERNET(0x4300),
+ PSIL_ETHERNET(0x4301),
+ PSIL_ETHERNET(0x4302),
+ PSIL_ETHERNET(0x4303),
+ /* PDMA0 - McASPs */
+ PSIL_PDMA_XY_TR(0x4400),
+ PSIL_PDMA_XY_TR(0x4401),
+ PSIL_PDMA_XY_TR(0x4402),
+ /* PDMA1 - SPI0-4 */
+ PSIL_PDMA_XY_PKT(0x4500),
+ PSIL_PDMA_XY_PKT(0x4501),
+ PSIL_PDMA_XY_PKT(0x4502),
+ PSIL_PDMA_XY_PKT(0x4503),
+ PSIL_PDMA_XY_PKT(0x4504),
+ PSIL_PDMA_XY_PKT(0x4505),
+ PSIL_PDMA_XY_PKT(0x4506),
+ PSIL_PDMA_XY_PKT(0x4507),
[PATCH v2 3/3] arm: dts: k3-am65/j721e: Sync DMA DT bindings from Kernel DT
Sync DT bindings from kernel DT and move them to out of -u-boot.dtsi
files.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
arch/arm/dts/k3-am65-mcu.dtsi | 44 +++
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 121 ++
.../k3-j721e-common-proc-board-u-boot.dtsi| 118 ++---
arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 43 +++
include/dt-bindings/dma/k3-udma.h | 31 -
5 files changed, 112 insertions(+), 245 deletions(-)
delete mode 100644 include/dt-bindings/dma/k3-udma.h
diff --git a/arch/arm/dts/k3-am65-mcu.dtsi b/arch/arm/dts/k3-am65-mcu.dtsi
index bc9a87210d..d1a9fb5de6 100644
--- a/arch/arm/dts/k3-am65-mcu.dtsi
+++ b/arch/arm/dts/k3-am65-mcu.dtsi
@@ -102,4 +102,48 @@
#size-cells = <0>;
};
};
+
+ mcu_navss {
+ compatible = "simple-mfd";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ dma-coherent;
+ dma-ranges;
+
+ ti,sci-dev-id = <119>;
+
+ mcu_ringacc: ringacc@2b80 {
+ compatible = "ti,am654-navss-ringacc";
+ reg = <0x0 0x2b80 0x0 0x40>,
+ <0x0 0x2b00 0x0 0x40>,
+ <0x0 0x2859 0x0 0x100>,
+ <0x0 0x2a50 0x0 0x4>;
+ reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
+ ti,num-rings = <286>;
+ ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
+ ti,dma-ring-reset-quirk;
+ ti,sci = <>;
+ ti,sci-dev-id = <195>;
+ };
+
+ mcu_udmap: dma-controller@285c {
+ compatible = "ti,am654-navss-mcu-udmap";
+ reg = <0x0 0x285c 0x0 0x100>,
+ <0x0 0x2a80 0x0 0x4>,
+ <0x0 0x2aa0 0x0 0x4>;
+ reg-names = "gcfg", "rchanrt", "tchanrt";
+ #dma-cells = <1>;
+
+ ti,sci = <>;
+ ti,sci-dev-id = <194>;
+ ti,ringacc = <_ringacc>;
+
+ ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
+ <0x2>; /* TX_CHAN */
+ ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
+ <0x4>; /* RX_CHAN */
+ ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
+ };
+ };
};
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index a7e5eb0553..1a40fa12b7 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -4,7 +4,6 @@
*/
#include
-#include
#include
/ {
@@ -47,51 +46,14 @@
_mcu {
u-boot,dm-spl;
- navss_mcu: navss-mcu {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ mcu_navss {
u-boot,dm-spl;
- ti,sci-dev-id = <119>;
-
- mcu_ringacc: ringacc@2b80 {
- compatible = "ti,am654-navss-ringacc";
- reg = <0x0 0x2b80 0x0 0x40>,
- <0x0 0x2b00 0x0 0x40>,
- <0x0 0x2859 0x0 0x100>,
- <0x0 0x2a50 0x0 0x4>;
- reg-names = "rt", "fifos",
- "proxy_gcfg", "proxy_target";
- ti,num-rings = <286>;
- ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
- ti,dma-ring-reset-quirk;
- ti,sci = <>;
- ti,sci-dev-id = <195>;
+ ringacc@2b80 {
u-boot,dm-spl;
};
- mcu_udmap: udmap@285c {
- compatible = "ti,k3-navss-udmap";
- reg = <0x0 0x285c 0x0 0x100>,
- <0x0 0x2a80 0x0 0x4>,
- <0x0 0x2aa0 0x0 0x4>;
- reg-names = "gcfg", "rchanrt", "tchanrt";
- #dma-cells = <3>;
-
- ti,ringacc = <_ringacc>;
- ti,psil-base = <0x6000>;
-
- ti,sci = <>;
- ti,sci-dev-id = <194>;
-
- ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
- <0x2>; /* TX_CHAN */
- ti,sci-rm-range-rchan = <0x3>,
[PATCH v2 2/3] dma: ti: k3-udma: Update driver to use static endpoint Data
Update driver to use static PSIL endpoint Data instead of DT. This will
allow DT bindings to be in sync with kernel's DT.
Note that this patch breaks networking and OSPI boot as driver changes
are not backward compatible with existing DT. Subsequent commit will
update the DT to make it compatible with updated driver.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/Kconfig | 1 +
drivers/dma/ti/k3-udma.c | 145 +++
2 files changed, 103 insertions(+), 43 deletions(-)
diff --git a/drivers/dma/ti/Kconfig b/drivers/dma/ti/Kconfig
index 9d7a1efb2b..9cbd5f334d 100644
--- a/drivers/dma/ti/Kconfig
+++ b/drivers/dma/ti/Kconfig
@@ -8,6 +8,7 @@ config TI_K3_NAVSS_UDMA
select DMA
select TI_K3_NAVSS_RINGACC
select TI_K3_NAVSS_PSILCFG
+select TI_K3_PSIL
default n
help
Support for UDMA used in K3 devices.
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index 2ce16c8e27..5fc8692e19 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -22,7 +22,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -31,6 +30,7 @@
#include
#include "k3-udma-hwdef.h"
+#include "k3-psil-priv.h"
#if BITS_PER_LONG == 64
#define RINGACC_RING_USE_PROXY (0)
@@ -69,6 +69,21 @@ struct udma_rchan {
struct k3_nav_ring *r_ring; /* Receive ring*/
};
+#define UDMA_FLAG_PDMA_ACC32 BIT(0)
+#define UDMA_FLAG_PDMA_BURST BIT(1)
+#define UDMA_FLAG_TDTYPE BIT(2)
+
+struct udma_match_data {
+ u32 psil_base;
+ bool enable_memcpy_support;
+ u32 flags;
+ u32 statictr_z_mask;
+ u32 rchan_oes_offset;
+
+ u8 tpl_levels;
+ u32 level_start_idx[];
+};
+
struct udma_rflow {
int id;
};
@@ -114,6 +129,8 @@ struct udma_dev {
struct udma_rchan *rchans;
struct udma_rflow *rflows;
+ struct udma_match_data *match_data;
+
struct udma_chan *channels;
u32 psil_base;
@@ -1293,12 +1310,8 @@ static int udma_probe(struct udevice *dev)
if (IS_ERR(ud->ringacc))
return PTR_ERR(ud->ringacc);
- ud->psil_base = dev_read_u32_default(dev, "ti,psil-base", 0);
- if (!ud->psil_base) {
- dev_info(dev,
-"Missing ti,psil-base property, using %d.\n", ret);
- return -EINVAL;
- }
+ ud->match_data = (void *)dev_get_driver_data(dev);
+ ud->psil_base = ud->match_data->psil_base;
ret = uclass_get_device_by_phandle(UCLASS_FIRMWARE, dev,
"ti,sci", _dev);
@@ -1723,8 +1736,7 @@ static int udma_of_xlate(struct dma *dma, struct
ofnode_phandle_args *args)
{
struct udma_dev *ud = dev_get_priv(dma->dev);
struct udma_chan *uc = >channels[0];
- ofnode chconf_node, slave_node;
- char prop[50];
+ struct psil_endpoint_config *ep_config;
u32 val;
for (val = 0; val < ud->ch_count; val++) {
@@ -1736,42 +1748,26 @@ static int udma_of_xlate(struct dma *dma, struct
ofnode_phandle_args *args)
if (val == ud->ch_count)
return -EBUSY;
- uc->dir = DMA_DEV_TO_MEM;
- if (args->args[2] == UDMA_DIR_TX)
+ uc->slave_thread_id = args->args[0];
+ if (uc->slave_thread_id & K3_PSIL_DST_THREAD_ID_OFFSET)
uc->dir = DMA_MEM_TO_DEV;
+ else
+ uc->dir = DMA_DEV_TO_MEM;
- slave_node = ofnode_get_by_phandle(args->args[0]);
- if (!ofnode_valid(slave_node)) {
- dev_err(ud->dev, "slave node is missing\n");
- return -EINVAL;
- }
-
- snprintf(prop, sizeof(prop), "ti,psil-config%u", args->args[1]);
- chconf_node = ofnode_find_subnode(slave_node, prop);
- if (!ofnode_valid(chconf_node)) {
- dev_err(ud->dev, "Channel configuration node is missing\n");
- return -EINVAL;
- }
-
- if (!ofnode_read_u32(chconf_node, "linux,udma-mode", )) {
- if (val == UDMA_PKT_MODE)
- uc->pkt_mode = true;
+ ep_config = psil_get_ep_config(uc->slave_thread_id);
+ if (IS_ERR(ep_config)) {
+ dev_err(ud->dev, "No configuration for psi-l thread 0x%04x\n",
+ uc->slave_thread_id);
+ uc->dir = DMA_MEM_TO_MEM;
+ uc->slave_thread_id = -1;
+ return false;
}
- if (!ofnode_read_u32(chconf_node, "statictr-type", ))
- uc->static_tr_type = val;
+ uc->pkt_mode = ep_config->pkt_mode;
- uc->needs_epib = ofnode_read_bool(chconf_node, "ti,needs-epib");
- if (!ofnode_read_u32(chconf_node, "ti,psd-size", ))
- uc->psd_size = val;
- uc->metadata_size = (uc->needs_epib ? 16 : 0) + uc->psd_size;
-
- if (ofnode_read_u32(slave_node, "ti,psil-base", )) {
-
[PATCH v2 0/3] Sync UDMA bindings from kernel
UDMA DT bindings have deviated from kernel's DT for AM654 and J721e. This series updates UDMA driver and sync DT bindings Tested OSPI and CPSW on AM654 and J721e after the changes v2: Collect R-by Update patch 2/3 to note about DT incompatibility Vignesh Raghavendra (3): dma: ti: Add static PSIL endpoint information dma: ti: k3-udma: Update driver to use static endpoint Data arm: dts: k3-am65/j721e: Sync DMA DT bindings from Kernel DT arch/arm/dts/k3-am65-mcu.dtsi | 44 arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 121 +- .../k3-j721e-common-proc-board-u-boot.dtsi| 118 +- arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 43 drivers/dma/ti/Kconfig| 4 + drivers/dma/ti/Makefile | 1 + drivers/dma/ti/k3-psil-am654.c| 175 ++ drivers/dma/ti/k3-psil-j721e.c| 222 ++ drivers/dma/ti/k3-psil-priv.h | 43 drivers/dma/ti/k3-psil.c | 42 drivers/dma/ti/k3-psil.h | 67 ++ drivers/dma/ti/k3-udma.c | 145 include/dt-bindings/dma/k3-udma.h | 31 --- 13 files changed, 768 insertions(+), 288 deletions(-) create mode 100644 drivers/dma/ti/k3-psil-am654.c create mode 100644 drivers/dma/ti/k3-psil-j721e.c create mode 100644 drivers/dma/ti/k3-psil-priv.h create mode 100644 drivers/dma/ti/k3-psil.c create mode 100644 drivers/dma/ti/k3-psil.h delete mode 100644 include/dt-bindings/dma/k3-udma.h -- 2.27.0
Re: [PATCH v1 13/43] acpi: Support generation of a device
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote: > > Allow writing an ACPI device to the generated ACPI code. > > Signed-off-by: Simon Glass > --- > > include/acpi/acpigen.h | 9 + > lib/acpi/acpigen.c | 7 +++ > test/dm/acpigen.c | 27 +++ > 3 files changed, 43 insertions(+) > Reviewed-by: Bin Meng
Re: [PATCH v1 11/43] acpi: mmc: Generate ACPI info for the PCI SD Card
Hi Simon,
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> Write required information into the SSDT to describe the SD card
> card-detect pin. Since the required GPIO properties are not present in
> the device-tree binding, set them manually for now.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v1:
> - Capitalise ACPI_OPS_PTR
>
> configs/sandbox_defconfig | 2 +
> drivers/mmc/pci_mmc.c | 78 ++-
> 2 files changed, 79 insertions(+), 1 deletion(-)
>
> diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
> index 982075c568..cb6b4b0ee7 100644
> --- a/configs/sandbox_defconfig
> +++ b/configs/sandbox_defconfig
> @@ -143,7 +143,9 @@ CONFIG_P2SB=y
> CONFIG_PWRSEQ=y
> CONFIG_SPL_PWRSEQ=y
> CONFIG_I2C_EEPROM=y
> +CONFIG_MMC_PCI=y
> CONFIG_MMC_SANDBOX=y
> +CONFIG_MMC_SDHCI=y
> CONFIG_MTD=y
> CONFIG_SPI_FLASH_SANDBOX=y
> CONFIG_SPI_FLASH_ATMEL=y
> diff --git a/drivers/mmc/pci_mmc.c b/drivers/mmc/pci_mmc.c
> index 404264a697..0c45e1b893 100644
> --- a/drivers/mmc/pci_mmc.c
> +++ b/drivers/mmc/pci_mmc.c
> @@ -7,10 +7,15 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> -#include
> +#include
> +#include
> +#include
> +#include
> +#include
>
> struct pci_mmc_plat {
> struct mmc_config cfg;
> @@ -20,6 +25,7 @@ struct pci_mmc_plat {
> struct pci_mmc_priv {
> struct sdhci_host host;
> void *base;
> + struct gpio_desc cd_gpio;
> };
>
> static int pci_mmc_probe(struct udevice *dev)
> @@ -44,6 +50,15 @@ static int pci_mmc_probe(struct udevice *dev)
> return sdhci_probe(dev);
> }
>
> +static int pci_mmc_ofdata_to_platdata(struct udevice *dev)
> +{
> + struct pci_mmc_priv *priv = dev_get_priv(dev);
> +
> + gpio_request_by_name(dev, "cd-gpios", 0, >cd_gpio, GPIOD_IS_IN);
> +
> + return 0;
> +}
> +
> static int pci_mmc_bind(struct udevice *dev)
> {
> struct pci_mmc_plat *plat = dev_get_platdata(dev);
> @@ -51,14 +66,75 @@ static int pci_mmc_bind(struct udevice *dev)
> return sdhci_bind(dev, >mmc, >cfg);
> }
>
> +static int pci_mmc_acpi_fill_ssdt(const struct udevice *dev,
> + struct acpi_ctx *ctx)
> +{
> + struct pci_mmc_priv *priv = dev_get_priv(dev);
> + char path[ACPI_PATH_MAX];
> + struct acpi_gpio gpio;
> + struct acpi_dp *dp;
> + int ret;
> +
> + if (!dev_of_valid(dev))
> + return 0;
> +
> + ret = gpio_get_acpi(>cd_gpio, );
> + if (ret)
> + return log_msg_ret("gpio", ret);
> + gpio.type = ACPI_GPIO_TYPE_INTERRUPT;
> + gpio.pull = ACPI_GPIO_PULL_NONE;
> + gpio.irq.mode = ACPI_IRQ_EDGE_TRIGGERED;
> + gpio.irq.polarity = ACPI_IRQ_ACTIVE_BOTH;
> + gpio.irq.shared = ACPI_IRQ_SHARED;
> + gpio.irq.wake = ACPI_IRQ_WAKE;
The above are all hardcoded. Is there is way to figure out these from
DT GPIO properties?
> + gpio.interrupt_debounce_timeout = 1; /* 100ms */
> +
> + /* Use device path as the Scope for the SSDT */
> + ret = acpi_device_path(dev, path, sizeof(path));
> + if (ret)
> + return log_msg_ret("path", ret);
> + acpigen_write_scope(ctx, path);
> + acpigen_write_name(ctx, "_CRS");
> +
> + /* Write GpioInt() as default (if set) or custom from devicetree */
> + acpigen_write_resourcetemplate_header(ctx);
> + acpi_device_write_gpio(ctx, );
> + acpigen_write_resourcetemplate_footer(ctx);
> +
> + /* Bind the cd-gpio name to the GpioInt() resource */
> + dp = acpi_dp_new_table("_DSD");
> + if (!dp)
> + return -ENOMEM;
> + acpi_dp_add_gpio(dp, "cd-gpio", path, 0, 0, 1);
> + ret = acpi_dp_write(ctx, dp);
> + if (ret)
> + return log_msg_ret("cd", ret);
> +
> + acpigen_pop_len(ctx);
> +
> + return 0;
> +}
> +
> +struct acpi_ops pci_mmc_acpi_ops = {
> + .fill_ssdt = pci_mmc_acpi_fill_ssdt,
> +};
> +
> +static const struct udevice_id pci_mmc_match[] = {
> + { .compatible = "intel,apl-sd" },
> + { }
> +};
> +
> U_BOOT_DRIVER(pci_mmc) = {
> .name = "pci_mmc",
> .id = UCLASS_MMC,
> + .of_match = pci_mmc_match,
> .bind = pci_mmc_bind,
> + .ofdata_to_platdata = pci_mmc_ofdata_to_platdata,
> .probe = pci_mmc_probe,
> .ops= _ops,
> .priv_auto_alloc_size = sizeof(struct pci_mmc_priv),
> .platdata_auto_alloc_size = sizeof(struct pci_mmc_plat),
> + ACPI_OPS_PTR(_mmc_acpi_ops)
> };
>
> static struct pci_device_id mmc_supported[] = {
Regards,
Bin
Re: [PATCH v1 12/43] x86: Add bindings for NHLT
Hi Simon, On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote: > > Add devicetree bindings for the Intel Non-High-Definition-Audio Link Table > (NHLT). > > Signed-off-by: Simon Glass > --- > > include/dt-bindings/sound/nhlt.h | 23 +++ > 1 file changed, 23 insertions(+) > create mode 100644 include/dt-bindings/sound/nhlt.h > > diff --git a/include/dt-bindings/sound/nhlt.h > b/include/dt-bindings/sound/nhlt.h > new file mode 100644 > index 00..c33f874966 > --- /dev/null > +++ b/include/dt-bindings/sound/nhlt.h > @@ -0,0 +1,23 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright 2019 Google LLC > + */ > + > +#ifndef _DT_BINDINGS_SOUND_NHLT_H > +#define _DT_BINDINGS_SOUND_NHLT_H > + > +#define NHLT_VID 0x8086 > +#define NHLT_DID_DMIC 0xae20 > +#define NHLT_DID_BT0xae30 > +#define NHLT_DID_SSP 0xae34 These look like PCI vendor ID (0x8086 for Intel) and device IDs. If they are device IDs, how could they be fixed? > + > +/* Hardware links available to use for codecs */ > +#define AUDIO_LINK_SSP00 > +#define AUDIO_LINK_SSP11 > +#define AUDIO_LINK_SSP22 > +#define AUDIO_LINK_SSP33 > +#define AUDIO_LINK_SSP44 > +#define AUDIO_LINK_SSP55 > +#define AUDIO_LINK_DMIC6 > + > +#endif /* _DT_BINDINGS_SOUND_NHLT_H */ > -- Regards, Bin
Re: [PATCH v1 14/43] acpi: Support writing named values
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote: > > Allow writing named integers and strings to the generated ACPI code. > > Signed-off-by: Simon Glass > --- > > include/acpi/acpigen.h | 72 ++ > lib/acpi/acpigen.c | 49 ++ > test/dm/acpigen.c | 78 ++ > 3 files changed, 199 insertions(+) > Reviewed-by: Bin Meng
Re: [PATCH v1 02/43] binman: Refactor binman_entry_find() to allow other nodes
Hi Simon,
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> At present we can only read from a top-level binman node entry. Refactor
> this function to produce a second local function which supports reading
> from any node.
>
> Signed-off-by: Simon Glass
> ---
>
> lib/binman.c | 18 --
> 1 file changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/lib/binman.c b/lib/binman.c
> index dc3a880882..79d01230dd 100644
> --- a/lib/binman.c
> +++ b/lib/binman.c
> @@ -29,25 +29,31 @@ struct binman_info {
>
> static struct binman_info *binman;
>
> -int binman_entry_find(const char *name, struct binman_entry *entry)
> +int binman_entry_find_(ofnode node, const char *name, struct binman_entry
> *entry)
This one should be static. We really should agree on a naming
convention for such internal APIs. I would prefer adding _internal
suffix, or using __ prefix
> {
> - ofnode node;
> int ret;
>
> - node = ofnode_find_subnode(binman->image, name);
> if (!ofnode_valid(node))
> - return log_msg_ret("no binman node", -ENOENT);
> + node = binman->image;
> + node = ofnode_find_subnode(node, name);
> + if (!ofnode_valid(node))
> + return log_msg_ret("node", -ENOENT);
>
> ret = ofnode_read_u32(node, "image-pos", >image_pos);
> if (ret)
> - return log_msg_ret("bad binman node1", ret);
> + return log_msg_ret("import-pos", ret);
> ret = ofnode_read_u32(node, "size", >size);
> if (ret)
> - return log_msg_ret("bad binman node2", ret);
> + return log_msg_ret("size", ret);
>
> return 0;
> }
>
> +int binman_entry_find(const char *name, struct binman_entry *entry)
> +{
> + return binman_entry_find_(binman->image, name, entry);
> +}
> +
> void binman_set_rom_offset(int rom_offset)
> {
> binman->rom_offset = rom_offset;
> --
Regards,
Bin
[PATCH] README: davinci: Clarify when SPL is used and the target devices.
The documentation states that SPL is enabled in all config options for the da850. This incorrect, because devices booting from NOR do not need the SPL to do the low level initializion because when booting from NOR, the board is able to execute in place (XIP) This also clarifies that SPL isn't only used for booting from SPI, because it is also used for booting from MMC and NAND for those devices supporting those boot options. Signed-off-by: Adam Ford diff --git a/doc/README.davinci b/doc/README.davinci index 6522c24eea..607531af2a 100644 --- a/doc/README.davinci +++ b/doc/README.davinci @@ -37,11 +37,15 @@ Bootloaders === For DA850 an SPL (secondary program loader, see doc/README.SPL) is provided -to load U-Boot directly from SPI flash. The SPL takes care of the low level +to load U-Boot from SPI flash, MMC or NAND. The SPL takes care of the low level initialization. -The SPL is built as u-boot.ais for all DA850 defconfigs. The resulting -image file can be programmed to the SPI flash of the DA850 EVM/LCDK. +The SPL is built as u-boot.ais for all DA850 defconfigs except those booting +from NOR flash. The resulting image file can be programmed to the SPI flash +of the DA850 EVM/LCDK. + +Devices that support booting from NOR utilize execute in place (XIP) and do +not require SPL to perform low level initialization. Environment Variables = -- 2.25.1
Re: [PATCH 1/1] riscv: use log functions in fdt_fixup
Hi Heinrich
> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> Sent: Friday, June 26, 2020 12:35 PM
> To: Rick Jian-Zhi Chen(陳建志)
> Cc: Bin Meng; Atish Patra; Simon Glass; u-boot@lists.denx.de; Heinrich
> Schuchardt
> Subject: [PATCH 1/1] riscv: use log functions in fdt_fixup
>
> Replace printf() and debug() by log_err() and log_debug().
>
> "No reserved memory region found in source FDT\n" is not an error but a debug
> information.
>
> %s/can not/cannot/ - use the more common spelling.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> arch/riscv/lib/fdt_fixup.c | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
Reviewed-by: Rick Chen
This patch conflicts with Atish's [PATCH v3 0/2] Assorted fixes
related to reserved memory
Can you rebase it and send again ?
Thanks,
Rick
> diff --git a/arch/riscv/lib/fdt_fixup.c b/arch/riscv/lib/fdt_fixup.c index
> 6db48ad04a..c1dc247cf7 100644
> --- a/arch/riscv/lib/fdt_fixup.c
> +++ b/arch/riscv/lib/fdt_fixup.c
> @@ -37,7 +37,7 @@ int riscv_fdt_copy_resv_mem_node(const void *src, void *dst)
>
> offset = fdt_path_offset(src, "/reserved-memory");
> if (offset < 0) {
> - printf("No reserved memory region found in source FDT\n");
> + log_debug("No reserved memory region found in source FDT\n");
> return 0;
> }
>
> @@ -48,7 +48,7 @@ int riscv_fdt_copy_resv_mem_node(const void *src, void *dst)
> "reg", 0, ,
> false);
> if (addr == FDT_ADDR_T_NONE) {
> - debug("failed to read address/size for %s\n", name);
> + log_debug("failed to read address/size for %s\n",
> name);
> continue;
> }
> strncpy(basename, name, max_len);
> @@ -63,7 +63,7 @@ int riscv_fdt_copy_resv_mem_node(const void *src, void *dst)
> err = fdtdec_add_reserved_memory(dst, basename, _mem,
> );
> if (err < 0) {
> - printf("failed to add reserved memory: %d\n", err);
> + log_err("failed to add reserved memory: %d\n", err);
> return err;
> }
> if (!fdt_getprop(src, node, "no-map", NULL)) @@ -109,7 +109,7
> @@ int board_fix_fdt(void *fdt)
>
> err = riscv_board_reserved_mem_fixup(fdt);
> if (err < 0) {
> - printf("failed to fixup DT for reserved memory: %d\n", err);
> + log_err("failed to fixup DT for reserved memory: %d\n", err);
> return err;
> }
>
> @@ -127,14 +127,14 @@ int arch_fixup_fdt(void *blob)
> size = fdt_totalsize(blob);
> err = fdt_open_into(blob, blob, size + 32);
> if (err < 0) {
> - printf("Device Tree can't be expanded to accommodate new
> node");
> + log_err("Device Tree can't be expanded to accommodate new
> node");
> return err;
> }
> chosen_offset = fdt_path_offset(blob, "/chosen");
> if (chosen_offset < 0) {
> err = fdt_add_subnode(blob, 0, "chosen");
> if (err < 0) {
> - printf("chosen node can not be added\n");
> + log_err("chosen node cannot be added\n");
> return err;
> }
> }
> --
> 2.27.0
Re: [PATCH v1 2/5] mips: octeon: use mips_mach_early_init() to copy to L2 cache
> This patch adds the code to copy itself from bootrom location to a > different location (TEXT_BASE) to the Octeon platform. Its used in > this case to copy the complete U-Boot image into L2 cache, which > greatly improves the bootup time - especially in regard to the > very long and complex DDR4 init code. > > The Kconfig symbol CONFIG_MIPS_MACH_EARLY_INIT is enabled with this > patch for Octeon. > > Signed-off-by: Stefan Roese > --- > > arch/mips/Kconfig | 1 + > arch/mips/mach-octeon/lowlevel_init.S | 56 +++ > 2 files changed, 57 insertions(+) > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > index 327fd4848a..bcf6f26457 100644 > --- a/arch/mips/Kconfig > +++ b/arch/mips/Kconfig > @@ -114,6 +114,7 @@ config ARCH_OCTEON > select DM > select DM_SERIAL > select MIPS_L2_CACHE > + select MIPS_MACH_EARLY_INIT > select MIPS_TUNE_OCTEON3 > select ROM_EXCEPTION_VECTORS > select SUPPORTS_BIG_ENDIAN > diff --git a/arch/mips/mach-octeon/lowlevel_init.S > b/arch/mips/mach-octeon/lowlevel_init.S > index d9aab38cde..2d9257b1ed 100644 > --- a/arch/mips/mach-octeon/lowlevel_init.S > +++ b/arch/mips/mach-octeon/lowlevel_init.S > @@ -17,3 +17,59 @@ LEAF(lowlevel_init) > jr ra >nop > END(lowlevel_init) > + > +LEAF(mips_mach_early_init) > + > +moves0, ra indentation > + > + bal __dummy > + nop > + > +__dummy: > + /* Get the actual address that we are running at */ > + PTR_LA a6, _start /* Linked address of _start */ > + PTR_LA a7, __dummy > + dsubu t1, a7, a6 /* offset of __dummy label from _start*/ > + dsubu t0, ra, t1 /* t0 now has actual address of _start*/ including _start in the calculation makes it a little bit hard to understand. Wouldn't it be enough to just calculate the difference between a7 and ra to get the relocation offset? You can use that offset later to calculate the destination address based on _start. > + > + PTR_LI t1, CONFIG_SYS_TEXT_BASE isn't that the same address as _start? > + > + /* Calculate end address of copy loop */ > + PTR_LI s5, CONFIG_BOARD_SIZE_LIMIT couldn't you use __image_copy_end to get the real binary size without BSS? Or _end if you need to copy the relocation table as well. > + daddu t2, s5, t0 /* t2 = end address */ > + daddiu t2, t2, 127 > + ins t2, zero, 0, 7 /* Round up to cache line for memcpy */ > + > + /* Copy ourself to the L2 cache from flash, 32 bytes at a time */ > +1: > + ld a0, 0(t0) > + ld a1, 8(t0) > + ld a2, 16(t0) > + ld a3, 24(t0) > + sd a0, 0(t1) > + sd a1, 8(t1) > + sd a2, 16(t1) > + sd a3, 24(t1) > + addiu t0, 32 > + bne t0, t2, 1b > + addiu t1, 32 the instruction in the delay slot should be indented by an extra space character > + > + sync > + synci 0(zero) > + > + PTR_LA t9, uboot_in_cache > + j t9 > + nop Why the extra jump? If you have the relocation offset as suggested above, you could simply add that to s0 and do one jr instruction. Also instead of synci you could use jr.hb to automatically add a instruction hazard barrier during the jump (if that's implemented on Octeon). > + > +uboot_in_cache: > + > + /* > + * Return to start.S now running from TEXT_BASE, which points > + * to DRAM address space, which effectively is L2 cache now. > + * This speeds up the init process extremely, especially the > + * DDR init code. > + */ > + jr s0 > + nop > + > + END(mips_mach_early_init) -- - Daniel
Re: [PATCH v3 1/4] sysreset: Add Octeon sysreset driver
> This patch adds a UCLASS_SYSRESET sysreset driver for the Octeon SoC > family. > > Signed-off-by: Stefan Roese > --- > > (no changes since v1) > > drivers/sysreset/Kconfig | 7 > drivers/sysreset/Makefile | 1 + > drivers/sysreset/sysreset_octeon.c | 52 ++ > 3 files changed, 60 insertions(+) > create mode 100644 drivers/sysreset/sysreset_octeon.c > > Reviewed-by: Daniel Schwierzeck -- - Daniel
Re: [PATCH v3 2/4] mips: octeon: Initial minimal support for the Marvell Octeon SoC
Am Freitag, den 19.06.2020, 15:44 +0200 schrieb Stefan Roese: > From: Aaron Williams > > This patch adds very basic support for the Octeon III SoCs. Only > CFI parallel NOR flash and UART is supported for now. > > Please note that the basic Octeon port does not include the DDR3/4 > initialization yet. This will be added in some follow-up patches > later. To still use U-Boot on with this port, the L2 cache (4MiB on > Octeon III CN73xx) is used as RAM. This way, U-Boot can boot to the > prompt on such boards. > > Signed-off-by: Aaron Williams > Signed-off-by: Stefan Roese > > --- > > Changes in v3: > - Don't "relocate" to L2 cache for now > - Remove inclusion of "common.h" > > Changes in v2: > - Remove custom start.S and use common start.S. Minimal custom lowlevel > init code is currently added in the custom lowlevel_init.S. This needs > to be extended with necessary code, like errata handling etc. But for > a very first basic port, this seems to be all thats needed to boot on > the EBB7304 to the prompt. > - Removed select CREATE_ARCH_SYMLINK > - Removed Octeon II support, as its currently no added in this patchset > - Added cache.c to add the platform specific cache functions as no-ops > for Octeon as the platform is cache coherent > - Removed CONFIG_MIPS_CACHE_COHERENT > - Added CONFIG_CPU_CAVIUM_OCTEON to Kconfig and selected it for Octeon > to enable better sync with the Linux files in the future > - Add get_tbclk() -> no need to define CONFIG_SYS_MIPS_TIMER_FREQ any more > > MAINTAINERS | 6 ++ > arch/mips/Kconfig | 41 + > arch/mips/Makefile| 3 + > arch/mips/mach-octeon/Kconfig | 46 +++ > arch/mips/mach-octeon/Makefile| 10 > arch/mips/mach-octeon/cache.c | 20 +++ > arch/mips/mach-octeon/clock.c | 27 + > arch/mips/mach-octeon/cpu.c | 57 +++ > arch/mips/mach-octeon/dram.c | 28 + > arch/mips/mach-octeon/include/ioremap.h | 30 ++ > arch/mips/mach-octeon/include/mach/cavm-reg.h | 42 ++ > arch/mips/mach-octeon/include/mach/clock.h| 22 +++ > arch/mips/mach-octeon/lowlevel_init.S | 19 +++ > scripts/config_whitelist.txt | 1 - > 14 files changed, 351 insertions(+), 1 deletion(-) > create mode 100644 arch/mips/mach-octeon/Kconfig > create mode 100644 arch/mips/mach-octeon/Makefile > create mode 100644 arch/mips/mach-octeon/cache.c > create mode 100644 arch/mips/mach-octeon/clock.c > create mode 100644 arch/mips/mach-octeon/cpu.c > create mode 100644 arch/mips/mach-octeon/dram.c > create mode 100644 arch/mips/mach-octeon/include/ioremap.h > create mode 100644 arch/mips/mach-octeon/include/mach/cavm-reg.h > create mode 100644 arch/mips/mach-octeon/include/mach/clock.h > create mode 100644 arch/mips/mach-octeon/lowlevel_init.S > > diff --git a/MAINTAINERS b/MAINTAINERS > index 1fd975c72f..0aa0357967 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -763,6 +763,12 @@ M: Ezequiel Garcia > S: Maintained > F: arch/mips/mach-jz47xx/ > > +MIPS Octeon > +M: Aaron Williams > +S: Maintained > +F: arch/mips/mach-octeon/ > +F: arch/mips/include/asm/arch-octeon/ > + > MMC > M: Peng Fan > S: Maintained > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > index bccd06cb0c..dd56da6dae 100644 > --- a/arch/mips/Kconfig > +++ b/arch/mips/Kconfig > @@ -106,6 +106,23 @@ config ARCH_JZ47XX > select OF_CONTROL > select DM > > +config ARCH_OCTEON > + bool "Support Marvell Octeon CN7xxx platforms" > + select CPU_CAVIUM_OCTEON > + select DISPLAY_CPUINFO > + select DMA_ADDR_T_64BIT > + select DM > + select DM_SERIAL > + select MIPS_L2_CACHE > + select MIPS_TUNE_OCTEON3 > + select ROM_EXCEPTION_VECTORS > + select SUPPORTS_BIG_ENDIAN > + select SUPPORTS_CPU_MIPS64_OCTEON > + select PHYS_64BIT > + select OF_CONTROL > + select OF_LIVE > + imply CMD_DM > + > config MACH_PIC32 > bool "Support Microchip PIC32" > select DM > @@ -160,6 +177,7 @@ source "arch/mips/mach-bmips/Kconfig" > source "arch/mips/mach-jz47xx/Kconfig" > source "arch/mips/mach-pic32/Kconfig" > source "arch/mips/mach-mtmips/Kconfig" > +source "arch/mips/mach-octeon/Kconfig" > > if MIPS > > @@ -233,6 +251,14 @@ config CPU_MIPS64_R6 > Choose this option to build a kernel for release 6 or later of the > MIPS64 architecture. > > +config CPU_MIPS64_OCTEON > + bool "Marvell Octeon series of CPUs" > + depends on SUPPORTS_CPU_MIPS64_OCTEON > + select 64BIT > + help > + Choose this option for Marvell Octeon CPUs. These CPUs are between > + MIPS64 R5 and R6 with other extensions. > + > endchoice > > menu "General setup" > @@ -408,6 +434,12 @@ config
[PATCH v2] cmd: add a panic command
From: Heiko Stuebner
Even in boot scripts it may be needed to "panic" when all options
are exhausted and the device specification specifies hanging
instead of resetting the board.
So add a new panic command that just wraps around the core panic
call in U-Boot and can take an optional message.
Signed-off-by: Heiko Stuebner
Reviewed-by: Simon Glass
---
changes in v2:
- add blank line before return (Simon)
- fix U-Boot spelling (Simon)
cmd/Makefile | 1 +
cmd/panic.c | 23 +++
2 files changed, 24 insertions(+)
create mode 100644 cmd/panic.c
diff --git a/cmd/Makefile b/cmd/Makefile
index ac843b4b16..027fa9083a 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -8,6 +8,7 @@ ifndef CONFIG_SPL_BUILD
obj-y += boot.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-y += help.o
+obj-y += panic.o
obj-y += version.o
# command
diff --git a/cmd/panic.c b/cmd/panic.c
new file mode 100644
index 00..329231fb66
--- /dev/null
+++ b/cmd/panic.c
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
+ */
+
+#include
+#include
+
+static int do_panic(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ char *text = (argc < 2) ? "" : argv[1];
+
+ panic(text);
+
+ return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(
+ panic, 2, 1, do_panic,
+ "Panic with optional message",
+ "[message]"
+);
--
2.26.2
[PULL] u-boot-mips
Hi Tom, actually I wanted to send this much earlier but I hope it's still okay. This enables Qemu tests for the MIPS Malta board in all variants (32/64 bit, big/little endian) in Gitlab CI, Travis CI and Azure Pipelines. This allows to deprecate the qemu_mips board in the future because there is no Linux support anymore for ages and Qemu deprecated the generic MIPS board as well in favour of Malta. I had to include the PCNET patches because otherwise the Malta 64bit targets had stability issues in the Qemu network test case. Thus it's not just cleanup and DM conversion, but also bugfixing ;) https://gitlab.denx.de/u-boot/custodians/u-boot-mips/pipelines/3824 https://travis-ci.org/github/danielschwierzeck/u-boot/builds/703302746 https://dev.azure.com/danielschwierzeck/u-boot/_build/results?buildId=8=results The following changes since commit 0b7d95531cf25a7c71bd9855135da5e7098e7b97: Merge tag 'rockchip-fix' of https://gitlab.denx.de/u-boot/custodians/u-boot-video (2020-06-29 15:58:09 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-mips.git tags/mips-pull-2020-06-29 for you to fetch changes up to e35c2a8fdd41a34c06c409ce700c5d5591429367: .azure-pipelines.yml: add Qemu tests for MIPS Malta board (2020-06-29 22:40:16 +0200) - net: pcnet: cleanup and add DM support - Makefile: add rule to build an endian-swapped U-Boot image used by MIPS Malta EL variants - CI: add Qemu tests for MIPS Malta Daniel Schwierzeck (6): tools: add script for byte endianness swapping Makefile: add rule to generate u-boot-swap.bin mips: malta: build u-boot-swap.bin .gitlab-ci.yml: add Qemu tests for MIPS Malta board .travis.yml: add Qemu tests for MIPS Malta board .azure-pipelines.yml: add Qemu tests for MIPS Malta board Marek Vasut (15): net: pcnet: Drop typedef struct pcnet_priv_t net: pcnet: Drop PCNET_HAS_PROM net: pcnet: Use PCI_DEVICE() to define PCI device compat list net: pcnet: Simplify private data allocation net: pcnet: Replace memset+malloc with calloc net: pcnet: Move private data allocation to initialize net: pcnet: Move initialize function at the end net: pcnet: Drop useless forward declarations net: pcnet: Wrap devbusfn into private data net: pcnet: Pass private data through dev->priv net: pcnet: Wrap iobase into private data net: pcnet: Wrap name and enetaddr into private data net: pcnet: Split common and non-DM functions net: pcnet: Add DM support net: pcnet: Add Kconfig entries .azure-pipelines.yml| 16 ++ .gitlab-ci.yml | 32 +++ .travis.yml | 28 ++ Makefile| 6 + configs/malta64_defconfig | 1 + configs/malta64el_defconfig | 2 + configs/malta_defconfig | 1 + configs/maltael_defconfig | 2 + drivers/net/Kconfig | 6 + drivers/net/pcnet.c | 618 +++- include/configs/malta.h | 2 - tools/endian-swap.py| 55 12 files changed, 525 insertions(+), 244 deletions(-) create mode 100755 tools/endian-swap.py
Re: [PATCH v1 1/5] mips: Add CONFIG_MIPS_MACH_EARLY_INIT for very early mach init code
> This patch adds the optional call to mips_mach_early_init() to start.S > at a very early stage. Its disabled per default. It can be used for > very early machine / platform specific init code. Its called very > early and at this stage the PC is allowed to differ from the linking > address (CONFIG_TEXT_BASE) as no absolute jump has been performed until > this call. > > It will be used by thje Octeon platform. > > Signed-off-by: Stefan Roese > --- > > arch/mips/Kconfig | 9 + > arch/mips/cpu/start.S | 5 + > 2 files changed, 14 insertions(+) > > Reviewed-by: Daniel Schwierzeck -- - Daniel
Re: [PATCH v2 2/5] arm: kirkwood: convert LaCie boards to DM_SPI_FLASH
On 28.06.20 19:00, Simon Guinot wrote: This patch converts the following Kirkwood-based LaCie boards to DM, DM_SPI and DM_SPI_FLASH: - d2 Network v2 - Internet Space v2 - 2Big Network v2 - Network Space v2 - Network Space Lite v2 - Network Space Max v2 - Network Space Mini v2 Signed-off-by: Simon Guinot Reviewed-by: Stefan Roese Thanks, Stefan --- configs/d2net_v2_defconfig | 6 -- configs/inetspace_v2_defconfig | 6 -- configs/net2big_v2_defconfig | 6 -- configs/netspace_lite_v2_defconfig | 6 -- configs/netspace_max_v2_defconfig | 6 -- configs/netspace_mini_v2_defconfig | 6 -- configs/netspace_v2_defconfig | 6 -- 7 files changed, 28 insertions(+), 14 deletions(-) diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index fe3c6c47620d..0d240daf01a1 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0x7 CONFIG_ENV_SECT_SIZE=0x1 CONFIG_NR_DRAM_BANKS=2 CONFIG_IDENT_STRING=" D2 v2" +# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -22,7 +23,6 @@ CONFIG_SYS_PROMPT="d2v2> " CONFIG_CMD_EEPROM=y CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y @@ -39,14 +39,16 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=2000 CONFIG_ENV_ADDR=0x7 +CONFIG_DM=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set -CONFIG_SPI_FLASH=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_MVGBE=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 6144eb5fad45..2ef916fa85ba 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0x7 CONFIG_ENV_SECT_SIZE=0x1 CONFIG_NR_DRAM_BANKS=2 CONFIG_IDENT_STRING=" IS v2" +# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -22,7 +23,6 @@ CONFIG_SYS_PROMPT="ns2> " CONFIG_CMD_EEPROM=y CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y @@ -39,14 +39,16 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=2000 CONFIG_ENV_ADDR=0x7 +CONFIG_DM=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set -CONFIG_SPI_FLASH=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_MVGBE=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index 1389d3090096..9c1ed539b2a0 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0x7 CONFIG_ENV_SECT_SIZE=0x1 CONFIG_NR_DRAM_BANKS=2 CONFIG_IDENT_STRING=" 2Big v2" +# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -22,7 +23,6 @@ CONFIG_SYS_PROMPT="2big2> " CONFIG_CMD_EEPROM=y CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y @@ -39,14 +39,16 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=2000 CONFIG_ENV_ADDR=0x7 +CONFIG_DM=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set -CONFIG_SPI_FLASH=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_MVGBE=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index c744d2c58efc..180d1402a188 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0x7 CONFIG_ENV_SECT_SIZE=0x1 CONFIG_NR_DRAM_BANKS=2 CONFIG_IDENT_STRING=" NS v2 Lite" +# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -22,7 +23,6 @@ CONFIG_SYS_PROMPT="ns2> " CONFIG_CMD_EEPROM=y CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y @@ -39,14 +39,16 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=2000 CONFIG_ENV_ADDR=0x7 +CONFIG_DM=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set -CONFIG_SPI_FLASH=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_MVGBE=y CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git
Re: [PATCH v2 1/5] arm: kirkwood: add DT spi0 alias to LaCie boards
On 28.06.20 19:00, Simon Guinot wrote:
The spi0 alias is needed by the environment code to retrieve the SPI
flash. This patch adds some -u-boot.dtsi files, providing the spi0
aliases, for all the following Kirkwood-based LaCie boards:
- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2
Note that this -u-boot.dtsi files will be removed as soon as the spi0
aliases will be available in the upstream Linux dtsi files.
Signed-off-by: Simon Guinot
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
arch/arm/dts/kirkwood-d2net-u-boot.dtsi | 7 +++
arch/arm/dts/kirkwood-is2-u-boot.dtsi | 7 +++
arch/arm/dts/kirkwood-net2big-u-boot.dtsi | 7 +++
arch/arm/dts/kirkwood-ns2-u-boot.dtsi | 7 +++
arch/arm/dts/kirkwood-ns2lite-u-boot.dtsi | 7 +++
arch/arm/dts/kirkwood-ns2max-u-boot.dtsi | 7 +++
arch/arm/dts/kirkwood-ns2mini-u-boot.dtsi | 7 +++
board/LaCie/net2big_v2/MAINTAINERS| 6 ++
board/LaCie/netspace_v2/MAINTAINERS | 21 ++---
9 files changed, 69 insertions(+), 7 deletions(-)
create mode 100644 arch/arm/dts/kirkwood-d2net-u-boot.dtsi
create mode 100644 arch/arm/dts/kirkwood-is2-u-boot.dtsi
create mode 100644 arch/arm/dts/kirkwood-net2big-u-boot.dtsi
create mode 100644 arch/arm/dts/kirkwood-ns2-u-boot.dtsi
create mode 100644 arch/arm/dts/kirkwood-ns2lite-u-boot.dtsi
create mode 100644 arch/arm/dts/kirkwood-ns2max-u-boot.dtsi
create mode 100644 arch/arm/dts/kirkwood-ns2mini-u-boot.dtsi
diff --git a/arch/arm/dts/kirkwood-d2net-u-boot.dtsi
b/arch/arm/dts/kirkwood-d2net-u-boot.dtsi
new file mode 100644
index ..1f3b1854795b
--- /dev/null
+++ b/arch/arm/dts/kirkwood-d2net-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/ {
+ aliases {
+ spi0 =
+ };
+};
diff --git a/arch/arm/dts/kirkwood-is2-u-boot.dtsi
b/arch/arm/dts/kirkwood-is2-u-boot.dtsi
new file mode 100644
index ..1f3b1854795b
--- /dev/null
+++ b/arch/arm/dts/kirkwood-is2-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/ {
+ aliases {
+ spi0 =
+ };
+};
diff --git a/arch/arm/dts/kirkwood-net2big-u-boot.dtsi
b/arch/arm/dts/kirkwood-net2big-u-boot.dtsi
new file mode 100644
index ..1f3b1854795b
--- /dev/null
+++ b/arch/arm/dts/kirkwood-net2big-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/ {
+ aliases {
+ spi0 =
+ };
+};
diff --git a/arch/arm/dts/kirkwood-ns2-u-boot.dtsi
b/arch/arm/dts/kirkwood-ns2-u-boot.dtsi
new file mode 100644
index ..1f3b1854795b
--- /dev/null
+++ b/arch/arm/dts/kirkwood-ns2-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/ {
+ aliases {
+ spi0 =
+ };
+};
diff --git a/arch/arm/dts/kirkwood-ns2lite-u-boot.dtsi
b/arch/arm/dts/kirkwood-ns2lite-u-boot.dtsi
new file mode 100644
index ..1f3b1854795b
--- /dev/null
+++ b/arch/arm/dts/kirkwood-ns2lite-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/ {
+ aliases {
+ spi0 =
+ };
+};
diff --git a/arch/arm/dts/kirkwood-ns2max-u-boot.dtsi
b/arch/arm/dts/kirkwood-ns2max-u-boot.dtsi
new file mode 100644
index ..1f3b1854795b
--- /dev/null
+++ b/arch/arm/dts/kirkwood-ns2max-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/ {
+ aliases {
+ spi0 =
+ };
+};
diff --git a/arch/arm/dts/kirkwood-ns2mini-u-boot.dtsi
b/arch/arm/dts/kirkwood-ns2mini-u-boot.dtsi
new file mode 100644
index ..1f3b1854795b
--- /dev/null
+++ b/arch/arm/dts/kirkwood-ns2mini-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/ {
+ aliases {
+ spi0 =
+ };
+};
diff --git a/board/LaCie/net2big_v2/MAINTAINERS
b/board/LaCie/net2big_v2/MAINTAINERS
index 8fec70315f5d..7046e1b2c5c7 100644
--- a/board/LaCie/net2big_v2/MAINTAINERS
+++ b/board/LaCie/net2big_v2/MAINTAINERS
@@ -1,6 +1,12 @@
NET2BIG_V2 BOARD
M:Simon Guinot
S:Maintained
+F: arch/arm/dts/kirkwood-d2net.dts
+F: arch/arm/dts/kirkwood-d2net-u-boot.dtsi
+F: arch/arm/dts/kirkwood-d2net.dtsi
+F: arch/arm/dts/kirkwood-net2big.dts
+F: arch/arm/dts/kirkwood-net2big-u-boot.dtsi
+F: arch/arm/dts/kirkwood-netxbig.dtsi
F:board/LaCie/net2big_v2/
F:include/configs/lacie_kw.h
F:configs/d2net_v2_defconfig
diff --git a/board/LaCie/netspace_v2/MAINTAINERS
b/board/LaCie/netspace_v2/MAINTAINERS
index 55fd50d4eb1b..1cc4f7108b6b 100644
--- a/board/LaCie/netspace_v2/MAINTAINERS
+++ b/board/LaCie/netspace_v2/MAINTAINERS
@@ -1,14 +1,21 @@
-NETSPACE_V2 BOARD
+NETSPACE_V2 BOARDS
M:Simon Guinot
S:Maintained
+F: arch/arm/dts/kirkwood-is2.dts
+F: arch/arm/dts/kirkwood-is2-u-boot.dtsi
+F: arch/arm/dts/kirkwood-ns2-common.dtsi
+F:
Re: [PATCH v2 3/5] arm: kirkwood: switch LaCie boards to sata_mv driver
On 28.06.20 19:00, Simon Guinot wrote: This patch switches the SATA driver from mvsata_ide to sata_mv for the following Kirkwood-based LaCie boards: - d2 Network v2 - Internet Space v2 - 2Big Network v2 - Network Space v2 - Network Space Lite v2 - Network Space Max v2 - Network Space Mini v2 Signed-off-by: Simon Guinot Reviewed-by: Stefan Roese Thanks, Stefan --- configs/d2net_v2_defconfig | 6 +++--- configs/inetspace_v2_defconfig | 6 +++--- configs/net2big_v2_defconfig | 6 +++--- configs/netspace_lite_v2_defconfig | 5 +++-- configs/netspace_max_v2_defconfig | 5 +++-- configs/netspace_mini_v2_defconfig | 5 +++-- configs/netspace_v2_defconfig | 6 +++--- include/configs/lacie_kw.h | 19 +-- 8 files changed, 30 insertions(+), 28 deletions(-) diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index 0d240daf01a1..5a3a1f60e308 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -21,8 +21,8 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="d2v2> " CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y +CONFIG_CMD_SATA=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y @@ -40,7 +40,8 @@ CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=2000 CONFIG_ENV_ADDR=0x7 CONFIG_DM=y -CONFIG_MVSATA_IDE=y +CONFIG_SATA_MV=y +CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y @@ -52,4 +53,3 @@ CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 2ef916fa85ba..6cd4348a3c1d 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -21,8 +21,8 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y +CONFIG_CMD_SATA=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y @@ -40,7 +40,8 @@ CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=2000 CONFIG_ENV_ADDR=0x7 CONFIG_DM=y -CONFIG_MVSATA_IDE=y +CONFIG_SATA_MV=y +CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y @@ -52,4 +53,3 @@ CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index 9c1ed539b2a0..e7b7be7ed506 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -21,8 +21,8 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="2big2> " CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y +CONFIG_CMD_SATA=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y @@ -40,7 +40,8 @@ CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=2000 CONFIG_ENV_ADDR=0x7 CONFIG_DM=y -CONFIG_MVSATA_IDE=y +CONFIG_SATA_MV=y +CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y @@ -52,4 +53,3 @@ CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index 180d1402a188..9e3768ef4efd 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -21,8 +21,8 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y +CONFIG_CMD_SATA=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y @@ -40,7 +40,8 @@ CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=2000 CONFIG_ENV_ADDR=0x7 CONFIG_DM=y -CONFIG_MVSATA_IDE=y +CONFIG_SATA_MV=y +CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index ed1a4e2d3653..b06321895b20 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -21,8 +21,8 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y +CONFIG_CMD_SATA=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y @@ -40,7 +40,8 @@ CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=2000 CONFIG_ENV_ADDR=0x7 CONFIG_DM=y -CONFIG_MVSATA_IDE=y +CONFIG_SATA_MV=y +CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index 884bb63f0b90..7e013b48d1a1 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -21,8 +21,8 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y +CONFIG_CMD_SATA=y #
Re: [PATCH v2 05/49] binman: Correct the search patch for pylibfdt
On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote: > > Now that binman uses tools/ as its base directory for importing modules, > the path to the pylibfdt build by U-Boot is incorrect. Fix it with a new > path. > > Signed-off-by: Simon Glass > --- > > Changes in v2: > - Leave the old (object-directory) path in place > > tools/binman/main.py | 1 + > 1 file changed, 1 insertion(+) > Reviewed-by: Bin Meng
Re: [PATCH v2 03/49] binman: Output errors to stderr
On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote: > > At present binman outputs errors to stdout which means that fails are > effectively silent when printed by buildman, for example. Fix this by > outputing errors to stderr. > > Signed-off-by: Simon Glass > --- > > Changes in v2: > - Add new binman patch to output errors to stderr > > tools/binman/main.py | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 09/49] binman: Adjust pylibfdt for incremental build
On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote: > > If the pylibfdt shared-object file is detected, then Python assumes that > the libfdt.py file exists also. > > Sometimes when an incremental build aborts, the shared-object file is > built but the libfdt.py is not. The only way out at this point is to use > 'make mkproper', or similar. > > Fix this by removing the .so file before it is built. This seems to make > Python rebuild everything. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > scripts/dtc/pylibfdt/Makefile | 3 +++ > 1 file changed, 3 insertions(+) > Reviewed-by: Bin Meng
Re: [PATCH v2 04/49] binman: cbfs: Fix IFWI typo
On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote: > > This comment references the wrong thing. Fix it. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > tools/binman/etype/cbfs.py | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 02/49] .gitignore: Ignore Python 3 cache directories
On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote: > > These can appear when moving between branches that have different tools > in the tree. Ignore them. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > .gitignore | 3 +++ > 1 file changed, 3 insertions(+) > Reviewed-by: Bin Meng
Re: [PATCH v2 01/49] dm: core Fix long line in device_bind_common()
On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote: > > Fix an over-length line in this function. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > drivers/core/device.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 5/5] arm: kirkwood: enable DM_ETH for LaCie board
On 28.06.20 19:00, Simon Guinot wrote:
This patch enables DM_ETH for the following Kirkwood-based LaCie boards:
- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2
Signed-off-by: Simon Guinot
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
board/LaCie/net2big_v2/net2big_v2.c | 2 +-
board/LaCie/netspace_v2/netspace_v2.c | 4 ++--
configs/d2net_v2_defconfig| 1 +
configs/inetspace_v2_defconfig| 1 +
configs/net2big_v2_defconfig | 1 +
configs/netspace_lite_v2_defconfig| 1 +
configs/netspace_max_v2_defconfig | 1 +
configs/netspace_mini_v2_defconfig| 1 +
configs/netspace_v2_defconfig | 1 +
9 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/board/LaCie/net2big_v2/net2big_v2.c
b/board/LaCie/net2big_v2/net2big_v2.c
index dbd8b5755da3..e94c9a6dce96 100644
--- a/board/LaCie/net2big_v2/net2big_v2.c
+++ b/board/LaCie/net2big_v2/net2big_v2.c
@@ -239,7 +239,7 @@ int misc_init_r(void)
/* Configure and initialize PHY */
void reset_phy(void)
{
- mv_phy_88e1116_init("egiga0", 8);
+ mv_phy_88e1116_init("ethernet-controller@72000", 8);
}
#endif
diff --git a/board/LaCie/netspace_v2/netspace_v2.c b/board/LaCie/netspace_v2/netspace_v2.c
index 011cc563d19d..33246b201528 100644
--- a/board/LaCie/netspace_v2/netspace_v2.c
+++ b/board/LaCie/netspace_v2/netspace_v2.c
@@ -100,9 +100,9 @@ int misc_init_r(void)
void reset_phy(void)
{
#if defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2)
- mv_phy_88e1318_init("egiga0", 0);
+ mv_phy_88e1318_init("ethernet-controller@72000", 0);
#else
- mv_phy_88e1116_init("egiga0", 8);
+ mv_phy_88e1116_init("ethernet-controller@72000", 8);
#endif
}
#endif
diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig
index 33f48e0dd94c..31a5d91af2b3 100644
--- a/configs/d2net_v2_defconfig
+++ b/configs/d2net_v2_defconfig
@@ -45,6 +45,7 @@ CONFIG_BLK=y
# CONFIG_MMC is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_DM_ETH=y
CONFIG_MVGBE=y
CONFIG_MII=y
CONFIG_SYS_NS16550=y
diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig
index ca444d0aafa3..b5973977a5b8 100644
--- a/configs/inetspace_v2_defconfig
+++ b/configs/inetspace_v2_defconfig
@@ -45,6 +45,7 @@ CONFIG_BLK=y
# CONFIG_MMC is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_DM_ETH=y
CONFIG_MVGBE=y
CONFIG_MII=y
CONFIG_SYS_NS16550=y
diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig
index 4d0e50b3e0a5..bba85030492a 100644
--- a/configs/net2big_v2_defconfig
+++ b/configs/net2big_v2_defconfig
@@ -45,6 +45,7 @@ CONFIG_BLK=y
# CONFIG_MMC is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_DM_ETH=y
CONFIG_MVGBE=y
CONFIG_MII=y
CONFIG_SYS_NS16550=y
diff --git a/configs/netspace_lite_v2_defconfig
b/configs/netspace_lite_v2_defconfig
index 26ca464e0b48..bfa93dbd1c27 100644
--- a/configs/netspace_lite_v2_defconfig
+++ b/configs/netspace_lite_v2_defconfig
@@ -45,6 +45,7 @@ CONFIG_BLK=y
# CONFIG_MMC is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_DM_ETH=y
CONFIG_MVGBE=y
CONFIG_MII=y
CONFIG_SYS_NS16550=y
diff --git a/configs/netspace_max_v2_defconfig
b/configs/netspace_max_v2_defconfig
index af2d9df6ff8a..d0f750369a3a 100644
--- a/configs/netspace_max_v2_defconfig
+++ b/configs/netspace_max_v2_defconfig
@@ -45,6 +45,7 @@ CONFIG_BLK=y
# CONFIG_MMC is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_DM_ETH=y
CONFIG_MVGBE=y
CONFIG_MII=y
CONFIG_SYS_NS16550=y
diff --git a/configs/netspace_mini_v2_defconfig
b/configs/netspace_mini_v2_defconfig
index 7e013b48d1a1..6cfaccf51dbd 100644
--- a/configs/netspace_mini_v2_defconfig
+++ b/configs/netspace_mini_v2_defconfig
@@ -43,6 +43,7 @@ CONFIG_BLK=y
# CONFIG_MMC is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_DM_ETH=y
CONFIG_MVGBE=y
CONFIG_MII=y
CONFIG_SYS_NS16550=y
diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig
index 3585b7cf6318..1bd148f9b511 100644
--- a/configs/netspace_v2_defconfig
+++ b/configs/netspace_v2_defconfig
@@ -45,6 +45,7 @@ CONFIG_BLK=y
# CONFIG_MMC is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_DM_ETH=y
CONFIG_MVGBE=y
CONFIG_MII=y
CONFIG_SYS_NS16550=y
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH v2 4/5] arm: kirkwood: enable DM_USB for LaCie board
On 28.06.20 19:00, Simon Guinot wrote: This patch enables DM_USB and USB_STORAGE for the following Kirkwood-based LaCie boards: - d2 Network v2 - Internet Space v2 - 2Big Network v2 - Network Space v2 - Network Space Lite v2 - Network Space Max v2 Signed-off-by: Simon Guinot Reviewed-by: Stefan Roese Thanks, Stefan --- configs/d2net_v2_defconfig | 2 ++ configs/inetspace_v2_defconfig | 2 ++ configs/net2big_v2_defconfig | 2 ++ configs/netspace_lite_v2_defconfig | 2 ++ configs/netspace_max_v2_defconfig | 2 ++ configs/netspace_v2_defconfig | 2 ++ 6 files changed, 12 insertions(+) diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index 5a3a1f60e308..33f48e0dd94c 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -52,4 +52,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 6cd4348a3c1d..ca444d0aafa3 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -52,4 +52,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index e7b7be7ed506..4d0e50b3e0a5 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -52,4 +52,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index 9e3768ef4efd..26ca464e0b48 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -52,5 +52,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y +CONFIG_USB_STORAGE=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index b06321895b20..af2d9df6ff8a 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -52,5 +52,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y +CONFIG_USB_STORAGE=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index fc09c6b22464..3585b7cf6318 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -52,4 +52,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y Viele Grüße, Stefan -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
[PATCH 1/6] mmc: mmc_spi: correct the while condition
When variable i will become 0, while(i--) loop breaks but variable i will
again decrement to -1 because of i-- and that's why below condition
"if (!i && (r != resp_match_value)" will never execute, So doing "i--"
inside of while() loop solves this problem.
Signed-off-by: Pragnesh Patel
Reviewed-by: Bin Meng
---
drivers/mmc/mmc_spi.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c
index e76ab54838..86cc932151 100644
--- a/drivers/mmc/mmc_spi.c
+++ b/drivers/mmc/mmc_spi.c
@@ -105,12 +105,14 @@ static int mmc_spi_sendcmd(struct udevice *dev,
if (resp_match) {
r = ~resp_match_value;
i = CMD_TIMEOUT;
- while (i--) {
+ while (i) {
ret = dm_spi_xfer(dev, 1 * 8, NULL, , 0);
if (ret)
return ret;
debug(" resp%d=0x%x", rpos, r);
rpos++;
+ i--;
+
if (r == resp_match_value)
break;
}
--
2.17.1
Re: [PATCH v4 3/3] riscv: Enable CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATE
> From: Bin Meng [mailto:bmeng...@gmail.com] > Sent: Friday, June 26, 2020 9:16 AM > To: Rick Jian-Zhi Chen(陳建志); U-Boot Mailing List > Cc: Atish Patra; Bin Meng > Subject: [PATCH v4 3/3] riscv: Enable CONFIG_OF_BOARD_FIXUP by default for > OF_SEPARATE > > From: Bin Meng > > Starting from OpenSBI v0.7, the SBI firmware inserts/fixes up the reserved > memory node for PMP protected memory regions. All RISC-V boards need to copy > the reserved memory node from the device tree provided by the firmware to the > device tree used by U-Boot. > > Turn on CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATE. > > Signed-off-by: Bin Meng > Reviewed-by: Atish Patra > --- > > Changes in v4: > - /s/needs/need in the commit message > > Changes in v3: > - change to "default y if OF_SEPARATE" > > arch/riscv/Kconfig | 3 +++ > configs/sifive_fu540_defconfig | 1 - > 2 files changed, 3 insertions(+), 1 deletion(-) Reviewed-by: Rick Chen > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index d9854f5..ff8a9f8 > 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -273,4 +273,7 @@ config STACK_SIZE_SHIFT > int > default 14 > > +config OF_BOARD_FIXUP > + default y if OF_SEPARATE > + > endmenu > diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig > index 8d412f8..32347c2 100644 > --- a/configs/sifive_fu540_defconfig > +++ b/configs/sifive_fu540_defconfig > @@ -16,7 +16,6 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y > CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_YMODEM_SUPPORT=y > -CONFIG_OF_BOARD_FIXUP=y CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00" > CONFIG_SYS_RELOC_GD_ENV_ADDR=y > CONFIG_SPL_CLK=y > -- > 2.7.4
Re: [PATCH v2 22/49] x86: rockchip: Change how selection of ROMs works
Hi Simon, On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote: > > Most x86 boards build a u-boot.rom which is programmed into SPI flash. But > this is not unique to x86. For example some rockchip boards can also boot > from SPI flash. > > Also, at least on x86, binary blobs are sadly quite common. It is not > possible to build a functional image without them, and U-Boot needs to > know this at build time. > > Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is > built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary > blobs are also needed. If they are not needed, it is safe to build the ROM > always. Otherwise we still require the BUILD_ROM environment variable. > > For now this affects only x86, but future patches will enable this for > rockchip too. The commit tag has rockchip, but this patch only affects x86 for now. Remove this tag? > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > Kconfig | 18 +- > Makefile | 18 +- > arch/Kconfig | 1 + > arch/x86/Kconfig | 4 > arch/x86/cpu/baytrail/Kconfig | 1 + > arch/x86/cpu/quark/Kconfig| 1 + > 6 files changed, 37 insertions(+), 6 deletions(-) > > diff --git a/Kconfig b/Kconfig > index 0e7ccc0b07..876c5db911 100644 > --- a/Kconfig > +++ b/Kconfig > @@ -240,9 +240,25 @@ config PHYS_64BIT > This can be used not only for 64bit SoCs, but also for > large physical address extension on 32bit SoCs. > > +config HAS_ROM > + bool > + select BINMAN > + help > + Enables building of a u-boot.rom target. This collects U-Boot and > + any necessary binary blobs. > + > +config ROM_NEEDS_BLOBS > + bool > + depends on HAS_ROM > + help > + Enable this if building the u-boot.rom target needs binary blobs, > and > + so cannot be done normally. In this case, pass BUILD_ROM=1 to make > + to tell U-Boot to build the ROM. > + > config BUILD_ROM > bool "Build U-Boot as BIOS replacement" > - depends on X86 > + depends on HAS_ROM > + default y if !ROM_NEEDS_BLOBS > help > This option allows to build a ROM version of U-Boot. > The build process generally requires several binary blobs > diff --git a/Makefile b/Makefile > index 149f839948..8a2bb94f2c 100644 > --- a/Makefile > +++ b/Makefile > @@ -916,9 +916,12 @@ ALL-$(CONFIG_REMAKE_ELF) += u-boot.elf > ALL-$(CONFIG_EFI_APP) += u-boot-app.efi > ALL-$(CONFIG_EFI_STUB) += u-boot-payload.efi > > +ifneq ($(CONFIG_HAS_ROM),) > ifneq ($(BUILD_ROM)$(CONFIG_BUILD_ROM),) > -ALL-$(CONFIG_X86_RESET_VECTOR) += u-boot.rom > +ALL-y += u-boot.rom > endif > +endif > + > ifeq ($(CONFIG_SYS_COREBOOT)$(CONFIG_SPL),yy) > ALL-$(CONFIG_BINMAN) += u-boot-x86-with-spl.bin > endif > @@ -1580,7 +1583,7 @@ endif > # reset vector) at the top, Intel ME descriptor at the bottom, and U-Boot in > # the middle. This is handled by binman based on an image description in the > # board's device tree. > -ifneq ($(CONFIG_X86_RESET_VECTOR),) > +ifneq ($(CONFIG_HAS_ROM),) > rom: u-boot.rom FORCE > > refcode.bin: $(srctree)/board/$(BOARDDIR)/refcode.bin FORCE > @@ -1590,11 +1593,12 @@ quiet_cmd_ldr = LD $@ > cmd_ldr = $(LD) $(LDFLAGS_$(@F)) \ >$(filter-out FORCE,$^) -o $@ > > -u-boot.rom: u-boot-x86-start16.bin u-boot-x86-reset16.bin u-boot.bin \ > +rom-deps := u-boot.bin > +ifdef CONFIG_X86 > +rom-deps += u-boot-x86-start16.bin u-boot-x86-reset16.bin \ > $(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \ > $(if $(CONFIG_TPL_X86_16BIT_INIT),tpl/u-boot-tpl.bin) \ > - $(if $(CONFIG_HAVE_REFCODE),refcode.bin) FORCE > - $(call if_changed,binman) > + $(if $(CONFIG_HAVE_REFCODE),refcode.bin) > > OBJCOPYFLAGS_u-boot-x86-start16.bin := -O binary -j .start16 > u-boot-x86-start16.bin: u-boot FORCE > @@ -1605,6 +1609,10 @@ u-boot-x86-reset16.bin: u-boot FORCE > $(call if_changed,objcopy) > endif > > +u-boot.rom: $(rom-deps) FORCE > + $(call if_changed,binman) > +endif > + > ifneq ($(CONFIG_ARCH_SUNXI),) > ifeq ($(CONFIG_ARM64),) > u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb FORCE > diff --git a/arch/Kconfig b/arch/Kconfig > index a11f872938..ff417d40fd 100644 > --- a/arch/Kconfig > +++ b/arch/Kconfig > @@ -160,6 +160,7 @@ config X86 > select TIMER > select USE_PRIVATE_LIBGCC > select X86_TSC_TIMER > + imply HAS_ROM if X86_RESET_VECTOR > imply BLK > imply CMD_DM > imply CMD_FPGA_LOADMK > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig > index c8eae24c07..c688c46475 100644 > --- a/arch/x86/Kconfig > +++ b/arch/x86/Kconfig > @@ -360,6 +360,8 @@ config HAVE_FSP > bool "Add an Firmware Support Package binary" > depends on !EFI > select USE_HOB >
Re: [PATCH v2 35/49] sunxi: Makefile: Drop explicit targets built by binman
On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > On sunxi various files that need to be created by binman. It does not make > sense to enumerate these in the Makefile. They are described in the > configuration (devicetree) for each board and we can simply run binman > (always) to generate them. > > This avoid sprinkling the Makefile with arch-specific code. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > Makefile | 7 ++- > 1 file changed, 2 insertions(+), 5 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 32/49] powerpc: mpc85xx: Only enable binman when it is needed
On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > Quite a few boards using this SoC family don't use binman, yet > CONFIG_BINMAN is enabled for all of them. But the option should only be > enabled if we expect binman to produce an image. Calling binman when the > device tree is missing, etc. will cause failer. > > Add a condition so that CONFIG_BINMAN is only enabled as needed. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > arch/powerpc/Kconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 36/49] tegra: Makefile: Drop explicit targets built by binman
On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > On tegra various files that need to be created by binman. It does not make > sense to enumerate these in the Makefile. They are described in the > configuration (devicetree) for each board and we can simply run binman > (always) to generate them. > > This avoid sprinkling the Makefile with arch-specific code. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > Makefile | 12 > 1 file changed, 12 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 39/49] Makefile: Move CONFIG_TOOLS_DEBUG check to later
On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > At present this is checked before the config has been loaded by the > Makefile, so it doesn't work. > > Move the check to later. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > Makefile | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 38/49] rockchip: Makefile: Drop explicit targets built by binman
On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > On rockchip various files that need to be created by binman. It does not > make sense to enumerate these in the Makefile. They are described in the > configuration (devicetree) for each board and we can simply run binman > (always) to generate them. > > This avoid sprinkling the Makefile with arch-specific code. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > Makefile | 20 ++-- > 1 file changed, 14 insertions(+), 6 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH 2/7] usb: ehci-mx6: Add i.MX8 OTG controller support
On 6/29/20 10:24 AM, Peng Fan wrote:
[...]
>>> The i.MX8 has two USB controllers: USBOH and USB3. The USBOH reuses
>>> previous i.MX6/7. It has same PHY IP as i.MX7ULP but NC registers are
>>> same as i.MX7D. So add its support in ehci-mx6 driver.
>>>
>>> Also the driver is updated to remove build warning for 64 bits CPU.
>>
>> Please split the fixes into separate patch.
>
> Sorry for not be clear, but the driver was only built for ARM32 i.MX.
> It is after we start supporting i.MX8, there are some warnings, which
> was introduced by adding i.MX8 support. It should stay in same patch.
I understand that, but the 64bit fixes can be pulled into separate patch
to make it easier to review just the OTG support without having the
fixes mixed in the same patch.
[...]
>>> static void usb_power_config(int index) {
>>> - struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR +
>>> + struct usbnc_regs *usbnc = (struct usbnc_regs
>>> +*)(ulong)(USB_BASE_ADDR +
>>
>> Is the extra type cast really needed ? If so, then it should be uintptr_t so
>> it
>> would work with 64bit addresses.
>
> Will use uintptr_t. there is warning if not.
>
> "warning: cast to pointer from integer of different size
> [-Wint-to-pointer-cast]"
[...]
[PATCH 1/1] efi_loader: fix incorrect use of EFI_EXIT()
efi_get_variable_common() does not use EFI_ENTRY(). So we should not use
EFI_EXIT() either.
Fixes: 767f6eeb01d3 ("efi_loader: variable: support variable authentication")
Signed-off-by: Heinrich Schuchardt
---
lib/efi_loader/efi_variable.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index 6271dbcf41..c262cb5972 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -606,7 +606,7 @@ static efi_status_t efi_get_variable_common(u16
*variable_name,
u32 attr;
if (!variable_name || !vendor || !data_size)
- return EFI_EXIT(EFI_INVALID_PARAMETER);
+ return EFI_INVALID_PARAMETER;
ret = efi_to_native(_name, variable_name, vendor);
if (ret)
--
2.27.0
Re: [PATCH v2 08/49] binman: Fix a few typos in the entry docs
Hi Simon, On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote: > > Some typos have been fixed in the code but the entry docs were not > regenerated. Fix this. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > tools/binman/README.entries | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/tools/binman/README.entries b/tools/binman/README.entries > index 4f2c48fdc2..d5b4b3af2b 100644 > --- a/tools/binman/README.entries > +++ b/tools/binman/README.entries > @@ -519,7 +519,7 @@ Properties / Entry arguments: > > This file contains code used by the SoC that is required to make it work. > The Management Engine is like a background task that runs things that are > -not clearly documented, but may include keyboard, display and network > +not clearly documented, but may include keyboard, deplay and network I don't understand this change. The existing doc does not have typo, but your changes have. > access. For platform that use ME it is not possible to disable it. U-Boot > does not directly execute code in the ME binary. > > @@ -616,7 +616,7 @@ Entry: powerpc-mpc85xx-bootpg-resetvec: PowerPC mpc85xx > bootpg + resetvec code f > Properties / Entry arguments: > - filename: Filename of u-boot-br.bin (default 'u-boot-br.bin') > > -This entry is valid for PowerPC mpc85xx cpus. This entry holds > +This enrty is valid for PowerPC mpc85xx cpus. This entry holds ditto > 'bootpg + resetvec' code for PowerPC mpc85xx CPUs which needs to be > placed at offset 'RESET_VECTOR_ADDRESS - 0xffc'. > > -- Regards, Bin
Re: [PATCH] sync helios4 config to clearfog and dts to kernel
On 27.06.20 22:00, dgilm...@redhat.com wrote:
From: Dennis Gilmore
The helios4 is built on the same microsom as the clearfog, by syncing the config
we enable the same featureset that exists in the som on the helios4. The current
config does not boot as some of the clearfog changes needed to be made on the
helios4 also, generally speaking most changes for the clearfog should also be
made on the helios4.
Signed-off-by: Dennis Gilmore
A small change in the patch subject would be good, like:
arm: mvebu: helios4: sync helios4 config to clearfog and dts to kernel
Other that that:
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
arch/arm/dts/armada-388-helios4-u-boot.dtsi | 15
arch/arm/dts/armada-388-helios4.dts | 16 ++--
configs/helios4_defconfig | 20 +++--
include/configs/helios4.h | 95 -
4 files changed, 93 insertions(+), 53 deletions(-)
diff --git a/arch/arm/dts/armada-388-helios4-u-boot.dtsi
b/arch/arm/dts/armada-388-helios4-u-boot.dtsi
index f0da9f42de..0753889854 100644
--- a/arch/arm/dts/armada-388-helios4-u-boot.dtsi
+++ b/arch/arm/dts/armada-388-helios4-u-boot.dtsi
@@ -14,6 +14,9 @@
{
u-boot,dm-spl;
+ spi-flash@0 {
+ u-boot,dm-spl;
+ };
};
{
@@ -21,6 +24,18 @@
u-boot,dm-spl;
};
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
{
u-boot,dm-spl;
};
diff --git a/arch/arm/dts/armada-388-helios4.dts
b/arch/arm/dts/armada-388-helios4.dts
index a154e0f4f4..fb49df2a3b 100644
--- a/arch/arm/dts/armada-388-helios4.dts
+++ b/arch/arm/dts/armada-388-helios4.dts
@@ -140,11 +140,6 @@
soc {
internal-regs {
i2c@11000 {
- clock-frequency = <40>;
- pinctrl-0 = <_pins>;
- pinctrl-names = "default";
- status = "okay";
-
/*
* PCA9655 GPIO expander, up to 1MHz clock.
* 0-Board Revision bit 0 #
@@ -187,8 +182,7 @@
gpio-hog;
gpios = <5 GPIO_ACTIVE_HIGH>;
input;
- line-name =
- "usb-overcurrent-status";
+ line-name =
"usb-overcurrent-status";
};
};
@@ -248,7 +242,7 @@
bus-width = <4>;
cd-gpios = < 20 GPIO_ACTIVE_LOW>;
no-1-8-v;
- pinctrl-0 = <_sdhci_pins
+ pinctrl-0 = <_sdhci_pins
_sdhci_cd_pins>;
pinctrl-names = "default";
status = "okay";
@@ -286,6 +280,12 @@
marvell,pins = "mpp20";
marvell,function = "gpio";
};
+ helios_sdhci_pins: helios-sdhci-pins {
+ marvell,pins = "mpp21", "mpp28",
+ "mpp37", "mpp38",
+ "mpp39", "mpp40";
+ marvell,function = "sd0";
+ };
helios_led_pins: helios-led-pins {
marvell,pins = "mpp24", "mpp25",
"mpp49", "mpp50",
diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig
index e15f10cdd5..9cc87fd96a 100644
--- a/configs/helios4_defconfig
+++ b/configs/helios4_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
+CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x0080
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -24,40 +25,47 @@ CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x141
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x1
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_CMD_TLV_EEPROM=y
+CONFIG_SPL_CMD_TLV_EEPROM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
+CONFIG_CMD_MVEBU_BUBT=y
# CONFIG_SPL_PARTITION_UUIDS is not set
Re: [PATCH] splash: Fix build warning on 64 bits CPU
On Wed, 10 Jun 2020 02:52:22 -0700 Ye Li ye...@nxp.com wrote: > Get below warning on ARM64 platform, because the bmp_load_addr > is defined to u32. > > common/splash.c: In function ‘splash_video_logo_load’: > common/splash.c:74:9: warning: cast to pointer from integer > of different size [-Wint-to-pointer-cast] >74 | memcpy((void *)bmp_load_addr, bmp_logo_bitmap, > > Signed-off-by: Ye Li > --- > common/splash.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Applied to u-boot-video/master, thanks! -- Anatolij
Re: U-Boot Logo showing incorrect colors with eLCDIF
Hi Fabio, On Mon, 24 Feb 2020 09:38:04 -0300 Fabio Estevam feste...@gmail.com wrote: > Hi Anatolij, > > On Wed, Feb 5, 2020 at 2:45 PM Fabio Estevam wrote: > > > > Hi Anatolij, > > > > On Wed, Feb 5, 2020 at 2:00 PM Anatolij Gustschin wrote: > > > > > I tried to extend the BMP code to fix this, but my testing with > > > sandbox SDL end of last week has shown incorrect colors in 24bpp > > > mode, and I didn't find the reason for it. I do not see what is > > > wrong in the code, maybe there is some issue with sandbox SDL. > > > So I've submitted some patches [1], [2], [3]. Could you please > > > test them on mx6ul-14x14-evk ? Thanks! > > > > Thanks for the patches. > > > > I can see the logo colors correctly now, but there is some breakage now. > > > > Please see the result at: > > https://ibb.co/0YKwTxJ > > Would you have a fix for this? I've tested on mx6ul-14x14-evk, with current U-Boot master I do not see this problem any more. -- Anatolij
Re: [PATCH v2 24/49] Makefile: Allow building .rom files for non-x86 boards
Hi Simon, On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote: > > Some non-x86 devices can use SPI flash to boot and need to produce images > of a fixed size to program the flash. > > Add a way to handle this for non-x86 boards. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > Makefile | 12 > 1 file changed, 12 insertions(+) > > diff --git a/Makefile b/Makefile > index 8a2bb94f2c..07c237120d 100644 > --- a/Makefile > +++ b/Makefile > @@ -1607,6 +1607,18 @@ u-boot-x86-start16.bin: u-boot FORCE > OBJCOPYFLAGS_u-boot-x86-reset16.bin := -O binary -j .resetvec > u-boot-x86-reset16.bin: u-boot FORCE > $(call if_changed,objcopy) > + > +else # !CONFIG_X86 > + > +ifdef CONFIG_SPL > +rom-deps += spl/u-boot-spl.bin > +rom-deps += u-boot.img Not every platform has a u-boot.img target ? > +endif > + > +ifdef CONFIG_TPL > +rom-deps += tpl/u-boot-tpl.bin > +endif > + > endif > > u-boot.rom: $(rom-deps) FORCE > -- Regards, Bin
Re: [PATCH v2 45/49] rockchip: Drop the fit_spl_optee.sh script
On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > Now that all board use binman instead of this script, drop it. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > arch/arm/mach-rockchip/fit_spl_optee.sh | 84 - > 1 file changed, 84 deletions(-) > delete mode 100755 arch/arm/mach-rockchip/fit_spl_optee.sh > Reviewed-by: Bin Meng
Re: [PATCH v2 49/49] x86: chromebook_samus_tpl: Correct the image layout
On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > At present there is not enough space for U-Boot due to the EFI loader. > Correct this. > > Signed-off-by: Simon Glass > --- > > Changes in v2: > - Add patches to partially migrate rockchip to use binman > > configs/chromebook_samus_tpl_defconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 48/49] x86: chromebook_panther: Correct the image layout
On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > This board does not have microcode but at present that is not supported > by Kconfig nor the binman image layout. Fix both of these. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > arch/x86/Kconfig| 7 ++- > arch/x86/dts/u-boot.dtsi| 6 +- > configs/chromebox_panther_defconfig | 2 ++ > 3 files changed, 13 insertions(+), 2 deletions(-) > Reviewed-by: Bin Meng
[PATCH] usb: host: dwc3-sti-glue: Fix ofnode_valid() parameter
node varaible is used as iterator into ofnode_for_each_subnode()
loop, when exiting of it, node is no more a valid ofnode.
Use dwc3_node instead as parameter of ofnode_valid()
Fixes: ac28e59a574d ("usb: Migrate to support live DT for some driver")
Signed-off-by: Patrice Chotard
---
drivers/usb/host/dwc3-sti-glue.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/host/dwc3-sti-glue.c b/drivers/usb/host/dwc3-sti-glue.c
index a72ab20168..3e6c1429d6 100644
--- a/drivers/usb/host/dwc3-sti-glue.c
+++ b/drivers/usb/host/dwc3-sti-glue.c
@@ -159,7 +159,7 @@ static int sti_dwc3_glue_bind(struct udevice *dev)
dwc3_node = node;
}
- if (!ofnode_valid(node)) {
+ if (!ofnode_valid(dwc3_node)) {
pr_err("Can't find dwc3 subnode for %s\n", dev->name);
return -ENODEV;
}
--
2.17.1
Re: [EXT] [PATCH 1/1] power: pmic_pca9450: fix PCA9450A I2C address
On 6/29/20 11:51 AM, Ye Li wrote: > On Mon, 2020-06-29 at 10:42 +0200, Sébastien Szymanski wrote: >> Caution: EXT Email >> >> PCA9450A I2C address is 0x25. Fix it. >> >> Signed-off-by: Sébastien Szymanski >> --- >> drivers/power/pmic/pmic_pca9450.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/power/pmic/pmic_pca9450.c >> b/drivers/power/pmic/pmic_pca9450.c >> index 67a9090200..c0fb78c4cd 100644 >> --- a/drivers/power/pmic/pmic_pca9450.c >> +++ b/drivers/power/pmic/pmic_pca9450.c >> @@ -23,7 +23,7 @@ int power_pca9450a_init(unsigned char bus) >> p->name = pca9450_name; >> p->interface = PMIC_I2C; >> p->number_of_regs = PCA9450_REG_NUM; >> - p->hw.i2c.addr = 0x35; >> + p->hw.i2c.addr = 0x25; > > The address 0x35 is correct for PCA9540A. You are probably using > PCA9540B/C which address is 0x25. If so, please > call power_pca9450b_init. No. I am using a PCA9450A chip and its address is 0x25: # i2cget -f -y 0 0x25 0x00 0x10 Moreover, the datasheet says it's 0x25. [1] [1] https://www.nxp.com/docs/en/data-sheet/PCA9450DS.pdf Regards, > > Best regards, > Ye Li >> p->hw.i2c.tx_num = 1; >> p->bus = bus; >> >> -- >> 2.26.2 -- Sébastien Szymanski, Armadeus Systems Software engineer
[PATCH 1/2] mtd: nand: raw: denali: Assert reset before deassert
Always put the controller in reset, then take it out of reset.
This is to make sure controller always in reset state in both SPL and
proper Uboot.
This is preparation for the next patch to poll for reset completion
(rst_comp) bit after reset.
Signed-off-by: Radu Bacrau
Signed-off-by: Ley Foon Tan
---
drivers/mtd/nand/raw/denali_dt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/nand/raw/denali_dt.c b/drivers/mtd/nand/raw/denali_dt.c
index 2728e8098faa..75ad15b0758c 100644
--- a/drivers/mtd/nand/raw/denali_dt.c
+++ b/drivers/mtd/nand/raw/denali_dt.c
@@ -148,6 +148,8 @@ static int denali_dt_probe(struct udevice *dev)
if (ret) {
dev_warn(dev, "Can't get reset: %d\n", ret);
} else {
+ reset_assert_bulk();
+ udelay(2);
reset_deassert_bulk();
/*
--
2.19.0
Re: [PATCH v4 2/3] riscv: Expand the DT size before copy reserved memory node
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: Friday, June 26, 2020 9:16 AM
> To: Rick Jian-Zhi Chen(陳建志); U-Boot Mailing List
> Cc: Atish Patra; Bin Meng
> Subject: [PATCH v4 2/3] riscv: Expand the DT size before copy reserved memory
> node
>
> From: Bin Meng
>
> The FDT blob might not have sufficient space to hold a copy of reserved
> memory node. Expand it before the copy.
>
> Reported-by: Rick Chen
> Signed-off-by: Bin Meng
> Reviewed-by: Atish Patra
> ---
>
> (no changes since v3)
>
> Changes in v3:
> - Extend the FDT size by 1024 bytes
>
> arch/riscv/lib/fdt_fixup.c | 12
> 1 file changed, 12 insertions(+)
>
Reviewed-by: Rick Chen
> diff --git a/arch/riscv/lib/fdt_fixup.c b/arch/riscv/lib/fdt_fixup.c index
> 5f523f0..160ccca 100644
> --- a/arch/riscv/lib/fdt_fixup.c
> +++ b/arch/riscv/lib/fdt_fixup.c
> @@ -41,6 +41,18 @@ int riscv_fdt_copy_resv_mem_node(const void *src, void
> *dst)
> return 0;
> }
>
> + /*
> +* Extend the FDT by the following estimated size:
> +*
> +* Each PMP memory region entry occupies 64 bytes.
> +* With 16 PMP memory regions we need 64 * 16 = 1024 bytes.
> +*/
> + err = fdt_open_into(dst, dst, fdt_totalsize(dst) + 1024);
> + if (err < 0) {
> + printf("Device Tree can't be expanded to accommodate new
> node");
> + return err;
> + }
> +
> fdt_for_each_subnode(node, src, offset) {
> name = fdt_get_name(src, node, NULL);
>
> --
> 2.7.4
Re: [PATCH v2 37/49] mediatek: Makefile: Drop explicit targets built by binman
On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > On mediatek various files that need to be created by binman. It does not > make sense to enumerate these in the Makefile. They are described in the > configuration (devicetree) for each board and we can simply run binman > (always) to generate them. > > This avoid sprinkling the Makefile with arch-specific code. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > Makefile | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 40/49] Makefile: Fix a long line in cmd_mkfitimage
On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > Fix this line which is over the limit. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > Makefile | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > Reviewed-by: Bin Meng
Re: [PATCH v1 3/4] video: raydium_rm68200: fill characteristics of DSI data link
On Wed, 24 Jun 2020 10:45:41 +0200 Yannick Fertre yannick.fer...@st.com wrote: > Fill characteristics of DSI data link to platform data instead of > mipi device to avoid memory corruption. > > Signed-off-by: Yannick Fertre > --- > drivers/video/raydium-rm68200.c | 20 +--- > 1 file changed, 5 insertions(+), 15 deletions(-) Applied to u-boot-video/master, thanks! -- Anatolij
Re: [PATCH] video: vidconsole: avoid multiple lines overwrite logo
On Wed, 10 Jun 2020 02:52:21 -0700 Ye Li ye...@nxp.com wrote: > Fix the bug that multiple lines wraps to overwrite logo bmp > display. > > Signed-off-by: Ye Li > --- > drivers/video/vidconsole-uclass.c | 1 + > 1 file changed, 1 insertion(+) Applied to u-boot-video/master, thanks! -- Anatolij
Re: [PATCH v2] video: bmp: support 8bits BMP drawing on 24/32 bpp framebuffer
On Sun, 28 Jun 2020 00:59:44 +0200 Anatolij Gustschin ag...@denx.de wrote: ... > Changes in v2: > - reduce code > - update commit message > > drivers/video/video_bmp.c | 27 +-- > 1 file changed, 21 insertions(+), 6 deletions(-) Applied to u-boot-video/master, thanks! -- Anatolij
Re: [PATCH 1/3] video: add support for drawing 8bpp bitmap on 32bpp framebuffer
Hi Igor, On Tue, 23 Jun 2020 14:40:45 +0300 Igor Opaniuk igor.opan...@gmail.com wrote: ... > Any chance to get this merged? I've merged another reworked patch to fix the logo drawing problem. -- Anatolij
[PATCH 1/1] power: pmic_pca9450: fix PCA9450A I2C address
PCA9450A I2C address is 0x25. Fix it. Signed-off-by: Sébastien Szymanski --- drivers/power/pmic/pmic_pca9450.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/power/pmic/pmic_pca9450.c b/drivers/power/pmic/pmic_pca9450.c index 67a9090200..c0fb78c4cd 100644 --- a/drivers/power/pmic/pmic_pca9450.c +++ b/drivers/power/pmic/pmic_pca9450.c @@ -23,7 +23,7 @@ int power_pca9450a_init(unsigned char bus) p->name = pca9450_name; p->interface = PMIC_I2C; p->number_of_regs = PCA9450_REG_NUM; - p->hw.i2c.addr = 0x35; + p->hw.i2c.addr = 0x25; p->hw.i2c.tx_num = 1; p->bus = bus; -- 2.26.2
[PATCH 2/2] mtd: nand: raw: denali: Wait for reset completion status
Fixed delay 200us is not working in certain platforms. Change to
poll for reset completion status to have more reliable reset process.
Controller will set the rst_comp bit in intr_status register after
controller has completed its reset and initialization process.
Signed-off-by: Radu Bacrau
Signed-off-by: Ley Foon Tan
---
drivers/mtd/nand/raw/denali.c| 11 +++
drivers/mtd/nand/raw/denali.h| 1 +
drivers/mtd/nand/raw/denali_dt.c | 10 +++---
3 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index 15e90291de09..ab91db85467d 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -1220,6 +1220,17 @@ static int denali_multidev_fixup(struct denali_nand_info
*denali)
return 0;
}
+int denali_wait_reset_complete(struct denali_nand_info *denali)
+{
+ u32 irq_status;
+
+ irq_status = denali_wait_for_irq(denali, INTR__RST_COMP);
+ if (!(irq_status & INTR__RST_COMP))
+ return -EIO;
+
+ return 0;
+}
+
int denali_init(struct denali_nand_info *denali)
{
struct nand_chip *chip = >nand;
diff --git a/drivers/mtd/nand/raw/denali.h b/drivers/mtd/nand/raw/denali.h
index 019deda094e5..6cd02b2e26ee 100644
--- a/drivers/mtd/nand/raw/denali.h
+++ b/drivers/mtd/nand/raw/denali.h
@@ -321,6 +321,7 @@ struct denali_nand_info {
#define DENALI_CAP_DMA_64BIT BIT(1)
int denali_calc_ecc_bytes(int step_size, int strength);
+int denali_wait_reset_complete(struct denali_nand_info *denali);
int denali_init(struct denali_nand_info *denali);
#endif /* __DENALI_H__ */
diff --git a/drivers/mtd/nand/raw/denali_dt.c b/drivers/mtd/nand/raw/denali_dt.c
index 75ad15b0758c..8a6950f8a39f 100644
--- a/drivers/mtd/nand/raw/denali_dt.c
+++ b/drivers/mtd/nand/raw/denali_dt.c
@@ -154,10 +154,14 @@ static int denali_dt_probe(struct udevice *dev)
/*
* When the reset is deasserted, the initialization sequence is
-* kicked (bootstrap process). The driver must wait until it is
-* finished. Otherwise, it will result in unpredictable
behavior.
+* kicked. The driver must wait until it is finished. Otherwise,
+* it will result in unpredictable behavior.
*/
- udelay(200);
+ ret = denali_wait_reset_complete(denali);
+ if (ret) {
+ dev_err(denali->dev, "reset not completed.\n");
+ return ret;
+ }
}
return denali_init(denali);
--
2.19.0
Re: [PATCH v2 34/49] x86: Drop CONFIG_BUILD_ROM and repurpose BUILD_ROM
On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > This Kconfig is not needed anymore since U-Boot will build the ROM if the > required binary blobs exist. > > The BUILD_ROM environment variable used to request that the ROM be built. > Now this always happens if the required binary blobs are available. Update > it to mean that U-Boot should fail if the ROM cannot be built. This > behaviour should be compatible with how it used to work. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > Kconfig | 7 +-- > Makefile | 3 ++- > configs/qemu-x86_64_defconfig | 1 - > configs/qemu-x86_defconfig| 1 - > 4 files changed, 7 insertions(+), 5 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 33/49] x86: Makefile: Drop explicit targets built by binman
Hi Simon, On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > On x86 various files that need to be created by binman. It does not make > sense to enumerate these in the Makefile. They are described in the > configuration (devicetree) for each board and we can simply run binman > (always) to generate them. > > Update the Makefile to have a separate, final step which runs binman, > once all input dependencies are present. > > This avoid sprinkling the Makefile with arch-specific code. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > Makefile | 63 --- > arch/arm/dts/rockchip-u-boot.dtsi | 2 + > 2 files changed, 17 insertions(+), 48 deletions(-) > > diff --git a/Makefile b/Makefile > index 875fbb1f1f..9c15dced7d 100644 > --- a/Makefile > +++ b/Makefile > @@ -916,16 +916,6 @@ INPUTS-$(CONFIG_REMAKE_ELF) += u-boot.elf > INPUTS-$(CONFIG_EFI_APP) += u-boot-app.efi > INPUTS-$(CONFIG_EFI_STUB) += u-boot-payload.efi > > -ifneq ($(CONFIG_HAS_ROM),) > -ifneq ($(BUILD_ROM)$(CONFIG_BUILD_ROM),) > -INPUTS-$(CONFIG_X86_RESET_VECTOR) += u-boot.rom > -endif > -endif > - > -ifeq ($(CONFIG_SYS_COREBOOT)$(CONFIG_SPL),yy) > -INPUTS-$(CONFIG_BINMAN) += u-boot-x86-with-spl.bin > -endif > - > # Build a combined spl + u-boot image for sunxi > ifeq ($(CONFIG_ARCH_SUNXI)$(CONFIG_SPL),yy) > INPUTS-y += u-boot-sunxi-with-spl.bin > @@ -953,9 +943,13 @@ INPUTS-y += u-boot-with-dtb.bin > endif > > ifeq ($(CONFIG_ARCH_ROCKCHIP)$(CONFIG_SPL),yy) > -INPUTS-y += u-boot-rockchip.bin > +INPUTS-y += u-boot-rockchip.bin idbloader.img This change should not belong to this commit > endif > > +INPUTS-$(CONFIG_X86) += u-boot-x86-start16.bin u-boot-x86-reset16.bin \ > + $(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \ > + $(if $(CONFIG_TPL_X86_16BIT_INIT),tpl/u-boot-tpl.bin) > + > LDFLAGS_u-boot += $(LDFLAGS_FINAL) > > # Avoid 'Not enough room for program headers' error on binutils 2.28 onwards. > @@ -1013,7 +1007,14 @@ cmd_cfgcheck = $(srctree)/scripts/check-config.sh $2 \ > PHONY += inputs > inputs: $(INPUTS-y) > > -all: inputs > +all: .binman_stamp inputs > +ifeq ($(CONFIG_BINMAN),y) > + $(call if_changed,binman) > +endif > + > +# Timestamp file to make sure that binman always runs > +.binman_stamp: FORCE > + @touch $@ > > ifeq ($(CONFIG_DEPRECATED),y) > $(warning "You have deprecated configuration options enabled in your > .config! Please check your configuration.") > @@ -1306,7 +1307,7 @@ quiet_cmd_binman = BINMAN $@ > cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \ > --toolpath $(objtree)/tools \ > $(if $(BINMAN_VERBOSE),-v$(BINMAN_VERBOSE)) \ > - build -u -d u-boot.dtb -O . -m \ > + build -u -d u-boot.dtb -O . -m --allow-missing \ > -I . -I $(srctree) -I $(srctree)/board/$(BOARDDIR) \ > $(BINMAN_$(@F)) > > @@ -1583,27 +1584,11 @@ u-boot-br.bin: u-boot FORCE > endif > endif > > -# x86 uses a large ROM. We fill it with 0xff, put the 16-bit stuff (including > -# reset vector) at the top, Intel ME descriptor at the bottom, and U-Boot in > -# the middle. This is handled by binman based on an image description in the > -# board's device tree. > -ifneq ($(CONFIG_HAS_ROM),) > -rom: u-boot.rom FORCE > - > -refcode.bin: $(srctree)/board/$(BOARDDIR)/refcode.bin FORCE > - $(call if_changed,copy) > - > quiet_cmd_ldr = LD $@ > cmd_ldr = $(LD) $(LDFLAGS_$(@F)) \ >$(filter-out FORCE,$^) -o $@ > > -rom-deps := u-boot.bin > ifdef CONFIG_X86 > -rom-deps += u-boot-x86-start16.bin u-boot-x86-reset16.bin \ > - $(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \ > - $(if $(CONFIG_TPL_X86_16BIT_INIT),tpl/u-boot-tpl.bin) \ > - $(if $(CONFIG_HAVE_REFCODE),refcode.bin) > - > OBJCOPYFLAGS_u-boot-x86-start16.bin := -O binary -j .start16 > u-boot-x86-start16.bin: u-boot FORCE > $(call if_changed,objcopy) > @@ -1612,22 +1597,7 @@ OBJCOPYFLAGS_u-boot-x86-reset16.bin := -O binary -j > .resetvec > u-boot-x86-reset16.bin: u-boot FORCE > $(call if_changed,objcopy) > > -else # !CONFIG_X86 > - > -ifdef CONFIG_SPL > -rom-deps += spl/u-boot-spl.bin > -rom-deps += u-boot.img > -endif > - > -ifdef CONFIG_TPL > -rom-deps += tpl/u-boot-tpl.bin > -endif > - > -endif > - > -u-boot.rom: $(rom-deps) FORCE > - $(call if_changed,binman) > -endif > +endif # CONFIG_X86 > > ifneq ($(CONFIG_ARCH_SUNXI),) > ifeq ($(CONFIG_ARM64),) > @@ -1639,9 +1609,6 @@ u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.itb > FORCE > endif > endif > > -u-boot-x86-with-spl.bin: spl/u-boot-spl.bin u-boot.bin FORCE > - $(call if_changed,binman) > - > ifneq ($(CONFIG_ARCH_TEGRA),) > # Makes u-boot-dtb-tegra.bin u-boot-tegra.bin u-boot-nodtb-tegra.bin > %-dtb-tegra.bin %-tegra.bin %-nodtb-tegra.bin: spl/%-spl %.bin FORCE > diff --git
Re: [PATCH v2 2/3] watchdog: rti_wdt: Add support for loading firmware
On 29.06.20 06:54, Lokesh Vutla wrote:
On 29/06/20 10:20 am, Jan Kiszka wrote:
On 29.06.20 04:26, Lokesh Vutla wrote:
+Tom
On 23/06/20 8:11 pm, Jan Kiszka wrote:
On 23.06.20 14:37, Jan Kiszka wrote:
On 23.06.20 13:50, Lokesh Vutla wrote:
On 23/06/20 4:45 pm, Jan Kiszka wrote:
From: Jan Kiszka
To avoid the need of extra boot scripting on AM65x for loading a
watchdog firmware, add the required rproc init and loading logic for the
first R5F core to the watchdog start handler. The firmware itself is
embedded into U-Boot binary.
One possible firmware source is https://github.com/siemens/k3-rti-wdt.
Signed-off-by: Jan Kiszka
---
drivers/watchdog/Kconfig | 20
drivers/watchdog/Makefile | 3 +++
drivers/watchdog/rti_wdt.c | 24
drivers/watchdog/rti_wdt_fw.S | 20
4 files changed, 67 insertions(+)
create mode 100644 drivers/watchdog/rti_wdt_fw.S
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index ee99bd2af1..fd6ab9a85b 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -162,6 +162,26 @@ config WDT_K3_RTI
Say Y here if you want to include support for the K3 watchdog
timer (RTI module) available in the K3 generation of processors.
+if WDT_K3_RTI
+
+config WDT_K3_RTI_LOAD_FW
+ bool "Load watchdog firmware"
+ depends on REMOTEPROC
+ help
+ Automatically load the specified firmware image into the MCU R5F
+ core 0. On the AM65x, this firmware is supposed to handle the expiry
+ of the watchdog timer, typically by resetting the system.
+
+config WDT_K3_RTI_FW_FILE
+ string "Watchdog firmware image file"
+ default "k3-rti-wdt.fw"
+ depends on WDT_K3_RTI_LOAD_FW
+ help
+ Firmware image to be embedded into U-Boot and loaded on watchdog
+ start.
+
+endif
+
config WDT_SANDBOX
bool "Enable Watchdog Timer support for Sandbox"
depends on SANDBOX && WDT
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 16bdbf4970..bf58684875 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -28,7 +28,10 @@ obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
obj-$(CONFIG_WDT_MTK) += mtk_wdt.o
obj-$(CONFIG_WDT_OMAP3) += omap_wdt.o
obj-$(CONFIG_WDT_K3_RTI) += rti_wdt.o
+obj-$(CONFIG_WDT_K3_RTI_LOAD_FW) += rti_wdt_fw.o
obj-$(CONFIG_WDT_SP805) += sp805_wdt.o
obj-$(CONFIG_WDT_STM32MP) += stm32mp_wdt.o
obj-$(CONFIG_WDT_TANGIER) += tangier_wdt.o
obj-$(CONFIG_WDT_XILINX) += xilinx_wwdt.o
+
+$(obj)/rti_wdt_fw.o: $(shell readlink -f $(CONFIG_WDT_K3_RTI_FW_FILE)) FORCE
diff --git a/drivers/watchdog/rti_wdt.c b/drivers/watchdog/rti_wdt.c
index ebe29c7409..38e82a6b6b 100644
--- a/drivers/watchdog/rti_wdt.c
+++ b/drivers/watchdog/rti_wdt.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
/* Timer register set definition */
#define RTIDWDCTRL 0x90
@@ -37,11 +38,16 @@
#define WDT_PRELOAD_MAX 0xfff
+#define RTI_PROC_ID 0
Can we get the rproc id from DT?
You mean, resolve "mcu_r5fss0_core0" to the ID? Doable.
I'm now probing for the first instance of "ti,am654-r5f" compatible. That
excludes usage for the J721E for now, but that one is fine without firmware -
provided there is way to prevent power-down for RTI watchdog otherwise...
I was more of thinking to have a DT property to reference R5-core. But anyways,
the property is not present in kernel. I am okay with this for now.
+
struct rti_wdt_priv {
phys_addr_t regs;
unsigned int clk_khz;
};
+extern const u32 rti_wdt_fw[];
+extern const int rti_wdt_fw_size;
FIT is the preferred way of packing images in U-Boot. Can you try using it?
How does that work? Some example for me?
If you happen to refer to fs-loader: That does not target OSPI, our primary use
case.
No. I was thinking to pack the image in FIT along with ATF and OPTEE like in
k3_fit_atf.sh and register a U_BOOT_FIT_LOADABLE_HANDLER for installing the
firmware.
In case of our board, that image is not processed by U-Boot (only generated).
Also, processing it from the R5 loader would imply putting remoteproc support
into that level, duplicating what we have in A53 U-Boot.
What benefit would that bring? There are other users of this pattern, e.g.
board/xilinx/zynqmp/pm_cfg_obj.S.
I didn't know U-Boot is accepting this. Tom, is this the preferred way for
including firmware images?
The only benefit of an alternative loading mechanism seems to be handling of
larger images from different sources. But that's what I would tackle via boot
scripting and, thus, without this feature. If you only have a few hundred bytes
to embed, like for k3-rti-wdt, you quickly have a lot of overhead with other
approaches.
hmm.. Does the build break if firmware is not present?
Yes, if you configure to include the firmware but specify an invalid path, the
build
Re: [PATCH v2 31/49] Makefile: Rename ALL-y to INPUTS-y
On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > When binman is in use, most of the targets built by the Makefile are > inputs to binman. We then need a final rule to run binman to produce the > final outputs. > > Rename the variable to indicate this, and add a new 'inputs' target. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > Makefile | 60 +--- > arch/arm/config.mk | 10 +++--- > arch/arm/mach-at91/config.mk | 2 +- > arch/arm/mach-davinci/config.mk | 2 +- > arch/arm/mach-k3/config.mk | 10 +++--- > arch/arm/mach-keystone/config.mk | 4 +-- > arch/arm/mach-omap2/config.mk| 28 +++ > arch/arm/mach-rmobile/Makefile | 2 +- > arch/arm/mach-stm32mp/config.mk | 4 +-- > board/BuR/brppt1/config.mk | 4 +-- > board/BuR/brppt2/config.mk | 4 +-- > board/BuR/brsmarc1/config.mk | 6 ++-- > board/imgtec/boston/config.mk| 2 +- > board/intel/edison/config.mk | 2 +- > scripts/Makefile.spl | 24 ++--- > tools/binman/README | 2 +- > 16 files changed, 85 insertions(+), 81 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 46/49] x86: Move the fdtmap away from the binary blobs
On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > This causes conflicts on chromebook_link64. Move it to after U-Boot where > there should be plenty of space. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > arch/x86/dts/u-boot.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 47/49] x86: chromebook_link64: Correct the image layout
On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > At present the image layout is not correct, since it uses the SDRAM > address of the 64-bit U-Boot as the ROM address. Fix this. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > configs/chromebook_link64_defconfig | 2 ++ > 1 file changed, 2 insertions(+) > Reviewed-by: Bin Meng
Re: [PATCH v2 42/49] Makefile: Warn against using CONFIG_SPL_FIT_GENERATOR
On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > This option is used to run arch-specific shell scripts which produce .its > files which are used to produce FIT images. We already have binman which > is designed to produce firmware images. It is more powerful and has tests. > > So this option should be deprecated and not used. Existing uses should be > migrated. > > Mentions of this in code reviews over the last year or so do not seem to > have resulted in action, and things are getting worse. > > So let's add a warning. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > Makefile | 9 + > 1 file changed, 9 insertions(+) > Reviewed-by: Bin Meng
Re: [PATCH v2 44/49] rockchip: Convert evb-rk3229 over to use binman
Hi Simon, On Sun, Jun 14, 2020 at 10:58 AM Simon Glass wrote: > > At present this board uses a custom script to produce the .its file. > Update it to use binman instead. Binman can create all the images that > are needed. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > Makefile | 1 + > configs/evb-rk3229_defconfig | 2 +- > 2 files changed, 2 insertions(+), 1 deletion(-) > > diff --git a/Makefile b/Makefile > index 98172a40d8..50f48f786a 100644 > --- a/Makefile > +++ b/Makefile > @@ -1484,6 +1484,7 @@ ifeq ($(CONFIG_ARM64),y) > OBJCOPYFLAGS_u-boot-rockchip.bin = -I binary -O binary \ > --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff > u-boot-rockchip.bin: idbloader.img u-boot.itb FORCE > + echo rockchip debug leftover? > $(call if_changed,pad_cat) > endif # CONFIG_ARM64 > > diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig > index 4d7beca0b7..9c428fed2a 100644 > --- a/configs/evb-rk3229_defconfig > +++ b/configs/evb-rk3229_defconfig > @@ -15,7 +15,7 @@ CONFIG_DEBUG_UART=y > CONFIG_FIT=y > CONFIG_FIT_VERBOSE=y > CONFIG_SPL_LOAD_FIT=y > -CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/fit_spl_optee.sh" > +# CONFIG_USE_SPL_FIT_GENERATOR is not set > CONFIG_USE_PREBOOT=y > CONFIG_DEFAULT_FDT_FILE="rk3229-evb.dtb" > # CONFIG_DISPLAY_CPUINFO is not set > -- Regards, Bin
Fwd: [PATCH 1/1] riscv: use log functions in fdt_fixup
Forwarded Message
Subject: Re: [PATCH 1/1] riscv: use log functions in fdt_fixup
Date: Mon, 29 Jun 2020 15:21:43 +0800
From: Leo Liang
To: Heinrich Schuchardt
On Fri, Jun 26, 2020 at 06:34:43AM +0200, Heinrich Schuchardt wrote:
> Replace printf() and debug() by log_err() and log_debug().
>
> "No reserved memory region found in source FDT\n" is not an error but a
> debug information.
>
> %s/can not/cannot/ - use the more common spelling.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> arch/riscv/lib/fdt_fixup.c | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
Reviewed-by: Leo Liang
> diff --git a/arch/riscv/lib/fdt_fixup.c b/arch/riscv/lib/fdt_fixup.c
> index 6db48ad04a..c1dc247cf7 100644
> --- a/arch/riscv/lib/fdt_fixup.c
> +++ b/arch/riscv/lib/fdt_fixup.c
> @@ -37,7 +37,7 @@ int riscv_fdt_copy_resv_mem_node(const void *src, void *dst)
>
> offset = fdt_path_offset(src, "/reserved-memory");
> if (offset < 0) {
> - printf("No reserved memory region found in source FDT\n");
> + log_debug("No reserved memory region found in source FDT\n");
> return 0;
> }
>
> @@ -48,7 +48,7 @@ int riscv_fdt_copy_resv_mem_node(const void *src, void *dst)
> "reg", 0, ,
> false);
> if (addr == FDT_ADDR_T_NONE) {
> - debug("failed to read address/size for %s\n", name);
> + log_debug("failed to read address/size for %s\n", name);
> continue;
> }
> strncpy(basename, name, max_len);
> @@ -63,7 +63,7 @@ int riscv_fdt_copy_resv_mem_node(const void *src, void *dst)
> err = fdtdec_add_reserved_memory(dst, basename, _mem,
>);
> if (err < 0) {
> - printf("failed to add reserved memory: %d\n", err);
> + log_err("failed to add reserved memory: %d\n", err);
> return err;
> }
> if (!fdt_getprop(src, node, "no-map", NULL))
> @@ -109,7 +109,7 @@ int board_fix_fdt(void *fdt)
>
> err = riscv_board_reserved_mem_fixup(fdt);
> if (err < 0) {
> - printf("failed to fixup DT for reserved memory: %d\n", err);
> + log_err("failed to fixup DT for reserved memory: %d\n", err);
> return err;
> }
>
> @@ -127,14 +127,14 @@ int arch_fixup_fdt(void *blob)
> size = fdt_totalsize(blob);
> err = fdt_open_into(blob, blob, size + 32);
> if (err < 0) {
> - printf("Device Tree can't be expanded to accommodate new node");
> + log_err("Device Tree can't be expanded to accommodate new
> node");
> return err;
> }
> chosen_offset = fdt_path_offset(blob, "/chosen");
> if (chosen_offset < 0) {
> err = fdt_add_subnode(blob, 0, "chosen");
> if (err < 0) {
> - printf("chosen node can not be added\n");
> + log_err("chosen node cannot be added\n");
> return err;
> }
> }
> --
> 2.27.0
>
[PATCH 0/6] mmc_spi: mmc erase resolve
Earlier "mmc erase " command reorts Ok but not actually erase the contents of some SD cards. This series will resolve this issue. There is still 1 limitation for some SDHC mmc_spi cards: "mmc erase *blk#* cnt" can not erase only 1 block that means: => mmc erase 0x22 1 will not erase the contents of SD card. User has to erase multiple blocks at a time that means: => mmc erase 0x22 2 will erase the contents of SD card. This limitation is from micro SD card side, i found this limitation in Strontium micro SDHC - 4 GB (class 6). Pragnesh Patel (6): mmc: mmc_spi: correct the while condition mmc: mmc_spi: generate R1 response for different mmc SPI commands mmc: read ssr for SD spi mmc: mmc_spi: Read R2 response for send status command - CMD13 mmc: mmc_spi: Generate R1 response for erase block start and end address mmc_spi: generate R1b response for erase and stop transmission command drivers/mmc/mmc.c | 5 + drivers/mmc/mmc_spi.c | 52 --- 2 files changed, 49 insertions(+), 8 deletions(-) -- 2.17.1
[PATCH 3/6] mmc: read ssr for SD spi
The content of ssr is useful only for erase operations.
This saves erase time.
Signed-off-by: Pragnesh Patel
Reviewed-by: Bin Meng
---
drivers/mmc/mmc.c | 5 +
drivers/mmc/mmc_spi.c | 1 +
2 files changed, 6 insertions(+)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 620bb93064..6b193d6d70 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1746,6 +1746,11 @@ static int sd_select_mode_and_width(struct mmc *mmc,
uint card_caps)
mmc_set_bus_width(mmc, 1);
mmc_select_mode(mmc, MMC_LEGACY);
mmc_set_clock(mmc, mmc->tran_speed, MMC_CLK_ENABLE);
+#if CONFIG_IS_ENABLED(MMC_WRITE)
+ err = sd_read_ssr(mmc);
+ if (err)
+ pr_warn("unable to read ssr\n");
+#endif
return 0;
}
diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c
index ddfebb6ed6..18d36878ef 100644
--- a/drivers/mmc/mmc_spi.c
+++ b/drivers/mmc/mmc_spi.c
@@ -305,6 +305,7 @@ static int dm_mmc_spi_request(struct udevice *dev, struct
mmc_cmd *cmd,
case MMC_CMD_READ_MULTIPLE_BLOCK:
case MMC_CMD_WRITE_SINGLE_BLOCK:
case MMC_CMD_WRITE_MULTIPLE_BLOCK:
+ case MMC_CMD_APP_CMD:
resp =
resp_size = sizeof(resp8);
break;
--
2.17.1
[PATCH 2/6] mmc: mmc_spi: generate R1 response for different mmc SPI commands
R1 response is 1 byte long for mmc SPI commands as per the updated physical layer specification version 7.10. So correct the resp and resp_size for existing commands Signed-off-by: Pragnesh Patel --- drivers/mmc/mmc_spi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c index 86cc932151..ddfebb6ed6 100644 --- a/drivers/mmc/mmc_spi.c +++ b/drivers/mmc/mmc_spi.c @@ -305,6 +305,8 @@ static int dm_mmc_spi_request(struct udevice *dev, struct mmc_cmd *cmd, case MMC_CMD_READ_MULTIPLE_BLOCK: case MMC_CMD_WRITE_SINGLE_BLOCK: case MMC_CMD_WRITE_MULTIPLE_BLOCK: + resp = + resp_size = sizeof(resp8); break; default: resp = -- 2.17.1
[PATCH 6/6] mmc_spi: generate R1b response for erase and stop transmission command
As per the SD physical layer specification version 7.10, erase
command (CMD38) and stop transmission command (CMD12) will generate
R1b response.
R1b = R1 + busy signal
A non-zero value after the R1 response indicates card is ready for
next command.
Signed-off-by: Pragnesh Patel
---
drivers/mmc/mmc_spi.c | 32
1 file changed, 28 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c
index 96a41076dc..50fcd32674 100644
--- a/drivers/mmc/mmc_spi.c
+++ b/drivers/mmc/mmc_spi.c
@@ -59,6 +59,7 @@
#define CMD_TIMEOUT8
#define READ_TIMEOUT 300 /* 1 sec */
#define WRITE_TIMEOUT 300 /* 1 sec */
+#define R1B_TIMEOUT300 /* 1 sec */
struct mmc_spi_plat {
struct mmc_config cfg;
@@ -72,7 +73,7 @@ struct mmc_spi_priv {
static int mmc_spi_sendcmd(struct udevice *dev,
ushort cmdidx, u32 cmdarg, u32 resp_type,
u8 *resp, u32 resp_size,
- bool resp_match, u8 resp_match_value)
+ bool resp_match, u8 resp_match_value, bool r1b)
{
int i, rpos = 0, ret = 0;
u8 cmdo[7], r;
@@ -133,6 +134,24 @@ static int mmc_spi_sendcmd(struct udevice *dev,
resp[i] = r;
}
+ if (r1b == true) {
+ i = R1B_TIMEOUT;
+ while (i) {
+ ret = dm_spi_xfer(dev, 1 * 8, NULL, , 0);
+ if (ret)
+ return ret;
+
+ debug(" resp%d=0x%x", rpos, r);
+ rpos++;
+ i--;
+
+ if (r)
+ break;
+ }
+ if (!i)
+ return -ETIMEDOUT;
+ }
+
debug("\n");
return 0;
@@ -265,7 +284,7 @@ static int dm_mmc_spi_request(struct udevice *dev, struct
mmc_cmd *cmd,
int i, multi, ret = 0;
u8 *resp = NULL;
u32 resp_size = 0;
- bool resp_match = false;
+ bool resp_match = false, r1b = false;
u8 resp8 = 0, resp16[2] = { 0 }, resp40[5] = { 0 }, resp_match_value =
0;
dm_spi_claim_bus(dev);
@@ -296,12 +315,17 @@ static int dm_mmc_spi_request(struct udevice *dev, struct
mmc_cmd *cmd,
break;
case MMC_CMD_SET_BLOCKLEN:
case MMC_CMD_SPI_CRC_ON_OFF:
- case MMC_CMD_STOP_TRANSMISSION:
resp =
resp_size = sizeof(resp8);
resp_match = true;
resp_match_value = 0x0;
break;
+ case MMC_CMD_STOP_TRANSMISSION:
+ case MMC_CMD_ERASE:
+ resp =
+ resp_size = sizeof(resp8);
+ r1b = true;
+ break;
case MMC_CMD_SEND_CSD:
case MMC_CMD_SEND_CID:
case MMC_CMD_READ_SINGLE_BLOCK:
@@ -323,7 +347,7 @@ static int dm_mmc_spi_request(struct udevice *dev, struct
mmc_cmd *cmd,
};
ret = mmc_spi_sendcmd(dev, cmd->cmdidx, cmd->cmdarg, cmd->resp_type,
- resp, resp_size, resp_match, resp_match_value);
+ resp, resp_size, resp_match, resp_match_value,
r1b);
if (ret)
goto done;
--
2.17.1
[PATCH 5/6] mmc: mmc_spi: Generate R1 response for erase block start and end address
Erase block start address (CMD32) and erase block end address (CMD33) command will generate R1 response for mmc SPI mode. R1 response is 1 byte long for mmc SPI, so assign 1 byte as a response for this commands. Signed-off-by: Pragnesh Patel --- drivers/mmc/mmc_spi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c index ee56de36ec..96a41076dc 100644 --- a/drivers/mmc/mmc_spi.c +++ b/drivers/mmc/mmc_spi.c @@ -309,6 +309,8 @@ static int dm_mmc_spi_request(struct udevice *dev, struct mmc_cmd *cmd, case MMC_CMD_WRITE_SINGLE_BLOCK: case MMC_CMD_WRITE_MULTIPLE_BLOCK: case MMC_CMD_APP_CMD: + case SD_CMD_ERASE_WR_BLK_START: + case SD_CMD_ERASE_WR_BLK_END: resp = resp_size = sizeof(resp8); break; -- 2.17.1
Re: [PATCH v3 2/6] sifive: fu540: Add Booting from SPI
Hi Jagan
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: Monday, June 22, 2020 9:53 PM
> To: Jagan Teki
> Cc: Rick Jian-Zhi Chen(陳建志); Atish Patra; Palmer Dabbelt; Paul Walmsley; Anup
> Patel; Sagar Kadam; U-Boot Mailing List; linux-amarula
> Subject: Re: [PATCH v3 2/6] sifive: fu540: Add Booting from SPI
>
> On Fri, Jun 5, 2020 at 4:40 AM Jagan Teki wrote:
> >
> > Add booting from SPI for SiFive Unleashed board.
> >
> > Signed-off-by: Jagan Teki
> > ---
> > Changes for v3:
> > - updated based on master
> >
> > arch/riscv/cpu/fu540/Kconfig | 2 +
> > .../dts/hifive-unleashed-a00-u-boot.dtsi | 12 ++
> > configs/sifive_fu540_defconfig| 4 ++
> > doc/board/sifive/fu540.rst| 41 +++
> > 4 files changed, 59 insertions(+)
> >
> > diff --git a/arch/riscv/cpu/fu540/Kconfig
> > b/arch/riscv/cpu/fu540/Kconfig index e9302e87c0..7a813a9ac8 100644
> > --- a/arch/riscv/cpu/fu540/Kconfig
> > +++ b/arch/riscv/cpu/fu540/Kconfig
> > @@ -5,6 +5,8 @@
> > config SIFIVE_FU540
> > bool
> > select ARCH_EARLY_INIT_R
> > + imply BOARD
> > + imply BOARD_FU540
>
> These 2 are not needed in v3.
How is your opinion here ?
>
> > imply CPU
> > imply CPU_RISCV
> > imply RISCV_TIMER
> > diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> > b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> > index 303806454b..4b2b242deb 100644
> > --- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> > +++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> > @@ -12,6 +12,10 @@
> > spi2 =
> > };
> >
> > + config {
> > + u-boot,spl-payload-offset = <0x105000>; /* loader2 @1044KB
> > */
> > + };
> > +
> > hfclk {
> > u-boot,dm-spl;
> > };
> > @@ -22,6 +26,14 @@
> >
> > };
> >
> > + {
> > + u-boot,dm-spl;
> > +
> > + flash@0 {
> > + u-boot,dm-spl;
> > + };
> > +};
> > +
> > {
> > mmc@0 {
> > u-boot,dm-spl;
>
> Other than above,
> Reviewed-by: Bin Meng
> Tested-by: Bin Meng
Re: [PATCH v2 11/49] binman: Use super() instead of specifying parent type
On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote: > > It is easier and less error-prone to use super() when the parent type is > needed. Update binman to remove the type names. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > tools/binman/etype/_testing.py | 4 ++-- > tools/binman/etype/blob.py | 2 +- > tools/binman/etype/blob_dtb.py | 6 +++--- > tools/binman/etype/blob_named_by_arg.py | 2 +- > tools/binman/etype/cbfs.py | 14 +++--- > tools/binman/etype/cros_ec_rw.py | 3 +-- > tools/binman/etype/fdtmap.py | 2 +- > tools/binman/etype/files.py | 2 +- > tools/binman/etype/fill.py | 4 ++-- > tools/binman/etype/fmap.py | 2 +- > tools/binman/etype/gbb.py| 2 +- > tools/binman/etype/image_header.py | 4 ++-- > tools/binman/etype/intel_cmc.py | 2 +- > tools/binman/etype/intel_descriptor.py | 4 ++-- > tools/binman/etype/intel_fit.py | 4 ++-- > tools/binman/etype/intel_fit_ptr.py | 4 ++-- > tools/binman/etype/intel_fsp.py | 2 +- > tools/binman/etype/intel_fsp_m.py| 2 +- > tools/binman/etype/intel_fsp_s.py| 2 +- > tools/binman/etype/intel_fsp_t.py| 2 +- > tools/binman/etype/intel_ifwi.py | 4 ++-- > tools/binman/etype/intel_me.py | 2 +- > tools/binman/etype/intel_mrc.py | 2 +- > tools/binman/etype/intel_refcode.py | 2 +- > tools/binman/etype/intel_vbt.py | 2 +- > tools/binman/etype/intel_vga.py | 2 +- > tools/binman/etype/mkimage.py| 2 +- > .../etype/powerpc_mpc85xx_bootpg_resetvec.py | 2 +- > tools/binman/etype/section.py| 16 > tools/binman/etype/text.py | 2 +- > tools/binman/etype/u_boot.py | 2 +- > tools/binman/etype/u_boot_dtb.py | 2 +- > tools/binman/etype/u_boot_dtb_with_ucode.py | 4 ++-- > tools/binman/etype/u_boot_elf.py | 4 ++-- > tools/binman/etype/u_boot_img.py | 2 +- > tools/binman/etype/u_boot_nodtb.py | 2 +- > tools/binman/etype/u_boot_spl.py | 2 +- > tools/binman/etype/u_boot_spl_bss_pad.py | 2 +- > tools/binman/etype/u_boot_spl_dtb.py | 2 +- > tools/binman/etype/u_boot_spl_elf.py | 2 +- > tools/binman/etype/u_boot_spl_nodtb.py | 2 +- > tools/binman/etype/u_boot_spl_with_ucode_ptr.py | 2 +- > tools/binman/etype/u_boot_tpl.py | 2 +- > tools/binman/etype/u_boot_tpl_dtb.py | 2 +- > tools/binman/etype/u_boot_tpl_dtb_with_ucode.py | 2 +- > tools/binman/etype/u_boot_tpl_elf.py | 2 +- > tools/binman/etype/u_boot_tpl_with_ucode_ptr.py | 2 +- > tools/binman/etype/u_boot_ucode.py | 2 +- > tools/binman/etype/u_boot_with_ucode_ptr.py | 2 +- > tools/binman/etype/vblock.py | 2 +- > tools/binman/etype/x86_reset16.py| 2 +- > tools/binman/etype/x86_reset16_spl.py| 2 +- > tools/binman/etype/x86_reset16_tpl.py| 2 +- > tools/binman/etype/x86_start16.py| 2 +- > tools/binman/etype/x86_start16_spl.py| 2 +- > tools/binman/etype/x86_start16_tpl.py| 2 +- > tools/binman/image.py| 12 ++-- > 57 files changed, 86 insertions(+), 87 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 13/49] binman: Convert existing binary blobs to blob_ext
Hi Simon,
On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote:
>
> Many of the existing blobs rely on external binaries which may not be
> available. Move them over to use blob_ext to indicate this.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> tools/binman/etype/cros_ec_rw.py | 1 +
> tools/binman/etype/intel_cmc.py | 5 ++---
> tools/binman/etype/intel_descriptor.py| 4 ++--
> tools/binman/etype/intel_fit.py | 4 ++--
> tools/binman/etype/intel_fit_ptr.py | 4 ++--
> tools/binman/etype/intel_fsp.py | 5 ++---
> tools/binman/etype/intel_fsp_m.py | 5 ++---
> tools/binman/etype/intel_fsp_s.py | 5 ++---
> tools/binman/etype/intel_fsp_t.py | 5 ++---
> tools/binman/etype/intel_ifwi.py | 4 ++--
> tools/binman/etype/intel_me.py| 5 ++---
> tools/binman/etype/intel_mrc.py | 5 ++---
> tools/binman/etype/intel_refcode.py | 5 ++---
> tools/binman/etype/intel_vbt.py | 5 ++---
> tools/binman/etype/intel_vga.py | 5 ++---
> tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py | 1 -
> 16 files changed, 29 insertions(+), 39 deletions(-)
>
> diff --git a/tools/binman/etype/cros_ec_rw.py
> b/tools/binman/etype/cros_ec_rw.py
> index 7ad62d0265..741372e1af 100644
> --- a/tools/binman/etype/cros_ec_rw.py
> +++ b/tools/binman/etype/cros_ec_rw.py
> @@ -19,3 +19,4 @@ class Entry_cros_ec_rw(Entry_blob_named_by_arg):
> """
> def __init__(self, section, etype, node):
> super().__init__(section, etype, node, 'cros-ec-rw')
> +self.external = True
Can this class be inherited from blob_ext?
> diff --git a/tools/binman/etype/intel_cmc.py b/tools/binman/etype/intel_cmc.py
> index 9ab471e7b6..644fa421d3 100644
> --- a/tools/binman/etype/intel_cmc.py
> +++ b/tools/binman/etype/intel_cmc.py
> @@ -5,10 +5,9 @@
> # Entry-type module for Intel Chip Microcode binary blob
> #
>
> -from binman.entry import Entry
> -from binman.etype.blob import Entry_blob
> +from binman.etype.blob_ext import Entry_blob_ext
>
> -class Entry_intel_cmc(Entry_blob):
> +class Entry_intel_cmc(Entry_blob_ext):
> """Entry containing an Intel Chipset Micro Code (CMC) file
>
> Properties / Entry arguments:
> diff --git a/tools/binman/etype/intel_descriptor.py
> b/tools/binman/etype/intel_descriptor.py
> index 6afc42ece5..5b18893ccd 100644
> --- a/tools/binman/etype/intel_descriptor.py
> +++ b/tools/binman/etype/intel_descriptor.py
> @@ -8,7 +8,7 @@
> import struct
>
> from binman.entry import Entry
> -from binman.etype.blob import Entry_blob
> +from binman.etype.blob_ext import Entry_blob_ext
>
> FD_SIGNATURE = struct.pack(' MAX_REGIONS= 5
> @@ -25,7 +25,7 @@ class Region:
> self.limit = ((val & 0x0fff) >> 4) | 0xfff
> self.size = self.limit - self.base + 1
>
> -class Entry_intel_descriptor(Entry_blob):
> +class Entry_intel_descriptor(Entry_blob_ext):
> """Intel flash descriptor block (4KB)
>
> Properties / Entry arguments:
> diff --git a/tools/binman/etype/intel_fit.py b/tools/binman/etype/intel_fit.py
> index ad6c1caa85..f1a10c55a6 100644
> --- a/tools/binman/etype/intel_fit.py
> +++ b/tools/binman/etype/intel_fit.py
> @@ -7,9 +7,9 @@
>
> import struct
>
> -from binman.etype.blob import Entry_blob
> +from binman.etype.blob_ext import Entry_blob_ext
>
> -class Entry_intel_fit(Entry_blob):
> +class Entry_intel_fit(Entry_blob_ext):
> """Intel Firmware Image Table (FIT)
>
> This entry contains a dummy FIT as required by recent Intel CPUs. The FIT
> diff --git a/tools/binman/etype/intel_fit_ptr.py
> b/tools/binman/etype/intel_fit_ptr.py
> index a06d12e740..01f082281c 100644
> --- a/tools/binman/etype/intel_fit_ptr.py
> +++ b/tools/binman/etype/intel_fit_ptr.py
> @@ -7,9 +7,9 @@
>
> import struct
>
> -from binman.etype.blob import Entry_blob
> +from binman.etype.blob_ext import Entry_blob_ext
>
> -class Entry_intel_fit_ptr(Entry_blob):
> +class Entry_intel_fit_ptr(Entry_blob_ext):
> """Intel Firmware Image Table (FIT) pointer
>
> This entry contains a pointer to the FIT. It is required to be at address
> diff --git a/tools/binman/etype/intel_fsp.py b/tools/binman/etype/intel_fsp.py
> index a1c89adcea..2ac012bce1 100644
> --- a/tools/binman/etype/intel_fsp.py
> +++ b/tools/binman/etype/intel_fsp.py
> @@ -5,10 +5,9 @@
> # Entry-type module for Intel Firmware Support Package binary blob
> #
>
> -from binman.entry import Entry
> -from binman.etype.blob import Entry_blob
> +from binman.etype.blob_ext import Entry_blob_ext
>
> -class Entry_intel_fsp(Entry_blob):
> +class Entry_intel_fsp(Entry_blob_ext):
> """Entry containing an Intel Firmware Support Package (FSP) file
>
> Properties / Entry arguments:
> diff --git
Re: [PATCH v2 16/49] binman: Detect when valid images are not produced
Hi Simon,
On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote:
>
> When external blobs are missing, show a message indicating that the images
> are not functional.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> tools/binman/control.py | 16 +++--
> tools/binman/entry.py | 21 +
> tools/binman/etype/blob_ext.py| 1 +
> tools/binman/etype/section.py | 16 -
> tools/binman/ftest.py | 14 ++-
> .../binman/test/159_blob_ext_missing_sect.dts | 23 +++
> tools/patman/tout.py | 1 +
> 7 files changed, 88 insertions(+), 4 deletions(-)
> create mode 100644 tools/binman/test/159_blob_ext_missing_sect.dts
>
> diff --git a/tools/binman/control.py b/tools/binman/control.py
> index 8c6eae83f1..343b0a0c35 100644
> --- a/tools/binman/control.py
> +++ b/tools/binman/control.py
> @@ -403,6 +403,9 @@ def ProcessImage(image, update_fdt, write_map,
> get_contents=True,
> allow_resize: True to allow entries to change size (this does a
> re-pack
> of the entries), False to raise an exception
> allow_missing: Allow blob_ext objects to be missing
> +
> +Returns:
> +True if one or more external blobs are missing, False if all are
> present
> """
> if get_contents:
> image.SetAllowMissing(allow_missing)
> @@ -450,6 +453,12 @@ def ProcessImage(image, update_fdt, write_map,
> get_contents=True,
> image.BuildImage()
> if write_map:
> image.WriteMap()
> +missing_list = []
> +image.CheckMissing(missing_list)
> +if missing_list:
> +tout.Warning("Image '%s' is missing external blobs and is
> non-functional: %s" %
> + (image.name, ' '.join([e.name for e in missing_list])))
> +return bool(missing_list)
>
>
> def Binman(args):
> @@ -524,14 +533,17 @@ def Binman(args):
>
> images = PrepareImagesAndDtbs(dtb_fname, args.image,
>args.update_fdt)
> +missing = False
> for image in images.values():
> -ProcessImage(image, args.update_fdt, args.map,
> - allow_missing=args.allow_missing)
> +missing |= ProcessImage(image, args.update_fdt, args.map,
> +allow_missing=args.allow_missing)
>
> # Write the updated FDTs to our output files
> for dtb_item in state.GetAllFdts():
> tools.WriteFile(dtb_item._fname, dtb_item.GetContents())
>
> +if missing:
> +tout.Warning("Some images are invalid")
> finally:
> tools.FinaliseOutputDir()
> finally:
> diff --git a/tools/binman/entry.py b/tools/binman/entry.py
> index 90ffd27617..4a42e0bf34 100644
> --- a/tools/binman/entry.py
> +++ b/tools/binman/entry.py
> @@ -84,6 +84,7 @@ class Entry(object):
> self.image_pos = None
> self._expand_size = False
> self.compress = 'none'
> +self.missing = False
>
> @staticmethod
> def Lookup(node_path, etype):
> @@ -794,3 +795,23 @@ features to produce new behaviours.
> elif self == entries[-1]:
> return 'end'
> return 'middle'
> +
> +def SetAllowMissing(self, allow_missing):
> +"""Set whether a section allows missing external blobs
> +
> +Args:
> +allow_missing: True if allowed, False if not allowed
> +"""
> +# This is meaningless for
for what?
> +self._allow_missing = allow_missing
> +
Should the above changes be in patch "[v2,14/49] binman: Allow
external binaries to be missing" ?
> +def CheckMissing(self, missing_list):
> +"""Check if any entries in this section have missing external blobs
> +
> +If there are missing blobs, the entries are added to the list
> +
> +Args:
> +missing_list: List of Entry objects to be added to
> +"""
> +if self.missing:
> +missing_list.append(self)
> diff --git a/tools/binman/etype/blob_ext.py b/tools/binman/etype/blob_ext.py
> index 51779c88c9..8d641001a9 100644
> --- a/tools/binman/etype/blob_ext.py
> +++ b/tools/binman/etype/blob_ext.py
> @@ -34,5 +34,6 @@ class Entry_blob_ext(Entry_blob):
> # Allow the file to be missing
> if not self._pathname:
> self.SetContents(b'')
> +self.missing = True
> return True
> return super().ObtainContents()
> diff --git a/tools/binman/etype/section.py b/tools/binman/etype/section.py
> index 44b13b2575..3b42a5890f 100644
> --- a/tools/binman/etype/section.py
> +++ b/tools/binman/etype/section.py
> @@ -50,6 +50,7 @@ class Entry_section(Entry):
> self._skip_at_start = None
> self._end_4gb = False
>
Re: [PATCH v2 19/49] mkimage: Allow updating the FIT timestamp
On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote: > > Normally the FIT timestamp is created the first time mkimage is run on a > FIT, when converting the source .its to the binary .fit file. This > corresponds to using the -f flag. But if the original input to mkimage is > a binary file (already compiled) then the timestamp is assumed to have > been set previously. > > Add a -t flag to allow setting the timestamp in this case. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > doc/mkimage.1 | 9 + > tools/fit_image.c | 2 +- > tools/imagetool.h | 1 + > tools/mkimage.c | 5 - > 4 files changed, 15 insertions(+), 2 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 18/49] binman: Allow zero-length entries to overlap
On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote: > > Some binary blobs unfortunately obtain their position in the image from > other binary blobs, such as Intel's 'descriptor'. In this case we cannot > rely on packing to work. It is not possible to produce a valid image in > any case, due to the missing blobs. > > Allow zero-length overlaps so that this does not cause any problems. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > tools/binman/etype/section.py | 2 +- > tools/binman/ftest.py | 4 > tools/binman/test/160_pack_overlap_zero.dts | 18 ++ > 3 files changed, 23 insertions(+), 1 deletion(-) > create mode 100644 tools/binman/test/160_pack_overlap_zero.dts > Reviewed-by: Bin Meng
Re: [PATCH v2 14/49] binman: Allow external binaries to be missing
On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote: > > Sometimes it is useful to build an image even though external binaries are > not present. This allows the build system to continue to function without > these files, albeit not producing valid images. > > U-Boot does with with ATF (ARM Trusted Firmware) today. > > Add a new flag to binman to request this behaviour. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > tools/binman/README.entries| 3 +++ > tools/binman/cmdline.py| 2 ++ > tools/binman/control.py| 7 +-- > tools/binman/etype/blob_ext.py | 13 ++--- > tools/binman/etype/section.py | 17 + > tools/binman/ftest.py | 8 +++- > tools/patman/tools.py | 8 ++-- > 7 files changed, 50 insertions(+), 8 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 17/49] binman: Allow missing Intel blobs
On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote: > > Update the Intel blob entries to support missing binaries. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > tools/binman/etype/intel_descriptor.py | 7 - > tools/binman/etype/intel_ifwi.py | 17 --- > tools/binman/etype/section.py | 4 +-- > tools/binman/ftest.py | 41 +- > 4 files changed, 55 insertions(+), 14 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 15/49] patman: Update errors and warnings to use stderr
On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote: > > When warnings and errors are produced by tools they should be written to > stderr. Update the tout implementation to handle this. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > tools/binman/ftest.py | 2 +- > tools/patman/tout.py | 5 - > 2 files changed, 5 insertions(+), 2 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 12/49] binman: Add an etype for external binary blobs
On Sun, Jun 14, 2020 at 10:57 AM Simon Glass wrote: > > It is useful to be able to distinguish between ordinary blobs such as > u-boot.bin and external blobs that cannot be build by the U-Boot build > system. If the external blobs are not available for some reason, then we > know that a value image cannot be built. > > Introduce a new 'blob-ext' entry type for that. > > Signed-off-by: Simon Glass > --- > > (no changes since v1) > > tools/binman/README.entries| 10 +++ > tools/binman/etype/blob_ext.py | 31 ++ > tools/binman/ftest.py | 12 + > tools/binman/test/157_blob_ext.dts | 14 ++ > tools/binman/test/158_blob_ext_missing.dts | 16 +++ > 5 files changed, 83 insertions(+) > create mode 100644 tools/binman/etype/blob_ext.py > create mode 100644 tools/binman/test/157_blob_ext.dts > create mode 100644 tools/binman/test/158_blob_ext_missing.dts > Reviewed-by: Bin Meng
Re: [PATCH v1 2/4] video: stm32: stm32_dsi: copy DSI fields
On Wed, 24 Jun 2020 10:45:40 +0200 Yannick Fertre yannick.fer...@st.com wrote: > Copy the DSI data link characteristics from panel > platform data to mipi DSI device. > > Signed-off-by: Yannick Fertre > --- > drivers/video/stm32/stm32_dsi.c | 3 +++ > 1 file changed, 3 insertions(+) Applied to u-boot-video/master, thanks! -- Anatolij
Re: [PATCH v1 1/4] video: mipi update panel platform data
On Wed, 24 Jun 2020 10:45:39 +0200 Yannick Fertre yannick.fer...@st.com wrote: > Add new fields "lanes, format & mode_flags" to structure > mipi_dsi_panel_plat. > > Signed-off-by: Yannick Fertre > --- > include/mipi_dsi.h | 6 ++ > 1 file changed, 6 insertions(+) Applied to u-boot-video/master, thanks! -- Anatolij
Re: [PATCH v1 4/4] video: orisetech_otm8009a: fill characteristics of DSI data link
On Wed, 24 Jun 2020 10:45:42 +0200 Yannick Fertre yannick.fer...@st.com wrote: > Fill characteristics of DSI data link to platform data instead of > mipi device to avoid memory corruption. > > Signed-off-by: Yannick Fertre > --- > drivers/video/orisetech_otm8009a.c | 20 +--- > 1 file changed, 5 insertions(+), 15 deletions(-) Applied to u-boot-video/master, thanks! -- Anatolij
Re: [PATCH] video: check hardware version of DSI
On Wed, 24 Jun 2020 10:43:59 +0200 Yannick Fertre yannick.fer...@st.com wrote: > Check the hardware version of DSI. Versions 1.30 & 1.31 are only > supported. > > Signed-off-by: Yannick Fertre > --- > drivers/video/stm32/stm32_dsi.c | 10 +- > 1 file changed, 9 insertions(+), 1 deletion(-) Applied to u-boot-video/master, thanks! -- Anatolij
RE: [PATCH 2/7] usb: ehci-mx6: Add i.MX8 OTG controller support
> Subject: Re: [PATCH 2/7] usb: ehci-mx6: Add i.MX8 OTG controller support
>
> On 6/29/20 4:13 AM, Peng Fan wrote:
>
> Hi,
>
> > The i.MX8 has two USB controllers: USBOH and USB3. The USBOH reuses
> > previous i.MX6/7. It has same PHY IP as i.MX7ULP but NC registers are
> > same as i.MX7D. So add its support in ehci-mx6 driver.
> >
> > Also the driver is updated to remove build warning for 64 bits CPU.
>
> Please split the fixes into separate patch.
Sorry for not be clear, but the driver was only built for ARM32 i.MX.
It is after we start supporting i.MX8, there are some warnings, which
was introduced by adding i.MX8 support. It should stay in same patch.
>
> > --- a/drivers/usb/host/ehci-mx6.c
> > +++ b/drivers/usb/host/ehci-mx6.c
> > @@ -62,12 +62,20 @@ DECLARE_GLOBAL_DATA_PTR;
> > #define UCTRL_OVER_CUR_POL (1 << 8) /* OTG Polarity of Overcurrent
> */
> > #define UCTRL_OVER_CUR_DIS (1 << 7) /* Disable OTG Overcurrent
> Detection */
> >
> > +#define PLL_USB_EN_USB_CLKS_MASK (0x01 << 6)
> > +#define PLL_USB_PWR_MASK (0x01 << 12)
> > +#define PLL_USB_ENABLE_MASK(0x01 << 13)
> > +#define PLL_USB_BYPASS_MASK(0x01 << 16)
> > +#define PLL_USB_REG_ENABLE_MASK(0x01 << 21)
> > +#define PLL_USB_DIV_SEL_MASK (0x07 << 22)
> > +#define PLL_USB_LOCK_MASK (0x01 << 31)
>
> Use BIT() macro
Yes.
>
> > /* USBCMD */
> > #define UCMD_RUN_STOP (1 << 0) /* controller run/stop */
> > #define UCMD_RESET (1 << 1) /* controller reset */
> >
> > -#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) -static const
> > unsigned phy_bases[] = {
> > +#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) ||
> > +defined(CONFIG_IMX8) static const ulong phy_bases[] = {
> > USB_PHY0_BASE_ADDR,
> > #if defined(USB_PHY1_BASE_ADDR)
> > USB_PHY1_BASE_ADDR,
> > @@ -101,6 +109,53 @@ static void usb_power_config(int index)
> >
> > scg_enable_usb_pll(true);
> >
> > +#elif defined(CONFIG_IMX8)
>
> This function should be split into multiple, it's too long, make it a per-SoC
> function.
Ok.
>
> > + struct usbphy_regs __iomem *usbphy =
> > + (struct usbphy_regs __iomem *)USB_PHY0_BASE_ADDR;
> > + int timeout = 100;
> > +
> > + if (index > 0)
> > + return;
> > +
> > + writel(ANADIG_USB2_CHRG_DETECT_EN_B |
> > + ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B,
> > + >usb1_chrg_detect);
> > +
> > + if (!(readl(>usb1_pll_480_ctrl) & PLL_USB_LOCK_MASK)) {
> > +
> > + /* Enable the regulator first */
> > + writel(PLL_USB_REG_ENABLE_MASK,
> > + >usb1_pll_480_ctrl_set);
> > +
> > + /* Wait at least 25us */
> > + udelay(25);
> > +
> > + /* Enable the power */
> > + writel(PLL_USB_PWR_MASK, >usb1_pll_480_ctrl_set);
> > +
> > + /* Wait lock */
> > + while (timeout--) {
> > + if (readl(>usb1_pll_480_ctrl) &
> > + PLL_USB_LOCK_MASK)
> > + break;
> > + udelay(10);
> > + }
>
> Use wait_for_bit*() here.
ok.
>
> [...]
>
> > static void usb_power_config(int index) {
> > - struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR +
> > + struct usbnc_regs *usbnc = (struct usbnc_regs
> > +*)(ulong)(USB_BASE_ADDR +
>
> Is the extra type cast really needed ? If so, then it should be uintptr_t so
> it
> would work with 64bit addresses.
Will use uintptr_t. there is warning if not.
"warning: cast to pointer from integer of different size
[-Wint-to-pointer-cast]"
Thanks,
Peng.
>
> [...]
[PATCH] board: st: move type-c stusb1600 controller code in a driver
Migrate the ST Microelectronics STUSB160X Type-C controller code in
a generic I2C driver in st/common, based on Linux one in :
drivers/usb/typec/stusb160x.c
This patch simplifies the stm32mp1 board code and allows to reuse
this STUSB160X driver in other boards.
Signed-off-by: Patrick Delaunay
---
board/st/common/Kconfig | 7
board/st/common/Makefile| 2 +
board/st/common/stusb160x.c | 46 +++
board/st/common/stusb160x.h | 10 +
board/st/stm32mp1/stm32mp1.c| 58 +++--
configs/stm32mp15_basic_defconfig | 1 +
configs/stm32mp15_trusted_defconfig | 1 +
7 files changed, 73 insertions(+), 52 deletions(-)
create mode 100644 board/st/common/stusb160x.c
create mode 100644 board/st/common/stusb160x.h
diff --git a/board/st/common/Kconfig b/board/st/common/Kconfig
index 015ba40939..5280d0f9ed 100644
--- a/board/st/common/Kconfig
+++ b/board/st/common/Kconfig
@@ -69,3 +69,10 @@ config DFU_ALT_RAM0
depends on ARCH_STM32MP && SET_DFU_ALT_INFO
help
This defines the partitions of ram used to build dfu dynamically.
+
+config TYPEC_STUSB160X
+ tristate "STMicroelectronics STUSB160X Type-C controller driver"
+ depends on DM_I2C
+ help
+ Say Y if your system has STMicroelectronics STUSB160X Type-C port
+ controller.
diff --git a/board/st/common/Makefile b/board/st/common/Makefile
index aa030bacd8..1a5280e139 100644
--- a/board/st/common/Makefile
+++ b/board/st/common/Makefile
@@ -9,3 +9,5 @@ ifeq ($(CONFIG_ARCH_STM32MP),y)
obj-$(CONFIG_SYS_MTDPARTS_RUNTIME) += stm32mp_mtdparts.o
obj-$(CONFIG_SET_DFU_ALT_INFO) += stm32mp_dfu.o
endif
+
+obj-$(CONFIG_TYPEC_STUSB160X) += stusb160x.o
diff --git a/board/st/common/stusb160x.c b/board/st/common/stusb160x.c
new file mode 100644
index 00..f1197f9faa
--- /dev/null
+++ b/board/st/common/stusb160x.c
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * STMicroelectronics STUSB Type-C controller driver
+ * based on Linux drivers/usb/typec/stusb160x.c
+ *
+ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
+ */
+
+#include
+#include
+#include
+
+/* REGISTER */
+#define STUSB160X_CC_CONNECTION_STATUS 0x0E
+
+/* STUSB160X_CC_CONNECTION_STATUS bitfields */
+#define STUSB160X_CC_ATTACHBIT(0)
+
+int stusb160x_cable_connected(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get_device_by_driver(UCLASS_I2C_GENERIC,
+ DM_GET_DRIVER(stusb160x),
+ );
+ if (ret < 0)
+ return ret;
+
+ ret = dm_i2c_reg_read(dev, STUSB160X_CC_CONNECTION_STATUS);
+ if (ret < 0)
+ return 0;
+
+ return ret & STUSB160X_CC_ATTACH;
+}
+
+static const struct udevice_id stusb160x_ids[] = {
+ { .compatible = "st,stusb1600" },
+ {}
+};
+
+U_BOOT_DRIVER(stusb160x) = {
+ .name = "stusb160x",
+ .id = UCLASS_I2C_GENERIC,
+ .of_match = stusb160x_ids,
+};
diff --git a/board/st/common/stusb160x.h b/board/st/common/stusb160x.h
new file mode 100644
index 00..fe39840b41
--- /dev/null
+++ b/board/st/common/stusb160x.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2020, STMicroelectronics
+ */
+
+#ifdef CONFIG_TYPEC_STUSB160X
+int stusb160x_cable_connected(void);
+#else
+int stusb160x_cable_connected(void) { return -ENODEV; }
+#endif
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 4553329b25..a257375807 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -41,6 +41,8 @@
#include
#include
+#include "../../st/common/stusb160x.h"
+
/* SYSCFG registers */
#define SYSCFG_BOOTR 0x00
#define SYSCFG_PMCSETR 0x04
@@ -175,64 +177,16 @@ static void board_key_check(void)
}
#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-
-/* STMicroelectronics STUSB1600 Type-C controller */
-#define STUSB1600_CC_CONNECTION_STATUS 0x0E
-
-/* STUSB1600_CC_CONNECTION_STATUS bitfields */
-#define STUSB1600_CC_ATTACHBIT(0)
-
-static int stusb1600_init(struct udevice **dev_stusb1600)
-{
- ofnode node;
- struct udevice *dev, *bus;
- int ret;
- u32 chip_addr;
-
- *dev_stusb1600 = NULL;
-
- /* if node stusb1600 is present, means DK1 or DK2 board */
- node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
- if (!ofnode_valid(node))
- return -ENODEV;
-
- ret = ofnode_read_u32(node, "reg", _addr);
- if (ret)
- return -EINVAL;
-
- ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
- );
- if (ret) {
- printf("bus for stusb1600 not found\n");
- return -ENODEV;
- }
-
-
Re: [EXT] [PATCH 1/1] power: pmic_pca9450: fix PCA9450A I2C address
On Mon, 2020-06-29 at 10:42 +0200, Sébastien Szymanski wrote: > Caution: EXT Email > > PCA9450A I2C address is 0x25. Fix it. > > Signed-off-by: Sébastien Szymanski > --- > drivers/power/pmic/pmic_pca9450.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/power/pmic/pmic_pca9450.c > b/drivers/power/pmic/pmic_pca9450.c > index 67a9090200..c0fb78c4cd 100644 > --- a/drivers/power/pmic/pmic_pca9450.c > +++ b/drivers/power/pmic/pmic_pca9450.c > @@ -23,7 +23,7 @@ int power_pca9450a_init(unsigned char bus) > p->name = pca9450_name; > p->interface = PMIC_I2C; > p->number_of_regs = PCA9450_REG_NUM; > - p->hw.i2c.addr = 0x35; > + p->hw.i2c.addr = 0x25; The address 0x35 is correct for PCA9540A. You are probably using PCA9540B/C which address is 0x25. If so, please call power_pca9450b_init. Best regards, Ye Li > p->hw.i2c.tx_num = 1; > p->bus = bus; > > -- > 2.26.2 >
[PATCH 4/6] mmc: mmc_spi: Read R2 response for send status command - CMD13
Send status command (CMD13) will send R1 response under SD mode
but R2 response under SPI mode.
R2 response is 2 bytes long, so read 2 bytes for mmc SPI mode
Signed-off-by: Pragnesh Patel
---
drivers/mmc/mmc_spi.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c
index 18d36878ef..ee56de36ec 100644
--- a/drivers/mmc/mmc_spi.c
+++ b/drivers/mmc/mmc_spi.c
@@ -266,7 +266,7 @@ static int dm_mmc_spi_request(struct udevice *dev, struct
mmc_cmd *cmd,
u8 *resp = NULL;
u32 resp_size = 0;
bool resp_match = false;
- u8 resp8 = 0, resp40[5] = { 0 }, resp_match_value = 0;
+ u8 resp8 = 0, resp16[2] = { 0 }, resp40[5] = { 0 }, resp_match_value =
0;
dm_spi_claim_bus(dev);
@@ -291,6 +291,9 @@ static int dm_mmc_spi_request(struct udevice *dev, struct
mmc_cmd *cmd,
resp_size = sizeof(resp40);
break;
case MMC_CMD_SEND_STATUS:
+ resp = (u8 *)[0];
+ resp_size = sizeof(resp16);
+ break;
case MMC_CMD_SET_BLOCKLEN:
case MMC_CMD_SPI_CRC_ON_OFF:
case MMC_CMD_STOP_TRANSMISSION:
@@ -335,8 +338,10 @@ static int dm_mmc_spi_request(struct udevice *dev, struct
mmc_cmd *cmd,
cmd->response[0] |= (uint)resp40[1] << 24;
break;
case MMC_CMD_SEND_STATUS:
- cmd->response[0] = (resp8 & 0xff) ?
- MMC_STATUS_ERROR : MMC_STATUS_RDY_FOR_DATA;
+ if (resp16[0] || resp16[1])
+ cmd->response[0] = MMC_STATUS_ERROR;
+ else
+ cmd->response[0] = MMC_STATUS_RDY_FOR_DATA;
break;
case MMC_CMD_SEND_CID:
case MMC_CMD_SEND_CSD:
--
2.17.1
[PATCH] fastboot: Support defining raw partitions without a partition table
Add support for defining raw fastboot partitions in eMMC by specifying
the offset and size in an environment variable. Optionally, the eMMC
hardware partition number may also be specified.
This makes it possible to e.g. update only part of the eMMC boot
partition, instead of having to write the entire partition.
Signed-off-by: Filip Brozovic
---
doc/android/fastboot.rst | 19 ++
drivers/fastboot/fb_mmc.c | 75 ++-
2 files changed, 85 insertions(+), 9 deletions(-)
diff --git a/doc/android/fastboot.rst b/doc/android/fastboot.rst
index de3f6c37d7..2877c3cbaa 100644
--- a/doc/android/fastboot.rst
+++ b/doc/android/fastboot.rst
@@ -85,6 +85,25 @@ for example::
fastboot_partition_alias_boot=LNX
+Raw partition descriptors
+^
+
+In cases where no partition table is present, a raw partition descriptor can be
+defined, specifying the offset, size, and optionally the MMC hardware partition
+number for a given partition name.
+
+This is useful when using fastboot to flash files (e.g. SPL or U-Boot) to a
+specific offset in the eMMC boot partition, without having to update the entire
+boot partition.
+
+To define a raw partition descriptor, add an environment variable similar to::
+
+fastboot_raw_partition_= [mmcpart ]
+
+for example::
+
+fastboot_raw_partition_boot=0x100 0x1f00 mmcpart 1
+
Variable overrides
^^
diff --git a/drivers/fastboot/fb_mmc.c b/drivers/fastboot/fb_mmc.c
index b2f8932e1c..ae8e8e512f 100644
--- a/drivers/fastboot/fb_mmc.c
+++ b/drivers/fastboot/fb_mmc.c
@@ -50,6 +50,48 @@ static int part_get_info_by_name_or_alias(struct blk_desc
*dev_desc,
return ret;
}
+static int raw_part_get_info_by_name(struct blk_desc *dev_desc,
+ const char *name, struct disk_partition *info, int *mmcpart)
+{
+ /* strlen("fastboot_raw_partition_") + PART_NAME_LEN + 1 */
+ char env_desc_name[23 + PART_NAME_LEN + 1];
+ char *raw_part_desc;
+ const char *argv[2];
+ const char **parg = argv;
+
+ /* check for raw partition descriptor */
+ strcpy(env_desc_name, "fastboot_raw_partition_");
+ strncat(env_desc_name, name, PART_NAME_LEN);
+ raw_part_desc = strdup(env_get(env_desc_name));
+ if (raw_part_desc == NULL)
+ return -ENODEV;
+
+ /*
+* parse partition descriptor
+*
+* [mmcpart ]
+*/
+ for (; parg < argv + sizeof(argv) / sizeof(*argv); ++parg) {
+ *parg = strsep(_part_desc, " ");
+ if (*parg == NULL) {
+ pr_err("Invalid number of arguments.\n");
+ return -ENODEV;
+ }
+ }
+
+ info->start = simple_strtoul(argv[0], NULL, 0);
+ info->size = simple_strtoul(argv[1], NULL, 0);
+ info->blksz = dev_desc->blksz;
+ strncpy((char *)info->name, name, PART_NAME_LEN);
+
+ if (raw_part_desc) {
+ if (strcmp(strsep(_part_desc, " "), "mmcpart") == 0)
+ *mmcpart = simple_strtoul(raw_part_desc, NULL, 0);
+ }
+
+ return 0;
+}
+
/**
* fb_mmc_blk_write() - Write/erase MMC in chunks of FASTBOOT_MAX_BLK_WRITE
*
@@ -376,7 +418,8 @@ int fastboot_mmc_get_part_info(const char *part_name,
struct blk_desc **dev_desc,
struct disk_partition *part_info, char *response)
{
- int r;
+ int r = 0;
+ int mmcpart;
*dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
if (!*dev_desc) {
@@ -388,10 +431,12 @@ int fastboot_mmc_get_part_info(const char *part_name,
return -ENOENT;
}
- r = part_get_info_by_name_or_alias(*dev_desc, part_name, part_info);
- if (r < 0) {
- fastboot_fail("partition not found", response);
- return r;
+ if (raw_part_get_info_by_name(*dev_desc, part_name, part_info,
) < 0) {
+ r = part_get_info_by_name_or_alias(*dev_desc, part_name,
part_info);
+ if (r < 0) {
+ fastboot_fail("partition not found", response);
+ return r;
+ }
}
return r;
@@ -410,6 +455,7 @@ void fastboot_mmc_flash_write(const char *cmd, void
*download_buffer,
{
struct blk_desc *dev_desc;
struct disk_partition info;
+ int mmcpart = 0;
dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
@@ -482,7 +528,13 @@ void fastboot_mmc_flash_write(const char *cmd, void
*download_buffer,
}
#endif
- if (part_get_info_by_name_or_alias(dev_desc, cmd, ) < 0) {
+ if (raw_part_get_info_by_name(dev_desc, cmd, , ) == 0) {
+ if (blk_dselect_hwpart(dev_desc, mmcpart)) {
+ pr_err("Failed to select hwpart\n");
+
