[PATCH v1 22/24] watchdog: Add reset support for OcteonTX / TX2

From: Suneel Garapati Adds support for Core 0 watchdog poke on OcteonTX and OcteonTX2 platforms. Signed-off-by: Suneel Garapati Signed-off-by: Stefan Roese --- Changes in v1: - Change patch subject - Remove inclusion of common.h - Remove global wdt_dev as its unused - Remove #ifdef's -

[PATCH v1 13/24] arm: octeontx: Add headers for OcteonTX

From: Suneel Garapati Signed-off-by: Suneel Garapati Signed-off-by: Stefan Roese --- Changes in v1: - Change patch subject arch/arm/include/asm/arch-octeontx/board.h| 123 ++ arch/arm/include/asm/arch-octeontx/clock.h| 25 + .../asm/arch-octeontx/csrs/csrs-mio_emm.h | 1193

[PATCH v1 19/24] mtd: nand: Add NAND controller driver for OcteonTX

From: Suneel Garapati Adds support for NAND controllers found on OcteonTX or OcteonTX2 SoC platforms. Also includes driver to support Hardware ECC using BCH HW engine found on these platforms. Signed-off-by: Aaron Williams Signed-off-by: Suneel Garapati Signed-off-by: Stefan Roese ---

[PATCH v1 23/24] arm: octeontx: Add support for OcteonTX SoC platforms

From: Suneel Garapati This patch adds support for all OcteonTX 81xx/83xx boards from Marvell. For 81xx boards, use octeontx_81xx_defconfig and for 83xx boards, use octeontx_83xx_defconfig. Signed-off-by: Suneel Garapati Signed-off-by: Stefan Roese --- Changes in v1: - Changed patch subject

[PATCH v1 16/24] pci: Add PCI controller driver for OcteonTX / TX2

From: Suneel Garapati Adds support for PCI ECAM/PEM controllers found on OcteonTX or OcteonTX2 SoC platforms. Signed-off-by: Suneel Garapati Cc: Simon Glass Cc: Bin Meng Signed-off-by: Stefan Roese --- Changes in v1: - Change patch subject - Remove inclusion of common.h - Remove #ifdef's

[PATCH v1 12/24] arm: include/asm/io.h: Add 64bit clrbits and setbits helpers

From: Suneel Garapati Add 64bit API for clrbits and setbits. Signed-off-by: Suneel Garapati Reviewed-by: Simon Glass Signed-off-by: Stefan Roese --- Changes in v1: - Change patch subject - Add small commit text - Also add clr/setbits_64 (without endianess extension), which is needed for

[PATCH v1 15/24] ata: ahci: Add BAR index quirk for Cavium PCI SATA device

From: Suneel Garapati For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0 instead of BAR5. Signed-off-by: Suneel Garapati Cc: Simon Glass Signed-off-by: Stefan Roese --- Changes in v1: - Change patch subject - Use constants from pci_ids.h instead of hardcoded values

[PATCH v1 11/24] pci: pci-uclass: Check validity of ofnode

From: Suneel Garapati Add check if the referenced ofnode is valid. Signed-off-by: Suneel Garapati Cc: Simon Glass Cc: Bin Meng Signed-off-by: Stefan Roese --- Changes in v1: - New patch drivers/pci/pci-uclass.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git

[PATCH v1 09/24] pci: pci-uclass: Add VF BAR map support for Enhanced Allocation

From: Suneel Garapati Makes dm_pci_map_bar API available to map BAR for Virtual function PCI devices which support Enhanced Allocation. Signed-off-by: Suneel Garapati Cc: Simon Glass Cc: Bin Meng Signed-off-by: Stefan Roese --- Changes in v1: - Change patch subject - Fixed multi-line

[PATCH v1 17/24] mmc: Remove static qualifier on mmc_power_init

From: Suneel Garapati For platforms with multiple slot support like OcteonTX, this is invoked per slot. Signed-off-by: Suneel Garapati Cc: Peng Fan Signed-off-by: Stefan Roese --- Changes in v1: - Change patch subject drivers/mmc/mmc.c | 2 +- include/mmc.h | 1 + 2 files changed, 2

Re: [PATCH 1/1] mtd: cfi_flash: read device tree correctly

Hi Heinrich > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Heinrich > Schuchardt > Sent: Tuesday, July 21, 2020 10:51 AM > To: Stefan Roese > Cc: Simon Glass; u-boot@lists.denx.de; Heinrich Schuchardt > Subject: [PATCH 1/1] mtd: cfi_flash: read device tree correctly > >

[PATCH] arm: stm32mp: move dbgmcu_init call when DT is ready

As the dbgmcu_init use the function bsec_dbgswenable which is based on the DM and DT, its call can't be done before the spl is initialized (driver model, DT and malloc) in board_init_f::spl_early_init(). This function call is moved later in spl_board_init(). Fixes: bd3f60d29c24 ("arm: stm32mp:

[PATCH] clk: versal: Move pm_query_id out of clock driver

There is no reason to have firmware specific structure in clock driver. Move it to generic location and also initialize enum values which is based on https://lore.kernel.org/linux-arm-kernel/20200318125003.ga2727...@kroah.com/ recommended way to go to make sure that values guaranteed by compiler.

[PATCH v4 16/17] blkcache: Extend blkcache_init to cover CONFIG_NEEDS_MANUAL_RELOC

Extend manual relocation of block_cache list pointers to all platforms that enable CONFIG_NEEDS_MANUAL_RELOC. Remove m68k-specific checks and provide a single implementation that adds gd->reloc_off to the pre-relocation pointers. Acked-by: Angelo Dureghello Tested-by: Angelo Dureghello

[PATCH v4 14/17] drivers: serial: Make serial_initialize return int

serial_initialize is called only during the common init sequence, after relocation (in common/board_r.c). Because it has a void return value, it has to wrapped in initr_serial. In order to be able to get rid of this indirection, make serial_initialize return int. Remove extern from prototype in

[PATCH v4 03/17] Kconfig: Convert CONFIG_SYS_SRAM_SIZE to Kconfig

This converts ad-hoc CONFIG_SYS_SRAM_SIZE to Kconfig. Reviewed-by: Simon Glass Signed-off-by: Ovidiu Panait --- Kconfig | 7 +++ include/configs/devkit8000.h | 1 - include/configs/pic32mzdask.h | 2 -- include/configs/tricorder.h | 1 -

[PATCH v4 15/17] common/board_r: Remove initr_serial wrapper

Remove the initr_serial->serial_initialize indirection and call serial_initialize directly. Reviewed-by: Simon Glass Signed-off-by: Ovidiu Panait --- common/board_r.c | 8 +--- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/common/board_r.c b/common/board_r.c index

[PATCH v4 10/17] board_f: m68k: Factor out m68k-specific bdinfo setup

Factor out m68k-specific bdinfo setup to arch_setup_bdinfo in arch/m68k/lib/bdinfo.c. Also, use if(IS_ENABLED()) instead of #ifdef where possible. Reviewed-by: Simon Glass Signed-off-by: Ovidiu Panait --- arch/m68k/lib/bdinfo.c | 21 + common/board_f.c | 19

Re: Please pull u-boot-dm

On Thu, Jul 23, 2020 at 09:09:33PM -0400, Tom Rini wrote: > On Mon, Jul 20, 2020 at 02:19:02PM -0600, Simon Glass wrote: > > > Hi Tom, > > > > https://gitlab.denx.de/u-boot/custodians/u-boot-dm/pipelines/4139 > > > > The following changes since commit 7303ba10a4a39852b9ba356fae5656b43122eec6: >

Re: [PATCH 3/4] clk: add clock driver for SCMI agents

Hi Peng, On Mon, 20 Jul 2020 at 04:06, Peng Fan wrote: > > > > Subject: [PATCH 3/4] clk: add clock driver for SCMI agents > > > > This change introduces a clock driver for SCMI agent devices. When SCMI > > agent and SCMI clock drivers are enabled, SCMI agent binds a clock device > > for > >

[PATCH v4 07/17] board_f: Introduce arch_setup_bdinfo initcall

Certain architectures (ppc, mips, sh, m68k) use setup board_part1 and setup_board_part2 calls during pre-relocation init to populate gd->bd boardinfo fields. This makes the generic init sequence cluttered with arch-specific ifdefs. In order to clean these arch-specific sequences from generic

[PATCH v2 1/3] armv8: gpio: add gpio feature

From: "hui.song" add one struct mpc8xxx_gpio_plat to enable gpio feature. Signed-off-by: hui.song --- .../include/asm/arch-fsl-layerscape/gpio.h| 22 +++ 1 file changed, 22 insertions(+) create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/gpio.h diff --git

[PATCH v4 06/17] board_f: Introduce setup_bdinfo initcall

Introduce setup_bdinfo initcall as a generic routine to populate bdinfo fields. Reviewed-by: Simon Glass Signed-off-by: Ovidiu Panait --- common/board_f.c | 6 ++ include/init.h | 10 ++ 2 files changed, 16 insertions(+) diff --git a/common/board_f.c b/common/board_f.c index

[PATCH v4 05/17] cmd: bdinfo: Move sram info prints to generic code

bi_sramstart and bi_sramsize are generic members of the bd_info structure, so move the m68k/powerpc-specific prints to generic code. Also, print them only if SRAM support is enabled via CONFIG_SYS_HAS_SRAM. Reviewed-by: Simon Glass Signed-off-by: Ovidiu Panait --- arch/m68k/lib/bdinfo.c|

[PATCH v4 12/17] board_f: Remove setup_board_part1

Now that all arch specific code was converted to setup_bdinfo, we can remove setup_board_part1. Reviewed-by: Simon Glass Signed-off-by: Ovidiu Panait --- common/board_f.c | 12 +--- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/common/board_f.c b/common/board_f.c index

[PATCH v2 3/3] gpio: mpc8xxx: support fsl-layerscape platform.

From: "hui.song" Make the MPC8XXX gpio driver to support the fsl-layerscape. Signed-off-by: hui.song --- drivers/gpio/mpc8xxx_gpio.c | 108 +--- 1 file changed, 87 insertions(+), 21 deletions(-) diff --git a/drivers/gpio/mpc8xxx_gpio.c

[PATCH v4 11/17] board_f: ppc: Factor out ppc-specific bdinfo setup

Factor out ppc-specific bdinfo setup from generic init sequence to arch_setup_bdinfo in arch/powerpc/lib/bdinfo.c. Reviewed-by: Simon Glass Signed-off-by: Ovidiu Panait --- arch/powerpc/lib/bdinfo.c | 25 + common/board_f.c | 36

[PATCH v4 09/17] board_f: Move sram bdinfo assignments to generic code

Move sram related bdinfo from arch-specific setup_board_part1 to generic code in setup_bdinfo. Also use "if (IS_ENABLED(CONFIG_SYS_HAS_SRAM))" instead of "#ifdef CONFIG_SYS_SRAM_BASE". Reviewed-by: Simon Glass Signed-off-by: Ovidiu Panait --- common/board_f.c | 10 +- 1 file changed,

[PATCH v4 04/17] Kconfig: Remove CONFIG_SYS_SRAM_START

Remove ad-hoc CONFIG_SYS_SRAM_START and use CONFIG_SYS_SRAM_BASE instead. Reviewed-by: Simon Glass Signed-off-by: Ovidiu Panait --- Kconfig | 2 ++ include/configs/devkit8000.h | 3 --- include/configs/tricorder.h | 3 --- scripts/config_whitelist.txt | 1 - 4 files

[PATCH v4 08/17] board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Move all assignments to gd->bd->bi_mem{start,size} to generic code in setup_bdinfo. Xtensa architecture is special in this regard as it defines its own handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining a weak SDRAM function, let arch_setup_bdinfo overwrite the generic

[PATCH v4 02/17] Kconfig: Convert CONFIG_SYS_SRAM_BASE to Kconfig

This converts ad-hoc CONFIG_SYS_SRAM_BASE to Kconfig. Reviewed-by: Simon Glass Signed-off-by: Ovidiu Panait --- Kconfig | 5 + include/configs/pic32mzdask.h | 1 - scripts/config_whitelist.txt | 1 - 3 files changed, 5 insertions(+), 2 deletions(-) diff --git

Re: [PATCH v2 06/10] drivers: spi: Add SPI controller driver for Octeon

Am Donnerstag, den 23.07.2020, 12:17 +0200 schrieb Stefan Roese: > From: Suneel Garapati > > Adds support for SPI controllers found on Octeon II/III and Octeon TX > TX2 SoC platforms. > > Signed-off-by: Aaron Williams > Signed-off-by: Suneel Garapati > Signed-off-by: Stefan Roese > Cc:

[PATCH v1 21/24] net: Add NIC controller driver for OcteonTX2

From: Suneel Garapati Adds support for Network Interface controllers found on OcteonTX2 SoC platforms. Signed-off-by: Suneel Garapati Cc: Joe Hershberger Signed-off-by: Stefan Roese --- Changes in v1: - Change patch subject - Rebased on latest TOT - Removed inclusion of common.h

[PATCH v2 2/3] dm: armv8: gpio: include for fsl-layerscape

From: "hui.song" Enable the gpio feature on fsl-layerscape platform. Signed-off-by: hui.song --- arch/arm/include/asm/gpio.h | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h index 333e407b66..7715a01706

[PATCH v1 18/24] mmc: Add MMC controller driver for OcteonTX / TX2

From: Suneel Garapati Adds support for MMC controllers found on OcteonTX or OcteonTX2 SoC platforms. Signed-off-by: Aaron Williams Signed-off-by: Suneel Garapati Cc: Peng Fan Signed-off-by: Stefan Roese --- Changes in v1: - Change patch subject - Rebased on latest TOT - Removed inclusion

[PATCH] Fix data abort caused by mis-aligning fit data in

Attempting to place device tree immediately after an image in memory can lead to mis-aligned data accesses if that image size is not divisible by the alignment requirements of the architecture. Data aborts caused by this were observed on a custom Marvel A388 based system, where the image was a

[PATCH v4 01/17] Kconfig: Introduce CONFIG_SYS_HAS_SRAM

In order to be able to replace "#ifdef CONFIG_SYS_SRAM_BASE" sequences with the IS_ENABLED() equivalent, introduce a new boolean Kconfig option that signals whether the platform has SRAM support. Reviewed-by: Simon Glass Signed-off-by: Ovidiu Panait --- Kconfig | 11 +++ 1 file

Re: [PATCH] xilinx: Setup bootm variables

pá 10. 7. 2020 v 13:20 odesílatel Michal Simek napsal: > > On system with PL DDR which is placed before PS DDR in DT > env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low > and bootm_size variables are taking by default gd->bd->bi_dram[0].start and > gd->bd->bi_dram[0].size.

Re: [PATCH 15/18] arm: dts: k3-j7200: Add dts support

On 23/07/20 3:20 pm, Faiz Abbas wrote: > Hi Lokesh, > > Hi Lokesh, > > On 23/07/20 2:17 pm, Lokesh Vutla wrote: >> Add the basic r5 and a72 basic dts for j7200. Following nodes were >> supported: >> - UART >> - MMC SD >> - I2C >> - TISCI communication >> >> Signed-off-by: Lokesh Vutla >>

[PATCH v1 24/24] arm: octeontx2: Add support for OcteonTX2 SoC platforms

From: Suneel Garapati This patch adds support for all OcteonTX2 96xx/95xx boards from Marvell. For 96xx boards, use octeontx_96xx_defconfig and for 95xx boards, use octeontx_95xx_defconfig. Signed-off-by: Suneel Garapati Signed-off-by: Stefan Roese --- Changes in v1: - Changed patch subject

RE: [PATCH v4 2/6] drivers: net: add a DSA sandbox driver

>-Original Message- >From: Priyanka Jain (OSS) [...] > >Kindly fix build error for target >BUILDMAN="sandbox x86" TOOLCHAIN="i386" > >https://travis-ci.org/github/p-priyanka-jain/u-boot/jobs/711090082 > > Hi Priyanka, I will look into rebasing the patches and addressing these new

[PATCH 4/7] rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board from Engicam. PX30.Core needs to mount on top of this Evaluation board for creating complete PX30.Core EDIMM2.2 Starter Kit. Add support for it.

Re: Using gerrit or github for review?

Hi, I'm a bit late to this discussion, but I'll drop my $0.02 anyway. On 13/07/20 02:06PM, Simon Glass wrote: > Hi Heinrich, > > On Mon, 13 Jul 2020 at 13:36, Heinrich Schuchardt wrote: > > > > On 13.07.20 20:25, Simon Glass wrote: > > > Hi, > > > > > > At present U-Boot uses the mailing list

[PATCH] sandbox, test: change hog gpio

Since commit 9ba84329dc45 ("sandbox, test: add test for GPIO_HOG function"), the gpio_a 0,1,2 and 3 are used by hog in test.dts. But 2 leds 'sandbox:red' and 'sandbox:green' are using gpio_a 0 and 1. As hog always request his gpios, the led command on both led is broken: => led sandbox:red LED

Re: [PATCH 1/4] firmware: add new driver for SCMI firmwares

Hell Peng, Thanks for the comments. Please find below few questions for some of your comments. On Mon, 20 Jul 2020 at 04:01, Peng Fan wrote: > > Hi Etienne, > > +Sudeep > > > Subject: [PATCH 1/4] firmware: add new driver for SCMI firmwares > > Thanks for posting this out. > > > > > This change

[PATCH v1 02/24] pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always set

Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for all boards. Hence we can remove the conditional compilation and the code path that will never get compiled. Signed-off-by: Stefan Roese Cc: Tom Rini Cc: Simon Glass Cc: Bin Meng --- Changes in v1: - New patch

[PATCH v1 00/24] arm: Introduce Marvell/Cavium OcteonTX/TX2

This series will add support for OcteonTX and OcteonTX2 processsor based platforms. The Marvell/Cavium Octeon-TX 64-bit ARM based SoCs include the CN80XX, CN81XX and CN83XX while Octeon-TX2 64-bit ARM based SoCs include support for CN96XX and CN95XX. These SoC's have peripheral drivers based on

[PATCH v1 08/24] pci: pci-uclass: Add support for Single-Root I/O Virtualization

From: Suneel Garapati SR-IOV - Single Root I/O Virtualization PF - Physical Function VF - Virtual Function If SR-IOV capability is present, use it to initialize Virtual Function PCI device instances. pci_sriov_init function will read SR-IOV registers to create VF devices under the PF PCI device

[PATCH v1 07/24] pci: pci-uclass: Add support for Enhanced Allocation in Bridges

From: Suneel Garapati If Enhanced Allocation capability is present in bridges, use it to read the fixed sub-ordinate bus number. Signed-off-by: Suneel Garapati Reviewed-by: Simon Glass Cc: Bin Meng Signed-off-by: Stefan Roese --- Changes in v1: - Change patch subject

[PATCH v1 01/24] fdtdec: Add API to read pci bus-range property

From: Suneel Garapati Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati Cc: Simon Glass Signed-off-by: Stefan Roese --- Changes in v1: - Added return value description to function prototype in header - Changed from using be32_to_cpup() to

[PATCH v1 04/24] pci: pci-uclass: Fix incorrect argument in map_sysmem

From: Suneel Garapati Minor spelling correction. Signed-off-by: Suneel Garapati Reviewed-by: Simon Glass Cc: Bin Meng Signed-off-by: Stefan Roese --- Changes in v1: - Change patch subject drivers/pci/pci-uclass.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[PATCH v1 10/24] pci: pci-uclass: Add support for Alternate-RoutingID capability

From: Suneel Garapati If ARI capability is found on device, use it to update next function number in bus scan and also helps to skip unnecessary bdf scans. Signed-off-by: Suneel Garapati Reviewed-by: Simon Glass Cc: Bin Meng Signed-off-by: Stefan Roese --- Changes in v1: - Change patch

[PATCH v1 03/24] pci: pci-uclass: Dynamically allocate the PCI regions

Instead of using a fixed length pre-allocated array of regions, this patch moves to dynamically allocating the regions based on the number of available regions plus the necessary regions for DRAM banks. Since MAX_PCI_REGIONS is not needed any more, its removed completely with this patch.

[PATCH v1 06/24] pci: pci-uclass: Add multi entry support for memory regions

From: Suneel Garapati Enable PCI memory regions in ranges property to be of multiple entry. This helps to add support for SoC's like OcteonTX/TX2 where every peripheral is on PCI bus. Signed-off-by: Suneel Garapati Cc: Simon Glass Cc: Bin Meng Signed-off-by: Stefan Roese --- Changes in

[PATCH v1 05/24] pci: pci-uclass: Make DT subnode parse optional

From: Suneel Garapati Parse subnode DT properties only if parent node is valid. Otherwise, assert is triggered on ofnode_valid in ofnode_first_subnode from dev_for_each_subnode. Signed-off-by: Suneel Garapati Reviewed-by: Simon Glass Cc: Bin Meng Signed-off-by: Stefan Roese --- Changes in

[PATCH v4 17/17] common/board_r: Move blkcache_init call earlier in the boot sequence

blkcache_init manually relocates blkcache list pointers when CONFIG_NEEDS_MANUAL_RELOC is enabled. However, it is called very late in the boot sequence, which could be a problem if previous boot calls execute blkcache operations with the non-relocated pointers. For example, mmc is initialized

[PATCH v4 13/17] dm: blk: Use IS_ENABLED() instead of #ifdefs in blk_post_probe

Use IS_ENABLED() instead of #ifdef in blk_post_probe function. No functional change intended. Reviewed-by: Simon Glass Signed-off-by: Ovidiu Panait --- drivers/block/blk-uclass.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/block/blk-uclass.c

Re: [PATCH] arm64: zynqmp: Fix set_fdtfile() not to break u-boots DTB

st 24. 6. 2020 v 14:44 odesílatel Michal Simek napsal: > > Origin function was calling strsep which replaced delimiter ',' by a null > byte ('\0'). Operation was done directly on FDT which ends up with the > following behavior: > > ZynqMP> printenv fdtfile > fdtfile=xilinx/zynqmp.dtb > ZynqMP>

Re: [PATCH v2] xilinx: versal: Add new versal loadpdi command

st 24. 6. 2020 v 14:49 odesílatel Michal Simek napsal: > > From: T Karthik Reddy > > Versal loadpdi command is used for loading secure & non-secure > pdi images. > > Signed-off-by: T Karthik Reddy > Signed-off-by: Michal Simek > --- > > Changes in v2: > - Fix failures for versal mini

Re: [PATCH v4 08/17] board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

Hi Ovidiu, > Move all assignments to gd->bd->bi_mem{start,size} to generic code in > setup_bdinfo. > > Xtensa architecture is special in this regard as it defines its own > handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining > a weak SDRAM function, let arch_setup_bdinfo

Re: [PATCH] versal: fix versal PM ret payload size

st 8. 7. 2020 v 14:54 odesílatel Michal Simek napsal: > > From: Ibai Erkiaga > > The PM return payload size is defined as 4 bytes for Versal arquitecture > while the PM calls implemented both in the Versal clock driver and > ZynqMP firmware driver expects 5 bytes length. > > Signed-off-by: Ibai

Re: [PATCH 07/18] arm: mach-k3: j721e: Add detection for j721e

On 23/07/2020 11:47, Lokesh Vutla wrote: Add an api soc_is_j721e(), and use it to enable certain functionality that is available only on j721e. Signed-off-by: Lokesh Vutla Signed-off-by: Suman Anna --- arch/arm/mach-k3/common.c | 10 ++

[PATCH] stm32mp1: mmu_set_region_dcache_behaviour

Since commit d877f8fd0f09 ("arm: provide a function for boards init code to modify MMU virtual-physical map") the parameter of mmu_set_region_dcache_behaviour need to be MMU_SECTION_SIZE aligned. Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/cpu.c | 7 --- 1 file changed, 4

Re: [PATCH 2/4] dt-bindings: arm: SCMI bindings documentation

Hello Peng, On Mon, 20 Jul 2020 at 04:01, Peng Fan wrote: > > > Subject: [PATCH 2/4] dt-bindings: arm: SCMI bindings documentation > > Since kernel already has the binding doc, there is no need to add a U-Boot > copy. > Ok. I'll remove this patch from the series in my v2. Thanks, Etienne >

[PATCH 2/7] arm: dts: rockchip: Add Engicam PX30.Core SOM

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. General features: - Rockchip PX30 - Up to 2GB DDR4 - eMMC 4 GB expandible - rest of PX30 features PX30.Core needs to mount on top of Engicam baseboards for creating complete platform boards. Possible baseboards are, - EDIMM2.2 -

[PATCH 6/7] rockchip: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OF

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. C.TOUCH 2.0 10.1" Open Frame is a Carrier board with Capacitive touch 10.1" open frame from Engicam. PX30.Core needs to mount on top of this Carrier board for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame. Add support for

[PATCH 7/7] doc: rockchip: Document Rockchip miniloader flashing

This would be useful and recommended boot flow for new boards which has doesn't have the DDR support yet in mainline. Sometimes it is very useful for debugging mainline DDR support. Documen it for px30 boot flow. Signed-off-by: Jagan Teki --- doc/board/rockchip/rockchip.rst | 40

[PATCH 5/7] arm: dts: rockchip: px30: Add Engicam C.TOUCH 2.0 10.1" OF

Engicam C.TOUCH 2.0 10.1" Open Frame is a Carrier board with Capacitive touch 10.1" open frame. Genaral features: - TFT 10.1" industrial, 1280x800 LVDS display - Ethernet 10/100 - Wifi/BT - USB Type A/OTG - Audio Out - CAN SOM's like PX30.Core needs to mount on top of this Carrier board for

[PATCH 1/7] arm: dts: rockchip: px30: Add Engicam EDIMM2.2 Starter Kit

Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board. Genaral features: - LCD 7" C.Touch - microSD slot - Ethernet 1Gb - Wifi/BT - 2x LVDS Full HD interfaces - 3x USB 2.0 - 1x USB 3.0 - HDMI Out - Mini PCIe - MIPI CSI - 2x CAN - Audio Out SOM's like PX30.Core

[PATCH 3/7] rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards. Add the help text for existing EVB, so-that the new boards which are resuing this config option can mention their board help text. This would help to track which boards are using EVB_PX30 config. Signed-off-by: Jagan Teki ---

[PATCH 0/7] rockchip: Add Engicam PX30.Core support

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. PX30.Core needs to mount on top of Engicam baseboards for creating complete platform boards. Possible baseboards are, - EDIMM2.2 Starter Kit - C.TOUCH 2.0 10.1" Open Frame Right now boot support is working via Rockchip miniloader,

Re: [PATCH] arm64: zynqmp: Reduce malloc memory for mini QSPI configuration

čt 16. 7. 2020 v 12:03 odesílatel Michal Simek napsal: > > From: Ashok Reddy Soma > > Mini U-boot runs on lower foot print of 256KB OCM. Hence 8K memory > for malloc may not be required. Reduce it by 1.5K. > > Signed-off-by: Ashok Reddy Soma > Signed-off-by: Michal Simek > --- > >

Re: [PATCH 2/2] xilinx: zynqmp: Enable DFU tftp support

st 15. 7. 2020 v 15:51 odesílatel Michal Simek napsal: > > Enable DFU tftp support for firmware update. Fill dfu_ram_tftp variable to > have command present for showing how to use it. > > boot FIT image has been created from below fragment. Key part is that type > of image has to be firmware.

Re: [PATCH 1/2] xilinx: Align dfu ram with booti command

st 15. 7. 2020 v 15:51 odesílatel Michal Simek napsal: > > Image should be loaded to 0x8 address and not to $kernel_addr_r. > Also kernel_addr, fdt_addr and fdt_size in zynqmp case are not defined > that's why define it to be aligned with Versal. > > Signed-off-by: Michal Simek > --- > >

Re: [PATCH v2 0/3] xilinx: Enable Versal allocation from low memory

pá 10. 7. 2020 v 14:40 odesílatel Michal Simek napsal: > > Hi, > > Generated DTS files don't need to have memory nodes sorted out that's why > it can happen that the first memory node is not pointing to lowest DDR > which is normally used for system boot. That's why new function was > introduced

Re: [PATCH 07/18] arm: mach-k3: j721e: Add detection for j721e

On 24/07/20 5:55 pm, Grygorii Strashko wrote: > > > On 23/07/2020 11:47, Lokesh Vutla wrote: >> Add an api soc_is_j721e(), and use it to enable certain functionality >> that is available only on j721e. >> >> Signed-off-by: Lokesh Vutla >> Signed-off-by: Suman Anna >> --- >>  

Re: [PATCH V2 6/7] env: Add option to only ever append environment

On Tue, Jul 07, 2020 at 08:51:38PM +0200, Marek Vasut wrote: > Add configuration option which prevents the environment hash table to be > ever cleared and reloaded with different content. This is useful in case > the first environment loaded into the hash table contains e.g. sensitive > content

Re: [PATCH V2 4/7] env: Fix invalid env handling in env_init()

On Tue, Jul 07, 2020 at 08:51:36PM +0200, Marek Vasut wrote: > This fixes the case where there are multiple environment drivers, one of > them is the default environment one, and it is followed by an environment > driver which does not implement .init() callback. The default environment > driver

Re: [PATCH V2 5/7] env: nowhere: Implement .load callback

On Tue, Jul 07, 2020 at 08:51:37PM +0200, Marek Vasut wrote: > Add .load callback for the 'nowhere' environment driver. This is useful > for when the 'nowhere' driver is used in combination with other drivers > and should be used to load the default environment. > > Signed-off-by: Marek Vasut

Re: [PATCH V2 2/7] env: Add H_DEFAULT flag

On Tue, Jul 07, 2020 at 08:51:34PM +0200, Marek Vasut wrote: > Add another internal environment flag which indicates that the operation > is resetting the environment to the default one. This allows the env code > to discern between import of external environment and reset to default. > >

Re: [PATCH V2 1/7] env: Warn on force access if ENV_ACCESS_IGNORE_FORCE set

On Tue, Jul 07, 2020 at 08:51:33PM +0200, Marek Vasut wrote: > If the ENV_ACCESS_IGNORE_FORCE is set, inform user that the variable > cannot be force-set if such attempt happens. > > Signed-off-by: Marek Vasut Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature

Re: [PATCH 1/1] mtd: cfi_flash: read device tree correctly

On 24.07.20 11:14, Rick Chen wrote: > Hi Heinrich > >> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Heinrich >> Schuchardt >> Sent: Tuesday, July 21, 2020 10:51 AM >> To: Stefan Roese >> Cc: Simon Glass; u-boot@lists.denx.de; Heinrich Schuchardt >> Subject: [PATCH 1/1] mtd:

Re: [PATCH v4 00/27] rockchip: x86: Support building ROM files automatically with binman

Hi Kever (and other Rockchip people), Are there any more comments on this series? I can pick it up via -dm but I would like to get more comments if possible. I'd also like to see if someone can take on removing the other ad-hoc Rockchip script. Regards, Simon On Sun, 19 Jul 2020 at 21:07,

[PATCH] CONFIG_NR_DRAM_BANKS: Remove unreferenced code as its always defined

Since commit 86cf1c82850f ("configs: Migrate CONFIG_NR_DRAM_BANKS") & commit 999a772d9f24 ("Kconfig: Migrate CONFIG_NR_DRAM_BANKS"), CONFIG_NR_DRAM_BANKS is always defined with a value (4 is default). It makes no sense to still carry code that is guarded with "#ifndef CONFIG_NR_DRAM_BANKS" (and

Re: [PATCH v2 06/10] drivers: spi: Add SPI controller driver for Octeon

On 24.07.20 15:56, Daniel Schwierzeck wrote: Am Donnerstag, den 23.07.2020, 12:17 +0200 schrieb Stefan Roese: From: Suneel Garapati Adds support for SPI controllers found on Octeon II/III and Octeon TX TX2 SoC platforms. Signed-off-by: Aaron Williams Signed-off-by: Suneel Garapati

Re: [PATCH V2 3/7] env: Discern environment coming from external storage

On Tue, Jul 07, 2020 at 08:51:35PM +0200, Marek Vasut wrote: > Add another custom environment flag which discerns environment coming > from external storage from environment set by U-Boot itself. > > Signed-off-by: Marek Vasut Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP

[PATCH v3 7/8] test/py: add tests for the button commands

Adds tests for the button commands. Reviewed-by: Simon Glass Signed-off-by: Philippe Reynes --- Changelog: v3: - update compatible to "gpio-keys" v2: - no change (button uclass test is added in another commit arch/sandbox/dts/test.dts| 14 ++ test/py/tests/test_button.py | 19

[PATCH v3 5/8] sandbox64: enable button

Enable the support of button (driver and command) on sandbox64. Reviewed-by: Simon Glass Signed-off-by: Philippe Reynes --- Changelog: v3: - no change v2: - no change configs/sandbox64_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/sandbox64_defconfig

[PATCH] arm: imx6q: pcm058: Rework SPI NOR configuration

Enable CONFIG_SPL_DM_SPI_FLASH to be able to boot from SPI NOR, modify the offset of U-boot proper in the SPI NOR, so the difference in offset matches between SPL and U-boot matches that of the SD Card, allowing u-boot-with-spl.imx to also be copied to SPI NOR at an offset of 0x400. Update the

Re: [PATCH V2 7/7] env: Add support for explicit write access list

On Tue, Jul 07, 2020 at 08:51:39PM +0200, Marek Vasut wrote: > This option marks any U-Boot variable which does not have explicit 'w' > writeable flag set as read-only. This way the environment can be locked > down and only variables explicitly configured to be writeable can ever > be changed by

Re: [PATCH v2 8/8] test: dm: add a test for class button

Hi Simon, > Hi Philippe, > > On Mon, 20 Jul 2020 at 08:30, Philippe REYNES > wrote: >> >> Hi Simon, >> >> > Hi Philippe, >> > >> > On Fri, 17 Jul 2020 at 06:22, Philippe Reynes >> > wrote: >> >> >> >> Add a test to confirm that we can read button state >> >> using the button-gpio driver.

[PATCH v2 1/1] mtd: cfi_flash: read device tree correctly

The size of #address-cells and #size-cells is not correctly determined if CONFIG_OF_LIVE=n. dev_read_size_cells() and dev_read_addr_cells() do not walk up the device tree to find the number of cells. On error they return 1 and 2 respectively. On qemu_arm64_defconfig this leads to the incorrect

[PATCH 1/1] dm: remove superfluous comment for union ofnode_union

"future live tree" does not make sense anymore as we have CONFIG_OF_LIVE. Signed-off-by: Heinrich Schuchardt --- include/dm/ofnode.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index a0d3df7786..8df2facf99 100644 ---

Re: [U-Boot] Pull request: u-boot-riscv/master 20200724

On Fri, Jul 24, 2020 at 03:18:45PM +0800, ub...@andestech.com wrote: > Hi Tom, > > Please pull some riscv updates: > > - Fix SiFive HiFive Unleashed board booting failure problem. > - Enable SiFive fu540 PWM driver. > - Support SiFive fu540: SPI boot. > - Update OpenSBI used for RISC-V CI

[PATCH 1/1] test: do not rely on => being the prompt

In our tests we should use the customized prompt for testing. Reported-by: Tom Rini Signed-off-by: Heinrich Schuchardt --- test/py/tests/test_efi_loader.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/py/tests/test_efi_loader.py b/test/py/tests/test_efi_loader.py

[PATCH 3/9] usb_kbd: succeed even if no interrupt is pending

After the initial configuration some USB keyboard+mouse devices never return any kind of event on the interrupt line. In particular, the device identified by "Cypress Cypress USB Keyboard / PS2 Mouse as 3f98.usb/usb1/1-1/1-1.3/1-1.3:1.0/0003:04B4:0101.0001/input/input0" never returns a data

[PATCH 4/9] common/usb.c: Work around keyboard reporting "USB device not accepting new address"

When resetting the rpi3 board sometimes it will display: USB device not accepting new address (error=0) After the message appears, the usb keyboard will not work. It seems that the configuration actually did succeed however. Checking the device status for a return code of zero and

[PATCH 6/9] xhci-ring: Fix crash when issuing "usb reset"

If a "usb reset" is issued when the poll_pend state is set the abort_td() function will hit one of the BUG() statements in abort_td() or the BUG() statement at the end of xhci_wait_for_event(). The controller has been reset, so the rest of the cleanup should be skipped and poll_pend flag should

[PATCH 9/9] bcmgenet: Add support for rgmii-rxid

The commit 57805f2270c4 ("net: bcmgenet: Don't set ID_MODE_DIS when not using RGMII") needed to be extended for the case of using the rgmii-rxid. The latest version of the Rasbperry Pi4 dtb files for the 5.4 now specify the rgmii-rxid. Signed-off-by: Jason Wessel --- drivers/net/bcmgenet.c | 3

[PATCH 2/2] arm: dts: k3-j721e: Fix interconnect node names

The various CBASS interconnect nodes on K3 J721E SoCs are defined using the node name "interconnect". This is not a valid node name as per the dt-schema. Fix these node names to use the standard name used for SoC interconnects, "bus". Signed-off-by: Suman Anna --- arch/arm/dts/k3-j721e.dtsi | 4

  1   2   >