Re: [PATCH v9] usb: add MediaTek USB3 DRD driver
Hi Marek,
On Wed, 2020-10-14 at 15:03 +0200, Marek Vasut wrote:
> On 10/14/20 2:29 PM, Chunfeng Yun wrote:
> > On Wed, 2020-10-14 at 12:56 +0200, Marek Vasut wrote:
> >> On 10/14/20 10:50 AM, Chunfeng Yun wrote:
> >>> This patch adds support for the MediaTek USB3 DRD controller,
> >>> its host side is based on xHCI, this driver supports device mode
> >>> and host mode.
> >>
> >> This patch doesn't seem to apply to u-boot-usb/next ,
This may cause u-boot-usb/next build error, due to no gadget driver is
built, because I enabled the following configs in patch 764751784727
("configs: mt8512: enable fastboot and USB host related configs"):
CONFIG_DM_USB_GADGET=y
CONFIG_USB_MTU3=y
CONFIG_USB_GADGET=y
but the mtu3 driver is not yet applied in u-boot-usb/next (although
CONFIG_USB_MTU3 is enabled); and
CONFIG_DM_USB_GADGET requires a gadget driver to define
dm_usb_gadget_handle_interrupts(), then the build error happened.
> and also,
> >> u-boot-usb/next does not build:
> >
> > There is error:
> > aarch64: + mt8512_bm1_emmc
> > +aarch64-linux-ld.bfd: drivers/usb/gadget/udc/built-in.o: in function
> > `usb_gadget_handle_interrupts':
> > +drivers/usb/gadget/udc/udc-uclass.c:56: undefined reference to
> > `dm_usb_gadget_handle_interrupts'
> >
> > It seems that the gadget of mtu3 is not enabled, but the default mode is
> > gadget mode, not sure why not works.
I tested it again, and look at the CI pipeline 4997, the mtu3 driver is
not applied into u-boot-usb/next, so will build error.
Please apply the following patch to u-boot-usb/next, it will build pass:
https://patchwork.ozlabs.org/project/uboot/patch/1602681717-20850-1-git-send-email-chunfeng@mediatek.com/
[RESEND,v9] usb: add MediaTek USB3 DRD driver
The following patch is not needed anymore, please ignore it
https://patchwork.ozlabs.org/project/uboot/patch/1602680044-19794-1-git-send-email-chunfeng@mediatek.com/
[v2] configs: mt8512: enable device mode of mtu3 explicitly
Thanks a lot
> >
> > I sent a patch to try to fix it:
> >
> > https://patchwork.ozlabs.org/project/uboot/patch/1602678229-19372-1-git-send-email-chunfeng@mediatek.com/
> > configs: mt8512: enable device mode of mtu3 explicitly
> >
> >
> > Sorry for inconvenience
>
> That's fine, but can you please rebase this on usb/next and resend, so I
> can apply it ?
>
> Also, you can use either of the travis/gitlab CI to build-test the
> patches before submitting them.
[v3 2/2] cosmetic: reset: ast2500: Rename driver and configs
1. Rename AST2500 reset driver from ast2500-reset.c
to reset-ast2500.c
2. Rename AST2500 reset kconfig option from AST2500_RESET
to RESET_AST2500
Signed-off-by: Chia-Wei, Wang
Reviewed-by: Ryan Chen
---
drivers/reset/Kconfig | 2 +-
drivers/reset/Makefile | 2 +-
drivers/reset/{ast2500-reset.c => reset-ast2500.c} | 0
3 files changed, 2 insertions(+), 2 deletions(-)
rename drivers/reset/{ast2500-reset.c => reset-ast2500.c} (100%)
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 8b243fdcc6..33c2736554 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -72,7 +72,7 @@ config RESET_UNIPHIER
Say Y if you want to control reset signals provided by System Control
block, Media I/O block, Peripheral Block.
-config AST2500_RESET
+config RESET_AST2500
bool "Reset controller driver for AST2500 SoCs"
depends on DM_RESET
default y if ASPEED_AST2500
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 10a7973f82..fa52aa3329 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -14,7 +14,7 @@ obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o
obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
-obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o
+obj-$(CONFIG_RESET_AST2500) += reset-ast2500.o
obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o
obj-$(CONFIG_RESET_MESON) += reset-meson.o
obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
diff --git a/drivers/reset/ast2500-reset.c b/drivers/reset/reset-ast2500.c
similarity index 100%
rename from drivers/reset/ast2500-reset.c
rename to drivers/reset/reset-ast2500.c
--
2.17.1
[v3 1/2] reset: ast2500: Use SCU for reset control
The System Control Unit (SCU) controller of Aspeed
SoCs provides the reset control for each peripheral.
This patch refactors the reset method to leverage
the SCU reset control. Thus the driver dependency
on watchdog including dedicated WDT API and reset
flag encoding can be eliminated.
The Kconfig description is also updated accordingly.
Signed-off-by: Chia-Wei, Wang
Reviewed-by: Ryan Chen
---
arch/arm/dts/ast2500-u-boot.dtsi | 7 +-
drivers/reset/Kconfig | 9 +--
drivers/reset/ast2500-reset.c | 97 ---
include/dt-bindings/reset/ast2500-reset.h | 73 +
4 files changed, 97 insertions(+), 89 deletions(-)
diff --git a/arch/arm/dts/ast2500-u-boot.dtsi b/arch/arm/dts/ast2500-u-boot.dtsi
index 51a5244766..ea60e4c8db 100644
--- a/arch/arm/dts/ast2500-u-boot.dtsi
+++ b/arch/arm/dts/ast2500-u-boot.dtsi
@@ -16,7 +16,6 @@
rst: reset-controller {
u-boot,dm-pre-reloc;
compatible = "aspeed,ast2500-reset";
- aspeed,wdt = <>;
#reset-cells = <1>;
};
@@ -27,7 +26,7 @@
0x1e6e0200 0x1d4 >;
#reset-cells = <1>;
clocks = < ASPEED_CLK_MPLL>;
- resets = < AST_RESET_SDRAM>;
+ resets = < ASPEED_RESET_SDRAM>;
};
ahb {
@@ -41,7 +40,7 @@
reg = <0x1e740100>;
#reset-cells = <1>;
clocks = < ASPEED_CLK_SDIO>;
- resets = < AST_RESET_SDIO>;
+ resets = < ASPEED_RESET_SDIO>;
};
sdhci1: sdhci@1e740200 {
@@ -49,7 +48,7 @@
reg = <0x1e740200>;
#reset-cells = <1>;
clocks = < ASPEED_CLK_SDIO>;
- resets = < AST_RESET_SDIO>;
+ resets = < ASPEED_RESET_SDIO>;
};
};
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index b60e11f98b..8b243fdcc6 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -74,13 +74,12 @@ config RESET_UNIPHIER
config AST2500_RESET
bool "Reset controller driver for AST2500 SoCs"
- depends on DM_RESET && WDT_ASPEED
+ depends on DM_RESET
default y if ASPEED_AST2500
help
- Support for reset controller on AST2500 SoC. This controller uses
- watchdog to reset different peripherals and thus only supports
- resets that are supported by watchdog. The main limitation though
- is that some reset signals, like I2C or MISC reset multiple devices.
+ Support for reset controller on AST2500 SoC.
+ Say Y if you want to control reset signals of different peripherals
+ through System Control Unit (SCU).
config RESET_ROCKCHIP
bool "Reset controller driver for Rockchip SoCs"
diff --git a/drivers/reset/ast2500-reset.c b/drivers/reset/ast2500-reset.c
index beb5cd8fa8..e7b5c7deca 100644
--- a/drivers/reset/ast2500-reset.c
+++ b/drivers/reset/ast2500-reset.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2017 Google, Inc
+ * Copyright 2020 ASPEED Technology Inc.
*/
#include
@@ -9,28 +10,26 @@
#include
#include
#include
-#include
+#include
#include
#include
-#include
struct ast2500_reset_priv {
- /* WDT used to perform resets. */
- struct udevice *wdt;
struct ast2500_scu *scu;
};
-static int ast2500_ofdata_to_platdata(struct udevice *dev)
+static int ast2500_reset_request(struct reset_ctl *reset_ctl)
{
- struct ast2500_reset_priv *priv = dev_get_priv(dev);
- int ret;
+ debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
+ reset_ctl->dev, reset_ctl->id);
- ret = uclass_get_device_by_phandle(UCLASS_WDT, dev, "aspeed,wdt",
- >wdt);
- if (ret) {
- debug("%s: can't find WDT for reset controller", __func__);
- return ret;
- }
+ return 0;
+}
+
+static int ast2500_reset_free(struct reset_ctl *reset_ctl)
+{
+ debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
+ reset_ctl->dev, reset_ctl->id);
return 0;
}
@@ -38,47 +37,52 @@ static int ast2500_ofdata_to_platdata(struct udevice *dev)
static int ast2500_reset_assert(struct reset_ctl *reset_ctl)
{
struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev);
- u32 reset_mode, reset_mask;
- bool reset_sdram;
- int ret;
-
- /*
-* To reset SDRAM, a specifal flag in SYSRESET register
-* needs to be enabled first
-*/
- reset_mode = ast_reset_mode_from_flags(reset_ctl->id);
- reset_mask =
[v3 0/2] Refactor AST2500 reset control
This patch series refactors the reset method to use the System Control Unit (SCU) reset control for simplicity. In addition, the naming of reset driver and Kconfig option is also refined for future consistency. v3: - Fix Makefile to adapt to the renamed reset driver file v2: - Rebase patches to fix conflict Chia-Wei, Wang (2): reset: ast2500: Use SCU for reset control cosmetic: reset: ast2500: Rename driver and configs arch/arm/dts/ast2500-u-boot.dtsi | 7 +- drivers/reset/Kconfig | 11 +-- drivers/reset/Makefile| 2 +- drivers/reset/ast2500-reset.c | 104 - drivers/reset/reset-ast2500.c | 109 ++ include/dt-bindings/reset/ast2500-reset.h | 73 --- 6 files changed, 157 insertions(+), 149 deletions(-) delete mode 100644 drivers/reset/ast2500-reset.c create mode 100644 drivers/reset/reset-ast2500.c -- 2.17.1
Re: Please pull u-boot-marvell/master
On Wed, Oct 14, 2020 at 10:19:26AM +0200, Stefan Roese wrote: > Hi Tom, > > please pull the first series of Marvell MVEBU related patches. Here the > summary log: > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2] configs: mt8512: enable device mode of mtu3 explicitly
On Wed, 2020-10-14 at 15:31 +0200, Marek Vasut wrote:
> On 10/14/20 3:03 PM, Chunfeng Yun wrote:
> > On Wed, 2020-10-14 at 15:01 +0200, Marek Vasut wrote:
> >> On 10/14/20 2:54 PM, Chunfeng Yun wrote:
> >>> Set CONFIG_USB_MTU3_GADGET=y to enable device mode explicitly,
> >>> try to avoid build error:
> >>> "undefined reference to `dm_usb_gadget_handle_interrupts'"
> >>>
> >>> Fixes: 764751784727 ("configs: mt8512: enable fastboot and USB host
> >>> related configs")
> >>
> >> Should I just squash this into ^ that commit in usb/next ?
> > Fine to me if it can fix the build error, thanks
>
> So, can you please test it and then send me all the patches you want me
> to apply and possibly add a note in them if they should be squashed
> somewhere ?
As I explained in another email, just apply the following patch into
u-boot-usb/next will fix build error:
https://patchwork.ozlabs.org/project/uboot/patch/1602681717-20850-1-git-send-email-chunfeng@mediatek.com/
[RESEND,v9] usb: add MediaTek USB3 DRD driver
Thank you
>
> Thanks
[PATCH v2] clk: ccf: replace the get_rate helper
The 12d152620d commit fixed the get_rate helper because the set_parent
one did not re-parent the clock device to the new parent. The 4d139f3838
commit allows you to remove this workaround by calling the
clk_get_parent_rate routine.
Signed-off-by: Dario Binacchi
---
Changes in v2:
- Replace clk_get_parent_rate with clk_generic_get_rate to avoid compilation
warnings.
drivers/clk/clk-mux.c | 26 +-
1 file changed, 1 insertion(+), 25 deletions(-)
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index 7a5ee7a45f..f1becd20d8 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -150,32 +150,8 @@ static int clk_mux_set_parent(struct clk *clk, struct clk
*parent)
return 0;
}
-static ulong clk_mux_get_rate(struct clk *clk)
-{
- struct clk_mux *mux = to_clk_mux(clk_dev_binded(clk) ?
- dev_get_clk_ptr(clk->dev) : clk);
- struct udevice *parent;
- struct clk *pclk;
- int err, index;
-
- index = clk_mux_get_parent(clk);
- if (index >= mux->num_parents)
- return -EFAULT;
-
- err = uclass_get_device_by_name(UCLASS_CLK, mux->parent_names[index],
- );
- if (err)
- return err;
-
- pclk = dev_get_clk_ptr(parent);
- if (!pclk)
- return -ENODEV;
-
- return clk_get_rate(pclk);
-}
-
const struct clk_ops clk_mux_ops = {
- .get_rate = clk_mux_get_rate,
+ .get_rate = clk_generic_get_rate,
.set_parent = clk_mux_set_parent,
};
--
2.17.1
Re: [PATCH v2] configs: mt8512: enable device mode of mtu3 explicitly
On Wed, 2020-10-14 at 15:31 +0200, Marek Vasut wrote:
> On 10/14/20 3:03 PM, Chunfeng Yun wrote:
> > On Wed, 2020-10-14 at 15:01 +0200, Marek Vasut wrote:
> >> On 10/14/20 2:54 PM, Chunfeng Yun wrote:
> >>> Set CONFIG_USB_MTU3_GADGET=y to enable device mode explicitly,
> >>> try to avoid build error:
> >>> "undefined reference to `dm_usb_gadget_handle_interrupts'"
> >>>
> >>> Fixes: 764751784727 ("configs: mt8512: enable fastboot and USB host
> >>> related configs")
> >>
> >> Should I just squash this into ^ that commit in usb/next ?
> > Fine to me if it can fix the build error, thanks
>
> So, can you please test it and then send me all the patches you want me
> to apply and possibly add a note in them if they should be squashed
> somewhere ?
Ok, I'll test and send them again, please apply them directly, that may
be easier
Thanks a lot
>
> Thanks
Re: [PATCH] video: rockchip: Add missing dpcd_write() call to link_train_ce()
On 14/10/2020 22:31, Tom Rini wrote:
> On Wed, Oct 14, 2020 at 09:58:28PM +0300, Alper Nebi Yasak wrote:
>> On 14/10/2020 18:24, Tom Rini wrote:
>>> Ugh. In so far as anything can be re-licensed, who did it all
>>> originally? I suspect coreboot isn't interested in 2.0+ but we can do
>>> 2.0-only.
>>
>> For this patch, coreboot commit b9a7877568cf ("rockchip/*: refactor edp
>> driver") introduces the related change to src/soc/rockchip/common/edp.c
>> renamed from .../rk3288/edp.c, which was introduced at coreboot commit
>> 40f558e8f4f7 ("rockchip: support display").
>
> Right, sorry. I mean, on the U-Boot side, where did things come from?
> I wonder how we got a different license text, and perhaps if we
> shouldn't just re-port the coreboot code over as a clean/clear way to
> re-license it to GPL-2.0-only.
I'm not sure re-porting is a great idea from the technical perspective.
I've been reading both drivers to compare them, there are also things in
U-Boot that're missing from coreboot. Things like DM integration are
also not there as they're U-Boot specific.
I checked some files with git log and checked the first commit that
showed up for each.
Simon Glass added:
- drivers/video/rockchip/rk_edp.c
- drivers/video/rockchip/rk_hdmi.c
- drivers/video/rockchip/rk_vop.c
- arch/arm/include/asm/arch-rockchip/vop_rk3288.h
- arch/arm/include/asm/arch-rockchip/edp_rk3288.h
as Copyright (c) 2015 Google, Inc
Copyright 2014 Rockchip Inc.
Philipp Tomsich added:
- drivers/video/rockchip/rk3288_hdmi.c
- drivers/video/rockchip/rk3399_hdmi.c
- drivers/video/rockchip/rk_hdmi.h
- drivers/video/rockchip/rk_vop.h
as Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
- drivers/video/rockchip/rk3288_vop.c
- drivers/video/rockchip/rk3399_vop.c
as Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
Copyright (c) 2015 Google, Inc
Copyright 2014 Rockchip Inc.
Eric Gao added:
- drivers/video/rockchip/rk3288_mipi.c
- drivers/video/rockchip/rk3399_mipi.c
- drivers/video/rockchip/rk_mipi.c
- drivers/video/rockchip/rk_mipi.h
- arch/arm/include/asm/arch-rockchip/rockchip_mipi_dsi.h
as Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd
Jacob Chen added:
- drivers/video/rockchip/rk_lvds.c
- arch/arm/include/asm/arch-rockchip/lvds_rk3288.h
as Copyright 2016 Rockchip Inc.
RE: [v3 0/2] Refactor AST2500 reset control
Hi Tom, The patches has been rebased onto the up-to-date U-Boot master. A makefile error is also fixed in the revised version and verified with an AST2500 EVB. Thanks, Chiawei > -Original Message- > From: ChiaWei Wang > Sent: Thursday, October 15, 2020 10:25 AM > To: tr...@konsulko.com; u-boot@lists.denx.de; max...@google.com > Subject: [v3 0/2] Refactor AST2500 reset control > > This patch series refactors the reset method to use the System Control Unit > (SCU) reset control for simplicity. > > In addition, the naming of reset driver and Kconfig option is also refined for > future consistency. > > v3: > - Fix Makefile to adapt to the renamed reset driver file > > v2: > - Rebase patches to fix conflict > > > Chia-Wei, Wang (2): > reset: ast2500: Use SCU for reset control > cosmetic: reset: ast2500: Rename driver and configs > > arch/arm/dts/ast2500-u-boot.dtsi | 7 +- > drivers/reset/Kconfig | 11 +-- > drivers/reset/Makefile| 2 +- > drivers/reset/ast2500-reset.c | 104 - > drivers/reset/reset-ast2500.c | 109 > ++ > include/dt-bindings/reset/ast2500-reset.h | 73 --- > 6 files changed, 157 insertions(+), 149 deletions(-) delete mode 100644 > drivers/reset/ast2500-reset.c create mode 100644 > drivers/reset/reset-ast2500.c > > -- > 2.17.1
Missing license/copyright notice in zlib.h
Hi Mike All *.c and *.h files under https://gitlab.denx.de/u-boot/u-boot/-/blob/master/lib/zlib/ have header statement "For conditions of distribution and use, see copyright notice in zlib.h". But, there is no copyright notice in zlib.h. Are you miss adding it? Regards Ley Foon
Re: [PATCH 1/4] treewide: configs: get rid of unused CONFIG_DEFAULT_CONSOLE
Dear Andre Heider, On Wed, 23 Sep 2020 at 03:59, Simon Glass wrote: > On Thu, 17 Sep 2020 at 00:52, Andre Heider wrote: > > > > These are all unused. > > > > Signed-off-by: Andre Heider > > --- > > This sets completely removes CONFIG_DEFAULT_CONSOLE from the tree. > > Only compile time tested. > > > > include/configs/arndale.h | 2 -- > > include/configs/espresso7420.h | 3 --- > > include/configs/origen.h | 5 - > > include/configs/peach-pi.h | 3 --- > > include/configs/peach-pit.h| 3 --- > > include/configs/smdk5250.h | 2 -- > > include/configs/smdk5420.h | 5 - > > include/configs/smdkv310.h | 2 -- > > include/configs/snow.h | 2 -- > > include/configs/spring.h | 2 -- > > 10 files changed, 29 deletions(-) > > > > Reviewed-by: Simon Glass > Applied to u-boot-samsung.
[PATCH 1/4] serial: serial_xen: print U-Boot banner and others
At present, DM_FLAG_PRE_RELOC is set only if !OF_CONTROL.
It doesn't make sense for this para-virtualized driver.
With this patch applied, you will be able to see early boot messages:
U-Boot 2020.10-1-ge442e71a6c52-dirty (Oct 15 2020 - 11:02:25 +0900)
xenguest
Xen virtual CPU
Model: XENVM-4.15
DRAM: 128 MiB
PVBLOCK:
(XEN) gnttab_mark_dirty not implemented yet
pvblock: 0
In:hypervisor
Out: hypervisor
Err: hypervisor
xenguest#
Signed-off-by: AKASHI Takahiro
---
drivers/serial/serial_xen.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/serial/serial_xen.c b/drivers/serial/serial_xen.c
index ba6504b94796..ed191829f059 100644
--- a/drivers/serial/serial_xen.c
+++ b/drivers/serial/serial_xen.c
@@ -175,8 +175,6 @@ U_BOOT_DRIVER(serial_xen) = {
.priv_auto_alloc_size = sizeof(struct xen_uart_priv),
.probe = xen_serial_probe,
.ops= _serial_ops,
-#if !CONFIG_IS_ENABLED(OF_CONTROL)
.flags = DM_FLAG_PRE_RELOC,
-#endif
};
--
2.28.0
[PATCH 0/4] xen: improve console outputs
This patch series improves the behavior and functionality of console output on Xen: Patch#1: allow for U-Boot banner Patch#2-4: enable DEBUG_UART (or early printf) AKASHI Takahiro (4): serial: serial_xen: print U-Boot banner and others arch: arm/xen: add putc() for debugging xen: add definitions for console_io serial: serial_xen: add DEBUG_UART support arch/arm/include/asm/xen/hypercall.h | 6 ++ drivers/serial/Kconfig | 14 +++--- drivers/serial/serial_xen.c | 22 -- include/xen/interface/xen.h | 6 ++ 4 files changed, 43 insertions(+), 5 deletions(-) -- 2.28.0
[PATCH 3/4] xen: add definitions for console_io
Those definitions added are used with HYPERVISOR_console_io(). Signed-off-by: AKASHI Takahiro --- include/xen/interface/xen.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/include/xen/interface/xen.h b/include/xen/interface/xen.h index eec8ab75b9ce..a7c8ed781b34 100644 --- a/include/xen/interface/xen.h +++ b/include/xen/interface/xen.h @@ -76,6 +76,12 @@ #define __HYPERVISOR_arch_6 54 #define __HYPERVISOR_arch_7 55 +/* + * Commands to HYPERVISOR_console_io(). + */ +#define CONSOLEIO_write 0 +#define CONSOLEIO_read 1 + #ifndef __ASSEMBLY__ typedef u16 domid_t; -- 2.28.0
[PATCH 2/4] arch: arm/xen: add putc() for debugging
This new function, xen_debug_putc(), is intended to be used to
enable CONFIG_DEBUG_UART on xen guest.
Please note that the underlying functionality in Xen is available
only when Xen is configured with !NDEBUG but is much simpler than
a generic HYPERVISOR_console_io().
Signed-off-by: AKASHI Takahiro
---
arch/arm/include/asm/xen/hypercall.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/include/asm/xen/hypercall.h
b/arch/arm/include/asm/xen/hypercall.h
index a4fd077079a9..121ccfcc608f 100644
--- a/arch/arm/include/asm/xen/hypercall.h
+++ b/arch/arm/include/asm/xen/hypercall.h
@@ -19,4 +19,10 @@ int HYPERVISOR_sched_op(int cmd, void *arg);
int HYPERVISOR_event_channel_op(int cmd, void *arg);
unsigned long HYPERVISOR_hvm_op(int op, void *arg);
int HYPERVISOR_memory_op(unsigned int cmd, void *arg);
+
+static inline void xen_debug_putc(int c)
+{
+ register int v __asm__ ("x0") = c;
+ __asm__ __volatile__("hvc 0xfffe" : "=r" (v) : "0" (v));
+}
#endif /* _ASM_ARM_XEN_HYPERCALL_H */
--
2.28.0
[PATCH 4/4] serial: serial_xen: add DEBUG_UART support
By using a hypervisor call, we can implement DEBUG_UART on xen.
This will allow us to see messages even earlier than serial_init().
Signed-off-by: AKASHI Takahiro
---
drivers/serial/Kconfig | 14 +++---
drivers/serial/serial_xen.c | 20
2 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index e344677f91f6..536cf0641773 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -401,11 +401,19 @@ config DEBUG_UART_MTK
driver will be available until the real driver model serial is
running.
+config DEBUG_UART_XEN
+ bool "XEN Hypervisor Console"
+ depends on XEN_SERIAL
+ help
+ Select this to enable a debug UART using the serial_xen driver. You
+ will not have to provide any parameters to make this work. The driver
+ will be available until the real driver-model serial is running.
+
endchoice
config DEBUG_UART_BASE
hex "Base address of UART"
- depends on DEBUG_UART
+ depends on DEBUG_UART && !DEBUG_UART_XEN
default 0 if DEBUG_UART_SANDBOX
help
This is the base address of your UART for memory-mapped UARTs.
@@ -415,7 +423,7 @@ config DEBUG_UART_BASE
config DEBUG_UART_CLOCK
int "UART input clock"
- depends on DEBUG_UART
+ depends on DEBUG_UART && !DEBUG_UART_XEN
default 0 if DEBUG_UART_SANDBOX
help
The UART input clock determines the speed of the internal UART
@@ -427,7 +435,7 @@ config DEBUG_UART_CLOCK
config DEBUG_UART_SHIFT
int "UART register shift"
- depends on DEBUG_UART
+ depends on DEBUG_UART && !DEBUG_UART_XEN
default 0 if DEBUG_UART
help
Some UARTs (notably ns16550) support different register layouts
diff --git a/drivers/serial/serial_xen.c b/drivers/serial/serial_xen.c
index ed191829f059..34c90ece40fc 100644
--- a/drivers/serial/serial_xen.c
+++ b/drivers/serial/serial_xen.c
@@ -5,6 +5,7 @@
*/
#include
#include
+#include
#include
#include
#include
@@ -15,11 +16,14 @@
#include
#include
+#include
#include
#include
#include
#include
+#include
+
DECLARE_GLOBAL_DATA_PTR;
u32 console_evtchn;
@@ -178,3 +182,19 @@ U_BOOT_DRIVER(serial_xen) = {
.flags = DM_FLAG_PRE_RELOC,
};
+#if defined(CONFIG_DEBUG_UART_XEN)
+static inline void _debug_uart_init(void) {}
+
+static inline void _debug_uart_putc(int c)
+{
+#if CONFIG_IS_ENABLED(ARM)
+ xen_debug_putc(c);
+#else
+ /* the type cast should work on LE only */
+ HYPERVISOR_console_io(CONSOLEIO_write, 1, (char *));
+#endif
+}
+
+DEBUG_UART_FUNCS
+
+#endif
--
2.28.0
Re: [PATCH 1/1] espresso7420: remove unused symbol CONFIG_DEFAULT_CONSOLE
Dear Heinrich Schuchardt, On Mon, 7 Sep 2020 at 14:13, Minkyu Kang wrote: > Dear Heinrich Schuchardt, > > On 07/09/2020 04:33, Heinrich Schuchardt wrote: > > On 9/6/20 9:00 PM, Andre Heider wrote: > >> On 05/09/2020 12:02, Heinrich Schuchardt wrote: > >>> Symbol CONFIG_DEFAULT_CONSOLE in include/configs/espresso7420.h is not > >>> used > >>> for espresso7420_defconfig. > >>> > >>> Signed-off-by: Heinrich Schuchardt > >> > >> I noticed that too while grepping for CONFIG_DEFAULT_CONSOLE. Afaict > >> there're quite some boards with it set but unused: > > > > Thanks for reviewing. As the boards have different maintainers we should > > treat them in separate patches. > > > > Because those are all Samsung boards, I can approve them. > If you want please send changes to patch-set or single patch with adding > maintainers as a CC. > > thomas.ab seems to exited from company. > I will find new maintainer soon. > > Thanks, > Minkyu Kang. > > Your patch was replaced by Heider's patch. I added your signed-off at that patch.
Re: [PATCH v8 2/9] dt-bindings: usb: mtu3: add bindings for MediaTek USB3 DRD
On Wed, Oct 14, 2020 at 3:08 PM Chunfeng Yun wrote:
>
> Add dt-binding for MediaTek USB3 DRD Driver which it's ported
which is
> from the Linux kernel DTS binding:
> Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
> Commit ID:
> 34d0545978b6 ("dt-bindings: usb: mtu3: fix typo of DMA clock name")
>
> Due to Dual-Role switch is not supported in Uboot, some properties
> are removed or changed.
>
> Signed-off-by: Chunfeng Yun
> ---
> v8: add commit ID the binding referenced suggested by Bin
>
> v5~v7: no changes
>
> v4: Add support host mode, introduce some new properties and subnode
>
> v2~v3: no changes
> ---
> .../usb/mediatek,mtu3.txt | 79 +++
> 1 file changed, 79 insertions(+)
> create mode 100644 doc/device-tree-bindings/usb/mediatek,mtu3.txt
>
Reviewed-by: Bin Meng
Re: [PATCH v8 5/9] usb: add MediaTek USB3 DRD driver
On Wed, Oct 14, 2020 at 3:08 PM Chunfeng Yun wrote: > > This patch adds support for the MediaTek USB3 DRD controller, > its host side is based on xHCI, this driver supports device mode > and host mode. > > Signed-off-by: Chunfeng Yun > --- > v8: Simplify Kconfig suggested by Bin > > v7: use xhci quirk flag XHCI_MTK_HOST > > v6: no changes > > v5: change condition of readl_poll_timeout() when check clocks > > v4: > 1. remove unused member @busy and @wedged, use their flags instead > 2. support force_vbus mode > 3. add a glue driver using UCLASS_NOP > 4. add host driver, and rebuild host flow > > v3 changes > 1. add ->udc_set_speed() > 2. simplify some code flow > > v2: simplify QMU operations > --- > Makefile | 1 + > drivers/usb/Kconfig| 2 + > drivers/usb/mtu3/Kconfig | 44 ++ > drivers/usb/mtu3/Makefile | 11 + > drivers/usb/mtu3/mtu3.h| 423 + > drivers/usb/mtu3/mtu3_core.c | 838 ++ > drivers/usb/mtu3/mtu3_dr.h | 52 ++ > drivers/usb/mtu3/mtu3_gadget.c | 686 + > drivers/usb/mtu3/mtu3_gadget_ep0.c | 933 + > drivers/usb/mtu3/mtu3_host.c | 141 + > drivers/usb/mtu3/mtu3_hw_regs.h| 515 > drivers/usb/mtu3/mtu3_plat.c | 368 > drivers/usb/mtu3/mtu3_qmu.c| 504 > drivers/usb/mtu3/mtu3_qmu.h| 37 ++ > 14 files changed, 4555 insertions(+) > create mode 100644 drivers/usb/mtu3/Kconfig > create mode 100644 drivers/usb/mtu3/Makefile > create mode 100644 drivers/usb/mtu3/mtu3.h > create mode 100644 drivers/usb/mtu3/mtu3_core.c > create mode 100644 drivers/usb/mtu3/mtu3_dr.h > create mode 100644 drivers/usb/mtu3/mtu3_gadget.c > create mode 100644 drivers/usb/mtu3/mtu3_gadget_ep0.c > create mode 100644 drivers/usb/mtu3/mtu3_host.c > create mode 100644 drivers/usb/mtu3/mtu3_hw_regs.h > create mode 100644 drivers/usb/mtu3/mtu3_plat.c > create mode 100644 drivers/usb/mtu3/mtu3_qmu.c > create mode 100644 drivers/usb/mtu3/mtu3_qmu.h > Acked-by: Bin Meng
Please pull u-boot-marvell/master
Hi Tom, please pull the first series of Marvell MVEBU related patches. Here the summary log: - Octeon TX: Add NAND driver (Suneel) - Octeon TX: Add NIC driver driver (Suneel) - Octeon TX2: Add NIC driver driver (Suneel) - Armada 8040: Add iEi Puzzle-M80 board support (Luka) - Armada A37xx SPI: Add support for CS-GPIO (George) - Espressobin: Use Linux model/compatible strings (Andre) - Espressobin: Add armada-3720-espressobin-emmc.dts from Linux (Andre) - Armada A37xx: Small cleanup of config header (Pali) Here the Azure build, without any issues: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=56=results Thanks, Stefan The following changes since commit 55fca74a5ba9bb0a101b247f421e81322b945a7b: Merge branch '2020-10-12-assorted-encryption-changes' (2020-10-13 10:04:17 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-marvell.git for you to fetch changes up to 8369886b401d85e49d52ff5f877cf14b1619bd43: arm: mvebu: Remove old comments from configs/mvebu_armada-37xx.h file (2020-10-14 07:56:17 +0200) Andre Heider (3): arm64: dts: armada-3720-espressobin: use Linux model/compatible strings arm64: dts: armada-3720-espressobin: split common parts to .dtsi arm64: dts: a3720: add support for espressobin with populated emmc George Hilliard (1): spi: mvebu_a3700_spi: add support for cs-gpios Luka Kovacic (2): arm: mvebu: Initial iEi Puzzle-M801 support arm: mvebu: mvebu_armada-8k: Add support for initializing iEi Puzzle-M801 networking Pali Rohár (1): arm: mvebu: Remove old comments from configs/mvebu_armada-37xx.h file Suneel Garapati (3): mtd: nand: Add NAND controller driver for OcteonTX net: Add NIC controller driver for OcteonTX net: Add NIC controller driver for OcteonTX2 arch/arm/dts/Makefile |2 + arch/arm/dts/armada-3720-espressobin-emmc.dts | 44 + arch/arm/dts/armada-3720-espressobin.dts | 168 +- arch/arm/dts/armada-3720-espressobin.dtsi | 167 ++ arch/arm/dts/armada-8040-puzzle-m801.dts | 389 + board/Marvell/mvebu_armada-37xx/board.c |8 +- board/Marvell/mvebu_armada-8k/MAINTAINERS |6 + board/Marvell/mvebu_armada-8k/board.c | 20 +- configs/mvebu_puzzle-m801-88f8040_defconfig | 91 + doc/README.marvell|7 +- drivers/mtd/nand/raw/Kconfig | 16 + drivers/mtd/nand/raw/Makefile |2 + drivers/mtd/nand/raw/octeontx_bch.c | 425 + drivers/mtd/nand/raw/octeontx_bch.h | 131 ++ drivers/mtd/nand/raw/octeontx_bch_regs.h | 167 ++ drivers/mtd/nand/raw/octeontx_nand.c | 2257 + drivers/net/Kconfig | 31 + drivers/net/Makefile |4 + drivers/net/octeontx/Makefile |7 + drivers/net/octeontx/bgx.c| 1565 + drivers/net/octeontx/bgx.h| 259 +++ drivers/net/octeontx/nic.h| 508 ++ drivers/net/octeontx/nic_main.c | 778 + drivers/net/octeontx/nic_reg.h| 250 +++ drivers/net/octeontx/nicvf_main.c | 581 +++ drivers/net/octeontx/nicvf_queues.c | 1140 + drivers/net/octeontx/nicvf_queues.h | 353 drivers/net/octeontx/q_struct.h | 695 drivers/net/octeontx/smi.c| 380 + drivers/net/octeontx/xcv.c| 124 ++ drivers/net/octeontx2/Makefile|8 + drivers/net/octeontx2/cgx.c | 296 drivers/net/octeontx2/cgx.h | 105 ++ drivers/net/octeontx2/cgx_intf.c | 715 drivers/net/octeontx2/cgx_intf.h | 448 + drivers/net/octeontx2/lmt.h | 49 + drivers/net/octeontx2/nix.c | 831 + drivers/net/octeontx2/nix.h | 353 drivers/net/octeontx2/nix_af.c| 1102 drivers/net/octeontx2/npc.h | 90 + drivers/net/octeontx2/rvu.h | 119 ++ drivers/net/octeontx2/rvu_af.c| 171 ++ drivers/net/octeontx2/rvu_common.c| 71 + drivers/net/octeontx2/rvu_pf.c| 116 ++ drivers/spi/mvebu_a3700_spi.c | 41 +- include/configs/mvebu_armada-37xx.h |7 - 46 files changed, 14918 insertions(+), 179 deletions(-) create mode 100644 arch/arm/dts/armada-3720-espressobin-emmc.dts create mode 100644 arch/arm/dts/armada-3720-espressobin.dtsi create mode 100644
Re: [PATCH] arm: mvebu: Remove old comments from configs/mvebu_armada-37xx.h file
On 05.10.20 12:17, Pali Rohár wrote:
These comments are relict for old, now removed config options.
So remove these obsoleted comments too.
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
Stefan
---
include/configs/mvebu_armada-37xx.h | 7 ---
1 file changed, 7 deletions(-)
diff --git a/include/configs/mvebu_armada-37xx.h
b/include/configs/mvebu_armada-37xx.h
index 27428d5a0f..0d585606a7 100644
--- a/include/configs/mvebu_armada-37xx.h
+++ b/include/configs/mvebu_armada-37xx.h
@@ -17,8 +17,6 @@
#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */
-/* auto boot */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
115200, 230400, 460800, 921600 }
@@ -57,11 +55,8 @@
/*
* SPI Flash configuration
*/
-
#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
-/* Environment in SPI NOR flash */
-
/*
* Ethernet Driver configuration
*/
@@ -70,8 +65,6 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
-/* USB ethernet */
-
/*
* SATA/SCSI/AHCI configuration
*/
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
[PATCH 3/3] arm64: zynqmp: Add support for SHA3 command
From: T Karthik Reddy
This patch adds support for SHA3 command. It takes data blob
as input and generates 48 bytes sha3 hash value.
Signed-off-by: T Karthik Reddy
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
arch/arm/mach-zynqmp/include/mach/sys_proto.h | 5 ++
board/xilinx/zynqmp/cmds.c| 63 +++
2 files changed, 68 insertions(+)
diff --git a/arch/arm/mach-zynqmp/include/mach/sys_proto.h
b/arch/arm/mach-zynqmp/include/mach/sys_proto.h
index d52eccc7e6e8..1c12eac715e5 100644
--- a/arch/arm/mach-zynqmp/include/mach/sys_proto.h
+++ b/arch/arm/mach-zynqmp/include/mach/sys_proto.h
@@ -15,6 +15,11 @@
#define PRIV_EXPO_LEN 512
#define PUB_EXPO_LEN 4
+#define ZYNQMP_SHA3_INIT 1
+#define ZYNQMP_SHA3_UPDATE 2
+#define ZYNQMP_SHA3_FINAL 4
+#define ZYNQMP_SHA3_SIZE 48
+
#define ZYNQMP_FPGA_BIT_AUTH_DDR 1
#define ZYNQMP_FPGA_BIT_AUTH_OCM 2
#define ZYNQMP_FPGA_BIT_ENC_USR_KEY3
diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c
index f5fd85ccf7af..caddb64b820e 100644
--- a/board/xilinx/zynqmp/cmds.c
+++ b/board/xilinx/zynqmp/cmds.c
@@ -282,6 +282,64 @@ static int do_zynqmp_rsa(cmd_tbl_t *cmdtp, int flag, int
argc,
return CMD_RET_SUCCESS;
}
+static int do_zynqmp_sha3(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ u64 srcaddr;
+ u32 srclen, ret_payload[PAYLOAD_ARG_CNT];
+ int ret;
+
+ if (argc != cmdtp->maxargs)
+ return CMD_RET_USAGE;
+
+ if (zynqmp_firmware_version() <= PMUFW_V1_0) {
+ puts("ERR: PMUFW v1.0 or less is detected\n");
+ puts("ERR: Encrypt/Decrypt feature is not supported\n");
+ puts("ERR: Please upgrade PMUFW\n");
+ return CMD_RET_FAILURE;
+ }
+
+ srcaddr = simple_strtoul(argv[2], NULL, 16);
+ srclen = simple_strtoul(argv[3], NULL, 16);
+
+ /* Check srcaddr or srclen != 0 */
+ if (!srcaddr || !srclen) {
+ puts("ERR: srcaddr & srclen should not be 0\n");
+ return CMD_RET_USAGE;
+ }
+
+ flush_dcache_range(srcaddr,
+ srcaddr + roundup(srclen, ARCH_DMA_MINALIGN));
+
+ ret = xilinx_pm_request(PM_SECURE_SHA, 0, 0, 0,
+ ZYNQMP_SHA3_INIT, ret_payload);
+ if (ret || ret_payload[1]) {
+ printf("Failed: SHA INIT status:0x%x, errcode:0x%x\n",
+ ret, ret_payload[1]);
+ return CMD_RET_FAILURE;
+ }
+
+ ret = xilinx_pm_request(PM_SECURE_SHA, upper_32_bits((ulong)srcaddr),
+ lower_32_bits((ulong)srcaddr),
+ srclen, ZYNQMP_SHA3_UPDATE, ret_payload);
+ if (ret || ret_payload[1]) {
+ printf("Failed: SHA UPDATE status:0x%x, errcode:0x%x\n",
+ ret, ret_payload[1]);
+ return CMD_RET_FAILURE;
+ }
+
+ ret = xilinx_pm_request(PM_SECURE_SHA, upper_32_bits((ulong)srcaddr),
+ lower_32_bits((ulong)srcaddr), ZYNQMP_SHA3_SIZE,
+ ZYNQMP_SHA3_FINAL, ret_payload);
+ if (ret || ret_payload[1]) {
+ printf("Failed: SHA FINAL status:0x%x, errcode:0x%x\n",
+ ret, ret_payload[1]);
+ return CMD_RET_FAILURE;
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
static struct cmd_tbl cmd_zynqmp_sub[] = {
U_BOOT_CMD_MKENT(secure, 5, 0, do_zynqmp_verify_secure, "", ""),
U_BOOT_CMD_MKENT(pmufw, 4, 0, do_zynqmp_pmufw, "", ""),
@@ -289,6 +347,7 @@ static struct cmd_tbl cmd_zynqmp_sub[] = {
U_BOOT_CMD_MKENT(mmio_write, 5, 0, do_zynqmp_mmio_write, "", ""),
U_BOOT_CMD_MKENT(aes, 9, 0, do_zynqmp_aes, "", ""),
U_BOOT_CMD_MKENT(rsa, 7, 0, do_zynqmp_rsa, "", ""),
+ U_BOOT_CMD_MKENT(sha3, 4, 0, do_zynqmp_sha3, "", ""),
#ifdef CONFIG_DEFINE_TCM_OCM_MMAP
U_BOOT_CMD_MKENT(tcminit, 3, 0, do_zynqmp_tcm_init, "", ""),
#endif
@@ -356,6 +415,10 @@ static char zynqmp_help_text[] =
" exp : private key exponent for RSA decryption(4096 bits)\n"
" public key exponent for RSA encryption(32 bits)\n"
" rsaop : 0 for RSA Decryption, 1 for RSA Encryption\n"
+ "zynqmp sha3 srcaddr srclen\n"
+ " Generates sha3 hash value for data blob at srcaddr and puts\n"
+ " 48 bytes hash value into srcaddr\n"
+ " Note: srcaddr/srclen should not be 0\n"
;
#endif
--
2.28.0
[PATCH 1/3] arm64: zynqmp: Add support for encryption and decryption on data blob
From: Siva Durga Prasad Paladugu
This patch adds support for encryption and decryption on a given data
blob using different key sources such as userkey(KUP), device key and
PUF key. Inorder to support this a new zynqmp command(zynqmp aes) has
been introduced.
Command:
zynqmp aes srcaddr ivaddr len aesop keysrc dstaddr [keyaddr]\n"
Encrypts or decrypts blob of data at src address and puts it\n"
back to dstaddr using key and iv at keyaddr and ivaddr\n"
respectively. keysrc values specifies from which source key\n"
has to be used, it can be User/Device/PUF key. A value of 0\n"
for KUP(user key),1 for DeviceKey and 2 for PUF key. The\n"
aesop value would specify the operationwhich can be 0 for\n"
decrypt and 1 for encrypt(1) operation\n";
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
arch/arm/mach-zynqmp/include/mach/sys_proto.h | 1 +
board/xilinx/zynqmp/cmds.c| 82 ++-
2 files changed, 82 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-zynqmp/include/mach/sys_proto.h
b/arch/arm/mach-zynqmp/include/mach/sys_proto.h
index f2b3ceab1358..df944bde09eb 100644
--- a/arch/arm/mach-zynqmp/include/mach/sys_proto.h
+++ b/arch/arm/mach-zynqmp/include/mach/sys_proto.h
@@ -9,6 +9,7 @@
#define ZYNQMP_CSU_SILICON_VER_MASK0xF
#define KEY_PTR_LEN32
+#define IV_SIZE12
#define ZYNQMP_FPGA_BIT_AUTH_DDR 1
#define ZYNQMP_FPGA_BIT_AUTH_OCM 2
diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c
index c0d28a73e45d..b52f79a1717b 100644
--- a/board/xilinx/zynqmp/cmds.c
+++ b/board/xilinx/zynqmp/cmds.c
@@ -9,11 +9,22 @@
#include
#include
#include
+#include
#include
#include
#include
#include
+struct aes {
+ u64 srcaddr;
+ u64 ivaddr;
+ u64 keyaddr;
+ u64 dstaddr;
+ u64 len;
+ u64 op;
+ u64 keysrc;
+};
+
static int do_zynqmp_verify_secure(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
@@ -107,6 +118,66 @@ static int do_zynqmp_mmio_write(struct cmd_tbl *cmdtp, int
flag, int argc,
return ret;
}
+static int do_zynqmp_aes(cmd_tbl_t *cmdtp, int flag, int argc,
+char * const argv[])
+{
+ ALLOC_CACHE_ALIGN_BUFFER(struct aes, aes, 1);
+ int ret;
+ u32 ret_payload[PAYLOAD_ARG_CNT];
+
+ if (zynqmp_firmware_version() <= PMUFW_V1_0) {
+ puts("ERR: PMUFW v1.0 or less is detected\n");
+ puts("ERR: Encrypt/Decrypt feature is not supported\n");
+ puts("ERR: Please upgrade PMUFW\n");
+ return CMD_RET_FAILURE;
+ }
+
+ if (argc < cmdtp->maxargs - 1)
+ return CMD_RET_USAGE;
+
+ aes->srcaddr = simple_strtoul(argv[2], NULL, 16);
+ aes->ivaddr = simple_strtoul(argv[3], NULL, 16);
+ aes->len = simple_strtoul(argv[4], NULL, 16);
+ aes->op = simple_strtoul(argv[5], NULL, 16);
+ aes->keysrc = simple_strtoul(argv[6], NULL, 16);
+ aes->dstaddr = simple_strtoul(argv[7], NULL, 16);
+
+ flush_dcache_range((ulong)aes, (ulong)(aes) +
+ roundup(sizeof(struct aes), ARCH_DMA_MINALIGN));
+
+ if (aes->srcaddr && aes->ivaddr && aes->dstaddr) {
+ flush_dcache_range(aes->srcaddr,
+ (aes->srcaddr +
+ roundup(aes->len, ARCH_DMA_MINALIGN)));
+ flush_dcache_range(aes->ivaddr,
+ (aes->ivaddr +
+ roundup(IV_SIZE, ARCH_DMA_MINALIGN)));
+ flush_dcache_range(aes->dstaddr,
+ (aes->dstaddr +
+ roundup(aes->len, ARCH_DMA_MINALIGN)));
+ }
+
+ if (aes->keysrc == 0) {
+ if (argc < cmdtp->maxargs)
+ return CMD_RET_USAGE;
+
+ aes->keyaddr = simple_strtoul(argv[8], NULL, 16);
+ if (aes->keyaddr)
+ flush_dcache_range(aes->keyaddr,
+ (aes->keyaddr +
+ roundup(KEY_PTR_LEN,
+ ARCH_DMA_MINALIGN)));
+ }
+
+ ret = xilinx_pm_request(PM_SECURE_AES, upper_32_bits((ulong)aes),
+ lower_32_bits((ulong)aes), 0, 0, ret_payload);
+ if (ret || ret_payload[1])
+ printf("Failed: AES op status:0x%x, errcode:0x%x\n",
+ ret, ret_payload[1]);
+
+ return ret;
+}
+
#ifdef CONFIG_DEFINE_TCM_OCM_MMAP
static int do_zynqmp_tcm_init(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
@@ -153,6 +224,7 @@ static struct cmd_tbl cmd_zynqmp_sub[] = {
U_BOOT_CMD_MKENT(pmufw, 4, 0, do_zynqmp_pmufw, "", ""),
[PATCH 2/3] arm64: zynqmp: Add support for RSA command
From: T Karthik Reddy
This patch adds support for RSA command, performs RSA encrypt &
RSA decrypt on data blob of key size.
Signed-off-by: T Karthik Reddy
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
arch/arm/mach-zynqmp/include/mach/sys_proto.h | 4 ++
board/xilinx/zynqmp/cmds.c| 72 +++
2 files changed, 76 insertions(+)
diff --git a/arch/arm/mach-zynqmp/include/mach/sys_proto.h
b/arch/arm/mach-zynqmp/include/mach/sys_proto.h
index df944bde09eb..d52eccc7e6e8 100644
--- a/arch/arm/mach-zynqmp/include/mach/sys_proto.h
+++ b/arch/arm/mach-zynqmp/include/mach/sys_proto.h
@@ -10,6 +10,10 @@
#define ZYNQMP_CSU_SILICON_VER_MASK0xF
#define KEY_PTR_LEN32
#define IV_SIZE12
+#define RSA_KEY_SIZE 512
+#define MODULUS_LEN512
+#define PRIV_EXPO_LEN 512
+#define PUB_EXPO_LEN 4
#define ZYNQMP_FPGA_BIT_AUTH_DDR 1
#define ZYNQMP_FPGA_BIT_AUTH_OCM 2
diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c
index b52f79a1717b..f5fd85ccf7af 100644
--- a/board/xilinx/zynqmp/cmds.c
+++ b/board/xilinx/zynqmp/cmds.c
@@ -219,12 +219,76 @@ static int do_zynqmp_pmufw(struct cmd_tbl *cmdtp, int
flag, int argc,
return 0;
}
+static int do_zynqmp_rsa(cmd_tbl_t *cmdtp, int flag, int argc,
+char * const argv[])
+{
+ u64 srcaddr, mod, exp;
+ u32 srclen, rsaop, size, ret_payload[PAYLOAD_ARG_CNT];
+ int ret;
+
+ if (argc != cmdtp->maxargs)
+ return CMD_RET_USAGE;
+
+ if (zynqmp_firmware_version() <= PMUFW_V1_0) {
+ puts("ERR: PMUFW v1.0 or less is detected\n");
+ puts("ERR: Encrypt/Decrypt feature is not supported\n");
+ puts("ERR: Please upgrade PMUFW\n");
+ return CMD_RET_FAILURE;
+ }
+
+ srcaddr = simple_strtoul(argv[2], NULL, 16);
+ srclen = simple_strtoul(argv[3], NULL, 16);
+ if (srclen != RSA_KEY_SIZE) {
+ puts("ERR: srclen should be equal to 0x200(512 bytes)\n");
+ return CMD_RET_USAGE;
+ }
+
+ mod = simple_strtoul(argv[4], NULL, 16);
+ exp = simple_strtoul(argv[5], NULL, 16);
+ rsaop = simple_strtoul(argv[6], NULL, 16);
+ if (!(rsaop == 0 || rsaop == 1)) {
+ puts("ERR: rsaop should be either 0 or 1\n");
+ return CMD_RET_USAGE;
+ }
+
+ memcpy((void *)srcaddr + srclen, (void *)mod, MODULUS_LEN);
+
+ /*
+* For encryption we load public exponent (key size 4096-bits),
+* for decryption we load private exponent (32-bits)
+*/
+ if (rsaop) {
+ memcpy((void *)srcaddr + srclen + MODULUS_LEN,
+ (void *)exp, PUB_EXPO_LEN);
+ size = srclen + MODULUS_LEN + PUB_EXPO_LEN;
+ } else {
+ memcpy((void *)srcaddr + srclen + MODULUS_LEN,
+ (void *)exp, PRIV_EXPO_LEN);
+ size = srclen + MODULUS_LEN + PRIV_EXPO_LEN;
+ }
+
+ flush_dcache_range((ulong)srcaddr,
+ (ulong)(srcaddr) + roundup(size, ARCH_DMA_MINALIGN));
+
+ ret = xilinx_pm_request(PM_SECURE_RSA, upper_32_bits((ulong)srcaddr),
+ lower_32_bits((ulong)srcaddr), srclen, rsaop,
+ ret_payload);
+ if (ret || ret_payload[1]) {
+ printf("Failed: RSA status:0x%x, errcode:0x%x\n",
+ ret, ret_payload[1]);
+ return CMD_RET_FAILURE;
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
static struct cmd_tbl cmd_zynqmp_sub[] = {
U_BOOT_CMD_MKENT(secure, 5, 0, do_zynqmp_verify_secure, "", ""),
U_BOOT_CMD_MKENT(pmufw, 4, 0, do_zynqmp_pmufw, "", ""),
U_BOOT_CMD_MKENT(mmio_read, 3, 0, do_zynqmp_mmio_read, "", ""),
U_BOOT_CMD_MKENT(mmio_write, 5, 0, do_zynqmp_mmio_write, "", ""),
U_BOOT_CMD_MKENT(aes, 9, 0, do_zynqmp_aes, "", ""),
+ U_BOOT_CMD_MKENT(rsa, 7, 0, do_zynqmp_rsa, "", ""),
#ifdef CONFIG_DEFINE_TCM_OCM_MMAP
U_BOOT_CMD_MKENT(tcminit, 3, 0, do_zynqmp_tcm_init, "", ""),
#endif
@@ -284,6 +348,14 @@ static char zynqmp_help_text[] =
" lock(0)/split(1)\n"
#endif
"zynqmp pmufw address size - load PMU FW configuration object\n"
+ "zynqmp rsa srcaddr srclen mod exp rsaop\n"
+ " Performs RSA encryption and RSA decryption on blob of data\n"
+ " at srcaddr and puts it back in srcaddr using modulus and\n"
+ " public or private exponent\n"
+ " srclen : must be key size(4096 bits)\n"
+ " exp : private key exponent for RSA decryption(4096 bits)\n"
+ " public key exponent for RSA encryption(32 bits)\n"
+ " rsaop : 0 for RSA Decryption, 1 for RSA Encryption\n"
;
#endif
--
2.28.0
[PATCH 0/3] arm: zynqmp: Add zynqmp specific command for security features
Hi, the series is adding support for security features on zynqmp devices. Thanks, Michal Siva Durga Prasad Paladugu (1): arm64: zynqmp: Add support for encryption and decryption on data blob T Karthik Reddy (2): arm64: zynqmp: Add support for RSA command arm64: zynqmp: Add support for SHA3 command arch/arm/mach-zynqmp/include/mach/sys_proto.h | 10 + board/xilinx/zynqmp/cmds.c| 217 +- 2 files changed, 226 insertions(+), 1 deletion(-) -- 2.28.0
[PATCH] serial: pl01x: Add error value checking
There also a need to check return values to make sure that clocks were
enabled and setup properly.
Signed-off-by: Michal Simek
---
drivers/serial/serial_pl01x.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index 2772c25f1d2d..8672095ea4de 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -362,8 +362,18 @@ int pl01x_serial_ofdata_to_platdata(struct udevice *dev)
plat->clock = dev_read_u32_default(dev, "clock", CONFIG_PL011_CLOCK);
ret = clk_get_by_index(dev, 0, );
if (!ret) {
- clk_enable();
+ ret = clk_enable();
+ if (ret && ret != -ENOSYS) {
+ dev_err(dev, "failed to enable clock\n");
+ return ret;
+ }
+
plat->clock = clk_get_rate();
+ if (IS_ERR_VALUE(plat->clock)) {
+ dev_err(dev, "failed to get rate\n");
+ return plat->clock;
+ }
+ debug("%s: CLK %d\n", __func__, plat->clock);
}
plat->type = dev_get_driver_data(dev);
plat->skip_init = dev_read_bool(dev, "skip-init");
--
2.28.0
[PATCH] xilinx: zynqmp: Add support for saving sha3 key to different address
By default 48B sha3 hash value is written to srcaddr which is not the best
solution in case of that you want to use data for other operations. That's
why add key_addr optional parameters which enables to write 48B sha3 hash
value to specified address.
Signed-off-by: Michal Simek
Tested-by: Ashok Reddy Soma
---
Based on https://lists.denx.de/pipermail/u-boot/2020-October/429294.html
series.
---
board/xilinx/zynqmp/cmds.c | 25 ++---
1 file changed, 18 insertions(+), 7 deletions(-)
diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c
index caddb64b820e..8430a23eb32c 100644
--- a/board/xilinx/zynqmp/cmds.c
+++ b/board/xilinx/zynqmp/cmds.c
@@ -285,11 +285,11 @@ static int do_zynqmp_rsa(cmd_tbl_t *cmdtp, int flag, int
argc,
static int do_zynqmp_sha3(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
{
- u64 srcaddr;
+ u64 srcaddr, hashaddr;
u32 srclen, ret_payload[PAYLOAD_ARG_CNT];
int ret;
- if (argc != cmdtp->maxargs)
+ if (argc > cmdtp->maxargs || argc < (cmdtp->maxargs - 1))
return CMD_RET_USAGE;
if (zynqmp_firmware_version() <= PMUFW_V1_0) {
@@ -302,6 +302,15 @@ static int do_zynqmp_sha3(cmd_tbl_t *cmdtp, int flag,
srcaddr = simple_strtoul(argv[2], NULL, 16);
srclen = simple_strtoul(argv[3], NULL, 16);
+ if (argc == 5) {
+ hashaddr = simple_strtoul(argv[4], NULL, 16);
+ flush_dcache_range(hashaddr,
+ hashaddr + roundup(ZYNQMP_SHA3_SIZE,
+ ARCH_DMA_MINALIGN));
+ } else {
+ hashaddr = srcaddr;
+ }
+
/* Check srcaddr or srclen != 0 */
if (!srcaddr || !srclen) {
puts("ERR: srcaddr & srclen should not be 0\n");
@@ -328,9 +337,10 @@ static int do_zynqmp_sha3(cmd_tbl_t *cmdtp, int flag,
return CMD_RET_FAILURE;
}
- ret = xilinx_pm_request(PM_SECURE_SHA, upper_32_bits((ulong)srcaddr),
- lower_32_bits((ulong)srcaddr), ZYNQMP_SHA3_SIZE,
- ZYNQMP_SHA3_FINAL, ret_payload);
+ ret = xilinx_pm_request(PM_SECURE_SHA, upper_32_bits((ulong)hashaddr),
+ lower_32_bits((ulong)hashaddr),
+ ZYNQMP_SHA3_SIZE, ZYNQMP_SHA3_FINAL,
+ ret_payload);
if (ret || ret_payload[1]) {
printf("Failed: SHA FINAL status:0x%x, errcode:0x%x\n",
ret, ret_payload[1]);
@@ -347,7 +357,7 @@ static struct cmd_tbl cmd_zynqmp_sub[] = {
U_BOOT_CMD_MKENT(mmio_write, 5, 0, do_zynqmp_mmio_write, "", ""),
U_BOOT_CMD_MKENT(aes, 9, 0, do_zynqmp_aes, "", ""),
U_BOOT_CMD_MKENT(rsa, 7, 0, do_zynqmp_rsa, "", ""),
- U_BOOT_CMD_MKENT(sha3, 4, 0, do_zynqmp_sha3, "", ""),
+ U_BOOT_CMD_MKENT(sha3, 5, 0, do_zynqmp_sha3, "", ""),
#ifdef CONFIG_DEFINE_TCM_OCM_MMAP
U_BOOT_CMD_MKENT(tcminit, 3, 0, do_zynqmp_tcm_init, "", ""),
#endif
@@ -415,9 +425,10 @@ static char zynqmp_help_text[] =
" exp : private key exponent for RSA decryption(4096 bits)\n"
" public key exponent for RSA encryption(32 bits)\n"
" rsaop : 0 for RSA Decryption, 1 for RSA Encryption\n"
- "zynqmp sha3 srcaddr srclen\n"
+ "zynqmp sha3 srcaddr srclen [key_addr]\n"
" Generates sha3 hash value for data blob at srcaddr and puts\n"
" 48 bytes hash value into srcaddr\n"
+ " Optional key_addr can be specified for saving sha3 hash value\n"
" Note: srcaddr/srclen should not be 0\n"
;
#endif
--
2.28.0
[PATCH 18/33] clk: clk_stm32f: migrate trace to dev and log macro
Change debug and pr_ macro to dev macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay
---
drivers/clk/clk_stm32f.c | 39 ---
1 file changed, 20 insertions(+), 19 deletions(-)
diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
index 93722f74ae..cd1b8fe0da 100644
--- a/drivers/clk/clk_stm32f.c
+++ b/drivers/clk/clk_stm32f.c
@@ -4,18 +4,19 @@
* Author(s): Vikas Manocha, for STMicroelectronics.
*/
+#define LOG_CATEGORY UCLASS_CLK
+
#include
#include
#include
#include
#include
-#include
-
#include
#include
#include
-
+#include
#include
+#include
#define RCC_CR_HSION BIT(0)
#define RCC_CR_HSEON BIT(16)
@@ -309,7 +310,7 @@ static unsigned long stm32_clk_get_pllsai_rate(struct
stm32_clk *priv,
>> RCC_PLLSAICFGR_PLLSAIR_SHIFT;
break;
default:
- pr_err("incorrect PLLSAI output %d\n", output);
+ log_err("incorrect PLLSAI output %d\n", output);
return -EINVAL;
}
@@ -490,7 +491,7 @@ static ulong stm32_clk_get_rate(struct clk *clk)
return (sysclk >> stm32_get_apb_shift(regs, APB2));
default:
- pr_err("clock index %ld out of range\n", clk->id);
+ dev_err(clk->dev, "clock index %ld out of range\n", clk->id);
return -EINVAL;
}
}
@@ -509,8 +510,9 @@ static ulong stm32_set_rate(struct clk *clk, ulong rate)
/* Only set_rate for LTDC clock is implemented */
if (clk->id != STM32F7_APB2_CLOCK(LTDC)) {
- pr_err("set_rate not implemented for clock index %ld\n",
- clk->id);
+ dev_err(clk->dev,
+ "set_rate not implemented for clock index %ld\n",
+ clk->id);
return 0;
}
@@ -604,8 +606,8 @@ static int stm32_clk_enable(struct clk *clk)
u32 offset = clk->id / 32;
u32 bit_index = clk->id % 32;
- debug("%s: clkid = %ld, offset from AHB1ENR is %d, bit_index = %d\n",
- __func__, clk->id, offset, bit_index);
+ dev_dbg(clk->dev, "clkid = %ld, offset from AHB1ENR is %d, bit_index =
%d\n",
+ clk->id, offset, bit_index);
setbits_le32(>ahb1enr + offset, BIT(bit_index));
return 0;
@@ -618,7 +620,7 @@ static int stm32_clk_probe(struct udevice *dev)
struct clk clk;
int err;
- debug("%s\n", __func__);
+ dev_dbg(dev, "%s\n", __func__);
struct stm32_clk *priv = dev_get_priv(dev);
fdt_addr_t addr;
@@ -652,14 +654,14 @@ static int stm32_clk_probe(struct udevice *dev)
_clock_dev);
if (err) {
- pr_err("Can't find fixed clock (%d)", err);
+ dev_err(dev, "Can't find fixed clock (%d)", err);
return err;
}
err = clk_request(fixed_clock_dev, );
if (err) {
- pr_err("Can't request %s clk (%d)", fixed_clock_dev->name,
- err);
+ dev_err(dev, "Can't request %s clk (%d)",
+ fixed_clock_dev->name, err);
return err;
}
@@ -673,8 +675,8 @@ static int stm32_clk_probe(struct udevice *dev)
priv->hse_rate = clk_get_rate();
if (priv->hse_rate < 100) {
- pr_err("%s: unexpected HSE clock rate = %ld \"n", __func__,
- priv->hse_rate);
+ dev_err(dev, "unexpected HSE clock rate = %ld \"n",
+ priv->hse_rate);
return -EINVAL;
}
@@ -684,8 +686,7 @@ static int stm32_clk_probe(struct udevice *dev)
err = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0,
);
if (err) {
- debug("%s: can't find syscon device (%d)\n", __func__,
- err);
+ dev_err(dev, "can't find syscon device (%d)\n", err);
return err;
}
@@ -699,10 +700,10 @@ static int stm32_clk_probe(struct udevice *dev)
static int stm32_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args
*args)
{
- debug("%s(clk=%p)\n", __func__, clk);
+ dev_dbg(clk->dev, "clk=%p\n", clk);
if (args->args_count != 2) {
- debug("Invaild args_count: %d\n", args->args_count);
+ dev_dbg(clk->dev, "Invaild args_count: %d\n", args->args_count);
return -EINVAL;
}
--
2.17.1
[PATCH 16/33] misc: rcc: keep the rcc device name for subnode
Update the name associated with the RCC drivers to avoid duplicated name with the driver name. With this patch the traces displayed with log macro provide a correct device name. The rcc device name before the patch is: Class Index Probed DriverName --- root 0 [ + ] root_driver root_driver simple_bus0 [ + ] simple_bus|-- soc (...) nop 0 [ + ] stm32-rcc | |-- rcc@5000 clk 0 [ + ] stm32mp1_clk | | |-- stm32mp1_clk reset 0 [ + ] stm32_rcc_reset | | `-- stm32_rcc_reset And they become: (...) nop 0 [ + ] stm32-rcc | |-- rcc@5000 clk 0 [ + ] stm32mp1_clk | | |-- rcc@5000 reset 0 [ + ] stm32_rcc_reset | | `-- rcc@5000 The traces is correct: stm32mp1_clk rcc@stm32mp1_clk: . => stm32mp1_clk rcc@5000: . Signed-off-by: Patrick Delaunay --- drivers/misc/stm32_rcc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c index c1a99d78e2..e46685f0e1 100644 --- a/drivers/misc/stm32_rcc.c +++ b/drivers/misc/stm32_rcc.c @@ -54,7 +54,7 @@ static int stm32_rcc_bind(struct udevice *dev) return -ENOENT; } - ret = device_bind_with_driver_data(dev, drv, rcc_clk->drv_name, + ret = device_bind_with_driver_data(dev, drv, dev->name, rcc_clk->soc, dev_ofnode(dev), ); @@ -67,7 +67,7 @@ static int stm32_rcc_bind(struct udevice *dev) return -ENOENT; } - return device_bind_with_driver_data(dev, drv, "stm32_rcc_reset", + return device_bind_with_driver_data(dev, drv, dev->name, rcc_clk->soc, dev_ofnode(dev), ); } -- 2.17.1
[PATCH 17/33] clk: stm32mp1: migrate trace to dev and log macro
Change debug and pr_ macro to dev macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay
---
drivers/clk/clk_stm32mp1.c | 147 ++---
1 file changed, 71 insertions(+), 76 deletions(-)
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
index c8840b9e5f..aca4db9946 100644
--- a/drivers/clk/clk_stm32mp1.c
+++ b/drivers/clk/clk_stm32mp1.c
@@ -3,6 +3,8 @@
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
*/
+#define LOG_CATEGORY UCLASS_CLK
+
#include
#include
#include
@@ -14,12 +16,13 @@
#include
#include
#include
-#include
-#include
-#include
#include
+#include
#include
#include
+#include
+#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -781,7 +784,7 @@ static const struct stm32mp1_clk_data stm32mp1_data = {
static ulong stm32mp1_clk_get_fixed(struct stm32mp1_clk_priv *priv, int idx)
{
if (idx >= NB_OSC) {
- debug("%s: clk id %d not found\n", __func__, idx);
+ log_debug("clk id %d not found\n", idx);
return 0;
}
@@ -799,7 +802,7 @@ static int stm32mp1_clk_get_id(struct stm32mp1_clk_priv
*priv, unsigned long id)
}
if (i == nb_clks) {
- printf("%s: clk id %d not found\n", __func__, (u32)id);
+ log_err("clk id %d not found\n", (u32)id);
return -EINVAL;
}
@@ -812,8 +815,7 @@ static int stm32mp1_clk_get_sel(struct stm32mp1_clk_priv
*priv,
const struct stm32mp1_clk_gate *gate = priv->data->gate;
if (gate[i].sel > _PARENT_SEL_NB) {
- printf("%s: parents for clk id %d not found\n",
- __func__, i);
+ log_err("parents for clk id %d not found\n", i);
return -EINVAL;
}
@@ -858,17 +860,14 @@ static int stm32mp1_clk_get_parent(struct
stm32mp1_clk_priv *priv,
p = (readl(priv->base + sel[s].offset) >> sel[s].src) & sel[s].msk;
if (p < sel[s].nb_parent) {
-#ifdef DEBUG
- debug("%s: %s clock is the parent %s of clk id %d\n", __func__,
- stm32mp1_clk_parent_name[sel[s].parent[p]],
- stm32mp1_clk_parent_sel_name[s],
- (u32)id);
-#endif
+ log_content("%s clock is the parent %s of clk id %d\n",
+ stm32mp1_clk_parent_name[sel[s].parent[p]],
+ stm32mp1_clk_parent_sel_name[s],
+ (u32)id);
return sel[s].parent[p];
}
- pr_err("%s: no parents defined for clk id %d\n",
- __func__, (u32)id);
+ log_err("no parents defined for clk id %d\n", (u32)id);
return -EINVAL;
}
@@ -1124,7 +1123,7 @@ static ulong stm32mp1_clk_get(struct stm32mp1_clk_priv
*priv, int p)
if (!uclass_get_device_by_name(UCLASS_CLK, "ck_dsi_phy",
)) {
if (clk_request(dev, )) {
- pr_err("ck_dsi_phy request");
+ log_err("ck_dsi_phy request");
} else {
clk.id = 0;
clock = clk_get_rate();
@@ -1136,8 +1135,7 @@ static ulong stm32mp1_clk_get(struct stm32mp1_clk_priv
*priv, int p)
break;
}
- debug("%s(%d) clock = %lx : %ld kHz\n",
- __func__, p, clock, clock / 1000);
+ log_debug("id=%d clock = %lx : %ld kHz\n", p, clock, clock / 1000);
return clock;
}
@@ -1156,7 +1154,7 @@ static int stm32mp1_clk_enable(struct clk *clk)
else
setbits_le32(priv->base + gate[i].offset, BIT(gate[i].bit));
- debug("%s: id clock %d has been enabled\n", __func__, (u32)clk->id);
+ dev_dbg(clk->dev, "%s: id clock %d has been enabled\n", __func__,
(u32)clk->id);
return 0;
}
@@ -1177,7 +1175,7 @@ static int stm32mp1_clk_disable(struct clk *clk)
else
clrbits_le32(priv->base + gate[i].offset, BIT(gate[i].bit));
- debug("%s: id clock %d has been disabled\n", __func__, (u32)clk->id);
+ dev_dbg(clk->dev, "%s: id clock %d has been disabled\n", __func__,
(u32)clk->id);
return 0;
}
@@ -1193,10 +1191,9 @@ static ulong stm32mp1_clk_get_rate(struct clk *clk)
rate = stm32mp1_clk_get(priv, p);
-#ifdef DEBUG
- debug("%s: computed rate for id clock %d is %d (parent is %s)\n",
- __func__, (u32)clk->id, (u32)rate, stm32mp1_clk_parent_name[p]);
-#endif
+ dev_vdbg(clk->dev, "computed rate for id clock %d is %d (parent is
%s)\n",
+(u32)clk->id, (u32)rate, stm32mp1_clk_parent_name[p]);
+
return rate;
}
@@ -1335,7 +1332,7 @@ static int stm32mp1_pll1_opp(struct stm32mp1_clk_priv
[PATCH 08/33] ram: stm32mp1: migrate trace to dev or log macro
Define LOG_CATEGORY, use dev_ macro when it is possible
and migrate other trace to log_ macro.
Signed-off-by: Patrick Delaunay
---
drivers/ram/stm32mp1/stm32mp1_ddr.c | 36 +++---
drivers/ram/stm32mp1/stm32mp1_interactive.c | 4 +-
drivers/ram/stm32mp1/stm32mp1_ram.c | 37 +++---
drivers/ram/stm32mp1/stm32mp1_tests.c | 19 +--
drivers/ram/stm32mp1/stm32mp1_tuning.c | 124 ++--
5 files changed, 116 insertions(+), 104 deletions(-)
diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.c
b/drivers/ram/stm32mp1/stm32mp1_ddr.c
index bf3a4c97a4..0457166b12 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ddr.c
+++ b/drivers/ram/stm32mp1/stm32mp1_ddr.c
@@ -3,6 +3,8 @@
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
*/
+#define LOG_CATEGORY UCLASS_RAM
+
#include
#include
#include
@@ -311,17 +313,17 @@ static void set_reg(const struct ddr_info *priv,
u32 base_addr = get_base_addr(priv, base);
const struct reg_desc *desc = ddr_registers[type].desc;
- debug("init %s\n", ddr_registers[type].name);
+ log_debug("init %s\n", ddr_registers[type].name);
for (i = 0; i < ddr_registers[type].size; i++) {
ptr = (unsigned int *)(base_addr + desc[i].offset);
if (desc[i].par_offset == INVALID_OFFSET) {
- pr_err("invalid parameter offset for %s", desc[i].name);
+ log_err("invalid parameter offset for %s",
desc[i].name);
} else {
value = *((u32 *)((u32)param +
desc[i].par_offset));
writel(value, ptr);
- debug("[0x%x] %s= 0x%08x\n",
- (u32)ptr, desc[i].name, value);
+ log_debug("[0x%x] %s= 0x%08x\n",
+ (u32)ptr, desc[i].name, value);
}
}
}
@@ -564,16 +566,16 @@ static void ddrphy_idone_wait(struct stm32mp1_ddrphy *phy)
DDRPHYC_PGSR_RVERR |
DDRPHYC_PGSR_RVEIRR),
100);
- debug("\n[0x%08x] pgsr = 0x%08x ret=%d\n",
- (u32)>pgsr, pgsr, ret);
+ log_debug("\n[0x%08x] pgsr = 0x%08x ret=%d\n",
+ (u32)>pgsr, pgsr, ret);
}
void stm32mp1_ddrphy_init(struct stm32mp1_ddrphy *phy, u32 pir)
{
pir |= DDRPHYC_PIR_INIT;
writel(pir, >pir);
- debug("[0x%08x] pir = 0x%08x -> 0x%08x\n",
- (u32)>pir, pir, readl(>pir));
+ log_debug("[0x%08x] pir = 0x%08x -> 0x%08x\n",
+ (u32)>pir, pir, readl(>pir));
/* need to wait 10 configuration clock before start polling */
udelay(10);
@@ -603,7 +605,7 @@ static void wait_sw_done_ack(struct stm32mp1_ddrctl *ctl)
panic("Timeout initialising DRAM : DDR->swstat = %x\n",
swstat);
- debug("[0x%08x] swstat = 0x%08x\n", (u32)>swstat, swstat);
+ log_debug("[0x%08x] swstat = 0x%08x\n", (u32)>swstat, swstat);
}
/* wait quasi dynamic register update */
@@ -634,7 +636,7 @@ static void wait_operating_mode(struct ddr_info *priv, int
mode)
if (ret)
panic("Timeout DRAM : DDR->stat = %x\n", stat);
- debug("[0x%08x] stat = 0x%08x\n", (u32)>ctl->stat, stat);
+ log_debug("[0x%08x] stat = 0x%08x\n", (u32)>ctl->stat, stat);
}
void stm32mp1_refresh_disable(struct stm32mp1_ddrctl *ctl)
@@ -706,9 +708,9 @@ void stm32mp1_ddr_init(struct ddr_info *priv,
panic("ddr power init failed\n");
start:
- debug("name = %s\n", config->info.name);
- debug("speed = %d kHz\n", config->info.speed);
- debug("size = 0x%x\n", config->info.size);
+ log_debug("name = %s\n", config->info.name);
+ log_debug("speed = %d kHz\n", config->info.speed);
+ log_debug("size = 0x%x\n", config->info.size);
/*
* 1. Program the DWC_ddr_umctl2 registers
* 1.1 RESETS: presetn, core_ddrc_rstn, aresetn
@@ -745,8 +747,8 @@ start:
/* 1.5. initialize registers ddr_umctl2 */
/* Stop uMCTL2 before PHY is ready */
clrbits_le32(>ctl->dfimisc, DDRCTRL_DFIMISC_DFI_INIT_COMPLETE_EN);
- debug("[0x%08x] dfimisc = 0x%08x\n",
- (u32)>ctl->dfimisc, readl(>ctl->dfimisc));
+ log_debug("[0x%08x] dfimisc = 0x%08x\n",
+ (u32)>ctl->dfimisc, readl(>ctl->dfimisc));
set_reg(priv, REG_REG, >c_reg);
set_reg(priv, REG_TIMING, >c_timing);
@@ -809,9 +811,9 @@ start:
wait_operating_mode(priv, DDRCTRL_STAT_OPERATING_MODE_NORMAL);
if (config->p_cal_present) {
- debug("DDR DQS training skipped.\n");
+ log_debug("DDR DQS training skipped.\n");
} else {
- debug("DDR DQS training : ");
+ log_debug("DDR DQS training : ");
/* 8. Disable Auto refresh and power
[PATCH 24/33] spi: stm32_spi: migrate trace to dev and log macro
Change debug/pr_debug to log_debug or dev_dbg macro and
define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay
---
drivers/spi/stm32_spi.c | 31 +--
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/drivers/spi/stm32_spi.c b/drivers/spi/stm32_spi.c
index 4a0833b6fa..086a84572b 100644
--- a/drivers/spi/stm32_spi.c
+++ b/drivers/spi/stm32_spi.c
@@ -4,6 +4,9 @@
*
* Driver for STMicroelectronics Serial peripheral interface (SPI)
*/
+
+#define LOG_CATEGORY UCLASS_SPI
+
#include
#include
#include
@@ -138,7 +141,7 @@ static void stm32_spi_write_txfifo(struct stm32_spi_priv
*priv)
}
}
- debug("%s: %d bytes left\n", __func__, priv->tx_len);
+ log_debug("%d bytes left\n", priv->tx_len);
}
static void stm32_spi_read_rxfifo(struct stm32_spi_priv *priv)
@@ -176,12 +179,12 @@ static void stm32_spi_read_rxfifo(struct stm32_spi_priv
*priv)
rxplvl = (sr & SPI_SR_RXPLVL) >> SPI_SR_RXPLVL_SHIFT;
}
- debug("%s: %d bytes left\n", __func__, priv->rx_len);
+ log_debug("%d bytes left\n", priv->rx_len);
}
static int stm32_spi_enable(struct stm32_spi_priv *priv)
{
- debug("%s\n", __func__);
+ log_debug("\n");
/* Enable the SPI hardware */
setbits_le32(priv->base + STM32_SPI_CR1, SPI_CR1_SPE);
@@ -191,7 +194,7 @@ static int stm32_spi_enable(struct stm32_spi_priv *priv)
static int stm32_spi_disable(struct stm32_spi_priv *priv)
{
- debug("%s\n", __func__);
+ log_debug("\n");
/* Disable the SPI hardware */
clrbits_le32(priv->base + STM32_SPI_CR1, SPI_CR1_SPE);
@@ -204,7 +207,7 @@ static int stm32_spi_claim_bus(struct udevice *slave)
struct udevice *bus = dev_get_parent(slave);
struct stm32_spi_priv *priv = dev_get_priv(bus);
- debug("%s\n", __func__);
+ dev_dbg(slave, "\n");
/* Enable the SPI hardware */
return stm32_spi_enable(priv);
@@ -215,7 +218,7 @@ static int stm32_spi_release_bus(struct udevice *slave)
struct udevice *bus = dev_get_parent(slave);
struct stm32_spi_priv *priv = dev_get_priv(bus);
- debug("%s\n", __func__);
+ dev_dbg(slave, "\n");
/* Disable the SPI hardware */
return stm32_spi_disable(priv);
@@ -227,7 +230,7 @@ static void stm32_spi_stopxfer(struct udevice *dev)
u32 cr1, sr;
int ret;
- debug("%s\n", __func__);
+ dev_dbg(dev, "\n");
cr1 = readl(priv->base + STM32_SPI_CR1);
@@ -255,7 +258,7 @@ static int stm32_spi_set_cs(struct udevice *dev, unsigned
int cs, bool enable)
{
struct stm32_spi_priv *priv = dev_get_priv(dev);
- debug("%s: cs=%d enable=%d\n", __func__, cs, enable);
+ dev_dbg(dev, "cs=%d enable=%d\n", cs, enable);
if (cs >= MAX_CS_COUNT)
return -ENODEV;
@@ -274,7 +277,7 @@ static int stm32_spi_set_mode(struct udevice *bus, uint
mode)
struct stm32_spi_priv *priv = dev_get_priv(bus);
u32 cfg2_clrb = 0, cfg2_setb = 0;
- debug("%s: mode=%d\n", __func__, mode);
+ dev_dbg(bus, "mode=%d\n", mode);
if (mode & SPI_CPOL)
cfg2_setb |= SPI_CFG2_CPOL;
@@ -330,7 +333,7 @@ static int stm32_spi_set_speed(struct udevice *bus, uint hz)
u32 mbrdiv;
long div;
- debug("%s: hz=%d\n", __func__, hz);
+ dev_dbg(bus, "hz=%d\n", hz);
if (priv->cur_hz == hz)
return 0;
@@ -404,8 +407,8 @@ static int stm32_spi_xfer(struct udevice *slave, unsigned
int bitlen,
stm32_spi_enable(priv);
}
- debug("%s: priv->tx_len=%d priv->rx_len=%d\n", __func__,
- priv->tx_len, priv->rx_len);
+ dev_dbg(bus, "priv->tx_len=%d priv->rx_len=%d\n",
+ priv->tx_len, priv->rx_len);
slave_plat = dev_get_parent_platdata(slave);
if (flags & SPI_XFER_BEGIN)
@@ -477,7 +480,7 @@ static int stm32_spi_get_fifo_size(struct udevice *dev)
stm32_spi_disable(priv);
- debug("%s %d x 8-bit fifo size\n", __func__, count);
+ dev_dbg(dev, "%d x 8-bit fifo size\n", count);
return count;
}
@@ -522,7 +525,7 @@ static int stm32_spi_probe(struct udevice *dev)
ret = gpio_request_list_by_name(dev, "cs-gpios", priv->cs_gpios,
ARRAY_SIZE(priv->cs_gpios), 0);
if (ret < 0) {
- pr_err("Can't get %s cs gpios: %d", dev->name, ret);
+ dev_err(dev, "Can't get cs gpios: %d", ret);
goto reset_err;
}
--
2.17.1
[PATCH 27/33] memory: stm32-fmc2: migrate trace to dev and log macro
Change pr_* to dev_ or log_ macro and define LOG_CATEGORY.
Signed-off-by: Patrick Delaunay
---
drivers/memory/stm32-fmc2-ebi.c | 30 --
1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/drivers/memory/stm32-fmc2-ebi.c b/drivers/memory/stm32-fmc2-ebi.c
index d887a1e09d..e3cf75f6e3 100644
--- a/drivers/memory/stm32-fmc2-ebi.c
+++ b/drivers/memory/stm32-fmc2-ebi.c
@@ -3,10 +3,13 @@
* Copyright (C) STMicroelectronics 2020
*/
+#define LOG_CATEGORY UCLASS_NOP
+
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -860,7 +863,7 @@ static int stm32_fmc2_ebi_parse_prop(struct stm32_fmc2_ebi
*ebi,
u32 setup = 0;
if (!prop->set) {
- pr_err("property %s is not well defined\n", prop->name);
+ log_err("property %s is not well defined\n", prop->name);
return -EINVAL;
}
@@ -873,8 +876,8 @@ static int stm32_fmc2_ebi_parse_prop(struct stm32_fmc2_ebi
*ebi,
bprop = ofnode_read_bool(node, prop->name);
if (prop->mprop && !bprop) {
- pr_err("mandatory property %s not defined in the device
tree\n",
- prop->name);
+ log_err("mandatory property %s not defined in the
device tree\n",
+ prop->name);
return -EINVAL;
}
@@ -886,8 +889,8 @@ static int stm32_fmc2_ebi_parse_prop(struct stm32_fmc2_ebi
*ebi,
ret = ofnode_read_u32(node, prop->name, );
if (prop->mprop && ret) {
- pr_err("mandatory property %s not defined in the device
tree\n",
- prop->name);
+ log_err("mandatory property %s not defined in the
device tree\n",
+ prop->name);
return ret;
}
@@ -949,8 +952,8 @@ static int stm32_fmc2_ebi_setup_cs(struct stm32_fmc2_ebi
*ebi,
ret = stm32_fmc2_ebi_parse_prop(ebi, node, p, cs);
if (ret) {
- pr_err("property %s could not be set: %d\n",
- p->name, ret);
+ log_err("property %s could not be set: %d\n",
+ p->name, ret);
return ret;
}
}
@@ -971,25 +974,24 @@ static int stm32_fmc2_ebi_parse_dt(struct udevice *dev,
dev_for_each_subnode(child, dev) {
ret = ofnode_read_u32(child, "reg", );
if (ret) {
- pr_err("could not retrieve reg property: %d\n", ret);
+ dev_err(dev, "could not retrieve reg property: %d\n",
ret);
return ret;
}
if (bank >= FMC2_MAX_BANKS) {
- pr_err("invalid reg value: %d\n", bank);
+ dev_err(dev, "invalid reg value: %d\n", bank);
return -EINVAL;
}
if (ebi->bank_assigned & BIT(bank)) {
- pr_err("bank already assigned: %d\n", bank);
+ dev_err(dev, "bank already assigned: %d\n", bank);
return -EINVAL;
}
if (bank < FMC2_MAX_EBI_CE) {
ret = stm32_fmc2_ebi_setup_cs(ebi, child, bank);
if (ret) {
- pr_err("setup chip select %d failed: %d\n",
- bank, ret);
+ dev_err(dev, "setup chip select %d failed:
%d\n", bank, ret);
return ret;
}
}
@@ -999,12 +1001,12 @@ static int stm32_fmc2_ebi_parse_dt(struct udevice *dev,
}
if (!child_found) {
- pr_warn("no subnodes found, disable the driver.\n");
+ dev_warn(dev, "no subnodes found, disable the driver.\n");
return -ENODEV;
}
if (stm32_fmc2_ebi_nwait_used_by_ctrls(ebi)) {
- pr_err("NWAIT signal connected to EBI and NAND controllers\n");
+ dev_err(dev, "NWAIT signal connected to EBI and NAND
controllers\n");
return -EINVAL;
}
--
2.17.1
[PATCH 13/33] watchdog: stm32mp: migrate trace to dev macro
Change debug and pr_err to dev macro and define LOG_CATEGORY.
Signed-off-by: Patrick Delaunay
---
drivers/watchdog/stm32mp_wdt.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/watchdog/stm32mp_wdt.c b/drivers/watchdog/stm32mp_wdt.c
index f673fce327..109adc8332 100644
--- a/drivers/watchdog/stm32mp_wdt.c
+++ b/drivers/watchdog/stm32mp_wdt.c
@@ -3,6 +3,8 @@
* Copyright (C) 2019, STMicroelectronics - All Rights Reserved
*/
+#define LOG_CATEGORY UCLASS_WDT
+
#include
#include
#include
@@ -10,6 +12,7 @@
#include
#include
#include
+#include
#include
#include
@@ -77,7 +80,7 @@ static int stm32mp_wdt_start(struct udevice *dev, u64
timeout_ms, ulong flags)
val & (SR_PVU | SR_RVU), CONFIG_SYS_HZ);
if (ret < 0) {
- pr_err("Updating IWDG registers timeout");
+ dev_err(dev, "Updating IWDG registers timeout");
return -ETIMEDOUT;
}
@@ -90,7 +93,7 @@ static int stm32mp_wdt_probe(struct udevice *dev)
struct clk clk;
int ret;
- debug("IWDG init\n");
+ dev_dbg(dev, "IWDG init\n");
priv->base = dev_read_addr(dev);
if (priv->base == FDT_ADDR_T_NONE)
@@ -112,7 +115,7 @@ static int stm32mp_wdt_probe(struct udevice *dev)
priv->wdt_clk_rate = clk_get_rate();
- debug("IWDG init done\n");
+ dev_dbg(dev, "IWDG init done\n");
return 0;
}
--
2.17.1
[PATCH 12/33] rtc: stm32: migrate trace to log macro
Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay --- drivers/rtc/stm32_rtc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/rtc/stm32_rtc.c b/drivers/rtc/stm32_rtc.c index f9db318af1..e608ed982f 100644 --- a/drivers/rtc/stm32_rtc.c +++ b/drivers/rtc/stm32_rtc.c @@ -2,6 +2,9 @@ /* * Copyright (C) 2019, STMicroelectronics - All Rights Reserved */ + +#define LOG_CATEGORY UCLASS_RTC + #include #include #include -- 2.17.1
[PATCH 19/33] clk: clk_stm32h7: migrate trace to dev and log macro
Change debug and pr_ macro to dev macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay
---
drivers/clk/clk_stm32h7.c | 70 +--
1 file changed, 38 insertions(+), 32 deletions(-)
diff --git a/drivers/clk/clk_stm32h7.c b/drivers/clk/clk_stm32h7.c
index 5e6abca56f..1a9d3775b4 100644
--- a/drivers/clk/clk_stm32h7.c
+++ b/drivers/clk/clk_stm32h7.c
@@ -4,6 +4,8 @@
* Author(s): Patrice Chotard, for STMicroelectronics.
*/
+#define LOG_CATEGORY UCLASS_CLK
+
#include
#include
#include
@@ -11,6 +13,7 @@
#include
#include
#include
+#include
#include
#include
@@ -465,18 +468,18 @@ static ulong stm32_get_rate(struct stm32_rcc_regs *regs,
enum pllsrc pllsrc)
int ret;
const char *name = pllsrc_name[pllsrc];
- debug("%s name %s\n", __func__, name);
+ log_debug("pllsrc name %s\n", name);
clk.id = 0;
ret = uclass_get_device_by_name(UCLASS_CLK, name, _clock_dev);
if (ret) {
- pr_err("Can't find clk %s (%d)", name, ret);
+ log_err("Can't find clk %s (%d)", name, ret);
return 0;
}
ret = clk_request(fixed_clock_dev, );
if (ret) {
- pr_err("Can't request %s clk (%d)", name, ret);
+ log_err("Can't request %s clk (%d)", name, ret);
return 0;
}
@@ -484,8 +487,7 @@ static ulong stm32_get_rate(struct stm32_rcc_regs *regs,
enum pllsrc pllsrc)
if (pllsrc == HSI)
divider = stm32_get_HSI_divider(regs);
- debug("%s divider %d rate %ld\n", __func__,
- divider, clk_get_rate());
+ log_debug("divider %d rate %ld\n", divider, clk_get_rate());
return clk_get_rate() >> divider;
};
@@ -516,7 +518,7 @@ static u32 stm32_get_PLL1_rate(struct stm32_rcc_regs *regs,
break;
case RCC_PLLCKSELR_PLLSRC_NO_CLK:
/* shouldn't happen */
- pr_err("wrong value for RCC_PLLCKSELR register\n");
+ log_err("wrong value for RCC_PLLCKSELR register\n");
pllsrc = 0;
break;
}
@@ -546,10 +548,10 @@ static u32 stm32_get_PLL1_rate(struct stm32_rcc_regs
*regs,
vco = (pllsrc / divm1) * divn1;
rate = (pllsrc * fracn1) / (divm1 * 8192);
- debug("%s divm1 = %d divn1 = %d divp1 = %d divq1 = %d divr1 = %d\n",
- __func__, divm1, divn1, divp1, divq1, divr1);
- debug("%s fracn1 = %d vco = %ld rate = %ld\n",
- __func__, fracn1, vco, rate);
+ log_debug("divm1 = %d divn1 = %d divp1 = %d divq1 = %d divr1 = %d\n",
+ divm1, divn1, divp1, divq1, divr1);
+ log_debug("fracn1 = %d vco = %ld rate = %ld\n",
+ fracn1, vco, rate);
switch (output) {
case PLL1_P_CK:
@@ -610,7 +612,7 @@ u32 psc = stm32_get_apb_psc(regs, apb);
case 16:
return sysclk / 4;
default:
- pr_err("unexpected prescaler value (%d)\n", psc);
+ log_err("unexpected prescaler value (%d)\n", psc);
return 0;
}
else
@@ -623,7 +625,7 @@ u32 psc = stm32_get_apb_psc(regs, apb);
case 16:
return sysclk / psc;
default:
- pr_err("unexpected prescaler value (%d)\n", psc);
+ log_err("unexpected prescaler value (%d)\n", psc);
return 0;
}
};
@@ -665,8 +667,8 @@ static ulong stm32_clk_get_rate(struct clk *clk)
if (!sysclk)
return sysclk;
- debug("%s system clock: source = %d freq = %ld\n",
- __func__, source, sysclk);
+ dev_dbg(clk->dev, "system clock: source = %d freq = %ld\n",
+ source, sysclk);
d1cfgr = readl(>d1cfgr);
@@ -685,8 +687,8 @@ static ulong stm32_clk_get_rate(struct clk *clk)
gate_offset = clk_map[clk->id].gate_offset;
- debug("%s clk->id=%ld gate_offset=0x%x sysclk=%ld\n",
- __func__, clk->id, gate_offset, sysclk);
+ dev_dbg(clk->dev, "clk->id=%ld gate_offset=0x%x sysclk=%ld\n",
+ clk->id, gate_offset, sysclk);
switch (gate_offset) {
case RCC_AHB3ENR:
@@ -704,8 +706,8 @@ static ulong stm32_clk_get_rate(struct clk *clk)
sysclk = sysclk / prescaler_table[idx];
}
- debug("%s system clock: freq after APB3 prescaler = %ld\n",
- __func__, sysclk);
+ dev_dbg(clk->dev, "system clock: freq after APB3 prescaler =
%ld\n",
+ sysclk);
return sysclk;
break;
@@ -719,8 +721,9 @@ static ulong stm32_clk_get_rate(struct clk
Re: [PATCH v3] mtd: nand: Add NAND controller driver for OcteonTX
On 26.08.20 14:37, Stefan Roese wrote:
From: Suneel Garapati
Adds support for NAND controllers found on OcteonTX or
OcteonTX2 SoC platforms. Also includes driver to support
Hardware ECC using BCH HW engine found on these platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Suneel Garapati
Signed-off-by: Stefan Roese
---
Series-changes: 3
- Add SoB from Stefan
- Remove spdx.org line from comment
- Remove inclusion of common.h header
- Order header file inclusion
- Misc minor checkpatch fixes
- Fix warning in octeontx_cmd_queue_initialize() and now correctly
initialize the cmd queue (Aaron)
Series-changes: 1
- Change patch subject
Applied to u-boot-marvell/master
Thanks,
Stefan
drivers/mtd/nand/raw/Kconfig | 16 +
drivers/mtd/nand/raw/Makefile|2 +
drivers/mtd/nand/raw/octeontx_bch.c | 425
drivers/mtd/nand/raw/octeontx_bch.h | 131 ++
drivers/mtd/nand/raw/octeontx_bch_regs.h | 167 ++
drivers/mtd/nand/raw/octeontx_nand.c | 2257 ++
6 files changed, 2998 insertions(+)
create mode 100644 drivers/mtd/nand/raw/octeontx_bch.c
create mode 100644 drivers/mtd/nand/raw/octeontx_bch.h
create mode 100644 drivers/mtd/nand/raw/octeontx_bch_regs.h
create mode 100644 drivers/mtd/nand/raw/octeontx_nand.c
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 06b2ff972c..5d86fe470d 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -291,6 +291,22 @@ config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
This flag prevent U-boot reconfigure NAND flash controller and reuse
the NAND timing from 1st stage bootloader.
+config NAND_OCTEONTX
+ bool "Support for OcteonTX NAND controller"
+ select SYS_NAND_SELF_INIT
+ imply CMD_NAND
+ help
+This enables Nand flash controller hardware found on the OcteonTX
+processors.
+
+config NAND_OCTEONTX_HW_ECC
+ bool "Support Hardware ECC for OcteonTX NAND controller"
+ depends on NAND_OCTEONTX
+ default y
+ help
+This enables Hardware BCH engine found on the OcteonTX processors to
+support ECC for NAND flash controller.
+
config NAND_STM32_FMC2
bool "Support for NAND controller on STM32MP SoCs"
depends on ARCH_STM32MP
diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
index 9337f6482e..24c51b6924 100644
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -58,6 +58,8 @@ obj-$(CONFIG_NAND_VF610_NFC) += vf610_nfc.o
obj-$(CONFIG_NAND_MXC) += mxc_nand.o
obj-$(CONFIG_NAND_MXS) += mxs_nand.o
obj-$(CONFIG_NAND_MXS_DT) += mxs_nand_dt.o
+obj-$(CONFIG_NAND_OCTEONTX) += octeontx_nand.o
+obj-$(CONFIG_NAND_OCTEONTX_HW_ECC) += octeontx_bch.o
obj-$(CONFIG_NAND_PXA3XX) += pxa3xx_nand.o
obj-$(CONFIG_NAND_SPEAR) += spr_nand.o
obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o
diff --git a/drivers/mtd/nand/raw/octeontx_bch.c
b/drivers/mtd/nand/raw/octeontx_bch.c
new file mode 100644
index 00..693706257c
--- /dev/null
+++ b/drivers/mtd/nand/raw/octeontx_bch.c
@@ -0,0 +1,425 @@
+// SPDX-License-Identifier:GPL-2.0
+/*
+ * Copyright (C) 2018 Marvell International Ltd.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "octeontx_bch.h"
+
+#ifdef DEBUG
+# undef CONFIG_LOGLEVEL
+# define CONFIG_LOGLEVEL 8
+#endif
+
+LIST_HEAD(octeontx_bch_devices);
+static unsigned int num_vfs = BCH_NR_VF;
+static void *bch_pf;
+static void *bch_vf;
+static void *token;
+static bool bch_pf_initialized;
+static bool bch_vf_initialized;
+
+static int pci_enable_sriov(struct udevice *dev, int nr_virtfn)
+{
+ int ret;
+
+ ret = pci_sriov_init(dev, nr_virtfn);
+ if (ret)
+ printf("%s(%s): pci_sriov_init returned %d\n", __func__,
+ dev->name, ret);
+ return ret;
+}
+
+void *octeontx_bch_getv(void)
+{
+ if (!bch_vf)
+ return NULL;
+ if (bch_vf_initialized && bch_pf_initialized)
+ return bch_vf;
+ else
+ return NULL;
+}
+
+void octeontx_bch_putv(void *token)
+{
+ bch_vf_initialized = !!token;
+ bch_vf = token;
+}
+
+void *octeontx_bch_getp(void)
+{
+ return token;
+}
+
+void octeontx_bch_putp(void *token)
+{
+ bch_pf = token;
+ bch_pf_initialized = !!token;
+}
+
+static int do_bch_init(struct bch_device *bch)
+{
+ return 0;
+}
+
+static void bch_reset(struct bch_device *bch)
+{
+ writeq(1, bch->reg_base + BCH_CTL);
+ mdelay(2);
+}
+
+static void bch_disable(struct bch_device *bch)
+{
+ writeq(~0ull, bch->reg_base + BCH_ERR_INT_ENA_W1C);
+ writeq(~0ull, bch->reg_base + BCH_ERR_INT);
+ bch_reset(bch);
+}
+
+static u32
Re: [PATCH 1/2] arm: mvebu: Initial iEi Puzzle-M801 support
Hello Stefan and Tom,
On Wed, Sep 23, 2020 at 8:47 AM Stefan Roese wrote:
>
> On 29.08.20 00:35, Luka Kovacic wrote:
> > Add initial U-Boot support for the iEi Puzzle-M801 board based on the
> > Marvell Armada 88F8040 SoC.
> >
> > Currently supported hardware:
> > 1x USB 3.0
> > 4x Gigabit Ethernet
> > 2x SFP+ (with NXP PCA9555 and NXP PCA9544)
> > 1x SATA 3.0
> > 1x M.2 type B
> > 1x RJ45 UART
> > 1x SPI flash
> > 1x EPSON RX8010 RTC
> >
> > Signed-off-by: Luka Kovacic
> > Cc: Luka Perkov
>
> Reviewed-by: Stefan Roese
Given that these should be good to go, can they be merged into the tree?
Thanks,
Luka
> Thanks,
> Stefan
>
> > ---
> > arch/arm/dts/Makefile | 1 +
> > arch/arm/dts/armada-8040-puzzle-m801.dts| 389
> > board/Marvell/mvebu_armada-8k/MAINTAINERS | 6 +
> > configs/mvebu_puzzle-m801-88f8040_defconfig | 91 +
> > 4 files changed, 487 insertions(+)
> > create mode 100644 arch/arm/dts/armada-8040-puzzle-m801.dts
> > create mode 100644 configs/mvebu_puzzle-m801-88f8040_defconfig
> >
> > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> > index f8f529435b..f13794bc42 100644
> > --- a/arch/arm/dts/Makefile
> > +++ b/arch/arm/dts/Makefile
> > @@ -218,6 +218,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
> > armada-8040-clearfog-gt-8k.dtb \
> > armada-8040-db.dtb \
> > armada-8040-mcbin.dtb \
> > + armada-8040-puzzle-m801.dtb \
> > armada-xp-crs305-1g-4s.dtb \
> > armada-xp-crs305-1g-4s-bit.dtb \
> > armada-xp-crs326-24g-2s.dtb \
> > diff --git a/arch/arm/dts/armada-8040-puzzle-m801.dts
> > b/arch/arm/dts/armada-8040-puzzle-m801.dts
> > new file mode 100644
> > index 00..58edb5b3aa
> > --- /dev/null
> > +++ b/arch/arm/dts/armada-8040-puzzle-m801.dts
> > @@ -0,0 +1,389 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2016 Marvell International Ltd.
> > + * Copyright (C) 2020 Sartura Ltd.
> > + */
> > +
> > +#include "armada-8040.dtsi" /* include SoC device tree */
> > +
> > +/ {
> > + model = "iEi-Puzzle-M801";
> > + compatible = "marvell,armada8040-puzzle-m801",
> > + "marvell,armada8040";
> > +
> > + chosen {
> > + stdout-path = "serial0:115200n8";
> > + };
> > +
> > + aliases {
> > + i2c0 =
> > + i2c1 = _i2c0;
> > + i2c2 = _i2c1;
> > + i2c3 = _switch;
> > + spi0 =
> > + gpio0 = _gpio0;
> > + gpio1 = _gpio0;
> > + gpio2 = _gpio1;
> > + gpio3 = _gpio;
> > + };
> > +
> > + memory@ {
> > + device_type = "memory";
> > + reg = <0x0 0x0 0x0 0x8000>;
> > + };
> > +
> > + simple-bus {
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + reg_usb3h0_vbus: usb3-vbus0 {
> > + compatible = "regulator-fixed";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <_xhci_vbus_pins>;
> > + regulator-name = "reg-usb3h0-vbus";
> > + regulator-min-microvolt = <500>;
> > + regulator-max-microvolt = <500>;
> > + startup-delay-us = <50>;
> > + enable-active-high;
> > + regulator-always-on;
> > + regulator-boot-on;
> > + gpio = <_gpio1 15 GPIO_ACTIVE_HIGH>; /* GPIO[47]
> > */
> > + };
> > + };
> > +};
> > +
> > + {
> > + status = "okay";
> > + clock-frequency = <10>;
> > +
> > + rtc@32 {
> > + compatible = "epson,rx8010";
> > + reg = <0x32>;
> > + };
> > +};
> > +
> > + {
> > + status = "okay";
> > +};
> > +
> > +_pinctl {
> > + /*
> > + * MPP Bus:
> > + * AP SPI0 [0-3]
> > + * AP I2C [4-5]
> > + * AP GPIO [6]
> > + * AP UART 1 RX/TX [7-8]
> > + * AP GPIO [9-10]
> > + * AP GPIO [12]
> > + * UART0 [11,19]
> > + */
> > + /* 0 1 2 3 4 5 6 7 8 9 */
> > + pin-func = < 3 3 3 3 3 3 3 3 3 0
> > + 0 3 0 0 0 0 0 0 0 3 >;
> > +};
> > +
> > +_pinctl {
> > + /*
> > + * MPP Bus:
> > + * [0-31] = 0xff: Keep default CP0_shared_pins:
> > + * [11] CLKOUT_MPP_11 (out)
> > + * [23] LINK_RD_IN_CP2CP (in)
> > + * [25] CLKOUT_MPP_25 (out)
> > + * [29] AVS_FB_IN_CP2CP (in)
> > + * [32,34] SMI
> > + * [33]MSS power down
> > + * [35-38] CP0 I2C1 and I2C0
> > + * [39] MSS CKE Enable
> > + * [40,41] CP0 UART1 TX/RX
> > + * [42,43] XSMI (controls two 10G phys)
> > + * [47] USB VBUS EN
> > + * [48] FAN PWM
> > + * [49] 10G port 1 interrupt
>
Re: [PATCH 2/2] arm: mvebu: mvebu_armada-8k: Add support for initializing iEi Puzzle-M801 networking
On 29.08.20 00:35, Luka Kovacic wrote:
Add support for the marvell,armada8040-puzzle-m801 compatible string
in the board/Marvell/mvebu_armada-8k/board.c file to initialize the
networking on iEi Puzzle-M801 board (2x CP1 1 Gb ports).
Signed-off-by: Luka Kovacic
Cc: Luka Perkov
Applied to u-boot-marvell/master
Thanks,
Stefan
---
board/Marvell/mvebu_armada-8k/board.c | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/board/Marvell/mvebu_armada-8k/board.c
b/board/Marvell/mvebu_armada-8k/board.c
index 60b0024630..bf8a929ec1 100644
--- a/board/Marvell/mvebu_armada-8k/board.c
+++ b/board/Marvell/mvebu_armada-8k/board.c
@@ -34,6 +34,17 @@ DECLARE_GLOBAL_DATA_PTR;
#define I2C_IO_REG_CL ((1 << I2C_IO_REG_0_USB_H0_CL) | \
(1 << I2C_IO_REG_0_USB_H1_CL))
+/*
+ * Information specific to the iEi Puzzle-M801 board.
+ */
+
+/* Internal configuration registers */
+#define CP1_CONF_REG_BASE 0xf444
+#define CONF_REG_MPP0 0x0
+#define CONF_REG_MPP1 0x4
+#define CONF_REG_MPP2 0x8
+#define CONF_REG_MPP3 0xC
+
static int usb_enabled = 0;
/* Board specific xHCI dis-/enable code */
@@ -141,7 +152,14 @@ int board_xhci_enable(fdt_addr_t base)
int board_early_init_f(void)
{
- /* Nothing to do (yet), perhaps later some pin-muxing etc */
+ /* Initialize some platform specific memory locations */
+ if (of_machine_is_compatible("marvell,armada8040-puzzle-m801")) {
+ /* MPP setup */
+ writel(0x0044, CP1_CONF_REG_BASE + CONF_REG_MPP0);
+ writel(0x, CP1_CONF_REG_BASE + CONF_REG_MPP1);
+ writel(0x, CP1_CONF_REG_BASE + CONF_REG_MPP2);
+ writel(0x0000, CP1_CONF_REG_BASE + CONF_REG_MPP3);
+ }
return 0;
}
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH 1/2] arm: mvebu: Initial iEi Puzzle-M801 support
On 29.08.20 00:35, Luka Kovacic wrote:
Add initial U-Boot support for the iEi Puzzle-M801 board based on the
Marvell Armada 88F8040 SoC.
Currently supported hardware:
1x USB 3.0
4x Gigabit Ethernet
2x SFP+ (with NXP PCA9555 and NXP PCA9544)
1x SATA 3.0
1x M.2 type B
1x RJ45 UART
1x SPI flash
1x EPSON RX8010 RTC
Signed-off-by: Luka Kovacic
Cc: Luka Perkov
Applied to u-boot-marvell/master
Thanks,
Stefan
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/armada-8040-puzzle-m801.dts| 389
board/Marvell/mvebu_armada-8k/MAINTAINERS | 6 +
configs/mvebu_puzzle-m801-88f8040_defconfig | 91 +
4 files changed, 487 insertions(+)
create mode 100644 arch/arm/dts/armada-8040-puzzle-m801.dts
create mode 100644 configs/mvebu_puzzle-m801-88f8040_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f8f529435b..f13794bc42 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -218,6 +218,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-8040-clearfog-gt-8k.dtb \
armada-8040-db.dtb \
armada-8040-mcbin.dtb \
+ armada-8040-puzzle-m801.dtb \
armada-xp-crs305-1g-4s.dtb \
armada-xp-crs305-1g-4s-bit.dtb \
armada-xp-crs326-24g-2s.dtb \
diff --git a/arch/arm/dts/armada-8040-puzzle-m801.dts
b/arch/arm/dts/armada-8040-puzzle-m801.dts
new file mode 100644
index 00..58edb5b3aa
--- /dev/null
+++ b/arch/arm/dts/armada-8040-puzzle-m801.dts
@@ -0,0 +1,389 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2016 Marvell International Ltd.
+ * Copyright (C) 2020 Sartura Ltd.
+ */
+
+#include "armada-8040.dtsi" /* include SoC device tree */
+
+/ {
+ model = "iEi-Puzzle-M801";
+ compatible = "marvell,armada8040-puzzle-m801",
+"marvell,armada8040";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ aliases {
+ i2c0 =
+ i2c1 = _i2c0;
+ i2c2 = _i2c1;
+ i2c3 = _switch;
+ spi0 =
+ gpio0 = _gpio0;
+ gpio1 = _gpio0;
+ gpio2 = _gpio1;
+ gpio3 = _gpio;
+ };
+
+ memory@ {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x8000>;
+ };
+
+ simple-bus {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_usb3h0_vbus: usb3-vbus0 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <_xhci_vbus_pins>;
+ regulator-name = "reg-usb3h0-vbus";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ startup-delay-us = <50>;
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <_gpio1 15 GPIO_ACTIVE_HIGH>; /* GPIO[47] */
+ };
+ };
+};
+
+ {
+ status = "okay";
+ clock-frequency = <10>;
+
+ rtc@32 {
+ compatible = "epson,rx8010";
+ reg = <0x32>;
+ };
+};
+
+ {
+ status = "okay";
+};
+
+_pinctl {
+ /*
+* MPP Bus:
+* AP SPI0 [0-3]
+* AP I2C [4-5]
+* AP GPIO [6]
+* AP UART 1 RX/TX [7-8]
+* AP GPIO [9-10]
+* AP GPIO [12]
+* UART0 [11,19]
+*/
+ /* 0 1 2 3 4 5 6 7 8 9 */
+ pin-func = < 3 3 3 3 3 3 3 3 3 0
+0 3 0 0 0 0 0 0 0 3 >;
+};
+
+_pinctl {
+ /*
+* MPP Bus:
+* [0-31] = 0xff: Keep default CP0_shared_pins:
+* [11] CLKOUT_MPP_11 (out)
+* [23] LINK_RD_IN_CP2CP (in)
+* [25] CLKOUT_MPP_25 (out)
+* [29] AVS_FB_IN_CP2CP (in)
+* [32,34] SMI
+* [33]MSS power down
+* [35-38] CP0 I2C1 and I2C0
+* [39] MSS CKE Enable
+* [40,41] CP0 UART1 TX/RX
+* [42,43] XSMI (controls two 10G phys)
+* [47] USB VBUS EN
+* [48] FAN PWM
+* [49] 10G port 1 interrupt
+* [50] 10G port 0 interrupt
+* [51] 2.5G SFP TX fault
+* [52] PCIe reset out
+* [53] 2.5G SFP mode
+* [54] 2.5G SFP LOS
+* [55] Micro SD card detect
+* [56-61] Micro SD
+* [62] CP1 SFI SFP FAULT
+*/
+ /* 0123456789 */
+ pin-func = < 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+0xff 07
Re: [PATCH v2 3/3] arm64: dts: a3720: add support for espressobin with populated emmc
On 14/10/2020 10:21, Pali Rohár wrote: diff --git a/doc/README.marvell b/doc/README.marvell index 5416bc3035..be07f31f8c 100644 --- a/doc/README.marvell +++ b/doc/README.marvell @@ -43,8 +43,11 @@ Build Procedure In order to prevent this, the required device-tree MUST be set during compilation. All device-tree files are located in ./arch/arm/dts/ folder. - For other DB boards (MacchiatoBin, EspressoBin and 3700 DB board) compile u-boot with - just default device-tree from defconfig using: + For the EspressoBin board with populated eMMC device use + # make DEVICE_TREE=armada-3720-espressobin-emmc + + For other DB boards (MacchiatoBin, EspressoBin without soldered eMMC and 3700 DB board) + compile u-boot with just default device-tree from defconfig using: Hello! Does not it really make sense to do autodetection of eMMC presence and enable it in U-Boot code only when needed and therefore avoid having two DTS files and needs for specifying DEVICE_TREE variable and therefore variant of Espressobin, as I stated in previous emails? I think this just complicates build process... E.g. we already have a code in U-Boot which detects V5 vs V7 variant. I still like the idea, but I'm still hesitating to just enable the emmc everywhere. There's the issue with powering down the emmc block if it's not populated. How would that work once we switch to atf for comphy control? From a different angle: If we could just do that, why does Linux have different devicetrees? Regards, Andre
Re: [PATCH v2 3/3] arm64: dts: a3720: add support for espressobin with populated emmc
On Wednesday 14 October 2020 10:37:57 Andre Heider wrote: > On 14/10/2020 10:21, Pali Rohár wrote: > > > > > > > diff --git a/doc/README.marvell b/doc/README.marvell > > > > index 5416bc3035..be07f31f8c 100644 > > > > --- a/doc/README.marvell > > > > +++ b/doc/README.marvell > > > > @@ -43,8 +43,11 @@ Build Procedure > > > >In order to prevent this, the required device-tree MUST be > > > > set during compilation. > > > >All device-tree files are located in ./arch/arm/dts/ folder. > > > > - For other DB boards (MacchiatoBin, EspressoBin and 3700 DB > > > > board) compile u-boot with > > > > - just default device-tree from defconfig using: > > > > + For the EspressoBin board with populated eMMC device use > > > > + # make DEVICE_TREE=armada-3720-espressobin-emmc > > > > + > > > > + For other DB boards (MacchiatoBin, EspressoBin without soldered > > > > eMMC and 3700 DB board) > > > > + compile u-boot with just default device-tree from defconfig > > > > using: > > > > Hello! Does not it really make sense to do autodetection of eMMC > > presence and enable it in U-Boot code only when needed and therefore > > avoid having two DTS files and needs for specifying DEVICE_TREE variable > > and therefore variant of Espressobin, as I stated in previous emails? > > > > I think this just complicates build process... E.g. we already have a > > code in U-Boot which detects V5 vs V7 variant. > > I still like the idea, but I'm still hesitating to just enable the emmc > everywhere. There's the issue with powering down the emmc block if it's not > populated. How would that work once we switch to atf for comphy control? Is there issue with powering it down? I just do not know about it. And could we fix it? > From a different angle: If we could just do that, why does Linux have > different devicetrees? I do not know exact answer, so I just guess two reasons: 1) historic, nobody wanted to think about it, so rather created secondary DTS 2) linux driver model does not have API and solution how to do this auto-detection and in case of absence, turn blocks off and reconfigure it. IIRC similar problem was with MOX (also based on A3720) and final solution is that kernel has only one DTB and U-Boot "modifies" it prior booting kernel, based on autodetection which U-Boot did. Similarly like MAC address of MTD partitions are put into espressobin DTB prior booting kernel. > > Regards, > Andre
[PATCH V2 03/12] doc: board: Convert i.MX8MN EVK README to reST
Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan --- board/freescale/imx8mn_evk/README | 37 --- doc/board/freescale/imx8mn_evk.rst | 57 ++ doc/board/freescale/index.rst | 1 + 3 files changed, 58 insertions(+), 37 deletions(-) delete mode 100644 board/freescale/imx8mn_evk/README create mode 100644 doc/board/freescale/imx8mn_evk.rst diff --git a/board/freescale/imx8mn_evk/README b/board/freescale/imx8mn_evk/README deleted file mode 100644 index ec007afb25..00 --- a/board/freescale/imx8mn_evk/README +++ /dev/null @@ -1,37 +0,0 @@ -U-Boot for the NXP i.MX8MN EVK board - -Quick Start -=== -- Build the ARM Trusted firmware binary -- Get firmware-imx package -- Build U-Boot -- Boot - -Get and Build the ARM Trusted firmware -== -Note: srctree is U-Boot source directory -Get ATF from: https://source.codeaurora.org/external/imx/imx-atf -branch: imx_4.19.35_1.1.0 -$ make PLAT=imx8mn bl31 -$ cp build/imx8mn/release/bl31.bin $(srctree) - -Get the ddr firmware -= -$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.5.bin -$ chmod +x firmware-imx-8.5.bin -$ ./firmware-imx-8.5 -$ cp firmware-imx-8.5/firmware/ddr/synopsys/ddr4*.bin $(srctree) - -Build U-Boot - -$ export CROSS_COMPILE=aarch64-poky-linux- -$ make imx8mn_ddr4_evk_defconfig -$ export ATF_LOAD_ADDR=0x96 -$ make flash.bin - -Burn the flash.bin to MicroSD card offset 32KB -$sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc - -Boot - -Set Boot switch to SD boot diff --git a/doc/board/freescale/imx8mn_evk.rst b/doc/board/freescale/imx8mn_evk.rst new file mode 100644 index 00..c3e92cecee --- /dev/null +++ b/doc/board/freescale/imx8mn_evk.rst @@ -0,0 +1,57 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx8mn_evk +== + +U-Boot for the NXP i.MX8MN EVK board + +Quick Start +--- + +- Build the ARM Trusted firmware binary +- Get firmware-imx package +- Build U-Boot +- Boot + +Get and Build the ARM Trusted firmware +-- + +Note: srctree is U-Boot source directory +Get ATF from: https://source.codeaurora.org/external/imx/imx-atf +branch: imx_4.19.35_1.1.0 + +.. code-block:: bash + + $ make PLAT=imx8mn bl31 + $ cp build/imx8mn/release/bl31.bin $(srctree) + +Get the ddr firmware + + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.5.bin + $ chmod +x firmware-imx-8.5.bin + $ ./firmware-imx-8.5 + $ cp firmware-imx-8.5/firmware/ddr/synopsys/ddr4*.bin $(srctree) + +Build U-Boot + + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-poky-linux- + $ make imx8mn_ddr4_evk_defconfig + $ export ATF_LOAD_ADDR=0x96 + $ make flash.bin + +Burn the flash.bin to MicroSD card offset 32KB: + +.. code-block:: bash + + $sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc + +Boot + + +Set Boot switch to SD boot diff --git a/doc/board/freescale/index.rst b/doc/board/freescale/index.rst index 070d678725..77b6802098 100644 --- a/doc/board/freescale/index.rst +++ b/doc/board/freescale/index.rst @@ -7,4 +7,5 @@ Freescale :maxdepth: 2 b4860qds + imx8mn_evk imx8mp_evk -- 2.28.0
[PATCH V2 01/12] board: imx: address dd usage in README
When using cygwin64 "dd (coreutils) 8.26 Packaged by Cygwin (8.26-2)", the last not 512bytes aligned data wat cut off and not burned into SD card. Saying the flash.bin size is 1085608 bytes, not 512bytes aligned. It only burned 1085440 bytes, the leaving 168 bytes were not burnned and cause boot issue. So update README dd command to add "conv=notrunc" Signed-off-by: Peng Fan --- board/freescale/imx8mm_evk/README | 2 +- board/freescale/imx8mn_evk/README | 2 +- board/freescale/imx8mp_evk/README | 2 +- board/freescale/imx8mq_evk/README | 2 +- board/freescale/imx8qxp_mek/README | 2 +- board/freescale/imxrt1020-evk/README | 4 ++-- board/freescale/imxrt1050-evk/README | 4 ++-- board/freescale/mx6sabreauto/README| 8 board/freescale/mx6sabresd/README | 12 ++-- board/freescale/mx6ul_14x14_evk/README | 4 ++-- board/freescale/mx6ullevk/README | 2 +- 11 files changed, 22 insertions(+), 22 deletions(-) diff --git a/board/freescale/imx8mm_evk/README b/board/freescale/imx8mm_evk/README index fa3f079f31..3307711d5d 100644 --- a/board/freescale/imx8mm_evk/README +++ b/board/freescale/imx8mm_evk/README @@ -30,7 +30,7 @@ $ export ATF_LOAD_ADDR=0x92 $ make flash.bin Burn the flash.bin to MicroSD card offset 33KB -$sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 +$sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=notrunc Boot diff --git a/board/freescale/imx8mn_evk/README b/board/freescale/imx8mn_evk/README index ff3d15c02b..ec007afb25 100644 --- a/board/freescale/imx8mn_evk/README +++ b/board/freescale/imx8mn_evk/README @@ -30,7 +30,7 @@ $ export ATF_LOAD_ADDR=0x96 $ make flash.bin Burn the flash.bin to MicroSD card offset 32KB -$sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 +$sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc Boot diff --git a/board/freescale/imx8mp_evk/README b/board/freescale/imx8mp_evk/README index 7dd3a9352a..3c64979be9 100644 --- a/board/freescale/imx8mp_evk/README +++ b/board/freescale/imx8mp_evk/README @@ -33,7 +33,7 @@ $ export ATF_LOAD_ADDR=0x96 $ make flash.bin Burn the flash.bin to the MicroSD card at offset 32KB -$sudo dd if=flash.bin of=/dev/sd[x] bs=1K seek=32; sync +$sudo dd if=flash.bin of=/dev/sd[x] bs=1K seek=32 conv=notrunc; sync Boot diff --git a/board/freescale/imx8mq_evk/README b/board/freescale/imx8mq_evk/README index 859f852255..2689459b9f 100644 --- a/board/freescale/imx8mq_evk/README +++ b/board/freescale/imx8mq_evk/README @@ -30,7 +30,7 @@ $ make imx8mq_evk_defconfig $ make flash.bin Burn the flash.bin to MicroSD card offset 33KB -$sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 +$sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=notrunc Boot diff --git a/board/freescale/imx8qxp_mek/README b/board/freescale/imx8qxp_mek/README index 6e4eb5996b..6f99d0e13e 100644 --- a/board/freescale/imx8qxp_mek/README +++ b/board/freescale/imx8qxp_mek/README @@ -43,7 +43,7 @@ Flash the binary into the SD card Burn the flash.bin binary to SD card offset 32KB: -$ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 +$ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc Boot diff --git a/board/freescale/imxrt1020-evk/README b/board/freescale/imxrt1020-evk/README index abee7ca5f3..9bc5bc00bc 100644 --- a/board/freescale/imxrt1020-evk/README +++ b/board/freescale/imxrt1020-evk/README @@ -11,11 +11,11 @@ This will generate the SPL image called SPL and the u-boot.img. - Flash the SPL image into the micro SD card: -sudo dd if=SPL of=/dev/sdX bs=1k seek=1; sync +sudo dd if=SPL of=/dev/sdX bs=1k seek=1 conv=notrunc; sync - Flash the u-boot.img image into the micro SD card: -sudo dd if=u-boot.img of=/dev/sdX bs=1k seek=128; sync +sudo dd if=u-boot.img of=/dev/sdX bs=1k seek=128 conv=notrunc; sync - Jumper settings: diff --git a/board/freescale/imxrt1050-evk/README b/board/freescale/imxrt1050-evk/README index a7e68fa9b3..f321300246 100644 --- a/board/freescale/imxrt1050-evk/README +++ b/board/freescale/imxrt1050-evk/README @@ -11,11 +11,11 @@ This will generate the SPL image called SPL and the u-boot.img. - Flash the SPL image into the micro SD card: -sudo dd if=SPL of=/dev/sdX bs=1k seek=1; sync +sudo dd if=SPL of=/dev/sdX bs=1k seek=1 conv=notrunc; sync - Flash the u-boot.img image into the micro SD card: -sudo dd if=u-boot.img of=/dev/sdX bs=1k seek=128; sync +sudo dd if=u-boot.img of=/dev/sdX bs=1k seek=128 conv=notrunc; sync - Jumper settings: diff --git a/board/freescale/mx6sabreauto/README b/board/freescale/mx6sabreauto/README index 4c0fda1a2d..710026a05e 100644 --- a/board/freescale/mx6sabreauto/README +++ b/board/freescale/mx6sabreauto/README @@ -13,11 +13,11 @@ This will generate the SPL and u-boot-dtb.img binaries. - Flash the SPL binary into the SD card: -$ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 && sync +$ sudo dd if=SPL of=/dev/sdX bs=1K seek=1
[PATCH V2 00/12] imx: doc update
V2: Migrate README to doc/board/freescale patch 1 is not changed. Peng Fan (12): board: imx: address dd usage in README doc: board: Convert i.MX8MP EVK README to reST doc: board: Convert i.MX8MN EVK README to reST doc: board: Convert i.MX8MM EVK README to reST doc: board: Convert i.MX8MQ EVK README to reST doc: board: Convert i.MX8QXP MEK README to reST doc: board: Convert i.MXRT1020 EVK README to reST doc: board: Convert i.MXRT1050 EVK README to reST doc: board: Convert i.MX6 Sabreauto README to reST doc: board: Convert i.MX6 Sabresd README to reST doc: board: Convert i.MX6UL 14x14 EVK README to reST doc: board: Convert i.MX6ULL EVK README to reST board/freescale/imx8mm_evk/README | 37 - board/freescale/imx8mn_evk/README | 37 - board/freescale/imx8mp_evk/README | 41 -- board/freescale/imx8mq_evk/README | 37 - board/freescale/imx8qxp_mek/README| 50 --- board/freescale/imxrt1020-evk/README | 31 board/freescale/imxrt1050-evk/README | 31 board/freescale/mx6sabreauto/README | 82 --- board/freescale/mx6sabresd/README | 114 --- doc/board/freescale/imx8mm_evk.rst| 56 doc/board/freescale/imx8mn_evk.rst| 57 doc/board/freescale/imx8mp_evk.rst| 61 doc/board/freescale/imx8mq_evk.rst| 56 doc/board/freescale/imx8qxp_mek.rst | 66 + doc/board/freescale/imxrt1020-evk.rst | 41 ++ doc/board/freescale/imxrt1050-evk.rst | 41 ++ doc/board/freescale/index.rst | 11 ++ doc/board/freescale/mx6sabreauto.rst | 100 + doc/board/freescale/mx6sabresd.rst| 132 ++ .../board/freescale/mx6ul_14x14_evk.rst | 62 +--- .../board/freescale/mx6ullevk.rst | 29 ++-- 21 files changed, 680 insertions(+), 492 deletions(-) delete mode 100644 board/freescale/imx8mm_evk/README delete mode 100644 board/freescale/imx8mn_evk/README delete mode 100644 board/freescale/imx8mp_evk/README delete mode 100644 board/freescale/imx8mq_evk/README delete mode 100644 board/freescale/imx8qxp_mek/README delete mode 100644 board/freescale/imxrt1020-evk/README delete mode 100644 board/freescale/imxrt1050-evk/README delete mode 100644 board/freescale/mx6sabreauto/README delete mode 100644 board/freescale/mx6sabresd/README create mode 100644 doc/board/freescale/imx8mm_evk.rst create mode 100644 doc/board/freescale/imx8mn_evk.rst create mode 100644 doc/board/freescale/imx8mp_evk.rst create mode 100644 doc/board/freescale/imx8mq_evk.rst create mode 100644 doc/board/freescale/imx8qxp_mek.rst create mode 100644 doc/board/freescale/imxrt1020-evk.rst create mode 100644 doc/board/freescale/imxrt1050-evk.rst create mode 100644 doc/board/freescale/mx6sabreauto.rst create mode 100644 doc/board/freescale/mx6sabresd.rst rename board/freescale/mx6ul_14x14_evk/README => doc/board/freescale/mx6ul_14x14_evk.rst (65%) rename board/freescale/mx6ullevk/README => doc/board/freescale/mx6ullevk.rst (66%) -- 2.28.0
[PATCH V2 07/12] doc: board: Convert i.MXRT1020 EVK README to reST
Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan --- board/freescale/imxrt1020-evk/README | 31 doc/board/freescale/imxrt1020-evk.rst | 41 +++ doc/board/freescale/index.rst | 1 + 3 files changed, 42 insertions(+), 31 deletions(-) delete mode 100644 board/freescale/imxrt1020-evk/README create mode 100644 doc/board/freescale/imxrt1020-evk.rst diff --git a/board/freescale/imxrt1020-evk/README b/board/freescale/imxrt1020-evk/README deleted file mode 100644 index 9bc5bc00bc..00 --- a/board/freescale/imxrt1020-evk/README +++ /dev/null @@ -1,31 +0,0 @@ -How to use U-Boot on NXP i.MXRT1020 EVK - -- Build U-Boot for i.MXRT1020 EVK: - -$ make mrproper -$ make imxrt1020-evk_defconfig -$ make - -This will generate the SPL image called SPL and the u-boot.img. - -- Flash the SPL image into the micro SD card: - -sudo dd if=SPL of=/dev/sdX bs=1k seek=1 conv=notrunc; sync - -- Flash the u-boot.img image into the micro SD card: - -sudo dd if=u-boot.img of=/dev/sdX bs=1k seek=128 conv=notrunc; sync - -- Jumper settings: - -SW8: 0 1 1 0 - -where 0 means bottom position and 1 means top position (from the -switch label numbers reference). - -- Connect the USB cable between the EVK and the PC for the console. -(The USB console connector is the one close the ethernet connector) - -- Insert the micro SD card in the board, power it up and U-Boot messages should -come up. diff --git a/doc/board/freescale/imxrt1020-evk.rst b/doc/board/freescale/imxrt1020-evk.rst new file mode 100644 index 00..267f80c517 --- /dev/null +++ b/doc/board/freescale/imxrt1020-evk.rst @@ -0,0 +1,41 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imxrt1020-evk += + +How to use U-Boot on NXP i.MXRT1020 EVK +--- + +- Build U-Boot for i.MXRT1020 EVK: + +.. code-block:: bash + + $ make mrproper + $ make imxrt1020-evk_defconfig + $ make + +This will generate the SPL image called SPL and the u-boot.img. + +- Flash the SPL image into the micro SD card: + +.. code-block:: bash + + $sudo dd if=SPL of=/dev/sdX bs=1k seek=1 conv=notrunc; sync + +- Flash the u-boot.img image into the micro SD card: + +.. code-block:: bash + + $sudo dd if=u-boot.img of=/dev/sdX bs=1k seek=128 conv=notrunc; sync + +- Jumper settings:: + + SW8: 0 1 1 0 + +where 0 means bottom position and 1 means top position (from the +switch label numbers reference). + +- Connect the USB cable between the EVK and the PC for the console. + The USB console connector is the one close the ethernet connector + +- Insert the micro SD card in the board, power it up and U-Boot messages should come up. diff --git a/doc/board/freescale/index.rst b/doc/board/freescale/index.rst index 6cd352565f..81c4826beb 100644 --- a/doc/board/freescale/index.rst +++ b/doc/board/freescale/index.rst @@ -12,3 +12,4 @@ Freescale imx8mp_evk imx8mq_evk imx8qxp_mek + imxrt1020-evk -- 2.28.0
[PATCH V2 05/12] doc: board: Convert i.MX8MQ EVK README to reST
Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan --- board/freescale/imx8mq_evk/README | 37 doc/board/freescale/imx8mq_evk.rst | 56 ++ doc/board/freescale/index.rst | 1 + 3 files changed, 57 insertions(+), 37 deletions(-) delete mode 100644 board/freescale/imx8mq_evk/README create mode 100644 doc/board/freescale/imx8mq_evk.rst diff --git a/board/freescale/imx8mq_evk/README b/board/freescale/imx8mq_evk/README deleted file mode 100644 index 2689459b9f..00 --- a/board/freescale/imx8mq_evk/README +++ /dev/null @@ -1,37 +0,0 @@ -U-Boot for the NXP i.MX8MQ EVK board - -Quick Start -=== -- Build the ARM Trusted firmware binary -- Get ddr and hdmi fimware -- Build U-Boot -- Boot - -Get and Build the ARM Trusted firmware -== -Note: srctree is U-Boot source directory -Get ATF from: https://source.codeaurora.org/external/imx/imx-atf -branch: imx_4.19.35_1.0.0 -$ make PLAT=imx8mq bl31 -$ cp build/imx8mq/release/bl31.bin $(builddir) - -Get the ddr and hdmi firmware -= -$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-7.9.bin -$ chmod +x firmware-imx-7.9.bin -$ ./firmware-imx-7.9.bin -$ cp firmware-imx-7.9/firmware/hdmi/cadence/signed_hdmi_imx8m.bin $(builddir) -$ cp firmware-imx-7.9/firmware/ddr/synopsys/lpddr4*.bin $(builddir) - -Build U-Boot - -$ export CROSS_COMPILE=aarch64-poky-linux- -$ make imx8mq_evk_defconfig -$ make flash.bin - -Burn the flash.bin to MicroSD card offset 33KB -$sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=notrunc - -Boot - -Set Boot switch SW801: 1100 and Bmode: 10 to boot from Micro SD. diff --git a/doc/board/freescale/imx8mq_evk.rst b/doc/board/freescale/imx8mq_evk.rst new file mode 100644 index 00..0a64ecc5ba --- /dev/null +++ b/doc/board/freescale/imx8mq_evk.rst @@ -0,0 +1,56 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx8mq_evk +== + +U-Boot for the NXP i.MX8MQ EVK board + +Quick Start +--- + +- Build the ARM Trusted firmware binary +- Get ddr and hdmi fimware +- Build U-Boot +- Boot + +Get and Build the ARM Trusted firmware +-- + +Note: srctree is U-Boot source directory +Get ATF from: https://source.codeaurora.org/external/imx/imx-atf +branch: imx_4.19.35_1.0.0 + +.. code-block:: bash + + $ make PLAT=imx8mq bl31 + $ cp build/imx8mq/release/bl31.bin $(builddir) + +Get the ddr and hdmi firmware +- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-7.9.bin + $ chmod +x firmware-imx-7.9.bin + $ ./firmware-imx-7.9.bin + $ cp firmware-imx-7.9/firmware/hdmi/cadence/signed_hdmi_imx8m.bin $(builddir) + $ cp firmware-imx-7.9/firmware/ddr/synopsys/lpddr4*.bin $(builddir) + +Build U-Boot + + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-poky-linux- + $ make imx8mq_evk_defconfig + $ make flash.bin + +Burn the flash.bin to MicroSD card offset 33KB: + +.. code-block:: bash + + $sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=notrunc + +Boot + +Set Boot switch SW801: 1100 and Bmode: 10 to boot from Micro SD. diff --git a/doc/board/freescale/index.rst b/doc/board/freescale/index.rst index 33b1be95f5..5c10c95b93 100644 --- a/doc/board/freescale/index.rst +++ b/doc/board/freescale/index.rst @@ -10,3 +10,4 @@ Freescale imx8mm_evk imx8mn_evk imx8mp_evk + imx8mq_evk -- 2.28.0
[PATCH V2 02/12] doc: board: Convert i.MX8MP EVK README to reST
Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan --- board/freescale/imx8mp_evk/README | 41 doc/board/freescale/imx8mp_evk.rst | 61 ++ doc/board/freescale/index.rst | 1 + 3 files changed, 62 insertions(+), 41 deletions(-) delete mode 100644 board/freescale/imx8mp_evk/README create mode 100644 doc/board/freescale/imx8mp_evk.rst diff --git a/board/freescale/imx8mp_evk/README b/board/freescale/imx8mp_evk/README deleted file mode 100644 index 3c64979be9..00 --- a/board/freescale/imx8mp_evk/README +++ /dev/null @@ -1,41 +0,0 @@ -U-Boot for the NXP i.MX8MP EVK board - -Quick Start -=== -- Build the ARM Trusted firmware binary -- Get the firmware-imx package -- Build U-Boot -- Boot - -Get and Build the ARM Trusted firmware -== -Note: $(srctree) is the U-Boot source directory -Get ATF from: https://source.codeaurora.org/external/imx/imx-atf -branch: imx_5.4.3_2.0.0 -$ make PLAT=imx8mp bl31 -$ sudo cp build/imx8mp/release/bl31.bin $(srctree) - -Get the ddr firmware - -$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.7.bin -$ chmod +x firmware-imx-8.7.bin -$ ./firmware-imx-8.7 -$ sudo cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_1d_dmem_201904.bin $(srctree)/lpddr4_pmu_train_1d_dmem.bin -$ sudo cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_1d_imem_201904.bin $(srctree)/lpddr4_pmu_train_1d_imem.bin -$ sudo cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_2d_dmem_201904.bin $(srctree)/lpddr4_pmu_train_2d_dmem.bin -$ sudo cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_2d_imem_201904.bin $(srctree)/lpddr4_pmu_train_2d_imem.bin - -Build U-Boot - -$ export CROSS_COMPILE=aarch64-poky-linux- -$ make imx8mp_evk_defconfig -$ export ATF_LOAD_ADDR=0x96 -$ make flash.bin - -Burn the flash.bin to the MicroSD card at offset 32KB -$sudo dd if=flash.bin of=/dev/sd[x] bs=1K seek=32 conv=notrunc; sync - -Boot - -Set Boot switch to SD boot -Use /dev/ttyUSB2 for U-Boot console diff --git a/doc/board/freescale/imx8mp_evk.rst b/doc/board/freescale/imx8mp_evk.rst new file mode 100644 index 00..b34742e33e --- /dev/null +++ b/doc/board/freescale/imx8mp_evk.rst @@ -0,0 +1,61 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx8mp_evk +== + +U-Boot for the NXP i.MX8MP EVK board + +Quick Start +--- + +- Build the ARM Trusted firmware binary +- Get the firmware-imx package +- Build U-Boot +- Boot + +Get and Build the ARM Trusted firmware +-- + +Note: $(srctree) is the U-Boot source directory +Get ATF from: https://source.codeaurora.org/external/imx/imx-atf +branch: imx_5.4.3_2.0.0 + +.. code-block:: bash + + $ make PLAT=imx8mp bl31 + $ sudo cp build/imx8mp/release/bl31.bin $(srctree) + +Get the ddr firmware + + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.7.bin + $ chmod +x firmware-imx-8.7.bin + $ ./firmware-imx-8.7 + $ sudo cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_1d_dmem_201904.bin $(srctree)/lpddr4_pmu_train_1d_dmem.bin + $ sudo cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_1d_imem_201904.bin $(srctree)/lpddr4_pmu_train_1d_imem.bin + $ sudo cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_2d_dmem_201904.bin $(srctree)/lpddr4_pmu_train_2d_dmem.bin + $ sudo cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_2d_imem_201904.bin $(srctree)/lpddr4_pmu_train_2d_imem.bin + +Build U-Boot + + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-poky-linux- + $ make imx8mp_evk_defconfig + $ export ATF_LOAD_ADDR=0x96 + $ make flash.bin + +Burn the flash.bin to the MicroSD card at offset 32KB: + +.. code-block:: bash + + $sudo dd if=flash.bin of=/dev/sd[x] bs=1K seek=32 conv=notrunc; sync + +Boot + + +Set Boot switch to SD boot +Use /dev/ttyUSB2 for U-Boot console diff --git a/doc/board/freescale/index.rst b/doc/board/freescale/index.rst index 8d42b35b96..070d678725 100644 --- a/doc/board/freescale/index.rst +++ b/doc/board/freescale/index.rst @@ -7,3 +7,4 @@ Freescale :maxdepth: 2 b4860qds + imx8mp_evk -- 2.28.0
[PATCH V2 04/12] doc: board: Convert i.MX8MM EVK README to reST
Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan --- board/freescale/imx8mm_evk/README | 37 doc/board/freescale/imx8mm_evk.rst | 56 ++ doc/board/freescale/index.rst | 1 + 3 files changed, 57 insertions(+), 37 deletions(-) delete mode 100644 board/freescale/imx8mm_evk/README create mode 100644 doc/board/freescale/imx8mm_evk.rst diff --git a/board/freescale/imx8mm_evk/README b/board/freescale/imx8mm_evk/README deleted file mode 100644 index 3307711d5d..00 --- a/board/freescale/imx8mm_evk/README +++ /dev/null @@ -1,37 +0,0 @@ -U-Boot for the NXP i.MX8MM EVK board - -Quick Start -=== -- Build the ARM Trusted firmware binary -- Get ddr firmware -- Build U-Boot -- Boot - -Get and Build the ARM Trusted firmware -== -Note: builddir is U-Boot build directory (source directory for in-tree builds) -Get ATF from: https://source.codeaurora.org/external/imx/imx-atf -branch: imx_4.19.35_1.0.0 -$ make PLAT=imx8mm bl31 -$ cp build/imx8mm/release/bl31.bin $(builddir) - -Get the ddr firmware -= -$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin -$ chmod +x firmware-imx-8.0.bin -$ ./firmware-imx-8.0 -$ cp firmware-imx-8.0/firmware/ddr/synopsys/lpddr4*.bin $(builddir) - -Build U-Boot - -$ export CROSS_COMPILE=aarch64-poky-linux- -$ make imx8mm_evk_defconfig -$ export ATF_LOAD_ADDR=0x92 -$ make flash.bin - -Burn the flash.bin to MicroSD card offset 33KB -$sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=notrunc - -Boot - -Set Boot switch to SD boot diff --git a/doc/board/freescale/imx8mm_evk.rst b/doc/board/freescale/imx8mm_evk.rst new file mode 100644 index 00..f75190227c --- /dev/null +++ b/doc/board/freescale/imx8mm_evk.rst @@ -0,0 +1,56 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx8mm_evk +== + +U-Boot for the NXP i.MX8MM EVK board + +Quick Start +--- + +- Build the ARM Trusted firmware binary +- Get ddr firmware +- Build U-Boot +- Boot + +Get and Build the ARM Trusted firmware +-- + +Note: builddir is U-Boot build directory (source directory for in-tree builds) +Get ATF from: https://source.codeaurora.org/external/imx/imx-atf +branch: imx_4.19.35_1.0.0 + +.. code-block:: bash + + $ make PLAT=imx8mm bl31 + $ cp build/imx8mm/release/bl31.bin $(builddir) + +Get the ddr firmware + + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin + $ chmod +x firmware-imx-8.0.bin + $ ./firmware-imx-8.0 + $ cp firmware-imx-8.0/firmware/ddr/synopsys/lpddr4*.bin $(builddir) + +Build U-Boot + + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-poky-linux- + $ make imx8mm_evk_defconfig + $ export ATF_LOAD_ADDR=0x92 + $ make flash.bin + +Burn the flash.bin to MicroSD card offset 33KB: + +.. code-block:: bash + + $sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=notrunc + +Boot + +Set Boot switch to SD boot diff --git a/doc/board/freescale/index.rst b/doc/board/freescale/index.rst index 77b6802098..33b1be95f5 100644 --- a/doc/board/freescale/index.rst +++ b/doc/board/freescale/index.rst @@ -7,5 +7,6 @@ Freescale :maxdepth: 2 b4860qds + imx8mm_evk imx8mn_evk imx8mp_evk -- 2.28.0
[PATCH 00/17] fs/squashfs: fix memory leaks and introduce exists() function
This patch series fix several memory leaks, some use of dangling pointers (leading to cpu freeze) and finally introduce the exists() function for squashfs. This function enable testing the existance of a file, which is mandatory for using the distro_bootcmd Those fixes have been cut into several patches to be easier to review Richard Genoud (17): fs/squashfs: fix board hang-up when calling .exists() fs/squashfs: sqfs_opendir: fix some memory leaks and dangling pointers fs/squashfs: sqfs_opendir: simplify error handling fs/squashfs: sqfs_closedir: fix memory leak fs/squashfs: sqfs_split_path: fix memory leak and dangling pointers fs/squashfs: sqfs_read_directory_table: fix memory leak fs/squashfs: sqfs_search_dir: fix dangling pointer fs/squashfs: sqfs_search_dir: fix memory leaks fs/squashfs: sqfs_read_inode_table: fix dangling pointer fs/squashfs: sqfs_concat_tokens: check if malloc succeeds fs/squashfs: sqfs_size: fix dangling pointer dirs->entry fs/squashfs: sqfs_size: remove useless sqfs_closedir() fs/squashfs: sqfs_read: fix dangling pointer dirs->entry fs/squashfs: sqfs_read: remove useless sqfs_closedir() fs/squashfs: sqfs_read: fix memory leak fs/squashfs: sqfs_read: fix another memory leak fs/squashfs: implement exists() function fs/fs.c| 7 ++ fs/squashfs/sqfs.c | 238 ++--- include/squashfs.h | 1 + 3 files changed, 190 insertions(+), 56 deletions(-)
[PATCH 02/17] fs/squashfs: sqfs_opendir: fix some memory leaks and dangling pointers
When trying to load an non-existing file, the cpu hangs!
Signed-off-by: Richard Genoud
---
fs/squashfs/sqfs.c | 37 +
1 file changed, 29 insertions(+), 8 deletions(-)
diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index 15208b4dab0..1fdb9ac534b 100644
--- a/fs/squashfs/sqfs.c
+++ b/fs/squashfs/sqfs.c
@@ -821,22 +821,37 @@ int sqfs_opendir(const char *filename, struct
fs_dir_stream **dirsp)
if (!dirs)
return -EINVAL;
+ /* these should be set to NULL to prevent dangling pointers */
+ dirs->dir_header = NULL;
+ dirs->entry = NULL;
+ dirs->table = NULL;
+ dirs->inode_table = NULL;
+ dirs->dir_table = NULL;
+
ret = sqfs_read_inode_table(_table);
- if (ret)
- return -EINVAL;
+ if (ret) {
+ ret = -EINVAL;
+ goto free_dirs;
+ }
metablks_count = sqfs_read_directory_table(_table, _list);
- if (metablks_count < 1)
- return -EINVAL;
+ if (metablks_count < 1) {
+ ret = -EINVAL;
+ goto free_inode_table;
+ }
/* Tokenize filename */
token_count = sqfs_count_tokens(filename);
- if (token_count < 0)
- return -EINVAL;
+ if (token_count < 0) {
+ ret = -EINVAL;
+ goto free_inode_table;
+ }
path = strdup(filename);
- if (!path)
- return -ENOMEM;
+ if (!path) {
+ ret = -EINVAL;
+ goto free_inode_table;
+ }
token_list = malloc(token_count * sizeof(char *));
if (!token_list) {
@@ -882,6 +897,12 @@ free_tokens:
free(pos_list);
free_path:
free(path);
+free_inode_table:
+ if (ret)
+ free(inode_table);
+free_dirs:
+ if (ret)
+ free(dirs);
return ret;
}
[PATCH 05/17] fs/squashfs: sqfs_split_path: fix memory leak and dangling pointers
*file and *dir were not freed on error
Signed-off-by: Richard Genoud
---
fs/squashfs/sqfs.c | 39 +++
1 file changed, 27 insertions(+), 12 deletions(-)
diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index 0ac922af9e7..55d183663a8 100644
--- a/fs/squashfs/sqfs.c
+++ b/fs/squashfs/sqfs.c
@@ -1089,15 +1089,27 @@ static int sqfs_split_path(char **file, char **dir,
const char *path)
char *dirc, *basec, *bname, *dname, *tmp_path;
int ret = 0;
+ *file = NULL;
+ *dir = NULL;
+ dirc = NULL;
+ basec = NULL;
+ bname = NULL;
+ dname = NULL;
+ tmp_path = NULL;
+
/* check for first slash in path*/
if (path[0] == '/') {
tmp_path = strdup(path);
- if (!tmp_path)
- return -ENOMEM;
+ if (!tmp_path) {
+ ret = -ENOMEM;
+ goto out;
+ }
} else {
tmp_path = malloc(strlen(path) + 2);
- if (!tmp_path)
- return -ENOMEM;
+ if (!tmp_path) {
+ ret = -ENOMEM;
+ goto out;
+ }
tmp_path[0] = '/';
strcpy(tmp_path + 1, path);
}
@@ -1106,13 +1118,13 @@ static int sqfs_split_path(char **file, char **dir,
const char *path)
dirc = strdup(tmp_path);
if (!dirc) {
ret = -ENOMEM;
- goto free_tmp;
+ goto out;
}
basec = strdup(tmp_path);
if (!basec) {
ret = -ENOMEM;
- goto free_dirc;
+ goto out;
}
dname = sqfs_dirname(dirc);
@@ -1122,14 +1134,14 @@ static int sqfs_split_path(char **file, char **dir,
const char *path)
if (!*file) {
ret = -ENOMEM;
- goto free_basec;
+ goto out;
}
if (*dname == '\0') {
*dir = malloc(2);
if (!*dir) {
ret = -ENOMEM;
- goto free_basec;
+ goto out;
}
(*dir)[0] = '/';
@@ -1138,15 +1150,18 @@ static int sqfs_split_path(char **file, char **dir,
const char *path)
*dir = strdup(dname);
if (!*dir) {
ret = -ENOMEM;
- goto free_basec;
+ goto out;
}
}
-free_basec:
+out:
+ if (ret) {
+ free(*file);
+ free(*dir);
+ *dir = *file = NULL;
+ }
free(basec);
-free_dirc:
free(dirc);
-free_tmp:
free(tmp_path);
return ret;
[PATCH 04/17] fs/squashfs: sqfs_closedir: fix memory leak
sqfs_dirs wasn't freed anywhere. Signed-off-by: Richard Genoud --- fs/squashfs/sqfs.c | 1 + 1 file changed, 1 insertion(+) diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c index b94a9715205..0ac922af9e7 100644 --- a/fs/squashfs/sqfs.c +++ b/fs/squashfs/sqfs.c @@ -1573,4 +1573,5 @@ void sqfs_closedir(struct fs_dir_stream *dirs) free(sqfs_dirs->inode_table); free(sqfs_dirs->dir_table); free(sqfs_dirs->dir_header); + free(sqfs_dirs); }
[PATCH 07/17] fs/squashfs: sqfs_search_dir: fix dangling pointer
dirs->entry shouldn't be left dangling as it could be freed twice.
Signed-off-by: Richard Genoud
---
fs/squashfs/sqfs.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index c4d74fd4d6d..1df27f7b903 100644
--- a/fs/squashfs/sqfs.c
+++ b/fs/squashfs/sqfs.c
@@ -485,6 +485,7 @@ static int sqfs_search_dir(struct squashfs_dir_stream
*dirs, char **token_list,
if (!ret)
break;
free(dirs->entry);
+ dirs->entry = NULL;
}
if (ret) {
@@ -530,6 +531,7 @@ static int sqfs_search_dir(struct squashfs_dir_stream
*dirs, char **token_list,
if (ret)
return -EINVAL;
free(dirs->entry);
+ dirs->entry = NULL;
ret = sqfs_search_dir(dirs, sym_tokens, token_count,
m_list, m_count);
@@ -537,6 +539,7 @@ static int sqfs_search_dir(struct squashfs_dir_stream
*dirs, char **token_list,
} else if (!sqfs_is_dir(get_unaligned_le16(>inode_type))) {
printf("** Cannot find directory. **\n");
free(dirs->entry);
+ dirs->entry = NULL;
return -EINVAL;
}
@@ -556,6 +559,7 @@ static int sqfs_search_dir(struct squashfs_dir_stream
*dirs, char **token_list,
if (sqfs_is_empty_dir(table)) {
printf("Empty directory.\n");
free(dirs->entry);
+ dirs->entry = NULL;
return SQFS_EMPTY_DIR;
}
@@ -564,6 +568,7 @@ static int sqfs_search_dir(struct squashfs_dir_stream
*dirs, char **token_list,
dirs->entry_count = dirs->dir_header->count + 1;
dirs->size -= SQFS_DIR_HEADER_SIZE;
free(dirs->entry);
+ dirs->entry = NULL;
}
offset = sqfs_dir_offset(table, m_list, m_count);
[PATCH 09/17] fs/squashfs: sqfs_read_inode_table: fix dangling pointer
inode_table should not be left dangling as it may be freed in sqfs_opendir
Signed-off-by: Richard Genoud
---
fs/squashfs/sqfs.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index eb8851a7148..c4b7c84e9aa 100644
--- a/fs/squashfs/sqfs.c
+++ b/fs/squashfs/sqfs.c
@@ -731,6 +731,7 @@ static int sqfs_read_inode_table(unsigned char
**inode_table)
src_table, src_len);
if (ret) {
free(*inode_table);
+ *inode_table = NULL;
goto free_itb;
}
[PATCH 03/17] fs/squashfs: sqfs_opendir: simplify error handling
Using only one label permits to prevents bugs when moving code around.
Signed-off-by: Richard Genoud
---
fs/squashfs/sqfs.c | 27 ---
1 file changed, 12 insertions(+), 15 deletions(-)
diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index 1fdb9ac534b..b94a9715205 100644
--- a/fs/squashfs/sqfs.c
+++ b/fs/squashfs/sqfs.c
@@ -812,9 +812,9 @@ free_dtb:
int sqfs_opendir(const char *filename, struct fs_dir_stream **dirsp)
{
unsigned char *inode_table = NULL, *dir_table = NULL;
- int j, token_count, ret = 0, metablks_count;
+ int j, token_count = 0, ret = 0, metablks_count;
struct squashfs_dir_stream *dirs;
- char **token_list, *path;
+ char **token_list = NULL, *path = NULL;
u32 *pos_list = NULL;
dirs = malloc(sizeof(*dirs));
@@ -831,38 +831,38 @@ int sqfs_opendir(const char *filename, struct
fs_dir_stream **dirsp)
ret = sqfs_read_inode_table(_table);
if (ret) {
ret = -EINVAL;
- goto free_dirs;
+ goto out;
}
metablks_count = sqfs_read_directory_table(_table, _list);
if (metablks_count < 1) {
ret = -EINVAL;
- goto free_inode_table;
+ goto out;
}
/* Tokenize filename */
token_count = sqfs_count_tokens(filename);
if (token_count < 0) {
ret = -EINVAL;
- goto free_inode_table;
+ goto out;
}
path = strdup(filename);
if (!path) {
ret = -EINVAL;
- goto free_inode_table;
+ goto out;
}
token_list = malloc(token_count * sizeof(char *));
if (!token_list) {
ret = -EINVAL;
- goto free_path;
+ goto out;
}
/* Fill tokens list */
ret = sqfs_tokenize(token_list, token_count, path);
if (ret)
- goto free_tokens;
+ goto out;
/*
* ldir's (extended directory) size is greater than dir, so it works as
* a general solution for the malloc size, since 'i' is a union.
@@ -872,7 +872,7 @@ int sqfs_opendir(const char *filename, struct fs_dir_stream
**dirsp)
ret = sqfs_search_dir(dirs, token_list, token_count, pos_list,
metablks_count);
if (ret)
- goto free_tokens;
+ goto out;
if (le16_to_cpu(dirs->i_dir.inode_type) == SQFS_DIR_TYPE)
dirs->size = le16_to_cpu(dirs->i_dir.file_size);
@@ -890,19 +890,16 @@ int sqfs_opendir(const char *filename, struct
fs_dir_stream **dirsp)
*dirsp = (struct fs_dir_stream *)dirs;
-free_tokens:
+out:
for (j = 0; j < token_count; j++)
free(token_list[j]);
free(token_list);
free(pos_list);
-free_path:
free(path);
-free_inode_table:
- if (ret)
+ if (ret) {
free(inode_table);
-free_dirs:
- if (ret)
free(dirs);
+ }
return ret;
}
[PATCH 01/17] fs/squashfs: fix board hang-up when calling .exists()
add missing squashfs function to prevent dangling or null pointers.
For exemple, when calling test [ -e somefile ], squashfs.exists may be
called.
Signed-off-by: Richard Genoud
---
fs/fs.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/fs/fs.c b/fs/fs.c
index 29ad4d1a695..fb27c910d4f 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -287,6 +287,7 @@ static struct fstype_info fstypes[] = {
{
.fstype = FS_TYPE_SQUASHFS,
.name = "squashfs",
+ .null_dev_desc_ok = false,
.probe = sqfs_probe,
.opendir = sqfs_opendir,
.readdir = sqfs_readdir,
@@ -295,6 +296,12 @@ static struct fstype_info fstypes[] = {
.size = sqfs_size,
.close = sqfs_close,
.closedir = sqfs_closedir,
+ .exists = fs_exists_unsupported,
+ .uuid = fs_uuid_unsupported,
+ .write = fs_write_unsupported,
+ .ln = fs_ln_unsupported,
+ .unlink = fs_unlink_unsupported,
+ .mkdir = fs_mkdir_unsupported,
},
#endif
{
Re: [PATCH v8 8/9] configs: mt8512: enable fastboot and USB host related configs
On Wed, Oct 14, 2020 at 3:08 PM Chunfeng Yun wrote: > > Enable mtu3, xhci, tphy drivers. > Device mode: enable fastboot; > Host mode: enable USB, FAT commands, and fixed regulator, > mass storage drivers; > Due to device mode is enabled by default, comment out > the host mode config here. > > Signed-off-by: Chunfeng Yun > --- > v8 changes: > 1. add CONFIG_USB_XHCI_HCD due to Kconfig changes > 2. modify comment of CONFIG_USB_MTU3_HOST suggested by Bin > 3. merge [v7 8/10] add [v7 9/10] suggested by Bin > > v2~v7: no changes > --- > configs/mt8512_bm1_emmc_defconfig | 26 ++ > 1 file changed, 26 insertions(+) > Reviewed-by: Bin Meng
Re: [PATCH v2 2/3] arm64: dts: armada-3720-espressobin: split common parts to .dtsi
On 04.09.20 17:33, Andre Heider wrote:
Move most of the dts to the new common armada-3720-espressobin.dtsi
file, just like Linux, but keep the current, downstream based, version.
The dts itself is imported from Linux.
Signed-off-by: Andre Heider
Applied to u-boot-marvell/master
Thanks,
Stefan
---
arch/arm/dts/armada-3720-espressobin.dts | 190 ++
...sobin.dts => armada-3720-espressobin.dtsi} | 3 -
2 files changed, 20 insertions(+), 173 deletions(-)
rewrite arch/arm/dts/armada-3720-espressobin.dts (95%)
copy arch/arm/dts/{armada-3720-espressobin.dts =>
armada-3720-espressobin.dtsi} (96%)
diff --git a/arch/arm/dts/armada-3720-espressobin.dts
b/arch/arm/dts/armada-3720-espressobin.dts
dissimilarity index 95%
index be67a45870..1542d836c0 100644
--- a/arch/arm/dts/armada-3720-espressobin.dts
+++ b/arch/arm/dts/armada-3720-espressobin.dts
@@ -1,170 +1,20 @@
-/*
- * Device Tree file for Marvell Armada 3720 community board
- * (ESPRESSOBin)
- * Copyright (C) 2016 Marvell
- *
- * Gregory CLEMENT
- * Konstantin Porotchkin
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This file is distributed in the hope that it will be useful
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/dts-v1/;
-
-#include "armada-372x.dtsi"
-
-/ {
- model = "Globalscale Marvell ESPRESSOBin Board";
- compatible = "globalscale,espressobin", "marvell,armada3720",
"marvell,armada3710";
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- aliases {
- ethernet0 =
- i2c0 =
- spi0 =
- };
-
- memory {
- device_type = "memory";
- reg = <0x 0x 0x 0x2000>;
- };
-
- vcc_sd_reg0: regulator@0 {
- compatible = "regulator-gpio";
- regulator-name = "vcc_sd0";
- regulator-min-microvolt = <180>;
- regulator-max-microvolt = <330>;
- regulator-type = "voltage";
- states = <180 0x1
- 330 0x0>;
- gpios = < 4 GPIO_ACTIVE_HIGH>;
- };
-};
-
- {
- max-lanes = <3>;
- phy0 {
- phy-type = ;
- phy-speed = ;
- };
-
- phy1 {
- phy-type = ;
- phy-speed = ;
- };
-
- phy2 {
- phy-type = ;
- phy-speed = ;
- };
-};
-
- {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <_pins>, <_pins>;
- phy-mode = "rgmii";
- phy_addr = <0x1>;
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_pins>;
- status = "okay";
-};
-
-/* CON3 */
- {
- status = "okay";
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_pins>;
- bus-width = <4>;
- cd-gpios = < 3 GPIO_ACTIVE_LOW>;
- vqmmc-supply = <_sd_reg0>;
- status = "okay";
-};
-
- {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <_quad_pins>;
-
- spi-flash@0
Re: [PATCH v2 3/3] arm64: dts: a3720: add support for espressobin with populated emmc
On 04.09.20 17:33, Andre Heider wrote:
Import armada-3720-espressobin-emmc.dts from Linux, but use sdhc1 for
emmc, since our dtsi is still based on downstream and sdhc0 is used for
the sd card.
Signed-off-by: Andre Heider
Applied to u-boot-marvell/master
Thanks,
Stefan
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/armada-3720-espressobin-emmc.dts | 44 +++
doc/README.marvell| 7 ++-
3 files changed, 50 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/dts/armada-3720-espressobin-emmc.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 5e34192be6..8f1958b5a7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -202,6 +202,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
dtb-$(CONFIG_ARCH_MVEBU) += \
armada-3720-db.dtb \
armada-3720-espressobin.dtb \
+ armada-3720-espressobin-emmc.dtb\
armada-3720-turris-mox.dtb \
armada-3720-uDPU.dtb\
armada-375-db.dtb \
diff --git a/arch/arm/dts/armada-3720-espressobin-emmc.dts
b/arch/arm/dts/armada-3720-espressobin-emmc.dts
new file mode 100644
index 00..29ccb6a573
--- /dev/null
+++ b/arch/arm/dts/armada-3720-espressobin-emmc.dts
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for Globalscale Marvell ESPRESSOBin Board with eMMC
+ * Copyright (C) 2018 Marvell
+ *
+ * Romain Perier
+ * Konstantin Porotchkin
+ *
+ */
+/*
+ * Schematic available at
http://espressobin.net/wp-content/uploads/2017/08/ESPRESSObin_V5_Schematics.pdf
+ */
+
+/dts-v1/;
+
+#include "armada-3720-espressobin.dtsi"
+
+/ {
+ model = "Globalscale Marvell ESPRESSOBin Board (eMMC)";
+ compatible = "globalscale,espressobin-emmc", "globalscale,espressobin",
+"marvell,armada3720", "marvell,armada3710";
+};
+
+/* U11 */
+ {
+ non-removable;
+ bus-width = <8>;
+ mmc-ddr-1_8v;
+ mmc-hs400-1_8v;
+ marvell,xenon-emmc;
+ marvell,xenon-tun-count = <9>;
+ marvell,pad-type = "fixed-1-8v";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ status = "okay";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mmccard: mmccard@0 {
+ compatible = "mmc-card";
+ reg = <0>;
+ };
+};
diff --git a/doc/README.marvell b/doc/README.marvell
index 5416bc3035..be07f31f8c 100644
--- a/doc/README.marvell
+++ b/doc/README.marvell
@@ -43,8 +43,11 @@ Build Procedure
In order to prevent this, the required device-tree MUST be set during
compilation.
All device-tree files are located in ./arch/arm/dts/ folder.
- For other DB boards (MacchiatoBin, EspressoBin and 3700 DB board) compile u-boot with
- just default device-tree from defconfig using:
+ For the EspressoBin board with populated eMMC device use
+ # make DEVICE_TREE=armada-3720-espressobin-emmc
+
+ For other DB boards (MacchiatoBin, EspressoBin without soldered eMMC
and 3700 DB board)
+ compile u-boot with just default device-tree from defconfig using:
# make
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH 1/2] arm: mvebu: Initial iEi Puzzle-M801 support
Hi Luka,
On 14.10.20 10:14, Luka Perkov wrote:
Hello Stefan and Tom,
On Wed, Sep 23, 2020 at 8:47 AM Stefan Roese wrote:
On 29.08.20 00:35, Luka Kovacic wrote:
Add initial U-Boot support for the iEi Puzzle-M801 board based on the
Marvell Armada 88F8040 SoC.
Currently supported hardware:
1x USB 3.0
4x Gigabit Ethernet
2x SFP+ (with NXP PCA9555 and NXP PCA9544)
1x SATA 3.0
1x M.2 type B
1x RJ45 UART
1x SPI flash
1x EPSON RX8010 RTC
Signed-off-by: Luka Kovacic
Cc: Luka Perkov
Reviewed-by: Stefan Roese
Given that these should be good to go, can they be merged into the tree?
Perfect timing. I'm currently preparing the pull request. ;)
Thanks,
Stefan
Thanks,
Luka
Thanks,
Stefan
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/armada-8040-puzzle-m801.dts| 389
board/Marvell/mvebu_armada-8k/MAINTAINERS | 6 +
configs/mvebu_puzzle-m801-88f8040_defconfig | 91 +
4 files changed, 487 insertions(+)
create mode 100644 arch/arm/dts/armada-8040-puzzle-m801.dts
create mode 100644 configs/mvebu_puzzle-m801-88f8040_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f8f529435b..f13794bc42 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -218,6 +218,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-8040-clearfog-gt-8k.dtb \
armada-8040-db.dtb \
armada-8040-mcbin.dtb \
+ armada-8040-puzzle-m801.dtb \
armada-xp-crs305-1g-4s.dtb \
armada-xp-crs305-1g-4s-bit.dtb \
armada-xp-crs326-24g-2s.dtb \
diff --git a/arch/arm/dts/armada-8040-puzzle-m801.dts
b/arch/arm/dts/armada-8040-puzzle-m801.dts
new file mode 100644
index 00..58edb5b3aa
--- /dev/null
+++ b/arch/arm/dts/armada-8040-puzzle-m801.dts
@@ -0,0 +1,389 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2016 Marvell International Ltd.
+ * Copyright (C) 2020 Sartura Ltd.
+ */
+
+#include "armada-8040.dtsi" /* include SoC device tree */
+
+/ {
+ model = "iEi-Puzzle-M801";
+ compatible = "marvell,armada8040-puzzle-m801",
+ "marvell,armada8040";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ aliases {
+ i2c0 =
+ i2c1 = _i2c0;
+ i2c2 = _i2c1;
+ i2c3 = _switch;
+ spi0 =
+ gpio0 = _gpio0;
+ gpio1 = _gpio0;
+ gpio2 = _gpio1;
+ gpio3 = _gpio;
+ };
+
+ memory@ {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x8000>;
+ };
+
+ simple-bus {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_usb3h0_vbus: usb3-vbus0 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <_xhci_vbus_pins>;
+ regulator-name = "reg-usb3h0-vbus";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ startup-delay-us = <50>;
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <_gpio1 15 GPIO_ACTIVE_HIGH>; /* GPIO[47] */
+ };
+ };
+};
+
+ {
+ status = "okay";
+ clock-frequency = <10>;
+
+ rtc@32 {
+ compatible = "epson,rx8010";
+ reg = <0x32>;
+ };
+};
+
+ {
+ status = "okay";
+};
+
+_pinctl {
+ /*
+ * MPP Bus:
+ * AP SPI0 [0-3]
+ * AP I2C [4-5]
+ * AP GPIO [6]
+ * AP UART 1 RX/TX [7-8]
+ * AP GPIO [9-10]
+ * AP GPIO [12]
+ * UART0 [11,19]
+ */
+ /* 0 1 2 3 4 5 6 7 8 9 */
+ pin-func = < 3 3 3 3 3 3 3 3 3 0
+ 0 3 0 0 0 0 0 0 0 3 >;
+};
+
+_pinctl {
+ /*
+ * MPP Bus:
+ * [0-31] = 0xff: Keep default CP0_shared_pins:
+ * [11] CLKOUT_MPP_11 (out)
+ * [23] LINK_RD_IN_CP2CP (in)
+ * [25] CLKOUT_MPP_25 (out)
+ * [29] AVS_FB_IN_CP2CP (in)
+ * [32,34] SMI
+ * [33]MSS power down
+ * [35-38] CP0 I2C1 and I2C0
+ * [39] MSS CKE Enable
+ * [40,41] CP0 UART1 TX/RX
+ * [42,43] XSMI (controls two 10G phys)
+ * [47] USB VBUS EN
+ * [48] FAN PWM
+ * [49] 10G port 1 interrupt
+ * [50] 10G port 0 interrupt
+ * [51] 2.5G SFP TX fault
+ * [52] PCIe reset out
+ * [53] 2.5G SFP mode
+ * [54] 2.5G SFP LOS
+ * [55] Micro SD card detect
+ * [56-61] Micro SD
+ * [62] CP1 SFI SFP FAULT
+ */
+ /* 0123456789 */
+ pin-func = < 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+ 0xff 0xff 0xff 0xff 0xff 0xff 0xff
Re: [PATCH v3] spi: mvebu_a3700_spi: add support for cs-gpios
On 30.09.20 16:28, George Hilliard wrote:
The device tree has a way to specify GPIO lines as chip selects. From
the binding docs:
So if for example the controller has 2 CS lines, and the cs-gpios
property looks like this:
cs-gpios = < 0 0> <0> < 1 0> < 2 0>;
Then it should be configured so that num_chipselect = 4 with the
following mapping:
cs0 : 0 0
cs1 : native
cs2 : 1 0
cs3 : 2 0
Add support for this, while retaining backward-compatibility with
existing device trees; the driver will preserve existing behavior if a
cs-gpios list is not given, or if a particular line is specified as <0>
(native).
This implementation is inspired by similar implementations in
neighboring drivers for other platforms: atmega, mxc, etc.
Signed-off-by: George Hilliard
Reviewed-by: Stefan Roese
Applied to u-boot-marvell/master
Thanks,
Stefan
---
drivers/spi/mvebu_a3700_spi.c | 41 ++-
1 file changed, 35 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/mvebu_a3700_spi.c b/drivers/spi/mvebu_a3700_spi.c
index e860b9ec64..eb13cf349e 100644
--- a/drivers/spi/mvebu_a3700_spi.c
+++ b/drivers/spi/mvebu_a3700_spi.c
@@ -15,6 +15,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -27,6 +28,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define MVEBU_SPI_A3700_SPI_EN_0 BIT(16)
#define MVEBU_SPI_A3700_CLK_PRESCALE_MASK 0x1f
+#define MAX_CS_COUNT 4
/* SPI registers */
struct spi_reg {
@@ -39,16 +41,23 @@ struct spi_reg {
struct mvebu_spi_platdata {
struct spi_reg *spireg;
struct clk clk;
+ struct gpio_desc cs_gpios[MAX_CS_COUNT];
};
-static void spi_cs_activate(struct spi_reg *reg, int cs)
+static void spi_cs_activate(struct mvebu_spi_platdata *plat, int cs)
{
- setbits_le32(>ctrl, MVEBU_SPI_A3700_SPI_EN_0 << cs);
+ if (CONFIG_IS_ENABLED(DM_GPIO) && dm_gpio_is_valid(>cs_gpios[cs]))
+ dm_gpio_set_value(>cs_gpios[cs], 1);
+ else
+ setbits_le32(>spireg->ctrl, MVEBU_SPI_A3700_SPI_EN_0 <<
cs);
}
-static void spi_cs_deactivate(struct spi_reg *reg, int cs)
+static void spi_cs_deactivate(struct mvebu_spi_platdata *plat, int cs)
{
- clrbits_le32(>ctrl, MVEBU_SPI_A3700_SPI_EN_0 << cs);
+ if (CONFIG_IS_ENABLED(DM_GPIO) && dm_gpio_is_valid(>cs_gpios[cs]))
+ dm_gpio_set_value(>cs_gpios[cs], 0);
+ else
+ clrbits_le32(>spireg->ctrl, MVEBU_SPI_A3700_SPI_EN_0 <<
cs);
}
/**
@@ -150,7 +159,7 @@ static int mvebu_spi_xfer(struct udevice *dev, unsigned int
bitlen,
/* Activate CS */
if (flags & SPI_XFER_BEGIN) {
debug("SPI: activate cs.\n");
- spi_cs_activate(reg, spi_chip_select(dev));
+ spi_cs_activate(plat, spi_chip_select(dev));
}
/* Send and/or receive */
@@ -169,7 +178,7 @@ static int mvebu_spi_xfer(struct udevice *dev, unsigned int
bitlen,
return ret;
debug("SPI: deactivate cs.\n");
- spi_cs_deactivate(reg, spi_chip_select(dev));
+ spi_cs_deactivate(plat, spi_chip_select(dev));
}
return 0;
@@ -247,6 +256,26 @@ static int mvebu_spi_probe(struct udevice *bus)
writel(data, >cfg);
+ /* Set up CS GPIOs in device tree, if any */
+ if (CONFIG_IS_ENABLED(DM_GPIO) && gpio_get_list_count(bus, "cs-gpios")
> 0) {
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(plat->cs_gpios); i++) {
+ ret = gpio_request_by_name(bus, "cs-gpios", i,
>cs_gpios[i], 0);
+ if (ret < 0 || !dm_gpio_is_valid(>cs_gpios[i])) {
+ /* Use the native CS function for this line */
+ continue;
+ }
+
+ ret = dm_gpio_set_dir_flags(>cs_gpios[i],
+ GPIOD_IS_OUT |
GPIOD_ACTIVE_LOW);
+ if (ret) {
+ dev_err(bus, "Setting cs %d error\n", i);
+ return ret;
+ }
+ }
+ }
+
return 0;
}
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH v3] arm64: dts: armada-3720-espressobin: use Linux model/compatible strings
On 02.10.20 07:51, Andre Heider wrote:
Fix the actual board vendor and ease synching dts files from Linux.
Signed-off-by: Andre Heider
---
v3: rebase on master
Applied to u-boot-marvell/master
Thanks,
Stefan
arch/arm/dts/armada-3720-espressobin.dts | 4 ++--
board/Marvell/mvebu_armada-37xx/board.c | 8
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/dts/armada-3720-espressobin.dts
b/arch/arm/dts/armada-3720-espressobin.dts
index 4534f5ff29..be67a45870 100644
--- a/arch/arm/dts/armada-3720-espressobin.dts
+++ b/arch/arm/dts/armada-3720-espressobin.dts
@@ -50,8 +50,8 @@
#include "armada-372x.dtsi"
/ {
- model = "Marvell Armada 3720 Community Board ESPRESSOBin";
- compatible = "marvell,armada-3720-espressobin", "marvell,armada3720",
"marvell,armada3710";
+ model = "Globalscale Marvell ESPRESSOBin Board";
+ compatible = "globalscale,espressobin", "marvell,armada3720",
"marvell,armada3710";
chosen {
stdout-path = "serial0:115200n8";
diff --git a/board/Marvell/mvebu_armada-37xx/board.c
b/board/Marvell/mvebu_armada-37xx/board.c
index 2bfc7171c4..73d69e0388 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -88,14 +88,14 @@ int board_late_init(void)
if (env_get("fdtfile"))
return 0;
- if (!of_machine_is_compatible("marvell,armada-3720-espressobin"))
+ if (!of_machine_is_compatible("globalscale,espressobin"))
return 0;
/* If the memory controller has been configured for DDR4, we're running on v7 */
ddr4 = ((readl(A3700_CH0_MC_CTRL2_REG) >>
A3700_MC_CTRL2_SDRAM_TYPE_OFFS)
& A3700_MC_CTRL2_SDRAM_TYPE_MASK) ==
A3700_MC_CTRL2_SDRAM_TYPE_DDR4;
- emmc = of_machine_is_compatible("marvell,armada-3720-espressobin-emmc");
+ emmc = of_machine_is_compatible("globalscale,espressobin-emmc");
if (ddr4 && emmc)
env_set("fdtfile",
"marvell/armada-3720-espressobin-v7-emmc.dtb");
@@ -248,7 +248,7 @@ static int mii_multi_chip_mode_write(struct mii_dev *bus,
int dev_smi_addr,
/* Bring-up board-specific network stuff */
int board_network_enable(struct mii_dev *bus)
{
- if (!of_machine_is_compatible("marvell,armada-3720-espressobin"))
+ if (!of_machine_is_compatible("globalscale,espressobin"))
return 0;
/*
@@ -300,7 +300,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
int part_off;
/* Fill SPI MTD partitions for Linux kernel on Espressobin */
- if (!of_machine_is_compatible("marvell,armada-3720-espressobin"))
+ if (!of_machine_is_compatible("globalscale,espressobin"))
return 0;
spi_off = fdt_node_offset_by_compatible(blob, -1, "jedec,spi-nor");
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH v8 8/9] configs: mt8512: enable fastboot and USB host related configs
Hi Bin, Thank you again On Wed, 2020-10-14 at 16:05 +0800, Bin Meng wrote: > On Wed, Oct 14, 2020 at 3:08 PM Chunfeng Yun > wrote: > > > > Enable mtu3, xhci, tphy drivers. > > Device mode: enable fastboot; > > Host mode: enable USB, FAT commands, and fixed regulator, > > mass storage drivers; > > Due to device mode is enabled by default, comment out > > the host mode config here. > > > > Signed-off-by: Chunfeng Yun > > --- > > v8 changes: > > 1. add CONFIG_USB_XHCI_HCD due to Kconfig changes > > 2. modify comment of CONFIG_USB_MTU3_HOST suggested by Bin > > 3. merge [v7 8/10] add [v7 9/10] suggested by Bin > > > > v2~v7: no changes > > --- > > configs/mt8512_bm1_emmc_defconfig | 26 ++ > > 1 file changed, 26 insertions(+) > > > > Reviewed-by: Bin Meng
Re: [PATCH v8 5/9] usb: add MediaTek USB3 DRD driver
On Wed, 2020-10-14 at 10:22 +0200, Marek Vasut wrote: > On 10/14/20 9:08 AM, Chunfeng Yun wrote: > > This patch adds support for the MediaTek USB3 DRD controller, > > its host side is based on xHCI, this driver supports device mode > > and host mode. > > This one does not apply, can you rebase just this one on top of usb/next > and resend ? I picked the other patches into there already, so you don't > have to resend the whole series. Ok > > [...] > > > +#defineMU3D_EP_TXCR0(epnum)(U3D_TX1CSR0 + (((epnum) - 1) * 0x10)) > > +#defineMU3D_EP_TXCR1(epnum)(U3D_TX1CSR1 + (((epnum) - 1) * 0x10)) > > +#defineMU3D_EP_TXCR2(epnum)(U3D_TX1CSR2 + (((epnum) - 1) * 0x10)) > > + > > +#defineMU3D_EP_RXCR0(epnum)(U3D_RX1CSR0 + (((epnum) - 1) * 0x10)) > > +#defineMU3D_EP_RXCR1(epnum)(U3D_RX1CSR1 + (((epnum) - 1) * 0x10)) > > +#defineMU3D_EP_RXCR2(epnum)(U3D_RX1CSR2 + (((epnum) - 1) * 0x10)) > > #define[space] please, use consistently. Will fix it Thanks > > > +#define USB_QMU_RQCSR(epnum) (U3D_RXQCSR1 + (((epnum) - 1) * 0x10)) > > +#define USB_QMU_RQSAR(epnum) (U3D_RXQSAR1 + (((epnum) - 1) * 0x10)) > > +#define USB_QMU_RQCPR(epnum) (U3D_RXQCPR1 + (((epnum) - 1) * 0x10)) > > [...]
[PATCH] spi: zynq_qspi: Use clk subsystem to get reference qspi clk
From: T Karthik Reddy
Remove fixed reference clk used by plat->frequency and use clk
subsystem to get reference clk. As per spi dt bindings
"spi-max-frequency" property should be used by the slave devices.
This property is read by spi-uclass driver for the slave device.
So avoid reading above property from the platform driver.
Signed-off-by: T Karthik Reddy
Signed-off-by: Michal Simek
---
drivers/spi/zynq_qspi.c | 35 +++
1 file changed, 27 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
index 3f39ef05f2d6..7591164ea986 100644
--- a/drivers/spi/zynq_qspi.c
+++ b/drivers/spi/zynq_qspi.c
@@ -6,6 +6,7 @@
* Xilinx Zynq Quad-SPI(QSPI) controller driver (master mode only)
*/
+#include
#include
#include
#include
@@ -105,14 +106,6 @@ static int zynq_qspi_ofdata_to_platdata(struct udevice
*bus)
plat->regs = (struct zynq_qspi_regs *)fdtdec_get_addr(blob,
node, "reg");
- /* FIXME: Use 166MHz as a suitable default */
- plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
- 1);
- plat->speed_hz = plat->frequency / 2;
-
- debug("%s: regs=%p max-frequency=%d\n", __func__,
- plat->regs, plat->frequency);
-
return 0;
}
@@ -159,13 +152,39 @@ static int zynq_qspi_probe(struct udevice *bus)
{
struct zynq_qspi_platdata *plat = dev_get_platdata(bus);
struct zynq_qspi_priv *priv = dev_get_priv(bus);
+ struct clk clk;
+ unsigned long clock;
+ int ret;
priv->regs = plat->regs;
priv->fifo_depth = ZYNQ_QSPI_FIFO_DEPTH;
+ ret = clk_get_by_name(bus, "ref_clk", );
+ if (ret < 0) {
+ dev_err(dev, "failed to get clock\n");
+ return ret;
+ }
+
+ clock = clk_get_rate();
+ if (IS_ERR_VALUE(clock)) {
+ dev_err(dev, "failed to get rate\n");
+ return clock;
+ }
+
+ ret = clk_enable();
+ if (ret && ret != -ENOSYS) {
+ dev_err(dev, "failed to enable clock\n");
+ return ret;
+ }
+
/* init the zynq spi hw */
zynq_qspi_init_hw(priv);
+ plat->frequency = clock;
+ plat->speed_hz = plat->frequency / 2;
+
+ debug("%s: max-frequency=%d\n", __func__, plat->speed_hz);
+
return 0;
}
--
2.28.0
[PATCH 31/33] board: st: stm32mp1: migrate trace to dev and log macro
Change pr_* to dev_ or log_ macro and define LOG_CATEGORY.
Signed-off-by: Patrick Delaunay
---
board/st/stm32mp1/stm32mp1.c | 134 +--
1 file changed, 65 insertions(+), 69 deletions(-)
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 03a19af930..202f782906 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -2,6 +2,9 @@
/*
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
*/
+
+#define LOG_CATEGORY LOGC_BOARD
+
#include
#include
#include
@@ -106,12 +109,11 @@ int checkboard(void)
else
mode = "basic";
- printf("Board: stm32mp1 in %s mode", mode);
fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
_compat_len);
- if (fdt_compat && fdt_compat_len)
- printf(" (%s)", fdt_compat);
- puts("\n");
+
+ log_info("Board: stm32mp1 in %s mode (%s)\n", mode,
+fdt_compat && fdt_compat_len ? fdt_compat : "");
/* display the STMicroelectronics board identification */
if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
@@ -122,12 +124,12 @@ int checkboard(void)
ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
, sizeof(otp));
if (ret > 0 && otp)
- printf("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
- otp >> 16,
- (otp >> 12) & 0xF,
- (otp >> 4) & 0xF,
- ((otp >> 8) & 0xF) - 1 + 'A',
- otp & 0xF);
+ log_info("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
+otp >> 16,
+(otp >> 12) & 0xF,
+(otp >> 4) & 0xF,
+((otp >> 8) & 0xF) - 1 + 'A',
+otp & 0xF);
}
return 0;
@@ -144,17 +146,16 @@ static void board_key_check(void)
node = ofnode_path("/config");
if (!ofnode_valid(node)) {
- debug("%s: no /config node?\n", __func__);
+ log_debug("no /config node?\n");
return;
}
if (IS_ENABLED(CONFIG_FASTBOOT)) {
if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
, GPIOD_IS_IN)) {
- debug("%s: could not find a
/config/st,fastboot-gpios\n",
- __func__);
+ log_debug("could not find a
/config/st,fastboot-gpios\n");
} else {
if (dm_gpio_get_value()) {
- puts("Fastboot key pressed, ");
+ log_notice("Fastboot key pressed, ");
boot_mode = BOOT_FASTBOOT;
}
@@ -164,18 +165,17 @@ static void board_key_check(void)
if (IS_ENABLED(CONFIG_CMD_STM32PROG)) {
if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
, GPIOD_IS_IN)) {
- debug("%s: could not find a
/config/st,stm32prog-gpios\n",
- __func__);
+ log_debug("could not find a
/config/st,stm32prog-gpios\n");
} else {
if (dm_gpio_get_value()) {
- puts("STM32Programmer key pressed, ");
+ log_notice("STM32Programmer key pressed, ");
boot_mode = BOOT_STM32PROG;
}
dm_gpio_free(NULL, );
}
}
if (boot_mode != BOOT_NORMAL) {
- puts("entering download mode...\n");
+ log_notice("entering download mode...\n");
clrsetbits_le32(TAMP_BOOT_CONTEXT,
TAMP_BOOT_FORCED_MASK,
boot_mode);
@@ -198,8 +198,10 @@ int g_dnl_board_usb_cable_connected(void)
ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
DM_GET_DRIVER(dwc2_udc_otg),
_udc_otg);
- if (!ret)
- debug("dwc2_udc_otg init failed\n");
+ if (ret) {
+ log_debug("dwc2_udc_otg init failed\n");
+ return ret;
+ }
return dwc2_udc_B_session_valid(dwc2_udc_otg);
}
@@ -231,13 +233,12 @@ static int get_led(struct udevice **dev, char *led_string)
led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
if (!led_name) {
- pr_debug("%s: could not find %s config string\n",
-__func__, led_string);
+ log_debug("could not find %s
[PATCH 33/33] configs: stm32mp15: enable LOG features
Activate the logging features in SPL and U-Boot (CONFIG_LOG and CONFIG_SPL_LOG) and the command 'log' with CONFIG_CMD_LOG. Signed-off-by: Patrick Delaunay --- configs/stm32mp15_basic_defconfig | 2 ++ configs/stm32mp15_trusted_defconfig | 1 + 2 files changed, 3 insertions(+) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index a8c4112dbe..6f9ad7c95e 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -19,6 +19,7 @@ CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" +CONFIG_SPL_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 @@ -57,6 +58,7 @@ CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_LOG=y CONFIG_CMD_UBI=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks" diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 0792884a9d..2435ed1bff 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -41,6 +41,7 @@ CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_LOG=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_NOWHERE=y CONFIG_ENV_IS_IN_MMC=y -- 2.17.1
[PATCH 32/33] board: st: common: migrate trace to dev and log macro
Change pr_* to dev_ or log_ macro and define LOG_CATEGORY.
Signed-off-by: Patrick Delaunay
---
board/st/common/stm32mp_dfu.c | 3 ++-
board/st/common/stm32mp_mtdparts.c | 5 +++--
board/st/common/stpmic1.c | 5 -
board/st/common/stusb160x.c| 2 ++
4 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c
index aab7d741ac..515fc952fd 100644
--- a/board/st/common/stm32mp_dfu.c
+++ b/board/st/common/stm32mp_dfu.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -199,7 +200,7 @@ static int dfu_pmic_read(u64 offset, u8 *buffer, long *size)
ret = 0;
}
#else
- pr_err("PMIC update not supported");
+ log_err("PMIC update not supported");
ret = -EOPNOTSUPP;
#endif
diff --git a/board/st/common/stm32mp_mtdparts.c
b/board/st/common/stm32mp_mtdparts.c
index 9f5897f8c8..71a0b449ad 100644
--- a/board/st/common/stm32mp_mtdparts.c
+++ b/board/st/common/stm32mp_mtdparts.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -117,7 +118,7 @@ void board_mtdparts_default(const char **mtdids, const char
**mtdparts)
for (uclass_first_device(UCLASS_MTD, );
dev;
uclass_next_device()) {
- pr_debug("mtd device = %s\n", dev->name);
+ log_debug("mtd device = %s\n", dev->name);
}
if (nor || nand) {
@@ -163,5 +164,5 @@ void board_mtdparts_default(const char **mtdids, const char
**mtdparts)
mtd_initialized = true;
*mtdids = ids;
*mtdparts = parts;
- debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts);
+ log_debug("mtdids=%s & mtdparts=%s\n", ids, parts);
}
diff --git a/board/st/common/stpmic1.c b/board/st/common/stpmic1.c
index 3aa379e8a5..272dc4edac 100644
--- a/board/st/common/stpmic1.c
+++ b/board/st/common/stpmic1.c
@@ -3,8 +3,11 @@
* Copyright (C) 2020, STMicroelectronics - All Rights Reserved
*/
+#define LOG_CATEGORY LOGC_BOARD
+
#include
#include
+#include
#include
#include
#include
@@ -202,7 +205,7 @@ void stpmic1_init(u32 voltage_mv)
/* Check if debug is enabled to program PMIC according to the bit */
if (readl(TAMP_BOOT_CONTEXT) & TAMP_BOOT_DEBUG_ON) {
- printf("Keep debug unit ON\n");
+ log_info("Keep debug unit ON\n");
pmic_clrsetbits(dev, STPMIC1_BUCKS_MRST_CR,
STPMIC1_MRST_BUCK_DEBUG,
diff --git a/board/st/common/stusb160x.c b/board/st/common/stusb160x.c
index f1197f9faa..0ee4212131 100644
--- a/board/st/common/stusb160x.c
+++ b/board/st/common/stusb160x.c
@@ -6,6 +6,8 @@
* Copyright (C) 2020, STMicroelectronics - All Rights Reserved
*/
+#define LOG_CATEGORY UCLASS_I2C_GENERIC
+
#include
#include
#include
--
2.17.1
[PATCH] spi: xilinx_spi: remove unused local variable
From: T Karthik Reddy
Remove unused variable 'count' which is causing warning while
compilation.
Signed-off-by: T Karthik Reddy
Signed-off-by: Michal Simek
---
drivers/spi/xilinx_spi.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index c0cfe94d4439..47a5571aecd7 100644
--- a/drivers/spi/xilinx_spi.c
+++ b/drivers/spi/xilinx_spi.c
@@ -214,7 +214,7 @@ static void xilinx_spi_startup_block(struct udevice *dev,
unsigned int bytes,
struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
const unsigned char *txp = dout;
unsigned char *rxp = din;
- u32 reg, count;
+ u32 reg;
u32 txbytes = bytes;
u32 rxbytes = bytes;
@@ -224,10 +224,10 @@ static void xilinx_spi_startup_block(struct udevice *dev,
unsigned int bytes,
* it sets txp to the initial value for the normal operation.
*/
for ( ; priv->startup < 2; priv->startup++) {
- count = xilinx_spi_fill_txfifo(bus, txp, txbytes);
+ xilinx_spi_fill_txfifo(bus, txp, txbytes);
reg = readl(>spicr) & ~SPICR_MASTER_INHIBIT;
writel(reg, >spicr);
- count = xilinx_spi_read_rxfifo(bus, rxp, rxbytes);
+ xilinx_spi_read_rxfifo(bus, rxp, rxbytes);
txp = din;
if (priv->startup) {
--
2.28.0
[PATCH v8 6/9] usb: gadget: Add bcdDevice for the MTU3 USB Gadget Controller
Add an entry in usb_gadget_controller_number() for the MTU3
gadget controller. It is used to bind the USB Ethernet driver.
Signed-off-by: Chunfeng Yun
Reviewed-by: Bin Meng
---
v8: add Reviewed-by Bin
v4~v7: no changes
v3: new patch
---
drivers/usb/gadget/gadget_chips.h | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/usb/gadget/gadget_chips.h
b/drivers/usb/gadget/gadget_chips.h
index 587204cfb7..0cdf47c2dd 100644
--- a/drivers/usb/gadget/gadget_chips.h
+++ b/drivers/usb/gadget/gadget_chips.h
@@ -161,6 +161,12 @@
#define gadget_is_max3420(g)0
#endif
+#ifdef CONFIG_USB_MTU3_GADGET
+#define gadget_is_mtu3(g)(!strcmp("mtu3-gadget", (g)->name))
+#else
+#define gadget_is_mtu3(g)0
+#endif
+
/**
* usb_gadget_controller_number - support bcdDevice id convention
* @gadget: the controller being driven
@@ -224,5 +230,7 @@ static inline int usb_gadget_controller_number(struct
usb_gadget *gadget)
return 0x24;
else if (gadget_is_max3420(gadget))
return 0x25;
+ else if (gadget_is_mtu3(gadget))
+ return 0x26;
return -ENOENT;
}
--
2.18.0
[PATCH v8 8/9] configs: mt8512: enable fastboot and USB host related configs
Enable mtu3, xhci, tphy drivers. Device mode: enable fastboot; Host mode: enable USB, FAT commands, and fixed regulator, mass storage drivers; Due to device mode is enabled by default, comment out the host mode config here. Signed-off-by: Chunfeng Yun --- v8 changes: 1. add CONFIG_USB_XHCI_HCD due to Kconfig changes 2. modify comment of CONFIG_USB_MTU3_HOST suggested by Bin 3. merge [v7 8/10] add [v7 9/10] suggested by Bin v2~v7: no changes --- configs/mt8512_bm1_emmc_defconfig | 26 ++ 1 file changed, 26 insertions(+) diff --git a/configs/mt8512_bm1_emmc_defconfig b/configs/mt8512_bm1_emmc_defconfig index 950507fddc..aaf59f52a8 100644 --- a/configs/mt8512_bm1_emmc_defconfig +++ b/configs/mt8512_bm1_emmc_defconfig @@ -9,11 +9,16 @@ CONFIG_DM_GPIO=y CONFIG_TARGET_MT8512=y CONFIG_DEFAULT_DEVICE_TREE="mt8512-bm1-emmc" CONFIG_FIT=y +CONFIG_EFI_PARTITION=y CONFIG_FIT_SIGNATURE=y CONFIG_DEFAULT_FDT_FILE="mt8512-bm1-emmc.dtb" CONFIG_SYS_PROMPT="MT8512> " CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +# CONFIG_DOS_PARTITION is not set CONFIG_ENV_OVERWRITE=y CONFIG_REGMAP=y CONFIG_SYSCON=y @@ -26,6 +31,16 @@ CONFIG_PINCONF=y CONFIG_PINCTRL_MT8512=y CONFIG_RAM=y CONFIG_BAUDRATE=921600 +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x5600 +CONFIG_FASTBOOT_BUF_SIZE=0x1e0 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT=y +CONFIG_PHY=y +CONFIG_PHY_MTK_TPHY=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_SERIAL=y CONFIG_MTK_SERIAL=y CONFIG_TIMER=y @@ -33,3 +48,14 @@ CONFIG_MTK_TIMER=y CONFIG_WDT=y CONFIG_WDT_MTK=y CONFIG_LZO=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_MTU3=y +# CONFIG_USB_MTU3_HOST is not set +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="MediaTek" +CONFIG_USB_GADGET_VENDOR_NUM=0x0e8d +CONFIG_USB_GADGET_PRODUCT_NUM=0x201c -- 2.18.0
[PATCH v8 7/9] arm: dts: mt8512: add usb related nodes
Add usb, usb phy, and fixed regulators nodes
Signed-off-by: Chunfeng Yun
Acked-by: Bin Meng
---
v8: add Acked-by Bin
v5~v7: no changes
v4: add host related properties, add subnode.
v3: remove unused property mediatek,discth
v2: no changes
---
arch/arm/dts/mt8512-bm1-emmc.dts | 34 ++
arch/arm/dts/mt8512.dtsi | 49 +++-
2 files changed, 82 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/mt8512-bm1-emmc.dts b/arch/arm/dts/mt8512-bm1-emmc.dts
index 296ed93b9e..12511b5fed 100644
--- a/arch/arm/dts/mt8512-bm1-emmc.dts
+++ b/arch/arm/dts/mt8512-bm1-emmc.dts
@@ -43,6 +43,25 @@
regulator-boot-on;
regulator-always-on;
};
+
+ usb_p0_vbus: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "p0_vbus";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ gpio = < 27 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ usb_p1_vbus: regulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "p1_vbus";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ gpio = < 32 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
+ };
};
{
@@ -95,6 +114,21 @@
};
};
+ {
+ dr_mode = "peripheral";
+ maximum-speed = "high-speed";
+ status = "okay";
+};
+
+ {
+ vbus-supply = <_p0_vbus>;
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
{
pinctrl-names = "default";
pinctrl-0 = <_pins>;
diff --git a/arch/arm/dts/mt8512.dtsi b/arch/arm/dts/mt8512.dtsi
index 01a02a7ebf..bdb84f8ef0 100644
--- a/arch/arm/dts/mt8512.dtsi
+++ b/arch/arm/dts/mt8512.dtsi
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
/ {
compatible = "mediatek,mt8512";
@@ -100,6 +101,52 @@
status = "disabled";
};
+ usb3: usb@11213e00 {
+ compatible = "mediatek,mt8512-mtu3", "mediatek,mtu3";
+ reg = <0x11213e00 0x0100>;
+ reg-names = "ippc";
+ phys = < PHY_TYPE_USB2>, < PHY_TYPE_USB2>;
+ clocks = < CLK_INFRA_USB_SYS>,
+< CLK_TOP_SSUSB_TOP_CK_EN>,
+< CLK_INFRA_ICUSB>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ status = "disabled";
+
+ ssusb: usb@1121 {
+ compatible = "mediatek,ssusb";
+ reg = <0x1121 0x3e00>;
+ interrupts = ;
+ reg-names = "mac";
+ status = "disabled";
+ };
+ };
+
+ u3phy: usb-phy@11cc {
+ compatible = "mediatek,mt8512-tphy",
+"mediatek,generic-tphy-v2";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ status = "disabled";
+
+ u2port0: usb-phy@11cc {
+ reg = <0x11cc 0x400>;
+ clocks = < CLK_TOP_USB20_48M_EN>;
+ clock-names = "ref";
+ #phy-cells = <1>;
+ status = "okay";
+ };
+
+ u2port1: usb-phy@11c4 {
+ reg = <0x11c4 0x400>;
+ #phy-cells = <1>;
+ status = "okay";
+ };
+ };
+
mmc0: mmc@1123 {
compatible = "mediatek,mt8512-mmc";
reg = <0x1123 0x1000>,
@@ -112,4 +159,4 @@
status = "disabled";
};
-};
\ No newline at end of file
+};
--
2.18.0
[PATCH v8 4/9] usb: common: add define of usb_speed_string()
There is only declaration of usb_speed_string(), but no definition,
so add it to avoid build error when call it.
Signed-off-by: Chunfeng Yun
Reviewed-by: Bin Meng
---
v8: add Reviewed-by Bin
v7: no changes
v6: modify commit message suggested by Roger
v5: no changes
v4: new patch
---
drivers/usb/common/common.c | 7 +++
include/linux/usb/ch9.h | 4
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
index 76f5a9ce60..5e5c3c3e3d 100644
--- a/drivers/usb/common/common.c
+++ b/drivers/usb/common/common.c
@@ -49,6 +49,13 @@ static const char *const speed_names[] = {
[USB_SPEED_SUPER_PLUS] = "super-speed-plus",
};
+const char *usb_speed_string(enum usb_device_speed speed)
+{
+ if (speed < 0 || speed >= ARRAY_SIZE(speed_names))
+ speed = USB_SPEED_UNKNOWN;
+ return speed_names[speed];
+}
+
enum usb_device_speed usb_get_maximum_speed(ofnode node)
{
const char *max_speed;
diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index 7d225ee9cb..a8fa5d7449 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -959,8 +959,6 @@ enum usb_device_speed {
USB_SPEED_SUPER_PLUS, /* usb 3.1 */
};
-#ifdef __KERNEL__
-
/**
* usb_speed_string() - Returns human readable-name of the speed.
* @speed: The speed to return human-readable name for. If it's not
@@ -969,8 +967,6 @@ enum usb_device_speed {
*/
extern const char *usb_speed_string(enum usb_device_speed speed);
-#endif
-
enum usb_device_state {
/* NOTATTACHED isn't in the USB spec, and this state acts
* the same as ATTACHED ... but it's clearer this way.
--
2.18.0
[PATCH v8 1/9] dt-binding: usb: add bindings for some common properties
Add bindings for common properties, include maximum-speed,
dr_mode and phy_type
Signed-off-by: Chunfeng Yun
Reviewed-by: Bin Meng
---
v8: add Reviewed-by Bin
v2~v7: no changes
---
doc/device-tree-bindings/usb/generic.txt | 31
1 file changed, 31 insertions(+)
create mode 100644 doc/device-tree-bindings/usb/generic.txt
diff --git a/doc/device-tree-bindings/usb/generic.txt
b/doc/device-tree-bindings/usb/generic.txt
new file mode 100644
index 00..a02a198dfb
--- /dev/null
+++ b/doc/device-tree-bindings/usb/generic.txt
@@ -0,0 +1,31 @@
+Generic USB Properties
+
+Optional properties:
+ - maximum-speed: tells USB controllers we want to work up to a certain
+ speed. Valid arguments are "super-speed-plus",
+ "super-speed", "high-speed", "full-speed" and
+ "low-speed". In case this isn't passed via DT, USB
+ controllers should default to their maximum HW
+ capability.
+ - dr_mode: tells Dual-Role USB controllers that we want to work on a
+ particular mode. Valid arguments are "host",
+ "peripheral" and "otg". In case this attribute isn't
+ passed via DT, USB DRD controllers should default to
+ OTG.
+ - phy_type: tells USB controllers that we want to configure the core to
support
+ a UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is
+ selected. Valid arguments are "utmi" and "utmi_wide".
+ In case this isn't passed via DT, USB controllers should
+ default to HW capability.
+
+This is an attribute to a USB controller such as:
+
+dwc3@4a03 {
+ compatible = "synopsys,dwc3";
+ reg = <0x4a03 0xcfff>;
+ interrupts = <0 92 4>
+ usb-phy = <_phy>, <,phy>;
+ maximum-speed = "super-speed";
+ dr_mode = "otg";
+ phy_type = "utmi_wide";
+};
--
2.18.0
[PATCH v8 2/9] dt-bindings: usb: mtu3: add bindings for MediaTek USB3 DRD
Add dt-binding for MediaTek USB3 DRD Driver which it's ported
from the Linux kernel DTS binding:
Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
Commit ID:
34d0545978b6 ("dt-bindings: usb: mtu3: fix typo of DMA clock name")
Due to Dual-Role switch is not supported in Uboot, some properties
are removed or changed.
Signed-off-by: Chunfeng Yun
---
v8: add commit ID the binding referenced suggested by Bin
v5~v7: no changes
v4: Add support host mode, introduce some new properties and subnode
v2~v3: no changes
---
.../usb/mediatek,mtu3.txt | 79 +++
1 file changed, 79 insertions(+)
create mode 100644 doc/device-tree-bindings/usb/mediatek,mtu3.txt
diff --git a/doc/device-tree-bindings/usb/mediatek,mtu3.txt
b/doc/device-tree-bindings/usb/mediatek,mtu3.txt
new file mode 100644
index 00..ab877bfa89
--- /dev/null
+++ b/doc/device-tree-bindings/usb/mediatek,mtu3.txt
@@ -0,0 +1,79 @@
+The device node for Mediatek USB3 DRD controller
+
+Required properties:
+ - compatible : should be "mediatek,-mtu3", "mediatek,mtu3",
+ soc-model is the name of SoC, such as mt8512 etc,
+ when using "mediatek,mtu3" compatible string, you need SoC specific
+ ones in addition, one of:
+ - "mediatek,mt8512-mtu3"
+ - reg : specifies physical base address and size of the registers
+ - reg-names: should be
+ - "ippc" : IP Port Control
+ - power-domains : a phandle to USB power domain node to control USB's MTCMOS
+ - clocks : a list of phandle + clock-specifier pairs, one for each
+ entry in clock-names
+ - clock-names : must contain "sys_ck" for clock of controller,
+ the following clocks are optional:
+ "ref_ck", "mcu_ck", "dma_ck" and "xhci_ck";
+ - phys : list of all the USB PHYs on this HCD
+ - #address-cells, #size-cells : used for sub-nodes with 'reg' property
+ - ranges : allows valid 1:1 translation between child's address space and
+ parent's address space
+
+Optional properties:
+ - vusb33-supply : regulator of USB AVDD3.3v
+ - vbus-supply : regulator of VBUS 5v, needed when supports host mode.
+
+Sub-nodes:
+Required properties:
+ - compatible : should be "mediatek,ssusb"
+ - reg : specifies physical base address and size of the registers
+ - reg-names: should be
+ - "mac" : SSUSB MAC, include xHCI and device
+ - interrupts : interrupt used by xHCI or device
+ - dr_mode : should be one of "host" or "peripheral",
+ see : usb/generic.txt
+
+Optional properties:
+ - pinctrl-names : a pinctrl state named "default" is optional
+ - pinctrl-0 : pin control group
+ See: pinctrl/pinctrl-bindings.txt
+
+ - device mode:
+ - maximum-speed : valid arguments are "full-speed", "high-speed",
+ "super-speed" and "super-speed-plus",
+ see: usb/generic.txt
+ - mediatek,force-vbus : force vbus as valid by SW
+
+ - host mode (dr_mode is "host"):
+ - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
+ bit1 for u3port1, ... etc;
+
+Example:
+usb3: usb@11213e00 {
+ compatible = "mediatek,mt8512-mtu3", "mediatek,mtu3";
+ reg = <0x11213e00 0x0100>;
+ reg-names = "ippc";
+ phys = < PHY_TYPE_USB2>, < PHY_TYPE_USB2>;
+ power-domains = < MT8512_POWER_DOMAIN_USB>;
+ clocks = < CLK_INFRA_USB_SYS>,
+< CLK_TOP_SSUSB_TOP_CK_EN>,
+< CLK_INFRA_ICUSB>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck";
+ vusb33-supply = ;
+ vbus-supply = <_p0_vbus>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ status = "disabled";
+
+ ssusb: usb@1121 {
+ compatible = "mediatek,ssusb";
+ reg = <0x1121 0x3e00>;
+ interrupts = ;
+ reg-names = "mac";
+ dr_mode = "peripheral";
+ maximum-speed = "high-speed";
+ status = "disabled";
+ };
+};
--
2.18.0
[PATCH v8 0/9] Add support MediaTek USB3 DRD driver
These patches introduce the MediaTek USB3 Dual-Role Controller driver. The driver can be configured as Peripheral only and Host only (based on xHCI) modes, and it's ported from Linux Kernel 5.8-rc1 v8 changes suggested by Bin: 1. modify Kconfig and mt8512 defconfig 2. merge [v7 8/10] and [v7 9/10] 3. modify some commit log v7 changes: 1. use xhci quirk flag XHCI_MTK_HOST v6 changes: 1. modify commit message of [4/10] v5 changes: 1. change condition of readl_poll_timeout() when check clocks 2. add xhci-mtk.c and myself as maintainer for MTK USB v4 changes: 1. [4/10], [9/10] and [10/10] are new patches 2. add a glue driver 3. add host driver and rebuild host flow 4. support force_vbus mode for device 5. update bindings to support glue driver v3 changes: 1. add patch [5/7] 2. add udc_set_speed() 3. simplify some code flow v2 changes: 1. simplify QMU operations Chunfeng Yun (9): dt-binding: usb: add bindings for some common properties dt-bindings: usb: mtu3: add bindings for MediaTek USB3 DRD usb: add USB_SPEED_SUPER_PLUS usb: common: add define of usb_speed_string() usb: add MediaTek USB3 DRD driver usb: gadget: Add bcdDevice for the MTU3 USB Gadget Controller arm: dts: mt8512: add usb related nodes configs: mt8512: enable fastboot and USB host related configs MAINTAINERS: add USB driver to ARM MEDIATEK MAINTAINERS | 3 + Makefile | 1 + arch/arm/dts/mt8512-bm1-emmc.dts | 34 + arch/arm/dts/mt8512.dtsi | 49 +- configs/mt8512_bm1_emmc_defconfig | 26 + doc/device-tree-bindings/usb/generic.txt | 31 + .../usb/mediatek,mtu3.txt | 79 ++ drivers/usb/Kconfig | 2 + drivers/usb/common/common.c | 8 + drivers/usb/gadget/gadget_chips.h | 8 + drivers/usb/mtu3/Kconfig | 44 + drivers/usb/mtu3/Makefile | 11 + drivers/usb/mtu3/mtu3.h | 423 drivers/usb/mtu3/mtu3_core.c | 838 drivers/usb/mtu3/mtu3_dr.h| 52 + drivers/usb/mtu3/mtu3_gadget.c| 686 + drivers/usb/mtu3/mtu3_gadget_ep0.c| 933 ++ drivers/usb/mtu3/mtu3_host.c | 141 +++ drivers/usb/mtu3/mtu3_hw_regs.h | 515 ++ drivers/usb/mtu3/mtu3_plat.c | 368 +++ drivers/usb/mtu3/mtu3_qmu.c | 504 ++ drivers/usb/mtu3/mtu3_qmu.h | 37 + include/linux/usb/ch9.h | 5 +- 23 files changed, 4793 insertions(+), 5 deletions(-) create mode 100644 doc/device-tree-bindings/usb/generic.txt create mode 100644 doc/device-tree-bindings/usb/mediatek,mtu3.txt create mode 100644 drivers/usb/mtu3/Kconfig create mode 100644 drivers/usb/mtu3/Makefile create mode 100644 drivers/usb/mtu3/mtu3.h create mode 100644 drivers/usb/mtu3/mtu3_core.c create mode 100644 drivers/usb/mtu3/mtu3_dr.h create mode 100644 drivers/usb/mtu3/mtu3_gadget.c create mode 100644 drivers/usb/mtu3/mtu3_gadget_ep0.c create mode 100644 drivers/usb/mtu3/mtu3_host.c create mode 100644 drivers/usb/mtu3/mtu3_hw_regs.h create mode 100644 drivers/usb/mtu3/mtu3_plat.c create mode 100644 drivers/usb/mtu3/mtu3_qmu.c create mode 100644 drivers/usb/mtu3/mtu3_qmu.h -- 2.18.0
[PATCH v8 3/9] usb: add USB_SPEED_SUPER_PLUS
Add enum USB_SPEED_SUPER_PLUS for USB3.1
Signed-off-by: Chunfeng Yun
Reviewed-by: Bin Meng
---
v8: add Reviewed-by Bin
v5~v7: no changes
v4: also add it into speed_names array
v2~v3: no changes
---
drivers/usb/common/common.c | 1 +
include/linux/usb/ch9.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
index d4ae18693c..76f5a9ce60 100644
--- a/drivers/usb/common/common.c
+++ b/drivers/usb/common/common.c
@@ -46,6 +46,7 @@ static const char *const speed_names[] = {
[USB_SPEED_HIGH] = "high-speed",
[USB_SPEED_WIRELESS] = "wireless",
[USB_SPEED_SUPER] = "super-speed",
+ [USB_SPEED_SUPER_PLUS] = "super-speed-plus",
};
enum usb_device_speed usb_get_maximum_speed(ofnode node)
diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index 989a5fcbd9..7d225ee9cb 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -956,6 +956,7 @@ enum usb_device_speed {
USB_SPEED_HIGH, /* usb 2.0 */
USB_SPEED_WIRELESS, /* wireless (usb 2.5) */
USB_SPEED_SUPER,/* usb 3.0 */
+ USB_SPEED_SUPER_PLUS, /* usb 3.1 */
};
#ifdef __KERNEL__
--
2.18.0
[PATCH v8 9/9] MAINTAINERS: add USB driver to ARM MEDIATEK
Add MediaTek USB3 Dual-Role controller driver to ARM MEDIATEK, and add myself as a maintainer for it. Signed-off-by: Chunfeng Yun Reviewed-by: Bin Meng --- v8: add Reviewed-by Bin v6~v7: no changes v5: add mtu3/, xhci-mtk.c, and myself as maintainer for MTK USB v4: new patch --- MAINTAINERS | 3 +++ 1 file changed, 3 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index fb9ba37984..5047ec6598 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -266,6 +266,7 @@ F: arch/arm/include/asm/arch-pxa/ ARM MEDIATEK M: Ryder Lee M: Weijie Gao +M: Chunfeng Yun R: GSS_MTK_Uboot_upstream S: Maintained F: arch/arm/mach-mediatek/ @@ -282,6 +283,8 @@ F: drivers/power/domain/mtk-power-domain.c F: drivers/ram/mediatek/ F: drivers/spi/mtk_snfi_spi.c F: drivers/timer/mtk_timer.c +F: drivers/usb/host/xhci-mtk.c +F: drivers/usb/mtu3/ F: drivers/watchdog/mtk_wdt.c F: drivers/net/mtk_eth.c F: drivers/reset/reset-mediatek.c -- 2.18.0
[PATCH 06/17] fs/squashfs: sqfs_read_directory_table: fix memory leak
pos_list wasn't freed on every error
Signed-off-by: Richard Genoud
---
fs/squashfs/sqfs.c | 31 +--
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index 55d183663a8..c4d74fd4d6d 100644
--- a/fs/squashfs/sqfs.c
+++ b/fs/squashfs/sqfs.c
@@ -722,6 +722,8 @@ static int sqfs_read_directory_table(unsigned char
**dir_table, u32 **pos_list)
unsigned long dest_len = 0;
bool compressed;
+ *dir_table = NULL;
+ *pos_list = NULL;
/* DIRECTORY TABLE */
table_size = get_unaligned_le64(>fragment_table_start) -
get_unaligned_le64(>directory_table_start);
@@ -736,35 +738,31 @@ static int sqfs_read_directory_table(unsigned char
**dir_table, u32 **pos_list)
return -ENOMEM;
if (sqfs_disk_read(start, n_blks, dtb) < 0)
- goto free_dtb;
+ goto out;
/* Parse directory table (metadata block) header */
ret = sqfs_read_metablock(dtb, table_offset, , _len);
if (ret)
- goto free_dtb;
+ goto out;
/* Calculate total size to store the whole decompressed table */
metablks_count = sqfs_count_metablks(dtb, table_offset, table_size);
if (metablks_count < 1)
- goto free_dtb;
+ goto out;
*dir_table = malloc(metablks_count * SQFS_METADATA_BLOCK_SIZE);
if (!*dir_table)
- goto free_dtb;
+ goto out;
*pos_list = malloc(metablks_count * sizeof(u32));
- if (!*pos_list) {
- free(*dir_table);
- goto free_dtb;
- }
+ if (!*pos_list)
+ goto out;
ret = sqfs_get_metablk_pos(*pos_list, dtb, table_offset,
metablks_count);
if (ret) {
metablks_count = -1;
- free(*dir_table);
- free(*pos_list);
- goto free_dtb;
+ goto out;
}
src_table = dtb + table_offset + SQFS_HEADER_SIZE;
@@ -780,8 +778,7 @@ static int sqfs_read_directory_table(unsigned char
**dir_table, u32 **pos_list)
_len, src_table, src_len);
if (ret) {
metablks_count = -1;
- free(*dir_table);
- goto free_dtb;
+ goto out;
}
if (dest_len < SQFS_METADATA_BLOCK_SIZE) {
@@ -803,7 +800,13 @@ static int sqfs_read_directory_table(unsigned char
**dir_table, u32 **pos_list)
src_table += src_len + SQFS_HEADER_SIZE;
}
-free_dtb:
+out:
+ if (metablks_count < 1) {
+ free(*dir_table);
+ free(*pos_list);
+ *dir_table = NULL;
+ *pos_list = NULL;
+ }
free(dtb);
return metablks_count;
[PATCH 08/17] fs/squashfs: sqfs_search_dir: fix memory leaks
path, target, res, rem and sym_tokens were not free on error nor success.
Signed-off-by: Richard Genoud
---
fs/squashfs/sqfs.c | 64 --
1 file changed, 51 insertions(+), 13 deletions(-)
diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index 1df27f7b903..eb8851a7148 100644
--- a/fs/squashfs/sqfs.c
+++ b/fs/squashfs/sqfs.c
@@ -434,7 +434,7 @@ static int sqfs_search_dir(struct squashfs_dir_stream
*dirs, char **token_list,
{
struct squashfs_super_block *sblk = ctxt.sblk;
char *path, *target, **sym_tokens, *res, *rem;
- int j, ret, new_inode_number, offset;
+ int j, ret = 0, new_inode_number, offset;
struct squashfs_symlink_inode *sym;
struct squashfs_ldir_inode *ldir;
struct squashfs_dir_inode *dir;
@@ -442,6 +442,12 @@ static int sqfs_search_dir(struct squashfs_dir_stream
*dirs, char **token_list,
struct fs_dirent *dent;
unsigned char *table;
+ res = NULL;
+ rem = NULL;
+ path = NULL;
+ target = NULL;
+ sym_tokens = NULL;
+
dirsp = (struct fs_dir_stream *)dirs;
/* Start by root inode */
@@ -477,7 +483,8 @@ static int sqfs_search_dir(struct squashfs_dir_stream
*dirs, char **token_list,
for (j = 0; j < token_count; j++) {
if (!sqfs_is_dir(get_unaligned_le16(>inode_type))) {
printf("** Cannot find directory. **\n");
- return -EINVAL;
+ ret = -EINVAL;
+ goto out;
}
while (!sqfs_readdir(dirsp, )) {
@@ -490,7 +497,8 @@ static int sqfs_search_dir(struct squashfs_dir_stream
*dirs, char **token_list,
if (ret) {
printf("** Cannot find directory. **\n");
- return -EINVAL;
+ ret = -EINVAL;
+ goto out;
}
/* Redefine inode as the found token */
@@ -507,40 +515,63 @@ static int sqfs_search_dir(struct squashfs_dir_stream
*dirs, char **token_list,
sym = (struct squashfs_symlink_inode *)table;
/* Get first j + 1 tokens */
path = sqfs_concat_tokens(token_list, j + 1);
+ if (!path) {
+ ret = -ENOMEM;
+ goto out;
+ }
/* Resolve for these tokens */
target = sqfs_resolve_symlink(sym, path);
+ if (!target) {
+ ret = -ENOMEM;
+ goto out;
+ }
/* Join remaining tokens */
rem = sqfs_concat_tokens(token_list + j + 1,
token_count -
j - 1);
+ if (!rem) {
+ ret = -ENOMEM;
+ goto out;
+ }
/* Concatenate remaining tokens and symlink's target */
res = malloc(strlen(rem) + strlen(target) + 1);
+ if (!res) {
+ ret = -ENOMEM;
+ goto out;
+ }
strcpy(res, target);
res[strlen(target)] = '/';
strcpy(res + strlen(target) + 1, rem);
token_count = sqfs_count_tokens(res);
- if (token_count < 0)
- return -EINVAL;
+ if (token_count < 0) {
+ ret = -EINVAL;
+ goto out;
+ }
sym_tokens = malloc(token_count * sizeof(char *));
- if (!sym_tokens)
- return -EINVAL;
+ if (!sym_tokens) {
+ ret = -EINVAL;
+ goto out;
+ }
/* Fill tokens list */
ret = sqfs_tokenize(sym_tokens, token_count, res);
- if (ret)
- return -EINVAL;
+ if (ret) {
+ ret = -EINVAL;
+ goto out;
+ }
free(dirs->entry);
dirs->entry = NULL;
ret = sqfs_search_dir(dirs, sym_tokens, token_count,
m_list, m_count);
- return ret;
+ goto out;
} else if (!sqfs_is_dir(get_unaligned_le16(>inode_type))) {
printf("** Cannot find directory. **\n");
[PATCH 10/17] fs/squashfs: sqfs_concat_tokens: check if malloc succeeds
memory allocation should always be checked
Signed-off-by: Richard Genoud
---
fs/squashfs/sqfs.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index c4b7c84e9aa..24a7680aa5c 100644
--- a/fs/squashfs/sqfs.c
+++ b/fs/squashfs/sqfs.c
@@ -242,6 +242,9 @@ static char *sqfs_concat_tokens(char **token_list, int
token_count)
length = sqfs_get_tokens_length(token_list, token_count);
result = malloc(length + 1);
+ if (!result)
+ return NULL;
+
result[length] = '\0';
for (i = 0; i < token_count; i++) {
[PATCH 15/17] fs/squashfs: sqfs_read: fix memory leak
sqfs_closedir() should be called to free memory allocated by sqfs_opendir() Signed-off-by: Richard Genoud --- fs/squashfs/sqfs.c | 1 + 1 file changed, 1 insertion(+) diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c index 79d68dddb28..6cd3ba9ce10 100644 --- a/fs/squashfs/sqfs.c +++ b/fs/squashfs/sqfs.c @@ -1531,6 +1531,7 @@ free_datablk: free_paths: free(file); free(dir); + sqfs_closedir(dirsp); return ret; }
[PATCH 12/17] fs/squashfs: sqfs_size: remove useless sqfs_closedir()
as sqfs_opendir failed, there's no need to call sqfs_closedir
Signed-off-by: Richard Genoud
---
fs/squashfs/sqfs.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index c5a24450e6f..116b5160ee3 100644
--- a/fs/squashfs/sqfs.c
+++ b/fs/squashfs/sqfs.c
@@ -1556,7 +1556,6 @@ int sqfs_size(const char *filename, loff_t *size)
*/
ret = sqfs_opendir(dir, );
if (ret) {
- sqfs_closedir(dirsp);
ret = -EINVAL;
goto free_strings;
}
[PATCH 17/17] fs/squashfs: implement exists() function
This permits to find a file and use the distro_bootcmd
Signed-off-by: Richard Genoud
---
fs/fs.c| 2 +-
fs/squashfs/sqfs.c | 38 ++
include/squashfs.h | 1 +
3 files changed, 40 insertions(+), 1 deletion(-)
diff --git a/fs/fs.c b/fs/fs.c
index fb27c910d4f..7a4020607a3 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -296,7 +296,7 @@ static struct fstype_info fstypes[] = {
.size = sqfs_size,
.close = sqfs_close,
.closedir = sqfs_closedir,
- .exists = fs_exists_unsupported,
+ .exists = sqfs_exists,
.uuid = fs_uuid_unsupported,
.write = fs_write_unsupported,
.ln = fs_ln_unsupported,
diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index 82bf1faf25f..6952fc2b53e 100644
--- a/fs/squashfs/sqfs.c
+++ b/fs/squashfs/sqfs.c
@@ -1627,6 +1627,44 @@ free_strings:
return ret;
}
+int sqfs_exists(const char *filename)
+{
+ struct fs_dir_stream *dirsp = NULL;
+ struct squashfs_dir_stream *dirs;
+ char *dir, *file;
+ struct fs_dirent *dent;
+ int ret;
+
+ sqfs_split_path(, , filename);
+ /*
+* sqfs_opendir will uncompress inode and directory tables, and will
+* return a pointer to the directory that contains the requested file.
+*/
+ ret = sqfs_opendir(dir, );
+ if (ret) {
+ ret = -EINVAL;
+ goto free_strings;
+ }
+
+ dirs = (struct squashfs_dir_stream *)dirsp;
+
+ while (!sqfs_readdir(dirsp, )) {
+ ret = strcmp(dent->name, file);
+ if (!ret)
+ break;
+ free(dirs->entry);
+ dirs->entry = NULL;
+ }
+
+ sqfs_closedir(dirsp);
+
+free_strings:
+ free(dir);
+ free(file);
+
+ return ret == 0;
+}
+
void sqfs_close(void)
{
free(ctxt.sblk);
diff --git a/include/squashfs.h b/include/squashfs.h
index 819cf8c2da8..7489eefa1f2 100644
--- a/include/squashfs.h
+++ b/include/squashfs.h
@@ -19,6 +19,7 @@ int sqfs_probe(struct blk_desc *fs_dev_desc,
int sqfs_read(const char *filename, void *buf, loff_t offset,
loff_t len, loff_t *actread);
int sqfs_size(const char *filename, loff_t *size);
+int sqfs_exists(const char *filename);
void sqfs_close(void);
void sqfs_closedir(struct fs_dir_stream *dirs);
[PATCH 11/17] fs/squashfs: sqfs_size: fix dangling pointer dirs->entry
dirs->entry shouldn't be left dangling as it could be freed twice.
Signed-off-by: Richard Genoud
---
fs/squashfs/sqfs.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index 24a7680aa5c..c5a24450e6f 100644
--- a/fs/squashfs/sqfs.c
+++ b/fs/squashfs/sqfs.c
@@ -1568,6 +1568,7 @@ int sqfs_size(const char *filename, loff_t *size)
if (!ret)
break;
free(dirs->entry);
+ dirs->entry = NULL;
}
if (ret) {
@@ -1581,6 +1582,7 @@ int sqfs_size(const char *filename, loff_t *size)
ipos = sqfs_find_inode(dirs->inode_table, i_number, sblk->inodes,
sblk->block_size);
free(dirs->entry);
+ dirs->entry = NULL;
base = (struct squashfs_base_inode *)ipos;
switch (get_unaligned_le16(>inode_type)) {
[PATCH 14/17] fs/squashfs: sqfs_read: remove useless sqfs_closedir()
as sqfs_opendir failed, there's no need to call sqfs_closedir
Signed-off-by: Richard Genoud
---
fs/squashfs/sqfs.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index 0510ae311d1..79d68dddb28 100644
--- a/fs/squashfs/sqfs.c
+++ b/fs/squashfs/sqfs.c
@@ -1322,7 +1322,6 @@ int sqfs_read(const char *filename, void *buf, loff_t
offset, loff_t len,
sqfs_split_path(, , filename);
ret = sqfs_opendir(dir, );
if (ret) {
- sqfs_closedir(dirsp);
goto free_paths;
}
[PATCH 16/17] fs/squashfs: sqfs_read: fix another memory leak
data_buffer was allocated in a loop and freed only once. Signed-off-by: Richard Genoud --- fs/squashfs/sqfs.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c index 6cd3ba9ce10..82bf1faf25f 100644 --- a/fs/squashfs/sqfs.c +++ b/fs/squashfs/sqfs.c @@ -1459,6 +1459,8 @@ int sqfs_read(const char *filename, void *buf, loff_t offset, loff_t len, } data_offset += table_size; + free(data_buffer); + data_buffer = NULL; } free(finfo.blk_sizes);
[PATCH 13/17] fs/squashfs: sqfs_read: fix dangling pointer dirs->entry
dirs->entry shouldn't be left dangling as it could be freed twice.
Signed-off-by: Richard Genoud
---
fs/squashfs/sqfs.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index 116b5160ee3..0510ae311d1 100644
--- a/fs/squashfs/sqfs.c
+++ b/fs/squashfs/sqfs.c
@@ -1335,6 +1335,7 @@ int sqfs_read(const char *filename, void *buf, loff_t
offset, loff_t len,
break;
free(dirs->entry);
+ dirs->entry = NULL;
}
if (ret) {
Re: [PATCH v2 3/3] arm64: dts: a3720: add support for espressobin with populated emmc
On Wednesday 14 October 2020 10:17:45 Stefan Roese wrote:
> On 04.09.20 17:33, Andre Heider wrote:
> > Import armada-3720-espressobin-emmc.dts from Linux, but use sdhc1 for
> > emmc, since our dtsi is still based on downstream and sdhc0 is used for
> > the sd card.
> >
> > Signed-off-by: Andre Heider
>
> Applied to u-boot-marvell/master
>
> Thanks,
> Stefan
>
> > ---
> > arch/arm/dts/Makefile | 1 +
> > arch/arm/dts/armada-3720-espressobin-emmc.dts | 44 +++
> > doc/README.marvell| 7 ++-
> > 3 files changed, 50 insertions(+), 2 deletions(-)
> > create mode 100644 arch/arm/dts/armada-3720-espressobin-emmc.dts
> >
> > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> > index 5e34192be6..8f1958b5a7 100644
> > --- a/arch/arm/dts/Makefile
> > +++ b/arch/arm/dts/Makefile
> > @@ -202,6 +202,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
> > dtb-$(CONFIG_ARCH_MVEBU) += \
> > armada-3720-db.dtb \
> > armada-3720-espressobin.dtb \
> > + armada-3720-espressobin-emmc.dtb\
> > armada-3720-turris-mox.dtb \
> > armada-3720-uDPU.dtb\
> > armada-375-db.dtb \
> > diff --git a/arch/arm/dts/armada-3720-espressobin-emmc.dts
> > b/arch/arm/dts/armada-3720-espressobin-emmc.dts
> > new file mode 100644
> > index 00..29ccb6a573
> > --- /dev/null
> > +++ b/arch/arm/dts/armada-3720-espressobin-emmc.dts
> > @@ -0,0 +1,44 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Device Tree file for Globalscale Marvell ESPRESSOBin Board with eMMC
> > + * Copyright (C) 2018 Marvell
> > + *
> > + * Romain Perier
> > + * Konstantin Porotchkin
> > + *
> > + */
> > +/*
> > + * Schematic available at
> > http://espressobin.net/wp-content/uploads/2017/08/ESPRESSObin_V5_Schematics.pdf
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "armada-3720-espressobin.dtsi"
> > +
> > +/ {
> > + model = "Globalscale Marvell ESPRESSOBin Board (eMMC)";
> > + compatible = "globalscale,espressobin-emmc", "globalscale,espressobin",
> > +"marvell,armada3720", "marvell,armada3710";
> > +};
> > +
> > +/* U11 */
> > + {
> > + non-removable;
> > + bus-width = <8>;
> > + mmc-ddr-1_8v;
> > + mmc-hs400-1_8v;
> > + marvell,xenon-emmc;
> > + marvell,xenon-tun-count = <9>;
> > + marvell,pad-type = "fixed-1-8v";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <_pins>;
> > + status = "okay";
> > +
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + mmccard: mmccard@0 {
> > + compatible = "mmc-card";
> > + reg = <0>;
> > + };
> > +};
> > diff --git a/doc/README.marvell b/doc/README.marvell
> > index 5416bc3035..be07f31f8c 100644
> > --- a/doc/README.marvell
> > +++ b/doc/README.marvell
> > @@ -43,8 +43,11 @@ Build Procedure
> > In order to prevent this, the required device-tree MUST be set
> > during compilation.
> > All device-tree files are located in ./arch/arm/dts/ folder.
> > - For other DB boards (MacchiatoBin, EspressoBin and 3700 DB board)
> > compile u-boot with
> > - just default device-tree from defconfig using:
> > + For the EspressoBin board with populated eMMC device use
> > + # make DEVICE_TREE=armada-3720-espressobin-emmc
> > +
> > + For other DB boards (MacchiatoBin, EspressoBin without soldered eMMC
> > and 3700 DB board)
> > + compile u-boot with just default device-tree from defconfig using:
Hello! Does not it really make sense to do autodetection of eMMC
presence and enable it in U-Boot code only when needed and therefore
avoid having two DTS files and needs for specifying DEVICE_TREE variable
and therefore variant of Espressobin, as I stated in previous emails?
I think this just complicates build process... E.g. we already have a
code in U-Boot which detects V5 vs V7 variant.
> > # make
> >
>
>
> Viele Grüße,
> Stefan
>
> --
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
[PATCH 09/33] mmc: stm32_sdmmc2: migrate trace to dev and log macro
Define LOG_CATEGORY, use dev_ macro when it is possible.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay
---
drivers/mmc/stm32_sdmmc2.c | 85 --
1 file changed, 44 insertions(+), 41 deletions(-)
diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
index 6d50356217..483660c9d3 100644
--- a/drivers/mmc/stm32_sdmmc2.c
+++ b/drivers/mmc/stm32_sdmmc2.c
@@ -4,6 +4,8 @@
* Author(s): Patrice Chotard, for STMicroelectronics.
*/
+#define LOG_CATEGORY UCLASS_MMC
+
#include
#include
#include
@@ -200,10 +202,11 @@ struct stm32_sdmmc2_ctx {
#define SDMMC_CMD_TIMEOUT 0x
#define SDMMC_BUSYD0END_TIMEOUT_US 200
-static void stm32_sdmmc2_start_data(struct stm32_sdmmc2_priv *priv,
+static void stm32_sdmmc2_start_data(struct udevice *dev,
struct mmc_data *data,
struct stm32_sdmmc2_ctx *ctx)
{
+ struct stm32_sdmmc2_priv *priv = dev_get_priv(dev);
u32 data_ctrl, idmabase0;
/* Configure the SDMMC DPSM (Data Path State Machine) */
@@ -241,10 +244,11 @@ static void stm32_sdmmc2_start_data(struct
stm32_sdmmc2_priv *priv,
writel(SDMMC_IDMACTRL_IDMAEN, priv->base + SDMMC_IDMACTRL);
}
-static void stm32_sdmmc2_start_cmd(struct stm32_sdmmc2_priv *priv,
+static void stm32_sdmmc2_start_cmd(struct udevice *dev,
struct mmc_cmd *cmd, u32 cmd_param,
struct stm32_sdmmc2_ctx *ctx)
{
+ struct stm32_sdmmc2_priv *priv = dev_get_priv(dev);
u32 timeout = 0;
if (readl(priv->base + SDMMC_CMD) & SDMMC_CMD_CPSMEN)
@@ -290,10 +294,11 @@ static void stm32_sdmmc2_start_cmd(struct
stm32_sdmmc2_priv *priv,
writel(cmd_param, priv->base + SDMMC_CMD);
}
-static int stm32_sdmmc2_end_cmd(struct stm32_sdmmc2_priv *priv,
+static int stm32_sdmmc2_end_cmd(struct udevice *dev,
struct mmc_cmd *cmd,
struct stm32_sdmmc2_ctx *ctx)
{
+ struct stm32_sdmmc2_priv *priv = dev_get_priv(dev);
u32 mask = SDMMC_STA_CTIMEOUT;
u32 status;
int ret;
@@ -311,22 +316,22 @@ static int stm32_sdmmc2_end_cmd(struct stm32_sdmmc2_priv
*priv,
1);
if (ret < 0) {
- debug("%s: timeout reading SDMMC_STA register\n", __func__);
+ dev_dbg(dev, "timeout reading SDMMC_STA register\n");
ctx->dpsm_abort = true;
return ret;
}
/* Check status */
if (status & SDMMC_STA_CTIMEOUT) {
- debug("%s: error SDMMC_STA_CTIMEOUT (0x%x) for cmd %d\n",
- __func__, status, cmd->cmdidx);
+ dev_dbg(dev, "error SDMMC_STA_CTIMEOUT (0x%x) for cmd %d\n",
+ status, cmd->cmdidx);
ctx->dpsm_abort = true;
return -ETIMEDOUT;
}
if (status & SDMMC_STA_CCRCFAIL && cmd->resp_type & MMC_RSP_CRC) {
- debug("%s: error SDMMC_STA_CCRCFAIL (0x%x) for cmd %d\n",
- __func__, status, cmd->cmdidx);
+ dev_dbg(dev, "error SDMMC_STA_CCRCFAIL (0x%x) for cmd %d\n",
+ status, cmd->cmdidx);
ctx->dpsm_abort = true;
return -EILSEQ;
}
@@ -350,15 +355,15 @@ static int stm32_sdmmc2_end_cmd(struct stm32_sdmmc2_priv
*priv,
SDMMC_BUSYD0END_TIMEOUT_US);
if (ret < 0) {
- debug("%s: timeout reading SDMMC_STA\n",
- __func__);
+ dev_dbg(dev, "timeout reading SDMMC_STA\n");
ctx->dpsm_abort = true;
return ret;
}
if (status & SDMMC_STA_DTIMEOUT) {
- debug("%s: error SDMMC_STA_DTIMEOUT (0x%x)\n",
- __func__, status);
+ dev_dbg(dev,
+ "error SDMMC_STA_DTIMEOUT (0x%x)\n",
+ status);
ctx->dpsm_abort = true;
return -ETIMEDOUT;
}
@@ -368,11 +373,12 @@ static int stm32_sdmmc2_end_cmd(struct stm32_sdmmc2_priv
*priv,
return 0;
}
-static int stm32_sdmmc2_end_data(struct stm32_sdmmc2_priv *priv,
+static int stm32_sdmmc2_end_data(struct udevice *dev,
struct mmc_cmd *cmd,
struct mmc_data *data,
struct stm32_sdmmc2_ctx *ctx)
{
+ struct stm32_sdmmc2_priv *priv =
[PATCH 14/33] power: regulator: stm32-verfbuf: define LOG_CATEGORY
Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay --- drivers/power/regulator/stm32-vrefbuf.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/power/regulator/stm32-vrefbuf.c b/drivers/power/regulator/stm32-vrefbuf.c index 92136961c2..556579709d 100644 --- a/drivers/power/regulator/stm32-vrefbuf.c +++ b/drivers/power/regulator/stm32-vrefbuf.c @@ -6,6 +6,8 @@ * Originally based on the Linux kernel v4.16 drivers/regulator/stm32-vrefbuf.c */ +#define LOG_CATEGORY UCLASS_REGULATOR + #include #include #include -- 2.17.1
[PATCH 00/33] stm32: enable logging features
This patch-set migrates several stm32 drivers to API compatible with logging features (use dev_...() or log_...() function) and activate the logging features in STM32MP15 boards. The size of U-Boot increased by 19kB (933026 to 952830 on STM32MP157C-EV1 board for basic defconfig) but the boot time don't change drastically. For example on STM32MP157C-EV1 board: 1/ Before LOG patchset Timer summary in microseconds (12 records): MarkElapsed Stage 0 0 reset 224,514224,514 SPL 961,170736,656 end SPL 964,006 2,836 board_init_f 1,186,986222,980 board_init_r 1,651,379464,393 id=64 1,674,463 23,084 id=65 1,675,164701 main_loop 4,025,806 2,350,642 id=175 Accumulated time: 55,064 dm_f 66,749 dm_r 88,796 dm_spl 2/ With LOG activated (after this patchset) Timer summary in microseconds (12 records): MarkElapsed Stage 0 0 reset 227,142227,142 SPL 984,585757,443 end SPL 987,579 2,994 board_init_f 1,210,091222,512 board_init_r 1,673,354463,263 id=64 1,696,073 22,719 id=65 1,696,775702 main_loop 5,443,104 3,746,329 id=175 Accumulated time: 62,154 dm_f 66,264 dm_r 89,376 dm_spl For information even with all trace embbeded in U-Boot but not activated, MAX_LOG_LEVEL=8 and LOG_DEFAULT_LEVEL=6 Size increase by 190KB (952830 to 1147918) but boot time is stable (1,748s vs 1,696s). STM32MP> bootstage report Timer summary in microseconds (12 records): MarkElapsed Stage 0 0 reset 230,028230,028 SPL 996,117766,089 end SPL 999,082 2,965 board_init_f 1,220,225221,143 board_init_r 1,718,641498,416 id=64 1,746,096 27,455 id=65 1,748,202 2,106 main_loop 4,509,271 2,761,069 id=175 Accumulated time: 58,481 dm_f 68,881 dm_r 89,385 dm_spl Patrick Delaunay (33): arm: stm32mp: migrate trace to log macro arm: stm32mp: migrate cmd_stm32prog to log macro arm: stm32mp: bsec: migrate trace to log macro pinctrl: stm32: migrate trace to log macro gpio: stm32-gpio: migrate trace to dev and log macro remoproc: stm32: migrate trace to log macro ram: stm32: migrate trace to log macro ram: stm32mp1: migrate trace to dev or log macro mmc: stm32_sdmmc2: migrate trace to dev and log macro timer: stm32: migrate trace to log macro hwspinlock: stm32: migrate trace to log macro rtc: stm32: migrate trace to log macro watchdog: stm32mp: migrate trace to dev macro power: regulator: stm32-verfbuf: define LOG_CATEGORY misc: rcc: migrate trace to dev macro misc: rcc: keep the rcc device name for subnode clk: stm32mp1: migrate trace to dev and log macro clk: clk_stm32f: migrate trace to dev and log macro clk: clk_stm32h7: migrate trace to dev and log macro reset: stm32-reset: migrate trace to dev and log macro mailbox: stm32-ipcc: migrate trace to dev and log macro i2c: stm32f7_i2c: migrate trace to dev and log macro phy: stm32-usbphyc: migrate trace to dev and log macro spi: stm32_spi: migrate trace to dev and log macro spi: stm32_qspi: migrate trace to dev and log macro mtd: stm32_fmc2: migrate trace to dev and log macro memory: stm32-fmc2: migrate trace to dev and log macro serial: stm32: define LOG_CATEGORY video: stm32_ltdc: migrate trace to dev and log macro video: stm32_dsi: migrate trace to dev and log macro board: st: stm32mp1: migrate trace to dev and log macro board: st: common: migrate trace to dev and log macro configs: stm32mp15: enable LOG features arch/arm/mach-stm32mp/boot_params.c | 8 +- arch/arm/mach-stm32mp/bsec.c | 38 +++-- arch/arm/mach-stm32mp/cmd_stm32key.c | 3 +- .../cmd_stm32prog/cmd_stm32prog.c | 4 +- .../mach-stm32mp/cmd_stm32prog/stm32prog.c| 112 ++--- .../mach-stm32mp/cmd_stm32prog/stm32prog.h| 2 +- .../cmd_stm32prog/stm32prog_serial.c | 24 +-- .../cmd_stm32prog/stm32prog_usb.c | 14 +- arch/arm/mach-stm32mp/cpu.c | 18 ++- arch/arm/mach-stm32mp/dram_init.c | 8 +- arch/arm/mach-stm32mp/fdt.c | 17 +- arch/arm/mach-stm32mp/pwr_regulator.c | 2 + arch/arm/mach-stm32mp/spl.c | 16 +- board/st/common/stm32mp_dfu.c | 3 +- board/st/common/stm32mp_mtdparts.c| 5 +- board/st/common/stpmic1.c | 5 +- board/st/common/stusb160x.c | 2 + board/st/stm32mp1/stm32mp1.c | 134 configs/stm32mp15_basic_defconfig | 2 + configs/stm32mp15_trusted_defconfig | 1 + drivers/clk/clk_stm32f.c | 39 ++---
[PATCH 15/33] misc: rcc: migrate trace to dev macro
Change debug and pr_err to dev macro and define LOG_CATEGORY.
Signed-off-by: Patrick Delaunay
---
drivers/misc/stm32_rcc.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c
index b82fe54c60..c1a99d78e2 100644
--- a/drivers/misc/stm32_rcc.c
+++ b/drivers/misc/stm32_rcc.c
@@ -4,6 +4,8 @@
* Author(s): Patrice Chotard, for STMicroelectronics.
*/
+#define LOG_CATEGORY UCLASS_NOP
+
#include
#include
#include
@@ -45,10 +47,10 @@ static int stm32_rcc_bind(struct udevice *dev)
(struct stm32_rcc_clk *)dev_get_driver_data(dev);
int ret;
- debug("%s(dev=%p)\n", __func__, dev);
+ dev_dbg(dev, "RCC bind\n");
drv = lists_driver_lookup_name(rcc_clk->drv_name);
if (!drv) {
- debug("Cannot find driver '%s'\n", rcc_clk->drv_name);
+ dev_err(dev, "Cannot find driver '%s'\n", rcc_clk->drv_name);
return -ENOENT;
}
--
2.17.1
[PATCH 03/33] arm: stm32mp: bsec: migrate trace to log macro
Define LOG_CATEGORY, change pr_debug to dev_dbg and remove "bsec:"
header as it is managed by log macro (dev->name is displayed)
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/bsec.c | 38
1 file changed, 21 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
index a9b9bd0902..70650cfbf7 100644
--- a/arch/arm/mach-stm32mp/bsec.c
+++ b/arch/arm/mach-stm32mp/bsec.c
@@ -3,6 +3,8 @@
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
*/
+#define LOG_CATEGORY UCLASS_MISC
+
#include
#include
#include
@@ -11,6 +13,7 @@
#include
#include
#include
+#include
#include
#define BSEC_OTP_MAX_VALUE 95
@@ -160,7 +163,7 @@ static int bsec_power_safmem(u32 base, bool power)
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: 0 if no error
*/
-static int bsec_shadow_register(u32 base, u32 otp)
+static int bsec_shadow_register(struct udevice *dev, u32 base, u32 otp)
{
u32 val;
int ret;
@@ -168,7 +171,8 @@ static int bsec_shadow_register(u32 base, u32 otp)
/* check if shadowing of otp is locked */
if (bsec_read_SR_lock(base, otp))
- pr_debug("bsec : OTP %d is locked and refreshed with 0\n", otp);
+ dev_dbg(dev, "OTP %d is locked and refreshed with 0\n",
+ otp);
/* check if safemem is power up */
val = readl(base + BSEC_OTP_STATUS_OFF);
@@ -203,7 +207,7 @@ static int bsec_shadow_register(u32 base, u32 otp)
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: 0 if no error
*/
-static int bsec_read_shadow(u32 base, u32 *val, u32 otp)
+static int bsec_read_shadow(struct udevice *dev, u32 base, u32 *val, u32 otp)
{
*val = readl(base + BSEC_OTP_DATA_OFF + otp * sizeof(u32));
@@ -217,11 +221,11 @@ static int bsec_read_shadow(u32 base, u32 *val, u32 otp)
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: 0 if no error
*/
-static int bsec_write_shadow(u32 base, u32 val, u32 otp)
+static int bsec_write_shadow(struct udevice *dev, u32 base, u32 val, u32 otp)
{
/* check if programming of otp is locked */
if (bsec_read_SW_lock(base, otp))
- pr_debug("bsec : OTP %d is lock, write will be ignore\n", otp);
+ dev_dbg(dev, "OTP %d is lock, write will be ignore\n", otp);
writel(val, base + BSEC_OTP_DATA_OFF + otp * sizeof(u32));
@@ -236,16 +240,16 @@ static int bsec_write_shadow(u32 base, u32 val, u32 otp)
* after the function the otp data is not refreshed in shadow
* Return: 0 if no error
*/
-static int bsec_program_otp(long base, u32 val, u32 otp)
+static int bsec_program_otp(struct udevice *dev, long base, u32 val, u32 otp)
{
u32 ret;
bool power_up = false;
if (bsec_read_SP_lock(base, otp))
- pr_debug("bsec : OTP %d locked, prog will be ignore\n", otp);
+ dev_dbg(dev, "OTP %d locked, prog will be ignore\n", otp);
if (readl(base + BSEC_OTP_LOCK_OFF) & (1 << BSEC_LOCK_PROGRAM))
- pr_debug("bsec : Global lock, prog will be ignore\n");
+ dev_dbg(dev, "Global lock, prog will be ignore\n");
/* check if safemem is power up */
if (!(readl(base + BSEC_OTP_STATUS_OFF) & BSEC_MODE_PWR_MASK)) {
@@ -298,21 +302,21 @@ static int stm32mp_bsec_read_otp(struct udevice *dev, u32
*val, u32 otp)
plat = dev_get_platdata(dev);
/* read current shadow value */
- ret = bsec_read_shadow(plat->base, _data, otp);
+ ret = bsec_read_shadow(dev, plat->base, _data, otp);
if (ret)
return ret;
/* copy otp in shadow */
- ret = bsec_shadow_register(plat->base, otp);
+ ret = bsec_shadow_register(dev, plat->base, otp);
if (ret)
return ret;
- ret = bsec_read_shadow(plat->base, val, otp);
+ ret = bsec_read_shadow(dev, plat->base, val, otp);
if (ret)
return ret;
/* restore shadow value */
- ret = bsec_write_shadow(plat->base, tmp_data, otp);
+ ret = bsec_write_shadow(dev, plat->base, tmp_data, otp);
return ret;
}
@@ -328,7 +332,7 @@ static int stm32mp_bsec_read_shadow(struct udevice *dev,
u32 *val, u32 otp)
plat = dev_get_platdata(dev);
- return bsec_read_shadow(plat->base, val, otp);
+ return bsec_read_shadow(dev, plat->base, val, otp);
}
static int stm32mp_bsec_read_lock(struct udevice *dev, u32 *val, u32 otp)
@@ -352,7 +356,7 @@ static int stm32mp_bsec_write_otp(struct udevice *dev, u32
val, u32 otp)
plat = dev_get_platdata(dev);
- return bsec_program_otp(plat->base, val, otp);
+ return bsec_program_otp(dev, plat->base, val, otp);
}
@@ -367,7 +371,7 @@ static int stm32mp_bsec_write_shadow(struct udevice *dev,
u32 val, u32 otp)
plat = dev_get_platdata(dev);
- return
[PATCH 07/33] ram: stm32: migrate trace to log macro
Define LOG_CATEGORY, change debug to dev_dbg and remove "%s:" __func__
header as it is managed by dev macro (dev->name is displayed)
Signed-off-by: Patrick Delaunay
---
drivers/ram/stm32_sdram.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c
index 3fddf4df96..9e0e70ca97 100644
--- a/drivers/ram/stm32_sdram.c
+++ b/drivers/ram/stm32_sdram.c
@@ -4,6 +4,8 @@
* Author(s): Vikas Manocha, for STMicroelectronics.
*/
+#define LOG_CATEGORY UCLASS_RAM
+
#include
#include
#include
@@ -272,7 +274,7 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0,
);
if (ret) {
- dev_dbg(dev, "%s: can't find syscon device (%d)\n", __func__,
ret);
+ dev_dbg(dev, "can't find syscon device (%d)\n", ret);
} else {
syscfg_base = (u32 *)ofnode_get_addr(args.node);
@@ -281,7 +283,7 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
/* set memory mapping selection */
clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap);
} else {
- dev_dbg(dev, "%s: cannot find st,mem_remap property\n",
__func__);
+ dev_dbg(dev, "cannot find st,mem_remap property\n");
}
swp_fmc = dev_read_u32_default(dev, "st,swp_fmc", NOT_FOUND);
@@ -289,7 +291,7 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
/* set fmc swapping selection */
clrsetbits_le32(syscfg_base, SWP_FMC_MASK, swp_fmc <<
SWP_FMC_OFFSET);
} else {
- dev_dbg(dev, "%s: cannot find st,swp_fmc property\n",
__func__);
+ dev_dbg(dev, "cannot find st,swp_fmc property\n");
}
dev_dbg(dev, "syscfg %x = %x\n", (u32)syscfg_base,
*syscfg_base);
@@ -348,7 +350,7 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
}
params->no_sdram_banks = bank;
- debug("%s, no of banks = %d\n", __func__, params->no_sdram_banks);
+ dev_dbg(dev, "no of banks = %d\n", params->no_sdram_banks);
return 0;
}
--
2.17.1
[PATCH 11/33] hwspinlock: stm32: migrate trace to log macro
Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay --- drivers/hwspinlock/stm32_hwspinlock.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/hwspinlock/stm32_hwspinlock.c b/drivers/hwspinlock/stm32_hwspinlock.c index 8be585a0c8..c3edca72ef 100644 --- a/drivers/hwspinlock/stm32_hwspinlock.c +++ b/drivers/hwspinlock/stm32_hwspinlock.c @@ -3,6 +3,8 @@ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved */ +#define LOG_CATEGORY UCLASS_HWSPINLOCK + #include #include #include -- 2.17.1
[PATCH 10/33] timer: stm32: migrate trace to log macro
Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay --- drivers/timer/stm32_timer.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/timer/stm32_timer.c b/drivers/timer/stm32_timer.c index c57fa3f557..f32b2c8925 100644 --- a/drivers/timer/stm32_timer.c +++ b/drivers/timer/stm32_timer.c @@ -4,6 +4,8 @@ * Author(s): Patrice Chotard, for STMicroelectronics. */ +#define LOG_CATEGORY UCLASS_TIMER + #include #include #include -- 2.17.1
[PATCH 05/33] gpio: stm32-gpio: migrate trace to dev and log macro
Change debug to dev_dbg macro and define LOG_CATEGORY.
Remove dev->name as it is already displayed by dev macro.
Signed-off-by: Patrick Delaunay
---
drivers/gpio/stm32_gpio.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c
index 473e364796..3b17b632db 100644
--- a/drivers/gpio/stm32_gpio.c
+++ b/drivers/gpio/stm32_gpio.c
@@ -4,6 +4,8 @@
* Author(s): Vikas Manocha, for STMicroelectronics.
*/
+#define LOG_CATEGORY UCLASS_GPIO
+
#include
#include
#include
@@ -329,7 +331,7 @@ static int gpio_stm32_probe(struct udevice *dev)
dev_err(dev, "failed to enable clock\n");
return ret;
}
- debug("clock enabled for device %s\n", dev->name);
+ dev_dbg(dev, "clock enabled\n");
return 0;
}
--
2.17.1
