On 10/24/21 21:54, Simon Glass wrote:
Hi Heinrich,
On Sat, 23 Oct 2021 at 08:06, Heinrich Schuchardt
wrote:
The block descriptor contains the if_type. There is no need to first look
up the uclass for the if_type and then to check the parent device's uclass
to know if the device has the
Dear Tom,
In message <20211024164404.GQ3577824@bill-the-cat> you wrote:
>
> > It is a convenience tool, and it is OK if it has a few restrictions,
> > like for the character set of supported variable names.
> >
> > But:
> >
> > 1) These restrictions must be clearly documented, both in the
On Sun, Oct 24, 2021 at 11:00 PM Simon Glass wrote:
> On Wed, 20 Oct 2021 at 06:37, Andy Shevchenko
> wrote:
> >
> > The dsdt.asl is usually combined out of several files that are included
> > in the main one. Whenever we change the content of any of such files,
> > build system is not able to
On 28/09/2021 10.56, Rasmus Villemoes wrote:
> The build system already automatically looks for and includes an
> in-tree *-u-boot.dtsi when building the control .dtb. However, there
> are some things that are awkward to maintain in such an in-tree file,
> most notably the metadata associated to
On 10/24/21 21:54, Simon Glass wrote:
Hi Heinrich,
On Thu, 21 Oct 2021 at 03:16, Heinrich Schuchardt
wrote:
Add a warning that this function only works for strings preceding the first
non-string field.
What is a non-string field? If you mean an int field, for example,
then that would not
Le lun. 25 oct. 2021 à 09:05, Masami Hiramatsu
a écrit :
> Hi Francois,
>
> 2021年10月25日(月) 15:28 François Ozog :
> >
> >
> >
> > Le lun. 25 oct. 2021 à 07:14, AKASHI Takahiro <
> takahiro.aka...@linaro.org> a écrit :
> >>
> >> On Wed, Oct 20, 2021 at 07:39:37AM -0600, Simon Glass wrote:
> >> >
Hi Patrick
On 10/22/21 10:19 AM, Patrick Delaunay wrote:
> Add a configuration file "stm32mp15_st_common.h" to handle the
> STMicroelectronics boards configuration and rename stm32mp1.h to
> "stm32mp15_common.h" to handle the generic STM32MP15x series configuration.
>
> The configuration file
On 24/10/2021 21.54, Simon Glass wrote:
> Hi Rasmus,
>
> On Fri, 22 Oct 2021 at 00:41, Rasmus Villemoes
> wrote:
>>
>> On 21/10/2021 18.03, Tom Rini wrote:
>>> On Thu, Oct 21, 2021 at 09:59:38AM -0600, Simon Glass wrote:
Hi Marek,
On Thu, 21 Oct 2021 at 07:28, Marek Behún wrote:
Hi Francois,
2021年10月25日(月) 15:28 François Ozog :
>
>
>
> Le lun. 25 oct. 2021 à 07:14, AKASHI Takahiro a
> écrit :
>>
>> On Wed, Oct 20, 2021 at 07:39:37AM -0600, Simon Glass wrote:
>> > Hi Masami,
>> >
>> > On Wed, 20 Oct 2021 at 02:18, Masami Hiramatsu
>> > wrote:
>> > >
>> > > Hi Simon,
>>
Hi Takahiro,
2021年10月25日(月) 15:09 AKASHI Takahiro :
>
> On Mon, Oct 25, 2021 at 02:40:11PM +0900, Masami Hiramatsu wrote:
> > Hi Takahiro,
> >
> > 2021年10月25日(月) 12:12 AKASHI Takahiro :
> > >
> > > Hi, Masami,
> > >
> > > On Wed, Oct 20, 2021 at 05:17:12PM +0900, Masami Hiramatsu wrote:
> > > >
On Mon, Oct 18, 2021 at 11:54 AM JaimeLiao wrote:
>
> Power-on-Reset is a method to restore flash back to 1S-1S-1S mode from
> 8D-8D-8D
> in the begging of probe.
>
> Command extension type is not standardized across flash vendors in DTR mode.
>
> For suiting different vendor flash devices,
On Mon, Oct 18, 2021 at 11:54 AM JaimeLiao wrote:
>
> Follow patch "f6adec1af4b2f5d3012480c6cdce7743b74a6156" for adding
> Macronix flash in Octal DTR mode.
>
> Enable Octal DTR mode with 20 dummy cycles to allow running at the
> maximum supported frequency.
>
>
Hi Marek
On 10/23/21 8:32 PM, Marek Vasut wrote:
> All the STM32MP1 based DHSOM have SPI NOR from which they boot,
> enable DFU_MTD support to make it possible to expose that SPI NOR
> via the DFU.
>
> Signed-off-by: Marek Vasut
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> ---
>
Hi Marek
On 10/23/21 8:33 PM, Marek Vasut wrote:
> Increase default SPI NOR bus frequency from 1 MHz to 50 MHz and
> enable SFDP parsing to obtain more accurate SPI NOR configuration.
>
> Signed-off-by: Marek Vasut
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> ---
>
Hi Marek
On 10/23/21 8:33 PM, Marek Vasut wrote:
> The nWP GPIO hog was used to unlock the SPI NOR write protect when U-Boot
> used to operate the SPI NOR in 1-1-1 mode. Now that the SPI NOR is operated
> in 1-1-4 mode, the hog has adverse effects and causes transfer corruption,
> since the
Hi Marek
On 10/23/21 8:33 PM, Marek Vasut wrote:
> The video output support is unused and disabling it saves about 20 kiB of
> space.
> In case video output support is required, it can be re-enabled.
>
> Signed-off-by: Marek Vasut
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> ---
>
Hi Marek
On 10/23/21 8:33 PM, Marek Vasut wrote:
> The EFI support is unused and disabling it saves about 70 kiB of space.
> In case EFI support is required, it can be re-enabled.
>
> Signed-off-by: Marek Vasut
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> ---
>
On Thu, Oct 21, 2021 at 4:01 AM Roman Bacik wrote:
>
> From: Rayagonda Kokatanur
>
> IPROC qspi driver supports both BSPI and MSPI modes.
>
> Signed-off-by: Rayagonda Kokatanur
> Signed-off-by: Bharat Gooty
> Acked-by: Rayagonda Kokatanur
>
> Signed-off-by: Roman Bacik
> ---
>
> Changes in
Hi Patrick
On 10/22/21 8:12 PM, Patrick Delaunay wrote:
> The stm32 gpio driver private data are not needed in arch include files,
> they are not used by code except for stm32 gpio and pincontrol drivers,
> using the same IP; the defines for this IP is moved in a new file
> "stm32_gpio_priv.h" in
Hi Marek
On 10/24/21 12:46 AM, Marek Vasut wrote:
> The DHSOM uses different SPI NOR layout than the ST devkit, stop
> pulling in the ST specific runtime mtdparts settings and adjust
> the mtdparts accordingly.
>
> Signed-off-by: Marek Vasut
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> ---
Enable sdhci and sdmmc0 node in rk3568-u-boot.dtsi
Signed-off-by: Nico Cheng
---
(no changes since v1)
arch/arm/dts/rk3568-u-boot.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index
We configured the drive strength and security of EMMC in
arch_cpu_init().
Signed-off-by: Nico Cheng
---
Changes in v2:
We use the rk_clrreg function instead of the writel to set eMMC sdmmc0 to
secure.
Modify comments to make them more explicit.
arch/arm/mach-rockchip/rk3568/rk3568.c | 19
Enable SPL support in Kconfig and add some related option in
rk3568_common.h
Signed-off-by: Nico Cheng
Signed-off-by: Jason Zhu
---
(no changes since v1)
arch/arm/mach-rockchip/Kconfig | 2 ++
configs/evb-rk3568_defconfig| 25 -
include/configs/rk3568_common.h |
This series adds support for the rk3568 SOC, SPL load next-stage image from
eMMC will be supported after this series of patches.
Changes in v2:
We use the rk_clrreg function instead of the writel to set eMMC sdmmc0 to
secure.
Modify comments to make them more explicit.
Nico Cheng (3):
Hi Marek,
> On 9/14/21 11:31 AM, Lukasz Majewski wrote:
> > On Tue, 14 Sep 2021 05:26:51 +0200
> > Marek Vasut wrote:
> >
> >> Not all SPI flashes and controllers can do continuous transfer
> >> longer than 16 MiB, so perform the DFU read in 16 MiB chunks.
> >>
> >> Signed-off-by: Marek Vasut
Le lun. 25 oct. 2021 à 07:14, AKASHI Takahiro
a écrit :
> On Wed, Oct 20, 2021 at 07:39:37AM -0600, Simon Glass wrote:
> > Hi Masami,
> >
> > On Wed, 20 Oct 2021 at 02:18, Masami Hiramatsu
> > wrote:
> > >
> > > Hi Simon,
> > >
> > > 2021年10月15日(金) 9:40 Simon Glass :
> > > >
> > > > Hi
On 23/10/2021 13.14, Heinrich Schuchardt wrote:
Support for PPC4XX processors has been removed. So we should not mention it
in the documentation.
Signed-off-by: Heinrich Schuchardt
---
doc/README.bedbug | 22 --
1 file changed, 22 deletions(-)
Reviewed-by: Thomas Huth
On Mon, Oct 25, 2021 at 02:40:11PM +0900, Masami Hiramatsu wrote:
> Hi Takahiro,
>
> 2021年10月25日(月) 12:12 AKASHI Takahiro :
> >
> > Hi, Masami,
> >
> > On Wed, Oct 20, 2021 at 05:17:12PM +0900, Masami Hiramatsu wrote:
> > > Hello Akashi-san,
> > >
> > > Can you split this patch out from this
201 - 228 of 228 matches
Mail list logo
