Hello Simon,
On 27.01.22 16:05, Simon Glass wrote:
> Hi Felix,
>
> On Wed, 26 Jan 2022 at 07:02, Felix Brack wrote:
>>
>> Hello Simon,
>>
>> I am trying to get the current U-Boot master working on the PDU001
>> board. This involves the use of an early debug UART.
>>
>> With commit 0dba4586
Hi Felix,
On Thu, 27 Jan 2022 at 09:27, Felix Brack wrote:
>
> Hello Simon,
>
> On 27.01.22 16:05, Simon Glass wrote:
> > Hi Felix,
> >
> > On Wed, 26 Jan 2022 at 07:02, Felix Brack wrote:
> >>
> >> Hello Simon,
> >>
> >> I am trying to get the current U-Boot master working on the PDU001
> >>
On 1/27/22 19:41, Andre Przywara wrote:
On Thu, 27 Jan 2022 15:40:13 -0500
Jesse Taube wrote:
Hi,
On 1/27/22 05:21, Andre Przywara wrote:
On Wed, 26 Jan 2022 08:53:19 -0500
Jesse Taube wrote:
Both armv7 and arm926ejs use this timer code so move it to mach-sunxi.
Very nice, thanks
Hello Tim,
On 28.01.22 01:20, Tim Harvey wrote:
> On Fri, Jan 14, 2022 at 6:55 AM Heiko Schocher wrote:
>>
>> Hello Tim,
>>
>> On 25.02.21 02:21, Tim Harvey wrote:
>>> Greetings,
>>>
>>> I'm trying to convert the gwventana board support to DM_ETH and DM_USB
>>> and one item I have not resolved
On 1/26/22 4:54 AM, Matthias Schiffer wrote:
> On Fri, 2021-12-17 at 18:20 -0500, Sean Anderson wrote:
>> Hi Matthias,
>>
>> On 12/16/21 5:26 AM, Matthias Schiffer wrote:
>> > Having U-Boot look up the passed partition name even though an
>> > alias
>> > exists is unexpected, leading to
Hi
On Thu, Jan 27, 2022 at 6:00 PM Adam Ford wrote:
>
> On Wed, Jan 26, 2022 at 2:58 PM Tommaso Merciai
> wrote:
> >
> > On Wed, Jan 26, 2022 at 12:05:22PM -0600, Adam Ford wrote:
> > > On Sat, Dec 25, 2021 at 2:26 PM Tommaso Merciai
> > > wrote:
> > > >
> > > > Override env_get_location
This reverts commit b5874b552ffa09bc1dc5dec6b5dd376c62dab45d.
It seems the iMX8MM SDHC controller always reports DAT0 line status
as zero after voltage switch at the end of mmc_switch_voltage(), even
if it is supposed to be high and scope confirms the DAT0 is high.
Reverting this patch makes
The ci_req->hw_buf can be NULL, test whether it is and if so,
avoid accessing it. Else, the system may crash.
Signed-off-by: Marek Vasut
Cc: Peter Chen
Cc: Li Jun
Cc: Peng Fan
---
drivers/usb/gadget/ci_udc.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
On Thu, Jan 27, 2022 at 12:09:29PM -0700, Simon Glass wrote:
> Hi Tom,
>
> On Thu, 27 Jan 2022 at 10:31, Tom Rini wrote:
> >
> > On Wed, Jan 26, 2022 at 08:35:43PM -0700, Simon Glass wrote:
> >
> > > Hi Tom,
> > >
> > > https://source.denx.de/u-boot/custodians/u-boot-dm/-/pipelines/10771
> > >
>
Hi, Simon,
On Thu, Jan 27, 2022 at 08:05:56AM -0700, Simon Glass wrote:
> Hi Takahiro,
>
> On Thu, 9 Dec 2021 at 23:58, AKASHI Takahiro
> wrote:
> >
> > # This is a kind of snapshot of my current work.
> > # I submit this to show my progress on this effort, and then
> > # I haven't addressed
Hi Heinrich,
On Thu, Jan 27, 2022 at 09:44:57AM +0100, Heinrich Schuchardt wrote:
> On 1/26/22 12:06, Sunil V L wrote:
> > This adds support for new RISCV_EFI_BOOT_PROTOCOL to
> > communicate the boot hart ID to bootloader/kernel on RISC-V
> > UEFI platforms.
> >
> > Signed-off-by: Sunil V L
> >
On 1/27/22 6:59 PM, Andre Przywara wrote:
> On Mon, 24 Jan 2022 20:56:12 -0600
> Samuel Holland wrote:
>
> Hi Samuel,
>
>> On 1/24/22 7:15 PM, Andre Przywara wrote:
>>> Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied
>>> from the original BSP U-Boot. The comment speaks
Hi Marek,
On 1/28/22 12:40, Marek Vasut wrote:
> This reverts commit b5874b552ffa09bc1dc5dec6b5dd376c62dab45d.
>
> It seems the iMX8MM SDHC controller always reports DAT0 line status
> as zero after voltage switch at the end of mmc_switch_voltage(), even
> if it is supposed to be high and scope
On 1/27/22 23:36, Ilias Apalodimas wrote:
A mix of signatures and hashes in db doesn't always work as intended.
Currently if the digest algorithm is not supported we stop walking the
security database and reject the image.
That's problematic in case we find and try to check a signature before
On Thu, Jan 27, 2022 at 2:11 PM Anup Patel wrote:
>
> Currently, if MTD NOR is enabled then U-Boot tries to issue flash
> commands even when CFI flash DT node is not present. This causes
> access fault on RISC-V emulators or ISS which do not emulate CFI
> flash. To handle this issue, we implement
On Thu, Jan 27, 2022 at 2:11 PM Anup Patel wrote:
>
> We can now use same U-Boot images on both QEMU virt machine and QEMU
> spike machine so let's update the QEMU RISC-V documentation.
>
> Signed-off-by: Anup Patel
> ---
> doc/board/emulation/qemu-riscv.rst | 48 --
Calling device_chld_remove() before flags_remove() means all devices
get removed no matter whether they should be removed late or not. This
breaks teardown of eMMC when booting and other critical boot paths.
Fixes: c51d2e704a1 ("dm: core: Avoid partially removing devices")
Signed-off-by: Marek
From: Richard Zhu
Add the PCIe support on i.MX8MM platforms.
Signed-off-by: Richard Zhu
Tested-by: Marcel Ziswiler
Reviewed-by: Tim Harvey
Tested-by: Tim Harvey
Signed-off-by: Shawn Guo
Signed-off-by: Marek Vasut # Pick from Linux 854a4766ac12
("arm64: dts: imx8mm: Add the pcie support")
From: Richard Zhu
Add the PCIe PHY support on iMX8MM platforms.
Signed-off-by: Richard Zhu
Tested-by: Marcel Ziswiler
Reviewed-by: Tim Harvey
Tested-by: Tim Harvey
Signed-off-by: Shawn Guo
Signed-off-by: Marek Vasut # Pick from Linux b9ec888f636f
("arm64: dts: imx8mm: Add the pcie phy
From: Richard Zhu
Add binding for reference clock PAD modes of the i.MX8 PCIe PHY.
Signed-off-by: Richard Zhu
Tested-by: Marcel Ziswiler
Reviewed-by: Tim Harvey
Tested-by: Tim Harvey
Reviewed-by: Rob Herring
Link:
In case fastboot over Ethernet, am65_cpsw_stop() is not called unless
DM_FLAG_OS_PREPARE is set. Without call to am65_cpsw_stop(), DMA
resources are not released thus leading to failures in kernel.
Fix this by adding DM_FLAG_OS_PREPARE flag to am65_cpsw_nuss_port
driver.
Reported-by: Christian
On 1/27/22 05:21, Andre Przywara wrote:
On Wed, 26 Jan 2022 08:53:19 -0500
Jesse Taube wrote:
Both armv7 and arm926ejs use this timer code so move it to mach-sunxi.
Very nice, thanks for cleaning this up.
But please remove the respective line from the Makefile in
The function to return the default MMC device for the environment
already has a __weak instance doing exactly the same thing. Remove
the superfluous one.
Signed-off-by: Adam Ford
diff --git a/board/beacon/imx8mn/imx8mn_beacon.c
b/board/beacon/imx8mn/imx8mn_beacon.c
index
The function to return the default MMC device for the environment
already has a __weak instance doing exactly the same thing. Remove
the superfluous one.
Signed-off-by: Adam Ford
diff --git a/board/beacon/imx8mm/imx8mm_beacon.c
b/board/beacon/imx8mm/imx8mm_beacon.c
index
On Wed, Jan 26, 2022 at 2:58 PM Tommaso Merciai wrote:
>
> On Wed, Jan 26, 2022 at 12:05:22PM -0600, Adam Ford wrote:
> > On Sat, Dec 25, 2021 at 2:26 PM Tommaso Merciai
> > wrote:
> > >
> > > Override env_get_location function at board level, previously dropped
> > > down from
Hi,
On Thu, 27 Jan 2022 at 10:31, Tom Rini wrote:
>
> On Thu, Jan 27, 2022 at 07:33:36PM +0900, Jaehoon Chung wrote:
> > On 1/17/22 23:34, Minkyu Kang wrote:
> > > Hi,
> > >
> > > On Thu, 13 Jan 2022 at 17:39, Jaehoon Chung
> > > wrote:
> > >
> > >> Exynos5 is using old devicetree file for
Sorry Tom!
On this day, January 26, 2022, thus sayeth Bryan Brattlof:
> There is a 4 bit VARIANT number inside the JTAGID register that TI
> increments any time a new variant for a chip is produced. Each
> family of TI's SoCs uses a different versioning scheme based off
> that VARIANT number.
>
Hi Tom,
On Thu, 27 Jan 2022 at 10:31, Tom Rini wrote:
>
> On Wed, Jan 26, 2022 at 08:35:43PM -0700, Simon Glass wrote:
>
> > Hi Tom,
> >
> > https://source.denx.de/u-boot/custodians/u-boot-dm/-/pipelines/10771
> >
> >
> > The following changes since commit
On Thu, Jan 27, 2022 at 01:01:33PM -0600, Bryan Brattlof wrote:
> Sorry Tom!
>
> On this day, January 26, 2022, thus sayeth Bryan Brattlof:
> > There is a 4 bit VARIANT number inside the JTAGID register that TI
> > increments any time a new variant for a chip is produced. Each
> > family of TI's
Hi Harald,
On Thu, 27 Jan 2022 at 07:54, Harald Seiler wrote:
>
> Hi Simon,
>
> first of all, sorry for the super late response to this :/ I had it on
> my list for a long time but had trouble finding enough time to revisit
> the test/py integration properly. You see, the existing test/py
>
On Tuesday 25 January 2022 06:03:26 Heinrich Schuchardt wrote:
> On 1/24/22 20:45, Pali Rohár wrote:
> > Convert documentation to rst format
> >
> > Signed-off-by: Pali Rohár
>
> Thanks for converting to rst.
>
> I guess I will simply add all 3 patches to my repo and add all typo
> fixes to
On 12/28/21 9:50 PM, qianfangui...@qq.com wrote:
> From: qianfan Zhao
>
> find_dev_and_part return 0 on success, 1 otherwise.
> So fastboot_nand_get_part_info follow this rule.
>
> Signed-off-by: qianfan Zhao
> ---
> drivers/fastboot/fb_getvar.c | 5 -
> 1 file changed, 4
On Wed, Jan 26, 2022 at 08:35:43PM -0700, Simon Glass wrote:
> Hi Tom,
>
> https://source.denx.de/u-boot/custodians/u-boot-dm/-/pipelines/10771
>
>
> The following changes since commit 6146cd62aedc4849fec66f10ab0aa57f1dc64b8e:
>
> Merge branch '2022-01-24-assorted-updates' (2022-01-25
On Thu, Jan 27, 2022 at 07:33:36PM +0900, Jaehoon Chung wrote:
> On 1/17/22 23:34, Minkyu Kang wrote:
> > Hi,
> >
> > On Thu, 13 Jan 2022 at 17:39, Jaehoon Chung wrote:
> >
> >> Exynos5 is using old devicetree file for only U-boot.
> >> It's difficult to adjust the driver-model and sync codes
Heinrich,
On Tue, 25 Jan 2022 at 16:46, Ilias Apalodimas
wrote:
>
> We currently distinguish between signed and non signed PE/COFF executables
> while trying to authenticate signatures and/or sha256 hashes in db and dbx.
> That code duplication can be avoided. When checking for sha256 hashes,
>
On Fri, Jan 14, 2022 at 6:55 AM Heiko Schocher wrote:
>
> Hello Tim,
>
> On 25.02.21 02:21, Tim Harvey wrote:
> > Greetings,
> >
> > I'm trying to convert the gwventana board support to DM_ETH and DM_USB
> > and one item I have not resolved yet is USB Ethernet gadget support.
> >
> > For non-dm a
On Tue, 2021-12-28 at 01:34 -0700, Simon Glass wrote:
> Hi Ivan,
>
> On Fri, 24 Dec 2021 at 11:23, Ivan Mikhaylov
> wrote:
> >
> > Introduce prototype for binman's new option which provides sign
> > and replace sections in binary images.
> >
> > Usage as example:
> >
> > from:
> > mkimage -G
What is the "right" way to modify a defconfig file?
Most sources I've found just say things like "edit the defconfig
file". That seems error-prone -- especially when dealing with settings
that have side effects.
I did stumble across one mention of "make savedefconfig", and this
seems to be the
In Manjaro ARM we have used this patch for years now and it was
requested that we upstream it.
This will make all rk3399 based boards try USB boot before
SD or eMMC. Can be quite handy on some devices, where the
other devices are not easy to get to.
Signed-off-by: Dan Johansen
---
On Thu, Jan 27, 2022 at 11:22:12AM -0500, Sean Anderson wrote:
>
>
> On 1/26/22 4:54 AM, Matthias Schiffer wrote:
> > On Fri, 2021-12-17 at 18:20 -0500, Sean Anderson wrote:
> >> Hi Matthias,
> >>
> >> On 12/16/21 5:26 AM, Matthias Schiffer wrote:
> >> > Having U-Boot look up the passed
On Thu, Jan 27, 2022 at 10:59:51AM -0600, Adam Ford wrote:
> On Wed, Jan 26, 2022 at 2:58 PM Tommaso Merciai
> wrote:
> >
> > On Wed, Jan 26, 2022 at 12:05:22PM -0600, Adam Ford wrote:
> > > On Sat, Dec 25, 2021 at 2:26 PM Tommaso Merciai
> > > wrote:
> > > >
> > > > Override env_get_location
On Mon, 24 Jan 2022 20:56:12 -0600
Samuel Holland wrote:
Hi Samuel,
> On 1/24/22 7:15 PM, Andre Przywara wrote:
> > Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied
> > from the original BSP U-Boot. The comment speaks of this being required
> > before DRAM access gets
Hi Sean,
On Thu, 27 Jan 2022 at 08:43, Sean Anderson wrote:
>
> On 1/27/22 10:05 AM, Simon Glass wrote:
> > Hi Sean,
> >
> > On Sat, 15 Jan 2022 at 15:25, Sean Anderson wrote:
> >>
> >> When freeing a clock there is not much we can do if there is an error, and
> >> most callers do not actually
Hi,
On Fri, 21 Jan 2022 at 13:11, Milan P. Stanić wrote:
>
> Hi,
>
> it works and build pass without error or warning.
> Tested on alpine edge aarch64 bare metal.
>
> Thank you
>
> On Fri, 2022-01-21 at 18:00, Heinrich Schuchardt wrote:
> > sdl.c is compiled against the SDL library.
> >
> >
Am 27. Januar 2022 16:06:03 MEZ schrieb Simon Glass :
>Hi Ilias,
>
>On Mon, 15 Nov 2021 at 04:11, Ilias Apalodimas
> wrote:
>>
>> Hi Simon,
>>
>> On Sat, Nov 13, 2021 at 11:14:27AM -0700, Simon Glass wrote:
>> > Hi Ilias,
>> >
>> > On Tue, 9 Nov 2021 at 00:02, Ilias Apalodimas
>> > wrote:
>> > >
On Tue, Jan 18, 2022 at 8:40 AM Tim Harvey wrote:
>
> On Mon, Jan 17, 2022 at 3:32 AM Andrey Zhizhikin
> wrote:
> >
> > Commit 72d81360aabd ("global: Convert CONFIG_LOADADDR to
> > CONFIG_SYS_LOADADDR") dropped the usage of LOADADDR and replaced it with
> > SYS_LOADADDR.
> >
> > Use the correct
On Thu, 27 Jan 2022 15:40:13 -0500
Jesse Taube wrote:
Hi,
> On 1/27/22 05:21, Andre Przywara wrote:
> > On Wed, 26 Jan 2022 08:53:19 -0500
> > Jesse Taube wrote:
> >
> >> Both armv7 and arm926ejs use this timer code so move it to mach-sunxi.
> >
> > Very nice, thanks for cleaning this
On 1/27/22 20:48, Mark Kettenis wrote:
>> Date: Thu, 27 Jan 2022 08:54:29 +0900
>> From: Jaehoon Chung
>>
>> Hi,
>>
>> On 1/23/22 04:38, Mark Kettenis wrote:
>>> The power management controller found on Apple SoCs als provides
>>> a way to reset all devices within a power domain. This is needed
A mix of signatures and hashes in db doesn't always work as intended.
Currently if the digest algorithm is not supported we stop walking the
security database and reject the image.
That's problematic in case we find and try to check a signature before
inspecting the sha256 hash. If the image is
On Wed, 26 Jan 2022 08:53:19 -0500
Jesse Taube wrote:
> Both armv7 and arm926ejs use this timer code so move it to mach-sunxi.
Very nice, thanks for cleaning this up.
But please remove the respective line from the Makefile in
arch/arm/cpu/armv7/sunxi/, otherwise 32-bit board builds fail:
Add support for probing, initializing and powering, SerDes0 instance.
Signed-off-by: Aswath Govindraju
---
board/ti/j721e/evm.c | 37 +
1 file changed, 37 insertions(+)
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index 077d83420c9c..ad85b9d50115
Sierra has two PLLs, PLL_CMNLC and PLL_CMNLC1 and each of these PLLs has
two inputs, plllc_refclk (input from pll0_refclk) and refrcv (input from
pll1_refclk). Model PLL_CMNLC and PLL_CMNLC1 as a clock so that it's
possible to select one of these two inputs from device tree.
Signed-off-by: Aswath
Add a driver of type UCLASS_PHY for each of the link nodes in the serdes
instance.
Signed-off-by: Aswath Govindraju
---
drivers/phy/cadence/phy-cadence-sierra.c | 116 +++
1 file changed, 75 insertions(+), 41 deletions(-)
diff --git
The PLL_CMNLC clocks are modelled as a child clock device of seirra. In the
function device_probe, the corresponding clocks are probed before calling
the device's probe. The PLL_CMNLC mux clock can only be created after the
device's probe. Therefore, move assigned-clocks and assigned-clock-parents
From: Kishon Vijay Abraham I
Add missing clk_disable_unprepare() in cdns_sierra_phy_remove().
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Aswath Govindraju
---
drivers/phy/cadence/phy-cadence-sierra.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
Fix the condition for setting P_ENABLE_FORCE bit, by syncing with the
driver in kernel.
Signed-off-by: Aswath Govindraju
---
drivers/phy/ti/phy-j721e-wiz.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index
On 1/17/22 23:34, Minkyu Kang wrote:
> Hi,
>
> On Thu, 13 Jan 2022 at 17:39, Jaehoon Chung wrote:
>
>> Exynos5 is using old devicetree file for only U-boot.
>> It's difficult to adjust the driver-model and sync codes with linux.
>> This patchset is to copy exynos5 devicetree files from linux
From: Sanket Parmar
Updated values of USB3 related Sierra PHY registers.
This change fixes USB3 device disconnect issue observed
while enternig U1/U2 state.
Signed-off-by: Sanket Parmar
Signed-off-by: Aswath Govindraju
---
drivers/phy/cadence/phy-cadence-sierra.c | 27
The following series of patches,
- add support for MultiLink on Sierra SerDes
- Also adds the required to configs, dt node changes
to enable this on J721e common processor board.
Notes:
- Patches 1, 2, 3, 4, 5, 6, 7, 8, 13, 14, 15, 16, 17,
18, 19, 20, 21 and 22 are ported from upstream kernel
From: Kishon Vijay Abraham I
No functional change. Group devm_reset_control_get() and
devm_reset_control_get_optional() to a separate function.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Aswath Govindraju
---
drivers/phy/cadence/phy-cadence-sierra.c | 19 +++
1 file
From: Kishon Vijay Abraham I
No functional change. Group all devm_clk_get_optional() to a
separate function.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Aswath Govindraju
---
drivers/phy/cadence/phy-cadence-sierra.c | 57 +++-
1 file changed, 35 insertions(+), 22
From: Swapnil Jakhade
Sierra driver currently supports single link configurations only. Prepare
driver to support multilink multiprotocol configurations along with
different SSC modes.
Signed-off-by: Swapnil Jakhade
Signed-off-by: Aswath Govindraju
---
From: Swapnil Jakhade
No functional change. Rename some regmap variables as mentioned in Sierra
register description documentation.
Signed-off-by: Swapnil Jakhade
Signed-off-by: Aswath Govindraju
---
drivers/phy/cadence/phy-cadence-sierra.c | 12 ++--
1 file changed, 6 insertions(+),
From: Swapnil Jakhade
Add PHY PCS common register configuration sequences for single link.
Update single link PCIe register sequence accordingly.
Signed-off-by: Swapnil Jakhade
Signed-off-by: Aswath Govindraju
---
drivers/phy/cadence/phy-cadence-sierra.c | 38
1 file
From: Swapnil Jakhade
Add support to get SSC type from DT.
Signed-off-by: Swapnil Jakhade
Signed-off-by: Aswath Govindraju
---
drivers/phy/cadence/phy-cadence-sierra.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/cadence/phy-cadence-sierra.c
From: Swapnil Jakhade
Add binding to specify Spread Spectrum Clocking mode used
Signed-off-by: Swapnil Jakhade
Signed-off-by: Aswath Govindraju
---
include/dt-bindings/phy/phy-cadence.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/dt-bindings/phy/phy-cadence.h
From: Kishon Vijay Abraham I
Cadence Sierra PHY driver registers PHY using devm_phy_create()
for all sub-nodes of Sierra device tree node. However Sierra device
tree node can have sub-nodes for the various clocks in addtion to the
PHY. Use devm_phy_create() only for nodes with name "phy" (or
From: Kishon Vijay Abraham I
Instead of having separate structure members for each input clock, add
an array for the input clocks within "struct cdns_sierra_phy". This is
in preparation for adding more input clocks required for supporting
additional clock combination.
Signed-off-by: Kishon
Add configs to enable booting ethfw core in j721e
Signed-off-by: Aswath Govindraju
---
configs/j721e_evm_a72_defconfig | 2 +-
include/configs/j721e_evm.h | 19 ++-
2 files changed, 11 insertions(+), 10 deletions(-)
diff --git a/configs/j721e_evm_a72_defconfig
From: Kishon Vijay Abraham I
Commit 39b823381d9d ("phy: cadence: Add driver for Sierra PHY")
de-asserts PHY_RESET even before the configurations are loaded in
phy_init(). However PHY_RESET should be de-asserted only after
all the configurations has been initialized, instead of de-asserting
in
Skip the phy configuration if the required configurations were done in an
earlier boot stage.
Signed-off-by: Aswath Govindraju
---
drivers/phy/cadence/phy-cadence-sierra.c | 55 +---
1 file changed, 40 insertions(+), 15 deletions(-)
diff --git
Add support for QSGMII multilink configuration.
Signed-off-by: Aswath Govindraju
---
.../arm/dts/k3-j721e-common-proc-board-u-boot.dtsi | 5 +
arch/arm/dts/k3-j721e-common-proc-board.dts| 14 +++---
arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 12 ++--
3
On 1/26/22 12:06, Sunil V L wrote:
This adds support for new RISCV_EFI_BOOT_PROTOCOL to
communicate the boot hart ID to bootloader/kernel on RISC-V
UEFI platforms.
Signed-off-by: Sunil V L
---
include/efi_api.h | 4 +++
include/efi_loader.h | 2 ++
include/efi_riscv.h
From: Swapnil Jakhade
Add register sequences for PCIe + QSGMII PHY multilink configuration.
Signed-off-by: Swapnil Jakhade
Signed-off-by: Aswath Govindraju
---
drivers/phy/cadence/phy-cadence-sierra.c | 378 ++-
1 file changed, 377 insertions(+), 1 deletion(-)
diff --git
From: Swapnil Jakhade
PIPE phy status is used to communicate the completion of several PHY
functions. Check if PHY is ready for operation while configured for
PIPE mode during startup.
Signed-off-by: Swapnil Jakhade
Signed-off-by: Aswath Govindraju
---
From: Swapnil Jakhade
Add single link PCIe register configurations for no SSC and internal
SSC. Also, add missing PMA lane registers for external SSC.
Signed-off-by: Swapnil Jakhade
Signed-off-by: Aswath Govindraju
---
drivers/phy/cadence/phy-cadence-sierra.c | 218 ++-
1
From: Swapnil Jakhade
Add support for multilink configuration of Sierra PHY. Currently,
maximum two links are supported.
Signed-off-by: Swapnil Jakhade
Signed-off-by: Aswath Govindraju
---
drivers/phy/cadence/phy-cadence-sierra.c | 153 +--
1 file changed, 145
From: Swapnil Jakhade
Check if PMA cmn_ready is set indicating the startup process is complete.
Signed-off-by: Swapnil Jakhade
Signed-off-by: Aswath Govindraju
---
drivers/phy/cadence/phy-cadence-sierra.c | 35
1 file changed, 35 insertions(+)
diff --git
Hi Nathan,
On 26/01/22 01:52PM, Nathan Barrett-Morrison wrote:
> Hi All,
>
> I noticed this was missing from the spi-nor-tiny.c subsystem while trying
> to use an ISSI SPI flash device with the U-Boot SPL.
>
> This patch will allow 4 byte addressing mode to be enabled with ISSI flash
> devices
> Date: Thu, 27 Jan 2022 08:54:29 +0900
> From: Jaehoon Chung
>
> Hi,
>
> On 1/23/22 04:38, Mark Kettenis wrote:
> > The power management controller found on Apple SoCs als provides
> > a way to reset all devices within a power domain. This is needed
> > to cleanly shutdown the NVMe controller
This patchset enables support for loading and starting IPU firmware,
the following have been implemented:
- Enable fs_loader compilation at SPL Level, that is necessary in order
to load IPU firmware from /boot partition.
- Define necessary related IPU dts nodes.
- Add necessary
Expand SPL_MULTI_DTB_FIT to accommodate new SPL IPU nodes.
Signed-off-by: Amjad Ouled-Ameur
---
(no changes since v1)
configs/dra7xx_evm_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index
From: Keerthy
First check the presence of the ipu firmware in the boot partition.
If present enable the ipu and the related clocks & then move
on to load the firmware and eventually start remoteproc IPU1/IPU2.
do_enable_clocks by default puts the clock domains into auto
which does not work well
From: Keerthy
Add support for ipu early boot.
Signed-off-by: Keerthy
Signed-off-by: Amjad Ouled-Ameur
---
(no changes since v1)
arch/arm/dts/am57xx-idk-common-u-boot.dtsi | 1 +
arch/arm/dts/dra7-evm-u-boot.dtsi | 1 +
arch/arm/dts/dra71-evm-u-boot.dtsi | 1 +
On Thu, Jan 27, 2022 at 01:35:14AM +0100, Marek Vasut wrote:
> The following changes since commit 6146cd62aedc4849fec66f10ab0aa57f1dc64b8e:
>
> Merge branch '2022-01-24-assorted-updates' (2022-01-25 08:01:43 -0500)
>
> are available in the Git repository at:
>
>
From: Keerthy
Add all the ipu early boot related nodes
Signed-off-by: Keerthy
Signed-off-by: Amjad Ouled-Ameur
---
(no changes since v1)
MAINTAINERS | 1 +
arch/arm/dts/dra7-ipu-common-early-boot.dtsi | 113 +++
2 files changed, 114
From: Keerthy
Add ipu and the associated nodes.
Signed-off-by: Keerthy
Signed-off-by: Amjad Ouled-Ameur
---
(no changes since v1)
arch/arm/dts/dra7.dtsi | 45 +-
1 file changed, 44 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/dra7.dtsi
From: Keerthy
Add support for ipu early boot.
Signed-off-by: Keerthy
Signed-off-by: Amjad Ouled-Ameur
---
(no changes since v1)
MAINTAINERS | 1 +
arch/arm/dts/am57xx-beagle-x15-revb1-u-boot.dtsi | 7 +++
From: Keerthy
Add remoteproc resource handling helpers. These functions
are primarily to parse the resource table and to handle
different types of resources. Carveout, devmem, trace &
vring resources are handled.
Signed-off-by: Keerthy
[Amjad: fix redefinition of "struct resource_table" and
From: Keerthy
The driver enables IPU support. Basically enables the clocks,
timers, watchdog timers and bare minimal MMU and supports
loading the firmware from mmc.
Signed-off-by: Keerthy
[Amjad: fix compile warnings]
Signed-off-by: Amjad Ouled-Ameur
---
(no changes since v1)
MAINTAINERS
From: Keerthy
Enable fs_loader compilation at SPL Level.
Signed-off-by: Keerthy
[Amjad: fix compilation failures for J721e platform]
Signed-off-by: Amjad Ouled-Ameur
---
Changes in v4:
- Enable SPL fs_loader for j7200_evm_r5 and socfpga_arria10.
arch/arm/mach-k3/common.c | 10
From: Keerthy
Add a reset driver to bring IPs out of reset.
Signed-off-by: Keerthy
[Amjad: reset_ops structure member "free" has been renamed to "rfree",
use the latter instead]
Signed-off-by: Amjad Ouled-Ameur
---
(no changes since v1)
MAINTAINERS| 1 +
From: Keerthy
Add find_next_zero_area to fetch the next zero area in the map.
Signed-off-by: Keerthy
Signed-off-by: Amjad Ouled-Ameur
---
(no changes since v1)
include/linux/bitmap.h | 26 ++
1 file changed, 26 insertions(+)
diff --git a/include/linux/bitmap.h
Hi Tom,
On 26/01/2022 04:37, Tom Rini wrote:
On Tue, Jan 18, 2022 at 11:12:42AM +0100, Amjad Ouled-Ameur wrote:
From: Keerthy
Enable fs_loader compilation at SPL Level.
Signed-off-by: Keerthy
[Amjad: fix compilation failures for J721e platform]
Signed-off-by: Amjad Ouled-Ameur
This
Adds build-sandbox in sys.path to look for libfdt,
otherwise py_test can't use binman.
Signed-off-by: Philippe Reynes
---
tools/binman/main.py | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/binman/main.py b/tools/binman/main.py
index 35944f314a..f62394043d 100755
---
Adds /tmp/sandbox to sys.path to look for libfdt,
otherwise ci is broken if a py_test uses binman.
Signed-off-by: Philippe Reynes
---
tools/binman/main.py | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/binman/main.py b/tools/binman/main.py
index f62394043d..7d52482c0c 100755
---
Hi Simon,
first of all, sorry for the super late response to this :/ I had it on
my list for a long time but had trouble finding enough time to revisit
the test/py integration properly. You see, the existing test/py
integration has bitrotten quite a lot and I couldn't even get the
existing code
On Mon, 17 Jan 2022 at 08:49, Patrick Delaunay
wrote:
>
> Fix up the comment for uclass_get_by_name_len() to avoid confusion.
>
> Fixes: 4b030177b660 ("dm: core: Allow finding children / uclasses by partial
> name")
> Signed-off-by: Patrick Delaunay
> ---
>
> (no changes since v1)
>
>
Hi Sean,
On Sat, 15 Jan 2022 at 15:25, Sean Anderson wrote:
>
> When freeing a clock there is not much we can do if there is an error, and
> most callers do not actually check the return value. Even e.g. checking to
> make sure that clk->id is valid should have been done in request() in the
>
Hi Marek,
On Thu, 6 Jan 2022 at 09:55, Marek Behún wrote:
>
> On Thu, 6 Jan 2022 09:15:17 -0700
> Simon Glass wrote:
>
> > Hi Marek,
> >
> > On Thu, 6 Jan 2022 at 09:10, Marek Behún wrote:
> > >
> > > On Thu, 6 Jan 2022 08:48:48 -0700
> > > Simon Glass wrote:
> > >
> > > > Hi Marek,
> > > >
>
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