[PATCH 2/2] sunxi: H616: add LPDDR3 DRAM support
From: iuncuim
The H616 SoC has support for several types of DRAM: DDR3, LPDDR3,
DDR4 and LPDDR4.
At the moment, the driver only supports DDR3 memory.
Let's extend the driver to support the LPDDR3 memory. All "magic"
values obtained from the boot0.
---
.../include/asm/arch-sunxi/dram_sun50i_h616.h | 1 +
arch/arm/mach-sunxi/Kconfig | 10 +-
arch/arm/mach-sunxi/dram_sun50i_h616.c| 215 --
arch/arm/mach-sunxi/dram_timings/Makefile | 1 +
.../arm/mach-sunxi/dram_timings/h616_lpddr3.c | 95
5 files changed, 255 insertions(+), 67 deletions(-)
create mode 100644 arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h
b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h
index 6db869c098..bf4188fa89 100644
--- a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h
+++ b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h
@@ -148,6 +148,7 @@ check_member(sunxi_mctl_ctl_reg, unk_0x4240, 0x4240);
struct dram_para {
u32 clk;
enum sunxi_dram_type type;
+ u8 phy_init[27];
u8 cols;
u8 rows;
u8 ranks;
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 3ad37ef6ba..5ce82a955c 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -487,6 +487,14 @@ config SUNXI_DRAM_H6_DDR3_1333
This option is the DDR3 timing used by the boot0 on H6 TV boxes
which use a DDR3-1333 timing.
+config SUNXI_DRAM_H616_LPDDR3
+ bool "LPDDR3 DRAM chips on the H616 DRAM controller"
+ select SUNXI_DRAM_LPDDR3
+ depends on DRAM_SUN50I_H616
+ ---help---
+ This option is the LPDDR3 timing used by the stock boot0 by
+ Allwinner.
+
config SUNXI_DRAM_H616_DDR3_1333
bool "DDR3-1333 boot0 timings on the H616 DRAM controller"
select SUNXI_DRAM_DDR3
@@ -1083,4 +1091,4 @@ config CHIP_DIP_SCAN
select W1_GPIO
select W1_EEPROM
select W1_EEPROM_DS24XXX
- select CMD_EXTENSION
\ No newline at end of file
+ select CMD_EXTENSION
diff --git a/arch/arm/mach-sunxi/dram_sun50i_h616.c
b/arch/arm/mach-sunxi/dram_sun50i_h616.c
index 1f9416d6ea..d34b218ee5 100644
--- a/arch/arm/mach-sunxi/dram_sun50i_h616.c
+++ b/arch/arm/mach-sunxi/dram_sun50i_h616.c
@@ -227,13 +227,6 @@ static void mctl_set_addrmap(struct dram_para *para)
mctl_ctl->addrmap[8] = 0x3F3F;
}
-static const u8 phy_init[] = {
- 0x07, 0x0b, 0x02, 0x16, 0x0d, 0x0e, 0x14, 0x19,
- 0x0a, 0x15, 0x03, 0x13, 0x04, 0x0c, 0x10, 0x06,
- 0x0f, 0x11, 0x1a, 0x01, 0x12, 0x17, 0x00, 0x08,
- 0x09, 0x05, 0x18
-};
-
static void mctl_phy_configure_odt(struct dram_para *para)
{
unsigned int val;
@@ -263,19 +256,31 @@ static void mctl_phy_configure_odt(struct dram_para *para)
writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x34c);
val = para->dx_odt & 0x1f;
- writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x380);
+ if (para->type == SUNXI_DRAM_TYPE_LPDDR3)
+ writel_relaxed(0, SUNXI_DRAM_PHY0_BASE + 0x380);
+ else
+ writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x380);
writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x384);
val = (para->dx_odt >> 8) & 0x1f;
- writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x3c0);
+ if (para->type == SUNXI_DRAM_TYPE_LPDDR3)
+ writel_relaxed(0, SUNXI_DRAM_PHY0_BASE + 0x3c0);
+ else
+ writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x3c0);
writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x3c4);
val = (para->dx_odt >> 16) & 0x1f;
- writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x400);
+ if (para->type == SUNXI_DRAM_TYPE_LPDDR3)
+ writel_relaxed(0, SUNXI_DRAM_PHY0_BASE + 0x400);
+ else
+ writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x400);
writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x404);
val = (para->dx_odt >> 24) & 0x1f;
- writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x440);
+ if (para->type == SUNXI_DRAM_TYPE_LPDDR3)
+ writel_relaxed(0, SUNXI_DRAM_PHY0_BASE + 0x440);
+ else
+ writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x440);
writel_relaxed(val, SUNXI_DRAM_PHY0_BASE + 0x444);
dmb();
@@ -793,31 +798,47 @@ static void mctl_phy_ca_bit_delay_compensation(struct
dram_para *para)
writel(val, SUNXI_DRAM_PHY0_BASE + 0x7e0);
writel(val, SUNXI_DRAM_PHY0_BASE + 0x7f4);
- /* following configuration is DDR3 specific */
- val = (para->tpr10 >> 7) & 0x1e;
- if (para->tpr2 & 1) {
- writel(val, SUNXI_DRAM_PHY0_BASE + 0x794);
- if (para->ranks == 2) {
- val = (para->tpr10 >> 11) & 0x1e;
- writel(val, SUNXI_DRAM_PHY0_BASE + 0x7e4);
- }
- if (para->tpr0 & BIT(31)) {
- val =
[PATCH 1/2] sunxi: H616: add DRAM type selection
From: iuncuim Allwinner H616 SoC supports several types of DRAM memory. To further integrate other types of memory, we need to add this delimitation. --- arch/arm/mach-sunxi/Kconfig | 12 ++-- arch/arm/mach-sunxi/dram_timings/Makefile | 3 +-- configs/orangepi_zero2_defconfig | 1 + configs/x96_mate_defconfig| 1 + 4 files changed, 13 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 6dcbb096f7..3ad37ef6ba 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -442,7 +442,7 @@ config ARM_BOOT_HOOK_RMR This allows both the SPL and the U-Boot proper to be entered in either mode and switch to AArch64 if needed. -if SUNXI_DRAM_DW || DRAM_SUN50I_H6 +if SUNXI_DRAM_DW || DRAM_SUN50I_H6 || DRAM_SUN50I_H616 config SUNXI_DRAM_DDR3 bool @@ -487,6 +487,14 @@ config SUNXI_DRAM_H6_DDR3_1333 This option is the DDR3 timing used by the boot0 on H6 TV boxes which use a DDR3-1333 timing. +config SUNXI_DRAM_H616_DDR3_1333 + bool "DDR3-1333 boot0 timings on the H616 DRAM controller" + select SUNXI_DRAM_DDR3 + depends on DRAM_SUN50I_H616 + ---help--- + This option is the DDR3 timing used by the boot0 on H616 TV boxes + which use a DDR3-1333 timing. + config SUNXI_DRAM_DDR2_V3S bool "DDR2 found in V3s chip" select SUNXI_DRAM_DDR2 @@ -1075,4 +1083,4 @@ config CHIP_DIP_SCAN select W1_GPIO select W1_EEPROM select W1_EEPROM_DS24XXX - select CMD_EXTENSION + select CMD_EXTENSION \ No newline at end of file diff --git a/arch/arm/mach-sunxi/dram_timings/Makefile b/arch/arm/mach-sunxi/dram_timings/Makefile index 39a8756c29..4d78c04c9a 100644 --- a/arch/arm/mach-sunxi/dram_timings/Makefile +++ b/arch/arm/mach-sunxi/dram_timings/Makefile @@ -3,5 +3,4 @@ obj-$(CONFIG_SUNXI_DRAM_LPDDR3_STOCK) += lpddr3_stock.o obj-$(CONFIG_SUNXI_DRAM_DDR2_V3S) += ddr2_v3s.o obj-$(CONFIG_SUNXI_DRAM_H6_LPDDR3) += h6_lpddr3.o obj-$(CONFIG_SUNXI_DRAM_H6_DDR3_1333) += h6_ddr3_1333.o -# currently only DDR3 is supported on H616 -obj-$(CONFIG_MACH_SUN50I_H616) += h616_ddr3_1333.o +obj-$(CONFIG_SUNXI_DRAM_H616_DDR3_1333)+= h616_ddr3_1333.o diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig index 6cb942f511..e38cc20ac7 100644 --- a/configs/orangepi_zero2_defconfig +++ b/configs/orangepi_zero2_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e CONFIG_DRAM_SUN50I_H616_TPR10=0xf83438 CONFIG_MACH_SUN50I_H616=y +CONFIG_SUNXI_DRAM_H616_DDR3_1333=y CONFIG_R_I2C_ENABLE=y CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/x96_mate_defconfig b/configs/x96_mate_defconfig index aedb327702..2a326bf202 100644 --- a/configs/x96_mate_defconfig +++ b/configs/x96_mate_defconfig @@ -11,6 +11,7 @@ CONFIG_DRAM_SUN50I_H616_TPR10=0x2f0007 CONFIG_DRAM_SUN50I_H616_TPR11=0x CONFIG_DRAM_SUN50I_H616_TPR12=0xfedf7557 CONFIG_MACH_SUN50I_H616=y +CONFIG_SUNXI_DRAM_H616_DDR3_1333=y CONFIG_R_I2C_ENABLE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y -- 2.40.1
[PATCH 0/2] sunxi: H616: Add LPDDR3 DRAM type
From: iuncuim At the moment, the driver only supports DDR3 memory. Add support for a new type DRAM. These changes have been successfully tested by me with tvbox tra###eed t98-h2b-lp3. iuncuim (2): sunxi: H616: add DRAM type selection sunxi: H616: add LPDDR3 DRAM support .../include/asm/arch-sunxi/dram_sun50i_h616.h | 1 + arch/arm/mach-sunxi/Kconfig | 18 +- arch/arm/mach-sunxi/dram_sun50i_h616.c| 215 -- arch/arm/mach-sunxi/dram_timings/Makefile | 4 +- .../arm/mach-sunxi/dram_timings/h616_lpddr3.c | 95 configs/orangepi_zero2_defconfig | 1 + configs/x96_mate_defconfig| 1 + 7 files changed, 266 insertions(+), 69 deletions(-) create mode 100644 arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c -- 2.40.1
Re: [PATCH 21/30] imx: bootaux: change names of MACROs used to boot MCU on iMX devices
On 6/3/23 09:32, Peng Fan wrote: On 6/2/2023 2:34 PM, Marek Vasut wrote: Caution: This is an external email. Please take care when clicking links or opening attachments. When in doubt, report the message using the 'Report this email' button On 6/2/23 08:45, Peng Fan (OSS) wrote: From: Peng Fan i.MX8MN/P has Cortex-M7, i.MX93 has Cortex-M33, so use "M4" is a bit misleading, so update the name of the macro Signed-off-by: faqiang.zhu Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-imx8m/imx-regs.h | 2 +- arch/arm/include/asm/arch-mx6/imx-regs.h | 2 +- arch/arm/include/asm/arch-mx7/imx-regs.h | 2 +- arch/arm/mach-imx/imx9/imx_bootaux.c | 6 +++--- arch/arm/mach-imx/imx_bootaux.c | 24 +++--- board/kontron/sl-mx8mm/sl-mx8mm.c | 2 +- board/kontron/sl-mx8mm/spl.c | 2 +- board/technexion/pico-imx8mq/pico-imx8mq.c | 2 +- board/technexion/pico-imx8mq/spl.c | 2 +- include/imx_sip.h | 6 +++--- I haven't had my coffee yet, so please pardon my ignorance, but which of the boards that are being patched in this patch are iMX8MN/MP ? I mean to use a generic name _MCU_ for i.MX8M* and i.MX93. i.MX8MQ/M has M4 i.MX8MN/P has M7 i.MX93 has M33. So the macro name _M4_ would be a bit misleading. In that case: ' Use "_MCU_" in place of both "_M4_" (i.MX8M/MQ which uses CortexM4) and "_M7_" (i.MX8MN/MP/93 which uses CortexM7) to simplify the naming. ' Something like this would be clearer for the commit message. Adjust/expand/... as you wish.
Re: [RFC PATCH 08/17] sunxi: introduce NCAT2 generation model
Hi again Andre, On 12/5/22 17:45, Andre Przywara wrote: diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index b6ffbff883c..3763ec3d2e4 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -177,7 +177,7 @@ static int gpio_init(void) #error Unsupported console port number. Please fix pin mux settings in board.c #endif -#ifdef CONFIG_SUN50I_GEN_H6 +#if defined(CONFIG_SUN50I_GEN_H6) || defined(CONFIG_SUNXI_GEN_NCAT2) /* Update PIO power bias configuration by copy hardware detected value */ val = readl(SUNXI_PIO_BASE + SUN50I_H6_GPIO_POW_MOD_VAL); writel(val, SUNXI_PIO_BASE + SUN50I_H6_GPIO_POW_MOD_SEL); @@ -475,7 +475,7 @@ void reset_cpu(void) /* sun5i sometimes gets stuck without this */ writel(WDT_MODE_RESET_EN | WDT_MODE_EN, >mode); } -#elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6) +#elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6) || defined(CONFIG_SUNXI_GEN_NCAT2) #if defined(CONFIG_MACH_SUN50I_H6) /* WDOG is broken for some H6 rev. use the R_WDOG instead */ static const struct sunxi_wdog *wdog = It appears that the R528/T113s updated the watchdog slightly from H6 in that it now requires a key (0x16AA << 16) OR'd in all writes to WDOG_SOFT_RST_REG, WDOG_CFG_REG, and WDOG_MODE_REG, or it will ignore those writes. This reset code busywaits indefinitely unless I add that key. It looks like sunxi_wdt.c needs to be updated as well, but I don't know if that's in-scope for this patchset. Cheers, Sam
[PATCH v4 4/4] common: spl: Add spl NVMe boot support
Add support to load the next stage image from an NVMe disk which may
be formatted as an EXT or FAT filesystem. Also protect the call to
env_get in blk_get_device_part_str with CONFIG_SPL_ENV_SUPPORT macro to
avoid link error when SPL_ENV_SUPPORT is not enabled.
Signed-off-by: Mayuresh Chitale
---
arch/riscv/include/asm/spl.h | 1 +
common/spl/Makefile | 1 +
common/spl/spl_nvme.c| 32
disk/part.c | 10 ++
4 files changed, 40 insertions(+), 4 deletions(-)
create mode 100644 common/spl/spl_nvme.c
diff --git a/arch/riscv/include/asm/spl.h b/arch/riscv/include/asm/spl.h
index 2898a770ee..9c0bf9755c 100644
--- a/arch/riscv/include/asm/spl.h
+++ b/arch/riscv/include/asm/spl.h
@@ -20,6 +20,7 @@ enum {
BOOT_DEVICE_SPI,
BOOT_DEVICE_USB,
BOOT_DEVICE_SATA,
+ BOOT_DEVICE_NVME,
BOOT_DEVICE_I2C,
BOOT_DEVICE_BOARD,
BOOT_DEVICE_DFU,
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 5210ad0248..bad2bbf6cf 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_$(SPL_TPL_)USB_STORAGE) += spl_usb.o
obj-$(CONFIG_$(SPL_TPL_)FS_FAT) += spl_fat.o
obj-$(CONFIG_$(SPL_TPL_)FS_EXT4) += spl_ext.o
obj-$(CONFIG_$(SPL_TPL_)SATA) += spl_sata.o
+obj-$(CONFIG_$(SPL_TPL_)NVME) += spl_nvme.o
obj-$(CONFIG_$(SPL_TPL_)SEMIHOSTING) += spl_semihosting.o
obj-$(CONFIG_$(SPL_TPL_)DFU) += spl_dfu.o
obj-$(CONFIG_$(SPL_TPL_)SPI_LOAD) += spl_spi.o
diff --git a/common/spl/spl_nvme.c b/common/spl/spl_nvme.c
new file mode 100644
index 00..2af63f1dc8
--- /dev/null
+++ b/common/spl/spl_nvme.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023
+ * Ventana Micro Systems Inc.
+ *
+ */
+
+#include
+#include
+#include
+#include
+
+static int spl_nvme_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
+{
+ int ret;
+
+ ret = pci_init();
+ if (ret < 0)
+ return ret;
+
+ ret = nvme_scan_namespace();
+ if (ret < 0)
+ return ret;
+
+ ret = spl_blk_load_image(spl_image, bootdev, UCLASS_NVME,
+CONFIG_SPL_NVME_BOOT_DEVICE,
+CONFIG_SYS_NVME_BOOT_PARTITION);
+ return ret;
+}
+
+SPL_LOAD_IMAGE_METHOD("NVME", 0, BOOT_DEVICE_NVME, spl_nvme_load_image);
diff --git a/disk/part.c b/disk/part.c
index 35300df590..d330c57ab4 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -467,10 +467,12 @@ int blk_get_device_part_str(const char *ifname, const
char *dev_part_str,
}
#endif
- /* If no dev_part_str, use bootdevice environment variable */
- if (!dev_part_str || !strlen(dev_part_str) ||
- !strcmp(dev_part_str, "-"))
- dev_part_str = env_get("bootdevice");
+ if (IS_ENABLED(CONFIG_SPL_ENV_SUPPORT)) {
+ /* If no dev_part_str, use bootdevice environment variable */
+ if (!dev_part_str || !strlen(dev_part_str) ||
+ !strcmp(dev_part_str, "-"))
+ dev_part_str = env_get("bootdevice");
+ }
/* If still no dev_part_str, it's an error */
if (!dev_part_str) {
--
2.34.1
[PATCH v4 3/4] nvme: pci: Enable for SPL
Enable NVME and PCI NVMe drivers for SPL builds. Also enable PCI_PNP for SPL which is required to auto configure the PCIe devices. Signed-off-by: Mayuresh Chitale --- drivers/Makefile | 1 + drivers/nvme/Makefile | 2 +- drivers/pci/Kconfig | 6 ++ 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/Makefile b/drivers/Makefile index 58be410135..dc559ea7f7 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -34,6 +34,7 @@ obj-$(CONFIG_$(SPL_)DM_MAILBOX) += mailbox/ obj-$(CONFIG_$(SPL_)REMOTEPROC) += remoteproc/ obj-$(CONFIG_$(SPL_)SYSINFO) += sysinfo/ obj-$(CONFIG_$(SPL_TPL_)TPM) += tpm/ +obj-$(CONFIG_$(SPL_)NVME) += nvme/ obj-$(CONFIG_XEN) += xen/ obj-$(CONFIG_$(SPL_)FPGA) += fpga/ obj-y += bus/ diff --git a/drivers/nvme/Makefile b/drivers/nvme/Makefile index fa7b619446..fd3e68a91d 100644 --- a/drivers/nvme/Makefile +++ b/drivers/nvme/Makefile @@ -4,4 +4,4 @@ obj-y += nvme-uclass.o nvme.o nvme_show.o obj-$(CONFIG_NVME_APPLE) += nvme_apple.o -obj-$(CONFIG_NVME_PCI) += nvme_pci.o +obj-$(CONFIG_$(SPL_)NVME_PCI) += nvme_pci.o diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index ef328d2652..dca71ef504 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -40,6 +40,12 @@ config PCI_PNP help Enable PCI memory and I/O space resource allocation and assignment. +config SPL_PCI_PNP + bool "Enable Plug & Play support for PCI" + help + Enable PCI memory and I/O space resource allocation and assignment. + This is required to auto configure the enumerated devices. + config PCI_REGION_MULTI_ENTRY bool "Enable Multiple entries of region type MEMORY in ranges for PCI" help -- 2.34.1
[PATCH v4 2/4] spl: blk: Support loading images from fs
Add a generic API to support loading of SPL payload from any supported
filesystem on a given partition of a block device.
Signed-off-by: Mayuresh Chitale
---
common/spl/Kconfig | 1 +
common/spl/Makefile | 1 +
common/spl/spl_blk_fs.c | 134
drivers/block/Kconfig | 7 +++
include/spl.h | 3 +
5 files changed, 146 insertions(+)
create mode 100644 common/spl/spl_blk_fs.c
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 94b13f7a7f..3f705f4fb8 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -1268,6 +1268,7 @@ config SPL_NVME
depends on BLK
select HAVE_BLOCK_DEVICE
select FS_LOADER
+ select SPL_BLK_FS
help
This option enables support for NVM Express devices.
It supports basic functions of NVMe (read/write).
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 13db3df993..5210ad0248 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -10,6 +10,7 @@ ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_$(SPL_TPL_)FRAMEWORK) += spl.o
obj-$(CONFIG_$(SPL_TPL_)BOOTROM_SUPPORT) += spl_bootrom.o
obj-$(CONFIG_$(SPL_TPL_)LOAD_FIT) += spl_fit.o
+obj-$(CONFIG_$(SPL_TPL_)BLK_FS) += spl_blk_fs.o
obj-$(CONFIG_$(SPL_TPL_)LEGACY_IMAGE_FORMAT) += spl_legacy.o
obj-$(CONFIG_$(SPL_TPL_)NOR_SUPPORT) += spl_nor.o
obj-$(CONFIG_$(SPL_TPL_)XIP_SUPPORT) += spl_xip.o
diff --git a/common/spl/spl_blk_fs.c b/common/spl/spl_blk_fs.c
new file mode 100644
index 00..d97adc4d39
--- /dev/null
+++ b/common/spl/spl_blk_fs.c
@@ -0,0 +1,134 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023
+ * Ventana Micro Systems Inc.
+ *
+ */
+
+#include
+#include
+#include
+#include
+
+struct blk_dev {
+ const char *ifname;
+ char dev_part_str[8];
+};
+
+static ulong spl_fit_read(struct spl_load_info *load, ulong file_offset,
+ ulong size, void *buf)
+{
+ loff_t actlen;
+ int ret;
+ struct blk_dev *dev = (struct blk_dev *)load->priv;
+
+ ret = fs_set_blk_dev(dev->ifname, dev->dev_part_str, FS_TYPE_ANY);
+ if (ret) {
+ printf("spl: unable to set blk_dev %s %s. Err - %d\n",
+ dev->ifname, dev->dev_part_str, ret);
+ return ret;
+ }
+
+ ret = fs_read(load->filename, (ulong)buf, file_offset, size, );
+ if (ret < 0) {
+ printf("spl: error reading image %s. Err - %d\n",
+ load->filename, ret);
+ return ret;
+ }
+
+ return actlen;
+}
+
+int spl_blk_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev,
+ enum uclass_id uclass_id, int devnum, int partnum)
+{
+ const char *filename = CONFIG_SPL_PAYLOAD;
+ struct disk_partition part_info = {};
+ struct legacy_img_hdr *header;
+ struct blk_desc *blk_desc;
+ loff_t actlen, filesize;
+ struct blk_dev dev;
+ int ret;
+
+ blk_desc = blk_get_devnum_by_uclass_id(uclass_id, devnum);
+ if (!blk_desc) {
+ printf("blk desc for %d %d not found\n", uclass_id, devnum);
+ goto out;
+ }
+
+ blk_show_device(uclass_id, devnum);
+ header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
+ ret = part_get_info(blk_desc, 1, _info);
+ if (ret) {
+ printf("spl: no partition table found. Err - %d\n", ret);
+ goto out;
+ }
+
+ dev.ifname = blk_get_uclass_name(uclass_id);
+ snprintf(dev.dev_part_str, sizeof(dev.dev_part_str) - 1, "%d:%d",
+devnum, partnum);
+ ret = fs_set_blk_dev(dev.ifname, dev.dev_part_str, FS_TYPE_ANY);
+ if (ret) {
+ printf("spl: unable to set blk_dev %s %s. Err - %d\n",
+ dev.ifname, dev.dev_part_str, ret);
+ goto out;
+ }
+
+ ret = fs_read(filename, (ulong)header, 0,
+ sizeof(struct legacy_img_hdr), );
+ if (ret) {
+ printf("spl: unable to read file %s. Err - %d\n", filename,
+ ret);
+ goto out;
+ }
+
+ if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
+ image_get_magic(header) == FDT_MAGIC) {
+ struct spl_load_info load;
+
+ debug("Found FIT\n");
+ load.read = spl_fit_read;
+ load.bl_len = 1;
+ load.filename = (void *)filename;
+ load.priv =
+
+ return spl_load_simple_fit(spl_image, , 0, header);
+ }
+
+ ret = spl_parse_image_header(spl_image, bootdev, header);
+ if (ret) {
+ printf("spl: unable to parse image header. Err - %d\n",
+ ret);
+ goto out;
+ }
+
+ ret = fs_set_blk_dev(dev.ifname, dev.dev_part_str, FS_TYPE_ANY);
+ if (ret) {
+ printf("spl:
[PATCH v4 1/4] spl: Add Kconfig options for NVME
Add kconfig options to enable NVME and PCI NVMe support in SPL Signed-off-by: Mayuresh Chitale Reviewed-by: Simon Glass --- common/spl/Kconfig | 26 ++ 1 file changed, 26 insertions(+) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 2c042ad306..94b13f7a7f 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1263,6 +1263,32 @@ config SPL_SATA_RAW_U_BOOT_SECTOR Sector on the SATA disk to load U-Boot from, when the SATA disk is being used in raw mode. Units: SATA disk sectors (1 sector = 512 bytes). +config SPL_NVME + bool "NVM Express device support" + depends on BLK + select HAVE_BLOCK_DEVICE + select FS_LOADER + help + This option enables support for NVM Express devices. + It supports basic functions of NVMe (read/write). + +config SPL_NVME_PCI + bool "NVM Express PCI device support for SPL" + depends on SPL_PCI && SPL_NVME + help + This option enables support for NVM Express PCI devices. + This allows use of NVMe devices for loading u-boot. + +config SPL_NVME_BOOT_DEVICE + hex "NVMe boot device number" + depends on SPL_NVME + default 0x0 + +config SYS_NVME_BOOT_PARTITION + hex "NVMe boot partition number" + depends on SPL_NVME + default 0x1 + config SPL_SERIAL bool "Support serial" select SPL_PRINTF -- 2.34.1
[PATCH v4 0/4] SPL NVMe support
This patchset adds support to load images of the SPL's next booting stage from a NVMe device. Changes in v4: - Drop patch 4 - Modify patch 2 to use generic fs.h APIs Changes in v3: - Add generic API to fetch payload from Ext or FAT filesystems - Remove reduntant SPL_PCI_PNP config check Changes in v2: - Rebase on v2023.07-rc1 - Use uclass ID for blk APIs - Add support to load FIT images from ext filesystem Mayuresh Chitale (5): spl: Add Kconfig options for NVME spl: blk: Support loading images from fs nvme: pci: Enable for SPL spl: Support loading a FIT from ext FS common: spl: Add spl NVMe boot support Mayuresh Chitale (4): spl: Add Kconfig options for NVME spl: blk: Support loading images from fs nvme: pci: Enable for SPL common: spl: Add spl NVMe boot support arch/riscv/include/asm/spl.h | 1 + common/spl/Kconfig | 27 +++ common/spl/Makefile | 2 + common/spl/spl_blk_fs.c | 134 +++ common/spl/spl_nvme.c| 32 + disk/part.c | 10 +-- drivers/Makefile | 1 + drivers/block/Kconfig| 7 ++ drivers/nvme/Makefile| 2 +- drivers/pci/Kconfig | 6 ++ include/spl.h| 3 + 11 files changed, 220 insertions(+), 5 deletions(-) create mode 100644 common/spl/spl_blk_fs.c create mode 100644 common/spl/spl_nvme.c -- 2.34.1
[PATCH] configs: am64x_evm_*_defconfig: Enable High Secure device support
Enable CONFIG_TI_SECURE_DEVICE to support booting High Secure(HS) variants of AM64x SoC. Signed-off-by: Vignesh Raghavendra --- configs/am64x_evm_a53_defconfig | 1 + configs/am64x_evm_r5_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index 4589624e96..09037ecd0f 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_LEN=0x200 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_GPIO=y diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig index 023ee638a0..d824298773 100644 --- a/configs/am64x_evm_r5_defconfig +++ b/configs/am64x_evm_r5_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_LEN=0x200 CONFIG_SYS_MALLOC_F_LEN=0x8 CONFIG_SPL_GPIO=y -- 2.40.1
Re: [PATCH v3 4/5] spl: Support loading a FIT from ext FS
On Wed, May 17, 2023 at 8:11 PM Tom Rini wrote:
>
> On Thu, May 04, 2023 at 03:23:26PM +0530, Mayuresh Chitale wrote:
>
> > Detect a FIT when loading from an ext File system and handle it using
> > the FIT SPL support.
> >
> > Signed-off-by: Mayuresh Chitale
> > ---
> > common/spl/spl_ext.c | 33 +
> > 1 file changed, 33 insertions(+)
> >
> > diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c
> > index f117c630bf..7b771c41e9 100644
> > --- a/common/spl/spl_ext.c
> > +++ b/common/spl/spl_ext.c
> > @@ -8,6 +8,26 @@
> > #include
> > #include
> > #include
> > +#include
> > +
> > +static ulong spl_fit_read(struct spl_load_info *load, ulong file_offset,
> > + ulong size, void *buf)
> > +{
> > + loff_t filelen = (loff_t)load->priv, actlen;
> > + char *filename = (char *)load->filename;
>
> Please build on 32bit platforms such as j721e_evm_r5 as well:
> +common/spl/spl_ext.c:16:26: error: cast from pointer to integer of different
> size [-Werror=pointer-to-int-cast]
> + 16 | loff_t filelen = (loff_t)load->priv, actlen;
Ok.
>
> --
> Tom
Re: [PATCH v3 4/5] spl: Support loading a FIT from ext FS
On Fri, May 5, 2023 at 6:11 AM Simon Glass wrote:
>
> Hi Mayuresh,
>
> On Thu, 4 May 2023 at 03:53, Mayuresh Chitale
> wrote:
> >
> > Detect a FIT when loading from an ext File system and handle it using
> > the FIT SPL support.
> >
> > Signed-off-by: Mayuresh Chitale
> > ---
> > common/spl/spl_ext.c | 33 +
> > 1 file changed, 33 insertions(+)
> >
> > diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c
> > index f117c630bf..7b771c41e9 100644
> > --- a/common/spl/spl_ext.c
> > +++ b/common/spl/spl_ext.c
> > @@ -8,6 +8,26 @@
> > #include
> > #include
> > #include
> > +#include
> > +
> > +static ulong spl_fit_read(struct spl_load_info *load, ulong file_offset,
> > + ulong size, void *buf)
> > +{
> > + loff_t filelen = (loff_t)load->priv, actlen;
> > + char *filename = (char *)load->filename;
> > + int ret;
> > +
> > + ret = ext4fs_read(buf, file_offset, filelen, );
>
> If you use the fs_...() interface instead, can you make this function
> generic for all filesystems?
Ok.
>
> > + if (ret < 0) {
> > + if (IS_ENABLED(CONFIG_SPL_LIBCOMMON_SUPPORT)) {
> > + printf("%s: error reading image %s, err - %d\n",
> > + __func__, filename, ret);
>
> I could be wrong, but I think printf() is silently dropped if that
> option is not enabled, so maybe you don't need the if() checK?
>
> > + }
> > + return ret;
> > + }
> > +
> > + return actlen;
> > +}
> >
> > int spl_load_image_ext(struct spl_image_info *spl_image,
> >struct spl_boot_device *bootdev,
> > @@ -47,6 +67,19 @@ int spl_load_image_ext(struct spl_image_info *spl_image,
>
> Really this should not be different from FAT and other filesystems.
> I'm not sure what is involved in making it common, though.
Yes, it can be made generic.
>
> > goto end;
> > }
> >
> > + if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
> > + image_get_magic(header) == FDT_MAGIC) {
> > + struct spl_load_info load;
> > +
> > + debug("Found FIT\n");
> > + load.read = spl_fit_read;
> > + load.bl_len = 1;
> > + load.filename = (void *)filename;
> > + load.priv = (void *)filelen;
> > +
> > + return spl_load_simple_fit(spl_image, , 0, header);
> > + }
> > +
> > err = spl_parse_image_header(spl_image, bootdev, header);
> > if (err < 0) {
> > puts("spl: ext: failed to parse image header\n");
> > --
> > 2.34.1
> >
>
> Regards,
> Simon
Re: [PATCH v3 3/5] nvme: pci: Enable for SPL
On Fri, May 5, 2023 at 6:11 AM Simon Glass wrote: > > On Thu, 4 May 2023 at 03:53, Mayuresh Chitale > wrote: > > > > Enable NVME and PCI NVMe drivers for SPL builds. Also enable PCI_PNP > > for SPL which is required to auto configure the PCIe devices. > > > > Signed-off-by: Mayuresh Chitale > > --- > > drivers/Makefile | 1 + > > drivers/nvme/Makefile | 2 +- > > drivers/pci/Kconfig | 7 +++ > > 3 files changed, 9 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/Makefile b/drivers/Makefile > > index 58be410135..dc559ea7f7 100644 > > --- a/drivers/Makefile > > +++ b/drivers/Makefile > > @@ -34,6 +34,7 @@ obj-$(CONFIG_$(SPL_)DM_MAILBOX) += mailbox/ > > obj-$(CONFIG_$(SPL_)REMOTEPROC) += remoteproc/ > > obj-$(CONFIG_$(SPL_)SYSINFO) += sysinfo/ > > obj-$(CONFIG_$(SPL_TPL_)TPM) += tpm/ > > +obj-$(CONFIG_$(SPL_)NVME) += nvme/ > > obj-$(CONFIG_XEN) += xen/ > > obj-$(CONFIG_$(SPL_)FPGA) += fpga/ > > obj-y += bus/ > > diff --git a/drivers/nvme/Makefile b/drivers/nvme/Makefile > > index fa7b619446..fd3e68a91d 100644 > > --- a/drivers/nvme/Makefile > > +++ b/drivers/nvme/Makefile > > @@ -4,4 +4,4 @@ > > > > obj-y += nvme-uclass.o nvme.o nvme_show.o > > obj-$(CONFIG_NVME_APPLE) += nvme_apple.o > > -obj-$(CONFIG_NVME_PCI) += nvme_pci.o > > +obj-$(CONFIG_$(SPL_)NVME_PCI) += nvme_pci.o > > diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig > > index ef328d2652..ecab6ddc7e 100644 > > --- a/drivers/pci/Kconfig > > +++ b/drivers/pci/Kconfig > > @@ -40,6 +40,13 @@ config PCI_PNP > > help > > Enable PCI memory and I/O space resource allocation and > > assignment. > > > > +config SPL_PCI_PNP > > + bool "Enable Plug & Play support for PCI" > > + default n > > Drop that as the default is n and it confuses people into thinking the > default is y Ok. > > > + help > > + Enable PCI memory and I/O space resource allocation and > > assignment. > > + This is required to auto configure the enumerated devices. > > + > > config PCI_REGION_MULTI_ENTRY > > bool "Enable Multiple entries of region type MEMORY in ranges for > > PCI" > > help > > -- > > 2.34.1 > > > > Regards, > Simon
Re: [PATCH v3 2/5] spl: blk: Support loading images from fs
Hi Simon,
On Fri, May 5, 2023 at 6:11 AM Simon Glass wrote:
>
> Hi Mayuresh,
>
> On Thu, 4 May 2023 at 03:53, Mayuresh Chitale
> wrote:
> >
> > Add a generic API to support loading of SPL payload from EXT or FAT
> > filesystem on a given partition of a block device.
> >
> > Signed-off-by: Mayuresh Chitale
> > ---
> > common/spl/Makefile | 1 +
> > common/spl/spl_blk_fs.c | 54 +
> > drivers/block/Kconfig | 7 ++
> > include/spl.h | 3 +++
> > 4 files changed, 65 insertions(+)
> > create mode 100644 common/spl/spl_blk_fs.c
> >
> > diff --git a/common/spl/Makefile b/common/spl/Makefile
> > index 13db3df993..5210ad0248 100644
> > --- a/common/spl/Makefile
> > +++ b/common/spl/Makefile
> > @@ -10,6 +10,7 @@ ifdef CONFIG_SPL_BUILD
> > obj-$(CONFIG_$(SPL_TPL_)FRAMEWORK) += spl.o
> > obj-$(CONFIG_$(SPL_TPL_)BOOTROM_SUPPORT) += spl_bootrom.o
> > obj-$(CONFIG_$(SPL_TPL_)LOAD_FIT) += spl_fit.o
> > +obj-$(CONFIG_$(SPL_TPL_)BLK_FS) += spl_blk_fs.o
> > obj-$(CONFIG_$(SPL_TPL_)LEGACY_IMAGE_FORMAT) += spl_legacy.o
> > obj-$(CONFIG_$(SPL_TPL_)NOR_SUPPORT) += spl_nor.o
> > obj-$(CONFIG_$(SPL_TPL_)XIP_SUPPORT) += spl_xip.o
> > diff --git a/common/spl/spl_blk_fs.c b/common/spl/spl_blk_fs.c
> > new file mode 100644
> > index 00..fb2e8bbea7
> > --- /dev/null
> > +++ b/common/spl/spl_blk_fs.c
> > @@ -0,0 +1,54 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (C) 2023
> > + * Ventana Micro Systems Inc.
> > + *
> > + * Derived work from spl_sata.c
> > + */
> > +
> > +#include
> > +#include
> > +
> > +int spl_blk_load_image(struct spl_image_info *spl_image,
> > + struct spl_boot_device *bootdev,
> > + enum uclass_id uclass_id, int devnum)
> > +{
> > + int ret = -ENOSYS, part;
> > + struct blk_desc *blk_desc;
> > +
> > + blk_desc = blk_get_devnum_by_uclass_id(uclass_id, devnum);
> > + if (!blk_desc)
> > + return ret;
> > +
> > + blk_show_device(uclass_id, devnum);
> > +
> > + if (IS_ENABLED(CONFIG_SPL_FS_EXT4)) {
>
> Can you use the fs.h layer so it can work with any FS?
Ok
>
>
> > + switch (uclass_id) {
> > + case UCLASS_NVME:
> > + part = CONFIG_SYS_NVME_EXT_BOOT_PARTITION;
> > + break;
> > + default:
> > + return ret;
> > + }
> > + ret = spl_load_image_ext(spl_image, bootdev, blk_desc, part,
> > +CONFIG_SPL_PAYLOAD);
> > + if (!ret)
> > + return ret;
> > + }
> > +
> > + if (IS_ENABLED(CONFIG_SPL_FS_FAT)) {
> > + switch (uclass_id) {
> > + case UCLASS_NVME:
> > + part = CONFIG_SYS_NVME_FAT_BOOT_PARTITION;
> > + break;
> > + default:
> > + return ret;
> > + }
> > + ret = spl_load_image_fat(spl_image, bootdev, blk_desc, part,
> > +CONFIG_SPL_PAYLOAD);
> > + if (!ret)
> > + return ret;
> > + }
> > +
> > + return ret;
> > +}
> > diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
> > index 5a1aeb3d2b..6baaa6f071 100644
> > --- a/drivers/block/Kconfig
> > +++ b/drivers/block/Kconfig
> > @@ -107,6 +107,13 @@ config EFI_MEDIA
> >
> > For sandbox there is a test driver.
> >
> > +config SPL_BLK_FS
> > + bool "Load images from filesystems on block devices"
> > + depends on SPL_BLK
> > + help
> > + Use generic support to load images from fat/ext filesystems on
> > + different types of block devices such as NVMe.
> > +
> > if EFI_MEDIA
> >
> > config EFI_MEDIA_SANDBOX
> > diff --git a/include/spl.h b/include/spl.h
> > index 7e0f5ac63b..4546648394 100644
> > --- a/include/spl.h
> > +++ b/include/spl.h
> > @@ -672,6 +672,9 @@ int spl_load_image_ext(struct spl_image_info *spl_image,
> > int spl_load_image_ext_os(struct spl_image_info *spl_image,
> > struct spl_boot_device *bootdev,
> > struct blk_desc *block_dev, int partition);
> > +int spl_blk_load_image(struct spl_image_info *spl_image,
> > + struct spl_boot_device *bootdev,
> > + enum uclass_id uclass_id, int devnum);
> >
> > /**
> > * spl_early_init() - Set up device tree and driver model in SPL if enabled
> > --
> > 2.34.1
> >
>
> Regards,
> Simon
Re: [PATCH 2/2] board: fsl: lx2160ardb: add dts fixup function for RevC and newer
On 5/31/2023 11:02 PM, Ioana Ciornei wrote: From: Florin Chiculita Since the new RevC LX2160A-RDB board has its 10G Aquantia PHYs at different MDIO bus addresses, we must update both the kernel DTS and u-boot's DTS (in case of DM_ETH) in case the board is indeed RevC or newer. Use the newly introduced get_board_rev() function to trigger a fixup of the kernel DTS to properly match the actual PHY addresses. All this is encapsulated in the fdt_fixup_board_phy_revc() function which will be used in the next patch. Use the newly fdt_fixup_board_phy_revc() function introduced to update both kernel's DTS and u-boot's DTS. Signed-off-by: Florin Chiculita Signed-off-by: Ioana Ciornei Reviewed-by: Peng Fan
Re: [PATCH 1/2] board: fsl: lx2160ardb: add api for obtaining board revision
On 5/31/2023 11:02 PM, Ioana Ciornei wrote: From: Florin Chiculita Add new API for obtaining board revision and trigger the i2c node fixup with this new API. Signed-off-by: Florin Chiculita Signed-off-by: Ioana Ciornei Reviewed-by: Peng Fan
Re: [PATCH 21/30] imx: bootaux: change names of MACROs used to boot MCU on iMX devices
On 6/2/2023 2:34 PM, Marek Vasut wrote: Caution: This is an external email. Please take care when clicking links or opening attachments. When in doubt, report the message using the 'Report this email' button On 6/2/23 08:45, Peng Fan (OSS) wrote: From: Peng Fan i.MX8MN/P has Cortex-M7, i.MX93 has Cortex-M33, so use "M4" is a bit misleading, so update the name of the macro Signed-off-by: faqiang.zhu Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-imx8m/imx-regs.h | 2 +- arch/arm/include/asm/arch-mx6/imx-regs.h | 2 +- arch/arm/include/asm/arch-mx7/imx-regs.h | 2 +- arch/arm/mach-imx/imx9/imx_bootaux.c | 6 +++--- arch/arm/mach-imx/imx_bootaux.c | 24 +++--- board/kontron/sl-mx8mm/sl-mx8mm.c | 2 +- board/kontron/sl-mx8mm/spl.c | 2 +- board/technexion/pico-imx8mq/pico-imx8mq.c | 2 +- board/technexion/pico-imx8mq/spl.c | 2 +- include/imx_sip.h | 6 +++--- I haven't had my coffee yet, so please pardon my ignorance, but which of the boards that are being patched in this patch are iMX8MN/MP ? I mean to use a generic name _MCU_ for i.MX8M* and i.MX93. i.MX8MQ/M has M4 i.MX8MN/P has M7 i.MX93 has M33. So the macro name _M4_ would be a bit misleading. Thanks, Peng.
Re: [SPAM] Re: [PATCH v5 0/2] arm: dts: rockchip: rk3399: usb: ehci: Fix EHCI probe in rk3399 to access peripherals by USB 2.
El Fri, Jun 02, 2023 at 03:34:37PM +0530, Jagan Teki deia: > On Fri, Jun 2, 2023 at 2:54 PM Xavier Drudis Ferran wrote: > > > > Should I try again with the current next branch and send v6 ? > > Please send. > > Thanks, > Jagan. I will try asap, thanks.
