On Wed, Jan 31, 2024 at 05:43:49PM +0200, Eugen Hristev wrote:
> Hello Tom,
>
> Please pull tag u-boot-at91-2024.04-a , the first set of at91 features
> for 2024.04 cycle.
>
> This set includes some DT alignments and solves a compile issue for custom
> nand
> defconfigs.
>
> Thanks,
> Eugen
>
Add a minimal generic RK3588S/RK3588 board that only have eMMC and SDMMC
enabled. This defconfig can be used to boot from eMMC or SD-card on most
RK3588S/RK3588 boards that follow reference board design.
Also fix the alphabetical order of RK3588 boards listed in Makefile and
documentation.
On Mon, Jan 29, 2024 at 10:04:50PM +0100, Heinrich Schuchardt wrote:
> The string section of the different SMBIOS structures is always terminated
> by two NUL bytes even if there is no string at all. This is described in
> section 6.1.3 "Text string" of the SMBIOS 3.7.0 specification.
>
>
On Tue, Jan 30, 2024 at 3:16 AM Masahiro Yamada wrote:
>
> On Fri, Jan 26, 2024 at 1:04 AM Simon Glass wrote:
> >
> > Hi,
> >
> > On Wed, 17 Jan 2024 at 06:14, Simon Glass wrote:
> > >
> > > Hi Masahiro, Tom,
> > >
> > > On Tue, 9 Jan 2024 at 07:33, Tom Rini wrote:
> > > >
> > > > On Tue, Jan
Hi Kever,
On 1/29/24 11:35, Kever Yang wrote:
Hi Quentin,
On 2024/1/27 00:18, Quentin Schulz wrote:
Hi Kever,
On 1/26/24 11:56, Kever Yang wrote:
Hi Quentin,
On 2024/1/26 17:32, Quentin Schulz wrote:
Hi Kever,
On 1/26/24 09:58, Kever Yang wrote:
Hi Quentin,
On 2024/1/24 19:04, Quentin
On 31.01.24 18:15, Matthias Brugger wrote:
On Mon, Jan 29, 2024 at 10:04:50PM +0100, Heinrich Schuchardt wrote:
The string section of the different SMBIOS structures is always terminated
by two NUL bytes even if there is no string at all. This is described in
section 6.1.3 "Text string" of the
Writing to eMMC using HS200 mode work more reliably then other modes on
RK356x boards.
Add device tree props and enable Kconfig options for eMMC HS200 mode on
the generic RK3566/RK3568 board. Also enable the pinctrl driver in SPL
and add missing rk3568-generic.dtb to Makefile.
Signed-off-by:
Hi Tom,
Here come a small set of patches for v2024.04 for the RaspberryPi.
It adds basic support for RPi5 to be able to boot on a SD card.
You can find the passing tests here:
https://source.denx.de/u-boot/custodians/u-boot-raspberrypi/-/pipelines/19512
It's the same commit ID as the tag,
On Wed, Jan 31, 2024 at 02:14:25PM +, Weizhao Ouyang wrote:
> Fix a SMCCC TRNG null pointer crash due to a failed smccc feature
> binding.
>
> Fixes: 53355bb86c25 ("drivers: rng: add smccc trng driver")
> Reviewed-by: Heinrich Schuchardt
> Signed-off-by: Weizhao Ouyang
Reviewed-by:
From: Joao Paulo Goncalves
Add new product id 0086 Verdin iMX8M Mini DualLite 2GB IT.
Signed-off-by: Joao Paulo Goncalves
---
Hello,
The change was based on u-boot-imx/master-next because of [1].
[1]
https://lore.kernel.org/u-boot/20240122200930.673447-1-jpaulo.silvagoncal...@gmail.com/
On Wed, Jan 31, 2024 at 02:14:26PM +, Weizhao Ouyang wrote:
> The 'rng list' command probes all RNG devices and list those devices
> that are successfully probed. Also update the help info.
>
> Reviewed-by: Heinrich Schuchardt
> Signed-off-by: Weizhao Ouyang
Reviewed-by: Matthias Brugger
On 4/7/21 18:14, Simon Glass wrote:
Hi Matthias,
On Tue, 6 Apr 2021 at 21:04, wrote:
From: Matthias Brugger
When no string is present in a table, next_ptr points to the same
location as eos. When calculating the string table length, we would only
reserve one \0. By spec a SMBIOS table has
On 2024/2/1 01:55, Quentin Schulz wrote:
Hi Kever,
On 1/29/24 11:35, Kever Yang wrote:
Hi Quentin,
On 2024/1/27 00:18, Quentin Schulz wrote:
Hi Kever,
On 1/26/24 11:56, Kever Yang wrote:
Hi Quentin,
On 2024/1/26 17:32, Quentin Schulz wrote:
Hi Kever,
On 1/26/24 09:58, Kever Yang
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Quentin Schulz
The different macros use writel which is defined in asm/io.h, so let's
include the header so users of hardware.h do not need to include
asm/io.h as well.
While at it, remove asm/io.h includes wherever
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Quentin Schulz
It's one thing to have the register mapped via a well-defined struct but
it's another to be able to make use of it. For that to happen, one needs
to cast the physical address memory of the beginning of the register
address space
On 2024/1/24 11:25, Tim Lunn wrote:
Add support for ddr4 on rv1126. Timing detection files are imported
from downstream Rockchip BSP u-boot. Allow selecting ddr4 ram with
define CONFIG_RAM_ROCKCHIP_DDR4.
Signed-off-by: Tim Lunn
Reviewed-by: Kever Yang
Thanks,
- Kever
---
(no changes
On 2024/1/24 11:26, Tim Lunn wrote:
Sonoff iHost is gateway device designed to provide a Smart Home Hub,
it is based on Rockchip RV1126. There is also a version with 2GB RAM
based off the RV1109 dual core SoC however this works with the same
config as the RV1126 for uboot purposes.
Features:
On 2024/1/24 11:26, Tim Lunn wrote:
OPTEE gets loaded into a memory region overlapping with the ram disk.
Fix the ramdisk address so it doesn't overlap with the OPTEE memory
region.
Signed-off-by: Tim Lunn
Reviewed-by: Kever Yang
Thanks,
- Kever
---
(no changes since v1)
On 2024/1/24 11:26, Tim Lunn wrote:
rv1126 requires OPTEE as it provides pcsi support. Mainline Linux
kernel will fail to boot without this.
Select SPL_OPTEE_IMAGE when building FIT image. TEE must be provided
when building.
Signed-off-by: Tim Lunn
Reviewed-by: Kever Yang
Thanks,
- Kever
On 2024/1/24 11:25, Tim Lunn wrote:
RV1126 soc appears to have been missed with the conversion of
rockchip socs to standard boot.
Remove remnants of distro boot for rv1126 common and the one
existing board.
Signed-off-by: Tim Lunn
Link:
Hello Kever and Quentin,
On 2024-02-01 03:48, Kever Yang wrote:
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Quentin Schulz
Compared to the original misc_init_r from Rockchip mach code,
setup_iodomain() is added and rockchip_setup_macaddr() is not called.
It is assumed adding
Seems Quentin also sync rk3588 with v6.8-rc1 in his patch.
Hi Quentin,
Could you update your patchset base on this patch set ?
Thanks,
- Kever
On 2024/1/27 06:14, Jonas Karlman wrote:
Sync rk3588 device tree from linux v6.8-rc1.
Signed-off-by: Jonas Karlman
---
On 2024/1/27 06:14, Jonas Karlman wrote:
Add a default u-boot,spl-boot-order prop to rk3588s-u-boot.dtsi and
remove the prop from board u-boot.dtsi files using the default value.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
On 1/29/24 12:26 PM, Apurva Nandan wrote:
On 23/01/24 20:31, Andrew Davis wrote:
On 1/23/24 8:39 AM, Apurva Nandan wrote:
Hi Andrew,
On 20/01/24 00:43, Andrew Davis wrote:
On 1/19/24 11:50 AM, Apurva Nandan wrote:
From: Dasnavis Sabiya
Add config fragments for am69_sk A72 and R5
On 2024/1/18 15:19, Jonas Karlman wrote:
Enable the DM_ETH_PHY and PHY_REALTEK now that the designware ethernet
driver call eth_phy_set_mdio_bus() to assist with resetting the eth PHY
during probe.
Fixes ethernet on the v1.21 hw revision of Radxa ROCK Pi E:
=> mdio list
* In the smbios command show the orrect table size for SMBIOS 2.1
entry point.
* The SMBIOS 3 entry point has not field for the maximum structure
size. Avoid to determine it needlessly.
* Name Structure Table Maximum Size field in the SMBIOS 3 entry point
structure accordance to its meaning.
Only the SMBIOS 2.1 entry point has a field for the maximum structure size.
As we have switched to an SMBIOS 3 entry point remove the superfluous
calculation.
Signed-off-by: Heinrich Schuchardt
---
lib/smbios.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git
On Thu, Feb 1, 2024 at 7:03 AM Rob Herring wrote:
>
> On Tue, Jan 30, 2024 at 3:16 AM Masahiro Yamada wrote:
> >
> > On Fri, Jan 26, 2024 at 1:04 AM Simon Glass wrote:
> > >
> > > Hi,
> > >
> > > On Wed, 17 Jan 2024 at 06:14, Simon Glass wrote:
> > > >
> > > > Hi Masahiro, Tom,
> > > >
> > > >
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Quentin Schulz
The functions aren't used anywhere else than in board.c, therefore,
let's not expose them anymore at all.
This merges misc.c and board.c together and removes the functions from
the misc.h header file.
Cc: Quentin Schulz
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Quentin Schulz
There's only one user of rockchip_capsule_update_board_setup, which is
in board.c, and only one board defines it, so instead of having a header
only for one function symbol, let's just use a weak symbol instead.
Cc: Quentin
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Quentin Schulz
Only setup_boottargets differs from the original misc_init_r from
Rockchip mach code, so let's use rockchip_early_misc_init_r instead of
reimplementing the whole misc_init_r from Rockchip.
Cc: Quentin Schulz
Signed-off-by:
Include the clock and lpsc tree files needed for the wkup spl to
initialize the proper PLLs and power domains to boot the SoC.
Signed-off-by: Bryan Brattlof
---
arch/arm/mach-k3/r5/Makefile | 1 +
arch/arm/mach-k3/r5/am62px/Makefile| 6 +
arch/arm/mach-k3/r5/am62px/clk-data.c
Introduce the basic files needed to support the am62px family of SoCs
Co-developed-by: Hari Hagalla
Signed-off-by: Hari Hagalla
Signed-off-by: Bryan Brattlof
---
board/ti/am62px/Kconfig | 26 +
board/ti/am62px/MAINTAINERS | 9 +
board/ti/am62px/Makefile | 7 +
Introduce the basic functions and definitions needed to properly
initialize TI's am62p family of SoCs
Signed-off-by: Bryan Brattlof
---
arch/arm/mach-k3/Kconfig | 7 +-
arch/arm/mach-k3/am62p5_init.c| 280 ++
arch/arm/mach-k3/am62px/Kconfig
From: Vignesh Raghavendra
Add PSIL data for the AM62P and the J722S SoC family. The PSIL mapping
for the J722S is the same except for the extra instances of the CSI-RX.
So let's reuse the same file for both the AM62P and J722S.
Signed-off-by: Vignesh Raghavendra
Signed-off-by: Ravi Gunasekaran
From: Hari Nagalla
Include the static DMA channel data for ti_sci
Signed-off-by: Hari Nagalla
Signed-off-by: Bryan Brattlof
---
drivers/firmware/ti_sci_static_data.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/firmware/ti_sci_static_data.h
Some boards that choose to utilize the OF_UPSTREAM directory for their
device tree files will need to specify that directory instead of the
traditional arch/$(ARCH)/dts/* path.
Include the correct path to the board's dtbs depending on if OF_UPSTREAM
is selected or not.
Signed-off-by: Bryan
Currently, for the K3 generation of SoCs, there are more SoCs that
utilize the split firmware approach than the combined DMSC firmware.
Invert the logic to avoid adding more and more SoCs to this list.
Signed-off-by: Bryan Brattlof
---
arch/arm/mach-k3/Kconfig | 2 +-
1 file changed, 1
On 2024/1/18 15:19, Jonas Karlman wrote:
Some ethernet PHY require being reset before a phy-id can be read back
on the MDIO bus. This can result in the following message being show
on e.g. a Radxa ROCK Pi E v1.21 with a RTL8211F ethernet PHY.
Could not get PHY for ethernet@ff54: addr
Hi Jonas,
On 2024/2/1 06:08, Jonas Karlman wrote:
Add a minimal generic RK3588S/RK3588 board that only have eMMC and SDMMC
enabled. This defconfig can be used to boot from eMMC or SD-card on most
RK3588S/RK3588 boards that follow reference board design.
For rk3399, the evb-rk3399 is used as
The PMIC for the am62p5-sk is connected to the i2c bus on the wakeup
island. While we do not have a driver yet, enable it anyway so we can
begin development of the driver and characterization of the board.
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am62p5-sk.dts | 14 ++
1
Introduce the initial configs needed to support the am62px SoC family
Signed-off-by: Bryan Brattlof
---
configs/am62px_evm_a53_defconfig | 178 +++
configs/am62px_evm_r5_defconfig | 137
include/configs/am62px_evm.h | 14 +++
3 files
Introduce basic documentation for the am62p family of SoCs.
Signed-off-by: Bryan Brattlof
---
doc/board/ti/am62px_sk.rst | 289 +
doc/board/ti/k3.rst| 1 +
2 files changed, 290 insertions(+)
create mode 100644 doc/board/ti/am62px_sk.rst
diff --git
Hello Again Everyone!
**Note:** This series depends on the OF_UPSTREAM work from Sumit [0].
Patch #11 was added to fix some Makefile.spl targets to allow SPL builds
to complete with the OF_UPSTREAM series.
The AM62Px is an extension of the existing Sitara AM62x low-cost family
of application
Include the part number for TI's am62px family of SoCs so we can
properly identify it during boot
Signed-off-by: Bryan Brattlof
---
arch/arm/mach-k3/include/mach/hardware.h | 2 ++
drivers/soc/soc_ti_k3.c | 3 +++
2 files changed, 5 insertions(+)
diff --git
The am62px family of SoCs uses the same DDR controller as found on the
am62ax family. Enable this option when building for the am62px family
Signed-off-by: Bryan Brattlof
---
drivers/ram/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ram/Kconfig
Cleanup this list and standardize on using the IS_ENABLED macro for the
power domain data list.
Signed-off-by: Bryan Brattlof
---
drivers/power/domain/ti-power-domain.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/power/domain/ti-power-domain.c
On 2024/1/24 11:25, Tim Lunn wrote:
Sync linux dts files for rv1126 boards from linux v6.8-rc1 tag. Includes
the newly added dts for Sonoff iHost.
Signed-off-by: Tim Lunn
Reviewed-by: Kever Yang
Thanks,
- Kever
---
(no changes since v1)
arch/arm/dts/rv1126-edgeble-neu2-io.dts | 70
The SMBIOS table size for SMBIOS2.1 entry points is in field 'Structure
Table Length' (offset 0x16) and not in field 'Maximum Structure Size'
(offset 0x08).
Rename the receiving variable max_struct_size to table_maximum_size
to avoid future confusion.
Signed-off-by: Heinrich Schuchardt
---
In the SMBIOS 3 entry point the Structure Table Maximum Size field was
incorrectly named max_struct_size. A Maximum Structure Size field only
exists in the SMBIOS 2.1 entry point and has a different meaning.
Call the Structure Table Length field table_maximum_size.
Signed-off-by: Heinrich
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Quentin Schulz
JAGUAR is a Single-Board Computer (SBC) based around the rk3588 SoC and
is targeting Autonomous Mobile Robots (AMR).
It features:
* LPDDR4X (up to 16GB)
* 1Gbps Ethernet on RJ45 connector (KSZ9031 or KSZ9131)
* PCIe 3.0
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Heiko Stuebner
This brings the real host2_xhci node as well as the pmu1grf node and
spi0 to spi4 aliases from the next-20240110 Linux kernel. So also
adapt/remove the nodes and aliases in rk3588s-u-boot.dtsi
Signed-off-by: Heiko Stuebner
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Quentin Schulz
The expected length of the cpuid, as passed with cpuid_length,
determines the size of cpuid_str string. Therefore, care should be taken
to make sure nothing is accessing data out-of-bounds.
Instead of using hardcoded values,
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Heiko Stuebner
The compatible for the pmugrf in the mainline kernel is dfferent from the
one currently used in u-boot. Adapt the -u-boot.dtsi and syscon driver
to use the correct compatible.
Signed-off-by: Heiko Stuebner
Signed-off-by:
On 2024/1/27 06:14, Jonas Karlman wrote:
Sync rk356x device tree from linux v6.7.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3566-anbernic-rgxx3.dtsi | 42 +
arch/arm/dts/rk3566-quartz64-a.dts | 2 --
On 2024/1/27 06:14, Jonas Karlman wrote:
Sync rk356x device tree from linux v6.8-rc1.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3566-quartz64-a.dts | 5 +++--
arch/arm/dts/rk3566-radxa-cm3-io.dts | 1 +
Hi,
On 1/25/24 22:50, Jonas Karlman wrote:
+ pinctrl-0 = <_bus8 _clk _cmd _datastrobe>;
+};
Because this device tree is not yet in linux, hopefully correct props
can be applied to device tree and u-boot do not need any overrides.
I suppose this pinctrl override was copied from Odroid-M1
On 2024/1/20 19:36, Andy Yan wrote:
CoolPi 4B is a rk3588s based SBC.
Specification:
- Rockchip RK3588S
- LPDDR4 2/4/8/16 GB
- TF scard slot
- eMMC 8/32/64/128 GB module
- SPI Nor 8MB
- Gigabit ethernet drived by PCIE with RTL8111HS
- HDMI Type D out
- Mini DP out
- USB 2.0 Host x 2
- USB 3.0
On 2024/1/20 19:36, Andy Yan wrote:
Cool Pi CM5 EVB works as a mother board connect with CM5.
CM5 Specification:
- Rockchip RK3588
- LPDDR4 2/4/8/16 GB
- TF scard slot
- eMMC 8/32/64/128 GB module
- SPI Nor 8MB
- Gigabit ethernet x 1 with PHY YT8531
- Gigabit ethernet x 1 drived by PCIE with
On 2024/1/27 07:39, Jonas Karlman wrote:
Enable Kconfig options to support AHCI, PCI and USB features. This help
keep rk3588-quartzpro64 in sync with other RK3588 boards.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Please note that this has not been runtime
On 2024/1/27 06:14, Jonas Karlman wrote:
Move uart2 bootph-pre-ram and clock-frequency props from board to SoC
u-boot.dtsi. Regular board device tree already enables the uart2 node,
so status prop is dropped from u-boot.dtsi file.
Also remove unnecessary stdout-path = , regular board device
On 2024/1/27 07:26, Jonas Karlman wrote:
Writing to eMMC using DDR52 mode does not work reliably or at all on
RK356x and RK3588 boards.
Fix this by removing the mmc-ddr-1_8v prop from sdhci nodes.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
On 2024/1/27 07:26, Jonas Karlman wrote:
Writing to eMMC using HS200 mode work more reliably then other modes on
RK3588 boards.
Enable MMC_HS200_SUPPORT Kconfig option to prefer use of HS200 mode.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
On 2024/1/27 07:26, Jonas Karlman wrote:
Writing to eMMC using HS200 mode work more reliably then other modes on
RK356x boards.
Enable MMC_HS200_SUPPORT Kconfig option to prefer use of HS200 mode.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
On 2024/1/27 06:14, Jonas Karlman wrote:
Remove unnecessary status props from rk35xx u-boot.dtsi files, regular
device tree files or default value already enable the affected nodes.
Also reorder bootph-pre-ram and clock-frequency props alphabetically in
rk3588s-u-boot.dtsi uart2 node.
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Quentin Schulz
Compared to the original misc_init_r from Rockchip mach code,
setup_iodomain() is added and rockchip_setup_macaddr() is not called.
It is assumed adding rockchip_setup_macaddr() back is fine.
Let's use rockchip_early_misc_init_r
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Quentin Schulz
Only setup_iodomain() differs from the original misc_init_r from
Rockchip mach code, so let's use rockchip_early_misc_init_r instead of
reimplementing the whole misc_init_r from Rockchip.
Cc: Quentin Schulz
Signed-off-by:
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Quentin Schulz
Compared to the original misc_init_r from Rockchip mach code,
setup_iodomain() is added and rockchip_setup_macaddr() is not called.
It is assumed adding rockchip_setup_macaddr() back is fine.
Let's use rockchip_early_misc_init_r
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Quentin Schulz
Only setup_iodomain() differs from the original misc_init_r from
Rockchip mach code, so let's use rockchip_early_misc_init_r instead of
reimplementing the whole misc_init_r from Rockchip.
Cc: Quentin Schulz
Signed-off-by:
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Quentin Schulz
Only setup_iodomain() and setup_boottargets differ from the original
misc_init_r from Rockchip mach code, so let's use
rockchip_early_misc_init_r instead of reimplementing the whole
misc_init_r from Rockchip.
Cc: Quentin Schulz
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Quentin Schulz
Most Rockchip boards who override misc_init_r do it only to call another
function and keep the rest unchanged. Therefore to allow for less
duplication, let's just add a weak function symbol that is called inside
misc_init_r.
Cc:
Hi Mathieu,
Thanks for v4. I have no more remarks.
Also tested your v4 on the board.
Everything works, even eMMC booting which you were not able to test.
With that my Tested-by: can be applied.
Tested-by: Primoz Fiser
BR,
Primoz
On 30. 01. 24 15:50, Mathieu Othacehe wrote:
> Add initial
On Tue, 2024-01-30 at 15:50 +0100, Mathieu Othacehe wrote:
> Add initial support for the PHYTEC phyBOARD-Segin-i.MX93 board based on
> the PHYTEC phyCORE-i.MX93 SoM.
>
> Supported features:
> - 1GB LPDDR4 RAM
> - eMMC
> - external SD
> - FEC Ethernet
> - debug UART
> - watchdog
>
>
On Sat, Jan 27, 2024 at 10:32 AM Jonas Karlman wrote:
>
> Writing to eMMC using HS200 mode work more reliably then other modes on
> RK356x boards.
>
> Enable MMC_HS200_SUPPORT Kconfig option to prefer use of HS200 mode.
>
> Signed-off-by: Jonas Karlman
Reviewed-by: Weizhao Ouyang
BR,
Weizhao
On Sat, Jan 27, 2024 at 7:27 AM Jonas Karlman wrote:
>
> Writing to eMMC using HS200 mode work more reliably then other modes on
> RK3588 boards.
>
> Enable MMC_HS200_SUPPORT Kconfig option to prefer use of HS200 mode.
>
> Signed-off-by: Jonas Karlman
Reviewed-by: Weizhao Ouyang
BR,
Weizhao
add support for Serial Downloader Boot via UUU as well as flashing emmc
via UUU on USB0 Port of phyBOARD Pollux.
Reviewed-by: Fabio Estevam
Signed-off-by: Benjamin Hahn
---
board/phytec/phycore_imx8mp/phycore-imx8mp.c | 4
configs/phycore-imx8mp_defconfig | 18
Signed-off-by: Benjamin Hahn
---
arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts | 162 +++-
1 file changed, 159 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts
b/arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts
index 6aa720bafe..c8640cac3e
add support for various USB features like USB storage, USB mass storage
as well as booting and flashing emmc via UUU.
Signed-off-by: Benjamin Hahn
---
Changes in v2:
- sync kernel devicetree before making changes
- Link to v1:
add support for USB mass storage to USB0 port of phyBOARD Pollux.
tested with "ums 0 mmc 2"
Signed-off-by: Benjamin Hahn
---
arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 4
configs/phycore-imx8mp_defconfig| 7 +++
2 files changed, 11 insertions(+)
diff
The phyBOARD Pollux has two USB ports. Add support for USB host and USB
storage for the USB1 port.
Signed-off-by: Benjamin Hahn
---
configs/phycore-imx8mp_defconfig | 10 ++
1 file changed, 10 insertions(+)
diff --git a/configs/phycore-imx8mp_defconfig
On Sun, Jan 28, 2024 at 03:05:24PM +0800, Kongyang Liu wrote:
> Import device tree from Linux kernel to add basic support for CPU, PLIC,
> UART and Timer. The name cv1800b in the filename represent the chip used
> on Milk-V Duo board.
>
> Signed-off-by: Kongyang Liu
> ---
>
> Changes in v4:
> -
On Sun, Jan 28, 2024 at 08:22:48PM +0100, Lukasz Tekieli wrote:
> Configure the pad drive strength register for both PHYs.
> The values correspond to what can be found in the Linux DTS
> for VisionFive2 v1.3b.
>
> Pad drive strength configuration is required for the phy0 to work correctly
> with
On Sun, Jan 28, 2024 at 08:22:47PM +0100, Lukasz Tekieli wrote:
> This ports the pad drive strength register configuration which can be
> already found in the Linux driver for this PHY.
>
> Signed-off-by: Lukasz Tekieli
> ---
> drivers/net/phy/motorcomm.c | 130
On Mon, Jan 29, 2024 at 09:43:08AM +0100, Nam Cao wrote:
> JH7110 has a power management unit controller node. Add this node.
>
> This device is used by OpenSBI during board reset/shutdown.
>
> Signed-off-by: Nam Cao
> ---
> arch/riscv/dts/jh7110.dtsi | 6 ++
> 1 file changed, 6
On Sun, Jan 28, 2024 at 03:05:26PM +0800, Kongyang Liu wrote:
> Add document for Milk-V Duo board which based on Sophgo's CV1800B SoC.
>
> Signed-off-by: Kongyang Liu
> ---
>
> (no changes since v3)
>
> Changes in v3:
> - Add brief description of the procedure to run u-boot-dtb.bin
>
>
On Mon, Jan 29, 2024 at 09:43:09AM +0100, Nam Cao wrote:
> Add the axp15060 regulator device. OpenSBI uses this device to perform
> board reset and shutdown.
>
> Signed-off-by: Nam Cao
> ---
> v2: "stf,axp15060-regulator" -> "x-powers,axp15060" to match Linux.
>
>
On Sun, Jan 28, 2024 at 03:05:25PM +0800, Kongyang Liu wrote:
> Add support for Sophgo's Milk-V Duo board, only minimal device tree and
> serial console are enabled, and it can boot via vendor first stage
> bootloader.
>
> Signed-off-by: Kongyang Liu
> ---
>
> (no changes since v3)
>
> Changes
From: Georgi Vlaev
The 1-bit inline ECC support in TI's DDRSS bridge requires
the configured memory regions to be preloaded with a pattern
before use. This is done by the k3-ddrss driver from the
R5 SPL in a 'for' loop. It takes around 10 seconds to fill
2GB of memory on AM64x and AM62x. Memset
This series is to:
1. Enable ECC priming with BIST engine (Patch 1)
2. Add a function to store base address and size of RAM's banks
in a 64 bit device private data (Patch 2)
3. Setup the ECC region start and range (Patch 3)
4. Enable ECC 1 bit error, 2 bit error and multiple bit
error
As R5 is a 32 bit processor, the RAM banks' base and size calculation
is restricted to 32 bits, which results in wrong values if bank's base
is greater than 32 bits or bank's size is greater than or equal to 4GB.
So, add k3_ddrss_ddr_bank_base_size_calc() to get the base address and
size of RAM's
Enable ECC 1-bit error, 2-bit error, multiple 1-bit error interrupts
by setting the respective bits in the DDRSS_V2A_INT_SET_REG register.
Signed-off-by: Santhosh Kumar K
---
drivers/ram/k3-ddrss/k3-ddrss.c | 8
1 file changed, 8 insertions(+)
diff --git
Setup the ECC region's start and range using the device private data,
ddrss->ddr_bank_base[0] and ddrss->ddr_ram_size. Also, move start and
range of ECC regions from 32 bits to 64 bits to accommodate for
DDR greater than or equal to 4GB.
Signed-off-by: Santhosh Kumar K
Reviewed-by: Neha Malcom
Up until now cpu clock gets initialized at 384 MHz, which is
the highest supported cpu clock.
Recent A20 batches show an increased percentage of modules
reacting very sensitive to operating conditions outside the
specifications.
The cpu dies very shortly after PLLs, core frequency or cpu
voltage
According to PSCI specification DEN0022F, PSCI_FEATURES is used to check
whether the SMCCC is implemented by discovering SMCCC_VERSION.
Signed-off-by: Weizhao Ouyang
---
v2: check SMCCC_ARCH_FEATURES
---
drivers/firmware/psci.c | 9 -
include/linux/arm-smccc.h | 6 ++
2 files
This series aim to fix smccc bind issue and add a list command for RNG
devices.
Changelog:
v1 --> v2
- check SMCCC_ARCH_FEATURES
- update commit message and rng help info
Weizhao Ouyang (3):
firmware: psci: Fix bind_smccc_features psci check
driver: rng: Fix SMCCC TRNG crash
cmd: rng: Add
As there are few redundant functions in board/ti/*/evm.c files, pull
them to a common location of access to reuse.
Signed-off-by: Santhosh Kumar K
---
board/ti/common/k3-ddr-init.c | 75 +++
board/ti/common/k3-ddr-init.h | 15 +++
2 files changed, 90
Remove the redundant DDR functions and include the common file to
access the functions.
Signed-off-by: Santhosh Kumar K
---
board/ti/am64x/evm.c | 71
1 file changed, 5 insertions(+), 66 deletions(-)
diff --git a/board/ti/am64x/evm.c
Remove the redundant DDR functions and include the common file to
access the functions.
Signed-off-by: Santhosh Kumar K
---
board/ti/am62x/evm.c | 61 +---
1 file changed, 6 insertions(+), 55 deletions(-)
diff --git a/board/ti/am62x/evm.c
From: Neha Malcom Francis
Add CONFIG_K3_INLINE_ECC so that ECC functions can be compiled into R5 SPL
only when the config has been enabled.
Signed-off-by: Neha Malcom Francis
---
drivers/ram/Kconfig | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/ram/Kconfig
Call k3-ddrss driver through fixup_ddr_driver_for_ecc() to fixup the
device tree and resize the available amount of DDR, if ECC is enabled.
Otherwise, fixup the device tree using the regular
fdt_fixup_memory_banks().
Signed-off-by: Santhosh Kumar K
---
board/ti/am62ax/evm.c | 16
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