Re: [U-Boot] Query: Does Uboot support CFI flash driver forM29W128GH

[prakash bedge]

Hi Stefan,

Thanks. I have seen that patch work and I will try it and hope it will work
for M29W128GH (ST make).

But why I am not seeing the chip name and any instance of M29W128GH in Uboot
source code?
Is it because the chip is CFI compliant?
How I can crosscheck that present Uboot V2009.08 works for M29W128GH? Which
folder I should check for that?
I believe the Patch sent by you will work in this version.


Thanks  regards,
Prakash

On Tue, Oct 27, 2009 at 8:04 PM, Stefan Roese s...@denx.de wrote:

 On Tuesday 27 October 2009 14:13:05 prakash bedge wrote:
  Are there some unknwon issues that I should take care of while using this
  driver for M29W128GH?

 Searching the mailing list, you will notice one thread [Question about
 M29W128G CFI QRY bug] which reports of a problem with the current version
 of
 the common CFI driver and this chip. I just sent out a patch that should
 fix
 this issue.

  M29W128GH is following AMD cmdset.
   Do I need to add the structure for M29W128GH in jedec_flash.c or there
 is
  some chip compatible to this chip is already present in Uboot and I only
  have to use as it is.

 No, this chip should be CFI compatible. So you don't need to add any code
 to
 jedec_flash.c. This is only for legacy JEDEC NOR chips.

 Cheers,
 Stefan

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Re: [U-Boot] [PATCH 2/6] ppc4xx: sc3: Remove unreferenced external declarations from sc3.h

[Heiko Schocher]

Hello Stefan,

Stefan Roese wrote:
 Signed-off-by: Stefan Roese s...@denx.de
 Cc: Heiko Schocher h...@denx.de
 ---
  include/configs/sc3.h |5 -
  1 files changed, 0 insertions(+), 5 deletions(-)

Thanks!

Acked-by: Heiko Schocher h...@denx.de

bye
Heiko
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Re: [U-Boot] [PATCH] NET: Move MDIO regs out of TSEC Space

[Kumar Gopalpet-B05799]

 

-Original Message-
From: Phillips Kim-R1AAHA 
Sent: Wednesday, October 28, 2009 2:24 AM
To: Kumar Gopalpet-B05799
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH] NET: Move MDIO regs out of TSEC Space

On Sat, 24 Oct 2009 23:39:36 +0530
Sandeep Gopalpet sandeep.ku...@freescale.com wrote:

 @@ -306,12 +307,11 @@ static int init_phy(struct eth_device *dev)  {
  struct tsec_private *priv = (struct tsec_private *)dev-priv;
  struct phy_info *curphy;
 -volatile tsec_t *phyregs = priv-phyregs;
 +volatile tsec_mdio_t *phyregs = priv-phyregs;
  volatile tsec_t *regs = priv-regs;
  
  /* Assign a Physical address to the TBI */
  regs-tbipa = CONFIG_SYS_TBIPA_VALUE;
 -phyregs-tbipa = CONFIG_SYS_TBIPA_VALUE;
  asm(sync);

this generates a new warning:

tsec.c: In function 'init_phy':
tsec.c:307: warning: unused variable 'phyregs'

  .regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)), \
 -.miiregs = (tsec_t *)TSEC_BASE_ADDR, \
 +.miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR), \
 +.miiregs_sgmii = (tsec_mdio_t *)(MDIO_BASE_ADDR + (num 
 +-1)*MDIO_OFFSET ), \

and please use consistent codingstyle; here and..

  .devname = CONFIG_TSEC##num##_NAME, \
  .phyaddr = TSEC##num##_PHY_ADDR, \
  .flags = TSEC##num##_FLAGS \
 @@ -44,7 +33,8 @@
  #define SET_STD_TSEC_INFO(x, num) \
  {   \
  x.regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)); \
 -x.miiregs = (tsec_t *)TSEC_BASE_ADDR; \
 +x.miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR); \
 +x.miiregs_sgmii = (tsec_mdio_t *)(MDIO_BASE_ADDR + (num 
 +-1)*MDIO_OFFSET); \

..here.


Thanks Kim, removed the warning and inconsistancy.

Resending the patches

-Thanks
Sandeep 
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[U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space

[Sandeep Gopalpet]

Moved the mdio regs out of the tsec structure,and
provided different offsets for tsec base and mdio
base so that provision for etsec2.0 can be provided.

This patch helps in providing the support for etsec2.0
In etsec2.0, the MDIO register space and the etsec reg
space are different.

Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
platform specific files.

Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
---
 drivers/net/tsec.c   |   19 -
 include/asm-ppc/immap_83xx.h |9 
 include/asm-ppc/immap_85xx.h |   10 +
 include/asm-ppc/immap_86xx.h |9 
 include/tsec.h   |   45 -
 5 files changed, 59 insertions(+), 33 deletions(-)

diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 3f74118..34f3be9 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -80,7 +80,7 @@ static struct tsec_info_struct tsec_info[] = {
 #ifdef CONFIG_MPC85XX_FEC
{
.regs = (tsec_t *)(TSEC_BASE_ADDR + 0x2000),
-   .miiregs = (tsec_t *)(TSEC_BASE_ADDR),
+   .miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR),
.devname = CONFIG_MPC85XX_FEC_NAME,
.phyaddr = FEC_PHY_ADDR,
.flags = FEC_FLAGS
@@ -133,6 +133,7 @@ int tsec_initialize(bd_t * bis, struct tsec_info_struct 
*tsec_info)
privlist[num_tsecs++] = priv;
priv-regs = tsec_info-regs;
priv-phyregs = tsec_info-miiregs;
+   priv-phyregs_sgmii = tsec_info-miiregs_sgmii;
 
priv-phyaddr = tsec_info-phyaddr;
priv-flags = tsec_info-flags;
@@ -219,7 +220,7 @@ int tsec_init(struct eth_device *dev, bd_t * bd)
 }
 
 /* Writes the given phy's reg with value, using the specified MDIO regs */
-static void tsec_local_mdio_write(volatile tsec_t *phyregs, uint addr,
+static void tsec_local_mdio_write(volatile tsec_mdio_t *phyregs, uint addr,
uint reg, uint value)
 {
int timeout = 100;
@@ -242,7 +243,7 @@ static void tsec_local_mdio_write(volatile tsec_t *phyregs, 
uint addr,
  * notvalid bit cleared), and the bus to cease activity (miimind
  * busy bit cleared), and then returns the value
  */
-uint tsec_local_mdio_read(volatile tsec_t *phyregs, uint phyid, uint regnum)
+uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs, uint phyid, uint 
regnum)
 {
uint value;
 
@@ -287,11 +288,11 @@ static void tsec_configure_serdes(struct tsec_private 
*priv)
 {
/* Access TBI PHY registers at given TSEC register offset as opposed to 
the
 * register offset used for external PHY accesses */
-   tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_ANA,
+   tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, TBI_ANA,
TBIANA_SETTINGS);
-   tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_TBICON,
+   tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, 
TBI_TBICON,
TBICON_CLK_SELECT);
-   tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_CR,
+   tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, TBI_CR,
TBICR_SETTINGS);
 }
 
@@ -303,12 +304,10 @@ static int init_phy(struct eth_device *dev)
 {
struct tsec_private *priv = (struct tsec_private *)dev-priv;
struct phy_info *curphy;
-   volatile tsec_t *phyregs = priv-phyregs;
volatile tsec_t *regs = priv-regs;
 
/* Assign a Physical address to the TBI */
regs-tbipa = CONFIG_SYS_TBIPA_VALUE;
-   phyregs-tbipa = CONFIG_SYS_TBIPA_VALUE;
asm(sync);
 
/* Reset MII (due to new addresses) */
@@ -733,7 +732,7 @@ uint mii_parse_dm9161_scsr(uint mii_reg, struct 
tsec_private * priv)
 uint mii_cis8204_fixled(uint mii_reg, struct tsec_private * priv)
 {
uint phyid;
-   volatile tsec_t *regbase = priv-phyregs;
+   volatile tsec_mdio_t *regbase = priv-phyregs;
int timeout = 100;
 
for (phyid = 0; phyid  4; phyid++) {
@@ -1766,7 +1765,7 @@ void phy_run_commands(struct tsec_private *priv, struct 
phy_cmd *cmd)
 {
int i;
uint result;
-   volatile tsec_t *phyregs = priv-phyregs;
+   volatile tsec_mdio_t *phyregs = priv-phyregs;
 
phyregs-miimcfg = MIIMCFG_RESET;
 
diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h
index c60a7d2..57b1a72 100644
--- a/include/asm-ppc/immap_83xx.h
+++ b/include/asm-ppc/immap_83xx.h
@@ -868,4 +868,13 @@ typedef struct immap {
 #endif
 #define CONFIG_SYS_MPC83xx_USB_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB_OFFSET)
+
+#define CONFIG_SYS_TSEC1_OFFSET0x24000
+#define TSEC_SIZE  0x01000
+
+#define CONFIG_SYS_MDIO1_OFFSET0x24520
+#define MDIO_OFFSET0x01000
+
+#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
+#define MDIO_BASE_ADDR 

[U-Boot] [PATCH v3 2/2] NET: Base support for etsec2.0

[Sandeep Gopalpet]

1. Modified the tsec_mdio structure to include the new regs
2. Modified the MDIO_BASE_ADDR so that it will handle both
older version and new version of etsec.

Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
---
 include/asm-ppc/immap_85xx.h |7 ++-
 include/configs/P1_P2_RDB.h  |5 +
 include/tsec.h   |   11 +++
 3 files changed, 22 insertions(+), 1 deletions(-)

diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index ad3910c..9a5326a 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1933,10 +1933,15 @@ typedef struct ccsr_gur {
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
 
 /* TSEC and MDIO OFFSETS */
+#ifdef CONFIG_TSECV2
+#define CONFIG_SYS_TSEC1_OFFSET0xB
+#else
 #define CONFIG_SYS_TSEC1_OFFSET0x24000
+#endif
+
 #define TSEC_SIZE  0x01000
 
-#define CONFIG_SYS_MDIO1_OFFSET0x24520
+#define CONFIG_SYS_MDIO1_OFFSET0x24000
 #define MDIO_OFFSET0x01000
 
 #define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 310242e..4d93ed8 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -84,6 +84,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_MP
 #endif
 
+/* TSECV2 */
+#if defined(CONFIG_P1020)
+#define CONFIG_TSECV2
+#endif
+
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
diff --git a/include/tsec.h b/include/tsec.h
index 92ac49a..0727cbe 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -453,14 +453,25 @@ typedef struct tsec_hash_regs
uintres2[24];
 } tsec_hash_t;
 
+/* MDIO structure for etsec2.0.
+ * Backward compatible to etsec1.x
+ */
+
 typedef struct tsec_mdio
 {
+   uintres1[4];
+   uintieventm;/* MDIO Interrupt event register */
+   uintimaskm; /* MDIO Interrupt mask register */
+   uintres2;
+   uintemapm;  /* MDIO Event mapping register */
+   uintres3[320];
uintmiimcfg;/* MII Management: Configuration */
uintmiimcom;/* MII Management: Command */
uintmiimadd;/* MII Management: Address */
uintmiimcon;/* MII Management: Control */
uintmiimstat;   /* MII Management: Status */
uintmiimind;/* MII Management: Indicators */
+   uintres4[690];
 } tsec_mdio_t;
 
 typedef struct tsec
-- 
1.5.2.2

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Re: [U-Boot] [PATCH] makefiles: fixes/cleanup for building build tools

[Mike Frysinger]

On Tuesday 27 October 2009 15:34:10 Scott Wood wrote:
 On Mon, Oct 26, 2009 at 07:57:50PM -0400, Mike Frysinger wrote:
  perhaps it would make more sense to create a HOSTCOMPILE/HOSTLINK (or
  whatever) variable so this kind of thing isnt missed ?
  HOSTCOMPILE = $(HOSTCC) $(HOSTCFLAGS)
  HOSTLINK = $(HOSTCOMPILE) $(HOSTLDFLAGS)
 
 Maybe.  What about PEDCFLAGS?  Should that be the default for HOSTCOMPILE,
 and then have a HOSTCOMPILENOPED?

i think the intention was to build everything with -pedantic.  so add it to 
the default flags and drop the distinction completely.  it'd make the 
resulting build code a lot simpler.

   It restores easylogo to using the host compiler, which was broken by
   commit 38d299c2db81bd889c601b5dfc12c4e83ef8 (if this was an
   intentional change, please let me know -- but it seems to be a build
   tool).
 
  it was intentional, but for different reasons.  easylogo isnt integrated
  into the u-boot build system, so in order to compile things in there, you
  had to go into the subdir and manually run `make`.  if it were integrated
  into the build system like all other tools, then converting to host tools
  is fine.  but unless i missed something, it doesnt appear to be ?  and
  now, going into the subdir and running `make` wont work either ...
 
 I was expecting it to be built by adding easylogo to TOOLSUBDIRS (it would
 be better if there were a distinct make target for it, but that's another
 patch).  Other tools such as gdb already assume they're being run in this
 manner.

where does TOOLSUBDIRS get changed ?  i dont see any place in u-boot where it 
is set and your patch doesnt change that from what i can see.
-mike


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Re: [U-Boot] Query: Does Uboot support CFI flash driver forM29W128GH

[Stefan Roese]

Hi Prakash,

On Wednesday 28 October 2009 07:23:31 prakash bedge wrote:
 Thanks. I have seen that patch work and I will try it and hope it will work
 for M29W128GH (ST make).
 
 But why I am not seeing the chip name and any instance of M29W128GH in
  Uboot source code?
 Is it because the chip is CFI compliant?

Yes. For CFI compliant chips features like sector count, sector sizes etc are 
autodetected. No need to define the chip with it's ID anywhere.

 How I can crosscheck that present Uboot V2009.08 works for M29W128GH? Which
 folder I should check for that?
 I believe the Patch sent by you will work in this version.

You should test it with the latest version of mainline U-Boot:

http://git.denx.de/?p=u-boot.git;a=summary

Please note that you need to add a board specific flash_cmd_reset() function 
for this chip to work correctly. Something like this should work (untested):

void flash_cmd_reset(flash_info_t *info)
{
flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
}

Cheers,
Stefan

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Re: [U-Boot] [PATCH] arm:kirkwood: Add hardware watchdog support for Marvell Kirkwood boards

[Simon Kagstrom]

Hi again Prafulla and the list!

On Mon, 28 Sep 2009 09:06:26 +0200
Simon Kagstrom simon.kagst...@netinsight.net wrote:

 Initialize by calling kw_watchdog_init() with the number of seconds for
 the watchdog to timeout.
 
 Signed-off-by: Simon Kagstrom simon.kagst...@netinsight.net

Were there any particular problems with this patch that I should
rework? It's not enabled by default.

// Simon

 ---
  cpu/arm926ejs/kirkwood/timer.c  |   29 +
  include/asm-arm/arch-kirkwood/cpu.h |2 ++
  2 files changed, 31 insertions(+), 0 deletions(-)
 
 diff --git a/cpu/arm926ejs/kirkwood/timer.c b/cpu/arm926ejs/kirkwood/timer.c
 index 817ff42..f3397e7 100644
 --- a/cpu/arm926ejs/kirkwood/timer.c
 +++ b/cpu/arm926ejs/kirkwood/timer.c
 @@ -25,6 +25,7 @@
  #include asm/arch/kirkwood.h
  
  #define UBOOT_CNTR   0   /* counter to use for uboot timer */
 +#define WATCHDOG_CNTR2
  
  /* Timer reload and current value registers */
  struct kwtmr_val {
 @@ -166,3 +167,31 @@ int timer_init(void)
  
   return 0;
  }
 +
 +#if defined(CONFIG_HW_WATCHDOG)
 +static unsigned long watchdog_timeout = 5;
 +void hw_watchdog_reset(void)
 +{
 + unsigned long time = CONFIG_SYS_TCLK * watchdog_timeout;
 +
 + writel(time, CNTMR_VAL_REG(WATCHDOG_CNTR));
 +}
 +
 +void kw_watchdog_init(unsigned long timeout_secs)
 +{
 + struct kwcpu_registers *cpureg =
 + (struct kwcpu_registers *)KW_CPU_REG_BASE;
 + unsigned int cntmrctrl;
 +
 + watchdog_timeout = timeout_secs;
 + /* Enable CPU reset if watchdog expires */
 + cpureg-rstoutn_mask |= WATCHDOG_CNTR;
 + hw_watchdog_reset();
 +
 + /* Enable the watchdog */
 + cntmrctrl = readl(CNTMR_CTRL_REG);
 + cntmrctrl |= CTCR_ARM_TIMER_EN(WATCHDOG_CNTR);
 + cntmrctrl |= CTCR_ARM_TIMER_AUTO_EN(WATCHDOG_CNTR);
 + writel(cntmrctrl, CNTMR_CTRL_REG);
 +}
 +#endif
 diff --git a/include/asm-arm/arch-kirkwood/cpu.h 
 b/include/asm-arm/arch-kirkwood/cpu.h
 index b3022a3..df49c3f 100644
 --- a/include/asm-arm/arch-kirkwood/cpu.h
 +++ b/include/asm-arm/arch-kirkwood/cpu.h
 @@ -165,5 +165,7 @@ int kw_config_mpp(unsigned int mpp0_7, unsigned int 
 mpp8_15,
   unsigned int mpp32_39, unsigned int mpp40_47,
   unsigned int mpp48_55);
  unsigned int kw_winctrl_calcsize(unsigned int sizeval);
 +void kw_watchdog_init(unsigned long timeout_secs);
 +
  #endif /* __ASSEMBLY__ */
  #endif /* _KWCPU_H */

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Re: [U-Boot] [PATCH V3 1/4] add TI DA8xx support: DA8xx includes

[Nick Thompson]

Wolfgang Denk wrote:
 Dear Nick Thompson,
 
 In message 4ae5dffd.2090...@gefanuc.com you wrote:
 Provides initial support for TI OMAP-L1x/DA8xx SoC devices.
 See http://www.ti.com

 The DA8xx devices are similar to DaVinci devices but have a differing
 memory map and updated peripheral versions.

 Signed-off-by: Nick Thompson nick.thomp...@gefanuc.com
 ---
 ...
 +/* required by davinci drivers */
 
 Is this really an essential comment? Drop it!
 
  #define REG(addr)   (*(volatile unsigned int *)(addr))
 -#define REG_P(addr) ((volatile unsigned int *)(addr))
  
 +/* required by davinci drivers */
 
 Ditto.
 
  typedef volatile unsigned int   dv_reg;
  typedef volatile unsigned int * dv_reg_p;
 ...
 
 +/* for LPSCs in PSC1, 32 + actual id is being used for differentiation */
 +#define DAVINCI_LPSC_BASE   32
 +#define DAVINCI_LPSC_USB11  (DAVINCI_LPSC_BASE + 1)
 +#define DAVINCI_LPSC_USB20  (DAVINCI_LPSC_BASE + 2)
 +#define DAVINCI_LPSC_GPIO   (DAVINCI_LPSC_BASE + 3)
 +#define DAVINCI_LPSC_UHPI   (DAVINCI_LPSC_BASE + 4)
 +#define DAVINCI_LPSC_EMAC   (DAVINCI_LPSC_BASE + 5)
 +#define DAVINCI_LPSC_DDR_EMIF   (DAVINCI_LPSC_BASE + 6)
 +#define DAVINCI_LPSC_McASP0 (DAVINCI_LPSC_BASE + 7)
 +#define DAVINCI_LPSC_McASP1 (DAVINCI_LPSC_BASE + 8)
 +#define DAVINCI_LPSC_McASP2 (DAVINCI_LPSC_BASE + 9)
 +#define DAVINCI_LPSC_SPI1   (DAVINCI_LPSC_BASE + 10)
 +#define DAVINCI_LPSC_I2C1   (DAVINCI_LPSC_BASE + 11)
 +#define DAVINCI_LPSC_UART1  (DAVINCI_LPSC_BASE + 12)
 +#define DAVINCI_LPSC_UART2  (DAVINCI_LPSC_BASE + 13)
 +#define DAVINCI_LPSC_LCDC   (DAVINCI_LPSC_BASE + 16)
 +#define DAVINCI_LPSC_ePWM   (DAVINCI_LPSC_BASE + 17)
 +#define DAVINCI_LPSC_eCAP   (DAVINCI_LPSC_BASE + 20)
 +#define DAVINCI_LPSC_eQEP   (DAVINCI_LPSC_BASE + 21)
 +#define DAVINCI_LPSC_SCR_P0 (DAVINCI_LPSC_BASE + 22)
 +#define DAVINCI_LPSC_SCR_P1 (DAVINCI_LPSC_BASE + 23)
 +#define DAVINCI_LPSC_CR_P3  (DAVINCI_LPSC_BASE + 26)
 +#define DAVINCI_LPSC_L3_CBA_RAM (DAVINCI_LPSC_BASE + 31)
 
 I think you actually want to use a C struct here, like in many other
 places.
 
 Please do not access device registers using plain pointers like (base
 address plus offet), but always use I/O accessors with C structs, so
 we can have strict type checking by the compiler.

As I mentioned in the patch introduction [PATCH V3 0/4]... there are
several places where out of fashion code is present in these patches.

DA8xx SoC's are considered a member of the DaVinci family of SoC's and
so these headers need to maintain compatibility with the relevant
drivers already in the U-Boot git tree.

Those drivers do not use C structures and I/O accessors and so require
the use of #defines as presented here.

Where possible I have not used legacy code forms in new code, but in
the case of new code that also has to use these same registers, I have
again opted for compatibility.

Of course I could duplicate the definitions as defines /and/ C structs,
or even rewrite all the DaVinci family drivers, but I'm hoping neither
of those options was the intention of your comments here.

Can you please confirm whether my assumptions as correct and acceptable
in this case? I.e. (as Tom Rix put it) Can I get a pass on this one?

I think you have a point in the PINMUX cases below however, as I believe
these #defines are only used in SoC specific code...

Best Regards,
Nick

 
 +#else /* CONFIG_SOC_DA8XX */
 +
 +#define PSC0_MDCTL  (DAVINCI_PSC0_BASE + 0xa00)
 +#define PSC0_MDSTAT (DAVINCI_PSC0_BASE + 0x800)
 +#define PSC0_PTCMD  (DAVINCI_PSC0_BASE + 0x120)
 +#define PSC0_PTSTAT (DAVINCI_PSC0_BASE + 0x128)
 +
 +#define PSC1_MDCTL  (DAVINCI_PSC1_BASE + 0xa00)
 +#define PSC1_MDSTAT (DAVINCI_PSC1_BASE + 0x800)
 +#define PSC1_PTCMD  (DAVINCI_PSC1_BASE + 0x120)
 +#define PSC1_PTSTAT (DAVINCI_PSC1_BASE + 0x128)
 
 One C struct with a pointer to it?
 
 +/* Some PLL defines */
 +#define PLL0_PLLCTL (DAVINCI_PLL_CNTRL0_BASE + 0x100)
 +#define PLL0_PLLM   (DAVINCI_PLL_CNTRL0_BASE + 0x110)
 +#define PLL0_PREDIV (DAVINCI_PLL_CNTRL0_BASE + 0x114)
 +#define PLL0_POSTDIV(DAVINCI_PLL_CNTRL0_BASE + 0x128)
 +#define PLL0_DIV1   (DAVINCI_PLL_CNTRL0_BASE + 0x118)
 +#define PLL0_DIV2   (DAVINCI_PLL_CNTRL0_BASE + 0x11c)
 +#define PLL0_DIV3   (DAVINCI_PLL_CNTRL0_BASE + 0x120)
 +#define PLL0_DIV4   (DAVINCI_PLL_CNTRL0_BASE + 0x160)
 +#define PLL0_DIV5   (DAVINCI_PLL_CNTRL0_BASE + 0x164)
 +#define PLL0_DIV6   (DAVINCI_PLL_CNTRL0_BASE + 0x168)
 +#define PLL0_DIV7   (DAVINCI_PLL_CNTRL0_BASE + 0x16c)
 +#define PLL0_DIV8   (DAVINCI_PLL_CNTRL0_BASE + 0x170)
 +#define PLL0_DIV9   (DAVINCI_PLL_CNTRL0_BASE + 0x114)
 
 C struct!
 
 +/* Boot config */
 +#define PINMUX0 (DAVINCI_BOOTCFG_BASE + 0x120)
 +#define PINMUX1 (DAVINCI_BOOTCFG_BASE + 0x124)
 +#define PINMUX2 

Re: [U-Boot] [PATCH] arm:kirkwood: Add hardware watchdog support for Marvell Kirkwood boards

[Prafulla Wadaskar]

 

 -Original Message-
 From: Simon Kagstrom [mailto:simon.kagst...@netinsight.net] 
 Sent: Wednesday, October 28, 2009 1:47 PM
 To: Prafulla Wadaskar; u-boot@lists.denx.de
 Subject: Re: [PATCH] arm:kirkwood: Add hardware watchdog 
 support for Marvell Kirkwood boards
 
 Hi again Prafulla and the list!
 
 On Mon, 28 Sep 2009 09:06:26 +0200
 Simon Kagstrom simon.kagst...@netinsight.net wrote:
 
  Initialize by calling kw_watchdog_init() with the number of 
 seconds for
  the watchdog to timeout.
  
  Signed-off-by: Simon Kagstrom simon.kagst...@netinsight.net
 
 Were there any particular problems with this patch that I should
 rework? It's not enabled by default.

Hi Simon
We can enable this support
Please see my in lined comments below

 
 // Simon
 
  ---
   cpu/arm926ejs/kirkwood/timer.c  |   29 
 +
   include/asm-arm/arch-kirkwood/cpu.h |2 ++
   2 files changed, 31 insertions(+), 0 deletions(-)
  
  diff --git a/cpu/arm926ejs/kirkwood/timer.c 
 b/cpu/arm926ejs/kirkwood/timer.c
  index 817ff42..f3397e7 100644
  --- a/cpu/arm926ejs/kirkwood/timer.c
  +++ b/cpu/arm926ejs/kirkwood/timer.c
  @@ -25,6 +25,7 @@
   #include asm/arch/kirkwood.h
   
   #define UBOOT_CNTR 0   /* counter to use for uboot timer */
  +#define WATCHDOG_CNTR  2

BTW, this declaration will not be required if you see struct kwtmr_register 

   
   /* Timer reload and current value registers */
   struct kwtmr_val {
  @@ -166,3 +167,31 @@ int timer_init(void)
   
  return 0;
   }
  +
  +#if defined(CONFIG_HW_WATCHDOG)
  +static unsigned long watchdog_timeout = 5;

Please get rid of this magic number, Pls provide some comments
I think just u8 are sufficient here since the time is in seconds.
I suggest variable name as wdt_tout to keep it small

Some comments for function... 
  +void hw_watchdog_reset(void)
  +{
  +   unsigned long time = CONFIG_SYS_TCLK * watchdog_timeout;

Please use u32 here to avoid typecast in writel
Pls provide comments for this calculations

  +
  +   writel(time, CNTMR_VAL_REG(WATCHDOG_CNTR));

Please check struct kwtmr_registers, wdt regs are named differently, pls use 
them
 
  +}
  +
  +void kw_watchdog_init(unsigned long timeout_secs)
  +{
  +   struct kwcpu_registers *cpureg =
  +   (struct kwcpu_registers *)KW_CPU_REG_BASE;
  +   unsigned int cntmrctrl;
  +
  +   watchdog_timeout = timeout_secs;
  +   /* Enable CPU reset if watchdog expires */
  +   cpureg-rstoutn_mask |= WATCHDOG_CNTR;

access any arm registers through readl/writel only
Using WATCHDOG_CNTR is confusing here, pls use something like this (1  1) 
(ref reset_cpu in cpu.c)

  +   hw_watchdog_reset();
  +
  +   /* Enable the watchdog */
  +   cntmrctrl = readl(CNTMR_CTRL_REG);
  +   cntmrctrl |= CTCR_ARM_TIMER_EN(WATCHDOG_CNTR);
  +   cntmrctrl |= CTCR_ARM_TIMER_AUTO_EN(WATCHDOG_CNTR);
  +   writel(cntmrctrl, CNTMR_CTRL_REG);

This need to be updated as per struct kwtmr_register
 
  +}
  +#endif
  diff --git a/include/asm-arm/arch-kirkwood/cpu.h 
 b/include/asm-arm/arch-kirkwood/cpu.h
  index b3022a3..df49c3f 100644
  --- a/include/asm-arm/arch-kirkwood/cpu.h
  +++ b/include/asm-arm/arch-kirkwood/cpu.h
  @@ -165,5 +165,7 @@ int kw_config_mpp(unsigned int mpp0_7, 
 unsigned int mpp8_15,
  unsigned int mpp32_39, unsigned int mpp40_47,
  unsigned int mpp48_55);
   unsigned int kw_winctrl_calcsize(unsigned int sizeval);
  +void kw_watchdog_init(unsigned long timeout_secs);

Functions declared here are suppose to be in cpu.c
Moreover I think we don't need this function at all,
You can club kw_watchdog_init with hw_watchdog_reset so that at very first 
WATCHDOG_RESET() function call,
watchdog timer it will be initialized.

Regards..
Prafulla . .

  +
   #endif /* __ASSEMBLY__ */
   #endif /* _KWCPU_H */
 
 
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Re: [U-Boot] [PATCH] arm:kirkwood: Add hardware watchdog support for Marvell Kirkwood boards

[Simon Kagstrom]

Thanks for the comments!

On Wed, 28 Oct 2009 02:24:43 -0700
Prafulla Wadaskar prafu...@marvell.com wrote:


#define UBOOT_CNTR   0   /* counter to use for uboot timer */
   +#define WATCHDOG_CNTR2
 
 BTW, this declaration will not be required if you see struct kwtmr_register 

Well, to me it makes the code more clear, so I'd prefer to keep it.


/* Timer reload and current value registers */
struct kwtmr_val {
   @@ -166,3 +167,31 @@ int timer_init(void)

 return 0;
}
   +
   +#if defined(CONFIG_HW_WATCHDOG)
   +static unsigned long watchdog_timeout = 5;
 
 Please get rid of this magic number, Pls provide some comments
 I think just u8 are sufficient here since the time is in seconds.
 I suggest variable name as wdt_tout to keep it small

I'll make it configurable through config.h, and a u8. However, I think
watchdog_timeout is a more descriptive name here.

   +
   + writel(time, CNTMR_VAL_REG(WATCHDOG_CNTR));
 
 Please check struct kwtmr_registers, wdt regs are named differently, pls use 
 them

I can do that, but CNTMR_VAL_REG is actually defined higher up in the
file as

   #define CNTMR_VAL_REG(tmrnum)kwtmr_regs-tmr[tmrnum].val

and used for the regular timer support. I'm not sure I like that, but
at least the file should be internally consistent.

   --- a/include/asm-arm/arch-kirkwood/cpu.h
   +++ b/include/asm-arm/arch-kirkwood/cpu.h
   @@ -165,5 +165,7 @@ int kw_config_mpp(unsigned int mpp0_7, 
  unsigned int mpp8_15,
 unsigned int mpp32_39, unsigned int mpp40_47,
 unsigned int mpp48_55);
unsigned int kw_winctrl_calcsize(unsigned int sizeval);
   +void kw_watchdog_init(unsigned long timeout_secs);
 
 Functions declared here are suppose to be in cpu.c
 Moreover I think we don't need this function at all,
 You can club kw_watchdog_init with hw_watchdog_reset so that at very first 
 WATCHDOG_RESET() function call,
 watchdog timer it will be initialized.

But then it's unconditionally turned on as soon as the first
WATCHDOG_RESET() is called, which might not be what you want.

In the long run, we should probably add command line support for
enabling the watchdog (some might want to do it just before starting
Linux for example).

// Simon
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Re: [U-Boot] [PATCH] ARM AT91 new board EB+CPUx9K2

[Jens Scharsig]

Dear Wolfgang Denk,
 writel(AT91C_PA23_TXD2, ((AT91PS_PIO) AT91C_BASE_PIOA)-PIO_OER);

 like notation
 
 Close, but please also get rid of this ((AT91PS_PIO) AT91C_BASE_PIOA)
 thing, especialy the cast is nasty. Declare a real pointer variable to
 the respective data structure, and use that.
 

I, think

writel(AT91C_PA23_TXD2, AT91C_PIOA_OER);

is the most correct way. 
But, there are need some additional def's in AT91RM9200.h. 
Only the port A registers is defined as pointer variable. 
If you think also this is the right way, I will send a 
separate patch for AT91RM9200.h (PORTB .. PORTD, SMC registers)

Best regards,

Jens Scharsig
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Re: [U-Boot] [PATCH] cfi: Add weak default function for flash_cmd_reset()

[Stefan Roese]

On Tuesday 27 October 2009 15:24:50 Stefan Roese wrote:
 Currently the CFI driver issues both AMD and Intel reset commands.
 This is because the driver doesn't know yet which chips are connected.
 This dual reset seems to cause problems with the M29W128G chips as
 reported by Richard Retanubun. This patch now introduces a weak default
 function for the CFI reset command, still with both resets. This can
 be overridden by a board specific version if necessary.

Applied to u-boot-cfi-flash/master. Thanks.
 
Cheers,
Stefan

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DENX Software Engineering GmbH,  MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich,  Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de
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[U-Boot] Please pull u-boot-cfi-flash/master

[Stefan Roese]

Hi Wolfgang,

please pull this update. Thanks.

The following changes since commit 4946775c6db52dba28f72ba3525764b54f1d4593:
  Wolfgang Denk (1):
Coding Style cleanup; update CHANGELOG, prepare -rc1

are available in the git repository at:

  git://www.denx.de/git/u-boot-cfi-flash.git master

Stefan Roese (1):
  cfi: Add weak default function for flash_cmd_reset()

 drivers/mtd/cfi_flash.c |  151 ++---
 include/mtd/cfi_flash.h |  157 +++
 2 files changed, 175 insertions(+), 133 deletions(-)
 create mode 100644 include/mtd/cfi_flash.h
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Re: [U-Boot] [PATCH] arm:kirkwood: Add hardware watchdog support for Marvell Kirkwood boards

[Prafulla Wadaskar]

 

 -Original Message-
 From: Simon Kagstrom [mailto:simon.kagst...@netinsight.net] 
 Sent: Wednesday, October 28, 2009 3:23 PM
 To: Prafulla Wadaskar
 Cc: u-boot@lists.denx.de
 Subject: Re: [PATCH] arm:kirkwood: Add hardware watchdog 
 support for Marvell Kirkwood boards
 
 Thanks for the comments!
 
 On Wed, 28 Oct 2009 02:24:43 -0700
 Prafulla Wadaskar prafu...@marvell.com wrote:
 
 
 #define UBOOT_CNTR 0   /* counter to use for 
 uboot timer */
+#define WATCHDOG_CNTR  2
  
  BTW, this declaration will not be required if you see 
 struct kwtmr_register 
 
 Well, to me it makes the code more clear, so I'd prefer to keep it.

So I would like to suggest rename it as WATCHDOG_TMR

 
 
 /* Timer reload and current value registers */
 struct kwtmr_val {
@@ -166,3 +167,31 @@ int timer_init(void)
 
return 0;
 }
+
+#if defined(CONFIG_HW_WATCHDOG)
+static unsigned long watchdog_timeout = 5;
  
  Please get rid of this magic number, Pls provide some comments
  I think just u8 are sufficient here since the time is in seconds.
  I suggest variable name as wdt_tout to keep it small
 
 I'll make it configurable through config.h, and a u8. However, I think
 watchdog_timeout is a more descriptive name here.
 
+
+   writel(time, CNTMR_VAL_REG(WATCHDOG_CNTR));
  
  Please check struct kwtmr_registers, wdt regs are named 
 differently, pls use them
 
 I can do that, but CNTMR_VAL_REG is actually defined higher up in the
 file as
 
#define CNTMR_VAL_REG(tmrnum)  
 kwtmr_regs-tmr[tmrnum].val
 
 and used for the regular timer support. I'm not sure I like that, but
 at least the file should be internally consistent.

You can update the structure to use WDT timer in the same way as other timers,
there is no sense putting additional names in structure.

 
--- a/include/asm-arm/arch-kirkwood/cpu.h
+++ b/include/asm-arm/arch-kirkwood/cpu.h
@@ -165,5 +165,7 @@ int kw_config_mpp(unsigned int mpp0_7, 
   unsigned int mpp8_15,
unsigned int mpp32_39, unsigned int mpp40_47,
unsigned int mpp48_55);
 unsigned int kw_winctrl_calcsize(unsigned int sizeval);
+void kw_watchdog_init(unsigned long timeout_secs);
  
  Functions declared here are suppose to be in cpu.c
  Moreover I think we don't need this function at all,
  You can club kw_watchdog_init with hw_watchdog_reset so 
 that at very first WATCHDOG_RESET() function call,
  watchdog timer it will be initialized.
 
 But then it's unconditionally turned on as soon as the first
 WATCHDOG_RESET() is called, which might not be what you want.
 
 In the long run, we should probably add command line support for
 enabling the watchdog (some might want to do it just before starting
 Linux for example).

You can even call WATCHDOG_RESET() from wherever from your code to enable it

Regards..
Prafulla . .

 
 // Simon
 
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[U-Boot] [PATCH] AT91RM9200: real pointer variable for PORT A to D configuration

[Jens Scharsig]

adds real pointer variable for use with use I/O accessors 

* defines for PORT A to D configuration registers
* defines for SMC configuration registers

Signed-off-by: Jens Scharsig e...@bus-elektronik.de
---

diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h 
b/include/asm-arm/arch-at91rm9200/AT91RM9200.h
index 00bae1c..1b4667e 100644
--- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h
+++ b/include/asm-arm/arch-at91rm9200/AT91RM9200.h
@@ -251,6 +251,15 @@ typedef struct _AT91S_SMC2
AT91_REG SMC2_CSR[8];   /* SMC2 Chip Select Register */
 } AT91S_SMC2, *AT91PS_SMC2;
 
+#define AT91C_SMC_CSR0 ((AT91_REG *)   0xFF70)
+#define AT91C_SMC_CSR1 ((AT91_REG *)   0xFF74)
+#define AT91C_SMC_CSR2 ((AT91_REG *)   0xFF78)
+#define AT91C_SMC_CSR3 ((AT91_REG *)   0xFF7C)
+#define AT91C_SMC_CSR4 ((AT91_REG *)   0xFF80)
+#define AT91C_SMC_CSR5 ((AT91_REG *)   0xFF84)
+#define AT91C_SMC_CSR6 ((AT91_REG *)   0xFF88)
+#define AT91C_SMC_CSR7 ((AT91_REG *)   0xFF8C)
+
 /*  SMC2_CSR : (SMC2 Offset: 0x0) SMC2 Chip Select Register   
*/
 #define AT91C_SMC2_NWS ((unsigned int) 0x7F  0) /* (SMC2) 
Number of Wait States */
 #define AT91C_SMC2_WSEN((unsigned int) 0x1   7) /* 
(SMC2) Wait State Enable */
@@ -586,6 +595,7 @@ typedef struct _AT91S_PDC
 #define AT91C_PMC_PCDR ((AT91_REG *)   0xFC14) /* (PMC) Peripheral 
Clock Enable Register */
 #define AT91C_PMC_SCER ((AT91_REG *)   0xFC00) /* (PMC) Peripheral 
Clock Enable Register */
 #define AT91C_PMC_SCDR ((AT91_REG *)   0xFC04) /* (PMC) Peripheral 
Clock Enable Register */
+
 #define AT91C_PIOA_PER ((AT91_REG *)   0xF400) /* (PIOA) PIO 
Enable Register */
 #define AT91C_PIOA_PDR ((AT91_REG *)   0xF404) /* (PIOA) PIO 
Disable Register */
 #define AT91C_PIOA_PSR ((AT91_REG *)   0xF408) /* (PIOA) PIO 
Status Register */
@@ -615,7 +625,96 @@ typedef struct _AT91S_PDC
 #define AT91C_PIOA_OWER((AT91_REG *)   0xF4A0) /* (PIOA) 
PIO Output Write Enable Register */
 #define AT91C_PIOA_OWDR((AT91_REG *)   0xF4A4) /* (PIOA) 
PIO Output Write Disable Register */
 #define AT91C_PIOA_OWSR((AT91_REG *)   0xF4A8) /* (PIOA) 
PIO Output Write Status Register */
-#define AT91C_PIOB_PDR ((AT91_REG *)   0xF604) /* (PIOB) PIO 
Disable Register */
+
+#define AT91C_PIOB_PER ((AT91_REG *)   0xF600)
+#define AT91C_PIOB_PDR ((AT91_REG *)   0xF604)
+#define AT91C_PIOB_PSR ((AT91_REG *)   0xF608)
+#define AT91C_PIOB_OER ((AT91_REG *)   0xF610)
+#define AT91C_PIOB_ODR ((AT91_REG *)   0xF614)
+#define AT91C_PIOB_OSR ((AT91_REG *)   0xF618)
+#define AT91C_PIOB_IFER((AT91_REG *)   0xF620)
+#define AT91C_PIOB_IFDR((AT91_REG *)   0xF624)
+#define AT91C_PIOB_IFSR((AT91_REG *)   0xF628)
+#define AT91C_PIOB_SODR((AT91_REG *)   0xF630)
+#define AT91C_PIOB_CODR((AT91_REG *)   0xF634)
+#define AT91C_PIOB_ODSR((AT91_REG *)   0xF638)
+#define AT91C_PIOB_PDSR((AT91_REG *)   0xF63C)
+#define AT91C_PIOB_IER ((AT91_REG *)   0xF640)
+#define AT91C_PIOB_IDR ((AT91_REG *)   0xF644)
+#define AT91C_PIOB_IMR ((AT91_REG *)   0xF648)
+#define AT91C_PIOB_ISR ((AT91_REG *)   0xF64C)
+#define AT91C_PIOB_MDER((AT91_REG *)   0xF650)
+#define AT91C_PIOB_MDDR((AT91_REG *)   0xF654)
+#define AT91C_PIOB_MDSR((AT91_REG *)   0xF658)
+#define AT91C_PIOB_PUDR((AT91_REG *)   0xF660)
+#define AT91C_PIOB_PUER((AT91_REG *)   0xF664)
+#define AT91C_PIOB_PUSR((AT91_REG *)   0xF668)
+#define AT91C_PIOB_ASR ((AT91_REG *)   0xF670)
+#define AT91C_PIOB_BSR ((AT91_REG *)   0xF674)
+#define AT91C_PIOB_ABSR((AT91_REG *)   0xF678)
+#define AT91C_PIOB_OWER((AT91_REG *)   0xF6A0)
+#define AT91C_PIOB_OWDR((AT91_REG *)   0xF6A4)
+#define AT91C_PIOB_OWSR((AT91_REG *)   0xF6A8)
+
+#define AT91C_PIOC_PER ((AT91_REG *)   0xF800)
+#define AT91C_PIOC_PDR ((AT91_REG *)   0xF804)
+#define AT91C_PIOC_PSR ((AT91_REG *)   0xF808)
+#define AT91C_PIOC_OER ((AT91_REG *)   0xF810)
+#define AT91C_PIOC_ODR ((AT91_REG *)   0xF814)
+#define AT91C_PIOC_OSR ((AT91_REG *)   0xF818)
+#define AT91C_PIOC_IFER((AT91_REG *)   0xF820)
+#define AT91C_PIOC_IFDR((AT91_REG *)   0xF824)
+#define AT91C_PIOC_IFSR((AT91_REG 

Re: [U-Boot] [PATCH] AT91RM9200: real pointer variable for PORT A to D configuration

[Jens Scharsig]

 adds real pointer variable for use with use I/O accessors 
 
 * defines for PORT A to D configuration registers
 * defines for SMC configuration registers
 
 Signed-off-by: Jens Scharsig e...@bus-elektronik.de

This includes all changes from 
[PATCH] AT91RM9200 BGA port D defines 

Best regards

Jens Scharsig

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Re: [U-Boot] [PATCH V3 1/4] add TI DA8xx support: DA8xx includes

[Tom]

Nick Thompson wrote:
 Wolfgang Denk wrote:
 Dear Nick Thompson,

 In message 4ae5dffd.2090...@gefanuc.com you wrote:
 Provides initial support for TI OMAP-L1x/DA8xx SoC devices.
 See http://www.ti.com

 The DA8xx devices are similar to DaVinci devices but have a differing
 memory map and updated peripheral versions.

 Signed-off-by: Nick Thompson nick.thomp...@gefanuc.com
 ---
 ...
 +/* required by davinci drivers */
 Is this really an essential comment? Drop it!

  #defineREG(addr)   (*(volatile unsigned int *)(addr))
 -#define REG_P(addr)((volatile unsigned int *)(addr))
  
 +/* required by davinci drivers */
 Ditto.

  typedef volatile unsigned int  dv_reg;
  typedef volatile unsigned int *dv_reg_p;
 ...

 +/* for LPSCs in PSC1, 32 + actual id is being used for differentiation */
 +#define DAVINCI_LPSC_BASE  32
 +#define DAVINCI_LPSC_USB11 (DAVINCI_LPSC_BASE + 1)
 +#define DAVINCI_LPSC_USB20 (DAVINCI_LPSC_BASE + 2)
 +#define DAVINCI_LPSC_GPIO  (DAVINCI_LPSC_BASE + 3)
 +#define DAVINCI_LPSC_UHPI  (DAVINCI_LPSC_BASE + 4)
 +#define DAVINCI_LPSC_EMAC  (DAVINCI_LPSC_BASE + 5)
 +#define DAVINCI_LPSC_DDR_EMIF  (DAVINCI_LPSC_BASE + 6)
 +#define DAVINCI_LPSC_McASP0(DAVINCI_LPSC_BASE + 7)
 +#define DAVINCI_LPSC_McASP1(DAVINCI_LPSC_BASE + 8)
 +#define DAVINCI_LPSC_McASP2(DAVINCI_LPSC_BASE + 9)
 +#define DAVINCI_LPSC_SPI1  (DAVINCI_LPSC_BASE + 10)
 +#define DAVINCI_LPSC_I2C1  (DAVINCI_LPSC_BASE + 11)
 +#define DAVINCI_LPSC_UART1 (DAVINCI_LPSC_BASE + 12)
 +#define DAVINCI_LPSC_UART2 (DAVINCI_LPSC_BASE + 13)
 +#define DAVINCI_LPSC_LCDC  (DAVINCI_LPSC_BASE + 16)
 +#define DAVINCI_LPSC_ePWM  (DAVINCI_LPSC_BASE + 17)
 +#define DAVINCI_LPSC_eCAP  (DAVINCI_LPSC_BASE + 20)
 +#define DAVINCI_LPSC_eQEP  (DAVINCI_LPSC_BASE + 21)
 +#define DAVINCI_LPSC_SCR_P0(DAVINCI_LPSC_BASE + 22)
 +#define DAVINCI_LPSC_SCR_P1(DAVINCI_LPSC_BASE + 23)
 +#define DAVINCI_LPSC_CR_P3 (DAVINCI_LPSC_BASE + 26)
 +#define DAVINCI_LPSC_L3_CBA_RAM(DAVINCI_LPSC_BASE + 31)
 I think you actually want to use a C struct here, like in many other
 places.

 Please do not access device registers using plain pointers like (base
 address plus offet), but always use I/O accessors with C structs, so
 we can have strict type checking by the compiler.
 
 As I mentioned in the patch introduction [PATCH V3 0/4]... there are
 several places where out of fashion code is present in these patches.
 
 DA8xx SoC's are considered a member of the DaVinci family of SoC's and
 so these headers need to maintain compatibility with the relevant
 drivers already in the U-Boot git tree.
 
 Those drivers do not use C structures and I/O accessors and so require
 the use of #defines as presented here.
 
 Where possible I have not used legacy code forms in new code, but in
 the case of new code that also has to use these same registers, I have
 again opted for compatibility.
 
 Of course I could duplicate the definitions as defines /and/ C structs,
 or even rewrite all the DaVinci family drivers, but I'm hoping neither
 of those options was the intention of your comments here.
 
 Can you please confirm whether my assumptions as correct and acceptable
 in this case? I.e. (as Tom Rix put it) Can I get a pass on this one?
 
 I think you have a point in the PINMUX cases below however, as I believe
 these #defines are only used in SoC specific code...
 
 Best Regards,
 Nick
 

There are a large number of #define's in davinci that could be
converted to structures.  My opinion is that da8xx sharing code
with davinci is a big enough change.  The reworking of basic
davici register calling through structs falls outside of what
I expect.

The cleanup on the calling I am looking for is switching
for direct access to registers to calling them through readl/writel.

Tom

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Re: [U-Boot] [PATCH] arm:kirkwood: Add hardware watchdog support for Marvell Kirkwood boards

[Simon Kagstrom]

On Wed, 28 Oct 2009 04:34:10 -0700
Prafulla Wadaskar prafu...@marvell.com wrote:

 #define CNTMR_VAL_REG(tmrnum)
  kwtmr_regs-tmr[tmrnum].val
  
  and used for the regular timer support. I'm not sure I like that, but
  at least the file should be internally consistent.
 
 You can update the structure to use WDT timer in the same way as other timers,
 there is no sense putting additional names in structure.

But I'm not - the WDT timer is used in the same way as the other timer.
The only difference is the added WATCHDOG_TMR define which specifies
which Kirkwood timer to use as a watchdog.

  But then it's unconditionally turned on as soon as the first
  WATCHDOG_RESET() is called, which might not be what you want.
  
  In the long run, we should probably add command line support for
  enabling the watchdog (some might want to do it just before starting
  Linux for example).
 
 You can even call WATCHDOG_RESET() from wherever from your code to enable it

Sure, but WATCHDOG_RESET() will be called anyway (and probably before
my code), so it will be enabled anyhow in that case. My point is that
sometimes you don't want the watchdog to get started directly, hence
the function to enable it.

// Simon
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Re: [U-Boot] [PATCH] arm:kirkwood: Add hardware watchdog support for Marvell Kirkwood boards

[Prafulla Wadaskar]

 

 -Original Message-
 From: Simon Kagstrom [mailto:simon.kagst...@netinsight.net] 
 Sent: Wednesday, October 28, 2009 6:14 PM
 To: Prafulla Wadaskar
 Cc: u-boot@lists.denx.de
 Subject: Re: [PATCH] arm:kirkwood: Add hardware watchdog 
 support for Marvell Kirkwood boards
 
 On Wed, 28 Oct 2009 04:34:10 -0700
 Prafulla Wadaskar prafu...@marvell.com wrote:
 
  #define CNTMR_VAL_REG(tmrnum)  
   kwtmr_regs-tmr[tmrnum].val
   
   and used for the regular timer support. I'm not sure I 
 like that, but
   at least the file should be internally consistent.
  
  You can update the structure to use WDT timer in the same 
 way as other timers,
  there is no sense putting additional names in structure.
 
 But I'm not - the WDT timer is used in the same way as the 
 other timer.

So the kwtmr_register structure clean up can be a separate patch.

 The only difference is the added WATCHDOG_TMR define which specifies
 which Kirkwood timer to use as a watchdog.

Ack

 
   But then it's unconditionally turned on as soon as the first
   WATCHDOG_RESET() is called, which might not be what you want.
   
   In the long run, we should probably add command line support for
   enabling the watchdog (some might want to do it just 
 before starting
   Linux for example).
  
  You can even call WATCHDOG_RESET() from wherever from your 
 code to enable it
 
 Sure, but WATCHDOG_RESET() will be called anyway (and probably before
 my code), so it will be enabled anyhow in that case. My point is that
 sometimes you don't want the watchdog to get started directly, hence
 the function to enable it.

That is also valid point,
This will be the generic need for all architectures.
Lets introduce WATCHDOG_INIT() as new generic interface.

What do you think?

Regards..
Prafulla . .

 
 // Simon
 
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Re: [U-Boot] [PATCH] arm:kirkwood: Add hardware watchdog support for Marvell Kirkwood boards

[Simon Kagstrom]

On Wed, 28 Oct 2009 05:57:34 -0700
Prafulla Wadaskar prafu...@marvell.com wrote:

  Sure, but WATCHDOG_RESET() will be called anyway (and probably before
  my code), so it will be enabled anyhow in that case. My point is that
  sometimes you don't want the watchdog to get started directly, hence
  the function to enable it.
 
 That is also valid point,
 This will be the generic need for all architectures.
 Lets introduce WATCHDOG_INIT() as new generic interface.

Yes, something like that. What I was thinking was a 

   void watchdog_enable(unsigned int timeout_secs);

   void watchdog_disable(void);

and a command-line interface to go with these. I'm cooking up a patch
with this.

// Simon
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[U-Boot] [PATCH] omap3evm: musb: add USB config

[Ajay Kumar Gupta]

Added USB host and device config for host (MSC, Keyboard) and
device (ACM) functionalities.

Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
This patch is intended to be applied on top of recent OMAP3 musb
patches from Tom Rix.

 include/configs/omap3_evm.h |   39 +++
 1 files changed, 39 insertions(+), 0 deletions(-)

diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index a5514ae..cbefbb1 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -101,6 +101,44 @@
 #define CONFIG_OMAP3_MMC   1
 #define CONFIG_DOS_PARTITION   1
 
+/* USB
+ * Enable CONFIG_MUSB_HCD for Host functionalities MSC, keyboard
+ * Enable CONFIG_MUSB_UDD for Device functionalities.
+ */
+#define CONFIG_USB_OMAP3   1
+#define CONFIG_MUSB_HCD1
+/* #define CONFIG_MUSB_UDC 1 */
+
+#ifdef CONFIG_USB_OMAP3
+
+#ifdef CONFIG_MUSB_HCD
+#define CONFIG_CMD_USB
+
+#define CONFIG_USB_STORAGE
+#define CONGIG_CMD_STORAGE
+#define CONFIG_CMD_FAT
+
+#ifdef CONFIG_USB_KEYBOARD
+#define CONFIG_SYS_USB_EVENT_POLL
+#define CONFIG_PREBOOT usb start
+#endif /* CONFIG_USB_KEYBOARD */
+
+#endif /* CONFIG_MUSB_HCD */
+
+#ifdef CONFIG_MUSB_UDC
+/* USB device configuration */
+#define CONFIG_USB_DEVICE  1
+#define CONFIG_USB_TTY 1
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV   1
+/* Change these to suit your needs */
+#define CONFIG_USBD_VENDORID   0x0451
+#define CONFIG_USBD_PRODUCTID  0x5678
+#define CONFIG_USBD_MANUFACTURER   Texas Instruments
+#define CONFIG_USBD_PRODUCT_NAME   EVM
+#endif /* CONFIG_MUSB_UDC */
+
+#endif /* CONFIG_USB_OMAP3 */
+
 /* commands to include */
 #include config_cmd_default.h
 
@@ -159,6 +197,7 @@
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
loadaddr=0x8200\0 \
+   usbtty=cdc_acm\0 \
console=ttyS2,115200n8\0 \
mmcargs=setenv bootargs console=${console}  \
root=/dev/mmcblk0p2 rw  \
-- 
1.6.2.4

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[U-Boot] [STATUS] v2009.11-rc1 is out

[Wolfgang Denk]

Helleo all,

just in case you did not notice yet: U-Boot v2009.11-rc1 was released
last night.

Summary of state:

ARM: lots of issues:
=

1) SBC35_A9G20:

nand_util.c:45:2: warning: #warning Please define 
CONFIG_SYS_64BIT_VSPRINTF for correct output!
m41t94.c: In function 'rtc_reset':
m41t94.c:123: warning: 'return' with a value, in function returning void

2) TNY_A9260.ERR, TNY_A9G20.ERR:

nand_util.c:45:2: warning: #warning Please define 
CONFIG_SYS_64BIT_VSPRINTF for correct output!

3) apollon:

/bin/sh: /work/wd/tmp-arm/include/config.h: No such file or directory
make: *** [apollon_config] Error 1
System not configured - see README

Out-o-tree build fails

4) cradle:

zlib.c:401:1: warning: OFF redefined
In file included from /work/wd/tmp-arm/include/config.h:2,
 from /home/wd/git/u-boot/work/include/common.h:37,
 from zlib.c:30:
/home/wd/git/u-boot/work/include/configs/cradle.h:337:1: warning: this 
is the location of the previous definition

5) csb226, impa7:

cs8900.c:112:50: error: macro get_reg_init_bus passed 2 arguments, 
but takes just 1
cs8900.c: In function 'cs8900_reset':
cs8900.c:112: error: 'get_reg_init_bus' undeclared (first use in this 
function)
cs8900.c:112: error: (Each undeclared identifier is reported only once
cs8900.c:112: error: for each function it appears in.)
cs8900.c:137:37: error: macro get_reg_init_bus passed 2 arguments, 
but takes just 1
cs8900.c: In function 'cs8900_get_enetaddr':
cs8900.c:137: error: 'get_reg_init_bus' undeclared (first use in this 
function)
cs8900.c:161:33: error: macro get_reg_init_bus passed 2 arguments, 
but takes just 1
cs8900.c: In function 'cs8900_halt':
cs8900.c:161: error: 'get_reg_init_bus' undeclared (first use in this 
function)
cs8900.c:170:38: error: macro get_reg_init_bus passed 2 arguments, 
but takes just 1
cs8900.c: In function 'cs8900_init':
cs8900.c:170: error: 'get_reg_init_bus' undeclared (first use in this 
function)
make[1]: *** [/work/wd/tmp-arm/drivers/net/cs8900.o] Error 1

6) imx27lite:

mxcmmc.c: In function 'mxcmci_softreset':
mxcmmc.c:139: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c:140: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c:144: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c:146: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c: In function 'mxcmci_setup_data':
mxcmmc.c:157: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c:158: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c: In function 'mxcmci_start_cmd':
mxcmmc.c:188: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c:190: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c: In function 'mxcmci_read_response':
mxcmmc.c:250: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c:251: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c:255: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c:256: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c:257: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c: In function 'mxcmci_set_clk_rate':
mxcmmc.c:448: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c: In function 'mxcmci_set_ios':
mxcmmc.c:461: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c:463: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c: In function 'mxcmci_init':
mxcmmc.c:475: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
mxcmmc.c:483: warning: dereferencing type-punned pointer will break 
strict-aliasing rules
nand_util.c:45:2: warning: #warning Please define 
CONFIG_SYS_64BIT_VSPRINTF for correct output!

7) lpd7a400:

smc9_eeprom.c: In function 'smc9_eeprom':
smc9_eeprom.c:76: warning: implicit declaration of function 
'SMC_inw'
smc9_eeprom.c:224: warning: implicit declaration of function 
'SMC_outw'
smc9_eeprom.c: In function 'print_macaddr':
smc9_eeprom.c:278: warning: implicit declaration of function 
'SMC_inb'
/work/wd/tmp-arm/examples/standalone/smc9_eeprom.o: In function 
`dump_reg':

[U-Boot] NAND and new board

[David Kaplan]

I'm trying to add config for a new board (custom board with s3c2410). I am
confused about how to define NAND mem.
The chip in question is a Samsung K9F5608U0D (32M NAND).

I have noticed various nand.c files in board/*. Are any of those good enough
for me (and I can add to my board) or do I need to build my own? If I need
to do it myself, would anyone be able to provide a few pointers?
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[U-Boot] [PATCH] ppc/p4080: Added p4080 SERDES registers USB offset

[Kumar Gala]

Added immap definition for SERDES registers on p4080, the USB offset
(since it was missing) and a GPL header.

Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
 include/asm-ppc/immap_85xx.h |   83 ++
 1 files changed, 83 insertions(+), 0 deletions(-)

diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 4194295..0ce93e3 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -6,6 +6,23 @@
  * Copyright(c) 2002,2003 Motorola Inc.
  * Xianghua Xiao (x.x...@motorola.com)
  *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
  */
 
 #ifndef __IMMAP_85xx__
@@ -1847,17 +1864,81 @@ typedef struct ccsr_gur {
 } ccsr_gur_t;
 #endif
 
+typedef struct serdes_corenet {
+   struct {
+   u32 rstctl; /* Reset Control Register */
+#define SRDS_RSTCTL_RST0x8000
+#define SRDS_RSTCTL_RSTDONE0x4000
+#define SRDS_RSTCTL_RSTERR 0x2000
+   u32 pllcr0; /* PLL Control Register 0 */
+   u32 pllcr1; /* PLL Control Register 1 */
+   u32 res[5];
+   } bank[3];
+   u32 res1[12];
+   u32 srdstcalcr; /* TX Calibration Control */
+   u32 res2[3];
+   u32 srdsrcalcr; /* RX Calibration Control */
+   u32 res3[3];
+   u32 srdsgr0;/* General Register 0 */
+   u32 res4[11];
+   u32 srdspccr0;  /* Protocol Converter Config 0 */
+   u32 srdspccr1;  /* Protocol Converter Config 1 */
+   u32 srdspccr2;  /* Protocol Converter Config 2 */
+   u32 res5[197];
+   struct {
+   u32 gcr0;   /* General Control Register 0 */
+#define SRDS_GCR0_1STLANE  0x0001
+   u32 gcr1;   /* General Control Register 1 */
+#define SRDS_GCR1_REIDL_CTL_MASK   0x001f
+#define SRDS_GCR1_REIDL_CTL_PCIE   0x0010
+#define SRDS_GCR1_REIDL_CTL_SRIO   0x
+#define SRDS_GCR1_REIDL_CTL_SGMII  0x0004
+#define SRDS_GCR1_OPAD_CTL 0x0400
+   u32 res1[4];
+   u32 tecr0;  /* TX Equalization Control Reg 0 */
+#define SRDS_TECR0_TEQ_TYPE_MASK   0x3000
+#define SRDS_TECR0_TEQ_TYPE_2LVL   0x1000
+   u32 res3;
+   u32 ttlcr0; /* Transition Tracking Loop Ctrl 0 */
+   u32 res4[7];
+   } lane[24];
+   u32 res6[384];
+} serdes_corenet_t;
+
+enum {
+   FSL_SRDS_B1_LANE_A = 0,
+   FSL_SRDS_B1_LANE_B = 1,
+   FSL_SRDS_B1_LANE_C = 2,
+   FSL_SRDS_B1_LANE_D = 3,
+   FSL_SRDS_B1_LANE_E = 4,
+   FSL_SRDS_B1_LANE_F = 5,
+   FSL_SRDS_B1_LANE_G = 6,
+   FSL_SRDS_B1_LANE_H = 7,
+   FSL_SRDS_B1_LANE_I = 8,
+   FSL_SRDS_B1_LANE_J = 9,
+   FSL_SRDS_B2_LANE_A = 16,
+   FSL_SRDS_B2_LANE_B = 17,
+   FSL_SRDS_B2_LANE_C = 18,
+   FSL_SRDS_B2_LANE_D = 19,
+   FSL_SRDS_B3_LANE_A = 20,
+   FSL_SRDS_B3_LANE_B = 21,
+   FSL_SRDS_B3_LANE_C = 22,
+   FSL_SRDS_B3_LANE_D = 23,
+};
+
 #ifdef CONFIG_FSL_CORENET
 #define CONFIG_SYS_FSL_CORENET_CCM_OFFSET  0x
 #define CONFIG_SYS_MPC85xx_DDR_OFFSET  0x8000
 #define CONFIG_SYS_MPC85xx_DDR2_OFFSET 0x9000
 #define CONFIG_SYS_FSL_CORENET_CLK_OFFSET  0xE1000
 #define CONFIG_SYS_FSL_CORENET_RCPM_OFFSET 0xE2000
+#define CONFIG_SYS_FSL_CORENET_SERDES_OFFSET   0xEA000
 #define CONFIG_SYS_MPC85xx_DMA_OFFSET  0x10
 #define CONFIG_SYS_MPC85xx_ESPI_OFFSET 0x11
 #define CONFIG_SYS_MPC85xx_ESDHC_OFFSET0x114000
 #define CONFIG_SYS_MPC85xx_LBC_OFFSET  0x124000
 #define CONFIG_SYS_MPC85xx_GPIO_OFFSET 0x13
+#define CONFIG_SYS_MPC85xx_USB_OFFSET  0x21
 #define CONFIG_SYS_FSL_CORENET_QMAN_OFFSET 0x318000
 #define CONFIG_SYS_FSL_CORENET_BMAN_OFFSET 0x31a000
 #else
@@ -1929,6 +2010,8 @@ typedef struct ccsr_gur {
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_SERDES2_OFFSET)
 #define CONFIG_SYS_MPC85xx_SERDES2_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_SERDES2_OFFSET)
+#define 

[U-Boot] [PATCH] 85xx: Add support for e500mc cache stashing

[Kumar Gala]

The e500mc core supports the ability to stash into the L1 or L2 cache,
however we need to uniquely identify the caches with an id.

We use the following equation to set the various stash-ids:

32 + coreID*2 + 0(L1) or 1(L2)

The 0 (for L1) or 1 (for L2) matches the CT field used be various cache
control instructions.

Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
 cpu/mpc85xx/cpu_init.c |5 +
 cpu/mpc85xx/fdt.c  |   18 ++
 cpu/mpc85xx/release.S  |   13 +
 cpu/mpc85xx/start.S|8 +++-
 4 files changed, 43 insertions(+), 1 deletions(-)

diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index 0041a60..16ce82c 100644
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -357,6 +357,11 @@ int cpu_init_r(void)
while (mfspr(SPRN_L2CSR0)  (L2CSR0_L2FI|L2CSR0_L2LFC))
;
 
+#ifdef CONFIG_SYS_CACHE_STASHING
+   /* set stash id to (coreID) * 2 + 32 + L2 (1) */
+   mtspr(SPRN_L2CSR1, (32 + 1));
+#endif
+
/* enable the cache */
mtspr(SPRN_L2CSR0, CONFIG_SYS_INIT_L2CSR0);
 
diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c
index de2dcac..5f9aeb1 100644
--- a/cpu/mpc85xx/fdt.c
+++ b/cpu/mpc85xx/fdt.c
@@ -197,6 +197,15 @@ static inline void ft_fixup_l2cache(void *blob)
goto next;
}
 
+#ifdef CONFIG_SYS_CACHE_STASHING
+   {
+   u32 *reg = (u32 *)fdt_getprop(blob, off, reg, 0);
+   if (reg)
+   fdt_setprop_cell(blob, l2_off, cache-stash-id,
+(*reg * 2) + 32 + 1);
+   }
+#endif
+
fdt_setprop(blob, l2_off, cache-unified, NULL, 0);
fdt_setprop_cell(blob, l2_off, cache-block-size, line_size);
fdt_setprop_cell(blob, l2_off, cache-size, size);
@@ -252,6 +261,15 @@ static inline void ft_fixup_cache(void *blob)
fdt_setprop_cell(blob, off, d-cache-size, dsize);
fdt_setprop_cell(blob, off, d-cache-sets, dnum_sets);
 
+#ifdef CONFIG_SYS_CACHE_STASHING
+   {
+   u32 *reg = (u32 *)fdt_getprop(blob, off, reg, 0);
+   if (reg)
+   fdt_setprop_cell(blob, off, cache-stash-id,
+(*reg * 2) + 32 + 0);
+   }
+#endif
+
/* i-side config */
isize = (l1cfg1  0x7ff) * 1024;
inum_ways = ((l1cfg1  11)  0xff) + 1;
diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S
index a1ae78a..58c2bb9 100644
--- a/cpu/mpc85xx/release.S
+++ b/cpu/mpc85xx/release.S
@@ -99,6 +99,13 @@ __secondary_start_page:
slwir8,r4,5
add r10,r3,r8
 
+#if defined(CONFIG_E500MC)  defined(CONFIG_SYS_CACHE_STASHING)
+   /* set stash id to (coreID) * 2 + 32 + L1 CT (0) */
+   slwir8,r4,1
+   addir8,r8,32
+   mtspr   L1CSR2,r8
+#endif
+
 #ifdef CONFIG_BACKSIDE_L2_CACHE
/* Enable/invalidate the L2 cache */
msync
@@ -110,6 +117,12 @@ __secondary_start_page:
andis.  r1,r3,l2csr0_l...@h
bne 1b
 
+#ifdef CONFIG_SYS_CACHE_STASHING
+   /* set stash id to (coreID) * 2 + 32 + L2 (1) */
+   addir3,r8,1
+   mtspr   SPRN_L2CSR1,r3
+#endif
+
lis r3,config_sys_init_l2c...@h
ori r3,r3,config_sys_init_l2c...@l
mtspr   SPRN_L2CSR0,r3
diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index 6a86528..7e60e67 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -1,5 +1,5 @@
 /*
- * Copyright 2004, 2007-2009 Freescale Semiconductor.
+ * Copyright 2004, 2007-2009 Freescale Semiconductor, Inc.
  * Copyright (C) 2003  Motorola,Inc.
  *
  * See file CREDITS for list of people who contributed to this
@@ -102,6 +102,12 @@ _start_e500:
 *
 */
 
+#if defined(CONFIG_E500MC)  defined(CONFIG_SYS_CACHE_STASHING)
+   /* set stash id to (coreID) * 2 + 32 + L1 CT (0) */
+   li  r2,(32 + 0)
+   mtspr   L1CSR2,r2
+#endif
+
lis r2,l1csr0_...@h /* enable parity */
ori r2,r2,L1CSR0_DCE
mtspr   L1CSR0,r2   /* enable L1 Dcache */
-- 
1.6.0.6

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[U-Boot] [PATCH 0/2]: Watchdog support from the command line

[Simon Kagstrom]

Hi!

These two patches add a generic watchdog CLI command and a driver for
the watchdog on Marvell Kirkwood that uses it.

The command usage is

  watchdog - Watchdog commands

  Usage:
  watchdog timeout- start the watchdog with `timeout' seconds timeout
  watchdog off  - stop the watchdog (can't be done on all boards)

// Simon
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[U-Boot] [PATCH 1/2]: common: Add a watchdog CLI command

[Simon Kagstrom]

A watchdog command to enable the watchdog with a timeout or disable it
can sometimes be useful. Add that. This also adds a common API for
enabling or disabling watchdogs. The API is simple:

void watchdog_enable(unsigned int timeout);
void watchdog_disable(void);

disabling the watchdog might or might not be possible depending on the
hardware, and the timeout range can also vary in the same way.

Signed-off-by: Simon Kagstrom simon.kagst...@netinsight.net
---
 common/Makefile   |1 +
 common/cmd_watchdog.c |   61 +
 include/watchdog.h|9 +++
 3 files changed, 71 insertions(+), 0 deletions(-)
 create mode 100644 common/cmd_watchdog.c

diff --git a/common/Makefile b/common/Makefile
index 3781738..f14ba0e 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -160,6 +160,7 @@ COBJS-$(CONFIG_LYNXKDI) += lynxkdi.o
 COBJS-$(CONFIG_MODEM_SUPPORT) += modem.o
 COBJS-$(CONFIG_UPDATE_TFTP) += update.o
 COBJS-$(CONFIG_USB_KEYBOARD) += usb_kbd.o
+COBJS-$(CONFIG_CMD_WATCHDOG) += cmd_watchdog.o
 
 
 COBJS  := $(sort $(COBJS-y))
diff --git a/common/cmd_watchdog.c b/common/cmd_watchdog.c
new file mode 100644
index 000..d26be4f
--- /dev/null
+++ b/common/cmd_watchdog.c
@@ -0,0 +1,61 @@
+/*
+ * (C) Copyright 2009
+ * Net Insight www.netinsight.net
+ * Written-by: Simon Kagstrom simon.kagst...@netinsight.net
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include common.h
+#include watchdog.h
+
+static int do_watchdog(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+   const char *cmd;
+   char *endp;
+   int timeout;
+
+   /* need one argument */
+   if (argc != 2)
+   goto usage;
+
+   cmd = argv[1];
+
+   if (strcmp(cmd, off) == 0) {
+   watchdog_disable();
+   return 0;
+   }
+   timeout = simple_strtoul(cmd, endp, 0);
+   if (endp == cmd)
+   goto usage;
+   if (timeout  0)
+   goto usage;
+
+   /* Everything fine, enable the watchdog */
+   watchdog_enable(timeout);
+
+   return 0;
+usage:
+   cmd_usage(cmdtp);
+   return 1;
+}
+
+U_BOOT_CMD(
+   watchdog, 2, 0, do_watchdog,
+   Watchdog commands,
+   timeout  - start the watchdog with `timeout' seconds timeout\n
+   watchdog off   - stop the watchdog (can't be done on all 
boards)\n
+);
diff --git a/include/watchdog.h b/include/watchdog.h
index 9265be9..953cf61 100644
--- a/include/watchdog.h
+++ b/include/watchdog.h
@@ -70,6 +70,15 @@
#endif /* CONFIG_WATCHDOG  !__ASSEMBLY__ */
 #endif /* CONFIG_HW_WATCHDOG */
 
+#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
+extern void watchdog_enable(unsigned int timeout_secs);
+
+extern void watchdog_disable(void);
+#else
+static inline void watchdog_enable(unsigned int timeout_secs) { }
+static inline void watchdog_disable(void) { }
+#endif
+
 /*
  * Prototypes from $(CPU)/cpu.c.
  */
-- 
1.6.0.4

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[U-Boot] [PATCH 2/2]: arm:kirkwood: Add hardware watchdog support for Marvell Kirkwood boards

[Simon Kagstrom]

Initialize by calling the generic API watchdog_enable() with the number
of seconds for the watchdog to timeout. It's not possible to disable the
watchdog once it's on.

Signed-off-by: Simon Kagstrom simon.kagst...@netinsight.net
---
ChangeLog:

 v2: (Some of the comments from Prafulla)
   * Use readl/writel
   * Rename WATCHDOG_CNTR - WATCHDOG_TMR

 cpu/arm926ejs/kirkwood/timer.c |   37 +
 1 files changed, 37 insertions(+), 0 deletions(-)

diff --git a/cpu/arm926ejs/kirkwood/timer.c b/cpu/arm926ejs/kirkwood/timer.c
index 817ff42..797ab04 100644
--- a/cpu/arm926ejs/kirkwood/timer.c
+++ b/cpu/arm926ejs/kirkwood/timer.c
@@ -23,8 +23,10 @@
 
 #include common.h
 #include asm/arch/kirkwood.h
+#include watchdog.h
 
 #define UBOOT_CNTR 0   /* counter to use for uboot timer */
+#define WATCHDOG_TMR   2
 
 /* Timer reload and current value registers */
 struct kwtmr_val {
@@ -166,3 +168,38 @@ int timer_init(void)
 
return 0;
 }
+
+#if defined(CONFIG_HW_WATCHDOG)
+static unsigned long watchdog_timeout = 5;
+void hw_watchdog_reset(void)
+{
+   u32 time = CONFIG_SYS_TCLK * watchdog_timeout;
+
+   writel(time, CNTMR_VAL_REG(WATCHDOG_TMR));
+}
+
+void watchdog_enable(unsigned int timeout_secs)
+{
+   struct kwcpu_registers *cpureg =
+   (struct kwcpu_registers *)KW_CPU_REG_BASE;
+   u32 rstoutn_mask;
+   u32 cntmrctrl;
+
+   watchdog_timeout = timeout_secs;
+   /* Enable CPU reset if watchdog expires */
+   rstoutn_mask = readl(cpureg-rstoutn_mask);
+   writel(rstoutn_mask |= WATCHDOG_TMR, cpureg-rstoutn_mask);
+   hw_watchdog_reset();
+
+   /* Enable the watchdog */
+   cntmrctrl = readl(CNTMR_CTRL_REG);
+   cntmrctrl |= CTCR_ARM_TIMER_EN(WATCHDOG_TMR);
+   cntmrctrl |= CTCR_ARM_TIMER_AUTO_EN(WATCHDOG_TMR);
+   writel(cntmrctrl, CNTMR_CTRL_REG);
+}
+
+void watchdog_disable(void)
+{
+   /* Can't be done */
+}
+#endif
-- 
1.6.0.4

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[U-Boot] [PATCH] allow MCF532x to use CONFIG_MONITOR_IS_IN_RAM

[Wolfgang Wegner]

CONFIG_MONITOR_IS_IN_RAM is broken for MCF532x (and all other
processors having RAM located above the FLASH area). This patch
fixes this by conditionally
- removing the vector table at the beginning of code (MCF532x)
- not overwriting the vector base register (MCF532x)
- removing the code to re-set the PLL, which effectively disables
  SDRAM access (MCF532x)
- fixing the preprocessor condition to switch monitor protection
  off (all architectures)

Signed-off-by: Wolfgang Wegner w.weg...@astro-kom.de
---
 cpu/mcf532x/speed.c |3 +++
 cpu/mcf532x/start.S |4 
 drivers/mtd/cfi_flash.c |2 +-
 3 files changed, 8 insertions(+), 1 deletions(-)

diff --git a/cpu/mcf532x/speed.c b/cpu/mcf532x/speed.c
index 0d378e6..67f08c7 100644
--- a/cpu/mcf532x/speed.c
+++ b/cpu/mcf532x/speed.c
@@ -204,6 +204,8 @@ int clock_pll(int fsys, int flags)
fout = ((fref * mfd) / (BUSDIV * 4));
 #endif
 
+/* must not tamper with SDRAMC if running from SDRAM */
+#if !defined(CONFIG_MONITOR_IS_IN_RAM)
/*
 * Check to see if the SDRAM has already been initialized.
 * If it has then the SDRAM needs to be put into self refresh
@@ -254,6 +256,7 @@ int clock_pll(int fsys, int flags)
 
/* wait for DQS logic to relock */
for (i = 0; i  0x200; i++) ;
+#endif /* !defined(CONFIG_MONITOR_IS_IN_RAM) */
 
return fout;
 }
diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S
index ff13a9f..5b134aa 100644
--- a/cpu/mcf532x/start.S
+++ b/cpu/mcf532x/start.S
@@ -45,6 +45,7 @@
addl#60,%sp;/* space for 15 regs */ \
rte;
 
+#if !defined(CONFIG_MONITOR_IS_IN_RAM)
 .text
 /*
  * Vector table. This is used for initial platform startup.
@@ -121,6 +122,7 @@ vector192_255:
 .long  _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 .long  _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 .long  _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+#endif /* !defined(CONFIG_MONITOR_IS_IN_RAM) */
 
.text
 
@@ -130,9 +132,11 @@ _start:
nop
move.w #0x2700,%sr  /* Mask off Interrupt */
 
+#if !defined(CONFIG_MONITOR_IS_IN_RAM)
/* Set vector base register at the beginning of the Flash */
move.l  #CONFIG_SYS_FLASH_BASE, %d0
movec   %d0, %VBR
+#endif
 
move.l  #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
movec   %d0, %RAMBAR1
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 6eea49a..4e8f5bf 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -2095,7 +2095,7 @@ unsigned long flash_init (void)
}
 
/* Monitor protection ON by default */
-#if (CONFIG_SYS_MONITOR_BASE = CONFIG_SYS_FLASH_BASE)
+#if (CONFIG_SYS_MONITOR_BASE = CONFIG_SYS_FLASH_BASE)  
(!defined(CONFIG_MONITOR_IS_IN_RAM))
flash_protect (FLAG_PROTECT_SET,
   CONFIG_SYS_MONITOR_BASE,
   CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,
-- 
1.5.6.5

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[U-Boot] u-boot.bin

[David Kaplan]

What sort of generated file size should i expect for the u-boot.bin file? I
know it's impossible for anyone to tell me exactly, but in what region of
sizes are we talking?
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Re: [U-Boot] u-boot.bin

[Jerry Van Baren]

Hi David,

David Kaplan wrote:
 What sort of generated file size should i expect for the u-boot.bin file? I
 know it's impossible for anyone to tell me exactly, but in what region of
 sizes are we talking?

256K...384K.

If you are looking at a multi-mega/gigabyte .bin file, it is usually 
because your memory map has a *large* empty space in it.  This is 
typically due to interrupt vectors and the executable portions being 
widely separated.  When creating the .bin file, the Makefile fills empty 
spaces with 0xFF (IIRC).

You can use ${CROSS_COMPILE}objdump -h (and other options) to see what 
is in your .elf file and where things are located.

gvb

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Re: [U-Boot] [PATCH 1/2]: common: Add a watchdog CLI command

[Prafulla Wadaskar]

 

 -Original Message-
 From: Simon Kagstrom [mailto:simon.kagst...@netinsight.net] 
 Sent: Wednesday, October 28, 2009 7:44 PM
 To: U-Boot ML; Prafulla Wadaskar
 Subject: [PATCH 1/2]: common: Add a watchdog CLI command
 
 A watchdog command to enable the watchdog with a timeout or disable it
 can sometimes be useful. Add that. This also adds a common API for
 enabling or disabling watchdogs. The API is simple:
 
 void watchdog_enable(unsigned int timeout);
 void watchdog_disable(void);
 
 disabling the watchdog might or might not be possible depending on the
 hardware, and the timeout range can also vary in the same way.
 
 Signed-off-by: Simon Kagstrom simon.kagst...@netinsight.net
 ---
  common/Makefile   |1 +
  common/cmd_watchdog.c |   61 
 +
  include/watchdog.h|9 +++
  3 files changed, 71 insertions(+), 0 deletions(-)
  create mode 100644 common/cmd_watchdog.c
 
 diff --git a/common/Makefile b/common/Makefile
 index 3781738..f14ba0e 100644
 --- a/common/Makefile
 +++ b/common/Makefile
 @@ -160,6 +160,7 @@ COBJS-$(CONFIG_LYNXKDI) += lynxkdi.o
  COBJS-$(CONFIG_MODEM_SUPPORT) += modem.o
  COBJS-$(CONFIG_UPDATE_TFTP) += update.o
  COBJS-$(CONFIG_USB_KEYBOARD) += usb_kbd.o
 +COBJS-$(CONFIG_CMD_WATCHDOG) += cmd_watchdog.o
  
  
  COBJS:= $(sort $(COBJS-y))
 diff --git a/common/cmd_watchdog.c b/common/cmd_watchdog.c
 new file mode 100644
 index 000..d26be4f
 --- /dev/null
 +++ b/common/cmd_watchdog.c
 @@ -0,0 +1,61 @@
 +/*
 + * (C) Copyright 2009
 + * Net Insight www.netinsight.net
 + * Written-by: Simon Kagstrom simon.kagst...@netinsight.net
 + *
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License as
 + * published by the Free Software Foundation; either version 2 of
 + * the License, or (at your option) any later version.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 + * GNU General Public License for more details.
 + *
 + * You should have received a copy of the GNU General Public License
 + * along with this program; if not, write to the Free Software
 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 + * MA 02110-1301 USA
 + */
 +
 +#include common.h
 +#include watchdog.h
 +
 +static int do_watchdog(cmd_tbl_t *cmdtp, int flag, int argc, 
 char *argv[])
 +{
 + const char *cmd;
 + char *endp;
 + int timeout;
 +
 + /* need one argument */
 + if (argc != 2)
 + goto usage;
 +
 + cmd = argv[1];
 +
 + if (strcmp(cmd, off) == 0) {
 + watchdog_disable();
 + return 0;
 + }
 + timeout = simple_strtoul(cmd, endp, 0);
 + if (endp == cmd)
 + goto usage;
 + if (timeout  0)
 + goto usage;

How about passing zero value here, will it be a correct input for 
watchdog_enable?
 
 +
 + /* Everything fine, enable the watchdog */
 + watchdog_enable(timeout);

Can we check for some error code here from lower layer and dump some error 
message?
For ex. Specified timeout value may be invalid for specific h/w

 +
 + return 0;
 +usage:
 + cmd_usage(cmdtp);
 + return 1;
 +}
 +
 +U_BOOT_CMD(
 + watchdog, 2, 0, do_watchdog,
 + Watchdog commands,
 + timeout  - start the watchdog with `timeout' 
 seconds timeout\n
 + watchdog off   - stop the watchdog (can't be 
 done on all boards)\n
 +);
 diff --git a/include/watchdog.h b/include/watchdog.h
 index 9265be9..953cf61 100644
 --- a/include/watchdog.h
 +++ b/include/watchdog.h
 @@ -70,6 +70,15 @@
   #endif /* CONFIG_WATCHDOG  !__ASSEMBLY__ */
  #endif /* CONFIG_HW_WATCHDOG */
  
 +#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
 +extern void watchdog_enable(unsigned int timeout_secs);
 +
 +extern void watchdog_disable(void);
 +#else
 +static inline void watchdog_enable(unsigned int timeout_secs) { }
 +static inline void watchdog_disable(void) { }
 +#endif
 +
  /*
   * Prototypes from $(CPU)/cpu.c.
   */

What does this means?

Regards..
Prafulla . .

 -- 
 1.6.0.4
 
 
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Re: [U-Boot] [PATCH] ARM AT91 new board EB+CPUx9K2

[Wolfgang Denk]

Dear Jens Scharsig,

In message 4ae81893.30...@bus-elektronik.de you wrote:

  Close, but please also get rid of this ((AT91PS_PIO) AT91C_BASE_PIOA)
  thing, especialy the cast is nasty. Declare a real pointer variable to
  the respective data structure, and use that.
  
 
 I, think
 
 writel(AT91C_PA23_TXD2, AT91C_PIOA_OER);
 
 is the most correct way. 

most correct way are big words. No, this is not correct at all.

The whole set of address / offset definitions in
include/asm-arm/arch-at91rm9200/AT91RM9200.h should be turned into a C
struct.


Best regards,

Wolfgang Denk

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
When all else fails, read the instructions.
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[U-Boot] [PATCH] galaxy5200: Add default environment variables

[Eric Millbrandt]

Extend bootdelay to 10 seconds.  Set boot retry time to 120 seconds and use
reset to retry.  Define default bootcommand and bootargs for production.

Signed-off-by: Eric Millbrandt emillbra...@dekaresearch.com
---
 include/configs/galaxy5200.h |   10 --
 1 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/include/configs/galaxy5200.h b/include/configs/galaxy5200.h
index 931acfb..4be28b2 100644
--- a/include/configs/galaxy5200.h
+++ b/include/configs/galaxy5200.h
@@ -88,15 +88,21 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY   3   /* autoboot after 3 seconds */
+#define CONFIG_BOOTDELAY   10  /* autoboot after 10 seconds */
 #define CONFIG_ZERO_BOOTDELAY_CHECK/* allow stopping of boot process */
/* even with bootdelay=0 */
-#undef CONFIG_BOOTARGS
+#define CONFIG_BOOT_RETRY_TIME 120 /* Reset if no command is entered  */
+#define CONFIG_RESET_TO_RETRY
 
 #define CONFIG_PREBOOT echo; \
echo Welcome to U-Boot;\
echo
 
+#define CONFIG_BOOTCOMMAND go ff34 0; go ff34 2 2; \
+   bootm ff04 ff90 fffc
+#define CONFIG_BOOTARGSconsole=ttyPSC0,115200
+#define CONFIG_EXTRA_ENV_SETTINGS epson=yes\0
+
 /*
  * IPB Bus clocking configuration.
  */
-- 
1.6.3.1


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Re: [U-Boot] [PATCH V2] ARM AT91 new board EB+CPUx9K2

[Jens Scharsig]

This patch adds a new ARM AT91RM9200 board, named EB+CPUx9K2.
 
* support for EB+CPUx9K2 board by BuS Elektronik GmbH  Co. KG 
* select via make eb_cpux9k2_config 
 
Signed-off-by: Jens Scharsig e...@bus-elektronik.de
---
This patch needs the [PATCH] AT91RM9200: real pointer variable 
for PORT A to D configuration
By default the config use the old CONFIG_DRIVER_ETHER.

The patch supports also the new CONFIG_DRIVER_AT91EMAC 
([PATCH] AT92RM9200 EMAC driver for NET MULTI API). 
Remove comments in #define CONFIG_NET_MULTI line to use it.

Diffrence to V1:

* use the consistently silently board name eb_cpux9k2
* use I/O accessors
* dram_init using get_ram_size() 
* remove non-standard data types
* no #defines in the middle of the code
* use global linker script
* remove undef's
* timeouts do not based on CONFIG_SYS_HZ
* fix several code style problems
* several fixes


diff --git a/MAINTAINERS b/MAINTAINERS
index d70a9d2..65b06e2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -696,6 +696,10 @@ Steve Sakoman sako...@gmail.com
 
omap3_overo ARM CORTEX-A8 (OMAP3xx SoC)
 
+Jens Scharsig  e...@bus-elektronik.de
+
+   eb_cpux9k2  ARM920T (AR91RM9200 SoC)
+
 Robert Schwebel r.schwe...@pengutronix.de
 
csb226  xscale
diff --git a/MAKEALL b/MAKEALL
index d63c5c2..d7ef41c 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -644,6 +644,7 @@ LIST_at91= \
CPU9260 \
CPU9G20 \
csb637  \
+   eb_cpux9k2  \
kb9202  \
meesc   \
mp2usb  \
diff --git a/Makefile b/Makefile
index a69e6d5..d425b1a 100644
--- a/Makefile
+++ b/Makefile
@@ -2715,6 +2715,9 @@ CPUAT91_config:   unconfig
 csb637_config  :   unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t csb637 NULL at91rm9200
 
+eb_cpux9k2_config  :   unconfig
+   @$(MKCONFIG) $(@:_config=) arm arm920t eb_cpux9k2 BuS at91rm9200
+
 kb9202_config  :   unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t kb9202 NULL at91rm9200
 
diff --git a/board/BuS/eb_cpux9k2/Makefile b/board/BuS/eb_cpux9k2/Makefile
new file mode 100644
index 000..30e2f18
--- /dev/null
+++ b/board/BuS/eb_cpux9k2/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2003-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS  := cpux9k2.o
+#led.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak .depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/BuS/eb_cpux9k2/config.mk b/board/BuS/eb_cpux9k2/config.mk
new file mode 100644
index 000..ff2cfd1
--- /dev/null
+++ b/board/BuS/eb_cpux9k2/config.mk
@@ -0,0 +1 @@
+TEXT_BASE = 0x23f0
diff --git a/board/BuS/eb_cpux9k2/cpux9k2.c b/board/BuS/eb_cpux9k2/cpux9k2.c
new file mode 100644
index 000..8e2737e
--- /dev/null
+++ b/board/BuS/eb_cpux9k2/cpux9k2.c
@@ -0,0 +1,376 @@
+/*
+ * (C) Copyright 2008-2009
+ * BuS Elektronik GmbH  Co. KG www.bus-elektronik.de
+ * Jens Scharsig e...@bus-elektronik.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received 

Re: [U-Boot] [PATCH] AT91RM9200: real pointer variable for PORT A to D configuration

[Wolfgang Denk]

Dear Jens Scharsig,

In message 4ae832f4.2090...@bus-elektronik.de you wrote:
 adds real pointer variable for use with use I/O accessors 
 
 * defines for PORT A to D configuration registers
 * defines for SMC configuration registers
 
 Signed-off-by: Jens Scharsig e...@bus-elektronik.de
 ---

NAK.


 diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h 
 b/include/asm-arm/arch-at91rm9200/AT91RM9200.h
 index 00bae1c..1b4667e 100644
 --- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h
 +++ b/include/asm-arm/arch-at91rm9200/AT91RM9200.h
 @@ -251,6 +251,15 @@ typedef struct _AT91S_SMC2
   AT91_REG SMC2_CSR[8];   /* SMC2 Chip Select Register */
  } AT91S_SMC2, *AT91PS_SMC2;
  
 +#define AT91C_SMC_CSR0   ((AT91_REG *)   0xFF70)
 +#define AT91C_SMC_CSR1   ((AT91_REG *)   0xFF74)
 +#define AT91C_SMC_CSR2   ((AT91_REG *)   0xFF78)
 +#define AT91C_SMC_CSR3   ((AT91_REG *)   0xFF7C)
 +#define AT91C_SMC_CSR4   ((AT91_REG *)   0xFF80)
 +#define AT91C_SMC_CSR5   ((AT91_REG *)   0xFF84)
 +#define AT91C_SMC_CSR6   ((AT91_REG *)   0xFF88)
 +#define AT91C_SMC_CSR7   ((AT91_REG *)   0xFF8C)

Please declare this as a C struct.

  /*  SMC2_CSR : (SMC2 Offset: 0x0) SMC2 Chip Select Register  
  */
  #define AT91C_SMC2_NWS   ((unsigned int) 0x7F  0) /* 
 (SMC2) Number of Wait States */
  #define AT91C_SMC2_WSEN  ((unsigned int) 0x1   7) /* 
 (SMC2) Wait State Enable */
 @@ -586,6 +595,7 @@ typedef struct _AT91S_PDC
  #define AT91C_PMC_PCDR   ((AT91_REG *)   0xFC14) /* (PMC) 
 Peripheral Clock Enable Register */
  #define AT91C_PMC_SCER   ((AT91_REG *)   0xFC00) /* (PMC) 
 Peripheral Clock Enable Register */
  #define AT91C_PMC_SCDR   ((AT91_REG *)   0xFC04) /* (PMC) 
 Peripheral Clock Enable Register */
 +
  #define AT91C_PIOA_PER   ((AT91_REG *)   0xF400) /* (PIOA) 
 PIO Enable Register */
  #define AT91C_PIOA_PDR   ((AT91_REG *)   0xF404) /* (PIOA) 
 PIO Disable Register */
  #define AT91C_PIOA_PSR   ((AT91_REG *)   0xF408) /* (PIOA) 
 PIO Status Register */
 @@ -615,7 +625,96 @@ typedef struct _AT91S_PDC
  #define AT91C_PIOA_OWER  ((AT91_REG *)   0xF4A0) /* (PIOA) 
 PIO Output Write Enable Register */
  #define AT91C_PIOA_OWDR  ((AT91_REG *)   0xF4A4) /* (PIOA) 
 PIO Output Write Disable Register */
  #define AT91C_PIOA_OWSR  ((AT91_REG *)   0xF4A8) /* (PIOA) 
 PIO Output Write Status Register */
 -#define AT91C_PIOB_PDR   ((AT91_REG *)   0xF604) /* (PIOB) 
 PIO Disable Register */
 +
 +#define AT91C_PIOB_PER   ((AT91_REG *)   0xF600)
 +#define AT91C_PIOB_PDR   ((AT91_REG *)   0xF604)
 +#define AT91C_PIOB_PSR   ((AT91_REG *)   0xF608)
 +#define AT91C_PIOB_OER   ((AT91_REG *)   0xF610)
 +#define AT91C_PIOB_ODR   ((AT91_REG *)   0xF614)
 +#define AT91C_PIOB_OSR   ((AT91_REG *)   0xF618)
 +#define AT91C_PIOB_IFER  ((AT91_REG *)   0xF620)
 +#define AT91C_PIOB_IFDR  ((AT91_REG *)   0xF624)
 +#define AT91C_PIOB_IFSR  ((AT91_REG *)   0xF628)
 +#define AT91C_PIOB_SODR  ((AT91_REG *)   0xF630)
 +#define AT91C_PIOB_CODR  ((AT91_REG *)   0xF634)
 +#define AT91C_PIOB_ODSR  ((AT91_REG *)   0xF638)
 +#define AT91C_PIOB_PDSR  ((AT91_REG *)   0xF63C)
 +#define AT91C_PIOB_IER   ((AT91_REG *)   0xF640)
 +#define AT91C_PIOB_IDR   ((AT91_REG *)   0xF644)
 +#define AT91C_PIOB_IMR   ((AT91_REG *)   0xF648)
 +#define AT91C_PIOB_ISR   ((AT91_REG *)   0xF64C)
 +#define AT91C_PIOB_MDER  ((AT91_REG *)   0xF650)
 +#define AT91C_PIOB_MDDR  ((AT91_REG *)   0xF654)
 +#define AT91C_PIOB_MDSR  ((AT91_REG *)   0xF658)
 +#define AT91C_PIOB_PUDR  ((AT91_REG *)   0xF660)
 +#define AT91C_PIOB_PUER  ((AT91_REG *)   0xF664)
 +#define AT91C_PIOB_PUSR  ((AT91_REG *)   0xF668)
 +#define AT91C_PIOB_ASR   ((AT91_REG *)   0xF670)
 +#define AT91C_PIOB_BSR   ((AT91_REG *)   0xF674)
 +#define AT91C_PIOB_ABSR  ((AT91_REG *)   0xF678)
 +#define AT91C_PIOB_OWER  ((AT91_REG *)   0xF6A0)
 +#define AT91C_PIOB_OWDR  ((AT91_REG *)   0xF6A4)
 +#define AT91C_PIOB_OWSR  ((AT91_REG *)   0xF6A8)
 +
 +#define AT91C_PIOC_PER   ((AT91_REG *)   0xF800)
 +#define AT91C_PIOC_PDR   ((AT91_REG *)   0xF804)
 +#define AT91C_PIOC_PSR   ((AT91_REG *)   0xF808)
 +#define 

Re: [U-Boot] [PATCH V2] ARM AT91 new board EB+CPUx9K2

[Wolfgang Denk]

Dear Jens Scharsig,

In message hc9kvd$ga...@ger.gmane.org you wrote:
 This patch adds a new ARM AT91RM9200 board, named EB+CPUx9K2.
  
 * support for EB+CPUx9K2 board by BuS Elektronik GmbH  Co. KG 
 * select via make eb_cpux9k2_config 
  
 Signed-off-by: Jens Scharsig e...@bus-elektronik.de
 ---
 This patch needs the [PATCH] AT91RM9200: real pointer variable 
 for PORT A to D configuration

...which has been NAKed. Please use C structs!!!

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH 1/2]: common: Add a watchdog CLI command

[Simon Kagstrom]

On Wed, 28 Oct 2009 07:29:35 -0700
Prafulla Wadaskar prafu...@marvell.com wrote:

  +static int do_watchdog(cmd_tbl_t *cmdtp, int flag, int argc, 
 
  +   if (timeout  0)
  +   goto usage;
 
 How about passing zero value here, will it be a correct input for 
 watchdog_enable?

Good point, I'll update the patch.

  +
  +   /* Everything fine, enable the watchdog */
  +   watchdog_enable(timeout);
 
 Can we check for some error code here from lower layer and dump some error 
 message?
 For ex. Specified timeout value may be invalid for specific h/w

We could, but I'd like to keep the interface simple. Basically: tell
the hardware driver to enable the watchdog as good as possible, and
then the hardware will enable a watchdog that will timeout sometime.

This is hardly an end-user issue anyway: he/she will test the board
properly to find a good timeout value anyway, and I believe the
interface can be kept simple. I just like it since it makes it simple
to enable the watchdog where you like it in boot scripts etc.

  +#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
  +extern void watchdog_enable(unsigned int timeout_secs);
  +
  +extern void watchdog_disable(void);
  +#else
  +static inline void watchdog_enable(unsigned int timeout_secs) { }
  +static inline void watchdog_disable(void) { }
  +#endif
  +

 What does this means?

It was just a way of making the interface calls valid (but empty) if
the watchdog support isn't there. The idea is to avoid #ifdefs in the
code (like for WATCHDOG_RESET).

// Simon
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Re: [U-Boot] [STATUS] v2009.11-rc1 is out

[Paulraj, Sandeep]

 ARM: lots of issues:
 =

 1) SBC35_A9G20:

   nand_util.c:45:2: warning: #warning Please define
 CONFIG_SYS_64BIT_VSPRINTF for correct output!
   m41t94.c: In function 'rtc_reset':
   m41t94.c:123: warning: 'return' with a value, in function returning
 void
Wolfgang, this is ATMEL and we know there is no custodian for that


 2) TNY_A9260.ERR, TNY_A9G20.ERR:

   nand_util.c:45:2: warning: #warning Please define
 CONFIG_SYS_64BIT_VSPRINTF for correct output!

Same here, I can submit simple 1 line patches for these

 3) apollon:

   /bin/sh: /work/wd/tmp-arm/include/config.h: No such file or
 directory
   make: *** [apollon_config] Error 1
   System not configured - see README

   Out-o-tree build fails

 4) cradle:

   zlib.c:401:1: warning: OFF redefined
   In file included from /work/wd/tmp-arm/include/config.h:2,
from /home/wd/git/u-boot/work/include/common.h:37,
from zlib.c:30:
   /home/wd/git/u-boot/work/include/configs/cradle.h:337:1: warning:
 this is the location of the previous definition

 5) csb226, impa7:

   cs8900.c:112:50: error: macro get_reg_init_bus passed 2 arguments,
 but takes just 1
   cs8900.c: In function 'cs8900_reset':
   cs8900.c:112: error: 'get_reg_init_bus' undeclared (first use in
 this function)
   cs8900.c:112: error: (Each undeclared identifier is reported only
 once
   cs8900.c:112: error: for each function it appears in.)
   cs8900.c:137:37: error: macro get_reg_init_bus passed 2 arguments,
 but takes just 1
   cs8900.c: In function 'cs8900_get_enetaddr':
   cs8900.c:137: error: 'get_reg_init_bus' undeclared (first use in
 this function)
   cs8900.c:161:33: error: macro get_reg_init_bus passed 2 arguments,
 but takes just 1
   cs8900.c: In function 'cs8900_halt':
   cs8900.c:161: error: 'get_reg_init_bus' undeclared (first use in
 this function)
   cs8900.c:170:38: error: macro get_reg_init_bus passed 2 arguments,
 but takes just 1
   cs8900.c: In function 'cs8900_init':
   cs8900.c:170: error: 'get_reg_init_bus' undeclared (first use in
 this function)
   make[1]: *** [/work/wd/tmp-arm/drivers/net/cs8900.o] Error 1

 6) imx27lite:

   mxcmmc.c: In function 'mxcmci_softreset':
   mxcmmc.c:139: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c:140: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c:144: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c:146: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c: In function 'mxcmci_setup_data':
   mxcmmc.c:157: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c:158: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c: In function 'mxcmci_start_cmd':
   mxcmmc.c:188: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c:190: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c: In function 'mxcmci_read_response':
   mxcmmc.c:250: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c:251: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c:255: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c:256: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c:257: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c: In function 'mxcmci_set_clk_rate':
   mxcmmc.c:448: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c: In function 'mxcmci_set_ios':
   mxcmmc.c:461: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c:463: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c: In function 'mxcmci_init':
   mxcmmc.c:475: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   mxcmmc.c:483: warning: dereferencing type-punned pointer will break
 strict-aliasing rules
   nand_util.c:45:2: warning: #warning Please define
 CONFIG_SYS_64BIT_VSPRINTF for correct output!

 7) lpd7a400:

   smc9_eeprom.c: In function 'smc9_eeprom':
   smc9_eeprom.c:76: warning: implicit declaration of function
 'SMC_inw'
   smc9_eeprom.c:224: warning: implicit declaration of function
 'SMC_outw'
   smc9_eeprom.c: In function 'print_macaddr':
   smc9_eeprom.c:278: warning: implicit declaration of function
 'SMC_inb'
   /work/wd/tmp-arm/examples/standalone/smc9_eeprom.o: In function
 `dump_reg':
   

Re: [U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space

[Kumar Gala]

On Oct 28, 2009, at 3:49 AM, Sandeep Gopalpet wrote:

 Moved the mdio regs out of the tsec structure,and
 provided different offsets for tsec base and mdio
 base so that provision for etsec2.0 can be provided.

 This patch helps in providing the support for etsec2.0
 In etsec2.0, the MDIO register space and the etsec reg
 space are different.

 Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
 platform specific files.

 Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
 ---
 drivers/net/tsec.c   |   19 -
 include/asm-ppc/immap_83xx.h |9 
 include/asm-ppc/immap_85xx.h |   10 +
 include/asm-ppc/immap_86xx.h |9 
 include/tsec.h   |   45 +++ 
 +-
 5 files changed, 59 insertions(+), 33 deletions(-)


[snip]

 diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/ 
 immap_83xx.h
 index c60a7d2..57b1a72 100644
 --- a/include/asm-ppc/immap_83xx.h
 +++ b/include/asm-ppc/immap_83xx.h
 @@ -868,4 +868,13 @@ typedef struct immap {
 #endif
 #define CONFIG_SYS_MPC83xx_USB_ADDR \
   (CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB_OFFSET)
 +
 +#define CONFIG_SYS_TSEC1_OFFSET  0x24000
 +#define TSEC_SIZE0x01000

Let's leave TSEC_SIZE in tsec.h as its never changing

 +
 +#define CONFIG_SYS_MDIO1_OFFSET  0x24520
 +#define MDIO_OFFSET  0x01000

didn't we agree to rename to TSEC_MDIO_OFFSET

 +
 +#define TSEC_BASE_ADDR   (CONFIG_SYS_IMMR + 
 CONFIG_SYS_TSEC1_OFFSET)
 +#define MDIO_BASE_ADDR   (CONFIG_SYS_IMMR + 
 CONFIG_SYS_MDIO1_OFFSET)

- k
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[U-Boot] [PATCH] Fix Compliation warning for SBC35-A9G20 board

[s-paulraj]

From: Sandeep Paulraj s-paul...@ti.com

The patch fixes a compilation warning by defining
CONFIG_SYS_64BIT_VSPRINTF in the config file

Signed-off-by: Sandeep Paulraj s-paul...@ti.com
---
 include/configs/sbc35_a9g20.h |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/include/configs/sbc35_a9g20.h b/include/configs/sbc35_a9g20.h
index f4b3477..7a2dcd8 100644
--- a/include/configs/sbc35_a9g20.h
+++ b/include/configs/sbc35_a9g20.h
@@ -161,6 +161,7 @@
 #define CONFIG_ENV_OFFSET  0x6
 #define CONFIG_ENV_OFFSET_REDUND   0x8
 #define CONFIG_ENV_SIZE0x2
+#define CONFIG_SYS_64BIT_VSPRINTF  /* needed for nand_util.c */
 #endif
 
 #define CONFIG_BOOTCOMMAND nboot 0x2100 0 40
-- 
1.6.0.4

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[U-Boot] [PATCH] Fix Compliation warning for TNY-A9260 and TNY-A9G20

[s-paulraj]

From: Sandeep Paulraj s-paul...@ti.com

The patch fixes a compilation warning by defining
CONFIG_SYS_64BIT_VSPRINTF in the config file

Signed-off-by: Sandeep Paulraj s-paul...@ti.com
---
 include/configs/tny_a9260.h |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/include/configs/tny_a9260.h b/include/configs/tny_a9260.h
index 4ad081b..5b70a7b 100644
--- a/include/configs/tny_a9260.h
+++ b/include/configs/tny_a9260.h
@@ -138,6 +138,7 @@
 #define CONFIG_ENV_OFFSET 0x6
 #define CONFIG_ENV_OFFSET_REDUND 0x8
 #define CONFIG_ENV_SIZE 0x2
+#define CONFIG_SYS_64BIT_VSPRINTF  /* needed for nand_util.c */
 #endif
 
 #define CONFIG_BOOTCOMMAND nboot 0x2100 0 40
-- 
1.6.0.4

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Re: [U-Boot] [PATCH 2/2]: arm:kirkwood: Add hardware watchdog support for Marvell Kirkwood boards

[Prafulla Wadaskar]

 

 -Original Message-
 From: Simon Kagstrom [mailto:simon.kagst...@netinsight.net] 
 Sent: Wednesday, October 28, 2009 7:46 PM
 To: U-Boot ML; Prafulla Wadaskar
 Subject: [PATCH 2/2]: arm:kirkwood: Add hardware watchdog 
 support for Marvell Kirkwood boards
 
 Initialize by calling the generic API watchdog_enable() with 
 the number
 of seconds for the watchdog to timeout. It's not possible to 
 disable the
 watchdog once it's on.
 
 Signed-off-by: Simon Kagstrom simon.kagst...@netinsight.net
 ---
 ChangeLog:
 
  v2: (Some of the comments from Prafulla)
* Use readl/writel
* Rename WATCHDOG_CNTR - WATCHDOG_TMR
 
  cpu/arm926ejs/kirkwood/timer.c |   37 
 +
  1 files changed, 37 insertions(+), 0 deletions(-)
 
 diff --git a/cpu/arm926ejs/kirkwood/timer.c 
 b/cpu/arm926ejs/kirkwood/timer.c
 index 817ff42..797ab04 100644
 --- a/cpu/arm926ejs/kirkwood/timer.c
 +++ b/cpu/arm926ejs/kirkwood/timer.c
 @@ -23,8 +23,10 @@
  
  #include common.h
  #include asm/arch/kirkwood.h
 +#include watchdog.h
  
  #define UBOOT_CNTR   0   /* counter to use for uboot timer */
 +#define WATCHDOG_TMR 2
  
  /* Timer reload and current value registers */
  struct kwtmr_val {
 @@ -166,3 +168,38 @@ int timer_init(void)
  
   return 0;
  }
 +
 +#if defined(CONFIG_HW_WATCHDOG)
 +static unsigned long watchdog_timeout = 5;
 +void hw_watchdog_reset(void)
 +{
 + u32 time = CONFIG_SYS_TCLK * watchdog_timeout;
 +
 + writel(time, CNTMR_VAL_REG(WATCHDOG_TMR));
 +}
 +
 +void watchdog_enable(unsigned int timeout_secs)
 +{
 + struct kwcpu_registers *cpureg =
 + (struct kwcpu_registers *)KW_CPU_REG_BASE;
 + u32 rstoutn_mask;
 + u32 cntmrctrl;
 +
 + watchdog_timeout = timeout_secs;
 + /* Enable CPU reset if watchdog expires */
 + rstoutn_mask = readl(cpureg-rstoutn_mask);
 + writel(rstoutn_mask |= WATCHDOG_TMR, cpureg-rstoutn_mask);
 + hw_watchdog_reset();
 +
 + /* Enable the watchdog */
 + cntmrctrl = readl(CNTMR_CTRL_REG);
 + cntmrctrl |= CTCR_ARM_TIMER_EN(WATCHDOG_TMR);
 + cntmrctrl |= CTCR_ARM_TIMER_AUTO_EN(WATCHDOG_TMR);
 + writel(cntmrctrl, CNTMR_CTRL_REG);
 +}
 +
 +void watchdog_disable(void)
 +{
 + /* Can't be done */

you can disable CPU reset if watchdog expires to achieve this functionality
Or reseting bit 4 in CPU timer control reg

Regards..
Prafulla . .

 +}
 +#endif
 -- 
 1.6.0.4
 
 
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Re: [U-Boot] [PATCH 1/2]: common: Add a watchdog CLI command

[Wolfgang Denk]

Dear Simon Kagstrom,

In message 20091028154925.1dd1a...@marrow.netinsight.se you wrote:

  Can we check for some error code here from lower layer and dump some error 
  message?
  For ex. Specified timeout value may be invalid for specific h/w
 
 We could, but I'd like to keep the interface simple. Basically: tell

Well, but error checking and sending respective information to the
user is essential.

 the hardware driver to enable the watchdog as good as possible, and
 then the hardware will enable a watchdog that will timeout sometime.

Um... No. This sounds horrible to me.

The driver should do _exactly_ what the user asks for, or raise an
error.

 This is hardly an end-user issue anyway: he/she will test the board
 properly to find a good timeout value anyway, and I believe the
 interface can be kept simple. I just like it since it makes it simple
 to enable the watchdog where you like it in boot scripts etc.

Well, if you have anything on your board which is actually worth the
name watchdog then this whole command will be moot.

A _real_ watchdog is automatically active after reset, and cannot be
disabled by any software.

A somewhat reasonable watchdog can be configured exactly once (for
example, the MPC8xx processors use a write-once register for this
purpose).

A watchdog that can be disabled by software is just a toy and
neither worth the money nor the effort ;-)


   +#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
   +extern void watchdog_enable(unsigned int timeout_secs);
   +
   +extern void watchdog_disable(void);
   +#else
   +static inline void watchdog_enable(unsigned int timeout_secs) { }
   +static inline void watchdog_disable(void) { }
   +#endif
   +
 
  What does this means?
 
 It was just a way of making the interface calls valid (but empty) if
 the watchdog support isn't there. The idea is to avoid #ifdefs in the
 code (like for WATCHDOG_RESET).

Please use weak functions for this purpose.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [STATUS] v2009.11-rc1 is out

[Wolfgang Denk]

Dear Paulraj, Sandeep,

In message 0554bef07d437848af01b9c9b5f0bc5d93957...@dlee01.ent.ti.com you 
wrote:
 
  ARM: lots of issues:
  =
 
  1) SBC35_A9G20:
 
nand_util.c:45:2: warning: #warning Please define
  CONFIG_SYS_64BIT_VSPRINTF for correct output!
m41t94.c: In function 'rtc_reset':
m41t94.c:123: warning: 'return' with a value, in function returning
  void
 Wolfgang, this is ATMEL and we know there is no custodian for that

But there is a board maintainer (Albin Tonnerre), and then it falls on
Tom as ARM custodian.

 
  2) TNY_A9260.ERR, TNY_A9G20.ERR:
 
nand_util.c:45:2: warning: #warning Please define
  CONFIG_SYS_64BIT_VSPRINTF for correct output!

 Same here, I can submit simple 1 line patches for these

Thanks, but this is also Albin's bailiwick.


Best regards,

Wolfgang Denk

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Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
The  release  of  emotion  is  what  keeps  us  health.  Emotionally
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That may be, Doctor. However, I have noted that the healthy  release
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Re: [U-Boot] [STATUS] v2009.11-rc1 is out

[Paulraj, Sandeep]

 
  
   2) TNY_A9260.ERR, TNY_A9G20.ERR:
  
 nand_util.c:45:2: warning: #warning Please define
   CONFIG_SYS_64BIT_VSPRINTF for correct output!
 
  Same here, I can submit simple 1 line patches for these
 
 Thanks, but this is also Albin's bailiwick.

I submitted two 1 line patches

[PATCH] Fix Compliation warning for TNY-A9260 and TNY-A9G20

And

[PATCH] Fix Compliation warning for SBC35-A9G20 board

Tom you can apply these 2 your tree.
 
 
 Best regards,
 
 Wolfgang Denk
 

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Re: [U-Boot] [PATCH] Enable port-mapped access to 16550 UART

[Detlev Zundel]

Hello Graeme,

 This patch does two things:
   - Changes default behaviour to use proper memory accessors
   - Allows port-mapped access (using inb/outb) for the x86 architecture

 Signed-off-by: Graeme Russ graeme.r...@gmail.com
 ---
  drivers/serial/ns16550.c |   69 
 ++
  1 files changed, 39 insertions(+), 30 deletions(-)

 diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
 index 2fcc8c3..c41ca0d 100644
 --- a/drivers/serial/ns16550.c
 +++ b/drivers/serial/ns16550.c
 @@ -6,6 +6,8 @@
  
  #include config.h
  #include ns16550.h
 +#include linux/types.h
 +#include asm/io.h
  
  #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
  #define UART_MCRVAL (UART_MCR_DTR | \
 @@ -13,28 +15,35 @@
  #define UART_FCRVAL (UART_FCR_FIFO_EN |  \
UART_FCR_RXSR |\
UART_FCR_TXSR) /* Clear  enable FIFOs */
 +#ifdef CONFIG_X86
 +#define uart_writeb(x,y) outb(x,(ulong)y)
 +#define uart_readb(y)inb((ulong)y)
 +#else
 +#define uart_writeb(x,y) writeb(x,y)
 +#define uart_readb(y) readb(y)
 +#endif

Why do you need a specific variant for X86 instead of implementing
writeb and readb correctly in the first place?

If this was in place, all the accessors should only switch to using
readb/writeb and from looking at it, this should not brak e.g. PowerPC
boards with weird register layouts.

When you post a patch with only these changes, I'll test it on a few of
the usual suspects on PowerPC.

Cheers
  Detlev

-- 
More than any other time in history, mankind faces a crossroads.  One
path leads  to despair  and utter  hopelessness.   The other to total
extinction.  Let us pray, we have the wisdom to choose correctly.
-- Woody Allen
--
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Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de
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Re: [U-Boot] medical profession listings

[Carlo Thomas]

Beat the Recession - get more new clients now.
Medical Community Contact Lists that will generate results:
Doctors, Dentists, Chiropractors, Hospitals etc.. 

Drop me a line here for more info  samples: vi...@listexperts.us








send an email to e...@listexperts.us to be taken off future mailing.

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Re: [U-Boot] [PATCH 0/6] ppc4xx: Linker script consolidation

[Niklaus Giger]

Hi Stefan 

Thanks for your work. I tested in on two of my three boards and both compile 
and start up fine.

Best regards

Niklaus

Am Dienstag 27 Oktober 2009 16:41:35 schrieb Stefan Roese:
 This patchset will consolidate the linker scripts for PPC4xx.
 My plan is to push this in the next merge window. I've pushed
 this patchset in the 4xx-linker-script branch of the ppc4xx
 repository:
 
 http://git.denx.de/?p=u-boot/u-boot-ppc4xx.git;a=shortlog;h=refs/heads/4xx-
 linker-script
 
 Please go ahead and test it on your ppc4xx platforms. And please
 also note, that I will most likely rebase this branch from time
 to time.
 
..

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Re: [U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space

[Kim Phillips]

On Wed, 28 Oct 2009 14:19:18 +0530
Sandeep Gopalpet sandeep.ku...@freescale.com wrote:

 Moved the mdio regs out of the tsec structure,and
 provided different offsets for tsec base and mdio
 base so that provision for etsec2.0 can be provided.
 
 This patch helps in providing the support for etsec2.0
 In etsec2.0, the MDIO register space and the etsec reg
 space are different.
 
 Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
 platform specific files.
 
 Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
 ---

without this patchseries:

U-Boot 2009.11-rc1 (Oct 28 2009 - 14:57:54) MPC83XX

Reset Status: Software Hard, External/Internal Soft, External/Internal Hard

CPU:   e300c3, MPC8315E, Rev: 1.0 at 400 MHz, CSB: 133.333 MHz
Board: Freescale MPC8315ERDB Rev 0.1
I2C:   ready
DRAM:  128 MB
FLASH:  8 MB
NAND:  32 MiB
PCIE0: No link
PCIE1: No link
In:serial
Out:   serial
Err:   serial
Net:   eTSEC0, eTSEC1
Hit any key to stop autoboot:  0 
= ping $serverip
Speed: 1000, full duplex
Using eTSEC0 device
host 192.168.1.1 is alive
= 

with this patchseries:

U-Boot 2009.11-rc1-2-g3775d27 (Oct 28 2009 - 14:45:51) MPC83XX

Reset Status: Software Hard, External/Internal Soft, External/Internal Hard

CPU:   e300c3, MPC8315E, Rev: 1.0 at 400 MHz, CSB: 133.333 MHz
Board: Freescale MPC8315ERDB Rev 0.1
I2C:   ready
DRAM:  128 MB
FLASH:  8 MB
NAND:  32 MiB
PCIE0: No link
PCIE1: No link
In:serial
Out:   serial
Err:   serial
Net:   eTSEC0: No support for PHY id 0; assuming generic
eTSEC1: No support for PHY id 0; assuming generic
eTSEC0, eTSEC1
Hit any key to stop autoboot:  0 
= ping $serverip
eTSEC0: No link.
eTSEC1: No link.
ping failed; host 192.168.1.1 is not alive

do you not test older version tsecs/83xx?

 +typedef struct tsec_mdio
 +{

please also move this brace onto the above line.

Kim
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Re: [U-Boot] [PATCH] Fix Compliation warning for SBC35-A9G20 board

[Wolfgang Denk]

Dear s-paul...@ti.com,

In message 1256742293-17000-1-git-send-email-s-paul...@ti.com you wrote:
 From: Sandeep Paulraj s-paul...@ti.com
 
 The patch fixes a compilation warning by defining
 CONFIG_SYS_64BIT_VSPRINTF in the config file
 
 Signed-off-by: Sandeep Paulraj s-paul...@ti.com
 ---
  include/configs/sbc35_a9g20.h |1 +
  1 files changed, 1 insertions(+), 0 deletions(-)

Applied, thanks.

Tom, I hope this is OK with you.

Best regards,

Wolfgang Denk

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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Re: [U-Boot] [PATCH] Fix Compliation warning for TNY-A9260 and TNY-A9G20

[Wolfgang Denk]

Dear s-paul...@ti.com,

In message 1256742303-17029-1-git-send-email-s-paul...@ti.com you wrote:
 From: Sandeep Paulraj s-paul...@ti.com
 
 The patch fixes a compilation warning by defining
 CONFIG_SYS_64BIT_VSPRINTF in the config file
 
 Signed-off-by: Sandeep Paulraj s-paul...@ti.com
 ---
  include/configs/tny_a9260.h |1 +
  1 files changed, 1 insertions(+), 0 deletions(-)

Applied, thanks.

Tom, I hope this is OK with you.

Best regards,

Wolfgang Denk

-- 
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Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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Re: [U-Boot] Pull request: u-boot-sparc

[Wolfgang Denk]

Dear Daniel Hellstrom,

In message 4ae80a59.9090...@gaisler.com you wrote:
 Sorry, please pull from the master branch.

Understood.

 The following changes since commit f3ee25859e3920ee7c7cc519a3e6f60d70d7a53f:
   Matthias Fuchs (1):
 License cleanup: Fix license header for some esd display 
 configurations
 
 are available in the git repository at:
 
   git://www.denx.de/git/u-boot-sparc.git master
 
 Sergey Mironov (1):
   Fix bug in jumptable call stubs for SPARC.
 
  examples/standalone/stubs.c |4 ++--
  1 files changed, 2 insertions(+), 2 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

-- 
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
In the strict scientific sense we all feed on death -- even
vegetarians.
-- Spock, Wolf in the Fold, stardate 3615.4
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Re: [U-Boot] Please pull u-boot-cfi-flash/master

[Wolfgang Denk]

Dear Stefan Roese,

In message 200910281140.07642...@denx.de you wrote:
 Hi Wolfgang,
 
 please pull this update. Thanks.
 
 The following changes since commit 4946775c6db52dba28f72ba3525764b54f1d4593:
   Wolfgang Denk (1):
 Coding Style cleanup; update CHANGELOG, prepare -rc1
 
 are available in the git repository at:
 
   git://www.denx.de/git/u-boot-cfi-flash.git master
 
 Stefan Roese (1):
   cfi: Add weak default function for flash_cmd_reset()
 
  drivers/mtd/cfi_flash.c |  151 ++---
  include/mtd/cfi_flash.h |  157 
 +++
  2 files changed, 175 insertions(+), 133 deletions(-)
  create mode 100644 include/mtd/cfi_flash.h

Applied, thanks.

Best regards,

Wolfgang Denk

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Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
I realize that command does have its fascination, even under  circum-
stances such as these, but I neither enjoy the idea of command nor am
I  frightened  of  it. It simply exists, and I will do whatever logi-
cally needs to be done.
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[U-Boot] [PATCH] sbc8349: fix incorrect comment

[Wolfgang Denk]

The comment for the BR0_PRELIM port size initialization incorrectly
stated 32 bit, while it's actually 16 bit. The code is correct.

Reported-by: Guenter Koellner guenter.koell...@nsn.com
Signed-off-by: Wolfgang Denk w...@denx.de
---
 include/configs/sbc8349.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index 4dea27d..7bef119 100644
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -158,7 +158,7 @@
 /* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
 
 #define CONFIG_SYS_BR0_PRELIM  (CONFIG_SYS_FLASH_BASE |/* 
flash Base address */ \
-   (2  BR_PS_SHIFT) |/* 32 bit port size */  
 \
+   (2  BR_PS_SHIFT) |/* 16 bit port size */  
 \
BR_V)   /* valid */
 
 #define CONFIG_SYS_OR0_PRELIM  0xFF806FF7  /* 8 MB flash size */
-- 
1.6.2.5

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[U-Boot] [PATCH] Building of FIT images does not work.

[Remy Bohmer]

The type is not set for generation of the FIT images, resulting
in no images being created without printing or returning an error

Signed-off-by: Remy Bohmer li...@bohmer.net
---
 tools/mkimage.c |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/tools/mkimage.c b/tools/mkimage.c
index ab6ea32..8a20594 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -229,6 +229,7 @@ main (int argc, char **argv)
case 'f':
if (--argc = 0)
usage ();
+   params.type = IH_TYPE_FLATDT;
params.datafile = *++argv;
params.fflag = 1;
goto NXTARG;
-- 
1.6.0.4

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[U-Boot] [PATCH] Add support for CS2 dataflash for Atmel-SPI.

[Remy Bohmer]

The only missing chipselect line support is CS2, and I need it on
CS2...

Signed-off-by: Remy Bohmer li...@bohmer.net
---
 drivers/spi/atmel_dataflash_spi.c |   18 --
 1 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/atmel_dataflash_spi.c 
b/drivers/spi/atmel_dataflash_spi.c
index 614965c..3a648e6 100644
--- a/drivers/spi/atmel_dataflash_spi.c
+++ b/drivers/spi/atmel_dataflash_spi.c
@@ -30,7 +30,8 @@
 #include dataflash.h
 
 #define AT91_SPI_PCS0_DATAFLASH_CARD   0xE /* Chip Select 0: NPCS0%1110 */
-#define AT91_SPI_PCS1_DATAFLASH_CARD   0xD /* Chip Select 0: NPCS0%1101 */
+#define AT91_SPI_PCS1_DATAFLASH_CARD   0xD /* Chip Select 1: NPCS1%1101 */
+#define AT91_SPI_PCS2_DATAFLASH_CARD   0xB /* Chip Select 2: NPCS2%1011 */
 #define AT91_SPI_PCS3_DATAFLASH_CARD   0x7 /* Chip Select 3: NPCS3%0111 */
 
 void AT91F_SpiInit(void)
@@ -57,7 +58,14 @@ void AT91F_SpiInit(void)
   ((get_mck_clk_rate() / AT91_SPI_CLK)  8),
   AT91_BASE_SPI + AT91_SPI_CSR(1));
 #endif
-
+#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
+   /* Configure CS2 */
+   writel(AT91_SPI_NCPHA |
+  (AT91_SPI_DLYBS  DATAFLASH_TCSS) |
+  (AT91_SPI_DLYBCT  DATAFLASH_TCHS) |
+  ((get_mck_clk_rate() / AT91_SPI_CLK)  8),
+  AT91_BASE_SPI + AT91_SPI_CSR(2));
+#endif
 #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
/* Configure CS3 */
writel(AT91_SPI_NCPHA |
@@ -99,6 +107,12 @@ void AT91F_SpiEnable(int cs)
writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD16)  
AT91_SPI_PCS),
   AT91_BASE_SPI + AT91_SPI_MR);
break;
+   case 2: /* Configure SPI CS2 for Serial DataFlash AT45DBxx */
+   mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+   mode = 0xFFF0;
+   writel(mode | ((AT91_SPI_PCS2_DATAFLASH_CARD16)  
AT91_SPI_PCS),
+  AT91_BASE_SPI + AT91_SPI_MR);
+   break;
case 3:
mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
mode = 0xFFF0;
-- 
1.6.0.4

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[U-Boot] [PATCH] Fix mingw tools build

[Remy Bohmer]

mkimage does not build due to missing strtok_r() and getline() implementation

Signed-off-by: Remy Bohmer li...@bohmer.net
---
 tools/mingw_support.c |  157 +
 tools/mingw_support.h |2 +
 2 files changed, 159 insertions(+), 0 deletions(-)

diff --git a/tools/mingw_support.c b/tools/mingw_support.c
index 67cd6e1..6379710 100644
--- a/tools/mingw_support.c
+++ b/tools/mingw_support.c
@@ -24,7 +24,9 @@
 #include mingw_support.h
 #include stdio.h
 #include stdint.h
+#include string.h
 #include errno.h
+#include assert.h
 #include io.h
 
 int fsync(int fd)
@@ -77,3 +79,158 @@ int munmap(void *addr, size_t len)
 
return 0;
 }
+
+/* Reentrant string tokenizer.  Generic version.
+   Copyright (C) 1991,1996-1999,2001,2004,2007 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2, or (at your option)
+   any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License along
+   with this program; if not, write to the Free Software Foundation,
+   Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */
+
+/* Parse S into tokens separated by characters in DELIM.
+   If S is NULL, the saved pointer in SAVE_PTR is used as
+   the next starting point.  For example:
+   char s[] = -abc-=-def;
+   char *sp;
+   x = strtok_r(s, -, sp);  // x = abc, sp = =-def
+   x = strtok_r(NULL, -=, sp);  // x = def, sp = NULL
+   x = strtok_r(NULL, =, sp);   // x = NULL
+   // s = abc\0-def\0
+*/
+char *strtok_r(char *s, const char *delim, char **save_ptr)
+{
+   char *token;
+
+   if (s == NULL)
+   s = *save_ptr;
+
+   /* Scan leading delimiters.  */
+   s += strspn(s, delim);
+   if (*s == '\0') {
+   *save_ptr = s;
+   return NULL;
+   }
+
+   /* Find the end of the token.  */
+   token = s;
+   s = strpbrk (token, delim);
+   if (s == NULL) {
+   /* This token finishes the string.  */
+   *save_ptr = memchr(token, '\0', strlen(token));
+   } else {
+   /* Terminate the token and make *SAVE_PTR point past it.  */
+   *s = '\0';
+   *save_ptr = s + 1;
+   }
+   return token;
+}
+
+/* getline.c -- Replacement for GNU C library function getline
+
+Copyright (C) 1993, 1996, 2001, 2002 Free Software Foundation, Inc.
+
+This program is free software; you can redistribute it and/or
+modify it under the terms of the GNU General Public License as
+published by the Free Software Foundation; either version 2 of the
+License, or (at your option) any later version.
+
+This program is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Written by Jan Brittenson, b...@gnu.ai.mit.edu.  */
+
+/* Always add at least this many bytes when extending the buffer.  */
+#define MIN_CHUNK 64
+
+/* Read up to (and including) a TERMINATOR from STREAM into *LINEPTR
+   + OFFSET (and null-terminate it). *LINEPTR is a pointer returned from
+   malloc (or NULL), pointing to *N characters of space.  It is realloc'd
+   as necessary.  Return the number of characters read (not including the
+   null terminator), or -1 on error or EOF.
+   NOTE: There is another getstr() function declared in curses.h.  */
+static int getstr(char **lineptr, size_t *n, FILE *stream,
+ char terminator, size_t offset)
+{
+   int nchars_avail;   /* Allocated but unused chars in *LINEPTR.  */
+   char *read_pos; /* Where we're reading into *LINEPTR. */
+   int ret;
+
+   if (!lineptr || !n || !stream)
+   return -1;
+
+   if (!*lineptr) {
+   *n = MIN_CHUNK;
+   *lineptr = malloc(*n);
+   if (!*lineptr)
+   return -1;
+   }
+
+   nchars_avail = *n - offset;
+   read_pos = *lineptr + offset;
+
+   for (;;) {
+   register int c = getc(stream);
+
+   /* We always want at least one char left in the buffer, since we
+  always (unless we get an error while reading the first char)
+  

[U-Boot] [PATCH] Add error codes/handling for TFTP-server

[Remy Bohmer]

Signed-off-by: Remy Bohmer li...@bohmer.net
---
 net/tftp.c |   32 +---
 1 files changed, 29 insertions(+), 3 deletions(-)

diff --git a/net/tftp.c b/net/tftp.c
index cc60a3b..d254f49 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -47,6 +47,16 @@ static int TftpTimeoutCountMax = TIMEOUT_COUNT;
 ulong TftpRRQTimeoutMSecs = TIMEOUT;
 int TftpRRQTimeoutCountMax = TIMEOUT_COUNT;
 
+enum {
+   TFTP_ERR_UNDEFINED   = 0,
+   TFTP_ERR_FILE_NOT_FOUND  = 1,
+   TFTP_ERR_ACCESS_DENIED   = 2,
+   TFTP_ERR_DISK_FULL   = 3,
+   TFTP_ERR_UNEXPECTED_OPCODE   = 4,
+   TFT_ERR_UNKNOWN_TRANSFER_ID  = 5,
+   TFTP_ERR_FILE_ALREADY_EXISTS = 6,
+};
+
 static IPaddr_t TftpServerIP;
 static int TftpServerPort; /* The UDP port at their end
*/
 static int TftpOurPort;/* The UDP port at our end  
*/
@@ -472,11 +482,27 @@ TftpHandler (uchar * pkt, unsigned dest, unsigned src, 
unsigned len)
case TFTP_ERROR:
printf (\nTFTP error: '%s' (%d)\n,
pkt + 2, ntohs(*(ushort *)pkt));
-   puts (Starting again\n\n);
+
+   switch (ntohs(*(ushort *)pkt)) {
+   case TFTP_ERR_FILE_NOT_FOUND:
+   case TFTP_ERR_ACCESS_DENIED:
+   puts(Not retrying...\n);
+   eth_halt();
+   NetState = NETLOOP_FAIL;
+   break;
+   case TFTP_ERR_UNDEFINED:
+   case TFTP_ERR_DISK_FULL:
+   case TFTP_ERR_UNEXPECTED_OPCODE:
+   case TFT_ERR_UNKNOWN_TRANSFER_ID:
+   case TFTP_ERR_FILE_ALREADY_EXISTS:
+   default:
+   puts(Starting again\n\n);
 #ifdef CONFIG_MCAST_TFTP
-   mcast_cleanup();
+   mcast_cleanup();
 #endif
-   NetStartAgain ();
+   NetStartAgain();
+   break;
+   }
break;
}
 }
-- 
1.6.0.4

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[U-Boot] [PATCH] Make the generic unaligned access code safe for unaligned access

[Remy Bohmer]

The current generic code for handling unaligned access assumes that
the processor can properly handle unaligned accesses itself.
This is at least not the case for ARM, which results in runtime
errors.

Rewrite it such that it works for ARM as well.

Signed-off-by: Remy Bohmer li...@bohmer.net
---
 include/linux/unaligned/access_ok.h |   48 --
 1 files changed, 34 insertions(+), 14 deletions(-)

diff --git a/include/linux/unaligned/access_ok.h 
b/include/linux/unaligned/access_ok.h
index 5f46eee..172124f 100644
--- a/include/linux/unaligned/access_ok.h
+++ b/include/linux/unaligned/access_ok.h
@@ -1,66 +1,86 @@
 #ifndef _LINUX_UNALIGNED_ACCESS_OK_H
 #define _LINUX_UNALIGNED_ACCESS_OK_H
 
-#include asm/byteorder.h
-
 static inline u16 get_unaligned_le16(const void *p)
 {
-   return le16_to_cpup((__le16 *)p);
+   const u8 *__p = p;
+   return __p[0] | __p[1]  8;
 }
 
 static inline u32 get_unaligned_le32(const void *p)
 {
-   return le32_to_cpup((__le32 *)p);
+   const u8 *__p = p;
+   return __p[0] | __p[1]  8 | __p[2]  16 | __p[3]  24;
 }
 
 static inline u64 get_unaligned_le64(const void *p)
 {
-   return le64_to_cpup((__le64 *)p);
+   const u8 *__p = p;
+   return (unsigned long long)
+   get_unaligned_le32((__p + 4))  32 |
+   get_unaligned_le32(__p);
 }
 
 static inline u16 get_unaligned_be16(const void *p)
 {
-   return be16_to_cpup((__be16 *)p);
+   const u8 *__p = p;
+   return __p[0]  8 | __p[1];
 }
 
 static inline u32 get_unaligned_be32(const void *p)
 {
-   return be32_to_cpup((__be32 *)p);
+   const u8 *__p = p;
+   return __p[0]  24 | __p[1]  16 | __p[2]  8 | __p[3];
 }
 
 static inline u64 get_unaligned_be64(const void *p)
 {
-   return be64_to_cpup((__be64 *)p);
+   const u8 *__p = p;
+   return (unsigned long long)
+   get_unaligned_be32(__p)  32 |
+   get_unaligned_be32((__p + 4));
 }
 
 static inline void put_unaligned_le16(u16 val, void *p)
 {
-   *((__le16 *)p) = cpu_to_le16(val);
+   u8 *__p = p;
+   *__p++ = val;
+   *__p++ = val  8;
 }
 
 static inline void put_unaligned_le32(u32 val, void *p)
 {
-   *((__le32 *)p) = cpu_to_le32(val);
+   u8 *__p = p;
+   put_unaligned_le16(val  16, __p + 2);
+   put_unaligned_le16(val, __p);
 }
 
 static inline void put_unaligned_le64(u64 val, void *p)
 {
-   *((__le64 *)p) = cpu_to_le64(val);
+   u8 *__p = p;
+   put_unaligned_le32(val  32, __p + 4);
+   put_unaligned_le32(val, __p);
 }
 
 static inline void put_unaligned_be16(u16 val, void *p)
 {
-   *((__be16 *)p) = cpu_to_be16(val);
+   u8 *__p = p;
+   *__p++ = val  8;
+   *__p++ = val;
 }
 
 static inline void put_unaligned_be32(u32 val, void *p)
 {
-   *((__be32 *)p) = cpu_to_be32(val);
+   u8 *__p = p;
+   put_unaligned_be16(val  16, __p);
+   put_unaligned_be16(val, __p + 2);
 }
 
 static inline void put_unaligned_be64(u64 val, void *p)
 {
-   *((__be64 *)p) = cpu_to_be64(val);
+   u8 *__p = p;
+   put_unaligned_be32(val  32, __p);
+   put_unaligned_be32(val, __p + 4);
 }
 
 #endif /* _LINUX_UNALIGNED_ACCESS_OK_H */
-- 
1.6.0.4

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[U-Boot] [PATCH] Repair the 'netry=once' option.

[Remy Bohmer]

'netretry = once' does the same as 'netretry = yes', because it is not stored
when it was tried once.

Signed-off-by: Remy Bohmer li...@bohmer.net
---
 net/net.c |   34 +-
 1 files changed, 25 insertions(+), 9 deletions(-)

diff --git a/net/net.c b/net/net.c
index cab4b2d..fd13cd9 100644
--- a/net/net.c
+++ b/net/net.c
@@ -197,6 +197,8 @@ volatile uchar *NetTxPacket = 0;/* THE transmit packet  
*/
 
 static int net_check_prereq (proto_t protocol);
 
+static int NetTryCount;
+
 /**/
 
 IPaddr_t   NetArpWaitPacketIP;
@@ -320,6 +322,7 @@ NetLoop(proto_t protocol)
NetArpWaitReplyIP = 0;
NetArpWaitTxPacket = NULL;
NetTxPacket = NULL;
+   NetTryCount = 1;
 
if (!NetTxPacket) {
int i;
@@ -558,17 +561,30 @@ startAgainHandler(uchar * pkt, unsigned dest, unsigned 
src, unsigned len)
 void NetStartAgain (void)
 {
char *nretry;
-   int noretry = 0, once = 0;
+   int retry_forever = 0;
+   unsigned long retrycnt = 0;
+
+   nretry = getenv(netretry);
+   if (nretry) {
+   if (!strcmp(nretry, yes))
+   retry_forever = 1;
+   else if (!strcmp(nretry, no))
+   retrycnt = 0;
+   else if (!strcmp(nretry, once))
+   retrycnt = 1;
+   else
+   retrycnt = simple_strtoul(nretry, NULL, 0);
+   } else
+   retry_forever = 1;
 
-   if ((nretry = getenv (netretry)) != NULL) {
-   noretry = (strcmp (nretry, no) == 0);
-   once = (strcmp (nretry, once) == 0);
-   }
-   if (noretry) {
-   eth_halt ();
+   if ((!retry_forever)  (NetTryCount = retrycnt)) {
+   eth_halt();
NetState = NETLOOP_FAIL;
return;
}
+
+   NetTryCount++;
+
 #ifndef CONFIG_NET_MULTI
NetSetTimeout (1UL, startAgainTimeout);
NetSetHandler (startAgainHandler);
@@ -580,7 +596,7 @@ void NetStartAgain (void)
eth_init (gd-bd);
if (NetRestartWrap) {
NetRestartWrap = 0;
-   if (NetDevExists  !once) {
+   if (NetDevExists) {
NetSetTimeout (1UL, startAgainTimeout);
NetSetHandler (startAgainHandler);
} else {
-- 
1.6.0.4

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[U-Boot] [PATCH] Repair build failure in case PPC is not defined and FIT is beng used.

[Remy Bohmer]

Signed-off-by: Remy Bohmer li...@bohmer.net
---
 common/cmd_bootm.c |2 +-
 common/image.c |2 ++
 2 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 8f83598..32fd9bb 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -524,7 +524,7 @@ int do_bootm_subcommand (cmd_tbl_t *cmdtp, int flag, int 
argc, char *argv[])
}
break;
 #endif
-#ifdef CONFIG_OF_LIBFDT
+#if defined(CONFIG_OF_LIBFDT)  defined(CONFIG_SYS_BOOTMAPSZ)
case BOOTM_STATE_FDT:
{
ulong bootmap_base = getenv_bootm_low();
diff --git a/common/image.c b/common/image.c
index 6eaf41e..41b584d 100644
--- a/common/image.c
+++ b/common/image.c
@@ -1506,9 +1506,11 @@ int boot_get_fdt (int flag, int argc, char *argv[], 
bootm_headers_t *images,
fdt_blob = (char *)data;
}
 
+#if defined(CONFIG_PPC)
images-fit_hdr_fdt = fit_hdr;
images-fit_uname_fdt = fit_uname_fdt;
images-fit_noffset_fdt = fdt_noffset;
+#endif
break;
} else
 #endif
-- 
1.6.0.4

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Re: [U-Boot] [PATCH] Enable port-mapped access to 16550 UART

[Graeme Russ]

Detlev,

Thanks for havnig a look at this

On Thu, Oct 29, 2009 at 3:13 AM, Detlev Zundel d...@denx.de wrote:
 Hello Graeme,

 This patch does two things:
   - Changes default behaviour to use proper memory accessors
   - Allows port-mapped access (using inb/outb) for the x86 architecture

 Signed-off-by: Graeme Russ graeme.r...@gmail.com
 ---
  drivers/serial/ns16550.c |   69 
 ++
  1 files changed, 39 insertions(+), 30 deletions(-)

 diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
 index 2fcc8c3..c41ca0d 100644
 --- a/drivers/serial/ns16550.c
 +++ b/drivers/serial/ns16550.c
 @@ -6,6 +6,8 @@

  #include config.h
  #include ns16550.h
 +#include linux/types.h
 +#include asm/io.h

  #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
  #define UART_MCRVAL (UART_MCR_DTR | \
 @@ -13,28 +15,35 @@
  #define UART_FCRVAL (UART_FCR_FIFO_EN |  \
UART_FCR_RXSR |\
UART_FCR_TXSR) /* Clear  enable FIFOs */
 +#ifdef CONFIG_X86
 +#define uart_writeb(x,y) outb(x,(ulong)y)
 +#define uart_readb(y)inb((ulong)y)
 +#else
 +#define uart_writeb(x,y) writeb(x,y)
 +#define uart_readb(y) readb(y)
 +#endif

 Why do you need a specific variant for X86 instead of implementing
 writeb and readb correctly in the first place?

For x86 readb and writeb provide volatile accessors to memory - These are
used for memory-mapped devices (i.e. devices which are attached directly
to the memory bus such as PCI devices etc). inb and outb provide access to
I/O Ports. For example:

writeb(0x12, 0x1000) will generate something like:
movb $0x12, al
movl $0x1000, ebx
movb al, ebx

outb(0x12, 0x1000) will generate something like:
movb $0x12, al
movl $0x1000, ebx
outb al, ebx

Looking at include/asm/asm-ppc/io.h it seems to me that, for PPC, there is
no differentiation between readb/writeb and inb/outb other than that the
user may define an optional IOBASE for inb/outb which shifts where in
memory inb/outb accesses, but they are still memory accesses. So, for PPC,
if IOBASE is 0, the above two examples will compile to identical code.

(Having a look at the other arches, it appears that x86 is very unique in
that inb/outb do not access memory)


 If this was in place, all the accessors should only switch to using
 readb/writeb and from looking at it, this should not brak e.g. PowerPC
 boards with weird register layouts.

This patch should not change the behaviour for non x86 boards other than
to use proper I/O accessors which prevents any risk that gcc will
optimise them into some other order (or completely out)

For x86, this patch causes the driver to use I/O rather than memory which
is how PC UARTS (and interrupt controllers and nearly anything else which
is not 'memory') have always been accessed


 When you post a patch with only these changes, I'll test it on a few of
 the usual suspects on PowerPC.

The only other option is my even uglier first patch:

http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/70250


 Cheers
  Detlev


Regards,

Graeme
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Re: [U-Boot] [PATCH] Fix Compliation warning for SBC35-A9G20 board

[Tom]

Wolfgang Denk wrote:
 Dear s-paul...@ti.com,
 
 In message 1256742293-17000-1-git-send-email-s-paul...@ti.com you wrote:
 From: Sandeep Paulraj s-paul...@ti.com

 The patch fixes a compilation warning by defining
 CONFIG_SYS_64BIT_VSPRINTF in the config file

 Signed-off-by: Sandeep Paulraj s-paul...@ti.com
 ---
  include/configs/sbc35_a9g20.h |1 +
  1 files changed, 1 insertions(+), 0 deletions(-)
 
 Applied, thanks.
 
 Tom, I hope this is OK with you.
 

Yes
For a trivial change.
Else, the changes need runtime on the boards the changes are made for.
I do not want changes that can not be verified by the changer.
Tom

 Best regards,
 
 Wolfgang Denk
 

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Re: [U-Boot] [PATCH] Fix Compliation warning for TNY-A9260 and TNY-A9G20

[Tom]

Wolfgang Denk wrote:
 Dear s-paul...@ti.com,
 
 In message 1256742303-17029-1-git-send-email-s-paul...@ti.com you wrote:
 From: Sandeep Paulraj s-paul...@ti.com

 The patch fixes a compilation warning by defining
 CONFIG_SYS_64BIT_VSPRINTF in the config file

 Signed-off-by: Sandeep Paulraj s-paul...@ti.com
 ---
  include/configs/tny_a9260.h |1 +
  1 files changed, 1 insertions(+), 0 deletions(-)
 
 Applied, thanks.
 
 Tom, I hope this is OK with you.
 
Yes.
For trivial changes
Else the changes should be verified by the changer.
I do not want unverified changes.
This means the changer should have at least some runtime coverage.
Tom

 Best regards,
 
 Wolfgang Denk
 

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[U-Boot] [PATCH] ppc/85xx: Clean up mpc8536DS PCI setup code

[Mingkai Hu]

Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Mingkai Hu mingkai...@freescale.com
---
 board/freescale/mpc8536ds/mpc8536ds.c |  252 +
 1 files changed, 64 insertions(+), 188 deletions(-)

diff --git a/board/freescale/mpc8536ds/mpc8536ds.c 
b/board/freescale/mpc8536ds/mpc8536ds.c
index 9d617df..84f3c30 100644
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -195,17 +195,24 @@ static struct pci_controller pcie2_hose;
 static struct pci_controller pcie3_hose;
 #endif
 
-int first_free_busno=0;
-
-void
-pci_init_board(void)
+#ifdef CONFIG_PCI
+void pci_init_board(void)
 {
-   volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-   uint devdisr = gur-devdisr;
-   uint sdrs2_io_sel =
-   (gur-pordevsr  MPC85xx_PORDEVSR_SRDS2_IO_SEL)  27;
-   uint io_sel = (gur-pordevsr  MPC85xx_PORDEVSR_IO_SEL)  19;
-   uint host_agent = (gur-porbmsr  MPC85xx_PORBMSR_HA)  16;
+   ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+   struct fsl_pci_info pci_info[4];
+   u32 devdisr, pordevsr, io_sel, sdrs2_io_sel, host_agent;
+   u32 porpllsr, pci_agent, pci_speed, pci_32, pci_arb, pci_clk_sel;
+   int first_free_busno = 0;
+   int num = 0;
+
+   int pcie_ep, pcie_configured;
+
+   devdisr = in_be32(gur-devdisr);
+   pordevsr = in_be32(gur-pordevsr);
+   porpllsr = in_be32(gur-porpllsr);
+   io_sel = (pordevsr  MPC85xx_PORDEVSR_IO_SEL)  19;
+   sdrs2_io_sel = (pordevsr  MPC85xx_PORDEVSR_SRDS2_IO_SEL)  27;
+   host_agent = (in_be32(gur-porbmsr)  MPC85xx_PORBMSR_HA)  16;
 
debug(   pci_init_board: devdisr=%x, sdrs2_io_sel=%x, io_sel=%x,\
host_agent=%x\n, devdisr, sdrs2_io_sel, io_sel, host_agent);
@@ -218,228 +225,97 @@ pci_init_board(void)
} else if (sdrs2_io_sel == 6)
printf(eTSEC1 is in sgmii mode.\n);
 
+   puts(\n);
 #ifdef CONFIG_PCIE3
-{
-   volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR;
-   struct pci_controller *hose = pcie3_hose;
-   int pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_3, host_agent);
-   int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel);
-   struct pci_region *r = hose-regions;
+   pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_3, host_agent);
+   pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel);
 
-   if (pcie_configured  !(devdisr  MPC85xx_DEVDISR_PCIE)){
-   printf (\nPCIE3 connected to Slot3 as %s (base address 
%x),
+   if (pcie_configured  !(devdisr  MPC85xx_DEVDISR_PCIE3)){
+   SET_STD_PCIE_INFO(pci_info[num], 3);
+   printf (PCIE3 connected to Slot3 as %s (base address 
%lx)\n,
pcie_ep ? End Point : Root Complex,
-   (uint)pci);
-   if (pci-pme_msg_det) {
-   pci-pme_msg_det = 0x;
-   debug ( with errors.  Clearing.  Now 
0x%08x,pci-pme_msg_det);
-   }
-   printf (\n);
-
-   /* outbound memory */
-   pci_set_region(r++,
-  CONFIG_SYS_PCIE3_MEM_BUS,
-  CONFIG_SYS_PCIE3_MEM_PHYS,
-  CONFIG_SYS_PCIE3_MEM_SIZE,
-  PCI_REGION_MEM);
-
-   /* outbound io */
-   pci_set_region(r++,
-  CONFIG_SYS_PCIE3_IO_BUS,
-  CONFIG_SYS_PCIE3_IO_PHYS,
-  CONFIG_SYS_PCIE3_IO_SIZE,
-  PCI_REGION_IO);
-
-   hose-region_count = r - hose-regions;
-
-   hose-first_busno=first_free_busno;
-
-   fsl_pci_init(hose, (u32)pci-cfg_addr, (u32)pci-cfg_data);
-
-   first_free_busno=hose-last_busno+1;
-   printf (PCIE3 on bus %02x - %02x\n,
-   hose-first_busno,hose-last_busno);
+   pci_info[num].regs);
+   first_free_busno = fsl_pci_init_port(pci_info[num++],
+   pcie3_hose, first_free_busno, pcie_ep);
} else {
printf (PCIE3: disabled\n);
}
-}
+
+   puts(\n);
 #else
-   gur-devdisr |= MPC85xx_DEVDISR_PCIE3; /* disable */
+   setbits_be32(gur-devdisr, MPC85xx_DEVDISR_PCIE3); /* disable */
 #endif
 
 #ifdef CONFIG_PCIE1
-{
-   volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
-   struct pci_controller *hose = pcie1_hose;
-   int pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_1, host_agent);
-   int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
-   struct pci_region *r = hose-regions;
+   pcie_ep = 

Re: [U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space

[Kumar Gopalpet-B05799]

 

-Original Message-
From: Phillips Kim-R1AAHA 
Sent: Thursday, October 29, 2009 1:36 AM
To: Kumar Gopalpet-B05799
Cc: u-boot@lists.denx.de
Subject: Re: [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space

On Wed, 28 Oct 2009 14:19:18 +0530
Sandeep Gopalpet sandeep.ku...@freescale.com wrote:

 Moved the mdio regs out of the tsec structure,and provided different 
 offsets for tsec base and mdio base so that provision for 
etsec2.0 can 
 be provided.
 
 This patch helps in providing the support for etsec2.0 In etsec2.0, 
 the MDIO register space and the etsec reg space are different.
 
 Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into 
 platform specific files.
 
 Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
 ---

without this patchseries:

U-Boot 2009.11-rc1 (Oct 28 2009 - 14:57:54) MPC83XX

Reset Status: Software Hard, External/Internal Soft, 
External/Internal Hard

CPU:   e300c3, MPC8315E, Rev: 1.0 at 400 MHz, CSB: 133.333 MHz
Board: Freescale MPC8315ERDB Rev 0.1
I2C:   ready
DRAM:  128 MB
FLASH:  8 MB
NAND:  32 MiB
PCIE0: No link
PCIE1: No link
In:serial
Out:   serial
Err:   serial
Net:   eTSEC0, eTSEC1
Hit any key to stop autoboot:  0
= ping $serverip
Speed: 1000, full duplex
Using eTSEC0 device
host 192.168.1.1 is alive
= 

with this patchseries:

U-Boot 2009.11-rc1-2-g3775d27 (Oct 28 2009 - 14:45:51) MPC83XX

Reset Status: Software Hard, External/Internal Soft, 
External/Internal Hard

CPU:   e300c3, MPC8315E, Rev: 1.0 at 400 MHz, CSB: 133.333 MHz
Board: Freescale MPC8315ERDB Rev 0.1
I2C:   ready
DRAM:  128 MB
FLASH:  8 MB
NAND:  32 MiB
PCIE0: No link
PCIE1: No link
In:serial
Out:   serial
Err:   serial
Net:   eTSEC0: No support for PHY id 0; assuming generic
eTSEC1: No support for PHY id 0; assuming generic eTSEC0, 
eTSEC1 Hit any key to stop autoboot:  0 = ping $serverip
eTSEC0: No link.
eTSEC1: No link.
ping failed; host 192.168.1.1 is not alive

do you not test older version tsecs/83xx?

 +typedef struct tsec_mdio
 +{

please also move this brace onto the above line.

Yes, Kim I have tested on one of the 83xx platforms. Will recheck if I
missed something.


-Thanks
Sandeep 
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Re: [U-Boot] [PATCH] Make the generic unaligned access code safe for unaligned access

[Stefan Roese]

Hi Remy,

On Wednesday 28 October 2009 22:13:38 Remy Bohmer wrote:
 The current generic code for handling unaligned access assumes that
 the processor can properly handle unaligned accesses itself.
 This is at least not the case for ARM, which results in runtime
 errors.
 
 Rewrite it such that it works for ARM as well.

I introduced this header some time ago for UBIFS support (for PowerPC).
As you may have noticed, it's a copy from the Linux version. And I
would like to keep it this way if possible. Looking at the Linux ARM
version, the basic difference seems to be the header
include/asm-arm/unaligned.h which includes this file. The Linux
version of unaligned.h does *not* include access_ok.h at all. It
includes le_byteshift.h and be_byteshift.h instead. And I would
really like to keep this in sync with Linux if possible.

So why not do it this way (totally untested):

From 3e9aa23a66041f05b94f94b1326941331248a487 Mon Sep 17 00:00:00 2001
From: Stefan Roese s...@denx.de
Date: Thu, 29 Oct 2009 05:57:53 +0100
Subject: [PATCH] arm: Use Linux version for unaligned access code

Signed-off-by: Stefan Roese s...@denx.de
---
 include/asm-arm/unaligned.h|3 +-
 include/linux/unaligned/be_byteshift.h |   70 
 include/linux/unaligned/le_byteshift.h |   70 
 3 files changed, 142 insertions(+), 1 deletions(-)
 create mode 100644 include/linux/unaligned/be_byteshift.h
 create mode 100644 include/linux/unaligned/le_byteshift.h

diff --git a/include/asm-arm/unaligned.h b/include/asm-arm/unaligned.h
index d644df7..44593a8 100644
--- a/include/asm-arm/unaligned.h
+++ b/include/asm-arm/unaligned.h
@@ -1,7 +1,8 @@
 #ifndef _ASM_ARM_UNALIGNED_H
 #define _ASM_ARM_UNALIGNED_H
 
-#include linux/unaligned/access_ok.h
+#include linux/unaligned/le_byteshift.h
+#include linux/unaligned/be_byteshift.h
 #include linux/unaligned/generic.h
 
 /*
diff --git a/include/linux/unaligned/be_byteshift.h 
b/include/linux/unaligned/be_byteshift.h
new file mode 100644
index 000..9356b24
--- /dev/null
+++ b/include/linux/unaligned/be_byteshift.h
@@ -0,0 +1,70 @@
+#ifndef _LINUX_UNALIGNED_BE_BYTESHIFT_H
+#define _LINUX_UNALIGNED_BE_BYTESHIFT_H
+
+#include linux/types.h
+
+static inline u16 __get_unaligned_be16(const u8 *p)
+{
+   return p[0]  8 | p[1];
+}
+
+static inline u32 __get_unaligned_be32(const u8 *p)
+{
+   return p[0]  24 | p[1]  16 | p[2]  8 | p[3];
+}
+
+static inline u64 __get_unaligned_be64(const u8 *p)
+{
+   return (u64)__get_unaligned_be32(p)  32 |
+  __get_unaligned_be32(p + 4);
+}
+
+static inline void __put_unaligned_be16(u16 val, u8 *p)
+{
+   *p++ = val  8;
+   *p++ = val;
+}
+
+static inline void __put_unaligned_be32(u32 val, u8 *p)
+{
+   __put_unaligned_be16(val  16, p);
+   __put_unaligned_be16(val, p + 2);
+}
+
+static inline void __put_unaligned_be64(u64 val, u8 *p)
+{
+   __put_unaligned_be32(val  32, p);
+   __put_unaligned_be32(val, p + 4);
+}
+
+static inline u16 get_unaligned_be16(const void *p)
+{
+   return __get_unaligned_be16((const u8 *)p);
+}
+
+static inline u32 get_unaligned_be32(const void *p)
+{
+   return __get_unaligned_be32((const u8 *)p);
+}
+
+static inline u64 get_unaligned_be64(const void *p)
+{
+   return __get_unaligned_be64((const u8 *)p);
+}
+
+static inline void put_unaligned_be16(u16 val, void *p)
+{
+   __put_unaligned_be16(val, p);
+}
+
+static inline void put_unaligned_be32(u32 val, void *p)
+{
+   __put_unaligned_be32(val, p);
+}
+
+static inline void put_unaligned_be64(u64 val, void *p)
+{
+   __put_unaligned_be64(val, p);
+}
+
+#endif /* _LINUX_UNALIGNED_BE_BYTESHIFT_H */
diff --git a/include/linux/unaligned/le_byteshift.h 
b/include/linux/unaligned/le_byteshift.h
new file mode 100644
index 000..be376fb
--- /dev/null
+++ b/include/linux/unaligned/le_byteshift.h
@@ -0,0 +1,70 @@
+#ifndef _LINUX_UNALIGNED_LE_BYTESHIFT_H
+#define _LINUX_UNALIGNED_LE_BYTESHIFT_H
+
+#include linux/types.h
+
+static inline u16 __get_unaligned_le16(const u8 *p)
+{
+   return p[0] | p[1]  8;
+}
+
+static inline u32 __get_unaligned_le32(const u8 *p)
+{
+   return p[0] | p[1]  8 | p[2]  16 | p[3]  24;
+}
+
+static inline u64 __get_unaligned_le64(const u8 *p)
+{
+   return (u64)__get_unaligned_le32(p + 4)  32 |
+  __get_unaligned_le32(p);
+}
+
+static inline void __put_unaligned_le16(u16 val, u8 *p)
+{
+   *p++ = val;
+   *p++ = val  8;
+}
+
+static inline void __put_unaligned_le32(u32 val, u8 *p)
+{
+   __put_unaligned_le16(val  16, p + 2);
+   __put_unaligned_le16(val, p);
+}
+
+static inline void __put_unaligned_le64(u64 val, u8 *p)
+{
+   __put_unaligned_le32(val  32, p + 4);
+   __put_unaligned_le32(val, p);
+}
+
+static inline u16 get_unaligned_le16(const void *p)
+{
+   return __get_unaligned_le16((const u8 *)p);
+}
+
+static inline u32 get_unaligned_le32(const void *p)
+{
+   return