Re: [U-Boot] [PATCH] ppc4xx: Fix compilation error on ML2 board
On Tuesday 26 January 2010 13:33:29 Stefan Roese wrote: Recently this compilation error occurs: Configuring for ML2 board... traps.c: In function 'MachineCheckException': traps.c:159: error: 'debugger_exception_handler' undeclared (first use in this function) traps.c:159: error: (Each undeclared identifier is reported only once traps.c:159: error: for each function it appears in.) This patch now fixes it by including kgdb.h Applied to u-boot-ppc4xx/master. Thanks. Cheers, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ppc4xx: Fix building of PMC440 board
On Monday 01 February 2010 13:53:47 Matthias Fuchs wrote: Remove some unused features and default environment variable to shrink the PMC440 u-boot. Applied to u-boot-ppc4xx/master. Thanks. Cheers, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ppc4xx: Fix building for PLU405 boards
On Monday 01 February 2010 13:53:59 Matthias Fuchs wrote: The init_coupler() function from board/esd/plu405/plu405.c got lost somehow! This patch readds it. Applied to u-boot-ppc4xx/master. Thanks. Cheers, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ppc4xx: Remove unused feature from AR405 board
On Monday 01 February 2010 13:54:09 Matthias Fuchs wrote: This patch fixes building for AR405 boards by remove an unused feature. Applied to u-boot-ppc4xx/master. Thanks. Cheers, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-ppc4xx/master
Hi Wolfgang, please pull some 4xx fixes into master: The following changes since commit 9b208ece0a4e040774e24990b7cb6f0ad0ca4cc7: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx are available in the git repository at: git://www.denx.de/git/u-boot-ppc4xx.git master Matthias Fuchs (3): ppc4xx: Fix building of PMC440 board ppc4xx: Fix building for PLU405 boards ppc4xx: Remove unused feature from AR405 board Stefan Roese (1): ppc4xx: Fix compilation error on ML2 board board/esd/plu405/plu405.c | 28 cpu/ppc4xx/traps.c|1 + include/configs/AR405.h |1 + include/configs/PMC440.h |6 -- 4 files changed, 30 insertions(+), 6 deletions(-) Thanks. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] mpc5xxx/cpu_init.c: fix warning: unused variable 'gpt0'
Hi Wolfgang, Signed-off-by: Wolfgang Denk w...@denx.de Acked-by: Detlev Zundel d...@denx.de --- cpu/mpc5xxx/cpu_init.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/cpu/mpc5xxx/cpu_init.c b/cpu/mpc5xxx/cpu_init.c index b151464..2aa6e1c 100644 --- a/cpu/mpc5xxx/cpu_init.c +++ b/cpu/mpc5xxx/cpu_init.c @@ -46,9 +46,12 @@ void cpu_init_f (void) (struct mpc5xxx_gpio *) MPC5XXX_GPIO; volatile struct mpc5xxx_xlb *xlb = (struct mpc5xxx_xlb *) MPC5XXX_XLBARB; +#if defined(CONFIG_WATCHDOG) volatile struct mpc5xxx_gpt *gpt0 = (struct mpc5xxx_gpt *) MPC5XXX_GPT; +#endif /* CONFIG_WATCHDOG */ unsigned long addecr = (1 25); /* Boot_CS */ + #if defined(CONFIG_SYS_RAMBOOT) defined(CONFIG_MGT5100) addecr |= (1 22); /* SDRAM enable */ #endif -- I have always observed that the pretensions of all people are in exact inverse ratio to their merits; this is one of the axioms of morals.-- Joseph Lagrange -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] mpc5xxx/cpu_init.c: fix warning: unused variable 'cdm'
Hi Wolfgang, Signed-off-by: Wolfgang Denk w...@denx.de Acked-by: Detlev Zundel d...@denx.de By the way, now that we have a patch touching this stuff on the mailing list - would anyone object to removing the mgt5100 stuff? If I am not missing anything, this is not being used anywhere and makes the code look overly complicated. Would such a cleanup patch be accepted? Thanks Detlev --- cpu/mpc5xxx/cpu_init.c | 12 +++- 1 files changed, 7 insertions(+), 5 deletions(-) diff --git a/cpu/mpc5xxx/cpu_init.c b/cpu/mpc5xxx/cpu_init.c index 2aa6e1c..560c9b3 100644 --- a/cpu/mpc5xxx/cpu_init.c +++ b/cpu/mpc5xxx/cpu_init.c @@ -40,12 +40,14 @@ void cpu_init_f (void) (struct mpc5xxx_mmap_ctl *) CONFIG_SYS_MBAR; volatile struct mpc5xxx_lpb *lpb = (struct mpc5xxx_lpb *) MPC5XXX_LPB; - volatile struct mpc5xxx_cdm *cdm = - (struct mpc5xxx_cdm *) MPC5XXX_CDM; volatile struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *) MPC5XXX_GPIO; volatile struct mpc5xxx_xlb *xlb = (struct mpc5xxx_xlb *) MPC5XXX_XLBARB; +#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) + volatile struct mpc5xxx_cdm *cdm = + (struct mpc5xxx_cdm *) MPC5XXX_CDM; +#endif /* CONFIG_SYS_IPBCLK_EQUALS_XLBCLK */ #if defined(CONFIG_WATCHDOG) volatile struct mpc5xxx_gpt *gpt0 = (struct mpc5xxx_gpt *) MPC5XXX_GPT; @@ -187,11 +189,11 @@ void cpu_init_f (void) # if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) /* Motorola reports IPB should better run at 133 MHz. */ -#if defined(CONFIG_MGT5100) +# if defined(CONFIG_MGT5100) setbits_be32(mm-addecr, 1); -#elif defined(CONFIG_MPC5200) +# elif defined(CONFIG_MPC5200) setbits_be32(mm-ipbi_ws_ctrl, 1); -#endif +# endif /* pci_clk_sel = 0x02, ipb_clk_sel = 0x00; */ addecr = in_be32(cdm-cfg); addecr = ~0x103; -- Question: If you were redesigning UNIX, what would you do differently? Ken Thompson: I'd spell creat with an e. -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] unassigned-patches/51: [PATCH] S5PC100: Moved the #defines for PLLs to common header file
The get_pll_clk(int) API returns the PLL frequency based on the (int) argument which is defined locally in clock.c Moving that #define to common header file (clk.h) would be helpful when using the API from other files. Signed-off-by: Naveen Krishna Ch ch.nav...@samsung.com --- Added to GNATS database as unassigned-patches/51 Responsible:patch-coord Message-Id: 1265200544-26547-1-git-send-email-ch.nav...@samsung.com In-Reply-To: References: Patch-Date: Wed Feb 03 13:35:44 +0100 2010 --- cpu/arm_cortexa8/s5pc1xx/clock.c |7 +-- include/asm-arm/arch-s5pc1xx/clk.h |6 ++ 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/cpu/arm_cortexa8/s5pc1xx/clock.c b/cpu/arm_cortexa8/s5pc1xx/clock.c index a9e78dd..19619f9 100644 --- a/cpu/arm_cortexa8/s5pc1xx/clock.c +++ b/cpu/arm_cortexa8/s5pc1xx/clock.c @@ -25,12 +25,7 @@ #include common.h #include asm/io.h #include asm/arch/clock.h - -#define APLL 0 -#define MPLL 1 -#define EPLL 2 -#define HPLL 3 -#define VPLL 4 +#include asm/arch/clk.h #define CLK_M 0 #define CLK_D 1 diff --git a/include/asm-arm/arch-s5pc1xx/clk.h b/include/asm-arm/arch-s5pc1xx/clk.h index f1aa44f..3e59abe 100644 --- a/include/asm-arm/arch-s5pc1xx/clk.h +++ b/include/asm-arm/arch-s5pc1xx/clk.h @@ -23,6 +23,12 @@ #ifndef __ASM_ARM_ARCH_CLK_H_ #define __ASM_ARM_ARCH_CLK_H_ +#define APLL 0 +#define MPLL 1 +#define EPLL 2 +#define HPLL 3 +#define VPLL 4 + void s5pc1xx_clock_init(void); extern unsigned long (*get_pll_clk)(int pllreg); -- 1.6.6 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/3] Add Support for AM3517EVM with EMIF4
Hiremath, Vaibhav wrote: -Original Message- From: Hiremath, Vaibhav Sent: Saturday, January 30, 2010 3:47 PM To: u-boot@lists.denx.de Cc: Paulraj, Sandeep; tom@windriver.com; Hiremath, Vaibhav Subject: [PATCH 0/3] Add Support for AM3517EVM with EMIF4 From: Vaibhav Hiremath hvaib...@ti.com snip [Hiremath, Vaibhav] Sandeep, Can you please merge these series of patches for next window? This patchset still needs to be reviewed. I will post my review this weekend. Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/3] Add Support for AM3517EVM with EMIF4
-Original Message- From: Tom [mailto:tom@windriver.com] Sent: Wednesday, February 03, 2010 6:54 PM To: Hiremath, Vaibhav Cc: u-boot@lists.denx.de; Paulraj, Sandeep Subject: Re: [PATCH 0/3] Add Support for AM3517EVM with EMIF4 Hiremath, Vaibhav wrote: -Original Message- From: Hiremath, Vaibhav Sent: Saturday, January 30, 2010 3:47 PM To: u-boot@lists.denx.de Cc: Paulraj, Sandeep; tom@windriver.com; Hiremath, Vaibhav Subject: [PATCH 0/3] Add Support for AM3517EVM with EMIF4 From: Vaibhav Hiremath hvaib...@ti.com snip [Hiremath, Vaibhav] Sandeep, Can you please merge these series of patches for next window? This patchset still needs to be reviewed. I will post my review this weekend. [Hiremath, Vaibhav] Review comments are always welcomed. Since this is second version and we haven't had any comments last time. I requested to merge. Looking forward for your comments. Thanks, Vaibhav Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] mpc5xxx/cpu_init.c: fix warning: unused variable 'cdm'
Dear Detlev, In message m2zl3q5vlc@ohwell.denx.de you wrote: By the way, now that we have a patch touching this stuff on the mailing list - would anyone object to removing the mgt5100 stuff? If I am not missing anything, this is not being used anywhere and makes the code look overly complicated. It is a pretty safe ssumption that no MGT5100 systems are out there that are still being used for software development, i. e. where we need current versions of U-Boot. Would such a cleanup patch be accepted? Accepted and appreciated. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Humanity has the stars in its future, and that future is too important to be lost under the burden of juvenile folly and ignorant superstition. - Isaac Asimov ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv2] OMAP3: Avoid re-write to PRM_CLKSRC_CTRL
-Original Message-
From: Premi, Sanjeev
Sent: Friday, January 29, 2010 6:44 PM
To: u-boot@lists.denx.de
Cc: Premi, Sanjeev; Hiremath, Vaibhav
Subject: [PATCHv2] OMAP3: Avoid re-write to PRM_CLKSRC_CTRL
The function get_osc_clk_speed() is used to determine the master
clock. If SYS_CLK is being divided by 2, the divider is changed
to 1 - without following any sequence.
Before reaching this function, some of the clocks have already
been set (by x-loader or equiv) OR power-on defaults are in use.
This change is too sudden, leading to instability beyond certain
tolerance zone.
The problem was observed with DM3730 (silimar to OMAP3630), on
the OMAP3EVM.
This patch removes the step to change clock divider. Instead,
uses a multiplication factor (if needed). Mathematically, the
formula is unchanged.
Tested on OMAP3EVM with OMAP3530 and DM3730.
Signed-off-by: Sanjeev Premi pr...@ti.com
Signed-off-by: Hiremath Vaibhav hvaib...@ti.com
---
cpu/arm_cortexa8/omap3/clock.c | 15 +++
1 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/cpu/arm_cortexa8/omap3/clock.c
b/cpu/arm_cortexa8/omap3/clock.c
index 174c453..e8189b4 100644
--- a/cpu/arm_cortexa8/omap3/clock.c
+++ b/cpu/arm_cortexa8/omap3/clock.c
@@ -40,7 +40,7 @@
**
***/
u32 get_osc_clk_speed(void)
{
- u32 start, cstart, cend, cdiff, val;
+ u32 start, cstart, cend, cdiff, cdiv, val;
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
struct prm *prm_base = (struct prm *)PRM_BASE;
struct gptimer *gpt1_base = (struct gptimer *)OMAP34XX_GPT1;
@@ -48,9 +48,13 @@ u32 get_osc_clk_speed(void)
val = readl(prm_base-clksrc_ctrl);
- /* If SYS_CLK is being divided by 2, remove for now */
- val = (val (~SYSCLKDIV_2)) | SYSCLKDIV_1;
- writel(val, prm_base-clksrc_ctrl);
+ if (val SYSCLKDIV_2)
+ cdiv = 2;
+ else if (val SYSCLKDIV_1)
+ cdiv = 1;
+ else
+ /*Should never reach here! (Assume divider as 1) */
+ cdiv = 1;
/* enable timer2 */
val = readl(prcm_base-clksel_wkup) | CLKSEL_GPT1;
@@ -83,6 +87,9 @@ u32 get_osc_clk_speed(void)
cend = readl(gpt1_base-tcrr); /* get end
sys_clk count */
cdiff = cend - cstart; /* get elapsed ticks */
+ if (cdiv == 2)
+ cdiff *= 2;
+
/* based on number of ticks assign speed */
if (cdiff 19000)
return S38_4M;
--
1.6.2.2
Tom, Sandeep,
Just wanted to check the status of this patch.
Best regards,
Sanjeev
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] mpc5xxx/cpu_init.c: fix warning: unused variable 'cdm'
In message 1265018287-22037-2-git-send-email...@denx.de you wrote: Signed-off-by: Wolfgang Denk w...@denx.de --- cpu/mpc5xxx/cpu_init.c | 12 +++- 1 files changed, 7 insertions(+), 5 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The moral of the story is: Don't stop to tighten your shoe laces during the Olympics 100m finals. - Kevin Jones in dejo68@bri.hp.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request - net
Dear Ben Warren, In message 4b6678fc.20...@gmail.com you wrote: Wolfgang The following changes since commit 9b208ece0a4e040774e24990b7cb6f0ad0ca4cc7: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx are available in the git repository at: git://git.denx.de/u-boot-net.git master Heiko Schocher (1): 83xx, uec: split enet_interface in two variables Jens Scharsig (1): new at91_emac network driver (NET_MULTI api) Matthias Kaehlcke (2): cs8900_initialize() cleanup Add EP93xx ethernet driver Mike Frysinger (1): smc9_eeprom: fix linking error Nick Thompson (1): TI: DaVinci: Updating EMAC driver for DM365, DM646x and DA8XX Peter Tyser (6): tsec: Force TBI PHY to 1000Mbps full duplex in SGMII mode tsec: Clean up Broadcom PHY status parsing tsec: Make functions/data static when possible tsec: General cleanup tsec: Add support for using the BCM5482 PHY in fiber mode tsec: Add TSEC_FIBER flag Semih Hazar (1): macb: Fix mii_phy_read and mii_phy_write functions Seunghyeon Rhee (1): NET: Fix MAC addr handling for smc911x README| 10 + board/atmel/at91rm9200dk/at91rm9200dk.c | 15 + board/atmel/at91rm9200ek/at91rm9200ek.c | 14 + board/cmc_pu2/cmc_pu2.c | 13 + board/csb637/csb637.c | 13 + board/eukrea/cpuat91/cpuat91.c| 14 + board/freescale/mpc8360emds/mpc8360emds.c |3 +- board/kb9202/kb9202.c | 13 + board/m501sk/m501sk.c | 14 + board/mp2usb/mp2usb.c | 13 + cpu/arm920t/at91rm9200/bcm5221.c |4 +- cpu/arm920t/at91rm9200/dm9161.c |3 +- drivers/net/Makefile |2 + drivers/net/at91_emac.c | 498 +++ drivers/net/cs8900.c |3 +- drivers/net/davinci_emac.c| 266 ++--- drivers/net/ep93xx_eth.c | 653 drivers/net/ep93xx_eth.h | 144 + drivers/net/macb.c| 110 +--- drivers/net/smc911x.c | 15 +- drivers/net/tsec.c| 941 - drivers/qe/uec.c | 122 +++-- drivers/qe/uec.h | 34 +- drivers/qe/uec_phy.c | 84 ++-- examples/standalone/smc9_eeprom.c |5 +- include/asm-arm/arch-at91/at91_emac.h | 145 + include/asm-arm/arch-davinci/emac_defs.h | 59 ++- include/common.h |5 + include/configs/MPC8323ERDB.h |6 +- include/configs/MPC832XEMDS.h |6 +- include/configs/MPC8360EMDS.h |6 +- include/configs/MPC8360ERDK.h |6 +- include/configs/MPC8568MDS.h |6 +- include/configs/MPC8569MDS.h | 30 +- include/configs/at91rm9200dk.h|9 +- include/configs/at91rm9200ek.h|8 +- include/configs/cmc_pu2.h |8 +- include/configs/cpuat91.h |8 +- include/configs/csb637.h |8 +- include/configs/kb9202.h |8 +- include/configs/kmeter1.h |3 +- include/configs/m501sk.h |9 +- include/configs/mp2usb.h |8 +- include/netdev.h |2 + include/tsec.h| 20 +- 45 files changed, 2602 insertions(+), 764 deletions(-) create mode 100644 drivers/net/at91_emac.c create mode 100644 drivers/net/ep93xx_eth.c create mode 100644 drivers/net/ep93xx_eth.h create mode 100644 include/asm-arm/arch-at91/at91_emac.h Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Is a computer language with goto's totally Wirth-less? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-cfi-flash/master
Dear Stefan Roese, In message 201002020915.35862...@denx.de you wrote: Hi Wolfgang, please pull this fix into master: The following changes since commit 9b208ece0a4e040774e24990b7cb6f0ad0ca4cc7: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx are available in the git repository at: git://www.denx.de/git/u-boot-cfi-flash.git master Ladislav Michl (1): CFI: fix eraseregions numblocks drivers/mtd/cfi_mtd.c | 35 ++- 1 files changed, 18 insertions(+), 17 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Faith: not *wanting* to know what is true.- Friedrich Nietzsche ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-ppc4xx/master
Dear Stefan Roese, In message 201002031010.16549...@denx.de you wrote: Hi Wolfgang, please pull some 4xx fixes into master: The following changes since commit 9b208ece0a4e040774e24990b7cb6f0ad0ca4cc7: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx are available in the git repository at: git://www.denx.de/git/u-boot-ppc4xx.git master Matthias Fuchs (3): ppc4xx: Fix building of PMC440 board ppc4xx: Fix building for PLU405 boards ppc4xx: Remove unused feature from AR405 board Stefan Roese (1): ppc4xx: Fix compilation error on ML2 board board/esd/plu405/plu405.c | 28 cpu/ppc4xx/traps.c|1 + include/configs/AR405.h |1 + include/configs/PMC440.h |6 -- 4 files changed, 30 insertions(+), 6 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de To know how another being, another creature feels - that is impos- sible. - Terry Pratchett, _The Dark Side of the Sun_ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4 09/11] ARM/PPC: add a common way to access registers
Dear Stefano Babic, In message 4b62c655.3090...@denx.de you wrote: I will add something like CONFIG_FSL_ESDHC_BIG_ENDIAN or CONFIG_FSL_ESDHC_LITTLE_ENDIAN in the driver I changed. In the related header file for the driver, I can set driver specific macros that point to the correct accessors, depending on the new CONFIG_ switch. Then it should be clear which is the endianess used and it will be not related to the processor architecture. What do you think about this ? I like this approach better than the precious one. However, I had hoped that we could do without such manual configu- ration like CONFIG_FSL_ESDHC_*_ENDIAN. I mean, we already know the target byte order, and you know in which byte order you want to access the data, or is this board dependent? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Anything that is worth doing at all is worth doing well. -- Philip Earl of Chesterfield ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-usb
Dear Remy Bohmer, In message 3efb10971002031310v538ef875m50231aa6d173...@mail.gmail.com you wrote: The following changes since commit 111d6c6ad15d1425d3e5a678b2ff4b593e910fca: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx are available in the git repository at: git://git.denx.de/u-boot-usb.git master Cliff Cai (1): usb: musb: fix Blackfin DMA register padding Prathap Srinivas (1): musb: Add host support for DM365 EVM Remy Bohmer (1): USB: usb_control_msg wait for driver ISR to set status. common/usb.c | 19 +++-- drivers/usb/musb/blackfin_usb.h|2 +- drivers/usb/musb/davinci.c | 21 ++- drivers/usb/musb/davinci.h |1 + include/configs/davinci_dm365evm.h | 38 5 files changed, 71 insertions(+), 10 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de A Perl script is correct if it's halfway readable and gets the job done before your boss fires you. - L. Wall R. L. Schwartz, _Programming Perl_ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pull request: u-boot-usb
The following changes since commit 111d6c6ad15d1425d3e5a678b2ff4b593e910fca: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx are available in the git repository at: git://git.denx.de/u-boot-usb.git master Cliff Cai (1): usb: musb: fix Blackfin DMA register padding Prathap Srinivas (1): musb: Add host support for DM365 EVM Remy Bohmer (1): USB: usb_control_msg wait for driver ISR to set status. common/usb.c | 19 +++-- drivers/usb/musb/blackfin_usb.h|2 +- drivers/usb/musb/davinci.c | 21 ++- drivers/usb/musb/davinci.h |1 + include/configs/davinci_dm365evm.h | 38 5 files changed, 71 insertions(+), 10 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 7/9 V3] prepare joining at91rm9200 into at91
+/* reset time */
+at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
+lastinc = readl(tc-tc[0].cv) 0x;
+timestamp = 0;
rm9200 did not zero out the top bits
Is this needed ?
The datasheet say not, is bit 16 to 31 of cv high or low.
+typedef struct at91_mc {
+u32 rcr;/* 0x00 MC Remap Control Register */
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 9/9 V3] new board (eb_cpux9k2)
Tom wrote: +Jens Scharsig e...@bus-elektronik.de + +eb_cpux9k2 ARM920T (AT91RM9200 SoC) + The email does not match what was given in the copyrights. Which is the real address ? The cpux9k2 board file i make in my profession. The other changes i make in my spare time. The addresses are correct ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/9 V4] add new CONFIG_AT91_LEGACY
* add's the new temporary CONFIG_AT91_LEGACY to all board configs This will need for backward compatiblity, while change the SoC access to c structures. If CONFIG_AT91_LEGACY is defined, the deprecated SoC is used. Signed-off-by: Jens Scharsig js_at...@scharsoft.de --- doc/README.at91-soc| 41 include/configs/afeb9260.h |2 + include/configs/at91cap9adk.h |2 + include/configs/at91rm9200dk.h |2 + include/configs/at91rm9200ek.h |2 + include/configs/at91sam9260ek.h|2 + include/configs/at91sam9261ek.h|2 + include/configs/at91sam9263ek.h|2 + include/configs/at91sam9m10g45ek.h |2 + include/configs/at91sam9rlek.h |2 + include/configs/cmc_pu2.h |2 + include/configs/cpu9260.h |2 + include/configs/cpuat91.h |2 + include/configs/csb637.h |2 + include/configs/kb9202.h |2 + include/configs/m501sk.h |2 + include/configs/meesc.h|2 + include/configs/mp2usb.h |2 + include/configs/pm9261.h |2 + include/configs/pm9263.h |2 + include/configs/sbc35_a9g20.h |2 + include/configs/tny_a9260.h|2 + 22 files changed, 83 insertions(+), 0 deletions(-) create mode 100644 doc/README.at91-soc diff --git a/doc/README.at91-soc b/doc/README.at91-soc new file mode 100644 index 000..bed035c --- /dev/null +++ b/doc/README.at91-soc @@ -0,0 +1,41 @@ + New C structure AT91 SoC access += + +The goal + + +Currently the at91 arch uses hundreds of address defines and special +at91__write/read functions to access the SOC. +The u-boot project perferred method is to access memory mapped hw +regisister via a c structure. + +e.g. old + + *AT91C_PIOA_IDR = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; + *AT91C_PIOC_PUDR = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; + *AT91C_PIOC_PER = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; + *AT91C_PIOC_OER = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; + *AT91C_PIOC_PIO = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; + + at91_sys_write(AT91_RSTC_CR, + AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); + +e.g new + pin = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; + writel(pin, pio-pioa.idr); + writel(pin, pio-pioa.pudr); + writel(pin, pio-pioa.per); + writel(pin, pio-pioa.oer); + writel(pin, pio-pioa.sodr); + + writel(AT91_RSTC_KEY | AT91_RSTC_CR_PROCRST | + AT91_RSTC_CR_PERRST, rstc-cr); + +The method for updating + + +1. add's the temporary CONFIG_AT91_LEGACY to all at91 board configs +2. Display a compile time warning, if the board has not been converted +3. add new structures for SoC access +4. Convert arch, driver and boards file to new SoC +5. remove legacy code, if all boards and drives are ready diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index 58b8c8c..3b69de8 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -26,6 +26,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define AT91_MAIN_CLOCK18429952/* from 18.432 MHz crystal */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index 322718f..4c2782a 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -27,6 +27,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define AT91_MAIN_CLOCK1200/* 12 MHz crystal */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index 590c69a..bc61677 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -25,6 +25,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */ #define AT91C_MASTER_CLOCK 59904000/* peripheral clock (AT91C_MASTER_CLOCK / 3) */ diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index b4f075e..f5206b1 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -26,6 +26,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ /* * from 18.432 MHz crystal diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 0509011..a620d57 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -27,6 +27,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define AT91_MAIN_CLOCK18432000/*
[U-Boot] [PATCH 2/9 V4] add c structures for SoC access
* add's c structures for SoC access to pheriperials head files
Signed-off-by: Jens Scharsig js_at...@scharsoft.de
---
include/asm-arm/arch-at91/at91_matrix.h | 116 +++
include/asm-arm/arch-at91/at91_pdc.h| 39 +
include/asm-arm/arch-at91/at91_pio.h| 97 ++
include/asm-arm/arch-at91/at91_pit.h| 15
include/asm-arm/arch-at91/at91_pmc.h| 91 +
include/asm-arm/arch-at91/at91_rstc.h | 30 +++-
include/asm-arm/arch-at91/at91_spi.h| 21 +
include/asm-arm/arch-at91/at91_wdt.h| 29 +++
include/asm-arm/arch-at91/at91cap9.h|8 ++
include/asm-arm/arch-at91/at91sam9260.h | 14 +++
include/asm-arm/arch-at91/at91sam9261.h | 12 +++-
include/asm-arm/arch-at91/at91sam9263.h | 20 +
include/asm-arm/arch-at91/at91sam9_sdramc.h | 13 +++
include/asm-arm/arch-at91/at91sam9_smc.h| 63 +++
include/asm-arm/arch-at91/at91sam9g45.h | 13 +++
include/asm-arm/arch-at91/at91sam9rl.h | 12 +++-
include/asm-arm/arch-at91/gpio.h|3 +
include/asm-arm/arch-at91/io.h |3 +
18 files changed, 596 insertions(+), 3 deletions(-)
create mode 100644 include/asm-arm/arch-at91/at91_matrix.h
create mode 100644 include/asm-arm/arch-at91/at91_pdc.h
diff --git a/include/asm-arm/arch-at91/at91_matrix.h
b/include/asm-arm/arch-at91/at91_matrix.h
new file mode 100644
index 000..9b3c110
--- /dev/null
+++ b/include/asm-arm/arch-at91/at91_matrix.h
@@ -0,0 +1,116 @@
+/*
+ * Copyright (C) 2009 Jens Scharsig (js_at...@scharsoft.de)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef AT91_MATRIX_H
+#define AT91_MATRIX_H
+
+#ifdef __ASSEMBLY__
+
+#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
+#define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x11C)
+#elif defined(CONFIG_AT91SAM9261)
+#define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x30)
+#elif defined(CONFIG_AT91SAM9263)
+#define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x120)
+#elif defined(CONFIG_AT91SAM9G45)
+#define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x128)
+#else
+#error AT91_ASM_MATRIX_CSA0 is not definied for current CPU
+#endif
+
+#define AT91_ASM_MATRIX_MCFG AT91_MATRIX_BASE
+
+#else
+#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
+#define AT91_MATRIX_MASTERS6
+#define AT91_MATRIX_SLAVES 5
+#elif defined(CONFIG_AT91SAM9261)
+#define AT91_MATRIX_MASTERS1
+#define AT91_MATRIX_SLAVES 5
+#elif defined(CONFIG_AT91SAM9263)
+#define AT91_MATRIX_MASTERS9
+#define AT91_MATRIX_SLAVES 7
+#elif defined(CONFIG_AT91SAM9G45)
+#define AT91_MATRIX_MASTERS11
+#define AT91_MATRIX_SLAVES 8
+#else
+#error CPU not supported. Please update at91_matrix.h
+#endif
+
+typedef struct at91_priority {
+ u32 a;
+ u32 b;
+} at91_priority_t;
+
+typedef struct at91_matrix {
+ u32 mcfg[AT91_MATRIX_MASTERS];
+#if defined(CONFIG_AT91SAM9261)
+ u32 scfg[AT91_MATRIX_SLAVES];
+ u32 res61_1[3];
+ u32 tcr;
+ u32 res61_2[2];
+ u32 csa;
+ u32 pucr;
+ u32 res61_3[114];
+#else
+ u32 reserve1[16 - AT91_MATRIX_MASTERS];
+ u32 scfg[AT91_MATRIX_SLAVES];
+ u32 reserve2[16 - AT91_MATRIX_SLAVES];
+ at91_priority_t pr[AT91_MATRIX_SLAVES];
+ u32 reserve3[32 - (2 * AT91_MATRIX_SLAVES)];
+ u32 mrcr; /* 0x100 Master Remap Control */
+ u32 reserve4[3];
+#ifdefined(CONFIG_AT91SAM9G45)
+ u32 ccr[52] /* 0x110 - 0x1E0 Chip Configuration */
+ u32 womr; /* 0x1E4 Write Protect Mode */
+ u32 wpsr; /* 0x1E8 Write Protect Status */
+ u32 resg45_1[10];
+#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
+ u32 res60_1[3];
+ u32 csa;
+ u32 res60_2[56];
+#elif defined(CONFIG_AT91SAM9263)
+ u32
[U-Boot] [PATCH 3/9 V4] add a new AT91 GPIO driver
* add a real AT91 GPIO driver instead of header inline code
* resolve the mixing of port and pins
* change board config files to use new driver
* add macros to gpio to realize backward compatibility
Signed-off-by: Jens Scharsig js_at...@scharsoft.de
---
drivers/gpio/Makefile|1 +
drivers/gpio/at91_gpio.c | 214 ++
include/asm-arm/arch-at91/at91_pio.h | 14 ++-
include/asm-arm/arch-at91/gpio.h | 168 +++
include/configs/afeb9260.h |1 +
include/configs/at91cap9adk.h|1 +
include/configs/at91sam9260ek.h |1 +
include/configs/at91sam9261ek.h |1 +
include/configs/at91sam9263ek.h |1 +
include/configs/at91sam9m10g45ek.h |1 +
include/configs/at91sam9rlek.h |1 +
include/configs/cpu9260.h|1 +
include/configs/meesc.h |1 +
include/configs/pm9261.h |1 +
include/configs/pm9263.h |1 +
include/configs/sbc35_a9g20.h|1 +
include/configs/tny_a9260.h |1 +
17 files changed, 258 insertions(+), 152 deletions(-)
create mode 100644 drivers/gpio/at91_gpio.c
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index acba56c..d966082 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk
LIB:= $(obj)libgpio.a
+COBJS-$(CONFIG_AT91_GPIO) += at91_gpio.o
COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o
COBJS-$(CONFIG_MX31_GPIO) += mx31_gpio.o
COBJS-$(CONFIG_PCA953X)+= pca953x.o
diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c
new file mode 100644
index 000..c0a97bc
--- /dev/null
+++ b/drivers/gpio/at91_gpio.c
@@ -0,0 +1,214 @@
+/*
+ * Memory Setup stuff - taken from blob memsetup.S
+ *
+ * Copyright (C) 2009 Jens Scharsig (js_at...@scharsoft.de)
+ *
+ * Copyright (C) 2005 HP Labs
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include config.h
+#include common.h
+#include asm/sizes.h
+#include asm/arch/hardware.h
+#include asm/arch/io.h
+#include asm/arch/at91_pio.h
+
+int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup)
+{
+ at91_pio_t *pio= (at91_pio_t *) AT91_PIO_BASE;
+ u32 mask;
+
+ if ((port AT91_PIO_PORTS) (pin 32)) {
+ mask = 1 pin;
+ if (use_pullup)
+ writel(1 pin, pio-port[port].puer);
+ else
+ writel(1 pin, pio-port[port].pudr);
+ writel(mask, pio-port[port].per);
+ }
+ return 0;
+}
+
+/*
+ * mux the pin to the GPIO peripheral role.
+ */
+int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup)
+{
+ at91_pio_t *pio= (at91_pio_t *) AT91_PIO_BASE;
+ u32 mask;
+
+ if ((port AT91_PIO_PORTS) (pin 32)) {
+ mask = 1 pin;
+ writel(mask, pio-port[port].idr);
+ at91_set_pio_pullup(port, pin, use_pullup);
+ writel(mask, pio-port[port].per);
+ }
+ return 0;
+}
+
+/*
+ * mux the pin to the A internal peripheral role.
+ */
+int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup)
+{
+ at91_pio_t *pio= (at91_pio_t *) AT91_PIO_BASE;
+ u32 mask;
+
+ if ((port AT91_PIO_PORTS) (pin 32)) {
+ mask = 1 pin;
+ writel(mask, pio-port[port].idr);
+ at91_set_pio_pullup(port, pin, use_pullup);
+ writel(mask, pio-port[port].asr);
+ writel(mask, pio-port[port].pdr);
+ }
+ return 0;
+}
+
+/*
+ * mux the pin to the B internal peripheral role.
+ */
+int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup)
+{
+ at91_pio_t *pio= (at91_pio_t *) AT91_PIO_BASE;
+ u32 mask;
+
+ if ((port AT91_PIO_PORTS) (pin 32)) {
+ mask = 1 pin;
+ writel(mask, pio-port[port].idr);
+ at91_set_pio_pullup(port, pin, use_pullup);
+ writel(mask, pio-port[port].bsr);
+ writel(mask, pio-port[port].pdr);
+
[U-Boot] [PATCH 5/9 V4] convert common files to new SoC access
* add's a warning to all files, which need update to new SoC access
* convert common files in cpu/../at91 and a lot of drivers to use
c stucture SoC access
Signed-off-by: Jens Scharsig js_at...@scharsoft.de
---
cpu/arm926ejs/at91/at91cap9_devices.c | 28 ++--
cpu/arm926ejs/at91/at91sam9260_devices.c| 24 +--
cpu/arm926ejs/at91/at91sam9261_devices.c| 24 +--
cpu/arm926ejs/at91/at91sam9263_devices.c| 33 +++---
cpu/arm926ejs/at91/at91sam9m10g45_devices.c | 24 +--
cpu/arm926ejs/at91/at91sam9rl_devices.c | 20 --
cpu/arm926ejs/at91/clock.c | 51 ---
cpu/arm926ejs/at91/cpu.c|4 +
cpu/arm926ejs/at91/led.c|1 +
cpu/arm926ejs/at91/lowlevel_init.S | 95 +--
cpu/arm926ejs/at91/reset.c |8 ++-
cpu/arm926ejs/at91/timer.c | 17 +++--
drivers/i2c/soft_i2c.c | 11 ++--
drivers/serial/at91rm9200_usart.c |8 ++
drivers/serial/atmel_usart.c|4 +
drivers/spi/atmel_dataflash_spi.c |4 +
drivers/usb/host/ohci-at91.c|5 ++
drivers/video/bus_vcxk.c| 22 ++-
include/i2c.h |5 ++
19 files changed, 261 insertions(+), 127 deletions(-)
diff --git a/cpu/arm926ejs/at91/at91cap9_devices.c
b/cpu/arm926ejs/at91/at91cap9_devices.c
index 518a8d7..2d878fd 100644
--- a/cpu/arm926ejs/at91/at91cap9_devices.c
+++ b/cpu/arm926ejs/at91/at91cap9_devices.c
@@ -34,30 +34,38 @@
void at91_serial0_hw_init(void)
{
+ at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+
at91_set_a_periph(AT91_PIO_PORTA, 22, 1); /* TXD0 */
at91_set_a_periph(AT91_PIO_PORTA, 23, 0); /* RXD0 */
- at91_sys_write(AT91_PMC_PCER, 1 AT91CAP9_ID_US0);
+ writel(1 AT91CAP9_ID_US0, pmc-pcer);
}
void at91_serial1_hw_init(void)
{
+ at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+
at91_set_a_periph(AT91_PIO_PORTD, 0, 1);/* TXD1 */
at91_set_a_periph(AT91_PIO_PORTD, 1, 0);/* RXD1 */
- at91_sys_write(AT91_PMC_PCER, 1 AT91CAP9_ID_US1);
+ writel(1 AT91CAP9_ID_US1, pmc-pcer);
}
void at91_serial2_hw_init(void)
{
+ at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+
at91_set_a_periph(AT91_PIO_PORTD, 2, 1);/* TXD2 */
at91_set_a_periph(AT91_PIO_PORTD, 3, 0);/* RXD2 */
- at91_sys_write(AT91_PMC_PCER, 1 AT91CAP9_ID_US2);
+ writel(1 AT91CAP9_ID_US2, pmc-pcer);
}
void at91_serial3_hw_init(void)
{
+ at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+
at91_set_a_periph(AT91_PIO_PORTC, 30, 0); /* DRXD */
at91_set_a_periph(AT91_PIO_PORTC, 31, 1); /* DTXD */
- at91_sys_write(AT91_PMC_PCER, 1 AT91_ID_SYS);
+ writel(1 AT91_ID_SYS, pmc-pcer);
}
void at91_serial_hw_init(void)
@@ -82,12 +90,14 @@ void at91_serial_hw_init(void)
#ifdef CONFIG_HAS_DATAFLASH
void at91_spi0_hw_init(unsigned long cs_mask)
{
+ at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+
at91_set_b_periph(AT91_PIO_PORTA, 0, 0);/* SPI0_MISO */
at91_set_b_periph(AT91_PIO_PORTA, 1, 0);/* SPI0_MOSI */
at91_set_b_periph(AT91_PIO_PORTA, 2, 0);/* SPI0_SPCK */
/* Enable clock */
- at91_sys_write(AT91_PMC_PCER, 1 AT91CAP9_ID_SPI0);
+ writel(1 AT91CAP9_ID_SPI0, pmc-pcer);
if (cs_mask (1 0)) {
at91_set_b_periph(AT91_PIO_PORTA, 5, 1);
@@ -117,12 +127,14 @@ void at91_spi0_hw_init(unsigned long cs_mask)
void at91_spi1_hw_init(unsigned long cs_mask)
{
+ at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+
at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* SPI1_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 13, 0); /* SPI1_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 14, 0); /* SPI1_SPCK */
/* Enable clock */
- at91_sys_write(AT91_PMC_PCER, 1 AT91CAP9_ID_SPI1);
+ writel(1 AT91CAP9_ID_SPI1, pmc-pcer);
if (cs_mask (1 0)) {
at91_set_a_periph(AT91_PIO_PORTB, 15, 1);
@@ -182,10 +194,12 @@ void at91_macb_hw_init(void)
#ifdef CONFIG_AT91_CAN
void at91_can_hw_init(void)
{
+ at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+
at91_set_a_periph(AT91_PIO_PORTA, 12, 0); /* CAN_TX */
at91_set_a_periph(AT91_PIO_PORTA, 13, 1); /* CAN_RX */
/* Enable clock */
- at91_sys_write(AT91_PMC_PCER, 1 AT91CAP9_ID_CAN);
+ writel(1 AT91CAP9_ID_CAN, pmc-pcer);
}
#endif
diff --git a/cpu/arm926ejs/at91/at91sam9260_devices.c
b/cpu/arm926ejs/at91/at91sam9260_devices.c
index 68c1974..77d49ab 100644
--- a/cpu/arm926ejs/at91/at91sam9260_devices.c
[U-Boot] [PATCH 6/9 V4] update at91sam9263ek board to new SoC access
* convert at91sam9263ek board to use c stucture SoC access
* change gpio access to at91_gpio syntax
Signed-off-by: Jens Scharsig js_at...@scharsoft.de
---
board/atmel/at91sam9263ek/at91sam9263ek.c | 151 +++--
board/atmel/at91sam9263ek/led.c | 21 +++--
include/configs/at91sam9263ek.h | 88 +-
3 files changed, 132 insertions(+), 128 deletions(-)
diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c
b/board/atmel/at91sam9263ek/at91sam9263ek.c
index 0b7065b..8ab45af 100644
--- a/board/atmel/at91sam9263ek/at91sam9263ek.c
+++ b/board/atmel/at91sam9263ek/at91sam9263ek.c
@@ -25,13 +25,13 @@
#include common.h
#include asm/sizes.h
#include asm/arch/at91sam9263.h
-#include asm/arch/at91sam9263_matrix.h
#include asm/arch/at91sam9_smc.h
#include asm/arch/at91_common.h
#include asm/arch/at91_pmc.h
#include asm/arch/at91_rstc.h
+#include asm/arch/at91_matrix.h
+#include asm/arch/at91_pio.h
#include asm/arch/clk.h
-#include asm/arch/gpio.h
#include asm/arch/io.h
#include asm/arch/hardware.h
#include lcd.h
@@ -52,49 +52,57 @@ DECLARE_GLOBAL_DATA_PTR;
static void at91sam9263ek_nand_hw_init(void)
{
unsigned long csa;
+ at91_smc_t *smc= (at91_smc_t *) AT91_SMC0_BASE;
+ at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
+ at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+
+ /* Enable CS3 */
+ csa = readl(matrix-csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
+ writel(csa, matrix-csa[0]);
/* Enable CS3 */
- csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
- at91_sys_write(AT91_MATRIX_EBI0CSA,
- csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
/* Configure SMC CS3 for NAND/SmartMedia */
- at91_sys_write(AT91_SMC_SETUP(3),
- AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
- AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
- at91_sys_write(AT91_SMC_PULSE(3),
- AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
- AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
- at91_sys_write(AT91_SMC_CYCLE(3),
- AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
- at91_sys_write(AT91_SMC_MODE(3),
- AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
- AT91_SMC_EXNWMODE_DISABLE |
+ writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+ AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+ smc-cs[3].setup);
+
+ writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
+ AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
+ smc-cs[3].pulse);
+
+ writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+ smc-cs[3].cycle);
+ writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+ AT91_SMC_MODE_EXNW_DISABLE |
#ifdef CONFIG_SYS_NAND_DBW_16
- AT91_SMC_DBW_16 |
+ AT91_SMC_MODE_DBW_16 |
#else /* CONFIG_SYS_NAND_DBW_8 */
- AT91_SMC_DBW_8 |
+ AT91_SMC_MODE_DBW_8 |
#endif
- AT91_SMC_TDF_(2));
+ AT91_SMC_MODE_TDF_CYCLE(2),
+ smc-cs[3].mode);
- at91_sys_write(AT91_PMC_PCER, 1 AT91SAM9263_ID_PIOA |
- 1 AT91SAM9263_ID_PIOCDE);
+ writel(1 AT91SAM9263_ID_PIOA | 1 AT91SAM9263_ID_PIOCDE,
+ pmc-pcer);
/* Configure RDY/BSY */
- at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+ at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
/* Enable NandFlash */
- at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+ at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
}
#endif
#ifdef CONFIG_MACB
static void at91sam9263ek_macb_hw_init(void)
{
- unsigned long rstc;
-
+ unsigned long erstl;
+ at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pio_t *pio= (at91_pio_t *) AT91_PIO_BASE;
+ at91_rstc_t *rstc = (at91_rstc_t *) AT91_RSTC_BASE;
/* Enable clock */
- at91_sys_write(AT91_PMC_PCER, 1 AT91SAM9263_ID_EMAC);
+ writel(1 AT91SAM9263_ID_EMAC, pmc-pcer);
/*
* Disable pull-up on:
@@ -104,35 +112,27 @@ static void at91sam9263ek_macb_hw_init(void)
*
* PHY has internal pull-down
*/
- writel(pin_to_mask(AT91_PIN_PC25),
- pin_to_controller(AT91_PIN_PC0) + PIO_PUDR);
- writel(pin_to_mask(AT91_PIN_PE25) |
- pin_to_mask(AT91_PIN_PE26),
- pin_to_controller(AT91_PIN_PE0) + PIO_PUDR);
- rstc = at91_sys_read(AT91_RSTC_MR) AT91_RSTC_ERSTL;
+ writel(1 25, pio-pioc.pudr);
+ writel((1 25) | (1 26), pio-pioe.pudr);
- /* Need to reset PHY - 500ms reset */
-
[U-Boot] [PATCH 7/9 V4] prepare joining at91rm9200 into at91
* prepare joining at91 and at91rm9200 * add modified copy of soc files to cpu/arm920t/at91 to make possible to compile at91rm9200 boards in at91 tree instead of at91rm9200 * add header files with c structure defs for AT91 MC, ST and TC * the new cpu files are using at91 c structure soc access * please read README.soc-at91 for details Signed-off-by: Jens Scharsig js_at...@scharsoft.de --- cpu/arm920t/at91/Makefile | 47 + cpu/arm920t/at91/lowlevel_init.S | 164 cpu/arm920t/at91/reset.c | 59 cpu/arm920t/at91/timer.c | 163 +++ cpu/arm920t/cpu.c |4 + doc/README.at91-soc| 23 + include/asm-arm/arch-at91/at91_mc.h| 97 +++ include/asm-arm/arch-at91/at91_pio.h | 14 ++- include/asm-arm/arch-at91/at91_st.h| 46 + include/asm-arm/arch-at91/at91_tc.h| 77 +++ include/asm-arm/arch-at91/at91rm9200.h | 135 ++ include/asm-arm/arch-at91/hardware.h |2 +- 12 files changed, 825 insertions(+), 6 deletions(-) create mode 100644 cpu/arm920t/at91/Makefile create mode 100644 cpu/arm920t/at91/lowlevel_init.S create mode 100644 cpu/arm920t/at91/reset.c create mode 100644 cpu/arm920t/at91/timer.c create mode 100644 include/asm-arm/arch-at91/at91_mc.h create mode 100644 include/asm-arm/arch-at91/at91_st.h create mode 100644 include/asm-arm/arch-at91/at91_tc.h create mode 100644 include/asm-arm/arch-at91/at91rm9200.h diff --git a/cpu/arm920t/at91/Makefile b/cpu/arm920t/at91/Makefile new file mode 100644 index 000..d8a4383 --- /dev/null +++ b/cpu/arm920t/at91/Makefile @@ -0,0 +1,47 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(SOC).a + +SOBJS += lowlevel_init.o +COBJS += reset.o +COBJS += timer.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB):$(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/cpu/arm920t/at91/lowlevel_init.S b/cpu/arm920t/at91/lowlevel_init.S new file mode 100644 index 000..22fc86c --- /dev/null +++ b/cpu/arm920t/at91/lowlevel_init.S @@ -0,0 +1,164 @@ +/* + * Copyright (C) 1999 2000 2001 Erik Mouw (j.a.k.m...@its.tudelft.nl) and + *Jan-Derk Bakker (j.d.bak...@its.tudelft.nl) + * + * Modified for the at91rm9200dk board by + * (C) Copyright 2004 + * Gary Jennejohn, DENX Software Engineering, ga...@denx.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include config.h + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT + +#include asm/arch/hardware.h +#include asm/arch/at91_mc.h +#include asm/arch/at91_pmc.h +#include asm/arch/at91_pio.h + +#define ARM920T_CONTROL0xC000 /* @ set bit 31 (iA) and 30 (nF) */ + +_MTEXT_BASE: +#undef START_FROM_MEM +#ifdef START_FROM_MEM + .word TEXT_BASE-PHYS_FLASH_1 +#else + .word TEXT_BASE +#endif + +.globl lowlevel_init +lowlevel_init: + ldr r1,
Re: [U-Boot] [PATCH] ns16550: kick watchdog while waiting for a character
Dear Ladislav Michl, In message 20100201223425.ga4...@localhost.localdomain you wrote: From: Ladislav Michl la...@linux-mips.org ns16550 busyloops waiting for incoming byte causing watchdog to reboot while waiting for a key press. A call to WATCHDOG_RESET in NS16550_getc loop fixes it. Signed-off-by: Ladislav Michl la...@linux-mips.org --- Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Don't you know anything? I should have thought anyone knows that who knows anything about anything... - Terry Pratchett, _Soul Music_ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2 v3] arm: suen3, suen3_v1, mgcoge2_arm_p1a support
On Wed, Feb 03, 2010 at 04:52:05PM +0100, Heiko Schocher wrote:
+ if ((strcmp(argv[1], off) == 0)) {
+ printf(SPI FLASH disabled, NAND enabled\n);
+ /* Multi-Purpose Pins Functionality configuration */
+ kwmpp_config[0] = MPP0_NF_IO2;
+ kwmpp_config[1] = MPP1_NF_IO3;
+ kwmpp_config[2] = MPP2_NF_IO4;
+ kwmpp_config[3] = MPP3_NF_IO5;
+
+ kirkwood_mpp_conf(kwmpp_config);
+ tmp = readl(KW_GPIO0_BASE);
+ writel(tmp | FLASH_GPIO_PIN , KW_GPIO0_BASE);
+
+ nand_init();
+ } else if ((strcmp(argv[1], on) == 0)) {
+ printf(SPI FLASH enabled, NAND disabled\n);
+ /* Multi-Purpose Pins Functionality configuration */
+ kwmpp_config[0] = MPP0_SPI_SCn;
+ kwmpp_config[1] = MPP1_SPI_MOSI;
+ kwmpp_config[2] = MPP2_SPI_SCK;
+ kwmpp_config[3] = MPP3_SPI_MISO;
+
+ kirkwood_mpp_conf(kwmpp_config);
+ tmp = readl(KW_GPIO0_BASE);
+ writel(tmp (~FLASH_GPIO_PIN) , KW_GPIO0_BASE);
+
+ nand_init();
What do you need nand_init for disabled nand operation?
With it, the nand subsystem knows, that there is no longer
the nand availiable.
That's not how nand_init() is meant to be used. It is meant to be called
once on system init. There is probably at least a memory leak here, e.g.
chip-buffers.
Even as a hack, it looks like these boards use the kirkwood nand controller,
and its board_nand_init() will unconditionally return 0, telling
nand_init_chip that it does indeed have NAND available. Or is there a patch
somewhere changing that?
-Scott
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] S5PC100: Moves the Macros to a common header file
From: Naveen Krishna CH ch.naveen.samsung.com The get_pll_clk(int) API returns the PLL frequency based on the (int) argument which is defined locally in clock.c Moving that #define to common header file (clk.h) would be helpful when using the API from other files. Signed-off-by: Naveen Krishna Ch ch.nav...@samsung.com --- cpu/arm_cortexa8/s5pc1xx/clock.c |7 +-- include/asm-arm/arch-s5pc1xx/clk.h |6 ++ 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/cpu/arm_cortexa8/s5pc1xx/clock.c b/cpu/arm_cortexa8/s5pc1xx/clock.c index a9e78dd..19619f9 100644 --- a/cpu/arm_cortexa8/s5pc1xx/clock.c +++ b/cpu/arm_cortexa8/s5pc1xx/clock.c @@ -25,12 +25,7 @@ #include common.h #include asm/io.h #include asm/arch/clock.h - -#define APLL 0 -#define MPLL 1 -#define EPLL 2 -#define HPLL 3 -#define VPLL 4 +#include asm/arch/clk.h #define CLK_M 0 #define CLK_D 1 diff --git a/include/asm-arm/arch-s5pc1xx/clk.h b/include/asm-arm/arch-s5pc1xx/clk.h index f1aa44f..3e59abe 100644 --- a/include/asm-arm/arch-s5pc1xx/clk.h +++ b/include/asm-arm/arch-s5pc1xx/clk.h @@ -23,6 +23,12 @@ #ifndef __ASM_ARM_ARCH_CLK_H_ #define __ASM_ARM_ARCH_CLK_H_ +#define APLL 0 +#define MPLL 1 +#define EPLL 2 +#define HPLL 3 +#define VPLL 4 + void s5pc1xx_clock_init(void); extern unsigned long (*get_pll_clk)(int pllreg); -- 1.6.6 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/2] S5PC100: Print PLL info along with CPU info
From: Naveen Krishna CH ch.nav...@samsung.com This patch set moves the Macros defined in clock.c to a common header file and prints the frequencies of PLLs along with CPU info. This patch set consists of the following patches. [PATCH 1/2] S5PC100: Moves the Macros to a common header file [PATCH 2/2] S5PC100: Prints the PLL clock frequencies Thanks Best regards. Naveen --- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] S5PC100: Prints the PLL clock frequencies
From: Naveen Krishna CH ch.nav...@samsung.com Prints the frequencies of the 4 PLLs along with CPU Info Signed-off-by: Naveen Krishna Ch ch.nav...@samsung.com --- cpu/arm_cortexa8/s5pc1xx/cpu_info.c |8 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/cpu/arm_cortexa8/s5pc1xx/cpu_info.c b/cpu/arm_cortexa8/s5pc1xx/cpu_info.c index f16c0ff..ab99284 100644 --- a/cpu/arm_cortexa8/s5pc1xx/cpu_info.c +++ b/cpu/arm_cortexa8/s5pc1xx/cpu_info.c @@ -26,6 +26,10 @@ /* Default is s5pc100 */ unsigned int s5pc1xx_cpu_id = 0xC100; +#define APLL0 +#define MPLL1 +#define EPLL2 +#define HPLL3 #ifdef CONFIG_ARCH_CPU_INIT int arch_cpu_init(void) @@ -51,6 +55,10 @@ int print_cpuinfo(void) printf(CPU:\ts5...@%smhz\n, s5pc1xx_cpu_id, strmhz(buf, get_arm_clk())); + printf(APLL:\t%sMHz \t, strmhz(buf, get_pll_clk(APLL))); + printf(MPLL:\t%sMHz \n, strmhz(buf, get_pll_clk(MPLL))); + printf(EPLL:\t%sMHz \t, strmhz(buf, get_pll_clk(EPLL))); + printf(HPLL:\t%sMHz \n, strmhz(buf, get_pll_clk(HPLL))); return 0; } -- 1.6.6 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2 v3] arm: suen3, suen3_v1, mgcoge2_arm_p1a support
Hello Scott,
Scott Wood wrote:
On Wed, Feb 03, 2010 at 04:52:05PM +0100, Heiko Schocher wrote:
+ if ((strcmp(argv[1], off) == 0)) {
+ printf(SPI FLASH disabled, NAND enabled\n);
+ /* Multi-Purpose Pins Functionality configuration */
+ kwmpp_config[0] = MPP0_NF_IO2;
+ kwmpp_config[1] = MPP1_NF_IO3;
+ kwmpp_config[2] = MPP2_NF_IO4;
+ kwmpp_config[3] = MPP3_NF_IO5;
+
+ kirkwood_mpp_conf(kwmpp_config);
+ tmp = readl(KW_GPIO0_BASE);
+ writel(tmp | FLASH_GPIO_PIN , KW_GPIO0_BASE);
+
+ nand_init();
+ } else if ((strcmp(argv[1], on) == 0)) {
+ printf(SPI FLASH enabled, NAND disabled\n);
+ /* Multi-Purpose Pins Functionality configuration */
+ kwmpp_config[0] = MPP0_SPI_SCn;
+ kwmpp_config[1] = MPP1_SPI_MOSI;
+ kwmpp_config[2] = MPP2_SPI_SCK;
+ kwmpp_config[3] = MPP3_SPI_MISO;
+
+ kirkwood_mpp_conf(kwmpp_config);
+ tmp = readl(KW_GPIO0_BASE);
+ writel(tmp (~FLASH_GPIO_PIN) , KW_GPIO0_BASE);
+
+ nand_init();
What do you need nand_init for disabled nand operation?
With it, the nand subsystem knows, that there is no longer
the nand availiable.
That's not how nand_init() is meant to be used. It is meant to be called
once on system init. There is probably at least a memory leak here, e.g.
chip-buffers.
Oh, Ok. How could/should this then be solved?
(Some weak function, maybe: int nand_available(void)?, that board specific
code can overwrite, and this function is checked before a nand command
is executed?)
In the First step, I don;t call nand_init() again, there is also a
warning message, that NAND is disabled, so the user should know, that
he don;t have longer access to it, is this Okay for you?
Even as a hack, it looks like these boards use the kirkwood nand controller,
and its board_nand_init() will unconditionally return 0, telling
Yep, but ...
nand_init_chip that it does indeed have NAND available. Or is there a patch
somewhere changing that?
... nand_get_flash_type() returns -ENODEV, if no manufacturer or/and
id could be read from nand (And if using this u-boot command, the nand
is not longer visible, because the nand is disabled, and the pins are
used to access a SPI Flash) - nand_scan_ident returns this error, and
so nand_scan ...
Actually, I get this message, when running this code:
No NAND device found!!!
Thanks for your comment.
bye
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] S5PC100: Prints the PLL clock frequencies
Dear Naveen Krishna Ch, On 4 February 2010 14:24, Naveen Krishna Ch ch.nav...@samsung.com wrote: From: Naveen Krishna CH ch.nav...@samsung.com Prints the frequencies of the 4 PLLs along with CPU Info Signed-off-by: Naveen Krishna Ch ch.nav...@samsung.com --- cpu/arm_cortexa8/s5pc1xx/cpu_info.c | 8 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/cpu/arm_cortexa8/s5pc1xx/cpu_info.c b/cpu/arm_cortexa8/s5pc1xx/cpu_info.c index f16c0ff..ab99284 100644 --- a/cpu/arm_cortexa8/s5pc1xx/cpu_info.c +++ b/cpu/arm_cortexa8/s5pc1xx/cpu_info.c @@ -26,6 +26,10 @@ /* Default is s5pc100 */ unsigned int s5pc1xx_cpu_id = 0xC100; +#define APLL 0 +#define MPLL 1 +#define EPLL 2 +#define HPLL 3 why you redefine? you already moved it to clk.h #ifdef CONFIG_ARCH_CPU_INIT int arch_cpu_init(void) @@ -51,6 +55,10 @@ int print_cpuinfo(void) printf(CPU:\ts5...@%smhz\n, s5pc1xx_cpu_id, strmhz(buf, get_arm_clk())); + printf(APLL:\t%sMHz \t, strmhz(buf, get_pll_clk(APLL))); + printf(MPLL:\t%sMHz \n, strmhz(buf, get_pll_clk(MPLL))); + printf(EPLL:\t%sMHz \t, strmhz(buf, get_pll_clk(EPLL))); + printf(HPLL:\t%sMHz \n, strmhz(buf, get_pll_clk(HPLL))); NAK. This information is not useful information to users. return 0; } -- 1.6.6 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot Thanks, Minkyu Kang. -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
