This patch brings the VCMA9 port in sync with the latest U-Boot
version by doing the following:
- do the necessary adjustments to support the ARM relocation feature
- use the CFI flash driver (and removing the old one)
- remove the unneeded config.mk file
- various cleanups and coding style fi
Dear Alex Dubov,
In message <546160.74882...@web37605.mail.mud.yahoo.com> you wrote:
>
> 1. I want to fit an environment and the bootloader into a single flash
> sector.
This is a very bad idea as it will open a window brick your system at
each and every "saveenv" command.
I strongly recommend
This patch brings the SMDK2410 port in sync with the latest U-Boot
version by doing the following:
- do the necessary adjustments to support the ARM relocation feature
- use the CFI flash driver (and removing the old one)
- remove the unneeded config.mk file
Signed-off-by: David Müller
diff
> >
> > atum8548
> > mpc8540
> > pm854/6
> > sbc8560
> > sbc8641d
> > socrates
> > mpc8536ds
> > mpc8540ads
> > mpc8560ads
> > mpc8572ds
> > mpc8610hpdc
> > mpc8641hpcn
> > p2020ds
> > tqm85xx
>
> Could you please be a bit more specific, i. e. like quoting
> file names
> and line numbers?
>
The
CONFIG_SPLASH_SCREEN_ALIGN makes uboot support display
offset for splashimage. The framebuffer writing address
should be calculated according to different kinds of
framebuffer pixel format, i.e., bits per pixel value.
Signed-off-by: Liu Ying
---
common/lcd.c |2 +-
1 files changed, 1 inserti
CONFIG_SPLASH_SCREEN_ALIGN makes uboot support display
offset for splashimage. The framebuffer writing address
should be calculated according to different kinds of
framebuffer pixel format, i.e., bits per pixel value.
Signed-off-by: Liu Ying
---
common/lcd.c |2 +-
1 files changed, 1 inserti
DKB is a Development Board for PANTHEON TD/TTC(pxa920/pxa910) with
* Processor upto 806Mhz
* LPDDR1/2
* x8/x16 SLC/MLC NAND
* Footprints for eMMC & MMC x8 card
With Peripherals:
* Parallel LCD I/F
* Audio codecs (88PM8607)
* MIPI CSI-2 camera
* Marvell 88W8787 802.11n/BT module
* Marvell 2G/3G RF
This patch adds the support MFP support for Marvell PANTHEON SoCs
Signed-off-by: Lei Wen
---
arch/arm/include/asm/arch-pantheon/mfp.h | 42 ++
drivers/gpio/mvmfp.c |2 +
2 files changed, 44 insertions(+), 0 deletions(-)
create mode 100644 ar
Signed-off-by: Lei Wen
---
drivers/serial/serial.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index cd3439e..4032dfd 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -33,6 +33,8 @@
#include
#e
Pantheon Family processors are highly integrated SoCs
based on Sheeva_88SV331x-v5 PJ1 cpu core.
Ref:
http://www.marvell.com/products/processors/communications/marvell_pantheon_910_920_pb.pdf
SoC versions Supported:
1) PANTHEON920 (TD)
2) PANTHEON910 (TTC)
Signed-off-by: Lei Wen
Since there are lots of difference between kirkwood and armada series,
it is better to seperate them but still keep the most common file
shared by all marvell platform in the mv-common configure file.
This patch move the kirkwood only driver definitoin in mv-common to
the /config.h.
This patch is
This patch set add the Pantheon soc and dkb board support.
V2:
This patch seris update the seperate mv_common part as suggested.
V3:
Fix config.h include place and copyright claim year.
Lei Wen (5):
mv: seperate kirkwood and armada from common setting
ARM: Add Support for Marvell Pantheon Fa
Dear Kumar Gala,
In message <1294607813-27723-1-git-send-email-ga...@kernel.crashing.org> you
wrote:
> Moved the SRIO init out of corenet_ds and into common code for
> 8xxx/QorIQ processors that have SRIO. We mimic what we do with PCIe
> controllers for SRIO.
>
> We utilize the fact that SRIO i
On Jan 6, 2011, at 11:05 AM, Kumar Gala wrote:
> From: Li Yang
>
> The P2020 has 2 SRIO ports and they are useable on the P2020 DS board.
> Enable them using the common SRIO init code.
>
> Signed-off-by: Li Yang
> Signed-off-by: Kumar Gala
> ---
> include/configs/P2020DS.h | 24 +++
On Jan 6, 2011, at 10:58 AM, Kumar Gala wrote:
> Signed-off-by: Kumar Gala
> CC: Paul Gortmaker
> ---
> board/sbc8641d/law.c |1 -
> include/configs/sbc8641d.h | 15 +--
> 2 files changed, 9 insertions(+), 7 deletions(-)
applied to 85xx
- k
__
On Jan 6, 2011, at 10:58 AM, Kumar Gala wrote:
> Signed-off-by: Kumar Gala
> ---
> board/freescale/mpc8641hpcn/law.c |5 +
> include/configs/MPC8641HPCN.h | 30 +-
> 2 files changed, 14 insertions(+), 21 deletions(-)
applied to 85xx
- k
_
On Jan 9, 2011, at 3:16 PM, Kumar Gala wrote:
> Add the needed defines and code to utilize the common 8xxx srio init
> code to setup LAWs and modify device tree if we have SRIO enabled on a
> board.
>
> Signed-off-by: Kumar Gala
> ---
> * Removed ifdef protection around extern per Sergei
> * Ad
On Jan 6, 2011, at 10:58 AM, Kumar Gala wrote:
> Signed-off-by: Kumar Gala
> ---
> board/freescale/mpc8568mds/law.c |3 +--
> include/configs/MPC8568MDS.h | 12
> 2 files changed, 9 insertions(+), 6 deletions(-)
applied to 85xx
- k
_
On Jan 6, 2011, at 10:58 AM, Kumar Gala wrote:
> Signed-off-by: Kumar Gala
> ---
> board/freescale/mpc8569mds/law.c |3 +--
> include/configs/MPC8569MDS.h | 12
> 2 files changed, 9 insertions(+), 6 deletions(-)
applied to 85xx
- k
_
On Jan 6, 2011, at 10:58 AM, Kumar Gala wrote:
> Signed-off-by: Kumar Gala
> ---
> board/freescale/mpc8548cds/law.c |5 +
> board/freescale/mpc8548cds/tlb.c |9 -
> include/configs/MPC8548CDS.h | 15 ---
> 3 files changed, 13 insertions(+), 16 deletions(-)
app
On Jan 9, 2011, at 3:16 PM, Kumar Gala wrote:
> Moved the SRIO init out of corenet_ds and into common code for
> 8xxx/QorIQ processors that have SRIO. We mimic what we do with PCIe
> controllers for SRIO.
>
> We utilize the fact that SRIO is over serdes to determine if its
> configured or not a
CONFIG_SYS_BOOTMAPSZ has been 16M on these boards for some time so we
should also allow the kernel image to be up to 16M decompressed.
Signed-off-by: Kumar Gala
---
include/configs/MPC8536DS.h |3 ++-
include/configs/MPC8540ADS.h |3 ++-
include/configs/MPC8541CDS.h |3 ++-
include/
Dear Alex Dubov,
In message <328503.45731...@web37602.mail.mud.yahoo.com> you wrote:
>
> > Can you please point out where this was missed, so it can
> > be fixed?
> >
>
> Some of the boards in question:
>
> atum8548
> mpc8540
> pm854/6
> sbc8560
> sbc8641d
> socrates
> mpc8536ds
> mpc8540ads
>
Am 10.01.2011 16:05, schrieb Wolfgang Denk:
> Dear Alexander Holler,
>
> In message<4d2b1d75.70...@ahsoftware.de> you wrote:
>>
>> Beeing kind of a defensive programmer, I still would prefer to use have
>> that __asm__ for write* too. That would at least prevent us from a
>> possible bug there too
> > In which case, why are not these used when writing
> config values to DDR
> > registers (for instance) even in some very recently
> added boards, such as
> > p2020ds?
>
> Because this escaped review?
>
> Can you please point out where this was missed, so it can
> be fixed?
>
Some of the bo
>
> And you still have a board/mercury/mpq101/config.mk even
> though I
> asked you to get rid of it.
>
1. I want to fit an environment and the bootloader into a single flash
sector.
2. Environment must be on the sector boundary, otherwise saveenv won't
rewrite it.
3. If I don't fix up the ppce
Hi Group -
I am working with the imx.51 on the Freescale EVK. Up to this point, have
been working with the version of U-Boot (and Kernel) from the Freescale web
site; the SDK which is LTIB based. Pretty stale stuff; U-Boot is rather old
(8/2009), as with Kernel (2.6.31).
I pulled U-Boot before
Am 09.01.2011 22:03, schrieb Wolfgang Denk:
> Dear Alexander Holler,
>
> In message<1292863117-3175-1-git-send-email-hol...@ahsoftware.de> you wrote:
>> It might be useful to see what compiler version was used to compile u-boot.
>> ---
>> arch/arm/lib/board.c |2 +-
>> 1 files changed, 1 in
Crc7 is used to compute mmc spi command packet checksum.
Copy from linux-2.6 lib/crc7.c include/linux/crc7.h
commit ad241528c4919505afccb022acbab3eeb0db4d80
Signed-off-by: Thomas Chou
---
v2 update attribution as Wolfgang suggested.
include/linux/crc7.h | 14 +++
lib/Makefile
I am trying to switch from writing my JFFS2 filesystem to flash using an NFS
mounted root filesystem to creating and installing a JFFS2 image. The reason I
am doing this is so I can use sumtool on the JFFS2 image and speed up my boot
time. When I use the JFFS2 image, I see the following while
Simple command to decode/check an LDR image before we try to boot it.
Signed-off-by: Mike Frysinger
---
v2
- add README note
README |1 +
common/Makefile |1 +
common/cmd_ldrinfo.c | 192 ++
3 files changed, 194
On Monday, January 10, 2011 17:28:23 Wolfgang Denk wrote:
> Mike Frysinger wrote:
> > it isnt a problem to have the parens, and it keeps things sane if someone
> > does something like:
> > #define CONFIG_SYS_BD_INFO_ADDR SOME_DEFINE + 0x1000
>
> This would be a violation of basic rules of defens
On Monday, January 10, 2011 17:33:42 Wolfgang Denk wrote:
> Mike Frysinger you wrote:
> > board/bf506f-ezkit/Makefile | 54 +++
> > board/bf506f-ezkit/bf506f-ezkit.c | 27 +
> > boards.cfg|1 +
> > include/configs/bf506f-ezkit.h| 1
On Thu, Jan 06, 2011 at 11:11:58AM +0800, Lei Wen wrote:
> This patch add addition suffix to nand write to give the uboot
> the power to directly burn the yaffs image to nand.
>
> Signed-off-by: Lei Wen
> ---
> V2: fix compile warning, and add CONFIG_CMD_NAND_YAFFS to reduce code
> when n
Dear Alex Dubov,
In message <294951.51594...@web37601.mail.mud.yahoo.com> you wrote:
> Mpq101 is a RapidIO development board in AMC form factor, featuring MPC8548
> processor, 512MB of hardwired DDR2 RAM, 128MB of hardwired NAND flash
> memory, real time clock and additional serial EEPROM on i2c b
Dear Alex Dubov,
In message <24.88500...@web37608.mail.mud.yahoo.com> you wrote:
> > > +CONFIG_SYS_TEXT_BASE = 0xfffc0800
> > > +LDFLAGS +=
> > --section-start=.ppcenv=$(CONFIG_ENV_ADDR)
> >
> > Please mode defines to board config file and get rid of
> > config.mk
>
> And another question: h
Dear Alex Dubov,
In message <754013.38475...@web37602.mail.mud.yahoo.com> you wrote:
> > You should use get_ram_size().
>
> I still need to call setup_ddr_tlbs because get_ram_size won't do it for
> me. So what get_ram_size actually does?
It checks the size of available memory and performs a sim
Dear Mike Frysinger,
In message <1293425300-27644-28-git-send-email-vap...@gentoo.org> you wrote:
> Simple command to decode/check an LDR image before we try to boot it.
>
> Signed-off-by: Mike Frysinger
> ---
> common/Makefile |1 +
> common/cmd_ldrinfo.c | 192
> +++
Dear Mike Frysinger,
In message <1293425300-27644-24-git-send-email-vap...@gentoo.org> you wrote:
> Signed-off-by: Mike Frysinger
> ---
> board/bf506f-ezkit/Makefile | 54 +++
> board/bf506f-ezkit/bf506f-ezkit.c | 27 +
> boards.cfg|1
Dear Mike Frysinger,
In message <201012271142.17334.vap...@gentoo.org> you wrote:
>
> it isnt a problem to have the parens, and it keeps things sane if someone
> does
> something like:
> #define CONFIG_SYS_BD_INFO_ADDR SOME_DEFINE + 0x1000
This would be a violation of basic rules of defensive
Dear Mike Frysinger,
In message <1293425300-27644-2-git-send-email-vap...@gentoo.org> you wrote:
> Signed-off-by: Mike Frysinger
> ---
> MAINTAINERS | 49 ++---
> 1 files changed, 22 insertions(+), 27 deletions(-)
Already applied.
Best regards,
Wo
This patch exposes more registers which can be used by the DDR drivers or
interactive debugging. U-boot doesn't use all the registers in DDRC.
When advanced tuning is required, writing to those registers is needed.
Add writing to cdr1, cdr2, err_disable, err_int_en and debug registers
Add options
Print a message when a RDIMM is detected.
Signed-off-by: York Sun
---
.../cpu/mpc8xxx/ddr/lc_common_dimm_params.c| 18 +++---
1 files changed, 7 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
b/arch/powerpc/cpu/mpc8xxx/ddr
Extend board specific parameters to include cpo, write leveling override
Extend write leveling sample to 0xf
Adding rcw overrid for quad-rank RDIMMs
Signed-off-by: York Sun
---
arch/powerpc/include/asm/fsl_ddr_sdram.h |3 +
board/freescale/corenet_ds/ddr.c | 159 +++-
ECC can be turned on/off by hwconfig without recompiling. So enable it
by default.
Signed-off-by: York Sun
---
include/configs/corenet_ds.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 454a30a..49f0a26
Added fsl_ddr_get_version() function to for DDR3 to poll DDRC IP version
(major, minor, errata) to determine if unique mode registers are available.
If true, always use unique mode registers. Dynamic ODT is enabled if needed.
The table is documented in doc/README.fsl-ddr. This function may also nee
Erratum DDR-A003 requires workaround to correctly set RCW10 for registered DIMM.
Also adding polling after enabling DDR controller to ensure completion.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c|4 ++
arch/powerpc/cpu/mpc85xx/ddr-gen3.c | 81 +++
The following is the v3 patch. Since the last version, the change to hwconfig
has been dropped. Adding SPD registers has been dropped as well. Interactive
debugging DDR will be submitted later after cleaning up.
York Sun
___
U-Boot mailing list
U-Bo
Add fsl_ddr:ecc=on in hwconfig. If ECC is enabled in board configuration file,
ECC can be turned on/off by this switch. If this switch is omitted, it is ON by
default.
Updated hwconfig calls to use local buffer.
Syntax is
hwconfig=fsl_ddr:ecc=on
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc
Dear Yanjun Yang,
In message you
wrote:
> It seems that the chip can only be reset into a known
> state by using attribute space. The smc_reset and
> smc_enable function also need more lines to make the
> chip work.
>
> Signed-off-by: YanJun Yang
> ---
> drivers/net/lan91c96.c | 26
Dear Yanjun Yang,
In message you
wrote:
> The eth_device.name field length is limited by NAMESIZE,
> which is 16 defined in include/net.h. Unfortunately, two
> of the names in lan91c96.c are beyond that.
>
> Signed-off-by: YanJun Yang
> ---
> drivers/net/lan91c96.c |4 ++--
> 1 files chan
On Mon, Jan 10, 2011 at 4:27 PM, Wolfgang Denk wrote:
> Thomas Chou wrote:
>> Signed-off-by: Thomas Chou
>> ---
>> arch/nios2/include/asm/gpio.h | 6 ++
>> board/altera/nios2-generic/gpio.c | 5 +
>> 2 files changed, 11 insertions(+), 0 deletions(-)
>
> What is this needed for?
Dear Thomas Chou,
In message <1293175184-18746-1-git-send-email-tho...@wytron.com.tw> you wrote:
> Signed-off-by: Thomas Chou
> ---
> arch/nios2/include/asm/gpio.h |6 ++
> board/altera/nios2-generic/gpio.c |5 +
> 2 files changed, 11 insertions(+), 0 deletions(-)
What is th
Scott Wood wrote on 2011/01/10 19:24:02:
>
> On Sun, 9 Jan 2011 21:48:47 +0100
> Joakim Tjernlund wrote:
>
> > Wolfgang Denk wrote on 2011/01/09 21:29:04:
> > >
> > > Dear Joakim Tjernlund,
> > >
> > > In message
> > > <1292838435-14958-4-git-send-email-joakim.tjernl...@transmode.se> you
> > >
Dear Thomas Chou,
In message <1293174969-18653-2-git-send-email-tho...@wytron.com.tw> you wrote:
> Crc7 is used to compute mmc spi comamnd packet checksum.
s/comamnd/sommand/
> Signed-off-by: Thomas Chou
Please fix the typos, and provide proper attribution where this code
is coming from - see
Dear John Rigby,
In message <1293085997-28564-1-git-send-email-john.ri...@linaro.org> you wrote:
> and define CONFIG_SYS_TEXT_BASE in the board config files
>
> Signed-off-by: John Rigby
> ---
> Changes for v2:
> Remove bogus tab character in define in v1.
> ---
> board/isee/igep0020/config.mk
Dear Mike Frysinger,
In message <1293028907-16296-1-git-send-email-vap...@gentoo.org> you wrote:
>
> + if (CONFIG_MEM_SIZE) {
> + printf("RAM: ");
> + print_size(bd->bi_memsize, "\n");
> + }
> +
Side note: I see that CONFIG_MEM_SIZE is nowhere documented. Could y
Hi there
Happy New year from all of us over here!
We're pleased to inform you that your organisation has been invited to
participate in the exclusive Art of England Magazine, March 2011 edition,
deadline for which is now just 4 days away.
Now seven years old, the Art of England Magazine offers
On Mon, 10 Jan 2011 20:42:28 +0800
Baidu Boy wrote:
> This patch fix a problem for the pcie enumeration when the mpc83xx pcie
> controller is
> connected with switch or we use both of the two pcie controller
>
> Signed-off-by: Baidu Boy
> ---
> Changes for V2:
> - Avoid line wrap in the
On Sun, 9 Jan 2011 23:48:01 +0800
Xiangfu Liu wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> Hi Scott
>
> >
> > I don't see any of my comments on v3 addressed or responded to:
> > http://lists.denx.de/pipermail/u-boot/2010-December/083601.html
>
>
> On 12/14/2010 08:05 AM, Scot
On Sun, 2011-01-09 at 15:00 -0600, Kumar Gala wrote:
> On Jan 7, 2011, at 5:23 PM, Kumar Gala wrote:
>
> >
> > On Jan 7, 2011, at 11:52 AM, Wolfgang Denk wrote:
> >
> >> Dear York Sun,
> >>
> >> In message <1294418957.8466.8.ca...@oslab-l1> you wrote:
> >>>
> >>> fsl_ddr:ctlr_intlv=cacheline,b
On Sun, 9 Jan 2011 18:35:56 +0800
Xiangfu Liu wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> On 01/05/2011 04:16 AM, Scott Wood wrote:
> > On Wed, Dec 08, 2010 at 12:20:46AM -0600, Xiangfu Liu wrote:
> >> + writel(readl(EMC_NFECR) & ~EMC_NFECR_ECCE, EMC_NFECR);
> >
> > readl() an
On Sun, 9 Jan 2011 21:48:47 +0100
Joakim Tjernlund wrote:
> Wolfgang Denk wrote on 2011/01/09 21:29:04:
> >
> > Dear Joakim Tjernlund,
> >
> > In message
> > <1292838435-14958-4-git-send-email-joakim.tjernl...@transmode.se> you wrote:
> > > Only these 2 call sites depends on fixups for my mpc83
On Mon, Jan 10, 2011 at 1:21 PM, Jason Liu wrote:
> Hi, Tiago Maluta,
>
> 2011/1/10 Tiago Maluta :
>> Hi,
>>
>> I'm facing ECC errors when flashing u-boot on NAND on MX51EVK-based
>> board. U-Boot "nand write" command doesn't fill out-of-band (OOB)
>> bytes correctly. I noted this behavior after c
Le 10/01/2011 15:04, Minkyu Kang a écrit :
>>> How about lcd_setmem function?
>>> panel_info is located at bss area, but lcd_setmem access this structure.
>>> Is it illegal?
>>
>> This must not be done before relocation.
>
> No, please see 360 line of arch/arm/lib/board.c
> This function is called
Am Montag, den 10.01.2011, 11:28 -0500 schrieb Mike Frysinger:
> On Mon, Jan 10, 2011 at 10:59 AM, Andreas Pretzsch wrote:
> > As your code already uses the Linux GPIO conventions and naming (without
> > the gpio_chip stuff, which is not necessary for a bootloader IMHO), it'd
> > be a solid base fo
The pin portion of the specified GPIO was limited to 0..15.
While this is correct for Blackfins with different bank names (e.g.
BF537 with PF, PG, PH with 16 pins each), it's not sufficient for
Blackfins with linear naming like the BF561 (PF0..PF47).
Therefore check only for a valid GPIO number.
A
On Mon, Jan 10, 2011 at 10:59 AM, Andreas Pretzsch wrote:
> As your code already uses the Linux GPIO conventions and naming (without
> the gpio_chip stuff, which is not necessary for a bootloader IMHO), it'd
> be a solid base for that.
>
> Mr. Denk, are there any plans for a generic GPIO layer in U
Dear Wolfgang,
On 09.01.2011 23:25, Wolfgang Denk wrote:
> Dear Dirk Behme,
>
> In message<4d1f1841.5060...@googlemail.com> you wrote:
>>
>> Do you like to test the patch in the attachment? I named it 'v4'.
>
> Please send patches inline.
>
>> After some thinking and testing, it seems to me that
Dear Wolfgang,
Wolfgang Denk wrote:
> Dear Michal Simek,
>
> In message <4d2aba41.7030...@monstr.eu> you wrote:
>> I am little bit confused.
>> 1. Mike's patch has broken coding style in his patch ("space"+"space"15)
>
> Indeed. Sorry for missing this. The existing code had the same issue.
> If
Am Freitag, den 07.01.2011, 17:38 -0500 schrieb Mike Frysinger:
> On Friday, January 07, 2011 15:50:30 Andreas Pretzsch wrote:
> > the Blackfin U-Boot GPIO command (see "arch/blackfin/cpu/cmd_gpio.c")
> > specifies the port/pin naming in the form "[p][port]<#>", e.g. PF11.
> > The pin portion of t
Mike Frysinger wrote:
> On Mon, Jan 10, 2011 at 2:50 AM, Michal Simek wrote:
>> Wolfgang Denk wrote:
>>> Mike Frysinger wrote:
Some ports set up the board info structure at the same time as the global
data structure, and largely keep them together. So generate a define for
the board
Stefan Roese wrote:
> Signed-off-by: Stefan Roese
Thanks Stefan.
Acked-by: Michal Simek
Michal
> ---
> lib/asm-offsets.c |4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/lib/asm-offsets.c b/lib/asm-offsets.c
> index 6f253a6..c88f5d4 100644
> --- a/lib/asm-off
Hi, Tiago Maluta,
2011/1/10 Tiago Maluta :
> Hi,
>
> I'm facing ECC errors when flashing u-boot on NAND on MX51EVK-based
> board. U-Boot "nand write" command doesn't fill out-of-band (OOB)
> bytes correctly. I noted this behavior after compare the same
> u-boot.bin image flashed via ATK (proprieta
Dear Alexander Holler,
In message <4d2b1d75.70...@ahsoftware.de> you wrote:
>
> Beeing kind of a defensive programmer, I still would prefer to use have
> that __asm__ for write* too. That would at least prevent us from a
> possible bug there too.
So why don't you simply test and, assuming it's
Am 02.01.2011 22:00, schrieb Alexander Holler:
> On 02.01.2011 14:29, Dirk Behme wrote:
>> On 02.01.2011 13:43, Alexander Holler wrote:
>>> Am 01.01.2011 20:21, schrieb Dirk Behme:
On 01.01.2011 19:47, Alexander Holler wrote:
> Am 01.01.2011 19:25, schrieb Dirk Behme:
>> On 01.01.2011
On Mon, Jan 10, 2011 at 10:35 PM, Prafulla Wadaskar
wrote:
>
>
>> -Original Message-
>> From: Lei Wen [mailto:lei...@marvell.com]
>> Sent: Monday, January 10, 2011 9:31 AM
>> To: u-boot@lists.denx.de; Prafulla Wadaskar; Yu Tang; Ashish Karkare;
>> Prabhanjan Sarnaik; adrian . wenl @ gmail
On 01/10/2011 02:44 PM, Tiago Maluta wrote:
> I'd like to adapt u-boot to work with NFC v3. Do you think it's a
> difficult task (and the documentation [1] available should be
> sufficient) ?
>
> [1] http://cache.freescale.com/files/dsp/doc/ref_manual/MCIMX51RM.pdf
I think there is no other docum
Dear Wolfgang,
On Monday 10 January 2011 04:27 AM, Wolfgang Denk wrote:
> Dear Aneesh V,
>
> In message<1293018898-13253-8-git-send-email-ane...@ti.com> you wrote:
>> adapt omap3 to the new layered cache maintenance framework
> ...
>
>> +/* Declarations */
>
> Please drop this comment. Everybody
> -Original Message-
> From: Lei Wen [mailto:lei...@marvell.com]
> Sent: Monday, January 10, 2011 9:31 AM
> To: u-boot@lists.denx.de; Prafulla Wadaskar; Yu Tang; Ashish Karkare;
> Prabhanjan Sarnaik; adrian . wenl @ gmail . com "
> Subject: [PATCH V2 0/5] Add Pantheon soc and dkb board su
> -Original Message-
> From: Lei Wen [mailto:lei...@marvell.com]
> Sent: Monday, January 10, 2011 9:31 AM
> To: u-boot@lists.denx.de; Prafulla Wadaskar; Yu Tang; Ashish Karkare;
> Prabhanjan Sarnaik; adrian . wenl @ gmail . com "
> Subject: [PATCH V2 5/5] Pantheon: Add Board Support for M
Dear Wolfgang,
On Monday 10 January 2011 04:22 AM, Wolfgang Denk wrote:
> Dear Aneesh V,
>
> In message<1293018898-13253-7-git-send-email-ane...@ti.com> you wrote:
>> adapt omap4 to the new layered cache maintenance framework
>>
>> Signed-off-by: Aneesh V
>
>> +/*
>> + * Outer cache related funct
> -Original Message-
> From: Lei Wen [mailto:lei...@marvell.com]
> Sent: Monday, January 10, 2011 9:31 AM
> To: u-boot@lists.denx.de; Prafulla Wadaskar; Yu Tang; Ashish Karkare;
> Prabhanjan Sarnaik; adrian . wenl @ gmail . com "
> Subject: [PATCH V2 2/5] ARM: Add Support for Marvell Pant
> -Original Message-
> From: Lei Wen [mailto:lei...@marvell.com]
> Sent: Monday, January 10, 2011 9:31 AM
> To: u-boot@lists.denx.de; Prafulla Wadaskar; Yu Tang; Ashish Karkare;
> Prabhanjan Sarnaik; adrian . wenl @ gmail . com "
> Subject: [PATCH V2 1/5] mv: seperate kirkwood and armada
Dear Wolfgang Denk,
On 10 January 2011 21:14, Wolfgang Denk wrote:
> Dear Minkyu Kang,
>
> In message you
> wrote:
>>
>> >> int (*test_func)(void);
>> >
>> > This results in a symbol in bss segment, right?
>> >
>> >> And then, set to NULL at arch_cpu_init()
>> >
>> > Such an assignment is illeg
>> I'm facing ECC errors when flashing u-boot on NAND on MX51EVK-based
>> board. U-Boot "nand write" command doesn't fill out-of-band (OOB)
>> bytes correctly.
>
> The mxc_nand driver in u-boot mainline does not support version 3 of the
> internal NFC controller we find on the i.MX51 processor. You
Dear Wolfgang,
On Monday 10 January 2011 04:18 AM, Wolfgang Denk wrote:
> Dear Aneesh V,
>
> In message<1293018898-13253-6-git-send-email-ane...@ti.com> you wrote:
>> Add support for some of the key maintenance operations
>> - Invalidate all
>> - Invalidate range
>> - Flush(clean&
Thanks for keeping on working on jz4740 patchset.
On 01/10/2011 01:18 AM, Xiangfu Liu wrote:
> Hi Wolfgang
> those patches are for add xburst jz4740 and Ben NanoNote(named qi_lb60) to
> U-Boot
>
> some info about xburst jz4740:
> the xburst jz4740 is recently added to linux 2.6.36
> and it
On 01/10/2011 01:58 PM, Tiago Maluta wrote:
> Hi,
>
Hi Tiago,
> I'm facing ECC errors when flashing u-boot on NAND on MX51EVK-based
> board. U-Boot "nand write" command doesn't fill out-of-band (OOB)
> bytes correctly.
The mxc_nand driver in u-boot mainline does not support version 3 of the
int
Board support for the Guntermann & Drunck DLVision-10G.
Signed-off-by: Dirk Eibach
---
MAINTAINERS|1 +
arch/powerpc/include/asm/global_data.h |3 +
board/gdsys/405ep/405ep.c | 38 +-
board/gdsys/405ep/Makefile |1 +
board/gd
Add support for dual link osd hardware for gdsys 405ep.
Signed-off-by: Dirk Eibach
---
board/gdsys/405ep/dlvision-10g.c |3 +-
board/gdsys/common/osd.c | 303 -
board/gdsys/common/osd.h |2 +-
3 files changed, 232 insertions(+), 76 del
Add support for multiple FPGAs per board for gdsys
405ep architecture.
Signed-off-by: Dirk Eibach
---
arch/powerpc/include/asm/global_data.h |2 +-
board/gdsys/405ep/405ep.c | 62 +
board/gdsys/405ep/dlvision-10g.c | 214 ---
board/gd
Hi,
I'm facing ECC errors when flashing u-boot on NAND on MX51EVK-based
board. U-Boot "nand write" command doesn't fill out-of-band (OOB)
bytes correctly. I noted this behavior after compare the same
u-boot.bin image flashed via ATK (proprietary software from
Freescale). I guess is something relat
This patch fix a problem for the pcie enumeration when the mpc83xx pcie
controller is
connected with switch or we use both of the two pcie controller
Signed-off-by: Baidu Boy
---
Changes for V2:
- Avoid line wrap in the patch
Changes for V3
- Add space between ) and {
arch/powerp
This patch fix a problem for the pcie enumeration when the mpc83xx pcie
controller is
connected with switch or we use both of the two pcie controller
Signed-off-by: Baidu Boy
---
Changes for V2:
- Avoid line wrap in the patch
Changes for V3
- Add space between ) and {
arch/powerp
Dear Minkyu Kang,
In message you
wrote:
>
> >> int (*test_func)(void);
> >
> > This results in a symbol in bss segment, right?
> >
> >> And then, set to NULL at arch_cpu_init()
> >
> > Such an assignment is illegal then. Bss has not been initalized before
> > relocation, and must not be accesse
On Mon, Jan 10, 2011 at 6:58 AM, Stefan Roese wrote:
> Patch 8ef583a0 [miiphy: convert to linux/mii.h] introduced a small
> problem in the ppc4xx miiphy.c version. This patch fixes this problem.
Acked-by: Mike Frysinger
-mike
___
U-Boot mailing list
U-B
This patch adds support for Samsung s5pc210 universal board
Signed-off-by: Minkyu Kang
Signed-off-by: Kyungmin Park
---
MAINTAINERS |5 +-
MAKEALL |1 +
board/samsung/universal_c210/Makefile| 51
board/
S5PC210 is a 32-bit RSIC and Coretex-A9 Dual Core based micro-processor.
Signed-off-by: Minkyu Kang
Signed-off-by: Kyungmin Park
---
arch/arm/cpu/armv7/s5pc2xx/Makefile | 42
arch/arm/cpu/armv7/s5pc2xx/clock.c| 220 +
arch/arm/cpu/armv7/s5pc2xx/
Patch 8ef583a0 [miiphy: convert to linux/mii.h] introduced a small
problem in the ppc4xx miiphy.c version. This patch fixes this problem.
Signed-off-by: Stefan Roese
Cc: Mike Frysinger
---
arch/powerpc/cpu/ppc4xx/miiphy.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a
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