[U-Boot] (no subject)
Hello,everyone: I would like to chang my emai software on my host pc. which Mail Software is real convenient for dealing with our mailing list? Any suggestion! Best Regards MrGates m ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Embedded environment not compiling in the current git head?
It seems, something had broke the embedded environment compilation in the recent git head. During DO_DEPS_ONLY phase, environment.h is not considered, thus CONFIG_ENV_IS_EMBEDDED is never set with the obvious consequences. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] BLOCK: Add freescale IMX51 PATA driver
On 01/12/2011 11:46 PM, Marek Vasut wrote:
Signed-off-by: Marek Vasut marek.va...@gmail.com
---
drivers/block/Makefile |1 +
drivers/block/mxc_ata.c | 149
+++
2 files changed, 150 insertions(+), 0 deletions(-)
create mode 100644 drivers/block/mxc_ata.c
Hi Marek,
+
+/* PIO timing table */
+#define NR_PIO_SPECS5
+uint16_t pio_t0[NR_PIO_SPECS]= { 600, 383, 240, 180, 120 };
+uint16_t pio_t1[NR_PIO_SPECS]= { 70, 50, 30, 30, 25 };
+uint16_t pio_t2_8[NR_PIO_SPECS] = { 290, 290, 290, 80, 70 };
+uint16_t pio_t2_16[NR_PIO_SPECS] = { 165, 125, 100, 80, 70 };
+uint16_t pio_t2i[NR_PIO_SPECS] = { 40, 0, 0, 0, 0 };
+uint16_t pio_t4[NR_PIO_SPECS]= { 30, 20, 15, 10, 10 };
+uint16_t pio_t9[NR_PIO_SPECS]= { 20, 15, 10, 10, 10 };
+uint16_t pio_tA[NR_PIO_SPECS]= { 50, 50, 50, 50, 50 };
As these array are only used here, they should be static.
+
+ /* Write TIME_2R/AX/RDX/4 */
+ val = (((pio_t2_8[mode] + T) / T) REG2OFF(ata_cfg_regs-time_2r))
|
Line too long, please fix globally.
+ (((pio_tA[mode] + T) / T + 2)
REG2OFF(ata_cfg_regs-time_ax)) |
Ditto.
Best regards,
Stefano Babic
--
=
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de
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[U-Boot] [PATCH] powerpc/85xx: Add the workaround for erratum ELBC-A001 (enable on P4080)
Simultaneous FCM and GPCM or UPM operation may erroneously trigger bus
monitor timeout. Set timeout to maximum to avoid.
Based on a patch from Lan Chunhe b25...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c |3 +++
arch/powerpc/cpu/mpc8xxx/fsl_lbc.c|7 ++-
arch/powerpc/include/asm/fsl_lbc.h|4 +++-
include/configs/P4080DS.h |1 +
4 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index e44a38f..de73310 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -68,6 +68,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
#ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A003
puts(Work-around for Erratum CPC-A003 enabled\n);
#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_ELBC_A001
+ puts(Work-around for Erratum ELBC-A001 enabled\n);
+#endif
return 0;
}
diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
index 6f401e7..7598ebf 100644
--- a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
+++ b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2010 Freescale Semiconductor, Inc.
+ * Copyright 2010-2011 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -34,6 +34,11 @@ void init_early_memctl_regs(void)
{
uint init_br1 = 1;
+#ifdef CONFIG_SYS_FSL_ERRATUM_ELBC_A001
+ /* Set the local bus monitor timeout value to the maximum */
+ clrsetbits_be32((LBC_BASE_ADDR)-lbcr, LBCR_BMT|LBCR_BMTPS, 0xf);
+#endif
+
#ifdef CONFIG_MPC85xx
/* if cs1 is already set via debugger, leave cs0/cs1 alone */
if (get_lbc_br(1) BR_V)
diff --git a/arch/powerpc/include/asm/fsl_lbc.h
b/arch/powerpc/include/asm/fsl_lbc.h
index c504732..8695a62 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2008,2010 Freescale Semiconductor, Inc.
+ * Copyright (C) 2004-2008,2010-2011 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -295,6 +295,8 @@ void lbc_sdram_init(void);
#define LBCR_EPAR_SHIFT16
#define LBCR_BMT 0xFF00
#define LBCR_BMT_SHIFT 8
+#define LBCR_BMTPS 0x000F
+#define LBCR_BMTPS_SHIFT 0
/* LCRR - Clock Ratio Register
*/
diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h
index 216f6fb..34d5851 100644
--- a/include/configs/P4080DS.h
+++ b/include/configs/P4080DS.h
@@ -44,5 +44,6 @@
#define CONFIG_SYS_FSL_ERRATUM_CPC_A003
#define CONFIG_SYS_P4080_ERRATUM_SERDES8
#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
+#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
#include corenet_ds.h
--
1.7.2.3
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Re: [U-Boot] Unknown image format!
Hi jobhunts02, I am trying to switch from writing my JFFS2 filesystem to flash using an NFS mounted root filesystem to creating and installing a JFFS2 image. The reason I am doing this is so I can use sumtool on the JFFS2 image and speed up my boot time. When I use the JFFS2 image, I see the following while booting up the first time: VFS: Mounted root (jffs2 filesystem). Freeing unused kernel memory: 120k init INFO: task pdflush:9 blocked for more than 120 seconds. echo 0 /proc/sys/kernel/hung_task_timeout_secs disables this message. pdflush D 0 9 2 Call Trace: [C7C5FE10] [C000D464] __switch_to+0x4c/0x6c [C7C5FE30] [C0260590] schedule+0x1a4/0x378 [C7C5FE80] [C0262610] rwsem_down_failed_common+0xbc/0x250 [C7C5FEB0] [C0262810] rwsem_down_read_failed+0x2c/0x44 [C7C5FEE0] [C026186C] down_read+0x38/0x3c [C7C5FEF0] [C006EF3C] sync_supers+0x88/0x138 [C7C5FF10] [C00519AC] wb_kupdate+0x50/0x14c [C7C5FF70] [C005219C] pdflush+0x164/0x260 [C7C5FFD0] [C0033924] kthread+0x48/0x84 [C7C5FFF0] [C0006038] kernel_thread+0x44/0x60 *** Running rc.modules *** Running rc.serial *** Attempting to start S15inet Can you tell us on what storage you use the JFFS2? Nor, Nand, how large? Did you consider the JFFS2 cleanmarkers which need to be written by JFFS2 if not included in the pre-built image? In addition, after it does boot up and I do a write, the system hangs and u-boot won't even run after I power cycle the board. Please post the relevant commands you issue and the output so that we have an idea wht might go wrong. I see that when I run iminfo after downloading the image to RAM that it reports Unknown image format! : [...] = iminfo ## Checking Image at 0010 ... Unknown image format! Does iminfo saying Unknown image format! indicate a problem with my JFFS2 image? No. iminfo works on images wrapped with the mkimage tool. It does not know anything about filesystem images, so this is actually expected. Could this cause the long delay when booting after Freeing unused kernel memory? I am using a 2.6.26 kernel with ppc. No. I suspect that JFFS2 is writing its clean markers. Usually this should work in the background, but maybe your system setup has write operations which then could block on this process. Please see the JFFS2 FAQ[1]. Cheers Detlev [1] http://www.linux-mtd.infradead.org/faq/jffs2.html#L_clmarker -- I can understand that things like user-level libraries have to take crazy people into account, but the kernel internal libraries definitely do not. -- Linus Torvalds -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] iMX5: EfikaMX: Work-in-progress board support
On 01/12/2011 11:46 PM, Marek Vasut wrote:
Signed-off-by: Marek Vasut marek.va...@gmail.com
---
board/efikamx/Makefile | 52
board/efikamx/config.mk| 25 ++
board/efikamx/efikamx.c| 668
board/efikamx/imximage.cfg | 124
boards.cfg |1 +
include/configs/efikamx.h | 233 +++
6 files changed, 1103 insertions(+), 0 deletions(-)
create mode 100644 board/efikamx/Makefile
create mode 100644 board/efikamx/config.mk
create mode 100644 board/efikamx/efikamx.c
create mode 100644 board/efikamx/imximage.cfg
create mode 100644 include/configs/efikamx.h
Could you describe better which is the current status for this porting
and define what is already supported ? I mean, work-in-progress tells
me nothing about which peripherals are working and which not. Could you
add to your commit-id a short description, adding on which hardware
u-boot is running (on the development board ? on efika smarttotp ? on
efiga smartbook ? on all of them ?), and which peripherals are currently
supported.
You should add your name to the MAINTAINERS file, too.
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
new file mode 100644
index 000..10cf111
+/**
+ * Shared variables / local defines
+
**/
+/* LED */
+#define EFIKAMX_LED_BLUE0x1
+#define EFIKAMX_LED_GREEN 0x2
+#define EFIKAMX_LED_RED 0x4
+
+void efikamx_toggle_led(uint32_t mask);
+
+/* Board revisions */
+#define EFIKAMX_BOARD_REV_110x1
+#define EFIKAMX_BOARD_REV_120x2
+#define EFIKAMX_BOARD_REV_130x3
+#define EFIKAMX_BOARD_REV_140x4
+
+/**
+ * Board identification
+
**/
+static u32 board_rev;
+
+u32 get_efika_rev(void)
+{
+ u32 rev = 0;
+ /*
+ * Retrieve board ID:
+ * rev1.1: 1,1,1
^---spaces instead of tabs, please fix globally
+ * rev1.2: 1,1,0
+ * rev1.3: 1,0,1
+ * rev1.4: 1,0,0
+ */
+ mxc_request_iomux(MX51_PIN_NANDF_CS0, IOMUX_CONFIG_GPIO);
+ mxc_gpio_direction(IOMUX_TO_GPIO(MX51_PIN_NANDF_CS0),
MXC_GPIO_DIRECTION_OUT);
Line too long, please fix globally.
+ mxc_request_iomux(MX51_PIN_NANDF_RB3, IOMUX_CONFIG_GPIO);
+ mxc_iomux_set_pad(MX51_PIN_NANDF_RB3, PAD_CTL_100K_PU);
+ mxc_gpio_direction(IOMUX_TO_GPIO(MX51_PIN_NANDF_RB3),
MXC_GPIO_DIRECTION_IN);
+ rev |= (!!mxc_gpio_get(IOMUX_TO_GPIO(MX51_PIN_NANDF_RB3))) 2;
Is it ok to leave the NAND pins configured as GPIO, or should they set
back for the NFC controller ?
+/**
+ * SPI configuration
+
**/
+#ifdef CONFIG_MXC_SPI
Is there a reason why CONFIG_MXC_SPI is not set ? As I understand, it is
required to set the PMIC to make things working. If CONFIG_MXC_SPI,
something wrong happens. I would prefer you drop the #ifdef, and instead
of that you add a check at the beginning of the file reporting a
compiler error if CONFIG_MXC_SPI is not set.
+static void power_init(void)
+{
+ unsigned int val;
+ unsigned int reg;
+ struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE;
+
+ /* Write needed to Power Gate 2 register */
+ val = pmic_reg_read(REG_POWER_MISC);
+ val = ~PWGT2SPIEN;
+ pmic_reg_write(REG_POWER_MISC, val);
+
+ /* Externally powered */
+ val = pmic_reg_read(REG_CHARGE);
+ val |= ICHRG0 | ICHRG1 | ICHRG2 | ICHRG3 | CHGAUTOB;
+ pmic_reg_write(REG_CHARGE, val);
+
+ /* power up the system first */
+ pmic_reg_write(REG_POWER_MISC, PWUP);
+
+ /* NOTE: if (is_soc_rev(CHIP_REV_2_0) = 0) */
+
+ /* Set core voltage to 1.1V */
+ val = pmic_reg_read(REG_SW_0);
+ val = (val (~0x1F)) | 0x14;
Replace fix constants with defines, adding them to mc13892.h if they are
missing.
+ pmic_reg_write(REG_SW_0, val);
+
+ /* Setup VCC (SW2) to 1.25 */
+ val = pmic_reg_read(REG_SW_1);
+ val = (val (~0x1F)) | 0x1A;
Ditto
+ /* Green LED */
+ mxc_request_iomux(MX51_PIN_CSI1_VSYNC, IOMUX_CONFIG_ALT3);
+ mxc_gpio_direction(IOMUX_TO_GPIO(MX51_PIN_CSI1_VSYNC),
MXC_GPIO_DIRECTION_OUT);
Line to long
+void efikamx_toggle_led(uint32_t mask)
+{
+ mxc_gpio_set(IOMUX_TO_GPIO(MX51_PIN_CSI1_D9), mask EFIKAMX_LED_BLUE);
^
|--- trailing whitespaces
+
+ switch (__raw_readl(SRC_BASE_ADDR + 0x8)) {
We have a structure for this register,please use struct src from imx_regs.h
+# Boot Device :
Re: [U-Boot] [PATCH 1/2] armv7: add support for S5PC210 SoC
On 10 January 2011 20:58, Minkyu Kang mk7.k...@samsung.com wrote: S5PC210 is a 32-bit RSIC and Coretex-A9 Dual Core based micro-processor. RSIC and Coretex are typo. I'm going to fix it. Signed-off-by: Minkyu Kang mk7.k...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- arch/arm/cpu/armv7/s5pc2xx/Makefile | 42 arch/arm/cpu/armv7/s5pc2xx/clock.c | 220 + arch/arm/cpu/armv7/s5pc2xx/soc.c | 30 +++ arch/arm/include/asm/arch-s5pc2xx/adc.h | 42 arch/arm/include/asm/arch-s5pc2xx/clk.h | 36 arch/arm/include/asm/arch-s5pc2xx/clock.h | 255 + arch/arm/include/asm/arch-s5pc2xx/cpu.h | 96 + arch/arm/include/asm/arch-s5pc2xx/gpio.h | 112 +++ arch/arm/include/asm/arch-s5pc2xx/mmc.h | 71 +++ arch/arm/include/asm/arch-s5pc2xx/pwm.h | 55 ++ arch/arm/include/asm/arch-s5pc2xx/sys_proto.h | 32 +++ arch/arm/include/asm/arch-s5pc2xx/uart.h | 55 ++ 12 files changed, 1046 insertions(+), 0 deletions(-) create mode 100644 arch/arm/cpu/armv7/s5pc2xx/Makefile create mode 100644 arch/arm/cpu/armv7/s5pc2xx/clock.c create mode 100644 arch/arm/cpu/armv7/s5pc2xx/soc.c create mode 100644 arch/arm/include/asm/arch-s5pc2xx/adc.h create mode 100644 arch/arm/include/asm/arch-s5pc2xx/clk.h create mode 100644 arch/arm/include/asm/arch-s5pc2xx/clock.h create mode 100644 arch/arm/include/asm/arch-s5pc2xx/cpu.h create mode 100644 arch/arm/include/asm/arch-s5pc2xx/gpio.h create mode 100644 arch/arm/include/asm/arch-s5pc2xx/mmc.h create mode 100644 arch/arm/include/asm/arch-s5pc2xx/pwm.h create mode 100644 arch/arm/include/asm/arch-s5pc2xx/sys_proto.h create mode 100644 arch/arm/include/asm/arch-s5pc2xx/uart.h -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] armv7: add support for s5pc210 universal board
On 10 January 2011 20:59, Minkyu Kang mk7.k...@samsung.com wrote:
This patch adds support for Samsung s5pc210 universal board
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
MAINTAINERS | 5 +-
MAKEALL | 1 +
board/samsung/universal_c210/Makefile | 51
board/samsung/universal_c210/config.mk | 24 ++
board/samsung/universal_c210/lowlevel_init.S | 395
++
board/samsung/universal_c210/onenand.c | 34 +++
board/samsung/universal_c210/universal.c | 251
boards.cfg | 1 +
include/configs/s5pc210_universal.h | 248
9 files changed, 1008 insertions(+), 2 deletions(-)
create mode 100644 board/samsung/universal_c210/Makefile
create mode 100644 board/samsung/universal_c210/config.mk
create mode 100644 board/samsung/universal_c210/lowlevel_init.S
create mode 100644 board/samsung/universal_c210/onenand.c
create mode 100644 board/samsung/universal_c210/universal.c
create mode 100644 include/configs/s5pc210_universal.h
diff --git a/board/samsung/universal_c210/universal.c
b/board/samsung/universal_c210/universal.c
new file mode 100644
index 000..a0325c3
--- /dev/null
+++ b/board/samsung/universal_c210/universal.c
@@ -0,0 +1,251 @@
+/*
+ * Copyright (C) 2010 Samsung Electronics
+ * Minkyu Kang mk7.k...@samsung.com
+ * Kyungmin Park kyungmin.p...@samsung.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/adc.h
+#include asm/arch/gpio.h
+#include asm/arch/mmc.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct s5pc210_gpio_part1 *gpio1;
+struct s5pc210_gpio_part2 *gpio2;
+unsigned int board_rev;
+
+u32 get_board_rev(void)
+{
+ return board_rev;
+}
+
+static int get_hwrev(void)
+{
+ return board_rev 0xFF;
+}
+
+static void check_hw_revision(void);
+
+int board_init(void)
+{
+ gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE;
+ gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE;
+
+ gd-bd-bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
+ gd-bd-bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+ check_hw_revision();
+ printf(HW Revision:\t0x%x\n, board_rev);
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd-ram_size = PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE;
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ gd-bd-bi_dram[0].start = PHYS_SDRAM_1;
+ gd-bd-bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+ gd-bd-bi_dram[1].start = PHYS_SDRAM_2;
+ gd-bd-bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+
+ gd-ram_size = gd-bd-bi_dram[0].size + gd-bd-bi_dram[1].size;
+}
+
+static unsigned short get_adc_value(int channel)
+{
+ struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
+ unsigned short ret = 0;
+ unsigned int reg;
+ unsigned int loop = 0;
+
+ writel(channel 0xF, adc-adcmux);
+ writel((1 14) | (49 6), adc-adccon);
+ writel(1000 0x, adc-adcdly);
+ writel(readl(adc-adccon) | (1 16), adc-adccon); /* 12 bit */
+ udelay(10);
+ writel(readl(adc-adccon) | (1 0), adc-adccon); /* Enable */
+ udelay(10);
+
+ do {
+ udelay(1);
+ reg = readl(adc-adccon);
+ } while (!(reg (1 15)) (loop++ 1000));
+
+ ret = readl(adc-adcdat0) 0xFFF;
+
+ return ret;
+}
+
+static unsigned int get_hw_revision(void)
+{
+ int hwrev, mode0, mode1;
+
+ mode0 = get_adc_value(1); /* HWREV_MODE0 */
+ mode1 = get_adc_value(2); /* HWREV_MODE1 */
+
+ /*
+ * XXX Always set the default hwrev as the latest board
+ * ADC = (voltage) / 3.3 * 4096
+ */
+ hwrev = 3;
+
+#define IS_RANGE(x, min, max) ((x) (min) (x) (max))
+ if (IS_RANGE(mode0, 80, 200) IS_RANGE(mode1, 80, 200))
+ hwrev = 0x0; /* 0.01V
[U-Boot] [PATCH v2 2/2] armv7: add support for s5pc210 universal board
This patch adds support for Samsung s5pc210 universal board Signed-off-by: Minkyu Kang mk7.k...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- v2 remove debug message MAINTAINERS |5 +- MAKEALL |1 + board/samsung/universal_c210/Makefile| 51 board/samsung/universal_c210/config.mk | 24 ++ board/samsung/universal_c210/lowlevel_init.S | 395 ++ board/samsung/universal_c210/onenand.c | 34 +++ board/samsung/universal_c210/universal.c | 250 boards.cfg |1 + include/configs/s5pc210_universal.h | 248 9 files changed, 1007 insertions(+), 2 deletions(-) create mode 100644 board/samsung/universal_c210/Makefile create mode 100644 board/samsung/universal_c210/config.mk create mode 100644 board/samsung/universal_c210/lowlevel_init.S create mode 100644 board/samsung/universal_c210/onenand.c create mode 100644 board/samsung/universal_c210/universal.c create mode 100644 include/configs/s5pc210_universal.h diff --git a/MAINTAINERS b/MAINTAINERS index a5f0493..6eed120 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -672,8 +672,9 @@ Nishant Kamat nska...@ti.com Minkyu Kang mk7.k...@samsung.com - s5p_goniARM ARMV7 (S5PC110 SoC) - SMDKC100ARM ARMV7 (S5PC100 SoC) + SMDKC100ARM ARMV7 (S5PC100 SoC) + s5p_goniARM ARMV7 (S5PC110 SoC) + s5pc210_universal ARM ARMV7 (S5PC210 SoC) Frederik Kriewitz frede...@kriewitz.eu diff --git a/MAKEALL b/MAKEALL index a732e6a..a5b265f 100755 --- a/MAKEALL +++ b/MAKEALL @@ -434,6 +434,7 @@ LIST_ARMV7=\ omap4_panda \ omap4_sdp4430 \ s5p_goni\ + s5pc210_universal \ smdkc100\ diff --git a/board/samsung/universal_c210/Makefile b/board/samsung/universal_c210/Makefile new file mode 100644 index 000..0200220 --- /dev/null +++ b/board/samsung/universal_c210/Makefile @@ -0,0 +1,51 @@ +# +# Copyright (C) 2010 Samsung Electronics +# Minkyu Kang mk7.k...@samsung.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS-y:= universal.o onenand.o +SOBJS := lowlevel_init.o + +SRCS:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(SOBJS) $(OBJS) + $(call cmd_link_o_target, $(SOBJS) $(OBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/samsung/universal_c210/config.mk b/board/samsung/universal_c210/config.mk new file mode 100644 index 000..0ecd716 --- /dev/null +++ b/board/samsung/universal_c210/config.mk @@ -0,0 +1,24 @@ +# +# Copyright (C) 2010 Samsung Electronics +# Kyungmin Park kyungmin.p...@samsung.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +CONFIG_SYS_TEXT_BASE = 0x4480 diff --git a/board/samsung/universal_c210/lowlevel_init.S
[U-Boot] [PATCH v2 1/2] armv7: add support for S5PC210 SoC
S5PC210 is a 32-bit RISC and Cortex-A9 Dual Core based micro-processor.
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
v2
fixtypo: RSIC - RISC, Coretex - Cortex
arch/arm/cpu/armv7/s5pc2xx/Makefile | 42
arch/arm/cpu/armv7/s5pc2xx/clock.c| 220 +
arch/arm/cpu/armv7/s5pc2xx/soc.c | 30 +++
arch/arm/include/asm/arch-s5pc2xx/adc.h | 42
arch/arm/include/asm/arch-s5pc2xx/clk.h | 36
arch/arm/include/asm/arch-s5pc2xx/clock.h | 255 +
arch/arm/include/asm/arch-s5pc2xx/cpu.h | 96 +
arch/arm/include/asm/arch-s5pc2xx/gpio.h | 112 +++
arch/arm/include/asm/arch-s5pc2xx/mmc.h | 71 +++
arch/arm/include/asm/arch-s5pc2xx/pwm.h | 55 ++
arch/arm/include/asm/arch-s5pc2xx/sys_proto.h | 32 +++
arch/arm/include/asm/arch-s5pc2xx/uart.h | 55 ++
12 files changed, 1046 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/cpu/armv7/s5pc2xx/Makefile
create mode 100644 arch/arm/cpu/armv7/s5pc2xx/clock.c
create mode 100644 arch/arm/cpu/armv7/s5pc2xx/soc.c
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/adc.h
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/clk.h
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/clock.h
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/cpu.h
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/gpio.h
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/mmc.h
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/pwm.h
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/sys_proto.h
create mode 100644 arch/arm/include/asm/arch-s5pc2xx/uart.h
diff --git a/arch/arm/cpu/armv7/s5pc2xx/Makefile
b/arch/arm/cpu/armv7/s5pc2xx/Makefile
new file mode 100644
index 000..124c380
--- /dev/null
+++ b/arch/arm/cpu/armv7/s5pc2xx/Makefile
@@ -0,0 +1,42 @@
+#
+# Copyright (C) 2009 Samsung Electronics
+# Minkyu Kang mk7.k...@samsung.com
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(SOC).o
+
+COBJS += clock.o soc.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+all:$(obj).depend $(LIB)
+
+$(LIB):$(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/arm/cpu/armv7/s5pc2xx/clock.c
b/arch/arm/cpu/armv7/s5pc2xx/clock.c
new file mode 100644
index 000..450a630
--- /dev/null
+++ b/arch/arm/cpu/armv7/s5pc2xx/clock.c
@@ -0,0 +1,220 @@
+/*
+ * Copyright (C) 2010 Samsung Electronics
+ * Minkyu Kang mk7.k...@samsung.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/clk.h
+
+#ifndef CONFIG_SYS_CLK_FREQ_C210
+#define CONFIG_SYS_CLK_FREQ_C210 2400
+#endif
+
+/* s5pc210: return pll clock frequency */
+static unsigned long s5pc210_get_pll_clk(int pllreg)
+{
+ struct s5pc210_clock *clk =
+ (struct s5pc210_clock *)samsung_get_base_clock();
+ unsigned long r, m, p, s, k = 0, mask, fout;
+ unsigned int freq;
+
+ switch (pllreg) {
+ case APLL:
+ r = readl(clk-apll_con0);
+ break;
+ case MPLL:
+
[U-Boot] [PATCH 1/3] powerpc/p3041: Add various p3041 specific information
Add P3041 SoC specific information:
* SERDES Table
* LIODN setup
* Portal configuration
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/cpu/mpc85xx/Makefile |2 +
arch/powerpc/cpu/mpc85xx/p3041_ids.c| 105 +
arch/powerpc/cpu/mpc85xx/p3041_serdes.c | 151 +++
3 files changed, 258 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/cpu/mpc85xx/p3041_ids.c
create mode 100644 arch/powerpc/cpu/mpc85xx/p3041_serdes.c
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile
b/arch/powerpc/cpu/mpc85xx/Makefile
index af7bc09..d0447e2 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -70,6 +70,7 @@ COBJS-$(CONFIG_PCI) += pci.o
COBJS-$(CONFIG_FSL_CORENET) += portals.o
# various SoC specific assignments
+COBJS-$(CONFIG_PPC_P3041) += p3041_ids.o
COBJS-$(CONFIG_PPC_P4080) += p4080_ids.o
COBJS-$(CONFIG_QE) += qe_io.o
@@ -91,6 +92,7 @@ COBJS-$(CONFIG_P1021) += p1021_serdes.o
COBJS-$(CONFIG_P1022) += p1022_serdes.o
COBJS-$(CONFIG_P2010) += p2020_serdes.o
COBJS-$(CONFIG_P2020) += p2020_serdes.o
+COBJS-$(CONFIG_PPC_P3041) += p3041_serdes.o
COBJS-$(CONFIG_PPC_P4080) += p4080_serdes.o
COBJS = $(COBJS-y)
diff --git a/arch/powerpc/cpu/mpc85xx/p3041_ids.c
b/arch/powerpc/cpu/mpc85xx/p3041_ids.c
new file mode 100644
index 000..febbee9
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/p3041_ids.c
@@ -0,0 +1,105 @@
+/*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/fsl_portals.h
+#include asm/fsl_liodn.h
+
+struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
+ /* dqrr liodn, frame data liodn, liodn off, sdest */
+ SET_QP_INFO( 1, 2, 1, 0),
+ SET_QP_INFO( 3, 4, 2, 1),
+ SET_QP_INFO( 5, 6, 3, 2),
+ SET_QP_INFO( 7, 8, 4, 3),
+ SET_QP_INFO( 9, 10, 5, 4),
+ SET_QP_INFO( 0, 0, 0, 5),
+ SET_QP_INFO( 0, 0, 0, 6),
+ SET_QP_INFO( 0, 0, 0, 7),
+ SET_QP_INFO( 0, 0, 0, 0), /* for now sdest to 0 */
+ SET_QP_INFO( 0, 0, 0, 0), /* for now sdest to 0 */
+};
+
+struct liodn_id_table liodn_tbl[] = {
+ SET_QMAN_LIODN(31),
+ SET_BMAN_LIODN(32),
+
+ SET_SDHC_LIODN(1, 64),
+
+ SET_PME_LIODN(117),
+
+ SET_USB_LIODN(1, fsl-usb2-mph, 125),
+ SET_USB_LIODN(2, fsl-usb2-dr, 126),
+
+ SET_SATA_LIODN(1, 127),
+ SET_SATA_LIODN(2, 128),
+
+ SET_PCI_LIODN(1, 193),
+ SET_PCI_LIODN(2, 194),
+ SET_PCI_LIODN(3, 195),
+ SET_PCI_LIODN(4, 196),
+
+ SET_DMA_LIODN(1, 197),
+ SET_DMA_LIODN(2, 198),
+
+ SET_GUTS_LIODN(fsl,rapidio-delta, 199, rio1liodnr, 0),
+ SET_GUTS_LIODN(NULL, 200, rio2liodnr, 0),
+ SET_GUTS_LIODN(NULL, 201, rio1maintliodnr, 0),
+ SET_GUTS_LIODN(NULL, 202, rio2maintliodnr, 0),
+};
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+struct liodn_id_table fman1_liodn_tbl[] = {
+ SET_FMAN_RX_1G_LIODN(1, 0, 10),
+ SET_FMAN_RX_1G_LIODN(1, 1, 11),
+ SET_FMAN_RX_1G_LIODN(1, 2, 12),
+ SET_FMAN_RX_1G_LIODN(1, 3, 13),
+ SET_FMAN_RX_1G_LIODN(1, 4, 14),
+ SET_FMAN_RX_10G_LIODN(1, 0, 15),
+};
+#endif
+
+struct liodn_id_table sec_liodn_tbl[] = {
+ SET_SEC_JR_LIODN_ENTRY(0, 129, 130),
+ SET_SEC_JR_LIODN_ENTRY(1, 131, 132),
+ SET_SEC_JR_LIODN_ENTRY(2, 133, 134),
+ SET_SEC_JR_LIODN_ENTRY(3, 135, 136),
+ SET_SEC_RTIC_LIODN_ENTRY(a, 154),
+ SET_SEC_RTIC_LIODN_ENTRY(b, 155),
+ SET_SEC_RTIC_LIODN_ENTRY(c, 156),
+ SET_SEC_RTIC_LIODN_ENTRY(d, 157),
+ SET_SEC_DECO_LIODN_ENTRY(0, 97, 98),
+ SET_SEC_DECO_LIODN_ENTRY(1, 99, 100),
+};
+
+struct liodn_id_table liodn_bases[] = {
+ [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100),
+#ifdef CONFIG_SYS_DPAA_FMAN
+ [FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(32),
+#endif
+#ifdef CONFIG_SYS_DPAA_PME
+ [FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(136, 172),
+#endif
+};
+
+int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
+int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
+int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
diff --git a/arch/powerpc/cpu/mpc85xx/p3041_serdes.c
[U-Boot] [PATCH 3/3] powerpc/p2040: Add various p2040 specific information
Add P2040 SoC specific information:
* SERDES Table
* LIODN setup
* Portal configuration
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/cpu/mpc85xx/p2040_serdes.c | 66 +++
arch/powerpc/cpu/mpc8xxx/cpu.c |2 +
arch/powerpc/include/asm/processor.h|2 +
3 files changed, 70 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/cpu/mpc85xx/p2040_serdes.c
diff --git a/arch/powerpc/cpu/mpc85xx/p2040_serdes.c
b/arch/powerpc/cpu/mpc85xx/p2040_serdes.c
new file mode 100644
index 000..a96eff4
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/p2040_serdes.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/fsl_serdes.h
+#include asm/processor.h
+#include asm/io.h
+#include fsl_corenet_serdes.h
+
+static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
+ [0x2] = {NONE, NONE, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1,
+ NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+ SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE, NONE, NONE, NONE, },
+ [0x5] = {NONE, NONE, PCIE1, PCIE3, PCIE2, PCIE2, PCIE2, PCIE2,
+ NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+ SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE, NONE, NONE, NONE, },
+ [0x8] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2,
+ PCIE2, PCIE2, PCIE2, NONE, NONE, NONE, NONE, SATA1,
+ SATA2, NONE, NONE, NONE, NONE, },
+ [0xa] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2,
+ PCIE2, PCIE2, PCIE2, NONE, NONE, PCIE3, PCIE3, PCIE3,
+ PCIE3, NONE, NONE, NONE, NONE, },
+ [0xf] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, SRIO2,
+ SRIO2, SRIO1, SRIO1, NONE, NONE, PCIE3, SGMII_FM1_DTSEC5,
+ SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE, NONE, NONE, NONE, },
+ [0x14] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2,
+ PCIE2, SRIO1, SRIO1, NONE, NONE, AURORA,
+ SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE,
+ NONE, NONE, NONE, },
+ [0x16] = {NONE, NONE, PCIE1, PCIE3, PCIE2, PCIE2, SGMII_FM1_DTSEC3,
+ SGMII_FM1_DTSEC4, NONE, NONE, NONE, NONE, SATA1, SATA2, NONE,
+ NONE, NONE, NONE, },
+ [0x1a] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, SRIO2,
+ SRIO2, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE, NONE,
+ NONE, NONE, SATA1, SATA2, NONE, NONE, NONE, NONE, },
+ [0x1c] = {NONE, NONE, PCIE1, SGMII_FM1_DTSEC2, PCIE2, PCIE2,
+ SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE, NONE, AURORA,
+ SGMII_FM1_DTSEC5, NONE, NONE, NONE, NONE, NONE, NONE, },
+};
+
+enum srds_prtcl serdes_get_prtcl(int cfg, int lane)
+{
+ if (!serdes_lane_enabled(lane))
+ return NONE;
+
+ return serdes_cfg_tbl[cfg][lane];
+}
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index 5b30fbd..79d988c 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -80,6 +80,8 @@ struct cpu_type cpu_type_list [] = {
CPU_TYPE_ENTRY(P2010, P2010_E, 1),
CPU_TYPE_ENTRY(P2020, P2020, 2),
CPU_TYPE_ENTRY(P2020, P2020_E, 2),
+ CPU_TYPE_ENTRY(P2040, P2040, 4),
+ CPU_TYPE_ENTRY(P2040, P2040_E, 4),
CPU_TYPE_ENTRY(P3041, P3041, 4),
CPU_TYPE_ENTRY(P3041, P3041_E, 4),
CPU_TYPE_ENTRY(P4040, P4040, 4),
diff --git a/arch/powerpc/include/asm/processor.h
b/arch/powerpc/include/asm/processor.h
index 71fafa3..a0af71e 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -1054,6 +1054,8 @@
#define SVR_P2010_E0x80EB00
#define SVR_P2020 0x80E200
#define SVR_P2020_E0x80EA00
+#define SVR_P2040 0x821000
+#define SVR_P2040_E0x821800
#define SVR_P3041 0x821103
#define SVR_P3041_E0x821903
#define SVR_P4040 0x820100
--
1.7.2.3
___
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[U-Boot] [PATCH 2/3] powerpc/p5020: Add various p5020 specific information
Add P5020 SoC specific information:
* SERDES Table
* LIODN setup
* Portal configuration
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/cpu/mpc85xx/Makefile |2 +
arch/powerpc/cpu/mpc85xx/p5020_ids.c| 105 +
arch/powerpc/cpu/mpc85xx/p5020_serdes.c | 151 +++
3 files changed, 258 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/cpu/mpc85xx/p5020_ids.c
create mode 100644 arch/powerpc/cpu/mpc85xx/p5020_serdes.c
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile
b/arch/powerpc/cpu/mpc85xx/Makefile
index d0447e2..0bf9d5d 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -72,6 +72,7 @@ COBJS-$(CONFIG_FSL_CORENET) += portals.o
# various SoC specific assignments
COBJS-$(CONFIG_PPC_P3041) += p3041_ids.o
COBJS-$(CONFIG_PPC_P4080) += p4080_ids.o
+COBJS-$(CONFIG_PPC_P5020) += p5020_ids.o
COBJS-$(CONFIG_QE) += qe_io.o
COBJS-$(CONFIG_CPM2) += serial_scc.o
@@ -94,6 +95,7 @@ COBJS-$(CONFIG_P2010) += p2020_serdes.o
COBJS-$(CONFIG_P2020) += p2020_serdes.o
COBJS-$(CONFIG_PPC_P3041) += p3041_serdes.o
COBJS-$(CONFIG_PPC_P4080) += p4080_serdes.o
+COBJS-$(CONFIG_PPC_P5020) += p5020_serdes.o
COBJS = $(COBJS-y)
COBJS += cpu.o
diff --git a/arch/powerpc/cpu/mpc85xx/p5020_ids.c
b/arch/powerpc/cpu/mpc85xx/p5020_ids.c
new file mode 100644
index 000..febbee9
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/p5020_ids.c
@@ -0,0 +1,105 @@
+/*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/fsl_portals.h
+#include asm/fsl_liodn.h
+
+struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
+ /* dqrr liodn, frame data liodn, liodn off, sdest */
+ SET_QP_INFO( 1, 2, 1, 0),
+ SET_QP_INFO( 3, 4, 2, 1),
+ SET_QP_INFO( 5, 6, 3, 2),
+ SET_QP_INFO( 7, 8, 4, 3),
+ SET_QP_INFO( 9, 10, 5, 4),
+ SET_QP_INFO( 0, 0, 0, 5),
+ SET_QP_INFO( 0, 0, 0, 6),
+ SET_QP_INFO( 0, 0, 0, 7),
+ SET_QP_INFO( 0, 0, 0, 0), /* for now sdest to 0 */
+ SET_QP_INFO( 0, 0, 0, 0), /* for now sdest to 0 */
+};
+
+struct liodn_id_table liodn_tbl[] = {
+ SET_QMAN_LIODN(31),
+ SET_BMAN_LIODN(32),
+
+ SET_SDHC_LIODN(1, 64),
+
+ SET_PME_LIODN(117),
+
+ SET_USB_LIODN(1, fsl-usb2-mph, 125),
+ SET_USB_LIODN(2, fsl-usb2-dr, 126),
+
+ SET_SATA_LIODN(1, 127),
+ SET_SATA_LIODN(2, 128),
+
+ SET_PCI_LIODN(1, 193),
+ SET_PCI_LIODN(2, 194),
+ SET_PCI_LIODN(3, 195),
+ SET_PCI_LIODN(4, 196),
+
+ SET_DMA_LIODN(1, 197),
+ SET_DMA_LIODN(2, 198),
+
+ SET_GUTS_LIODN(fsl,rapidio-delta, 199, rio1liodnr, 0),
+ SET_GUTS_LIODN(NULL, 200, rio2liodnr, 0),
+ SET_GUTS_LIODN(NULL, 201, rio1maintliodnr, 0),
+ SET_GUTS_LIODN(NULL, 202, rio2maintliodnr, 0),
+};
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+struct liodn_id_table fman1_liodn_tbl[] = {
+ SET_FMAN_RX_1G_LIODN(1, 0, 10),
+ SET_FMAN_RX_1G_LIODN(1, 1, 11),
+ SET_FMAN_RX_1G_LIODN(1, 2, 12),
+ SET_FMAN_RX_1G_LIODN(1, 3, 13),
+ SET_FMAN_RX_1G_LIODN(1, 4, 14),
+ SET_FMAN_RX_10G_LIODN(1, 0, 15),
+};
+#endif
+
+struct liodn_id_table sec_liodn_tbl[] = {
+ SET_SEC_JR_LIODN_ENTRY(0, 129, 130),
+ SET_SEC_JR_LIODN_ENTRY(1, 131, 132),
+ SET_SEC_JR_LIODN_ENTRY(2, 133, 134),
+ SET_SEC_JR_LIODN_ENTRY(3, 135, 136),
+ SET_SEC_RTIC_LIODN_ENTRY(a, 154),
+ SET_SEC_RTIC_LIODN_ENTRY(b, 155),
+ SET_SEC_RTIC_LIODN_ENTRY(c, 156),
+ SET_SEC_RTIC_LIODN_ENTRY(d, 157),
+ SET_SEC_DECO_LIODN_ENTRY(0, 97, 98),
+ SET_SEC_DECO_LIODN_ENTRY(1, 99, 100),
+};
+
+struct liodn_id_table liodn_bases[] = {
+ [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100),
+#ifdef CONFIG_SYS_DPAA_FMAN
+ [FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(32),
+#endif
+#ifdef CONFIG_SYS_DPAA_PME
+ [FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(136, 172),
+#endif
+};
+
+int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
+int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
+int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
diff --git
[U-Boot] [PATCH 3/3 v2] powerpc/p2040: Add various p2040 specific information
Add P2040 SoC specific information:
* SERDES Table
* Added p2040 to cpu_type_list and SVR list
* Added number of LAWs for p2040
* Set CONFIG_MAX_CPUS to 4 for p2040
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
* Fixed commit message
* Added some additional P2040 specific defines/cfg
arch/powerpc/cpu/mpc85xx/p2040_serdes.c | 66 +++
arch/powerpc/cpu/mpc8xxx/cpu.c |2 +
arch/powerpc/include/asm/config.h |4 +-
arch/powerpc/include/asm/processor.h|2 +
drivers/misc/fsl_law.c |6 +-
5 files changed, 76 insertions(+), 4 deletions(-)
create mode 100644 arch/powerpc/cpu/mpc85xx/p2040_serdes.c
diff --git a/arch/powerpc/cpu/mpc85xx/p2040_serdes.c
b/arch/powerpc/cpu/mpc85xx/p2040_serdes.c
new file mode 100644
index 000..a96eff4
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/p2040_serdes.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/fsl_serdes.h
+#include asm/processor.h
+#include asm/io.h
+#include fsl_corenet_serdes.h
+
+static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
+ [0x2] = {NONE, NONE, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1,
+ NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+ SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE, NONE, NONE, NONE, },
+ [0x5] = {NONE, NONE, PCIE1, PCIE3, PCIE2, PCIE2, PCIE2, PCIE2,
+ NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+ SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE, NONE, NONE, NONE, },
+ [0x8] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2,
+ PCIE2, PCIE2, PCIE2, NONE, NONE, NONE, NONE, SATA1,
+ SATA2, NONE, NONE, NONE, NONE, },
+ [0xa] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2,
+ PCIE2, PCIE2, PCIE2, NONE, NONE, PCIE3, PCIE3, PCIE3,
+ PCIE3, NONE, NONE, NONE, NONE, },
+ [0xf] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, SRIO2,
+ SRIO2, SRIO1, SRIO1, NONE, NONE, PCIE3, SGMII_FM1_DTSEC5,
+ SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE, NONE, NONE, NONE, },
+ [0x14] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2,
+ PCIE2, SRIO1, SRIO1, NONE, NONE, AURORA,
+ SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE,
+ NONE, NONE, NONE, },
+ [0x16] = {NONE, NONE, PCIE1, PCIE3, PCIE2, PCIE2, SGMII_FM1_DTSEC3,
+ SGMII_FM1_DTSEC4, NONE, NONE, NONE, NONE, SATA1, SATA2, NONE,
+ NONE, NONE, NONE, },
+ [0x1a] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, SRIO2,
+ SRIO2, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE, NONE,
+ NONE, NONE, SATA1, SATA2, NONE, NONE, NONE, NONE, },
+ [0x1c] = {NONE, NONE, PCIE1, SGMII_FM1_DTSEC2, PCIE2, PCIE2,
+ SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE, NONE, AURORA,
+ SGMII_FM1_DTSEC5, NONE, NONE, NONE, NONE, NONE, NONE, },
+};
+
+enum srds_prtcl serdes_get_prtcl(int cfg, int lane)
+{
+ if (!serdes_lane_enabled(lane))
+ return NONE;
+
+ return serdes_cfg_tbl[cfg][lane];
+}
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index 5b30fbd..79d988c 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -80,6 +80,8 @@ struct cpu_type cpu_type_list [] = {
CPU_TYPE_ENTRY(P2010, P2010_E, 1),
CPU_TYPE_ENTRY(P2020, P2020, 2),
CPU_TYPE_ENTRY(P2020, P2020_E, 2),
+ CPU_TYPE_ENTRY(P2040, P2040, 4),
+ CPU_TYPE_ENTRY(P2040, P2040_E, 4),
CPU_TYPE_ENTRY(P3041, P3041, 4),
CPU_TYPE_ENTRY(P3041, P3041_E, 4),
CPU_TYPE_ENTRY(P4040, P4040, 4),
diff --git a/arch/powerpc/include/asm/config.h
b/arch/powerpc/include/asm/config.h
index 76dedeb..da8bbd8 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -1,5 +1,5 @@
/*
- * Copyright 2009-2010 Freescale Semiconductor, Inc.
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
Re: [U-Boot] [V2 patch 4/4] SMDK6400: Fix SMDK6400 SDRAM init
Hello.
On 12-01-2011 17:52, seedshope wrote:
Since SDRAM init function have already change, So the SDRAM
initial function must be change.
Signed-off-by: seedshopebocui...@gmail.com
diff --git a/board/samsung/smdk6400/smdk6400.c
b/board/samsung/smdk6400/smdk6400.c
index 35aa40b..52b44a8 100644
--- a/board/samsung/smdk6400/smdk6400.c
+++ b/board/samsung/smdk6400/smdk6400.c
@@ -78,10 +78,18 @@ int board_init(void)
return 0;
}
-int dram_init(void)
+void dram_init_banksize(void)
{
+ DECLARE_GLOBAL_DATA_PTR;
+
gd-bd-bi_dram[0].start = PHYS_SDRAM_1;
gd-bd-bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+int dram_init(void)
+{
+ gd-ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_MAX_RAM_BANK_SIZE);
Please indent that line more to the right, preferrebly start it under
'(volatile long *)'.
ok, But I don't know how number tab indent is appropriate. May be the effect
as following？
gd-ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE,
CONFIG_MAX_RAM_BANK_SIZE);
I've asked you specifically to do this:
gd-ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE,
CONFIG_MAX_RAM_BANK_SIZE);
Thanks，
seedshope
WBR, Sergei
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Re: [U-Boot] [PATCH 2/8] armv7: cache maintenance operations for armv7
On Thursday 13 January 2011 12:48 AM, Albert ARIBAUD wrote:
(I realize I did not answer the other ones)
Le 08/01/2011 11:06, Aneesh V a écrit :
Out of curiosity, can you elaborate on why the compiler would optimize
better in these cases?
While counting down the termination condition check is against 0. So
you can just decrement the loop count using a 'subs' and do a 'bne'.
When you count up you have to do a comparison with a non-zero value. So
you will need one 'cmp' instruction extra:-)
I would not try to be too smart about what instructions are generated
and how by a compiler such as gcc which has rather complex code
generation optimizations.
IMHO, on ARM comparing with 0 is always going to be efficient than
comparing with a non-zero number for a termination condition, assuming
a decent compiler.
bigger loop inside because that reduces the frequency at which your
outer parameter changes and hence the overall number of instructions
executed. Consider this:
1. We encode both the loop counts along with other data into a register
that is finally written to CP15 register.
2. outer loop has the code for shifting and ORing the outer variable to
this register.
3. Inner loop has the code for shifting and ORing the inner variable.
Step (3) has to be executed 'way x set' number of times anyways.
But having bigger loop inside makes sure that 2 is executed fewer times!
It's not a constant calculation. It's based on loop index. And this
optimization is not relying on compiler specifics. This is a logic
level optimization. It should generally give good results with all
compilers. Perhaps I was wrong in stating that it helps in getting
better assembly. It just helps in better run-time efficiency.
Here too it seems like you're underestimating the compiler's optimizing
capabilities -- your explanation seems to amount to extracting a
constant calculation from a loop, something that is rather usual in code
optimizing.
Actually, in my experience(in this same context) GCC does a terrible
job at this! For instance:
+ for (set = num_sets - 1; set = 0; set--) {
+ setway = (level 1) | (set log2_line_len) |
+(way way_shift);
Here, way_shift = 32 - log2_num_ways
But if you substitute way_shift with the latter, GCC will put the
subtraction instruction inside the loop! - where as it is clearly loop
invariant. So, I had to move it explicitly out of the loop!
In fact, I was thinking of giving this feedback to GCC.
With these tweaks the assembly code generated by this C code is as good
as the original hand-written assembly code with my compiler.
How about other compilers?
I haven't tested other compilers. However, as I mentioned above the
latter one is a logic optimization. The former hopefully should help
all ARM compilers.
As you must be knowing, existing code for cache maintenance was in
assembly. When I moved it to C I wanted to make sure that the generated
code is as good as the original assembly for this critical piece of
code (I expected some criticism about moving it to C :-)). That's
why I checked the generated code and did these ,hopefully, minor tweaks
to make it better. I hope they don't have any serious drawbacks.
Best regards,
Aneesh
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Re: [U-Boot] (no subject)
Le 13/01/2011 09:36, MrGates a écrit : Hello,everyone: I would like to chang my emai software on my host pc. which Mail Software is real convenient for dealing with our mailing list? Any suggestion! Thunderbird should be ok -- that's what I use under Linux and it runs just the same under Windows. However, if you intend to send patches to the list, then for these you should use git format-patch and git send-email. Best Regards MrGates m Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] USB storage performance EHCI question
Hello. On 13-01-2011 9:09, Wolfgang Denk wrote: Hm... I just notice the caviumnetworks in your address, so this is probably MIPS? Check if your caches are turned on... BTW, Cavium also produces ARMs (like CNS3xxx)... Best regards, Wolfgang Denk WBR, Sergei ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/8] armv7: cache maintenance operations for armv7
On Thursday 13 January 2011 12:53 AM, Albert ARIBAUD wrote: Le 12/01/2011 10:08, Aneesh V a écrit : On Saturday 08 January 2011 07:36 PM, Albert ARIBAUD wrote: Le 08/01/2011 14:17, Aneesh V a écrit : snip.. +/* some utility macros */ +#define mask(start, end) \ + (((1 ((end) - (start) + 1)) - 1) (start)) + +#define mask_n_get(reg, start, end) \ + (((reg) mask(start, end)) (start)) Seeing as these functions are only used in the ARMv7 cache C file, they should be moved there. I plan to use a modified version of mask_n_get() and its set couterpart mask_n_set() in my subsequent works in more files. Can I keep it here itself or should I move it to an OMAP specific header file or can I move it to a more generic header file? Please suggest. They're very generic actually. I think they should go to a gereric bit manipulation header, and be named a... bit... more explicitly. For instance, the name 'mask' does not show that the macro creates a range of 'one' bits from start to end. What I need is something like below: #define get_bit_field(nr, start, mask)\ (((nr) (mask)) (start)) #define set_bit_field(nr, start, mask, val)\ (nr) = ((nr) ~(mask)) | (((val) (start)) (mask)) Can these go in a generic header? If so, can I add them to include/linux/bitops.h After some more thought, I am wondering if a *generic* field setting and getting macro is really useful. So far everyone is fine with at most defining field-specific macros. Is it going to be easy if you have many fields to deal with? However, I agree that the above may be specific to our needs. What may be of more generic interest may be something like this with the mask automatically generated: #define get_bit_field(nr, start, end) #define set_bit_field(nr, start, end, val) However, in our case I am already given the mask and start position for each field (automatically generated from hw database). So, I prefer the former versions. If that doesn't look useful for generic use I will put them in OMAP specific headers. Best regards, Aneesh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/8] armv7: cache maintenance operations for armv7
On Thursday 13 January 2011 12:48 AM, Albert ARIBAUD wrote:
snip ..
+ for (way = num_ways - 1; way= 0 ; way--)
+ for (set = num_sets - 1; set= 0; set--) {
Please fix whitespacing around operators. The best way to ''catch'em
all'' is to run Linux' checkpatch.pl (I do this with option --no-tree)
on all patches that you submit to u-boot and, fix all warning and errors
and if some are left that you think should not be fixed, mention them
and explain why they're wrongly emitted.
I religiously do checkpatch whenever I send out a patch. Please note
that my original mail seems to be fine. I saved it and ran checkpatch
again. No errors, no warnings! Something amiss?
Well, something like set= 0 is quite surprising as it has
inconsistent spacing around a binary operators. But you're right,
checkpatch does not detect it. Can you fix them manually?
Checkpatch does find such issues. I was trying to say that my original
mail doesn't have any spacing issues. The problem seems to have
appeared in your reply. Is your mail client doing something funny?
Best regards,
Aneesh
Amicalement,
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[U-Boot] [PATCH] ppc, 8xx: remove obsolete km8xx baords from keymile
The MPC852 based mgsuvd and kmsupx4 boards boards from keymile
were initially ported but later on not developed further. So
the respective files were removed to avoid unneeded merging and
maintenance.
Signed-off-by: Holger Brunck holger.bru...@keymile.com
---
board/keymile/km8xx/Makefile | 48 -
board/keymile/km8xx/km8xx.c | 197 ---
board/keymile/km8xx/km8xx_hdlc_enet.c | 278 ---
board/keymile/km8xx/u-boot.lds| 97 --
boards.cfg|2 -
include/configs/km8xx.h | 332 -
include/configs/kmsupx4.h | 43 -
include/configs/mgsuvd.h | 40
8 files changed, 0 insertions(+), 1037 deletions(-)
delete mode 100644 board/keymile/km8xx/Makefile
delete mode 100644 board/keymile/km8xx/km8xx.c
delete mode 100644 board/keymile/km8xx/km8xx_hdlc_enet.c
delete mode 100644 board/keymile/km8xx/u-boot.lds
delete mode 100644 include/configs/km8xx.h
delete mode 100644 include/configs/kmsupx4.h
delete mode 100644 include/configs/mgsuvd.h
diff --git a/board/keymile/km8xx/Makefile b/board/keymile/km8xx/Makefile
deleted file mode 100644
index abb9ef9..000
--- a/board/keymile/km8xx/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2007
-# Heiko Schocher, DENX Software Engineering, h...@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)../common)
-endif
-
-LIB= $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o ../common/common.o ../common/keymile_hdlc_enet.o \
- km8xx_hdlc_enet.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB):$(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#
diff --git a/board/keymile/km8xx/km8xx.c b/board/keymile/km8xx/km8xx.c
deleted file mode 100644
index 6de2f22..000
--- a/board/keymile/km8xx/km8xx.c
+++ /dev/null
@@ -1,197 +0,0 @@
-/*
- * (C) Copyright 2007
- * Heiko Schocher, DENX Software Engineering, h...@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include common.h
-#include mpc8xx.h
-#include net.h
-#include asm/io.h
-
-#if defined(CONFIG_OF_BOARD_SETUP) defined(CONFIG_OF_LIBFDT)
-#include libfdt.h
-#endif
-
-#include ../common/common.h
-
-DECLARE_GLOBAL_DATA_PTR;
-
-const uint sdram_table[] =
-{
- 0x0f07fc04, 0x0c04, 0x00bdfc04, 0x0ff77c00,
- 0x1c05, 0xfc04, 0xfc04, 0xfc04,
- /* 0x08 Burst Read */
- 0x0f07fc04, 0x0c04, 0x00bdfc04, 0x00fffc00,
- 0x00fffc00, 0x00fffc00, 0x0ff77c00, 0x1c05,
- /* 0x10 Load mode register */
- 0x0c34, 0x0ff57c04, 0x0c04, 0x1c05,
- 0xfc04, 0xfc04, 0xfc04, 0xfc04,
- /* 0x18 Single Write */
- 0x0f07fc04, 0x0c00, 0x00bd7c04, 0x0c04,
- 0x0ff77c04, 0x1c05, 0xfc04, 0xfc04,
- /* 0x20 Burst Write */
- 0x0f07fc04, 0x0c00, 0x00bd7c00, 0x00fffc00,
- 0x00fffc00, 0x00fffc04, 0x0c04, 0x0ff77c04,
- 0x1c05, 0xfc04, 0xfc04, 0xfc04,
-
Re: [U-Boot] [PATCH 2/8] armv7: cache maintenance operations for armv7
Le 13/01/2011 13:05, Aneesh V a écrit :
What I need is something like below:
#define get_bit_field(nr, start, mask)\
(((nr) (mask)) (start))
#define set_bit_field(nr, start, mask, val)\
(nr) = ((nr) ~(mask)) | (((val) (start)) (mask))
Can these go in a generic header? If so, can I add them to
include/linux/bitops.h
After some more thought, I am wondering if a *generic* field setting and
getting macro is really useful. So far everyone is fine with at most
defining field-specific macros.
Is it going to be easy if you have many fields to deal with?
I don't see how the generic macros ease anything. Instead of defining say
#define get_field_F(x) ((x F_start) F_mask)
#define set_field_F(x,v) { x = (x ~ F_mask ) | (v F_start) }
You'd have
#define get_field_F(x) get_bit_field(x, F_start, F_mask)
#define set_field_F(x,v) set_bit_field(x, F_start, F_mask, v);
Which does not seem to bring any simplicity to me.
However, I agree that the above may be specific to our needs.
What may be of more generic interest may be something like this with
the mask automatically generated:
#define get_bit_field(nr, start, end)
#define set_bit_field(nr, start, end, val)
However, in our case I am already given the mask and start position for
each field (automatically generated from hw database). So, I prefer the
former versions.
If that doesn't look useful for generic use I will put them in
OMAP specific headers.
Best regards,
Aneesh
Amicalement,
--
Albert.
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Re: [U-Boot] [PATCH] ppc, 8xx: remove obsolete km8xx baords from keymile
Hello Holger, type in subject, please s/baords/boards ;-) Holger Brunck wrote: The MPC852 based mgsuvd and kmsupx4 boards boards from keymile were initially ported but later on not developed further. So the respective files were removed to avoid unneeded merging and maintenance. Signed-off-by: Holger Brunck holger.bru...@keymile.com --- board/keymile/km8xx/Makefile | 48 - board/keymile/km8xx/km8xx.c | 197 --- board/keymile/km8xx/km8xx_hdlc_enet.c | 278 --- board/keymile/km8xx/u-boot.lds| 97 -- boards.cfg|2 - include/configs/km8xx.h | 332 - include/configs/kmsupx4.h | 43 - include/configs/mgsuvd.h | 40 8 files changed, 0 insertions(+), 1037 deletions(-) delete mode 100644 board/keymile/km8xx/Makefile delete mode 100644 board/keymile/km8xx/km8xx.c delete mode 100644 board/keymile/km8xx/km8xx_hdlc_enet.c delete mode 100644 board/keymile/km8xx/u-boot.lds delete mode 100644 include/configs/km8xx.h delete mode 100644 include/configs/kmsupx4.h delete mode 100644 include/configs/mgsuvd.h Could you please remove the entries in MAINTAINERS too? Thanks! bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] RR v3 PATCH: SMDK6400 Fix some build bug
Change from V1: patch 1: patch 2: Delete some compile information from commit. patch 3: Add LED modify information and Delete some compile information from commit. patch 4: Add new patch for SDRAM init. Change frome v2: patch2: Modify Makefile for arch/arm/cpu/arm1176/s3c64xx/cpu_init.s in build error. It will generat redefine information for mem_ctrl_asm_init before the Modify. patch4: Modify the Sergei Shtylyov comments and change the SDRAM size variable for PHYS_SDRAM_SIZE_1. I apply this patch and build ok. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [v3 patch 1/4] SMDK6400: Fix CONFIG_SYS_INIT_SP_ADDR undefined
Fix CONFIG_SYS_INIT_SP_ADDR undefined issue. Signed-off-by: seedshope bocui...@gmail.com diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 671f2c7..c9acf58 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -44,6 +44,11 @@ #define CONFIG_PERIPORT_BASE 0x7000 #define CONFIG_PERIPORT_SIZE 0x13 +#define CONFIG_SYS_IRAM_BASE0x0c00 /* Internal SRAM base address */ +#define CONFIG_SYS_IRAM_SIZE0x2000 /* 8 KB of internal SRAM memory */ +#define CONFIG_SYS_IRAM_END (CONFIG_SYS_IRAM_BASE + CONFIG_SYS_IRAM_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_IRAM_END - GENERATED_GBL_DATA_SIZE) + #define CONFIG_SYS_SDRAM_BASE 0x5000 /* input clock of PLL: SMDK6400 has 12MHz input clock */ -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [v3 patch 2/4] SMDK6400: Fix some label undefined in build error
Modify Makefile for cpu_init.c and Start.s use some label,this defined
u-boot.lds of arch/arm/cpu/arm1176. But SMDK6400 use the link script
board/samsung/smdk6400/u-boot-nand.lds. So add some label form u-boot.lds
to u-boot-nand.lds
Signed-off-by: seedshope bocui...@gmail.com
diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile
b/arch/arm/cpu/arm1176/s3c64xx/Makefile
index 0785b19..f4b9574 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/Makefile
+++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile
@@ -30,12 +30,15 @@ LIB = $(obj)lib$(SOC).o
SOBJS = reset.o
-COBJS-$(CONFIG_S3C6400)+= cpu_init.o speed.o
+COBJS-$(CONFIG_S3C6400)+= speed.o
COBJS-y+= timer.o
+CPUINIT= cpu_init.o
+
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
+CPUINIT := $(addprefix $(obj),$(CPUINIT))
-all: $(obj).depend $(START) $(LIB)
+all: $(obj).depend $(START) $(LIB) $(CPUINIT)
$(LIB):$(OBJS)
$(call cmd_link_o_target, $(OBJS))
diff --git a/board/samsung/smdk6400/u-boot-nand.lds
b/board/samsung/smdk6400/u-boot-nand.lds
index 29a4f61..2b87fc6 100644
--- a/board/samsung/smdk6400/u-boot-nand.lds
+++ b/board/samsung/smdk6400/u-boot-nand.lds
@@ -55,8 +55,29 @@ SECTIONS
. = ALIGN(4);
.mmudata : { *(.mmudata) }
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) . = ALIGN(4); }
- _end = .;
+. = ALIGN(4);
+
+ .rel.dyn : {
+ __rel_dyn_start = .;
+ *(.rel*)
+ __rel_dyn_end = .;
+ }
+
+ .dynsym : {
+ __dynsym_start = .;
+ *(.dynsym)
+ }
+
+ .bss __rel_dyn_start (OVERLAY) : {
+ __bss_start = .;
+ *(.bss)
+ . = ALIGN(4);
+ _end = .;
+ }
+
+ /DISCARD/ : { *(.dynstr*) }
+ /DISCARD/ : { *(.dynamic*) }
+ /DISCARD/ : { *(.plt*) }
+ /DISCARD/ : { *(.interp*) }
+ /DISCARD/ : { *(.gnu*) }
}
--
1.7.1
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[U-Boot] [v3 patch 3/4] SMDK6400: Fix build error for nand_spl support
Add some relocation symbols to u-boot.lds and disable LED functions
in start.s to support nand_spl.
Signed-off-by: seedshope bocui...@gmail.com
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 237dcfe..ae3706a 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -354,9 +354,11 @@ clbss_l:strr2, [r0]/* clear
loop...*/
cmp r0, r1
bne clbss_l
+#ifndef CONFIG_NAND_SPL
bl coloured_LED_init
bl red_LED_on
#endif
+#endif
/*
* We are done. Do not return, instead branch to second part of board
diff --git a/nand_spl/board/samsung/smdk6400/u-boot.lds
b/nand_spl/board/samsung/smdk6400/u-boot.lds
index 3ac6aa1..30b1573 100644
--- a/nand_spl/board/samsung/smdk6400/u-boot.lds
+++ b/nand_spl/board/samsung/smdk6400/u-boot.lds
@@ -55,7 +55,22 @@ SECTIONS
__u_boot_cmd_end = .;
. = ALIGN(4);
+
+ .rel.dyn : {
+ __rel_dyn_start = .;
+ *(.rel*)
+ __rel_dyn_end = .;
+ }
+
+ .dynsym : {
+ __dynsym_start = .;
+ *(.dynsym)
+ }
+
+ .bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
- .bss : { *(.bss) . = ALIGN(4); }
+ *(.bss)
+ . = ALIGN(4);
_end = .;
+ }
}
--
1.7.1
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[U-Boot] [v3 patch 4/4] SMDK6400: Fix SMDK6400 SDRAM init
Since SDRAM init function have already change, So the SDRAM
initial function must be change.
Signed-off-by: seedshope bocui...@gmail.com
diff --git a/board/samsung/smdk6400/smdk6400.c
b/board/samsung/smdk6400/smdk6400.c
index 35aa40b..043d553 100644
--- a/board/samsung/smdk6400/smdk6400.c
+++ b/board/samsung/smdk6400/smdk6400.c
@@ -78,10 +78,18 @@ int board_init(void)
return 0;
}
-int dram_init(void)
+void dram_init_banksize(void)
{
+ DECLARE_GLOBAL_DATA_PTR;
+
gd-bd-bi_dram[0].start = PHYS_SDRAM_1;
gd-bd-bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+int dram_init(void)
+{
+ gd-ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, \
+ PHYS_SDRAM_1_SIZE);
return 0;
}
--
1.7.1
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Re: [U-Boot] [RFC] ARM: mx31pdk: Use the new relocation scheme
On 01/12/2011 01:49 PM, Fabio Estevam wrote: Hi, Hi Fabio, I am trying to make the new relocation scheme to work on the mx31pdk board. With this patch applied the mx31pdk build works, but not able to get a U-boot prompt yet. I have tried to imagine some issues, but I cannot find a clear reason. Building with your patch I checked that nand_spl is still less than 2KB code, and that matches the NAND page, as required by i.MX31 - so it is not a problem. Have you tried to disable the relocation, just to check if the relocation is an issue with CONFIG_SKIP_RELOCATE_UBOOT ? This is not a solution, but only to check what happens. I copied the nand_spl/board/karo/tx25/u-boot.lds to the mx31pdk one. I am not certain whether the CONFIG_SYS_TEXT_BASE should be changed or not: ifdef CONFIG_NAND_SPL CONFIG_SYS_TEXT_BASE = 0x87ec else CONFIG_SYS_TEXT_BASE = 0x87f0 endif I think they are ok - both addresses are valid RAM addresses. The relocation will move then the code at the end of the RAM. And as I understood from i.MX31 manual, the NFC controller does not use the IRAM at all, so the area pointed by your starting stack pointer should not be overwritten. If anyone has any comments/suggestions I will appreciate it. No great idea, really. Probably you need to attach a JTAG debugger and see what happens. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] ppc, 8xx: remove obsolete km8xx boards from keymile
The MPC852 based mgsuvd and kmsupx4 boards from keymile
were initially ported but later on not developed further. So
the respective files were removed to avoid unneeded merging
and maintenance.
Signed-off-by: Holger Brunck holger.bru...@keymile.com
---
Changes for v2:
- fix typos in commit message
- remove boards from MAINTAINERS file
MAINTAINERS |2 -
board/keymile/km8xx/Makefile | 48 -
board/keymile/km8xx/km8xx.c | 197 ---
board/keymile/km8xx/km8xx_hdlc_enet.c | 278 ---
board/keymile/km8xx/u-boot.lds| 97 --
boards.cfg|2 -
include/configs/km8xx.h | 332 -
include/configs/kmsupx4.h | 43 -
include/configs/mgsuvd.h | 40
9 files changed, 0 insertions(+), 1039 deletions(-)
delete mode 100644 board/keymile/km8xx/Makefile
delete mode 100644 board/keymile/km8xx/km8xx.c
delete mode 100644 board/keymile/km8xx/km8xx_hdlc_enet.c
delete mode 100644 board/keymile/km8xx/u-boot.lds
delete mode 100644 include/configs/km8xx.h
delete mode 100644 include/configs/kmsupx4.h
delete mode 100644 include/configs/mgsuvd.h
diff --git a/MAINTAINERS b/MAINTAINERS
index c46bc07..38056ce 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -419,9 +419,7 @@ Heiko Schocher h...@denx.de
ids8247 MPC8247
jupiter MPC5200
kmeter1 MPC8360
- kmsupx4 MPC852T
mgcoge MPC8247
- mgsuvd MPC852
mucmc52 MPC5200
muas3001MPC8270
municse MPC5200
diff --git a/board/keymile/km8xx/Makefile b/board/keymile/km8xx/Makefile
deleted file mode 100644
index abb9ef9..000
--- a/board/keymile/km8xx/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2007
-# Heiko Schocher, DENX Software Engineering, h...@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)../common)
-endif
-
-LIB= $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o ../common/common.o ../common/keymile_hdlc_enet.o \
- km8xx_hdlc_enet.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB):$(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#
diff --git a/board/keymile/km8xx/km8xx.c b/board/keymile/km8xx/km8xx.c
deleted file mode 100644
index 6de2f22..000
--- a/board/keymile/km8xx/km8xx.c
+++ /dev/null
@@ -1,197 +0,0 @@
-/*
- * (C) Copyright 2007
- * Heiko Schocher, DENX Software Engineering, h...@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include common.h
-#include mpc8xx.h
-#include net.h
-#include asm/io.h
-
-#if defined(CONFIG_OF_BOARD_SETUP) defined(CONFIG_OF_LIBFDT)
-#include libfdt.h
-#endif
-
-#include ../common/common.h
-
-DECLARE_GLOBAL_DATA_PTR;
-
-const uint sdram_table[] =
-{
- 0x0f07fc04, 0x0c04, 0x00bdfc04, 0x0ff77c00,
- 0x1c05, 0xfc04, 0xfc04, 0xfc04,
- /* 0x08 Burst Read */
- 0x0f07fc04,
Re: [U-Boot] [PATCH v2] ppc, 8xx: remove obsolete km8xx boards from keymile
Hallo Holger, Holger Brunck wrote: The MPC852 based mgsuvd and kmsupx4 boards from keymile were initially ported but later on not developed further. So the respective files were removed to avoid unneeded merging and maintenance. Signed-off-by: Holger Brunck holger.bru...@keymile.com --- Changes for v2: - fix typos in commit message - remove boards from MAINTAINERS file Acked-by: Heiko Schocher h...@denx.de Thanks! bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/8] armv7: cache maintenance operations for armv7
On Thursday 13 January 2011 06:44 PM, Albert ARIBAUD wrote:
Le 13/01/2011 13:05, Aneesh V a écrit :
What I need is something like below:
#define get_bit_field(nr, start, mask)\
(((nr) (mask)) (start))
#define set_bit_field(nr, start, mask, val)\
(nr) = ((nr) ~(mask)) | (((val) (start)) (mask))
Can these go in a generic header? If so, can I add them to
include/linux/bitops.h
After some more thought, I am wondering if a *generic* field setting and
getting macro is really useful. So far everyone is fine with at most
defining field-specific macros.
Is it going to be easy if you have many fields to deal with?
I don't see how the generic macros ease anything. Instead of defining say
#define get_field_F(x) ((x F_start) F_mask)
#define set_field_F(x,v) { x = (x ~ F_mask ) | (v F_start) }
You'd have
#define get_field_F(x) get_bit_field(x, F_start, F_mask)
#define set_field_F(x,v) set_bit_field(x, F_start, F_mask, v);
Which does not seem to bring any simplicity to me.
I wouldn't define get_field_F.
Instead I would just use set_bit_field(x, F_start, F_mask, v) directly
in the code and I have F_start and F_mask defined in the header files
(automatically generated)
Even if it was manual isn't it easier to define just F_start and F_mask
per field than defining a get_field_F per field?
Perhaps my requirement is different. If this scheme is not used by
many, I shall put these macros in OMAP specific headers.
best regards,
Aneesh
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Re: [U-Boot] [PATCH 2/8] armv7: cache maintenance operations for armv7
Le 13/01/2011 15:30, Aneesh V a écrit : Perhaps my requirement is different. If this scheme is not used by many, I shall put these macros in OMAP specific headers. Yes, I'd prefer that, finally. best regards, Aneesh Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/8] armv7: cache maintenance operations for armv7
Le 13/01/2011 13:14, Aneesh V a écrit :
On Thursday 13 January 2011 12:48 AM, Albert ARIBAUD wrote:
snip ..
+ for (way = num_ways - 1; way= 0 ; way--)
+ for (set = num_sets - 1; set= 0; set--) {
Please fix whitespacing around operators. The best way to ''catch'em
all'' is to run Linux' checkpatch.pl (I do this with option --no-tree)
on all patches that you submit to u-boot and, fix all warning and
errors
and if some are left that you think should not be fixed, mention them
and explain why they're wrongly emitted.
I religiously do checkpatch whenever I send out a patch. Please note
that my original mail seems to be fine. I saved it and ran checkpatch
again. No errors, no warnings! Something amiss?
Well, something like set= 0 is quite surprising as it has
inconsistent spacing around a binary operators. But you're right,
checkpatch does not detect it. Can you fix them manually?
Checkpatch does find such issues. I was trying to say that my original
mail doesn't have any spacing issues. The problem seems to have
appeared in your reply. Is your mail client doing something funny?
You're right. The issue appears when doing a reply with Thunderbird.
Seems to me like a recent change in behavior, as I recall having replied
to mails with this kind of spacing preserved. Sorry for the noise.
Amicalement,
--
Albert.
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Re: [U-Boot] [PATCH 2/2] iMX5: EfikaMX: Work-in-progress board support
On Thursday 13 January 2011 10:37:47 Stefano Babic wrote:
On 01/12/2011 11:46 PM, Marek Vasut wrote:
Signed-off-by: Marek Vasut marek.va...@gmail.com
---
board/efikamx/Makefile | 52
board/efikamx/config.mk| 25 ++
board/efikamx/efikamx.c| 668
board/efikamx/imximage.cfg
| 124
boards.cfg |1 +
include/configs/efikamx.h | 233 +++
6 files changed, 1103 insertions(+), 0 deletions(-)
create mode 100644 board/efikamx/Makefile
create mode 100644 board/efikamx/config.mk
create mode 100644 board/efikamx/efikamx.c
create mode 100644 board/efikamx/imximage.cfg
create mode 100644 include/configs/efikamx.h
Could you describe better which is the current status for this porting
and define what is already supported ? I mean, work-in-progress tells
me nothing about which peripherals are working and which not. Could you
add to your commit-id a short description, adding on which hardware
u-boot is running (on the development board ? on efika smarttotp ? on
efiga smartbook ? on all of them ?), and which peripherals are currently
supported.
Will do, sry
You should add your name to the MAINTAINERS file, too.
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
new file mode 100644
index 000..10cf111
+/***
*** + * Shared variables / local defines
+
**/ +/* LED */
+#defineEFIKAMX_LED_BLUE0x1
+#defineEFIKAMX_LED_GREEN 0x2
+#defineEFIKAMX_LED_RED 0x4
+
+void efikamx_toggle_led(uint32_t mask);
+
+/* Board revisions */
+#defineEFIKAMX_BOARD_REV_110x1
+#defineEFIKAMX_BOARD_REV_120x2
+#defineEFIKAMX_BOARD_REV_130x3
+#defineEFIKAMX_BOARD_REV_140x4
+
+/***
*** + * Board identification
+
**/ +static u32 board_rev;
+
+u32 get_efika_rev(void)
+{
+ u32 rev = 0;
+ /*
+* Retrieve board ID:
+* rev1.1: 1,1,1
^---spaces instead of tabs, please fix globally
Fixed in v2
+* rev1.2: 1,1,0
+* rev1.3: 1,0,1
+* rev1.4: 1,0,0
+*/
+ mxc_request_iomux(MX51_PIN_NANDF_CS0, IOMUX_CONFIG_GPIO);
+ mxc_gpio_direction(IOMUX_TO_GPIO(MX51_PIN_NANDF_CS0),
MXC_GPIO_DIRECTION_OUT);
Line too long, please fix globally.
DTTO
+ mxc_request_iomux(MX51_PIN_NANDF_RB3, IOMUX_CONFIG_GPIO);
+ mxc_iomux_set_pad(MX51_PIN_NANDF_RB3, PAD_CTL_100K_PU);
+ mxc_gpio_direction(IOMUX_TO_GPIO(MX51_PIN_NANDF_RB3),
MXC_GPIO_DIRECTION_IN); + rev |=
(!!mxc_gpio_get(IOMUX_TO_GPIO(MX51_PIN_NANDF_RB3))) 2;
Is it ok to leave the NAND pins configured as GPIO, or should they set
back for the NFC controller ?
I don't think there is even NAND used on efikamx. Though I might be mistaken.
+/***
*** + * SPI configuration
+
**/ +#ifdef CONFIG_MXC_SPI
Is there a reason why CONFIG_MXC_SPI is not set ? As I understand, it is
required to set the PMIC to make things working. If CONFIG_MXC_SPI,
something wrong happens. I would prefer you drop the #ifdef, and instead
of that you add a check at the beginning of the file reporting a
compiler error if CONFIG_MXC_SPI is not set.
I added compile-time check. Fixed in v2
+static void power_init(void)
+{
+ unsigned int val;
+ unsigned int reg;
+ struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE;
+
+ /* Write needed to Power Gate 2 register */
+ val = pmic_reg_read(REG_POWER_MISC);
+ val = ~PWGT2SPIEN;
+ pmic_reg_write(REG_POWER_MISC, val);
+
+ /* Externally powered */
+ val = pmic_reg_read(REG_CHARGE);
+ val |= ICHRG0 | ICHRG1 | ICHRG2 | ICHRG3 | CHGAUTOB;
+ pmic_reg_write(REG_CHARGE, val);
+
+ /* power up the system first */
+ pmic_reg_write(REG_POWER_MISC, PWUP);
+
+ /* NOTE: if (is_soc_rev(CHIP_REV_2_0) = 0) */
+
+ /* Set core voltage to 1.1V */
+ val = pmic_reg_read(REG_SW_0);
+ val = (val (~0x1F)) | 0x14;
Replace fix constants with defines, adding them to mc13892.h if they are
missing.
Is any sane datasheet for this thing available ? If so, can you link me to it
please?
+ pmic_reg_write(REG_SW_0, val);
+
+ /* Setup VCC (SW2) to 1.25 */
+ val = pmic_reg_read(REG_SW_1);
+ val = (val (~0x1F)) | 0x1A;
Ditto
+ /* Green LED */
+ mxc_request_iomux(MX51_PIN_CSI1_VSYNC, IOMUX_CONFIG_ALT3);
+ mxc_gpio_direction(IOMUX_TO_GPIO(MX51_PIN_CSI1_VSYNC),
[U-Boot] [PATCH 1/2 v2] BLOCK: Add freescale IMX51 PATA driver
Signed-off-by: Marek Vasut marek.va...@gmail.com
---
v2: Fixed line-too-long bugs as proposed by Stefano
drivers/block/Makefile |1 +
drivers/block/mxc_ata.c | 149 +++
2 files changed, 150 insertions(+), 0 deletions(-)
create mode 100644 drivers/block/mxc_ata.c
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index e27175b..aa7dc87 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -31,6 +31,7 @@ COBJS-$(CONFIG_FSL_SATA) += fsl_sata.o
COBJS-$(CONFIG_LIBATA) += libata.o
COBJS-$(CONFIG_CMD_MG_DISK) += mg_disk.o
COBJS-$(CONFIG_MVSATA_IDE) += mvsata_ide.o
+COBJS-$(CONFIG_MX51_PATA) += mxc_ata.o
COBJS-$(CONFIG_PATA_BFIN) += pata_bfin.o
COBJS-$(CONFIG_SATA_DWC) += sata_dwc.o
COBJS-$(CONFIG_SATA_SIL3114) += sata_sil3114.o
diff --git a/drivers/block/mxc_ata.c b/drivers/block/mxc_ata.c
new file mode 100644
index 000..842a633
--- /dev/null
+++ b/drivers/block/mxc_ata.c
@@ -0,0 +1,149 @@
+/*
+ * Freescale iMX51 ATA driver
+ *
+ * Copyright (C) 2010 Marek Vasut marek.va...@gmail.com
+ *
+ * Based on code by:
+ * Mahesh Mahadevan mahesh.mahade...@freescale.com
+ *
+ * Based on code from original FSL ATA driver, which is
+ * part of eCos, the Embedded Configurable Operating System.
+ * Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include command.h
+#include config.h
+#include asm/byteorder.h
+#include asm/io.h
+#include ide.h
+
+#include asm/arch/imx-regs.h
+#include asm/arch/clock.h
+
+/* MXC ATA register offsets */
+struct mxc_ata_config_regs {
+ u8 time_off; /* 0x00 */
+ u8 time_on;
+ u8 time_1;
+ u8 time_2w;
+ u8 time_2r;
+ u8 time_ax;
+ u8 time_pio_rdx;
+ u8 time_4;
+ u8 time_9;
+ u8 time_m;
+ u8 time_jn;
+ u8 time_d;
+ u8 time_k;
+ u8 time_ack;
+ u8 time_env;
+ u8 time_udma_rdx;
+ u8 time_zah; /* 0x10 */
+ u8 time_mlix;
+ u8 time_dvh;
+ u8 time_dzfs;
+ u8 time_dvs;
+ u8 time_cvh;
+ u8 time_ss;
+ u8 time_cyc;
+ u32 fifo_data_32; /* 0x18 */
+ u32 fifo_data_16;
+ u32 fifo_fill;
+ u32 ata_control;
+ u32 interrupt_pending;
+ u32 interrupt_enable;
+ u32 interrupt_clear;
+ u32 fifo_alarm;
+};
+
+struct mxc_data_hdd_regs {
+ u32 drive_data; /* 0xa0 */
+ u32 drive_features;
+ u32 drive_sector_count;
+ u32 drive_sector_num;
+ u32 drive_cyl_low;
+ u32 drive_cyl_high;
+ u32 drive_dev_head;
+ u32 command;
+ u32 status;
+ u32 alt_status;
+};
+
+/* PIO timing table */
+#defineNR_PIO_SPECS5
+static uint16_t pio_t0[NR_PIO_SPECS] = { 600, 383, 240, 180, 120 };
+static uint16_t pio_t1[NR_PIO_SPECS] = { 70, 50, 30, 30, 25 };
+static uint16_t pio_t2_8[NR_PIO_SPECS] = { 290, 290, 290, 80, 70 };
+static uint16_t pio_t2_16[NR_PIO_SPECS]= { 165, 125, 100, 80, 70 };
+static uint16_t pio_t2i[NR_PIO_SPECS] = { 40, 0, 0, 0, 0 };
+static uint16_t pio_t4[NR_PIO_SPECS] = { 30, 20, 15, 10, 10 };
+static uint16_t pio_t9[NR_PIO_SPECS] = { 20, 15, 10, 10, 10 };
+static uint16_t pio_tA[NR_PIO_SPECS] = { 50, 50, 50, 50, 50 };
+
+#defineREG2OFF(reg)uint32_t)reg) 0x3) * 8)
+static void set_ata_bus_timing(unsigned char mode)
+{
+ uint32_t val;
+ uint32_t T = 10 / mxc_get_clock(MXC_IPG_CLK);
+
+ struct mxc_ata_config_regs *ata_regs;
+ ata_regs = (struct mxc_ata_config_regs *)CONFIG_SYS_ATA_BASE_ADDR;
+
+ if (mode = NR_PIO_SPECS)
+ return;
+
+ /* Write TIME_OFF/ON/1/2W */
+ val = (3 REG2OFF(ata_regs-time_off)) |
+ (3 REG2OFF(ata_regs-time_on)) |
+ (((pio_t1[mode] + T) / T) REG2OFF(ata_regs-time_1)) |
+ (((pio_t2_8[mode] + T) / T) REG2OFF(ata_regs-time_2w));
+ writel(val, ata_regs-time_off);
+
+ /* Write TIME_2R/AX/RDX/4 */
+ val = (((pio_t2_8[mode]
[U-Boot] [PATCH 2/2] iMX5: EfikaMX: Preliminary board support
Supported: MMC IDE PMIC SPI flash LEDs I can boot the kernel supplied by freescale/genesi with this from MMC card and/or PATA disk. Signed-off-by: Marek Vasut marek.va...@gmail.com --- v2: Fixed line-too-long, MAINTAINERs etc. (I hope everything but the PMIC*) bugs as proposed by Stefano. As for the PMIC, other boards don't use any #defines for those constants either, which obviously doens't mean it's right. I'd like to take a peek into the MX13892 datasheet to properly name the values. Maybe I just mislooked on the FSL website. MAINTAINERS|1 + board/efikamx/Makefile | 52 board/efikamx/config.mk| 25 ++ board/efikamx/efikamx.c| 695 board/efikamx/imximage.cfg | 122 boards.cfg |1 + include/configs/efikamx.h | 232 +++ 7 files changed, 1128 insertions(+), 0 deletions(-) create mode 100644 board/efikamx/Makefile create mode 100644 board/efikamx/config.mk create mode 100644 board/efikamx/efikamx.c create mode 100644 board/efikamx/imximage.cfg create mode 100644 include/configs/efikamx.h diff --git a/MAINTAINERS b/MAINTAINERS index 553930a..64d031a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -824,6 +824,7 @@ Marek Vasut marek.va...@gmail.com palmtc xscale vpac270 xscale zipitz2 xscale + efikamx i.MX51 Hugo Villeneuve hugo.villene...@lyrtech.com diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile new file mode 100644 index 000..ee4a16e --- /dev/null +++ b/board/efikamx/Makefile @@ -0,0 +1,52 @@ +# +# Copyright (C) 2010, Marek Vasut marek.va...@gmail.com +# +# BASED ON: imx51evk +# +# Copyright (C) 2007, Guennadi Liakhovetski l...@denx.de +# +# (C) Copyright 2009 Freescale Semiconductor, Inc. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS := efikamx.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/efikamx/config.mk b/board/efikamx/config.mk new file mode 100644 index 000..6e90671 --- /dev/null +++ b/board/efikamx/config.mk @@ -0,0 +1,25 @@ +# +# Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +CONFIG_SYS_TEXT_BASE = 0x9780 +IMX_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/imximage.cfg +ALL += $(obj)u-boot.imx diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c new file mode 100644 index 000..677c169 --- /dev/null +++ b/board/efikamx/efikamx.c @@ -0,0 +1,695 @@ +/* + * Copyright (C) 2010 Marek Vasut marek.va...@gmail.com + * + * (C) Copyright 2009 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later
Re: [U-Boot] [PATCH 2/2] iMX5: EfikaMX: Work-in-progress board support
On 01/13/2011 06:15 PM, Marek Vasut wrote: + mxc_request_iomux(MX51_PIN_NANDF_RB3, IOMUX_CONFIG_GPIO); + mxc_iomux_set_pad(MX51_PIN_NANDF_RB3, PAD_CTL_100K_PU); + mxc_gpio_direction(IOMUX_TO_GPIO(MX51_PIN_NANDF_RB3), MXC_GPIO_DIRECTION_IN); + rev |= (!!mxc_gpio_get(IOMUX_TO_GPIO(MX51_PIN_NANDF_RB3))) 2; Is it ok to leave the NAND pins configured as GPIO, or should they set back for the NFC controller ? I don't think there is even NAND used on efikamx. Though I might be mistaken. Understood, then I agree to leave the iomux set with gpios. Replace fix constants with defines, adding them to mc13892.h if they are missing. Is any sane datasheet for this thing available ? If so, can you link me to it please? There is a datasheet, I do not know if you can consider it sane ;-) http://cache.freescale.com/files/analog/doc/data_sheet/MC13892.pdf?fpsp=1 The register description is quite spread in the manual. You can see the complete SPI Bitmap on pages 118-121. I have already set most constants in include/mc13892.h, probably there are some missing. +#define__io I think we have already discussed abot this define. Should it not move to another file, such as imx-regs.h ? Or is there a better solution ? The thread where we discussed this got deaf. I tried asking further, but no reply :-( Agree, I remember the issue, I do not remember any decision. Anyway, I think the position of this macro is wrong. It is related to the processor, that can have it or not, and it is not related to the board. I see that in u-boot __io is defined in board configuration file, but I do not think it is correct. At least I will suggest to move this define in the processor related file (--imx-regs.h). Cheers, Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [v3 patch 2/4] SMDK6400: Fix some label undefined in build error
Le 13/01/2011 14:36, seedshope a écrit : Modify Makefile for cpu_init.c and Start.s use some label,this defined u-boot.lds of arch/arm/cpu/arm1176. But SMDK6400 use the link script board/samsung/smdk6400/u-boot-nand.lds. So add some label form u-boot.lds to u-boot-nand.lds Signed-off-by: seedshopebocui...@gmail.com diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile b/arch/arm/cpu/arm1176/s3c64xx/Makefile index 0785b19..f4b9574 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/Makefile +++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile @@ -30,12 +30,15 @@ LIB = $(obj)lib$(SOC).o SOBJS = reset.o -COBJS-$(CONFIG_S3C6400) += cpu_init.o speed.o +COBJS-$(CONFIG_S3C6400) += speed.o COBJS-y += timer.o +CPUINIT = cpu_init.o + OBJS:= $(addprefix $(obj),$(SOBJS) $(COBJS-y)) +CPUINIT := $(addprefix $(obj),$(CPUINIT)) -all: $(obj).depend $(START) $(LIB) +all: $(obj).depend $(START) $(LIB) $(CPUINIT) $(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS)) Not sure I get what's the problem and how exactly this changes solves it. Can you detail this particular issue? Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Get access to these C level executives
Hi, Hope you are the right person to talk to on email list acquisition/ email campaigns. I know that you are into infrastructure solution space - where you provide virtualization solutions. As a global online marketing company we have an enormous database when it comes to Information Technology, the following are just to name a few and these list come with verified opt-in Business email addresses Database Users list - 721,000 Hardware (includes Server) Users list - 529,000 ERP Users list- 1,256,000 CRM Users list - 634,000 Network Users list - 638,000 This comprehensive targeted database carries full information of each user with Full Contact Name, Opt-in Business Email address, Phone number, Fax number, Mailing address, Job title, etc across US, EU, UK and Australia. If you are interested in targeting these prospects for Virtualization solution or Cloud Computing reply back with these details Target Users_ Target Title_ Target Geography __ Regards, Rachel Moore Marketing Advisor BM Online Inc, If you don't wish to receive our newsletters, reply back with STOP in the subject line ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Pull request: u-boot-imx
Le 13/01/2011 07:40, Stefano Babic a écrit : Hi Wolfgang, The following changes since commit cdc51c294ad33879c4e57edf4c9d2155381b1d59: Merge branch 'next' of ../next (2010-12-22 21:16:17 +0100) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master Applied to u-boot-arm/master, thanks. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] fsl_esdhc: Add the workaround for erratum ESDHC111 (enable on P4080)
On Jan 9, 2011, at 3:20 PM, Kumar Gala wrote: From: Jerry Huang chang-ming.hu...@freescale.com Do not issue a manual asynchronous CMD12. Instead, use a (software) synchronous CMD12 or AUTOCMD12 to abort data transfer. Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com Signed-off-by: Roy Zang tie-fei.z...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- arch/powerpc/cpu/mpc85xx/cmd_errata.c |5 - drivers/mmc/fsl_esdhc.c | 10 +- include/configs/P4080DS.h |4 +++- 3 files changed, 16 insertions(+), 3 deletions(-) applied - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] fsl_esdhc: Add the workaround for erratum ESDHC135 (enable on P4080)
On Jan 9, 2011, at 3:20 PM, Kumar Gala wrote: From: Roy Zang tie-fei.z...@freescale.com The default value of the SRS, VS18 and VS30 and ADMAS fields in the host controller capabilities register (HOSTCAPBLT) are incorrect. The default of these bits should be zero instead of one. Clear these bits out when we read HOSTCAPBLT. Signed-off-by: Roy Zang tie-fei.z...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- arch/powerpc/cpu/mpc85xx/cmd_errata.c |3 +++ drivers/mmc/fsl_esdhc.c |5 + include/configs/P4080DS.h |1 + 3 files changed, 9 insertions(+), 0 deletions(-) applied - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] fsl_esdhc: Add the workaround for erratum ESDHC136 (enable on P4080)
On Jan 9, 2011, at 3:20 PM, Kumar Gala wrote: From: Roy Zang tie-fei.z...@freescale.com False multi-bit ECC errors will be reported by the eSDHC buffer which can trigger a reset request. We disable all ECC error checking on SDHC. Signed-off-by: Roy Zang tie-fei.z...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- arch/powerpc/cpu/mpc85xx/cmd_errata.c |3 +++ arch/powerpc/cpu/mpc85xx/cpu_init.c | 10 +- include/configs/P4080DS.h |1 + 3 files changed, 13 insertions(+), 1 deletions(-) applied - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] powerpc/8xxx: Move fsl_is_spd() into generic 8xxx ddr code
On Jan 9, 2011, at 2:27 PM, Kumar Gala wrote: Move the parsing of hwconfig to determine if to use spd into common code so we can share it across all boards instead of duplicating it everywhere. Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- arch/powerpc/cpu/mpc8xxx/ddr/options.c | 22 +- arch/powerpc/include/asm/fsl_ddr_sdram.h |3 ++- board/freescale/corenet_ds/ddr.c | 18 ++ 3 files changed, 25 insertions(+), 18 deletions(-) applied - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/85xx: Bump up the CONFIG_SYS_BOOTM_LEN to 16M on FSL 85xx boards
On Jan 11, 2011, at 12:44 AM, Kumar Gala wrote: CONFIG_SYS_BOOTMAPSZ has been 16M on these boards for some time so we should also allow the kernel image to be up to 16M decompressed. Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- include/configs/MPC8536DS.h |3 ++- include/configs/MPC8540ADS.h |3 ++- include/configs/MPC8541CDS.h |3 ++- include/configs/MPC8544DS.h |3 ++- include/configs/MPC8548CDS.h |3 ++- include/configs/MPC8555CDS.h |3 ++- include/configs/MPC8560ADS.h |3 ++- include/configs/MPC8568MDS.h |3 ++- include/configs/MPC8569MDS.h |6 +++--- include/configs/MPC8572DS.h |3 ++- include/configs/P1022DS.h|3 ++- include/configs/P1_P2_RDB.h |3 ++- include/configs/P2020DS.h|3 ++- include/configs/corenet_ds.h |3 ++- 14 files changed, 29 insertions(+), 16 deletions(-) applied - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] powerpc/85xx: Add the workaround for erratum CPC-A003 (enable on P4080)
On Jan 13, 2011, at 1:58 AM, Kumar Gala wrote: CoreNet Platform Cache single-bit data error scrubbing will cause data corruption. Disable the feature to workaround the issue. Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- arch/powerpc/cpu/mpc85xx/cmd_errata.c |3 +++ arch/powerpc/cpu/mpc85xx/cpu_init.c |3 +++ arch/powerpc/include/asm/immap_85xx.h |1 + include/configs/P4080DS.h |1 + 4 files changed, 8 insertions(+), 0 deletions(-) applied - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] powerpc/85xx: Add the workaround for erratum CPC-A002 (enable on P4080)
On Jan 13, 2011, at 1:58 AM, Kumar Gala wrote: CoreNet Platform Cache single-bit tag error scrubbing will cause tag corruption. Disable the feature to workaround the issue. Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- arch/powerpc/cpu/mpc85xx/cmd_errata.c |3 +++ arch/powerpc/cpu/mpc85xx/cpu_init.c |4 arch/powerpc/include/asm/immap_85xx.h |3 ++- include/configs/P4080DS.h |1 + 4 files changed, 10 insertions(+), 1 deletions(-) applied - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/85xx: Add the workaround for erratum ELBC-A001 (enable on P4080)
On Jan 13, 2011, at 3:07 AM, Kumar Gala wrote: Simultaneous FCM and GPCM or UPM operation may erroneously trigger bus monitor timeout. Set timeout to maximum to avoid. Based on a patch from Lan Chunhe b25...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- arch/powerpc/cpu/mpc85xx/cmd_errata.c |3 +++ arch/powerpc/cpu/mpc8xxx/fsl_lbc.c|7 ++- arch/powerpc/include/asm/fsl_lbc.h|4 +++- include/configs/P4080DS.h |1 + 4 files changed, 13 insertions(+), 2 deletions(-) applied - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [v3 patch 4/4] SMDK6400: Fix SMDK6400 SDRAM init
Dear seedshope,
On 13 January 2011 22:36, seedshope bocui...@gmail.com wrote:
Since SDRAM init function have already change, So the SDRAM
initial function must be change.
Signed-off-by: seedshope bocui...@gmail.com
diff --git a/board/samsung/smdk6400/smdk6400.c
b/board/samsung/smdk6400/smdk6400.c
index 35aa40b..043d553 100644
--- a/board/samsung/smdk6400/smdk6400.c
+++ b/board/samsung/smdk6400/smdk6400.c
@@ -78,10 +78,18 @@ int board_init(void)
return 0;
}
-int dram_init(void)
+void dram_init_banksize(void)
{
+ DECLARE_GLOBAL_DATA_PTR;
Please move it to out of function.
+
gd-bd-bi_dram[0].start = PHYS_SDRAM_1;
gd-bd-bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+int dram_init(void)
+{
+ gd-ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, \
Please remove \.
+ PHYS_SDRAM_1_SIZE);
return 0;
}
--
1.7.1
Thanks
Minkyu Kang
--
from. prom.
www.promsoft.net
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Re: [U-Boot] uboot load ftb
Dear Scott Wood 2011/1/13 Scott Wood scottw...@freescale.com: On Wed, 12 Jan 2011 09:00:52 +0100 Wolfgang Denk w...@denx.de wrote: Dear =?UTF-8?B?5byg5oms?=, In message AANLkTinUx-NmpundBm=scYeahCkBAd9=dx8b3ro7g...@mail.gmail.com you wrote: i trying to sue the kernel's Makefile rule, but the issue is not solved. WARNING: could not set linux,stdout-path FDT_ERR_NOTFOUND. ERROR: /chosen node create failed - must RESET the board to recover. Well, seems your device tree has some problem. My guess is it's an old U-Boot that can't create properties in /chosen if /chosen doesn't already exist. i use lastest version of u-boot, booting process gives the error. but i use u-boot-1.3.0 that's ok. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-mpc85xx.git
The following changes since commit c6b734f5aea2ba75caaa1929f7e649ecda8d2f31: Merge branch 'master' of git://git.denx.de/u-boot-sh (2011-01-12 23:59:53 +0100) are available in the git repository at: git://git.denx.de/u-boot-mpc85xx master Becky Bruce (9): socrates: rename sdram_setup fixed_sdram() mpc8569mds: Remove unnecessary CONFIG_SYS_LBC_SDRAM_BASE definition MPC8568/MPC8569: Remove CONFIG_DDR_DLL define tqm85xx: create fixed_sdram() to do sdram setup mpc85xx/tlb.c: Allow platforms to specify wimge bits mpc85xx boards: initdram() cleanup/bugfix mpc85xx: rename sdram_init() lbc_sdram_init() 85xx boards: Rename CONFIG_DDR_DLL to CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN MPC8xxx DDR: align informational prints Chenhui Zhao (1): fsl_esdhc: Fix esdhc disabled problem on some platforms Jerry Huang (1): fsl_esdhc: Add the workaround for erratum ESDHC111 (enable on P4080) Kumar Gala (46): powerpc/85xx: Removed support for ATUM8548 board powerpc/85xx: Removed support for MPC8540EVAL board powerpc/85xx: Remove support for PM854/PM856 boards powerpc/85xx: Add support for booting from NAND on MPC8572DS powerpc/85xx: Replace CONFIG_SYS_HAS_SERDES with a weak function powerpc/85xx: Create a SERDES section in Makefile powerpc/86xx: Add SERDES support on MPC8641 MPC8610 powerpc/85xx: Add is_serdes_configured() support for P2020 SERDES powerpc/85xx: Add is_serdes_configured() support for MPC8572 SERDES powerpc/85xx: Add is_serdes_configured() support for MPC8548 SERDES powerpc/85xx: Add is_serdes_configured() support for MPC8568 SERDES powerpc/85xx: Add is_serdes_configured() support for MPC8569 SERDES powerpc/85xx: Add is_serdes_configured() support for MPC8544 SERDES powerpc/85xx: Add is_serdes_configured() support for P1021 SERDES powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured powerpc/85xx: Cleanup SGMII detection and reporting powerpc/85xx: Fix bug in dcache_disable powerpc/fsl-pci: Determine pci_controller based on cfg addr for dts fixup powerpc/fsl-pci: Add generic code to setup PCIe controllers powerpc/85xx: Rework MPC8572DS pci_init_board to use common FSL PCIe code powerpc/85xx: Rework P2020DS pci_init_board to use common FSL PCIe code powerpc/85xx: Rework MPC8544DS pci_init_board to use common FSL PCIe code powerpc/85xx: Rework MPC8536DS pci_init_board to use common FSL PCIe code powerpc/86xx: Rework MPC8641HPCN pci_init_board to use common FSL PCIe code powerpc/85xx: Rework MPC8548CDS pci_init_board to use common FSL PCIe code powerpc/8xxx: Rework XES boards pci_init_board to use common FSL PCIe code powerpc/85xx: Rework TQM boards pci_init_board to use common FSL PCIe code powerpc/85xx: Rework MPC8568MDS pci_init_board to use common FSL PCIe code powerpc/85xx: Rework MPC8569MDS pci_init_board to use common FSL PCIe code powerpc/85xx: Rework P1_P2_RDB pci_init_board to use common FSL PCIe code powerpc/86xx: Rework MPC8610HPCD pci_init_board to use common FSL PCIe code powerpc/86xx: Rework SBC8641 pci_init_board to use common FSL PCIe code powerpc/85xx: Rework SBC8548 pci_init_board to use common FSL PCIe code powerpc/85xx: Rework corenet_ds pci_init_board to use common FSL PCIe code powerpc/8xxx: Refactor SRIO initialization into common code powerpc/85xx: Convert MPC8548CDS to use common SRIO init code powerpc/85xx: Convert MPC8568MDS to use common SRIO init code powerpc/85xx: Convert MPC8569MDS to use common SRIO init code powerpc/86xx: Enable common SRIO init code powerpc/86xx: Convert MPC8641HPCN to use common SRIO init code powerpc/86xx: Convert SBC8641 to use common SRIO init code powerpc/8xxx: Move fsl_is_spd() into generic 8xxx ddr code powerpc/85xx: Bump up the CONFIG_SYS_BOOTM_LEN to 16M on FSL 85xx boards powerpc/85xx: Add the workaround for erratum CPC-A002 (enable on P4080) powerpc/85xx: Add the workaround for erratum CPC-A003 (enable on P4080) powerpc/85xx: Add the workaround for erratum ELBC-A001 (enable on P4080) Li Yang (1): powerpc/85xx: Add SRIO support to P2020DS Paul Gortmaker (1): MPC8xxx: Update maintainer entry for Wind River sbc8xxx boards Peter Tyser (1): fsl_pci: Update PCIe boot ouput Piergiorgio Beruto (1): powerpc/85xx: Fix wrong SVR value for MPC8567 and MPC8567E processors Roy Zang (2): fsl_esdhc: Add the workaround for erratum ESDHC135 (enable on P4080) fsl_esdhc: Add the workaround for erratum ESDHC136 (enable on P4080) MAINTAINERS| 17 +- README | 18 + arch/powerpc/cpu/mpc85xx/Makefile | 18 +- arch/powerpc/cpu/mpc85xx/cmd_errata.c | 24 +-
