[U-Boot] [PATCH v2 0/3] Make tzpc initialization common for exynos4 and exynos5
The first patch moves the tzpc_init file from smdk5250 to armv7/exynos. The second makes tzpc_init common for exynos4 and exynos5. And the third makes necessary changes to exynos4 based origen and smdkv310 boards. The patchset has been tested on exynos4 based origen and exynos5 based Arndale board. Changes in v2: - removed uninitialised warning for start and end variables - corrected the SPL_TEXT_BASE for origen and smdkv310 - Added Chander's Acked-by Inderpal Singh (3): exynos: move tzpc_init to armv7/exynos exynos: update tzpc_init to make it common for exynos4 and exynos5 exynos: Update origen and smdkv310 to use common tzpc_init arch/arm/cpu/armv7/exynos/Makefile |2 +- arch/arm/cpu/armv7/exynos/tzpc_init.c | 57 + arch/arm/cpu/armv7/s5p-common/Makefile |2 ++ arch/arm/include/asm/arch-exynos/tzpc.h | 28 +++ board/samsung/origen/lowlevel_init.S| 44 ++- board/samsung/origen/origen_setup.h | 25 - board/samsung/smdk5250/Makefile |1 - board/samsung/smdk5250/lowlevel_init.S |2 ++ board/samsung/smdk5250/setup.h | 25 - board/samsung/smdk5250/tzpc_init.c | 48 - board/samsung/smdkv310/lowlevel_init.S | 60 ++- include/configs/exynos5250-dt.h |2 -- include/configs/origen.h|2 ++ include/configs/smdkv310.h |2 ++ spl/Makefile|4 +++ 15 files changed, 102 insertions(+), 202 deletions(-) create mode 100644 arch/arm/cpu/armv7/exynos/tzpc_init.c delete mode 100644 board/samsung/smdk5250/tzpc_init.c -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/3] exynos: move tzpc_init to armv7/exynos
tzpc_init is common for all exynos5 boards, hence move it to
armv7/exynos so that all other boards can use it.
Also update the smdk5250 Makefile and config file.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Acked-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/cpu/armv7/exynos/Makefile |2 +-
arch/arm/cpu/armv7/exynos/tzpc_init.c | 48 +++
arch/arm/include/asm/arch-exynos/tzpc.h | 28 ++
board/samsung/smdk5250/Makefile |1 -
board/samsung/smdk5250/setup.h | 25
board/samsung/smdk5250/tzpc_init.c | 48 ---
include/configs/exynos5250-dt.h |2 --
7 files changed, 77 insertions(+), 77 deletions(-)
create mode 100644 arch/arm/cpu/armv7/exynos/tzpc_init.c
delete mode 100644 board/samsung/smdk5250/tzpc_init.c
diff --git a/arch/arm/cpu/armv7/exynos/Makefile
b/arch/arm/cpu/armv7/exynos/Makefile
index 9119961..b9cf921 100644
--- a/arch/arm/cpu/armv7/exynos/Makefile
+++ b/arch/arm/cpu/armv7/exynos/Makefile
@@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
-COBJS += clock.o power.o soc.o system.o pinmux.o
+COBJS += clock.o power.o soc.o system.o pinmux.o tzpc_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/exynos/tzpc_init.c
b/arch/arm/cpu/armv7/exynos/tzpc_init.c
new file mode 100644
index 000..81adb4b
--- /dev/null
+++ b/arch/arm/cpu/armv7/exynos/tzpc_init.c
@@ -0,0 +1,48 @@
+/*
+ * Lowlevel setup for SMDK5250 board based on S5PC520
+ *
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include asm/arch/tzpc.h
+#include asm/io.h
+
+/* Setting TZPC[TrustZone Protection Controller] */
+void tzpc_init(void)
+{
+ struct exynos_tzpc *tzpc;
+ unsigned int addr;
+
+ for (addr = TZPC0_BASE; addr = TZPC9_BASE; addr += TZPC_BASE_OFFSET) {
+ tzpc = (struct exynos_tzpc *)addr;
+
+ if (addr == TZPC0_BASE)
+ writel(R0SIZE, tzpc-r0size);
+
+ writel(DECPROTXSET, tzpc-decprot0set);
+ writel(DECPROTXSET, tzpc-decprot1set);
+
+ if (addr != TZPC9_BASE) {
+ writel(DECPROTXSET, tzpc-decprot2set);
+ writel(DECPROTXSET, tzpc-decprot3set);
+ }
+ }
+}
diff --git a/arch/arm/include/asm/arch-exynos/tzpc.h
b/arch/arm/include/asm/arch-exynos/tzpc.h
index c5eb4b1..050ad70 100644
--- a/arch/arm/include/asm/arch-exynos/tzpc.h
+++ b/arch/arm/include/asm/arch-exynos/tzpc.h
@@ -47,6 +47,34 @@ struct exynos_tzpc {
unsigned int pcellid2;
unsigned int pcellid3;
};
+
+/* TZPC : Register Offsets */
+#define TZPC0_BASE 0x1010
+#define TZPC1_BASE 0x1011
+#define TZPC2_BASE 0x1012
+#define TZPC3_BASE 0x1013
+#define TZPC4_BASE 0x1014
+#define TZPC5_BASE 0x1015
+#define TZPC6_BASE 0x1016
+#define TZPC7_BASE 0x1017
+#define TZPC8_BASE 0x1018
+#define TZPC9_BASE 0x1019
+
+#define TZPC_BASE_OFFSET 0x1
+
+/*
+ * TZPC Register Value :
+ * R0SIZE: 0x0 : Size of secured ram
+ */
+#define R0SIZE 0x0
+
+/*
+ * TZPC Decode Protection Register Value :
+ * DECPROTXSET: 0xFF : Set Decode region to non-secure
+ */
+#define DECPROTXSET0xFF
+void tzpc_init(void);
+
#endif
#endif
diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile
index ecca9f3..f2c32ee 100644
--- a/board/samsung/smdk5250/Makefile
+++ b/board/samsung/smdk5250/Makefile
@@ -28,7 +28,6 @@ SOBJS := lowlevel_init.o
COBJS := clock_init.o
COBJS += dmc_common.o dmc_init_ddr3.o
-COBJS += tzpc_init.o
COBJS += smdk5250_spl.o
ifndef CONFIG_SPL_BUILD
diff --git a/board/samsung/smdk5250/setup.h b/board/samsung/smdk5250/setup.h
index a159601..8c1a3f4 100644
--- a/board/samsung/smdk5250/setup.h
+++ b/board/samsung/smdk5250/setup.h
@@ -28,18 +28,6 @@
#include config.h
#include asm/arch/dmc.h
-/* TZPC :
[U-Boot] [PATCH v2 2/3] exynos: update tzpc_init to make it common for exynos4 and exynos5
This requires that cpu_is_exynos4/5 should be made available before tzpc_init.
Hence this patch also makes necessary changes to have cpu_info in spl and
invokes arch_cpu_init before tzpc_init in low_level_init.S for smdk5250.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Acked-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/cpu/armv7/exynos/tzpc_init.c | 15 ---
arch/arm/cpu/armv7/s5p-common/Makefile |2 ++
board/samsung/smdk5250/lowlevel_init.S |2 ++
spl/Makefile |4
4 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/tzpc_init.c
b/arch/arm/cpu/armv7/exynos/tzpc_init.c
index 81adb4b..5204fb1 100644
--- a/arch/arm/cpu/armv7/exynos/tzpc_init.c
+++ b/arch/arm/cpu/armv7/exynos/tzpc_init.c
@@ -22,6 +22,7 @@
* MA 02111-1307 USA
*/
+#include common.h
#include asm/arch/tzpc.h
#include asm/io.h
@@ -29,12 +30,20 @@
void tzpc_init(void)
{
struct exynos_tzpc *tzpc;
- unsigned int addr;
+ unsigned int addr, start = 0, end = 0;
- for (addr = TZPC0_BASE; addr = TZPC9_BASE; addr += TZPC_BASE_OFFSET) {
+ if (cpu_is_exynos5()) {
+ start = TZPC0_BASE;
+ end = TZPC9_BASE;
+ } else if (cpu_is_exynos4()) {
+ start = TZPC1_BASE;
+ end = TZPC6_BASE;
+ }
+
+ for (addr = start; addr = end; addr += TZPC_BASE_OFFSET) {
tzpc = (struct exynos_tzpc *)addr;
- if (addr == TZPC0_BASE)
+ if (addr == start)
writel(R0SIZE, tzpc-r0size);
writel(DECPROTXSET, tzpc-decprot0set);
diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile
b/arch/arm/cpu/armv7/s5p-common/Makefile
index 1705399..0c38bd0 100644
--- a/arch/arm/cpu/armv7/s5p-common/Makefile
+++ b/arch/arm/cpu/armv7/s5p-common/Makefile
@@ -26,9 +26,11 @@ include $(TOPDIR)/config.mk
LIB= $(obj)libs5p-common.o
COBJS-y+= cpu_info.o
+ifndef CONFIG_SPL_BUILD
COBJS-y+= timer.o
COBJS-y+= sromc.o
COBJS-$(CONFIG_PWM)+= pwm.o
+endif
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
diff --git a/board/samsung/smdk5250/lowlevel_init.S
b/board/samsung/smdk5250/lowlevel_init.S
index bc6cb6f..edc565e 100644
--- a/board/samsung/smdk5250/lowlevel_init.S
+++ b/board/samsung/smdk5250/lowlevel_init.S
@@ -75,12 +75,14 @@ lowlevel_init:
bl mem_ctrl_init
1:
+ bl arch_cpu_init
bl tzpc_init
ldmia r13!, {ip,pc}
wakeup_reset:
bl system_clock_init
bl mem_ctrl_init
+ bl arch_cpu_init
bl tzpc_init
exit_wakeup:
diff --git a/spl/Makefile b/spl/Makefile
index 101d478..8d33210 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -92,6 +92,10 @@ LIBS-y += arch/$(ARCH)/cpu/tegra-common/libcputegra-common.o
LIBS-y += $(CPUDIR)/tegra-common/libtegra-common.o
endif
+ifeq ($(SOC),exynos)
+LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o
+endif
+
# Add GCC lib
ifeq ($(USE_PRIVATE_LIBGCC), yes)
PLATFORM_LIBGCC = $(SPLTREE)/arch/$(ARCH)/lib/libgcc.o
--
1.7.9.5
___
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[U-Boot] [PATCH v2 3/3] exynos: Update origen and smdkv310 to use common tzpc_init
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Acked-by: Chander Kashyap chander.kash...@linaro.org
---
board/samsung/origen/lowlevel_init.S | 44 ++-
board/samsung/origen/origen_setup.h| 25 -
board/samsung/smdkv310/lowlevel_init.S | 60 ++--
include/configs/origen.h |2 ++
include/configs/smdkv310.h |2 ++
5 files changed, 8 insertions(+), 125 deletions(-)
diff --git a/board/samsung/origen/lowlevel_init.S
b/board/samsung/origen/lowlevel_init.S
index 9daa0da..be9d418 100644
--- a/board/samsung/origen/lowlevel_init.S
+++ b/board/samsung/origen/lowlevel_init.S
@@ -87,12 +87,14 @@ lowlevel_init:
1:
/* for UART */
bl uart_asm_init
+ bl arch_cpu_init
bl tzpc_init
pop {pc}
wakeup_reset:
bl system_clock_init
bl mem_ctrl_asm_init
+ bl arch_cpu_init
bl tzpc_init
exit_wakeup:
@@ -353,45 +355,3 @@ uart_asm_init:
nop
nop
-/* Setting TZPC[TrustZone Protection Controller] */
-tzpc_init:
- ldr r0, =TZPC0_BASE
- mov r1, #R0SIZE
- str r1, [r0]
- mov r1, #DECPROTXSET
- str r1, [r0, #TZPC_DECPROT0SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT1SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT2SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT3SET_OFFSET]
-
- ldr r0, =TZPC1_BASE
- str r1, [r0, #TZPC_DECPROT0SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT1SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT2SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT3SET_OFFSET]
-
- ldr r0, =TZPC2_BASE
- str r1, [r0, #TZPC_DECPROT0SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT1SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT2SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT3SET_OFFSET]
-
- ldr r0, =TZPC3_BASE
- str r1, [r0, #TZPC_DECPROT0SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT1SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT2SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT3SET_OFFSET]
-
- ldr r0, =TZPC4_BASE
- str r1, [r0, #TZPC_DECPROT0SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT1SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT2SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT3SET_OFFSET]
-
- ldr r0, =TZPC5_BASE
- str r1, [r0, #TZPC_DECPROT0SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT1SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT2SET_OFFSET]
- str r1, [r0, #TZPC_DECPROT3SET_OFFSET]
-
- mov pc, lr
diff --git a/board/samsung/origen/origen_setup.h
b/board/samsung/origen/origen_setup.h
index 930b948..926a4cc 100644
--- a/board/samsung/origen/origen_setup.h
+++ b/board/samsung/origen/origen_setup.h
@@ -121,19 +121,6 @@
#define UBRDIV_OFFSET 0x28
#define UFRACVAL_OFFSET0x2C
-/* TZPC : Register Offsets */
-#define TZPC0_BASE 0x1011
-#define TZPC1_BASE 0x1012
-#define TZPC2_BASE 0x1013
-#define TZPC3_BASE 0x1014
-#define TZPC4_BASE 0x1015
-#define TZPC5_BASE 0x1016
-
-#define TZPC_DECPROT0SET_OFFSET0x804
-#define TZPC_DECPROT1SET_OFFSET0x810
-#define TZPC_DECPROT2SET_OFFSET0x81C
-#define TZPC_DECPROT3SET_OFFSET0x828
-
/* CLK_SRC_CPU */
#define MUX_HPM_SEL_MOUTAPLL 0x0
#define MUX_HPM_SEL_SCLKMPLL 0x1
@@ -617,16 +604,4 @@
* UBRFRACVAL = 800MHz*10/(115200*16) -10))%10)*16/10)
*/
#define UFRACVAL_VAL 0x4
-
-/*
- * TZPC Register Value :
- * R0SIZE: 0x0 : Size of secured ram
- */
-#define R0SIZE 0x0
-
-/*
- * TZPC Decode Protection Register Value :
- * DECPROTXSET: 0xFF : Set Decode region to non-secure
- */
-#define DECPROTXSET0xFF
#endif
diff --git a/board/samsung/smdkv310/lowlevel_init.S
b/board/samsung/smdkv310/lowlevel_init.S
index 7a1ea98..31e0e2e 100644
--- a/board/samsung/smdkv310/lowlevel_init.S
+++ b/board/samsung/smdkv310/lowlevel_init.S
@@ -85,12 +85,14 @@ lowlevel_init:
1:
/* for UART */
bl uart_asm_init
+ bl arch_cpu_init
bl tzpc_init
pop {pc}
wakeup_reset:
bl system_clock_init
bl mem_ctrl_asm_init
+ bl arch_cpu_init
bl tzpc_init
exit_wakeup:
@@ -410,61 +412,3 @@ uart_asm_init:
nop
nop
nop
-
-/* Setting TZPC[TrustZone Protection Controller] */
-tzpc_init:
- ldr r0, =0x1011
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str r1, [r0, #0x081C]
- str r1, [r0, #0x0828]
-
- ldr r0, =0x1012
- mov r1, #0x0
- str r1, [r0]
- mov r1, #0xff
- str r1, [r0, #0x0804]
- str r1, [r0, #0x0810]
- str
Re: [U-Boot] TI's OMAPL138 and KSZ8876 switch on u-boot
Hi Andy, On Thu, 14 Mar 2013 23:55:14 +, Andy Ng andreas2...@gmail.com wrote: Hello I am trying to get a u-boot going on OMAPL138 with three port switch KSZ8873FL, that has one MII port attached to the OMAP and two 10/100BASE-FX transceivers. Up to now, the ARP packets are going out and received by the host when doing a tftp download, but the return packets from the host don't get to the EMAC MII port. Do I need to perform any configuration on KSZ8873 over I2C or MII in order to get it going? The u-boot has support for KSZ8873 but it is hard to find which board has make use of it. Any ideas how to make the KSZ8873FL going with the u-boot? Apparently there is very little code referring to this switch, and none that configures it. Your question would be best answered with the KSZ8873FL datasheet, to see how this switch is configured by default. Also, you should compare your hardware's eth and switch configuration to that of U-boot-supported davinci boards known to use the KSZ8873. Kind regards, Andreas Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1] DOS_PBR block type is also valid dos block type.
Hi Stephen, On Fri, Mar 15, 2013 at 1:10 PM, Stephen Warren swar...@wwwdotorg.org wrote: On 03/11/2013 08:59 PM, Sonic Zhang wrote: Hi Stephen, On Tue, Mar 12, 2013 at 1:28 AM, Stephen Warren swar...@wwwdotorg.org wrote: On 03/11/2013 03:56 AM, sonic@gmail.com wrote: From: Sonic Zhang sonic.zh...@analog.com - Should return 0 for both DOS_MBR and DOS_PBR block types in test_part_dos(). What problem does this solve? I don't believe this change is correct. The purpose of test_part_dos() is to determine whether a block device contains an MS-DOS partition table. Such a partition table is present in an MBR, but not a PBR. A PBR contains a *FAT file-system, and does not include a partition table. The SD card formated by windows 7 into one FAT partition can't be initialized correct in u-boot function init_part() after you reuse the function test_block_type() in function test_part_dos(). So, files on that partition can't be displayed when running command fatls mmc 0. The only difference in your change is to mark dos partition with flag DOS_PBR invalid. Thanks for sending me the disk image. The image is a mess; it's been manipulated by a variety of tools at different times that have left rather a lot of cruft there. The first sector does appear to be an actual MBR, containing a single partition starting at LBA 0x10 (byte offset 0x2000), and quite large in size. At LBA 0x10, I do see what may be the start of a FAT16 file-system. So far, so good. However, the partition table contains the string FAT32 at 0x52, and also the string mkdosfs at 0x03. I believe that in the past, mkdosfs was used on this card to create a raw FAT filesystem without any partition table. Then later, some partitioning tool was run to create the partition I mentioned above. Finally you said that Windows was used to create the FAT filesystem within the partition. However, the partitioning tool didn't wipe out the region of the MBR that contains the boot code, and hence didn't wipe out the FAT32 filesystem signature. Finally, in LBA 3 (byte offset 0x600), I see another sector that looks remarkably like the start of a (presumably long-gone) FAT filesystem. Perhaps an old partition table on this device contained a partition that started in this (non-cylinder-aligned) sector. This sector contains the same mkdosfs and FAT32 signatures. If we take your patch, we end up with the following situation: With your strange partition table: ls mmc 0 ls mmc 0:auto - Thinks there's a partition table, so works, and picks partition 1. ls mmc 0:0 - Explicit request for partition 0 (whole-disk). This option doesn't make sense here, since the whole-disk is not a file-system, but rather a partitioned device. With a real raw FAT filesystem; no partitions: ls mmc 0 ls mmc 0:auto - Thinks there's a partition table, so tries to access a non- existent partition table entryrather than the whole disk, so automatic mode fails. ls mmc 0:0 - Explicit request for partition 0 (whole-disk), so works. So the issue is that the automatic handling of raw FAT filesystems (i.e. use of the entire disk rather than the first partition) fails with your patch. Perhaps it's acceptable that people with raw FAT filesystems must explicitly specify :0 to access the whole disk, and we accept that automatic mode won't work? I'll let Tom or Wolfgang make the call. As far as I can tell, the Linux kernel never looks at the FAT or FAT32 strings in the MBR, and hence accepts your disk as having a partition table. And since in Linux you must always use a specific device (/dev/sda or /dev/sdaN), this issue doesn't arise. U-Boot's automatic partition-or-whole-device selection is something Linux doesn't do. One other thing to note: commands such as mmc part or part list won't work for your disk. After my patch d1efb64 disk: part_dos: don't claim whole-disk FAT filesystems, if test_block_type()!=DOS_MBR (i.e. in your case), then print_partition_extended() will simply print an error. Before that patch, if test_block_type()==DOS_PBR (i.e. in your case) then print_partition_extended() would print a fake partition table entry that covered the whole disk. Neither action is correct for your disk since it imagine that there was a raw FAT filesystem covering the entire disk. In other words, U-Boot's partition table printing commands never worked correctly on your disk, even if accessing the file-system (accidentally?) used to! Another solution here is for you to simply: # Back up your MBR in case something goes wrong. dd if=/dev/whatever of=backup.bin bs=1 count=512 # Zero out the boot code portion of your MBR, # which will also zero out the false FAT32 signature. dd if=/dev/zero of=/dev/whatever bs=1 count=446 conv=notrunc Alternatively, if there's still some command in Windows that will install a regular MS-DOS/Windows MBR boot code
[U-Boot] [PATCH] am335x: Enable DDR PHY dynamic power down bit for DDR3 boards
Enable DDR PHY dynamic power down bit, which enables
powering down the IO receiver when not performing read.
This also helps in reducing overall power consumption in
low power states (suspend/standby).
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Satyanarayana, Sandhya sandhya.satyanaray...@ti.com
Cc: Tom Rini tr...@ti.com
---
arch/arm/include/asm/arch-am33xx/ddr_defs.h |1 +
board/ti/am335x/board.c |6 --
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index ae43ef8..7ab3baf 100644
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -28,6 +28,7 @@
#define VTP_CTRL_START_EN (0x1)
#define PHY_DLL_LOCK_DIFF 0x0
#define DDR_CKE_CTRL_NORMAL0x1
+#define PHY_EN_DYN_PWRDN (0x1 20)
/* Micron MT47H128M16RT-25E */
#define MT47H128M16RT25E_EMIF_READ_LATENCY 0x15
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 48e6896..22d7b25 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -251,7 +251,8 @@ static struct emif_regs ddr3_emif_reg_data = {
.sdram_tim2 = MT41J128MJT125_EMIF_TIM2,
.sdram_tim3 = MT41J128MJT125_EMIF_TIM3,
.zq_config = MT41J128MJT125_ZQ_CFG,
- .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY,
+ .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY |
+ PHY_EN_DYN_PWRDN,
};
static struct emif_regs ddr3_evm_emif_reg_data = {
@@ -261,7 +262,8 @@ static struct emif_regs ddr3_evm_emif_reg_data = {
.sdram_tim2 = MT41J512M8RH125_EMIF_TIM2,
.sdram_tim3 = MT41J512M8RH125_EMIF_TIM3,
.zq_config = MT41J512M8RH125_ZQ_CFG,
- .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY,
+ .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY |
+ PHY_EN_DYN_PWRDN,
};
#endif
--
1.7.0.4
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Re: [U-Boot] [PATCH] arm: Correct CONFIG_STANDALONE_LOAD_ADDR for AM33XX/OMAP* platforms
Tom == Tom Rini tr...@ti.com writes: Tom All of these platforms have memory starting at 0x8000, so this is Tom the correct CONFIG_STANDALONE_LOAD_ADDR for all of them. For am33xx atleast: Acked-by: Peter Korsgaard jac...@sunsite.dk Tom Signed-off-by: Tom Rini tr...@ti.com Tom --- Tom arch/arm/config.mk |2 +- Tom 1 file changed, 1 insertion(+), 1 deletion(-) Tom diff --git a/arch/arm/config.mk b/arch/arm/config.mk Tom index 24b9d7c..71035e2 100644 Tom --- a/arch/arm/config.mk Tom +++ b/arch/arm/config.mk Tom @@ -24,7 +24,7 @@ Tom CROSS_COMPILE ?= arm-linux- Tom ifndef CONFIG_STANDALONE_LOAD_ADDR Tom -ifeq ($(SOC),omap3) Tom +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) Tom CONFIG_STANDALONE_LOAD_ADDR = 0x8030 Tom else Tom CONFIG_STANDALONE_LOAD_ADDR = 0xc10 Tom -- Tom 1.7.9.5 Tom ___ Tom U-Boot mailing list Tom U-Boot@lists.denx.de Tom http://lists.denx.de/mailman/listinfo/u-boot -- Bye, Peter Korsgaard ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/4 v6] Exynos: Add hardware accelerated SHA256 and SHA1
SHA-256 and SHA-1 accelerated using ACE hardware.
Signed-off-by: ARUN MANKUZHI aru...@samsung.com
Signed-off-by: Akshay Saraswat aksha...@samsung.com
---
Changes since v1:
- Moved code to drivers/crypto.
- Fixed few other nits.
Changes since v2:
- Added falling back to software sha256 in case length exceeds buffer
limit.
- Reduced one tab at lines 533, 559 and 571 in this patch.
- Removed space after a cast at line 506 in this patch.
- Removed blank line at line 561 in this patch.
- Removed space before semicolon at line 576 in this patch.
Changes since v3:
- Removed buffer limit since there are 2 regs for address
hash_msg_size_high and low.
That means buffer length could go upto 2^64 bits which is practically
- Removed falling back to software sha256 because there is no buffer
limit.
- Removed / 4 to sha1 and sha256 lengths and added increment to 4 in
for
loop at line 573.
- Timed out still kept to be 100 ms since this is enough for hardware
to switch
status to idle from busy.
In case it couldn't that means h/w is faulty.
Changes since v4:
- Added include for clk.h.
- Added define for MAX_FREQ.
- Added timeout calculation as per frequency.
- Changed i+=4 to i++ and len to len/4 in for loop at line 591
in this patch.
- Added two new functions ace_sha256 and ace_sha1.
Changes since v5:
- Removed ace_sha.h.
- Renamed ace_sfr.h as ace_sha.h.
- Removed timeout and checking for PRNG_ERROR bit in HASH_STATUS
register.
PRNG_ERROR bit high means setup was not done properly. Since there is
no
way to detect faulty h/w, we consider the possible fact that h/w
should
not be able to setup feed properly if it's faulty.
- Renamed function name ace_sha256 to hw_sha256 and ace_sha1 to hw_sha1.
Makefile | 1 +
arch/arm/include/asm/arch-exynos/ace_sha.h | 327 +
arch/arm/include/asm/arch-exynos/cpu.h | 4 +
drivers/crypto/Makefile| 47 +
drivers/crypto/ace_sha.c | 129
5 files changed, 508 insertions(+)
create mode 100644 arch/arm/include/asm/arch-exynos/ace_sha.h
create mode 100644 drivers/crypto/Makefile
create mode 100644 drivers/crypto/ace_sha.c
diff --git a/Makefile b/Makefile
index fc18dd4..4c41130 100644
--- a/Makefile
+++ b/Makefile
@@ -272,6 +272,7 @@ LIBS-y += disk/libdisk.o
LIBS-y += drivers/bios_emulator/libatibiosemu.o
LIBS-y += drivers/block/libblock.o
LIBS-$(CONFIG_BOOTCOUNT_LIMIT) += drivers/bootcount/libbootcount.o
+LIBS-y += drivers/crypto/libcrypto.o
LIBS-y += drivers/dma/libdma.o
LIBS-y += drivers/fpga/libfpga.o
LIBS-y += drivers/gpio/libgpio.o
diff --git a/arch/arm/include/asm/arch-exynos/ace_sha.h
b/arch/arm/include/asm/arch-exynos/ace_sha.h
new file mode 100644
index 000..259f3d9
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/ace_sha.h
@@ -0,0 +1,327 @@
+/*
+ * Header file for Advanced Crypto Engine - SFR definitions
+ *
+ * Copyright (c) 2012 Samsung Electronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ACE_SHA_H
+#define __ACE_SHA_H
+
+struct exynos_ace_sfr {
+ unsigned intfc_intstat; /* base + 0 */
+ unsigned intfc_intenset;
+ unsigned intfc_intenclr;
+ unsigned intfc_intpend;
+ unsigned intfc_fifostat;
+ unsigned intfc_fifoctrl;
+ unsigned intfc_global;
+ unsigned intres1;
+ unsigned intfc_brdmas;
+ unsigned intfc_brdmal;
+ unsigned intfc_brdmac;
+ unsigned intres2;
+ unsigned intfc_btdmas;
+ unsigned intfc_btdmal;
+ unsigned intfc_btdmac;
+ unsigned intres3;
+ unsigned intfc_hrdmas;
+ unsigned intfc_hrdmal;
+ unsigned intfc_hrdmac;
+ unsigned intres4;
+ unsigned intfc_pkdmas;
+ unsigned intfc_pkdmal;
+ unsigned intfc_pkdmac;
+ unsigned intfc_pkdmao;
+ unsigned char res5[0x1a0];
+
+ unsigned intaes_control;/* base + 0x200 */
+ unsigned int
[U-Boot] [PATCH 2/4 v6] Exynos: config: Enable ACE HW for SHA 256 for Exynos
This enables SHA 256 for exynos. Signed-off-by: ARUN MANKUZHI aru...@samsung.com Signed-off-by: Akshay Saraswat aksha...@samsung.com Acked-by: Simon Glass s...@chromium.org --- Changes since v1: - Removed not required config. Changes sice v2: - Added SHA1 in the comment for config. Changes sice v3: - Added Acked-by: Simon Glass s...@chromium.org. Changes sice v4: - None. Changes sice v5: - None. include/configs/exynos5250-dt.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index f334d45..9b15bf3 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -45,6 +45,9 @@ /* Keep L2 Cache Disabled */ #define CONFIG_SYS_DCACHE_OFF +/* Enable ACE acceleration for SHA1 and SHA256 */ +#define CONFIG_EXYNOS_ACE_SHA + #define CONFIG_SYS_SDRAM_BASE 0x4000 #define CONFIG_SYS_TEXT_BASE 0x43E0 -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/4 v6] Add ACE HW support for SHA256 and SHA1
This patch set adds hardware acceleration for SHA 256 with the help of ACE. Changes since v1: - Patch-1: Fixed few nits. - Patch-2: Removed not required config. - Patch-3: Added sha256 to hash command instead of new sha256 command. Changes since v2: - Patch-1: - Added falling back to software sha256 in case length exceeds buffer limit. - Reduced one tab at lines 533, 559 and 571 in the patch. - Removed space after a cast at line 506 in the patch. - Removed blank line at line 561 in the patch. - Removed space before semicolon at line 576 in the patch. - Patch-2: - Added SHA1 in the comment for config. - Patch-3: - Added new nodes for SHA1 and SHA256 in struct hash_algo for the case when ACE is enabled. - Added new declaration for function pointer hash_func_ws with different return type. - Patch-4: - New patch to enable config for hash command. Changes since v3: - Patch-1: - Removed buffer limit since there are 2 regs for address hash_msg_size_high and low. That means buffer length could go upto 2^64 bits which is practically - Removed falling back to software sha256 because there is no buffer limit. - Removed / 4 to sha1 and sha256 lengths and added increment to 4 in for loop at line 573. - Timed out still kept to be 100 ms since this is enough for hardware to switch status to idle from busy. In case it couldn't that means h/w is faulty. - Patch-2: - Added Acked-by: Simon Glass s...@chromium.org. - Patch-3: - New patch. - Patch-4: - Changed command names to lower case in algo struct. - Added generic ace_sha config. - Patch-5: Added acked-by Simon Glass - Added new generic config for ace_sha to enable ace support in hash.c. Changes since v4: - Patch-1: - Added include for clk.h. - Added define for MAX_FREQ. - Added timeout calculation as per frequency. - Changed i+=4 to i++ and len to len/4 in for loop at line 591 in this patch. - Added two new functions ace_sha256 and ace_sha1. - Patch-2: None. - Patch-3: - Changed function names in struct algo. - Replaced ACE_SHA_TYPE to CHUNSZ in struct algo. - Patch-4: Added Acked-by: Simon Glass s...@chromium.org. Changes since v5: - Patch-1: - Removed ace_sha.h. - Renamed ace_sfr.h as ace_sha.h. - Removed timeout and checking for PRNG_ERROR bit in HASH_STATUS register. PRNG_ERROR bit high means setup was not done properly. Since there is no way to detect faulty h/w, we consider the possible fact that h/w should not be able to setup feed properly if it's faulty. - Renamed function name ace_sha256 to hw_sha256 and ace_sha1 to hw_sha1. - Patch-2: None. - Patch-3: - Added file hw_sha.h. - Changed CONFIG_ACE_SHA to CONFIG_SHA_HW_ACCEL. - Renamed function names ace_sha1 and ace_sha256 to hw_sha1 and hw_sha256 respectively. - Patch-4: - Removed Acked-by: Simon Glass s...@chromium.org because of a change. - Changed CONFIG_ACE_SHA to CONFIG_SHA_HW_ACCEL. Akshay Saraswat (4): Exynos: Add hardware accelerated SHA256 and SHA1 Exynos: config: Enable ACE HW for SHA 256 for Exynos gen: Add sha h/w acceleration to hash Exynos: config: Enable hash command Makefile | 1 + arch/arm/include/asm/arch-exynos/ace_sha.h | 327 + arch/arm/include/asm/arch-exynos/cpu.h | 4 + common/hash.c | 14 ++ drivers/crypto/Makefile| 47 + drivers/crypto/ace_sha.c | 129 include/configs/exynos5250-dt.h| 5 + include/hw_sha.h | 50 + 8 files changed, 577 insertions(+) create mode 100644 arch/arm/include/asm/arch-exynos/ace_sha.h create mode 100644 drivers/crypto/Makefile create mode 100644 drivers/crypto/ace_sha.c create mode 100644 include/hw_sha.h -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/4 v6] Exynos: config: Enable hash command
This enables hash command. Tested with command hash sha256 0x40008000 0x2B 0x40009000. Used mm and md to write a standard string to memory location 0x40008000 and ran the above command to verify the output. Signed-off-by: ARUN MANKUZHI aru...@samsung.com Signed-off-by: Akshay Saraswat aksha...@samsung.com --- Changes since v2: - New patch to enable config for hash command. Changes since v3: - Added new generic config for ace_sha to enable ace support in hash.c. Changes since v4: - Added Acked-by: Simon Glass s...@chromium.org. Changes since v5: - Removed Acked-by: Simon Glass s...@chromium.org because of a change. - Changed CONFIG_ACE_SHA to CONFIG_SHA_HW_ACCEL. include/configs/exynos5250-dt.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 9b15bf3..8d361fa 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -47,6 +47,7 @@ /* Enable ACE acceleration for SHA1 and SHA256 */ #define CONFIG_EXYNOS_ACE_SHA +#define CONFIG_SHA_HW_ACCEL #define CONFIG_SYS_SDRAM_BASE 0x4000 #define CONFIG_SYS_TEXT_BASE 0x43E0 @@ -116,6 +117,7 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT #define CONFIG_CMD_NET +#define CONFIG_CMD_HASH #define CONFIG_BOOTDELAY 3 #define CONFIG_ZERO_BOOTDELAY_CHECK -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/4 v6] gen: Add sha h/w acceleration to hash
Adding H/W acceleration support to hash which can be used
to test SHA 256 hash algorithm.
Signed-off-by: ARUN MANKUZHI aru...@samsung.com
Signed-off-by: Akshay Saraswat aksha...@samsung.com
---
Changes since v1:
- Added sha256 support to hash command instead of new sha256 command.
Changes sice v2:
- Added new nodes for SHA1 and SHA256 in struct hash_algo for the case
when ACE is enabled.
- Added new declaration for function pointer hash_func_ws with
different return type.
Changes sice v3:
- Changed command names to lower case in algo struct.
- Added generic ace_sha config.
Changes sice v4:
- Changed function names in struct algo.
- Replaced ACE_SHA_TYPE to CHUNSZ in struct algo.
Changes sice v5:
- Added file hw_sha.h.
- Changed CONFIG_ACE_SHA to CONFIG_SHA_HW_ACCEL.
- Renamed function names ace_sha1 and ace_sha256 to hw_sha1 and
hw_sha256 respectively.
common/hash.c| 14 ++
include/hw_sha.h | 50 ++
2 files changed, 64 insertions(+)
create mode 100644 include/hw_sha.h
diff --git a/common/hash.c b/common/hash.c
index e3a6e43..23b1334 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -28,12 +28,26 @@
#include hash.h
#include sha1.h
#include sha256.h
+#include hw_sha.h
/*
* These are the hash algorithms we support. Chips which support accelerated
* crypto could perhaps add named version of these algorithms here.
*/
static struct hash_algo hash_algo[] = {
+#ifdef CONFIG_SHA_HW_ACCEL
+ {
+ sha1,
+ SHA1_SUM_LEN,
+ hw_sha1,
+ CHUNKSZ_SHA1,
+ }, {
+ sha256,
+ SHA256_SUM_LEN,
+ hw_sha256,
+ CHUNKSZ_SHA256,
+ },
+#endif
#ifdef CONFIG_SHA1
{
SHA1,
diff --git a/include/hw_sha.h b/include/hw_sha.h
new file mode 100644
index 000..565e5a0
--- /dev/null
+++ b/include/hw_sha.h
@@ -0,0 +1,50 @@
+/*
+ * Header file for SHA hardware acceleration
+ *
+ * Copyright (c) 2012 Samsung Electronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+#ifndef __HW_SHA_H
+#define __HW_SHA_H
+
+
+/**
+ * Computes hash value of input pbuf using h/w acceleration
+ *
+ * @param in_addr A pointer to the input buffer
+ * @param bufleni Byte length of input buffer
+ * @param out_addr A pointer to the output buffer. When complete
+ * 32 bytes are copied to pout[0]...pout[31]. Thus, a user
+ * should allocate at least 32 bytes at pOut in advance.
+ * @param chunk_size chunk size for sha256
+ */
+void hw_sha256(const uchar *in_addr, uint buflen,
+ uchar *out_addr, uint chunk_size);
+
+/**
+ * Computes hash value of input pbuf using h/w acceleration
+ *
+ * @param in_addr A pointer to the input buffer
+ * @param bufleni Byte length of input buffer
+ * @param out_addr A pointer to the output buffer. When complete
+ * 32 bytes are copied to pout[0]...pout[31]. Thus, a user
+ * should allocate at least 32 bytes at pOut in advance.
+ * @param chunk_size chunk_size for sha1
+ */
+void hw_sha1(const uchar *in_addr, uint buflen,
+ uchar *out_addr, uint chunk_size);
+#endif
--
1.8.0
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[U-Boot] [PATCH] arm: at91: at91sam9n12ek: add nandflash/spiflash/mmc/lcd support
This patch adds at91sam9n12ek support, it enables:
- dbgu
- nand with pmecc
- spi flash
- mmc
- lcd
TODO:
- usb
- ethernet
Signed-off-by: Josh Wu josh...@atmel.com
---
arch/arm/cpu/arm926ejs/at91/Makefile |1 +
arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c | 137 ++
arch/arm/cpu/arm926ejs/at91/clock.c|4 +-
arch/arm/include/asm/arch-at91/at91sam9_matrix.h |2 +
arch/arm/include/asm/arch-at91/at91sam9n12.h | 126 +
arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h | 17 +-
arch/arm/include/asm/arch-at91/hardware.h |2 +
board/atmel/at91sam9n12ek/Makefile | 52
board/atmel/at91sam9n12ek/at91sam9n12ek.c | 270
boards.cfg |3 +
drivers/spi/atmel_spi.c|3 +-
include/configs/at91sam9n12ek.h| 232 +
12 files changed, 843 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c
create mode 100644 arch/arm/include/asm/arch-at91/at91sam9n12.h
create mode 100644 board/atmel/at91sam9n12ek/Makefile
create mode 100644 board/atmel/at91sam9n12ek/at91sam9n12ek.c
create mode 100644 include/configs/at91sam9n12ek.h
diff --git a/arch/arm/cpu/arm926ejs/at91/Makefile
b/arch/arm/cpu/arm926ejs/at91/Makefile
index 346e58f..c4964a1 100644
--- a/arch/arm/cpu/arm926ejs/at91/Makefile
+++ b/arch/arm/cpu/arm926ejs/at91/Makefile
@@ -36,6 +36,7 @@ COBJS-$(CONFIG_AT91SAM9RL)+= at91sam9rl_devices.o
COBJS-$(CONFIG_AT91SAM9M10G45) += at91sam9m10g45_devices.o
COBJS-$(CONFIG_AT91SAM9G45)+= at91sam9m10g45_devices.o
COBJS-$(CONFIG_AT91SAM9X5) += at91sam9x5_devices.o
+COBJS-$(CONFIG_AT91SAM9N12)+= at91sam9n12_devices.o
COBJS-$(CONFIG_AT91_EFLASH)+= eflash.o
COBJS-$(CONFIG_AT91_LED) += led.o
COBJS-y += clock.o
diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c
b/arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c
new file mode 100644
index 000..5094262
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c
@@ -0,0 +1,137 @@
+/*
+ * (C) Copyright 2013 Atmel Corporation
+ * Josh Wu josh...@atmel.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/at91_common.h
+#include asm/arch/at91_pmc.h
+#include asm/arch/at91_pio.h
+
+unsigned int has_lcdc()
+{
+ return 1;
+}
+
+void at91_serial0_hw_init(void)
+{
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
+
+ at91_set_a_periph(AT91_PIO_PORTA, 0, 1);/* TXD0 */
+ at91_set_a_periph(AT91_PIO_PORTA, 1, 0);/* RXD0 */
+ writel(1 ATMEL_ID_USART0, pmc-pcer);
+}
+
+void at91_serial1_hw_init(void)
+{
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
+
+ at91_set_a_periph(AT91_PIO_PORTA, 5, 1);/* TXD1 */
+ at91_set_a_periph(AT91_PIO_PORTA, 6, 0);/* RXD1 */
+ writel(1 ATMEL_ID_USART1, pmc-pcer);
+}
+
+void at91_serial2_hw_init(void)
+{
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
+
+ at91_set_a_periph(AT91_PIO_PORTA, 7, 1);/* TXD2 */
+ at91_set_a_periph(AT91_PIO_PORTA, 8, 0);/* RXD2 */
+ writel(1 ATMEL_ID_USART2, pmc-pcer);
+}
+
+void at91_serial3_hw_init(void)
+{
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
+
+ at91_set_b_periph(AT91_PIO_PORTC, 22, 1); /* TXD3 */
+ at91_set_b_periph(AT91_PIO_PORTC, 23, 0); /* RXD3 */
+ writel(1 ATMEL_ID_USART3, pmc-pcer);
+}
+
+void at91_seriald_hw_init(void)
+{
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
+
+ at91_set_a_periph(AT91_PIO_PORTA, 9, 1);/* DRXD */
+ at91_set_a_periph(AT91_PIO_PORTA, 10, 0); /* DTXD */
+ writel(1 ATMEL_ID_SYS, pmc-pcer);
+}
+
+#ifdef CONFIG_ATMEL_SPI
+void at91_spi0_hw_init(unsigned long cs_mask)
+{
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
+
+ at91_set_a_periph(AT91_PIO_PORTA, 11, 1); /* SPI0_MISO */
+ at91_set_a_periph(AT91_PIO_PORTA, 12, 1);
[U-Boot] [PATCH 2/4 V3] EXYNOS5: FDT: Add serial device node values
This patch adds the device node required for serial driver
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- Changed the compatible string to samsung,exynos4210-uart
Changes in V3:
- Added a alias console as we will support one at any point of time.
arch/arm/dts/exynos5250.dtsi | 27 +++
board/samsung/dts/exynos5250-smdk5250.dts |2 ++
2 files changed, 29 insertions(+), 0 deletions(-)
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 61d35a8..9ab5f0d 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -156,4 +156,31 @@
reg = 0x1006 0x1;
};
+ serial@12C0 {
+ compatible = samsung,exynos4210-uart;
+ reg = 0x12C0 0x100;
+ interrupts = 0 51 0;
+ id = 0;
+ };
+
+ serial@12C1 {
+ compatible = samsung,exynos4210-uart;
+ reg = 0x12C1 0x100;
+ interrupts = 0 52 0;
+ id = 1;
+ };
+
+ serial@12C2 {
+ compatible = samsung,exynos4210-uart;
+ reg = 0x12C2 0x100;
+ interrupts = 0 53 0;
+ id = 2;
+ };
+
+ serial@12C3 {
+ compatible = samsung,exynos4210-uart;
+ reg = 0x12C3 0x100;
+ interrupts = 0 54 0;
+ id = 3;
+ };
};
diff --git a/board/samsung/dts/exynos5250-smdk5250.dts
b/board/samsung/dts/exynos5250-smdk5250.dts
index 1c2d52d..936ec12 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -30,6 +30,8 @@
spi2 = /spi@12d4;
spi3 = /spi@131a;
spi4 = /spi@131b;
+ serial0 = /serial@12C3;
+ console = /serial@12C3;
};
sromc@1225 {
--
1.7.4.4
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[U-Boot] [PATCH 4/4 V3] CONFIG: EXYNOS5: Enable silent console
This patch enables CONFIG_SILENT_CONSOLE for EXYNOS5. Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com Acked-by: Simon Glass s...@chromium.org --- Changes in V2: - None Changes in V3: - None include/configs/exynos5250-dt.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index f334d45..9fab0fb 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -85,6 +85,8 @@ stdout=serial,lcd\0 \ stderr=serial,lcd\0 +#define CONFIG_SILENT_CONSOLE + #define CONFIG_EXTRA_ENV_SETTINGS \ EXYNOS_DEVICE_SETTINGS -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/4] S5P: Serial: Add fdt support to driver
This patch adds FDT support to the serial s5p driver.
At present disabling the serial console (from the device tree) crashes
U-Boot. Add checks for this case, so that execution can continue without
a serial console.
It also enables the serial_s5p driver recognize the silent_console option.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Gabe Black gabebl...@google.com
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- None
Changes in V3:
- Moved driver config structure to data section.
- Changed silent_console to silent-console.
- Did put a check for base address before doing fdt decoding.
drivers/serial/serial_s5p.c | 78 +++
1 files changed, 78 insertions(+), 0 deletions(-)
diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c
index 3c41242..55ef2bf 100644
--- a/drivers/serial/serial_s5p.c
+++ b/drivers/serial/serial_s5p.c
@@ -24,16 +24,28 @@
#include common.h
#include linux/compiler.h
#include asm/io.h
+#include fdtdec.h
#include asm/arch/uart.h
#include asm/arch/clk.h
#include serial.h
DECLARE_GLOBAL_DATA_PTR;
+/* Information about a serial port */
+struct fdt_serial {
+ u32 base_addr; /* address of registers in physical memory */
+ u8 port_id; /* uart port number */
+ u8 enabled; /* 1 if enabled, 0 if disabled */
+} config __attribute__ ((section(.data)));
+
static inline struct s5p_uart *s5p_get_base_uart(int dev_index)
{
+#ifdef CONFIG_OF_CONTROL
+ return (struct s5p_uart *)(config.base_addr);
+#else
u32 offset = dev_index * sizeof(struct s5p_uart);
return (struct s5p_uart *)(samsung_get_base_uart() + offset);
+#endif
}
/*
@@ -69,6 +81,9 @@ void serial_setbrg_dev(const int dev_index)
u32 baudrate = gd-baudrate;
u32 val;
+ if (!config.enabled)
+ return;
+
val = uclk / baudrate;
writel(val / 16 - 1, uart-ubrdiv);
@@ -87,6 +102,16 @@ int serial_init_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
+#if defined(CONFIG_SILENT_CONSOLE) \
+ defined(CONFIG_OF_CONTROL) \
+ !defined(CONFIG_SPL_BUILD)
+ if (fdtdec_get_config_int(gd-fdt_blob, silent_console, 0))
+ gd-flags |= GD_FLG_SILENT;
+#endif
+
+ if (!config.enabled)
+ return 0;
+
/* reset and enable FIFOs, set triggers to the maximum */
writel(0, uart-ufcon);
writel(0, uart-umcon);
@@ -129,6 +154,9 @@ int serial_getc_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
+ if (!config.enabled)
+ return 0;
+
/* wait for character to arrive */
while (!(readl(uart-utrstat) 0x1)) {
if (serial_err_check(dev_index, 0))
@@ -145,6 +173,9 @@ void serial_putc_dev(const char c, const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
+ if (!config.enabled)
+ return;
+
/* wait for room in the tx FIFO */
while (!(readl(uart-utrstat) 0x2)) {
if (serial_err_check(dev_index, 1))
@@ -165,6 +196,9 @@ int serial_tstc_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
+ if (!config.enabled)
+ return 0;
+
return (int)(readl(uart-utrstat) 0x1);
}
@@ -207,8 +241,51 @@ DECLARE_S5P_SERIAL_FUNCTIONS(3);
struct serial_device s5p_serial3_device =
INIT_S5P_SERIAL_STRUCTURE(3, s5pser3);
+#ifdef CONFIG_OF_CONTROL
+int fdtdec_decode_console(int *index, struct fdt_serial *uart)
+{
+ const void *blob = gd-fdt_blob;
+ int node;
+
+ node = fdt_path_offset(blob, console);
+ if (node 0)
+ return node;
+
+ uart-base_addr = fdtdec_get_addr(blob, node, reg);
+ if (uart-base_addr == FDT_ADDR_T_NONE)
+ return -FDT_ERR_NOTFOUND;
+
+ uart-port_id = fdtdec_get_int(blob, node, id, -1);
+ uart-enabled = fdtdec_get_is_enabled(blob, node);
+
+ return 0;
+}
+#endif
+
__weak struct serial_device *default_serial_console(void)
{
+#ifdef CONFIG_OF_CONTROL
+ int index = 0;
+
+ if ((!config.base_addr) (fdtdec_decode_console(index, config))) {
+ debug(Cannot decode default console node\n);
+ return NULL;
+ }
+
+ if (config.port_id == 0)
+ return s5p_serial0_device;
+ else if (config.port_id == 1)
+ return s5p_serial1_device;
+ else if (config.port_id == 2)
+ return s5p_serial2_device;
+ else if (config.port_id == 3)
+ return s5p_serial3_device;
+ else
+ debug(Unknown config.port_id: %d, config.port_id);
+
+ return NULL;
+#else
+ config.enabled = 1;
#if
[U-Boot] [PATCH 0/4 V3] SMDK5250: FDT: Add device tree support for console
Enabled fdt support for default console on SMDK5250. Changes in V2: - Changed the compatible string to samsung,exynos4210-uart Changes in V3: - Rebased the patchset on latest u-boot-samsung branch. - Added a alias console as we will support one at any point of time. - Moved driver config structure to data section. - Changed silent_console to silent-console. - Did put a check for base address before doing fdt decoding. Rajeshwari Shinde (4): EXYNOS5: FDT: Add compatible strings for Serial EXYNOS5: FDT: Add serial device node values S5P: Serial: Add fdt support to driver CONFIG: EXYNOS5: Enable silent console arch/arm/dts/exynos5250.dtsi | 27 ++ board/samsung/dts/exynos5250-smdk5250.dts |2 + drivers/serial/serial_s5p.c | 79 + include/configs/exynos5250-dt.h |2 + include/fdtdec.h |1 + lib/fdtdec.c |1 + 6 files changed, 112 insertions(+), 0 deletions(-) -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/4 V3] EXYNOS5: FDT: Add compatible strings for Serial
Add required compatible information for s5p serial driver
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- Changed the compatible string to samsung,exynos4210-uart
Chnages in V3:
- Rebased on latest u-boot-samsung
include/fdtdec.h |1 +
lib/fdtdec.c |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 6552942..9f9cb4f 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -83,6 +83,7 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_EXYNOS_TMU, /* Exynos TMU */
COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
COMPAT_MAXIM_98095_CODEC, /* MAX98095 Codec */
+ COMPAT_SAMSUNG_EXYNOS5_SERIAL, /* Exynos5 UART */
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 88f6b68..ee98e0e 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -58,6 +58,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_EXYNOS_TMU, samsung,exynos-tmu),
COMPAT(MAXIM_MAX77686_PMIC, maxim,max77686_pmic),
COMPAT(MAXIM_98095_CODEC, maxim,max98095-codec),
+ COMPAT(SAMSUNG_EXYNOS5_SERIAL, samsung,exynos4210-uart),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
--
1.7.4.4
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[U-Boot] [PATCH 3/4 V3] S5P: Serial: Add fdt support to driver
This patch adds FDT support to the serial s5p driver.
At present disabling the serial console (from the device tree) crashes
U-Boot. Add checks for this case, so that execution can continue without
a serial console.
It also enables the serial_s5p driver recognize the silent_console option.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Gabe Black gabebl...@google.com
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- None
Changes in V3:
- Moved driver config structure to data section.
- Changed silent_console to silent-console.
- Did put a check for base address before doing fdt decoding.
drivers/serial/serial_s5p.c | 78 +++
1 files changed, 78 insertions(+), 0 deletions(-)
diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c
index 3c41242..55ef2bf 100644
--- a/drivers/serial/serial_s5p.c
+++ b/drivers/serial/serial_s5p.c
@@ -24,16 +24,28 @@
#include common.h
#include linux/compiler.h
#include asm/io.h
+#include fdtdec.h
#include asm/arch/uart.h
#include asm/arch/clk.h
#include serial.h
DECLARE_GLOBAL_DATA_PTR;
+/* Information about a serial port */
+struct fdt_serial {
+ u32 base_addr; /* address of registers in physical memory */
+ u8 port_id; /* uart port number */
+ u8 enabled; /* 1 if enabled, 0 if disabled */
+} config __attribute__ ((section(.data)));
+
static inline struct s5p_uart *s5p_get_base_uart(int dev_index)
{
+#ifdef CONFIG_OF_CONTROL
+ return (struct s5p_uart *)(config.base_addr);
+#else
u32 offset = dev_index * sizeof(struct s5p_uart);
return (struct s5p_uart *)(samsung_get_base_uart() + offset);
+#endif
}
/*
@@ -69,6 +81,9 @@ void serial_setbrg_dev(const int dev_index)
u32 baudrate = gd-baudrate;
u32 val;
+ if (!config.enabled)
+ return;
+
val = uclk / baudrate;
writel(val / 16 - 1, uart-ubrdiv);
@@ -87,6 +102,16 @@ int serial_init_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
+#if defined(CONFIG_SILENT_CONSOLE) \
+ defined(CONFIG_OF_CONTROL) \
+ !defined(CONFIG_SPL_BUILD)
+ if (fdtdec_get_config_int(gd-fdt_blob, silent_console, 0))
+ gd-flags |= GD_FLG_SILENT;
+#endif
+
+ if (!config.enabled)
+ return 0;
+
/* reset and enable FIFOs, set triggers to the maximum */
writel(0, uart-ufcon);
writel(0, uart-umcon);
@@ -129,6 +154,9 @@ int serial_getc_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
+ if (!config.enabled)
+ return 0;
+
/* wait for character to arrive */
while (!(readl(uart-utrstat) 0x1)) {
if (serial_err_check(dev_index, 0))
@@ -145,6 +173,9 @@ void serial_putc_dev(const char c, const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
+ if (!config.enabled)
+ return;
+
/* wait for room in the tx FIFO */
while (!(readl(uart-utrstat) 0x2)) {
if (serial_err_check(dev_index, 1))
@@ -165,6 +196,9 @@ int serial_tstc_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
+ if (!config.enabled)
+ return 0;
+
return (int)(readl(uart-utrstat) 0x1);
}
@@ -207,8 +241,51 @@ DECLARE_S5P_SERIAL_FUNCTIONS(3);
struct serial_device s5p_serial3_device =
INIT_S5P_SERIAL_STRUCTURE(3, s5pser3);
+#ifdef CONFIG_OF_CONTROL
+int fdtdec_decode_console(int *index, struct fdt_serial *uart)
+{
+ const void *blob = gd-fdt_blob;
+ int node;
+
+ node = fdt_path_offset(blob, console);
+ if (node 0)
+ return node;
+
+ uart-base_addr = fdtdec_get_addr(blob, node, reg);
+ if (uart-base_addr == FDT_ADDR_T_NONE)
+ return -FDT_ERR_NOTFOUND;
+
+ uart-port_id = fdtdec_get_int(blob, node, id, -1);
+ uart-enabled = fdtdec_get_is_enabled(blob, node);
+
+ return 0;
+}
+#endif
+
__weak struct serial_device *default_serial_console(void)
{
+#ifdef CONFIG_OF_CONTROL
+ int index = 0;
+
+ if ((!config.base_addr) (fdtdec_decode_console(index, config))) {
+ debug(Cannot decode default console node\n);
+ return NULL;
+ }
+
+ if (config.port_id == 0)
+ return s5p_serial0_device;
+ else if (config.port_id == 1)
+ return s5p_serial1_device;
+ else if (config.port_id == 2)
+ return s5p_serial2_device;
+ else if (config.port_id == 3)
+ return s5p_serial3_device;
+ else
+ debug(Unknown config.port_id: %d, config.port_id);
+
+ return NULL;
+#else
+ config.enabled = 1;
#if
Re: [U-Boot] [PATCH 3/4] S5P: Serial: Add fdt support to driver
Please ignore this mail.
Sorry for spamming
On Fri, Mar 15, 2013 at 4:08 PM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
This patch adds FDT support to the serial s5p driver.
At present disabling the serial console (from the device tree) crashes
U-Boot. Add checks for this case, so that execution can continue without
a serial console.
It also enables the serial_s5p driver recognize the silent_console option.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Gabe Black gabebl...@google.com
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- None
Changes in V3:
- Moved driver config structure to data section.
- Changed silent_console to silent-console.
- Did put a check for base address before doing fdt decoding.
drivers/serial/serial_s5p.c | 78
+++
1 files changed, 78 insertions(+), 0 deletions(-)
diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c
index 3c41242..55ef2bf 100644
--- a/drivers/serial/serial_s5p.c
+++ b/drivers/serial/serial_s5p.c
@@ -24,16 +24,28 @@
#include common.h
#include linux/compiler.h
#include asm/io.h
+#include fdtdec.h
#include asm/arch/uart.h
#include asm/arch/clk.h
#include serial.h
DECLARE_GLOBAL_DATA_PTR;
+/* Information about a serial port */
+struct fdt_serial {
+ u32 base_addr; /* address of registers in physical memory */
+ u8 port_id; /* uart port number */
+ u8 enabled; /* 1 if enabled, 0 if disabled */
+} config __attribute__ ((section(.data)));
+
static inline struct s5p_uart *s5p_get_base_uart(int dev_index)
{
+#ifdef CONFIG_OF_CONTROL
+ return (struct s5p_uart *)(config.base_addr);
+#else
u32 offset = dev_index * sizeof(struct s5p_uart);
return (struct s5p_uart *)(samsung_get_base_uart() + offset);
+#endif
}
/*
@@ -69,6 +81,9 @@ void serial_setbrg_dev(const int dev_index)
u32 baudrate = gd-baudrate;
u32 val;
+ if (!config.enabled)
+ return;
+
val = uclk / baudrate;
writel(val / 16 - 1, uart-ubrdiv);
@@ -87,6 +102,16 @@ int serial_init_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
+#if defined(CONFIG_SILENT_CONSOLE) \
+ defined(CONFIG_OF_CONTROL) \
+ !defined(CONFIG_SPL_BUILD)
+ if (fdtdec_get_config_int(gd-fdt_blob, silent_console, 0))
+ gd-flags |= GD_FLG_SILENT;
+#endif
+
+ if (!config.enabled)
+ return 0;
+
/* reset and enable FIFOs, set triggers to the maximum */
writel(0, uart-ufcon);
writel(0, uart-umcon);
@@ -129,6 +154,9 @@ int serial_getc_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
+ if (!config.enabled)
+ return 0;
+
/* wait for character to arrive */
while (!(readl(uart-utrstat) 0x1)) {
if (serial_err_check(dev_index, 0))
@@ -145,6 +173,9 @@ void serial_putc_dev(const char c, const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
+ if (!config.enabled)
+ return;
+
/* wait for room in the tx FIFO */
while (!(readl(uart-utrstat) 0x2)) {
if (serial_err_check(dev_index, 1))
@@ -165,6 +196,9 @@ int serial_tstc_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
+ if (!config.enabled)
+ return 0;
+
return (int)(readl(uart-utrstat) 0x1);
}
@@ -207,8 +241,51 @@ DECLARE_S5P_SERIAL_FUNCTIONS(3);
struct serial_device s5p_serial3_device =
INIT_S5P_SERIAL_STRUCTURE(3, s5pser3);
+#ifdef CONFIG_OF_CONTROL
+int fdtdec_decode_console(int *index, struct fdt_serial *uart)
+{
+ const void *blob = gd-fdt_blob;
+ int node;
+
+ node = fdt_path_offset(blob, console);
+ if (node 0)
+ return node;
+
+ uart-base_addr = fdtdec_get_addr(blob, node, reg);
+ if (uart-base_addr == FDT_ADDR_T_NONE)
+ return -FDT_ERR_NOTFOUND;
+
+ uart-port_id = fdtdec_get_int(blob, node, id, -1);
+ uart-enabled = fdtdec_get_is_enabled(blob, node);
+
+ return 0;
+}
+#endif
+
__weak struct serial_device *default_serial_console(void)
{
+#ifdef CONFIG_OF_CONTROL
+ int index = 0;
+
+ if ((!config.base_addr) (fdtdec_decode_console(index, config))) {
+ debug(Cannot decode default console node\n);
+ return NULL;
+ }
+
+ if (config.port_id == 0)
+ return s5p_serial0_device;
+ else if (config.port_id == 1)
+ return s5p_serial1_device;
+ else if (config.port_id == 2)
+
Re: [U-Boot] [PATCH v7] Introduced btrfs file-system with btrload command
Hi On 15/03/13 00:00, Simon Glass wrote: Hi, On Thu, Mar 14, 2013 at 5:35 AM, Adnan Ali adnan@codethink.co.uk wrote: Introduces btrfs file-system to read file from volume/sub-volumes with btrload command. This implementation has read-only support. This btrfs implementation is based on syslinux btrfs code, commit 269ebc845ebc8b46ef4b0be7fa0005c7fdb95b8d. v7: patch re-formated. v6: patch re-formated. v5: merged with master. v4: btrls command added. Signed-off-by: Adnan Ali adnan@codethink.co.uk This is close enough I think. You shouldn't have 'char' return values on the fs.h interface functions, and no blank line after 'return'. I will leave it to Tom to see if he is happy with the command parameters. Thanks. Acked-by: Simon Glass s...@chromium.org Thanks ;) --- Makefile |1 + common/Makefile|1 + common/cmd_btr.c | 65 +++ fs/btrfs/Makefile | 51 ++ fs/btrfs/btrfs.c | 1357 fs/fs.c| 10 + include/btrfs.h| 416 ++ include/config_fallbacks.h |4 + include/crc.h |8 + include/fs.h |1 + lib/Makefile |1 + lib/crc32_c.c | 40 ++ 12 files changed, 1955 insertions(+) create mode 100644 common/cmd_btr.c create mode 100644 fs/btrfs/Makefile create mode 100644 fs/btrfs/btrfs.c create mode 100644 include/btrfs.h create mode 100644 lib/crc32_c.c Thanks Adnan Ali ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Bug in clock settings for SMDK5250
There's a bug in system_clock_init() function (board\samsung\smdk5250\clock_init.c) where APLL, MPLL, BPLL, etc. clocks are set: while (readl(clk-bpll_con0) BPLL_CON0_LOCKED) ; This should be while (!(readl(clk-bpll_con0) BPLL_CON0_LOCKED)) ; -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ARM: AM33XX: Fix typo that causes an AM duplication in CPU name.
From: Enric Balletbo i Serra eballe...@iseebcn.com Just fix a typo displaying the CPU info. With CONFIG_DISPLAY_INFO we see something like AMAM335X-GP rev 0 instead of AM335X-GP rev 0. Signed-off-by: Enric Balletbo i Serra eballe...@iseebcn.com --- arch/arm/cpu/armv7/am33xx/sys_info.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/am33xx/sys_info.c b/arch/arm/cpu/armv7/am33xx/sys_info.c index 507b618..db99e95 100644 --- a/arch/arm/cpu/armv7/am33xx/sys_info.c +++ b/arch/arm/cpu/armv7/am33xx/sys_info.c @@ -120,7 +120,7 @@ int print_cpuinfo(void) sec_s = ?; } - printf(AM%s-%s rev %d\n, + printf(%s-%s rev %d\n, cpu_s, sec_s, get_cpu_rev()); /* TODO: Print ARM and DDR frequencies */ -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: AM33XX: Fix typo that causes an AM duplication in CPU name.
On Fri, Mar 15, 2013 at 12:35 PM, Enric Balletbo i Serra eballe...@gmail.com wrote: From: Enric Balletbo i Serra eballe...@iseebcn.com Just fix a typo displaying the CPU info. With CONFIG_DISPLAY_INFO we see something like AMAM335X-GP rev 0 instead of AM335X-GP rev 0. Signed-off-by: Enric Balletbo i Serra eballe...@iseebcn.com --- arch/arm/cpu/armv7/am33xx/sys_info.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/am33xx/sys_info.c b/arch/arm/cpu/armv7/am33xx/sys_info.c index 507b618..db99e95 100644 --- a/arch/arm/cpu/armv7/am33xx/sys_info.c +++ b/arch/arm/cpu/armv7/am33xx/sys_info.c @@ -120,7 +120,7 @@ int print_cpuinfo(void) sec_s = ?; } - printf(AM%s-%s rev %d\n, + printf(%s-%s rev %d\n, cpu_s, sec_s, get_cpu_rev()); /* TODO: Print ARM and DDR frequencies */ -- Hi Enric, Looks good to me Reviewed-by: Javier Martinez Canillas jav...@dowhile0.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 0/3] i.MX6 SabreSD and SabreAUTO bmode support
This adds the bmode support for i.MX6 SabreSD and SabreAUTO
boards. This allows user to choose the boot mode at runtime making it
easy to boot from USB or other media.
Changes in v4:
- Fix switch code to proper break (Stefano)
Changes in v3:
- Drop change in bootdelay; the change where done by me while testing
it and I mistakenly included it.
Changes in v2:
- Rework code to use a 'ret' variable (Fabio)
- Improve commit log
Otavio Salvador (3):
mx6qsabresd: Fix card detection for invalid card id case
mx6qsabresd: Document the mapping of USDHC[2-4]
mx6qsabre{sd,auto}: Add boot mode select
board/freescale/mx6qsabreauto/mx6qsabreauto.c | 17
board/freescale/mx6qsabresd/mx6qsabresd.c | 38 ---
include/configs/mx6qsabre_common.h| 2 ++
3 files changed, 53 insertions(+), 4 deletions(-)
--
1.8.1
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[U-Boot] [PATCH v4 2/3] mx6qsabresd: Document the mapping of USDHC[2-4]
This documents the SD card identifier so it is easier for user to spot
which card number will be used, if need.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Improve commit log
board/freescale/mx6qsabresd/mx6qsabresd.c | 4
1 file changed, 4 insertions(+)
diff --git a/board/freescale/mx6qsabresd/mx6qsabresd.c
b/board/freescale/mx6qsabresd/mx6qsabresd.c
index d37f318..61aa4d1 100644
--- a/board/freescale/mx6qsabresd/mx6qsabresd.c
+++ b/board/freescale/mx6qsabresd/mx6qsabresd.c
@@ -26,6 +26,7 @@
#include asm/errno.h
#include asm/gpio.h
#include asm/imx-common/iomux-v3.h
+#include asm/imx-common/boot_mode.h
#include mmc.h
#include fsl_esdhc.h
#include miiphy.h
@@ -168,18 +169,21 @@ int board_mmc_init(bd_t *bis)
for (i = 0; i CONFIG_SYS_FSL_USDHC_NUM; i++) {
switch (i) {
+ /* SD2 - mmc0 */
case 0:
imx_iomux_v3_setup_multiple_pads(
usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
gpio_direction_input(USDHC2_CD_GPIO);
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
break;
+ /* SD3 - mmc1 */
case 1:
imx_iomux_v3_setup_multiple_pads(
usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
gpio_direction_input(USDHC3_CD_GPIO);
usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
break;
+ /* eMMC - mmc2 */
case 2:
imx_iomux_v3_setup_multiple_pads(
usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
--
1.8.1
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[U-Boot] [PATCH v4 3/3] mx6qsabre{sd,auto}: Add boot mode select
Adds support for 'bmode' command which let user to choose where to
boot from; this allows U-Boot to load system from another storage
without messing with jumpers.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v4: None
Changes in v3:
- Drop change in bootdelay; the change where done by me while testing
it and I mistakenly included it.
Changes in v2: None
board/freescale/mx6qsabreauto/mx6qsabreauto.c | 17 +
board/freescale/mx6qsabresd/mx6qsabresd.c | 20
include/configs/mx6qsabre_common.h| 2 ++
3 files changed, 39 insertions(+)
diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index 91cc007..53d227e 100644
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -216,6 +216,23 @@ int board_init(void)
return 0;
}
+#ifdef CONFIG_CMD_BMODE
+static const struct boot_mode board_boot_modes[] = {
+ /* 4 bit bus width */
+ {mmc0, MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
+ {NULL, 0},
+};
+#endif
+
+int board_late_init(void)
+{
+#ifdef CONFIG_CMD_BMODE
+ add_board_boot_modes(board_boot_modes);
+#endif
+
+ return 0;
+}
+
int checkboard(void)
{
int rev = mx6sabre_rev();
diff --git a/board/freescale/mx6qsabresd/mx6qsabresd.c
b/board/freescale/mx6qsabresd/mx6qsabresd.c
index 61aa4d1..54b37f7 100644
--- a/board/freescale/mx6qsabresd/mx6qsabresd.c
+++ b/board/freescale/mx6qsabresd/mx6qsabresd.c
@@ -269,6 +269,26 @@ int board_init(void)
return 0;
}
+#ifdef CONFIG_CMD_BMODE
+static const struct boot_mode board_boot_modes[] = {
+ /* 4 bit bus width */
+ {sd2, MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
+ {sd3, MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
+ /* 8 bit bus width */
+ {emmc, MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
+ {NULL, 0},
+};
+#endif
+
+int board_late_init(void)
+{
+#ifdef CONFIG_CMD_BMODE
+ add_board_boot_modes(board_boot_modes);
+#endif
+
+ return 0;
+}
+
int checkboard(void)
{
puts(Board: MX6Q-SabreSD\n);
diff --git a/include/configs/mx6qsabre_common.h
b/include/configs/mx6qsabre_common.h
index 9eda9ed..0965b8f 100644
--- a/include/configs/mx6qsabre_common.h
+++ b/include/configs/mx6qsabre_common.h
@@ -36,6 +36,7 @@
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
#define CONFIG_MXC_GPIO
#define CONFIG_MXC_UART
@@ -75,6 +76,7 @@
/* Command definition */
#include config_cmd_default.h
+#define CONFIG_CMD_BMODE
#define CONFIG_CMD_BOOTZ
#undef CONFIG_CMD_IMLS
--
1.8.1
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[U-Boot] [PATCH v4 1/3] mx6qsabresd: Fix card detection for invalid card id case
This changes the code so in case an unkown value is passed it will
return as invalid.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v4:
- Fix switch code to proper break (Stefano)
Changes in v3: None
Changes in v2:
- Rework code to use a 'ret' variable (Fabio)
board/freescale/mx6qsabresd/mx6qsabresd.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/board/freescale/mx6qsabresd/mx6qsabresd.c
b/board/freescale/mx6qsabresd/mx6qsabresd.c
index 2b3926a..d37f318 100644
--- a/board/freescale/mx6qsabresd/mx6qsabresd.c
+++ b/board/freescale/mx6qsabresd/mx6qsabresd.c
@@ -145,15 +145,21 @@ struct fsl_esdhc_cfg usdhc_cfg[3] = {
int board_mmc_getcd(struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc-priv;
+ int ret = 0;
switch (cfg-esdhc_base) {
case USDHC2_BASE_ADDR:
- return !gpio_get_value(USDHC2_CD_GPIO);
+ ret = !gpio_get_value(USDHC2_CD_GPIO);
+ break;
case USDHC3_BASE_ADDR:
- return !gpio_get_value(USDHC3_CD_GPIO);
- default:
- return 1; /* eMMC/uSDHC4 is always present */
+ ret = !gpio_get_value(USDHC3_CD_GPIO);
+ break;
+ case USDHC4_BASE_ADDR:
+ ret = 1; /* eMMC/uSDHC4 is always present */
+ break;
}
+
+ return ret;
}
int board_mmc_init(bd_t *bis)
--
1.8.1
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[U-Boot] [PATCH] Exynos: clock: Fix a bug in PLL lock check condition
The condition for testing of PLL getting locked was incorrect. Rectify this error in this patch. Reported-by: Alexei Fedorov alexie.fedo...@arm.com Signed-off-by: Hatim Ali hatim...@samsung.com Signed-off-by: Akshay Saraswat aksha...@samsung.com --- board/samsung/smdk5250/clock_init.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/board/samsung/smdk5250/clock_init.c b/board/samsung/smdk5250/clock_init.c index c009ae5..baa3042 100644 --- a/board/samsung/smdk5250/clock_init.c +++ b/board/samsung/smdk5250/clock_init.c @@ -494,35 +494,35 @@ void system_clock_init() val = set_pll(arm_clk_ratio-apll_mdiv, arm_clk_ratio-apll_pdiv, arm_clk_ratio-apll_sdiv); writel(val, clk-apll_con0); - while (readl(clk-apll_con0) APLL_CON0_LOCKED) + while ((readl(clk-apll_con0) APLL_CON0_LOCKED) == 0) ; /* Set MPLL */ writel(MPLL_CON1_VAL, clk-mpll_con1); val = set_pll(mem-mpll_mdiv, mem-mpll_pdiv, mem-mpll_sdiv); writel(val, clk-mpll_con0); - while (readl(clk-mpll_con0) MPLL_CON0_LOCKED) + while ((readl(clk-mpll_con0) MPLL_CON0_LOCKED) == 0) ; /* Set BPLL */ writel(BPLL_CON1_VAL, clk-bpll_con1); val = set_pll(mem-bpll_mdiv, mem-bpll_pdiv, mem-bpll_sdiv); writel(val, clk-bpll_con0); - while (readl(clk-bpll_con0) BPLL_CON0_LOCKED) + while ((readl(clk-bpll_con0) BPLL_CON0_LOCKED) == 0) ; /* Set CPLL */ writel(CPLL_CON1_VAL, clk-cpll_con1); val = set_pll(mem-cpll_mdiv, mem-cpll_pdiv, mem-cpll_sdiv); writel(val, clk-cpll_con0); - while (readl(clk-cpll_con0) CPLL_CON0_LOCKED) + while ((readl(clk-cpll_con0) CPLL_CON0_LOCKED) == 0) ; /* Set GPLL */ writel(GPLL_CON1_VAL, clk-gpll_con1); val = set_pll(mem-gpll_mdiv, mem-gpll_pdiv, mem-gpll_sdiv); writel(val, clk-gpll_con0); - while (readl(clk-gpll_con0) GPLL_CON0_LOCKED) + while ((readl(clk-gpll_con0) GPLL_CON0_LOCKED) == 0) ; /* Set EPLL */ @@ -530,7 +530,7 @@ void system_clock_init() writel(EPLL_CON1_VAL, clk-epll_con1); val = set_pll(mem-epll_mdiv, mem-epll_pdiv, mem-epll_sdiv); writel(val, clk-epll_con0); - while (readl(clk-epll_con0) EPLL_CON0_LOCKED) + while ((readl(clk-epll_con0) EPLL_CON0_LOCKED) == 0) ; /* Set VPLL */ @@ -538,7 +538,7 @@ void system_clock_init() writel(VPLL_CON1_VAL, clk-vpll_con1); val = set_pll(mem-vpll_mdiv, mem-vpll_pdiv, mem-vpll_sdiv); writel(val, clk-vpll_con0); - while (readl(clk-vpll_con0) VPLL_CON0_LOCKED) + while ((readl(clk-vpll_con0) VPLL_CON0_LOCKED) == 0) ; writel(CLK_SRC_CORE0_VAL, clk-src_core0); -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] igep00x0: Enable CONFIG_CMD_BOOTZ
From: Enric Balletbo i Serra eballe...@iseebcn.com With v3.9 and later of the Linux Kernel defaulting to multi-platform images with omap2plus_defconfig, uImage isn't builtable anymore by default. Add CONFIG_CMD_BOOTZ so that we can still boot something the kernel spits out. Signed-off-by: Enric Balletbo i Serra eballe...@iseebcn.com --- include/configs/igep00x0.h |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h index 0e7f924..670b665 100644 --- a/include/configs/igep00x0.h +++ b/include/configs/igep00x0.h @@ -54,7 +54,8 @@ #define CONFIG_INITRD_TAG 1 #define CONFIG_REVISION_TAG1 -#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ /* * NS16550 Configuration -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1] DOS_PBR block type is also valid dos block type.
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 03/15/2013 01:10 AM, Stephen Warren wrote: On 03/11/2013 08:59 PM, Sonic Zhang wrote: Hi Stephen, On Tue, Mar 12, 2013 at 1:28 AM, Stephen Warren swar...@wwwdotorg.org wrote: On 03/11/2013 03:56 AM, sonic@gmail.com wrote: From: Sonic Zhang sonic.zh...@analog.com - Should return 0 for both DOS_MBR and DOS_PBR block types in test_part_dos(). What problem does this solve? I don't believe this change is correct. The purpose of test_part_dos() is to determine whether a block device contains an MS-DOS partition table. Such a partition table is present in an MBR, but not a PBR. A PBR contains a *FAT file-system, and does not include a partition table. The SD card formated by windows 7 into one FAT partition can't be initialized correct in u-boot function init_part() after you reuse the function test_block_type() in function test_part_dos(). So, files on that partition can't be displayed when running command fatls mmc 0. The only difference in your change is to mark dos partition with flag DOS_PBR invalid. Thanks for sending me the disk image. The image is a mess; it's been manipulated by a variety of tools at different times that have left rather a lot of cruft there. The first sector does appear to be an actual MBR, containing a single partition starting at LBA 0x10 (byte offset 0x2000), and quite large in size. At LBA 0x10, I do see what may be the start of a FAT16 file-system. So far, so good. However, the partition table contains the string FAT32 at 0x52, and also the string mkdosfs at 0x03. I believe that in the past, mkdosfs was used on this card to create a raw FAT filesystem without any partition table. Then later, some partitioning tool was run to create the partition I mentioned above. Finally you said that Windows was used to create the FAT filesystem within the partition. However, the partitioning tool didn't wipe out the region of the MBR that contains the boot code, and hence didn't wipe out the FAT32 filesystem signature. Finally, in LBA 3 (byte offset 0x600), I see another sector that looks remarkably like the start of a (presumably long-gone) FAT filesystem. Perhaps an old partition table on this device contained a partition that started in this (non-cylinder-aligned) sector. This sector contains the same mkdosfs and FAT32 signatures. If we take your patch, we end up with the following situation: With your strange partition table: ls mmc 0 ls mmc 0:auto - Thinks there's a partition table, so works, and picks partition 1. ls mmc 0:0 - Explicit request for partition 0 (whole-disk). This option doesn't make sense here, since the whole-disk is not a file-system, but rather a partitioned device. With a real raw FAT filesystem; no partitions: ls mmc 0 ls mmc 0:auto - Thinks there's a partition table, so tries to access a non- existent partition table entryrather than the whole disk, so automatic mode fails. ls mmc 0:0 - Explicit request for partition 0 (whole-disk), so works. So the issue is that the automatic handling of raw FAT filesystems (i.e. use of the entire disk rather than the first partition) fails with your patch. Perhaps it's acceptable that people with raw FAT filesystems must explicitly specify :0 to access the whole disk, and we accept that automatic mode won't work? I'll let Tom or Wolfgang make the call. Thanks for looking into all of this. What exactly fails with this image, without this patch applied? - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJRQxgVAAoJENk4IS6UOR1WCtEQAIvLpSOD8ZgM2B0aKNUI92sr ZgULRoQ7bjBL12NPrHQEdQn09cS3RTGY7AijWECfH29m5RN6e23tri5/MSRrw9yw jxEPhIEWqNaJ0gEF9qteNm9QDlJyGq9AENMWIf33fqo+hF9jrAsFwzZKRmWnNm8U Euc+KGdIwqBkD2ke+YIwHhV7ohII4LWrUD7FTYTYT78By3YR0YNpqrrgNuJB5Bs6 1TDARj/qTYk5uGy+1Ep8EqTIMqWfWtmeUhE5k6wYONOYPaETnDTezoxvN4wAuIyP QF25XkJbNfU39UreGnXscWjeuS/3FHzEC6ArfT0n6uVv94fAbcH/w6gFUanNa3Ya 50/314K0ePiRH2rJP8/7tiCQixZtykvAfx5IfLr4HZsbDZtYMcLkKGvKiWkt+0Hp MKKm059GK4W1tPbc31sFToqrGNNo41bE8hcDBa8rjFsbKkdDbXnMdMyRm4J5qWBX MTGYsmw4veRVn8NAZVkCkyckZOIPu2I4CwLv4KyMBQZ/p/o70xzMMpOyBM6kXWWE +8uoFZEL0jjJh214TUjRNu6YfzKyTiIriO6zKRsU0Do1iGGQ9EhiJxWKeLsuxz2i C7o11B4ayFsrpJ+GfpV6JEl2UBRdBmiDmsp+9bwwH1eMBLkBMexH+KzNUTdW5eKI 7pumNMZepGQnQYXXHH0L =RjQu -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] igep00x0: Enable CONFIG_CMD_BOOTZ
On Fri, Mar 15, 2013 at 1:32 PM, Enric Balletbo i Serra eballe...@gmail.com wrote: From: Enric Balletbo i Serra eballe...@iseebcn.com With v3.9 and later of the Linux Kernel defaulting to multi-platform images with omap2plus_defconfig, uImage isn't builtable anymore by default. Add CONFIG_CMD_BOOTZ so that we can still boot something the kernel spits out. Signed-off-by: Enric Balletbo i Serra eballe...@iseebcn.com --- include/configs/igep00x0.h |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h index 0e7f924..670b665 100644 --- a/include/configs/igep00x0.h +++ b/include/configs/igep00x0.h @@ -54,7 +54,8 @@ #define CONFIG_INITRD_TAG 1 #define CONFIG_REVISION_TAG1 -#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ /* * NS16550 Configuration -- 1.7.10.4 Hi Enric, Nice improvement, thanks! Reviewed-by: Javier Martinez Canillas jav...@dowhile0.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv2 0/3] new IGEP board support
Hi Tom, Any comments on these patch series ? 2013/2/7 Javier Martinez Canillas jav...@dowhile0.org: On Thu, Feb 7, 2013 at 11:40 AM, [Enric Balletbo i Serra eballe...@gmail.com wrote: From: Enric Balletbo i Serra eballe...@iseebcn.com Hi all, This is the second version to add support to the IGEP COM PROTON board in current mainline. These patches applies on top of u-boot-ti repository as the following patch is required. OMAP3: use a single board file for IGEP devices commit 076be4528851126b56f2c1b84d07834297797f6c From Javier Martinez Canillas Changes since v1: * Only define CONFIG_SHOW_BOOT_PROGRESS for the machines that have a boot progress (thanks to Javier) * Also define CONFIG_CMD_NET on IGEP0032 machine (thanks to Javier) * Add new patch in the serie to fix a missing include. Thanks a lot for your comments, Enric Balletbo i Serra (3): OMAP3: igep00x0: use official board names. OMAP3: igep00x0: add missing include mach-types.h in config. OMAP3: igep00x0: Add new IGEP COM PROTON. For all the patches: Reviewed-by: Javier Martinez Canillas javier.marti...@collabora.co.uk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1] DOS_PBR block type is also valid dos block type.
On Fri, Mar 15, 2013 at 02:36:21PM +0800, Sonic Zhang wrote: Hi Stephen, On Fri, Mar 15, 2013 at 1:10 PM, Stephen Warren swar...@wwwdotorg.org wrote: On 03/11/2013 08:59 PM, Sonic Zhang wrote: Hi Stephen, On Tue, Mar 12, 2013 at 1:28 AM, Stephen Warren swar...@wwwdotorg.org wrote: On 03/11/2013 03:56 AM, sonic@gmail.com wrote: From: Sonic Zhang sonic.zh...@analog.com - Should return 0 for both DOS_MBR and DOS_PBR block types in test_part_dos(). What problem does this solve? I don't believe this change is correct. The purpose of test_part_dos() is to determine whether a block device contains an MS-DOS partition table. Such a partition table is present in an MBR, but not a PBR. A PBR contains a *FAT file-system, and does not include a partition table. The SD card formated by windows 7 into one FAT partition can't be initialized correct in u-boot function init_part() after you reuse the function test_block_type() in function test_part_dos(). So, files on that partition can't be displayed when running command fatls mmc 0. The only difference in your change is to mark dos partition with flag DOS_PBR invalid. Thanks for sending me the disk image. The image is a mess; it's been manipulated by a variety of tools at different times that have left rather a lot of cruft there. The first sector does appear to be an actual MBR, containing a single partition starting at LBA 0x10 (byte offset 0x2000), and quite large in size. At LBA 0x10, I do see what may be the start of a FAT16 file-system. So far, so good. However, the partition table contains the string FAT32 at 0x52, and also the string mkdosfs at 0x03. I believe that in the past, mkdosfs was used on this card to create a raw FAT filesystem without any partition table. Then later, some partitioning tool was run to create the partition I mentioned above. Finally you said that Windows was used to create the FAT filesystem within the partition. However, the partitioning tool didn't wipe out the region of the MBR that contains the boot code, and hence didn't wipe out the FAT32 filesystem signature. Finally, in LBA 3 (byte offset 0x600), I see another sector that looks remarkably like the start of a (presumably long-gone) FAT filesystem. Perhaps an old partition table on this device contained a partition that started in this (non-cylinder-aligned) sector. This sector contains the same mkdosfs and FAT32 signatures. If we take your patch, we end up with the following situation: With your strange partition table: ls mmc 0 ls mmc 0:auto - Thinks there's a partition table, so works, and picks partition 1. ls mmc 0:0 - Explicit request for partition 0 (whole-disk). This option doesn't make sense here, since the whole-disk is not a file-system, but rather a partitioned device. With a real raw FAT filesystem; no partitions: ls mmc 0 ls mmc 0:auto - Thinks there's a partition table, so tries to access a non- existent partition table entryrather than the whole disk, so automatic mode fails. ls mmc 0:0 - Explicit request for partition 0 (whole-disk), so works. So the issue is that the automatic handling of raw FAT filesystems (i.e. use of the entire disk rather than the first partition) fails with your patch. Perhaps it's acceptable that people with raw FAT filesystems must explicitly specify :0 to access the whole disk, and we accept that automatic mode won't work? I'll let Tom or Wolfgang make the call. As far as I can tell, the Linux kernel never looks at the FAT or FAT32 strings in the MBR, and hence accepts your disk as having a partition table. And since in Linux you must always use a specific device (/dev/sda or /dev/sdaN), this issue doesn't arise. U-Boot's automatic partition-or-whole-device selection is something Linux doesn't do. One other thing to note: commands such as mmc part or part list won't work for your disk. After my patch d1efb64 disk: part_dos: don't claim whole-disk FAT filesystems, if test_block_type()!=DOS_MBR (i.e. in your case), then print_partition_extended() will simply print an error. Before that patch, if test_block_type()==DOS_PBR (i.e. in your case) then print_partition_extended() would print a fake partition table entry that covered the whole disk. Neither action is correct for your disk since it imagine that there was a raw FAT filesystem covering the entire disk. In other words, U-Boot's partition table printing commands never worked correctly on your disk, even if accessing the file-system (accidentally?) used to! Another solution here is for you to simply: # Back up your MBR in case something goes wrong. dd if=/dev/whatever of=backup.bin bs=1 count=512 # Zero out the boot code portion of your MBR, # which will also zero out the false FAT32 signature. dd
Re: [U-Boot] [PATCHv2 0/3] new IGEP board support
On Fri, Mar 15, 2013 at 01:48:38PM +0100, Enric Balletbo Serra wrote: Hi Tom, Any comments on these patch series ? 2013/2/7 Javier Martinez Canillas jav...@dowhile0.org: On Thu, Feb 7, 2013 at 11:40 AM, [Enric Balletbo i Serra eballe...@gmail.com wrote: From: Enric Balletbo i Serra eballe...@iseebcn.com Hi all, This is the second version to add support to the IGEP COM PROTON board in current mainline. These patches applies on top of u-boot-ti repository as the following patch is required. OMAP3: use a single board file for IGEP devices commit 076be4528851126b56f2c1b84d07834297797f6c From Javier Martinez Canillas Changes since v1: * Only define CONFIG_SHOW_BOOT_PROGRESS for the machines that have a boot progress (thanks to Javier) * Also define CONFIG_CMD_NET on IGEP0032 machine (thanks to Javier) * Add new patch in the serie to fix a missing include. Thanks a lot for your comments, Enric Balletbo i Serra (3): OMAP3: igep00x0: use official board names. OMAP3: igep00x0: add missing include mach-types.h in config. OMAP3: igep00x0: Add new IGEP COM PROTON. For all the patches: Reviewed-by: Javier Martinez Canillas javier.marti...@collabora.co.uk Sorry, applied to u-boot-ti/master and already now part of u-boot-arm/master. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot,v11,02/31] Replace __bss_end__ with __bss_end
On Thu, Mar 14, 2013 at 06:54:53AM -, Simon Glass wrote: Note this is a tree-wide change affecting multiple architectures. At present we use __bss_start, but mostly __bss_end__. This seems inconsistent and in a number of places __bss_end is used instead. Change to use __bss_end for the BSS end symbol throughout U-Boot. This makes it possible to use the asm-generic/sections.h file on all archs. Signed-off-by: Simon Glass s...@chromium.org Need a v12 here to cover a4m2k and a3m071 (powerpc). -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PULL] : Please pull u-boot-imx
Hi Albert, here an update pull request after applying Fabio's fixes. The following changes since commit 4cfc611b4a4ce009cfad46804bec2a1caad8e329: ARM: ns9750dev: remove remainders of dead board (2013-02-28 14:49:24 +0100) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master for you to fetch changes up to 19a0f7fa271de0345bb2df90d443c547c41e8037: nitrogen: Use unsigned long to specify the total RAM size (2013-03-15 14:39:44 +0100) Benoît Thébaudeau (6): imx: mx6q DDR3 init: Fix tMRD imx: mx6q DDR3 init: Fix tXPR imx: mx6q DDR3 init: Fix SDE_to_RST imx: mx6q DDR3 init: Fix RST_to_CKE imx: mx6q DDR3 init: Fix MR0.PPD imx: mx6q DDR3 init: Benefit from available CL = 7 Eric Nelson (8): i.MX6Q: mx6qsabre*: Configure to allow CONFIG_SYS_ALT_MEMTEST i.MX6: mx6qsabrelite: indent with tabs i.MX6: consolidate pad names for multi-CPU boards i.MX6: crm_regs: define CCM_CCGRx for use in board config files i.MX6: crm_regs: define IOMUXC_GPR4/6/7 i.MX6DL: define IOMUX pads NANDF_CS1-3 for use as GPIO i.MX6: Add DDR controller registers Add Boundary Devices Nitrogen6X boards Fabio Estevam (6): mx6: Disable Power Down Bit of watchdog mx23evk: Remove CONFIG_SYS_BAUDRATE_TABLE mx23evk: Turn on caches common: cmd_sata: Fix usage text for 'sata init' mx6: Provide a structure for accessing HDMI registers nitrogen6x: Fix RAM size variable Fadil Berisha (2): mxs: timrot: Add support to i.MX23 mxs: timrot: Rename local macros Marek Vasut (7): mxs: Reset the EMI block on mx23 mxs: mmc: spi: dma: Better wrap the MXS differences mxs: spi: Fix the MXS SPI for mx23 mxs: spi: Remove CONFIG_MXS_SPI_DMA_ENABLE mxs: Squash the header file usage in ehci-mxs mxs: Make ehci-mxs multiport capable mxs: m28: Enable power to USB port 0 Otavio Salvador (11): build: imx: Fix 'u-boot.imx' build without full OBJTREE reference mxs: Rename CONFIG_SPL_MX28_PSWITCH_WAIT to CONFIG_SPL_MXS_PSWITCH_WAIT mx23: Document the tRAS lockout setting in memory initialization mx23evk: Adjust DRAM control register to use full 128MB of RAM led: Use STATUS_LED_ON and STATUS_LED_OFF when calling __led_set mxs: Fix iomux.h to not break build during assembly stage mx23_olinuxino: Add support for status LED mx23evk: Enable USB support mx23_olinuxino: Enable USB support mx23_olinuxino: Add ethernet support mx23_olinuxino: Fix warning for implicit declaration Stefano Babic (3): Merge branch 'master' of git://git.denx.de/u-boot-arm Merge branch 'master' of git://git.denx.de/u-boot-arm USB: drop unneeded header in ehci-mx6 Stephen Warren (1): ARM: mx6: use common CPU errata config options fabio.este...@freescale.com (1): nitrogen: Use unsigned long to specify the total RAM size MAINTAINERS|8 + Makefile |4 +- arch/arm/cpu/arm926ejs/config.mk |2 +- arch/arm/cpu/arm926ejs/mxs/clock.c |3 +- arch/arm/cpu/arm926ejs/mxs/mxs_init.h |2 +- arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 16 +- arch/arm/cpu/arm926ejs/mxs/spl_power_init.c|2 +- arch/arm/cpu/arm926ejs/mxs/timer.c | 39 +- arch/arm/cpu/armv7/Makefile|2 +- arch/arm/cpu/armv7/config.mk |2 +- arch/arm/cpu/armv7/mx6/Makefile|1 - arch/arm/cpu/armv7/mx6/lowlevel_init.S | 35 - arch/arm/cpu/armv7/mx6/soc.c | 16 + arch/arm/include/asm/arch-mx6/crm_regs.h | 12 + arch/arm/include/asm/arch-mx6/imx-regs.h |8 + arch/arm/include/asm/arch-mx6/iomux.h |5 + arch/arm/include/asm/arch-mx6/mx6-ddr.h| 85 + arch/arm/include/asm/arch-mx6/mx6-pins.h | 31 + arch/arm/include/asm/arch-mx6/mx6dl-ddr.h | 71 + arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 193 +-- arch/arm/include/asm/arch-mx6/mx6q-ddr.h | 69 + arch/arm/include/asm/arch-mx6/mx6q_pins.h | 1671 arch/arm/include/asm/arch-mx6/mx6x_pins.h | 1671 arch/arm/include/asm/arch-mx6/mxc_hdmi.h | 1083 ++--- arch/arm/include/asm/arch-mxs/dma.h| 19 +- arch/arm/include/asm/arch-mxs/imx-regs.h |2 + arch/arm/include/asm/arch-mxs/iomux.h |5 + arch/arm/include/asm/arch-mxs/regs-ssp.h | 26 + arch/arm/include/asm/arch-mxs/regs-timrot.h| 101 ++ board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg| 58 + board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg| 58 +
Re: [U-Boot] [PATCH v7] Introduced btrfs file-system with btrload command
On Thu, Mar 14, 2013 at 12:35:46PM +, Adnan Ali wrote: Introduces btrfs file-system to read file from volume/sub-volumes with btrload command. This implementation has read-only support. This btrfs implementation is based on syslinux btrfs code, commit 269ebc845ebc8b46ef4b0be7fa0005c7fdb95b8d. OK, sorry for not doing this part sooner, but I compared the btrfs code in syslinux to your code and there's a lot of whitespace problems in fs/btrfs/btrfs.c that you: trini@bill-the-cat:~/work/u-boot/u-boot$ ./tools/checkpatch.pl -f fs/btrfs/btrfs.c | grep ^ERROR | wc -l 320 trini@bill-the-cat:~/work/u-boot/u-boot$ ./tools/checkpatch.pl -f ~/work/syslinux/core/fs/btrfs/btrfs.c | grep ^ERR | wc -l 7 Please fix this, use whitespace consistent with the rest of the file for the U-Boot specific functions you're adding and as Simon noted, 'char' for a return type on btrfs_ls isn't really right (please follow fat or ext* for examples). Thanks and again, sorry for not noticing this sooner in the reviews. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] Add initial support for Wandboard dual lite and solo.
On 14/03/2013 21:24, Wolfgang Denk wrote: Dear Fabio, Hi Wolfgang, hi Fabio, Can we please remove the Reset cause: WDOG line in production mode? Do you mean the change below? --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -148,7 +148,7 @@ int print_cpuinfo(void) (cpurev 0x000F0) 4, (cpurev 0xF) 0, mxc_get_clock(MXC_ARM_CLK) / 100); - printf(Reset cause: %s\n, get_reset_cause()); + debug(Reset cause: %s\n, get_reset_cause()); return 0; } #endif Since this is common code I can address it separately with other patch. Just let me know if this is OK. Indeed this is common code, I see it now. So yes, if we change this, it should be done as separate patch. I think debug() makes a lot of sense here to reduce the output at boot time to a reasonable minimum, but then - is there another way for the user to inquire for this information. If not, should we add it to the bdinfo output? Reset cause is a very important information - we can know if the processor gets a watchdog, or if a power on happened. The last one can address to hiddden issues with the power supply. I understand that less redundant information is better, but this is very important info and it cannot be used only if DEBUG is set. IMHO we should let it as it is - it helps us when something bad happens. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] am335x: Enable DDR PHY dynamic power down bit for DDR3 boards
On Fri, Mar 15, 2013 at 12:41:16PM +0530, Vaibhav Hiremath wrote:
Enable DDR PHY dynamic power down bit, which enables
powering down the IO receiver when not performing read.
This also helps in reducing overall power consumption in
low power states (suspend/standby).
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Satyanarayana, Sandhya sandhya.satyanaray...@ti.com
Cc: Tom Rini tr...@ti.com
---
arch/arm/include/asm/arch-am33xx/ddr_defs.h |1 +
board/ti/am335x/board.c |6 --
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index ae43ef8..7ab3baf 100644
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -28,6 +28,7 @@
#define VTP_CTRL_START_EN(0x1)
#define PHY_DLL_LOCK_DIFF0x0
#define DDR_CKE_CTRL_NORMAL 0x1
+#define PHY_EN_DYN_PWRDN (0x1 20)
/* Micron MT47H128M16RT-25E */
#define MT47H128M16RT25E_EMIF_READ_LATENCY 0x15
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 48e6896..22d7b25 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -251,7 +251,8 @@ static struct emif_regs ddr3_emif_reg_data = {
.sdram_tim2 = MT41J128MJT125_EMIF_TIM2,
.sdram_tim3 = MT41J128MJT125_EMIF_TIM3,
.zq_config = MT41J128MJT125_ZQ_CFG,
- .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY,
+ .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY |
+ PHY_EN_DYN_PWRDN,
};
static struct emif_regs ddr3_evm_emif_reg_data = {
@@ -261,7 +262,8 @@ static struct emif_regs ddr3_evm_emif_reg_data = {
.sdram_tim2 = MT41J512M8RH125_EMIF_TIM2,
.sdram_tim3 = MT41J512M8RH125_EMIF_TIM3,
.zq_config = MT41J512M8RH125_ZQ_CFG,
- .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY,
+ .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY |
+ PHY_EN_DYN_PWRDN,
};
#endif
Reviewed-by: Tom Rini tr...@ti.com
Lars, I suspect pcm051 also could use a change like this.
--
Tom
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[U-Boot] pull request for u-boot-tegra/master into ARM/master
Albert,
Please pull u-boot-tegra/master into ARM/master. Thanks!
./MAKEALL for all the Tegra boards is OK, running a ./MAKEALL -a arm
now. Checkpatch.pl is clean.
The following changes since commit ef123c525370463254a6f8e67563fdb0b0b46412:
Albert ARIBAUD (1):
Refactor linker-generated arrays
are available in the git repository at:
git://git.denx.de/u-boot-tegra master
Lucas Stach (7):
tegra: usb: set USB_PORTS_MAX to correct value
tegra: usb: make controller init functions more self contained
tegra: usb: remove unneeded function parameter
tegra: usb: move controller init into start_port
tegra: usb: various small cleanups
tegra: usb: move implementation into right directory
tegra: usb: move [start|stop]_port into ehci_hcd_[init|stop]
Stephen Warren (5):
ARM: tegra: implement WAR for Tegra114 CPU reset vector
ARM: tegra: make bounce buffer option common
disk: define HAVE_BLOCK_DEVICE in a common place
disk: define HAVE_BLOCK_DEVICE if CONFIG_CMD_PART
ARM: tegra: enable a common set of disk-related commands everywhere
Tom Warren (27):
Tegra114: I2C: Take DVFS out of reset to allow I2C5 (PWR_I2C) to work
Tegra: I2C: Add T114 clock support to tegra_i2c driver
Tegra114: fdt: Update DT files with I2C info for T114/Dalmore
Tegra114: I2C: Enable I2C driver on Dalmore E1611 eval board
Tegra: fdt: Change /include/ to #include for C preprocessor
Tegra: fdt: tamonten: Add common tamonten.dtsi file from linux
Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files
Tegra: MMC: Add DT support to MMC driver for all T20 boards
Tegra: fdt: Remove memreserve line from Cardhu/Seaboard DT files
Tegra30: fdt: Sync DT nodes with kernel DT files (I2C, SPI, GPIO, clock)
Tegra: Add twarren as maintainer for Tegra30 and Tegra114 SoCs
Tegra: Remove unused CONFIG_SYS_CPU_OSC_FREQUENCY define
Tegra114: fdt: Sync DT nodes with kernel DT files (GPIO, tegra_car)
Tegra30: Cardhu: Remove unneeded cardhu.c.mmc file
Tegra114: pinmux: Update pinmux tables code, fix a bug w/SDMMC3 init
Tegra30: Cardhu: Add pad config tables/code based on pinmux code
Tegra30: fdt: Add SDMMC (sdhci) nodes for T30 boards (Cardhu for now)
Tegra: MMC: Added/update SDMMC registers/base addresses for T20/T30
Tegra30: MMC: Add SD bus power-rail and SDMMC pad init routines
mmc: Tegra: Add SD bus power/voltage function and MMC pad init call.
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec driver
Tegra30: MMC: Enable DT MMC driver support for Tegra30 Cardhu boards
Tegra114: pinmux: Fix bad CAM_MCLK func 3 table entry
Tegra114: Fix/update GP padcfg register struct
Tegra114: Dalmore: Always use DEFAULT instead of DISABLE for lock bits
Tegra114: fdt: Move aliases from dtsi to dts file as per other Tegras
Tegra114: Dalmore: Add pad config tables/code based on pinmux code
MAINTAINERS|2 +
arch/arm/cpu/arm720t/tegra114/cpu.c| 37 ++-
arch/arm/cpu/armv7/tegra20/Makefile|1 -
arch/arm/cpu/armv7/tegra20/usb.c | 567
arch/arm/cpu/tegra114-common/pinmux.c | 410 +++---
arch/arm/cpu/tegra30-common/pinmux.c | 190 +++-
arch/arm/dts/tegra114.dtsi | 75 +++-
arch/arm/dts/tegra20.dtsi | 18 +-
arch/arm/dts/tegra30.dtsi | 124 +++--
arch/arm/include/asm/arch-tegra/mmc.h |2 +-
arch/arm/include/asm/arch-tegra/tegra_i2c.h|6 +
arch/arm/include/asm/arch-tegra/tegra_mmc.h| 48 ++-
.../include/asm/{arch-tegra20 = arch-tegra}/usb.h | 22 -
arch/arm/include/asm/arch-tegra114/gp_padctrl.h| 34 +-
arch/arm/include/asm/arch-tegra114/pinmux.h| 246 +-
arch/arm/include/asm/arch-tegra20/tegra.h |1 -
arch/arm/include/asm/arch-tegra30/gp_padctrl.h |6 +
arch/arm/include/asm/arch-tegra30/pinmux.h | 67 +++-
arch/arm/include/asm/arch-tegra30/tegra.h |2 +
board/avionic-design/common/tamonten.c | 19 +-
board/avionic-design/dts/tegra20-medcom-wide.dts |3 +-
board/avionic-design/dts/tegra20-plutux.dts|3 +-
board/avionic-design/dts/tegra20-tamonten.dtsi | 489 +
board/avionic-design/dts/tegra20-tec.dts |3 +-
board/compal/dts/tegra20-paz00.dts | 21 +-
board/compal/paz00/paz00.c | 26 +-
board/compulab/dts/tegra20-trimslice.dts | 16 +-
board/compulab/trimslice/trimslice.c | 23 +-
board/nvidia/cardhu/cardhu.c | 57 ++-
board/nvidia/cardhu/cardhu.c.mmc | 151 --
board/nvidia/cardhu/pinmux-config-cardhu.h
Re: [U-Boot] [U-Boot,v11,02/31] Replace __bss_end__ with __bss_end
Hi Tom, On Fri, Mar 15, 2013 at 6:33 AM, Tom Rini tr...@ti.com wrote: On Thu, Mar 14, 2013 at 06:54:53AM -, Simon Glass wrote: Note this is a tree-wide change affecting multiple architectures. At present we use __bss_start, but mostly __bss_end__. This seems inconsistent and in a number of places __bss_end is used instead. Change to use __bss_end for the BSS end symbol throughout U-Boot. This makes it possible to use the asm-generic/sections.h file on all archs. Signed-off-by: Simon Glass s...@chromium.org Need a v12 here to cover a4m2k and a3m071 (powerpc). It's a bit of a moving target. I will look at this, build and resend. Regards, Simon -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot,v11,02/31] Replace __bss_end__ with __bss_end
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 03/15/2013 11:47 AM, Simon Glass wrote: Hi Tom, On Fri, Mar 15, 2013 at 6:33 AM, Tom Rini tr...@ti.com wrote: On Thu, Mar 14, 2013 at 06:54:53AM -, Simon Glass wrote: Note this is a tree-wide change affecting multiple architectures. At present we use __bss_start, but mostly __bss_end__. This seems inconsistent and in a number of places __bss_end is used instead. Change to use __bss_end for the BSS end symbol throughout U-Boot. This makes it possible to use the asm-generic/sections.h file on all archs. Signed-off-by: Simon Glass s...@chromium.org Need a v12 here to cover a4m2k and a3m071 (powerpc). It's a bit of a moving target. I will look at this, build and resend. This should be the last go-round at least :) - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJRQ0NHAAoJENk4IS6UOR1W3y4QAKABB03puNGkVk2jWmr9TLFN JaZyvdfMoSjSONXMuuIXM30J9OC2M5tQTyy4dg6X2AKeaN5HcivAIL8NW2SaRC4c hUNOyM2u2GKaAqvb9QxvZEmenzYG9Kzh4Y+lVCk55sMk+ivzUYCwEC9i8t7zOt+x dqgXgnfzYJWdw56RJ3bfCUiM2FK/efjW1vC2eCt75E77gc5kJ2IXu5QnhAbic9jf 0Odf+yb1gJI2esiBlLtyWV3zaZNFHGmfWg6icpK1MJwMe02RQgeZjsrdsqbuzggJ CsbQjr8FhDYeeDJiEOshcXKhQenGe1D35l06QiTHRMwY5xiGLQQqYXmxlmWK1lUv vWzkDEj3NMk5svUlOr/2SNbWpm6MBblTosT6n3PyCuwEhc2y4tcTU+Jm1FZ466cM aSEwmpk4jjF9N1a3yk39jBD3hxVaDzzbLI/O/rtSbCNdyhOdrp5erGCvJJywlTqq WdesYRowEasJENC9Py24HuSESkm9uCqIhb9ZlFrOcrAvdd8lLV5nyLiJXmM4P4qe dBO7qayjBmPHvUwqD+JQ6oU//y+JjCiNOJaVQLrsC1Va9/NIzwhtwKsnB2xETvLx WRd3k7iGbu/KY+5TNxzTXnJ6lOQkVAgYYELkGjs2Vxmsw92U7Po1Auv/PVW1nyC1 ORUOdi/AS5ZdreegeOcc =MaQf -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot,v11,02/31] Replace __bss_end__ with __bss_end
Hi Tom, On Fri, Mar 15, 2013 at 8:50 AM, Tom Rini tr...@ti.com wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 03/15/2013 11:47 AM, Simon Glass wrote: Hi Tom, On Fri, Mar 15, 2013 at 6:33 AM, Tom Rini tr...@ti.com wrote: On Thu, Mar 14, 2013 at 06:54:53AM -, Simon Glass wrote: Note this is a tree-wide change affecting multiple architectures. At present we use __bss_start, but mostly __bss_end__. This seems inconsistent and in a number of places __bss_end is used instead. Change to use __bss_end for the BSS end symbol throughout U-Boot. This makes it possible to use the asm-generic/sections.h file on all archs. Signed-off-by: Simon Glass s...@chromium.org Need a v12 here to cover a4m2k and a3m071 (powerpc). It's a bit of a moving target. I will look at this, build and resend. This should be the last go-round at least :) Let's see. I've sent out the new patch so you can retry. I can't see any more occurrences of this in U-Boot. Regards, Simon - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJRQ0NHAAoJENk4IS6UOR1W3y4QAKABB03puNGkVk2jWmr9TLFN JaZyvdfMoSjSONXMuuIXM30J9OC2M5tQTyy4dg6X2AKeaN5HcivAIL8NW2SaRC4c hUNOyM2u2GKaAqvb9QxvZEmenzYG9Kzh4Y+lVCk55sMk+ivzUYCwEC9i8t7zOt+x dqgXgnfzYJWdw56RJ3bfCUiM2FK/efjW1vC2eCt75E77gc5kJ2IXu5QnhAbic9jf 0Odf+yb1gJI2esiBlLtyWV3zaZNFHGmfWg6icpK1MJwMe02RQgeZjsrdsqbuzggJ CsbQjr8FhDYeeDJiEOshcXKhQenGe1D35l06QiTHRMwY5xiGLQQqYXmxlmWK1lUv vWzkDEj3NMk5svUlOr/2SNbWpm6MBblTosT6n3PyCuwEhc2y4tcTU+Jm1FZ466cM aSEwmpk4jjF9N1a3yk39jBD3hxVaDzzbLI/O/rtSbCNdyhOdrp5erGCvJJywlTqq WdesYRowEasJENC9Py24HuSESkm9uCqIhb9ZlFrOcrAvdd8lLV5nyLiJXmM4P4qe dBO7qayjBmPHvUwqD+JQ6oU//y+JjCiNOJaVQLrsC1Va9/NIzwhtwKsnB2xETvLx WRd3k7iGbu/KY+5TNxzTXnJ6lOQkVAgYYELkGjs2Vxmsw92U7Po1Auv/PVW1nyC1 ORUOdi/AS5ZdreegeOcc =MaQf -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] am335x: Enable DDR PHY dynamic power down bit for DDR3 boards
On Friday 15 March 2013 at 16:05:24, Tom Rini wrote:
On Fri, Mar 15, 2013 at 12:41:16PM +0530, Vaibhav Hiremath wrote:
Enable DDR PHY dynamic power down bit, which enables
powering down the IO receiver when not performing read.
This also helps in reducing overall power consumption in
low power states (suspend/standby).
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Satyanarayana, Sandhya sandhya.satyanaray...@ti.com
Cc: Tom Rini tr...@ti.com
---
arch/arm/include/asm/arch-am33xx/ddr_defs.h |1 +
board/ti/am335x/board.c |6 --
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
b/arch/arm/include/asm/arch-am33xx/ddr_defs.h index ae43ef8..7ab3baf
100644
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -28,6 +28,7 @@
#define VTP_CTRL_START_EN (0x1)
#define PHY_DLL_LOCK_DIFF 0x0
#define DDR_CKE_CTRL_NORMAL0x1
+#define PHY_EN_DYN_PWRDN (0x1 20)
/* Micron MT47H128M16RT-25E */
#define MT47H128M16RT25E_EMIF_READ_LATENCY 0x15
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 48e6896..22d7b25 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -251,7 +251,8 @@ static struct emif_regs ddr3_emif_reg_data = {
.sdram_tim2 = MT41J128MJT125_EMIF_TIM2,
.sdram_tim3 = MT41J128MJT125_EMIF_TIM3,
.zq_config = MT41J128MJT125_ZQ_CFG,
- .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY,
+ .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY |
+ PHY_EN_DYN_PWRDN,
};
static struct emif_regs ddr3_evm_emif_reg_data = {
@@ -261,7 +262,8 @@ static struct emif_regs ddr3_evm_emif_reg_data = {
.sdram_tim2 = MT41J512M8RH125_EMIF_TIM2,
.sdram_tim3 = MT41J512M8RH125_EMIF_TIM3,
.zq_config = MT41J512M8RH125_ZQ_CFG,
- .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY,
+ .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY |
+ PHY_EN_DYN_PWRDN,
};
#endif
Reviewed-by: Tom Rini tr...@ti.com
Lars, I suspect pcm051 also could use a change like this.
Many thanks for the hint! Yes, I think this could also be of use for pcm051.
I can care about it and make a patch for pcm051 after my two weeks holiday :)
Lars
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[U-Boot] [PATCH] armv7: do not relocate _start twice
The _start symbol is already relocated, so do not add the relocation the second time in c_runtime_cpu_setup. This fixes e.g. the abort exception handling path, which ended in double fault due to bad address in VBAR. Signed-off-by: Vincent Stehlé v-ste...@ti.com Reported-by: Lubomir Popov lpo...@mm-sol.com --- Hello, Here is a fix for a bug reported by Lubomir. He noticed that exceptions were not handled correctly anymore. This can be seen with e.g. the 'dhcp' command on some OMAP platforms. Looking at the code, I would says the fix applies to all armv7 platforms except Tegra but I did only test on OMAP5. On this platform at least the abort is now handled: OMAP5430 EVM # dhcp data abort MAYBE you should read doc/README.arm-unaligned-accesses pc : [fef9bd78] lr : [fefa1790] sp : feef9dc4 ip : fefed0f8 fp : r10: 0001 r9 : 0001 r8 : feef9f48 r7 : feef9fe0 r6 : r5 : r4 : 0014 r3 : r2 : 0002 r1 : 0014 r0 : fefed0f4 Flags: Nzcv IRQs off FIQs off Mode SVC_32 Resetting CPU ... resetting ... It would be appreciated if folks could verify on other ARMv7 platforms, when running from flash for example (where relocation may differ?) arch/arm/cpu/armv7/start.S |1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 6b59529d..d06b35f 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -254,7 +254,6 @@ ENTRY(c_runtime_cpu_setup) #if !defined(CONFIG_TEGRA) /* Set vector address in CP15 VBAR register */ ldr r0, =_start - add r0, r0, r9 mcr p15, 0, r0, c12, c0, 0 @Set VBAR #endif /* !Tegra */ -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1] DOS_PBR block type is also valid dos block type.
On 03/15/2013 06:46 AM, Tom Rini wrote: On 03/15/2013 01:10 AM, Stephen Warren wrote: On 03/11/2013 08:59 PM, Sonic Zhang wrote: Hi Stephen, On Tue, Mar 12, 2013 at 1:28 AM, Stephen Warren swar...@wwwdotorg.org wrote: On 03/11/2013 03:56 AM, sonic@gmail.com wrote: From: Sonic Zhang sonic.zh...@analog.com - Should return 0 for both DOS_MBR and DOS_PBR block types in test_part_dos(). What problem does this solve? I don't believe this change is correct. The purpose of test_part_dos() is to determine whether a block device contains an MS-DOS partition table. Such a partition table is present in an MBR, but not a PBR. A PBR contains a *FAT file-system, and does not include a partition table. The SD card formated by windows 7 into one FAT partition can't be initialized correct in u-boot function init_part() after you reuse the function test_block_type() in function test_part_dos(). So, files on that partition can't be displayed when running command fatls mmc 0. The only difference in your change is to mark dos partition with flag DOS_PBR invalid. Thanks for sending me the disk image. The image is a mess; it's been manipulated by a variety of tools at different times that have left rather a lot of cruft there. The first sector does appear to be an actual MBR, containing a single partition starting at LBA 0x10 (byte offset 0x2000), and quite large in size. At LBA 0x10, I do see what may be the start of a FAT16 file-system. So far, so good. However, the partition table contains the string FAT32 at 0x52, and also the string mkdosfs at 0x03. I believe that in the past, mkdosfs was used on this card to create a raw FAT filesystem without any partition table. Then later, some partitioning tool was run to create the partition I mentioned above. Finally you said that Windows was used to create the FAT filesystem within the partition. However, the partitioning tool didn't wipe out the region of the MBR that contains the boot code, and hence didn't wipe out the FAT32 filesystem signature. Finally, in LBA 3 (byte offset 0x600), I see another sector that looks remarkably like the start of a (presumably long-gone) FAT filesystem. Perhaps an old partition table on this device contained a partition that started in this (non-cylinder-aligned) sector. This sector contains the same mkdosfs and FAT32 signatures. If we take your patch, we end up with the following situation: With your strange partition table: ls mmc 0 ls mmc 0:auto - Thinks there's a partition table, so works, and picks partition 1. ls mmc 0:0 - Explicit request for partition 0 (whole-disk). This option doesn't make sense here, since the whole-disk is not a file-system, but rather a partitioned device. With a real raw FAT filesystem; no partitions: ls mmc 0 ls mmc 0:auto - Thinks there's a partition table, so tries to access a non- existent partition table entryrather than the whole disk, so automatic mode fails. ls mmc 0:0 - Explicit request for partition 0 (whole-disk), so works. So the issue is that the automatic handling of raw FAT filesystems (i.e. use of the entire disk rather than the first partition) fails with your patch. Perhaps it's acceptable that people with raw FAT filesystems must explicitly specify :0 to access the whole disk, and we accept that automatic mode won't work? I'll let Tom or Wolfgang make the call. Thanks for looking into all of this. What exactly fails with this image, without this patch applied? Without Sonic's patch, if you have a disk that really contains a DOS partition table, but also with a FAT filesystem signature in the partition table's boot code area, then U-Boot will not recognize the partition table, and hence there is no way to access those partitions. There's no workaround that I know of without changing U-Boot code or disk content. With Sonic's patch, if you have a disk that contains a raw FAT filesystem, then U-Boot will consider it to have a DOS partition table (since his patch removes the condition that prevents raw FAT filesystems being considered valid partition tables), and hence this will break some aspects of the automatic mode I describe below. Historically, I believe U-Boot users have been able to type ls mmc 0 / (i.e. just specify a device and no explicit partition) and U-Boot will do the right thing. Automatic mode is supposed to work like: On a device with partitions, this automatic mode will pick the first valid partition (i.e. partition 1), and access that partition. On a device without partitions, this automatic mode will pick the entire disk and access the entire disk. Without Sonic's patch, automatic mode works in detail as: On a device with a partition table, but also having a FAT filesystem signature in the MBR boot code area, U-Boot will consider the partition table invalid, and hence the partitions can't be accessed. On a device with a partition table, but NOT
Re: [U-Boot] [PATCH v1] DOS_PBR block type is also valid dos block type.
On 03/15/2013 12:36 AM, Sonic Zhang wrote: ... We can erase the first 3 blocks completely before formatting it again. But, nothing can prevent others from formatting the SD card with different tools. Surely any tool that creates a partition table on a device when there wasn't any partition table there before (i.e. converts a raw filesystem to a partition table) should zero out the boot code area of that MBR, since there is no boot code area in a raw filesystem. This seems like a bug in whatever partitioning tool was used. If any device /always/ historically contained a real partition table, or /always/ contained a raw FAT filesystem, then there will be no issue. It's only when switching between the two, and not clearing out all the data in the MBR when doing so, that you get this problem. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] Add initial support for Wandboard dual lite and solo.
Dear Stefano Babic, In message 5143365f.5000...@denx.de you wrote: Indeed this is common code, I see it now. So yes, if we change this, it should be done as separate patch. I think debug() makes a lot of sense here to reduce the output at boot time to a reasonable minimum, but then - is there another way for the user to inquire for this information. If not, should we add it to the bdinfo output? Reset cause is a very important information - we can know if the processor gets a watchdog, or if a power on happened. The last one can address to hiddden issues with the power supply. I understand that less redundant information is better, but this is very important info and it cannot be used only if DEBUG is set. IMHO we should let it as it is - it helps us when something bad happens. I agree that it is important information, and there should be a way that the user can get at this information. But I see no urgent need to print this for everyboot, where it is just costing us precious boot time (yes, it's only a few milliseconds, but they are trivial to save). That was why I suggested to add thjis information for example to the output of the bdinfo command. BTW: if I type reset, I will get a message Reset cause: WDOG. I know why, but most users will not know thy they see a watchdog reset here, so actually this information may be more confusing than helpful in a number of cases (which is IMO one more reason to not always to display it - it saves us a number of unproductive support requests). Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de If today is the first day of the rest of your life, what the hell was yesterday? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1] DOS_PBR block type is also valid dos block type.
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 03/15/2013 01:09 PM, Stephen Warren wrote: On 03/15/2013 12:36 AM, Sonic Zhang wrote: ... We can erase the first 3 blocks completely before formatting it again. But, nothing can prevent others from formatting the SD card with different tools. Surely any tool that creates a partition table on a device when there wasn't any partition table there before (i.e. converts a raw filesystem to a partition table) should zero out the boot code area of that MBR, since there is no boot code area in a raw filesystem. This seems like a bug in whatever partitioning tool was used. If any device /always/ historically contained a real partition table, or /always/ contained a raw FAT filesystem, then there will be no issue. It's only when switching between the two, and not clearing out all the data in the MBR when doing so, that you get this problem. To me the question is, are we looking at a torture card that doesn't really contain a compliant set of choices, but happens to not fail in other cases (that don't play clever games like we do) or a really valid card and we need to make a harder choice. - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJRQ1p3AAoJENk4IS6UOR1WnqAQAKjwfCRf0o4Agn5zoEZKBiQN stPPQAbHXiIL0eHfLXfIHN13kVeM7KnN+C49jGn7s3e3y7kb3bkA/paQXcATLYIe 0oZAF0FOHJVvotuefQdZU6Nk/1flwpfNUXo0D0Lu0qQtbNnUaQwEdGy5PA4YaqkS PSRmlC/3JJHDh+bsvS9tIZBmOln1mYPJzR5VH2mnLHZbwqKN2z1hY39tPVyD0PUh 9cgcD0zhJllSr7ZgNzGXPpN6yMk36zzz2QKk6L2YzmusJYesUPiXJry1hmh/xg1R vU9TcpO3NpyxhljXzuX3soo1ED8NI/Ux0Q2Eg9SnWGJYnQkOHqAKiHgE69tOU3lF 72u1tzmXJLVEZYxKTLU9+wjoWmM2tQzXPCFVE2T2S02he801e69EPasmxfT2Jspn bqna3zCBKrsg41IUW6vXMCvWGmyxCUiPJkyq+uHv6SWDf7sgkgbLtVh/NQdhKRTH IgOmBcf4EyIcD+F0OIiZlMaqlcEG9K82O1NGRXfBI9LzeJpgco7gTyjDhrvPahxJ nH/OYJ9wnAXCl3gGiIXeoo9TxxMNMf/zACLlS6Z4fIxIoRCLvyS/tBaIGBP6Cs8k 8ckK7IU2VrT1IuCf7OS6TnEDWLWKmXOTdjoVvXRZBc2BTytj2lKZehg1es1JjWNe cb5F4wMFfMYzPApKoy3z =59H0 -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] Add initial support for Wandboard dual lite and solo.
Hi Wolfgang, On Thu, Mar 14, 2013 at 9:31 AM, Wolfgang Denk w...@denx.de wrote: +#define CONFIG_SYS_MEMTEST_START 0x1000 +#define CONFIG_SYS_MEMTEST_END 0x1001 This makes no sense. Please see doc/README.memory-test This is something that always causes me confusion. doc/README.memory-test is not available in u-boot-imx. but I looked in the archives. What is a good and safe value, I should use here? Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] Add initial support for Wandboard dual lite and solo.
On 15/03/2013 18:27, Wolfgang Denk wrote: Dear Stefano Babic, Hi Wolfgang, I agree that it is important information, and there should be a way that the user can get at this information. But I see no urgent need to print this for everyboot, where it is just costing us precious boot time (yes, it's only a few milliseconds, but they are trivial to save). That was why I suggested to add thjis information for example to the output of the bdinfo command. That is fine - but then it should be consistent. We have tried to have a consistent API between SOCs (I mean: iMX SOCs), that is, each SOC in the i.MX family should implement the same functions and not invent a new one, And the behavior must beconsistent, too. I know we are far away to be perfect, and some code can be further factorized (this was the reason to add imx_common). To the specific case, each i.MX SOC implements a get_reset_cause() function: arch/arm/cpu/arm1136/mx31/generic.c:static char *get_reset_cause(void) arch/arm/cpu/arm1136/mx31/generic.c:printf(Reset cause: %s\n, arch/arm/cpu/arm1136/mx35/generic.c:static char *get_reset_cause(void) arch/arm/cpu/arm1136/mx35/generic.c:printf(Reset cause: %s\n, get_reset_cause()); arch/arm/cpu/arm926ejs/mx25/generic.c:static char *get_reset_cause(void) arch/arm/cpu/arm926ejs/mx25/generic.c: printf(Reset cause: %s\n\n, arch/arm/imx-common/cpu.c:char *get_reset_cause(void) arch/arm/imx-common/cpu.c: printf(Reset cause: %s\n, get_reset_cause()); Checking this I see also that the mx53loco does not use general code (bad !): board/freescale/mx53loco/mx53loco.c:printf(Reset cause: %s\n, It is ok to move the information to bdinfo, but then it should not break the consistence: all i.MX should follow the same rule. This makes also easier for board maintainers to switch from a SOC to the next one, because they have to provide quite the same functions in their code (and using the same functions, too.). BTW: if I type reset, I will get a message Reset cause: WDOG. I know why, but most users will not know thy they see a watchdog reset here, so actually this information may be more confusing than helpful in a number of cases (which is IMO one more reason to not always to display it - it saves us a number of unproductive support requests). I agree with you that this should be done by a separate patchset: it is not related to the Wandboard. But if we go on this way, the same changes should be done for all i.MX, not only for i.MX5/i.MX6. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PULL] : Please pull u-boot-imx
Hi Stefano, On Fri, 15 Mar 2013 14:54:06 +0100, Stefano Babic sba...@denx.de wrote: Hi Albert, here an update pull request after applying Fabio's fixes. The following changes since commit 4cfc611b4a4ce009cfad46804bec2a1caad8e329: ARM: ns9750dev: remove remainders of dead board (2013-02-28 14:49:24 +0100) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master for you to fetch changes up to 19a0f7fa271de0345bb2df90d443c547c41e8037: nitrogen: Use unsigned long to specify the total RAM size (2013-03-15 14:39:44 +0100) Benoît Thébaudeau (6): imx: mx6q DDR3 init: Fix tMRD imx: mx6q DDR3 init: Fix tXPR imx: mx6q DDR3 init: Fix SDE_to_RST imx: mx6q DDR3 init: Fix RST_to_CKE imx: mx6q DDR3 init: Fix MR0.PPD imx: mx6q DDR3 init: Benefit from available CL = 7 Eric Nelson (8): i.MX6Q: mx6qsabre*: Configure to allow CONFIG_SYS_ALT_MEMTEST i.MX6: mx6qsabrelite: indent with tabs i.MX6: consolidate pad names for multi-CPU boards i.MX6: crm_regs: define CCM_CCGRx for use in board config files i.MX6: crm_regs: define IOMUXC_GPR4/6/7 i.MX6DL: define IOMUX pads NANDF_CS1-3 for use as GPIO i.MX6: Add DDR controller registers Add Boundary Devices Nitrogen6X boards Fabio Estevam (6): mx6: Disable Power Down Bit of watchdog mx23evk: Remove CONFIG_SYS_BAUDRATE_TABLE mx23evk: Turn on caches common: cmd_sata: Fix usage text for 'sata init' mx6: Provide a structure for accessing HDMI registers nitrogen6x: Fix RAM size variable Fadil Berisha (2): mxs: timrot: Add support to i.MX23 mxs: timrot: Rename local macros Marek Vasut (7): mxs: Reset the EMI block on mx23 mxs: mmc: spi: dma: Better wrap the MXS differences mxs: spi: Fix the MXS SPI for mx23 mxs: spi: Remove CONFIG_MXS_SPI_DMA_ENABLE mxs: Squash the header file usage in ehci-mxs mxs: Make ehci-mxs multiport capable mxs: m28: Enable power to USB port 0 Otavio Salvador (11): build: imx: Fix 'u-boot.imx' build without full OBJTREE reference mxs: Rename CONFIG_SPL_MX28_PSWITCH_WAIT to CONFIG_SPL_MXS_PSWITCH_WAIT mx23: Document the tRAS lockout setting in memory initialization mx23evk: Adjust DRAM control register to use full 128MB of RAM led: Use STATUS_LED_ON and STATUS_LED_OFF when calling __led_set mxs: Fix iomux.h to not break build during assembly stage mx23_olinuxino: Add support for status LED mx23evk: Enable USB support mx23_olinuxino: Enable USB support mx23_olinuxino: Add ethernet support mx23_olinuxino: Fix warning for implicit declaration Stefano Babic (3): Merge branch 'master' of git://git.denx.de/u-boot-arm Merge branch 'master' of git://git.denx.de/u-boot-arm USB: drop unneeded header in ehci-mx6 Stephen Warren (1): ARM: mx6: use common CPU errata config options fabio.este...@freescale.com (1): nitrogen: Use unsigned long to specify the total RAM size MAINTAINERS|8 + Makefile |4 +- arch/arm/cpu/arm926ejs/config.mk |2 +- arch/arm/cpu/arm926ejs/mxs/clock.c |3 +- arch/arm/cpu/arm926ejs/mxs/mxs_init.h |2 +- arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 16 +- arch/arm/cpu/arm926ejs/mxs/spl_power_init.c|2 +- arch/arm/cpu/arm926ejs/mxs/timer.c | 39 +- arch/arm/cpu/armv7/Makefile|2 +- arch/arm/cpu/armv7/config.mk |2 +- arch/arm/cpu/armv7/mx6/Makefile|1 - arch/arm/cpu/armv7/mx6/lowlevel_init.S | 35 - arch/arm/cpu/armv7/mx6/soc.c | 16 + arch/arm/include/asm/arch-mx6/crm_regs.h | 12 + arch/arm/include/asm/arch-mx6/imx-regs.h |8 + arch/arm/include/asm/arch-mx6/iomux.h |5 + arch/arm/include/asm/arch-mx6/mx6-ddr.h| 85 + arch/arm/include/asm/arch-mx6/mx6-pins.h | 31 + arch/arm/include/asm/arch-mx6/mx6dl-ddr.h | 71 + arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 193 +-- arch/arm/include/asm/arch-mx6/mx6q-ddr.h | 69 + arch/arm/include/asm/arch-mx6/mx6q_pins.h | 1671 arch/arm/include/asm/arch-mx6/mx6x_pins.h | 1671 arch/arm/include/asm/arch-mx6/mxc_hdmi.h | 1083 ++--- arch/arm/include/asm/arch-mxs/dma.h| 19 +- arch/arm/include/asm/arch-mxs/imx-regs.h |2 + arch/arm/include/asm/arch-mxs/iomux.h |5 + arch/arm/include/asm/arch-mxs/regs-ssp.h
Re: [U-Boot] Uboot support for MT29F2G16ABBEAH4 NAND 16 bit
On 03/14/2013 05:52:57 PM, mar...@netopen.com.br wrote: Hi has Anybody managed to load the Linux Kernel using MT29F2G16ABBEAH4 NAND or other 16 bits NAND memory? I haven't personally, but there's no general reason why 16-bit NAND shouldn't work in U-Boot. Some NAND controllers or drivers don't support it, though -- which controller are you using? -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 0/9] Add TI814x EVM Support
This series adds support for the PG1.0 TI814x EVM board. TI814x
fits into the existing AM33XX SoC support with some refactoring
of the AM33XX-specific emif4, clock, and mux code.
It has been tested booting up a Linux kernel and regression tested
on BeagleBone and EVM-SK AM33XX boards. It has also been MAKEALL
tested for all am33xx platforms.
The series applies on top of the add required includes patch from
Tom Rini at http://patchwork.ozlabs.org/patch/227804/
Changes since v3:
- Fix pcm051 build breakage
- Fix unused variable warning in emif4 support
- Remove unused includes (fixed by required includes patch)
- Remove unused CONFIG_FS_* options (fixed by above patch)
Changes since v2:
- Fix EMIF/L3F clock enable ordering issue
Changes since v1:
- Fix warnings in ddr.c
- Split hardware.h - hardware_am33xx.h/ti814x.h
- Remove unused dmtimer support
- Add register structs bit definitions
- Rename soc-specific clock files for consistency
- Move soc-specific defs only used in one place to clock_*.c
- fix copyright dates and filenames in headers
- remove clocks_*.h and go back to clock.h
- Rename mux includes for consistency
- Correct mmc reference clock for ti814x
- Squash MAINTAINERS and build bits to board support commit
- Config fixes (copyright, mtest, findfdt, fs options, cleanups)
- Fix wdtimer warning
Matt Porter (9):
am33xx: convert defines from am33xx-specific to generic names
am33xx: refactor emif4/ddr to support multiple EMIF instances
am33xx: refactor am33xx clocks and add ti814x support
am33xx: refactor am33xx mux support and add ti814x support
am33xx: add ti814x specific register definitions
am33xx: add dmm support to emif4 library
am33xx: support ti814x mmc reference clock
ns16550: enable quirks for ti814x
ti814x_evm: add ti814x evm board support
MAINTAINERS|4 +
Makefile |2 +-
arch/arm/cpu/armv7/Makefile|2 +-
arch/arm/cpu/armv7/am33xx/Makefile |3 +-
arch/arm/cpu/armv7/am33xx/board.c |4 +-
.../cpu/armv7/am33xx/{clock.c = clock_am33xx.c} | 34 +-
arch/arm/cpu/armv7/am33xx/clock_ti814x.c | 406
arch/arm/cpu/armv7/am33xx/ddr.c| 99 +++--
arch/arm/cpu/armv7/am33xx/emif4.c | 57 ++-
arch/arm/cpu/armv7/am33xx/sys_info.c |3 +
arch/arm/cpu/armv7/omap-common/Makefile|2 +-
arch/arm/include/asm/arch-am33xx/clock.h |2 +-
arch/arm/include/asm/arch-am33xx/clocks_am33xx.h | 33 +-
arch/arm/include/asm/arch-am33xx/cpu.h | 11 +-
arch/arm/include/asm/arch-am33xx/ddr_defs.h| 57 ++-
arch/arm/include/asm/arch-am33xx/hardware.h| 40 +-
arch/arm/include/asm/arch-am33xx/hardware_am33xx.h | 54 +++
arch/arm/include/asm/arch-am33xx/hardware_ti814x.h | 53 +++
arch/arm/include/asm/arch-am33xx/mmc_host_def.h|4 +
arch/arm/include/asm/arch-am33xx/mux.h | 235 +--
arch/arm/include/asm/arch-am33xx/mux_am33xx.h | 247
arch/arm/include/asm/arch-am33xx/mux_ti814x.h | 311 +++
arch/arm/include/asm/arch-am33xx/omap.h|5 +
arch/arm/include/asm/arch-am33xx/spl.h |5 +
board/phytec/pcm051/board.c|8 +-
board/ti/am335x/board.c| 12 +-
board/ti/ti814x/Makefile | 46 +++
board/ti/ti814x/evm.c | 198 ++
board/ti/ti814x/evm.h |7 +
board/ti/ti814x/mux.c | 51 +++
boards.cfg |1 +
drivers/serial/ns16550.c |5 +-
include/configs/ti814x_evm.h | 220 +++
spl/Makefile |2 +-
34 files changed, 1851 insertions(+), 372 deletions(-)
rename arch/arm/cpu/armv7/am33xx/{clock.c = clock_am33xx.c} (91%)
create mode 100644 arch/arm/cpu/armv7/am33xx/clock_ti814x.c
create mode 100644 arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
create mode 100644 arch/arm/include/asm/arch-am33xx/hardware_ti814x.h
create mode 100644 arch/arm/include/asm/arch-am33xx/mux_am33xx.h
create mode 100644 arch/arm/include/asm/arch-am33xx/mux_ti814x.h
create mode 100644 board/ti/ti814x/Makefile
create mode 100644 board/ti/ti814x/evm.c
create mode 100644 board/ti/ti814x/evm.h
create mode 100644 board/ti/ti814x/mux.c
create mode 100644 include/configs/ti814x_evm.h
--
1.7.9.5
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[U-Boot] [PATCH v4 1/9] am33xx: convert defines from am33xx-specific to generic names
Eliminate AM33xx specific names to prepare for TI814x support
within AM33xx-land.
Signed-off-by: Matt Porter mpor...@ti.com
Reviewed-by: Tom Rini tr...@ti.com
---
v4: fix pcm051 build breakage
v3: no changes
v2: no changes
---
arch/arm/cpu/armv7/am33xx/board.c |4 ++--
arch/arm/include/asm/arch-am33xx/hardware.h | 10 +-
board/phytec/pcm051/board.c |6 +++---
board/ti/am335x/board.c |6 +++---
4 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c
b/arch/arm/cpu/armv7/am33xx/board.c
index ab31326..b186b32 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -141,11 +141,11 @@ int arch_misc_init(void)
{
#ifdef CONFIG_AM335X_USB0
musb_register(otg0_plat, otg0_board_data,
- (void *)AM335X_USB0_OTG_BASE);
+ (void *)USB0_OTG_BASE);
#endif
#ifdef CONFIG_AM335X_USB1
musb_register(otg1_plat, otg1_board_data,
- (void *)AM335X_USB1_OTG_BASE);
+ (void *)USB1_OTG_BASE);
#endif
return 0;
}
diff --git a/arch/arm/include/asm/arch-am33xx/hardware.h
b/arch/arm/include/asm/arch-am33xx/hardware.h
index 6dd3296..7016e25 100644
--- a/arch/arm/include/asm/arch-am33xx/hardware.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware.h
@@ -84,14 +84,14 @@
#define GPMC_BASE 0x5000
/* CPSW Config space */
-#define AM335X_CPSW_BASE 0x4A10
-#define AM335X_CPSW_MDIO_BASE 0x4A101000
+#define CPSW_BASE 0x4A10
+#define CPSW_MDIO_BASE 0x4A101000
/* RTC base address */
-#define AM335X_RTC_BASE0x44E3E000
+#define RTC_BASE 0x44E3E000
/* OTG */
-#define AM335X_USB0_OTG_BASE 0x47401000
-#define AM335X_USB1_OTG_BASE 0x47401800
+#define USB0_OTG_BASE 0x47401000
+#define USB1_OTG_BASE 0x47401800
#endif /* __AM33XX_HARDWARE_H */
diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c
index 55bc018..471725a 100644
--- a/board/phytec/pcm051/board.c
+++ b/board/phytec/pcm051/board.c
@@ -61,7 +61,7 @@ static struct ctrl_dev *cdev = (struct ctrl_dev
*)CTRL_DEVICE_BASE;
static void rtc32k_enable(void)
{
- struct rtc_regs *rtc = (struct rtc_regs *)AM335X_RTC_BASE;
+ struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE;
/*
* Unlock the RTC's registers. For more details please see the
@@ -199,8 +199,8 @@ static struct cpsw_slave_data cpsw_slaves[] = {
};
static struct cpsw_platform_data cpsw_data = {
- .mdio_base = AM335X_CPSW_MDIO_BASE,
- .cpsw_base = AM335X_CPSW_BASE,
+ .mdio_base = CPSW_MDIO_BASE,
+ .cpsw_base = CPSW_BASE,
.mdio_div = 0xff,
.channels = 8,
.cpdma_reg_ofs = 0x800,
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 48e6896..0948889 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -134,7 +134,7 @@ static int read_eeprom(void)
static void rtc32k_enable(void)
{
- struct rtc_regs *rtc = (struct rtc_regs *)AM335X_RTC_BASE;
+ struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE;
/*
* Unlock the RTC's registers. For more details please see the
@@ -411,8 +411,8 @@ static struct cpsw_slave_data cpsw_slaves[] = {
};
static struct cpsw_platform_data cpsw_data = {
- .mdio_base = AM335X_CPSW_MDIO_BASE,
- .cpsw_base = AM335X_CPSW_BASE,
+ .mdio_base = CPSW_MDIO_BASE,
+ .cpsw_base = CPSW_BASE,
.mdio_div = 0xff,
.channels = 8,
.cpdma_reg_ofs = 0x800,
--
1.7.9.5
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[U-Boot] [PATCH v4 2/9] am33xx: refactor emif4/ddr to support multiple EMIF instances
The AM33xx emif4/ddr support closely matches what is need to support
TI814x except that TI814x has two EMIF instances. Refactor all the
emif4 helper calls and the config_ddr() init function to use an
additional instance number argument.
Signed-off-by: Matt Porter mpor...@ti.com
Reviewed-by: Tom Rini tr...@ti.com
---
v4:
* fix unused variable warning
* fix pcm051 build breakage
v3: no change
v2:
* fix bad cast causing ddr.c warnings
* Split hardware.h - hardware_am33xx.h/ti814x.h
---
arch/arm/cpu/armv7/am33xx/ddr.c| 99
arch/arm/cpu/armv7/am33xx/emif4.c | 40
arch/arm/include/asm/arch-am33xx/ddr_defs.h| 52 --
arch/arm/include/asm/arch-am33xx/hardware.h| 13 ++-
arch/arm/include/asm/arch-am33xx/hardware_am33xx.h | 30 ++
arch/arm/include/asm/arch-am33xx/hardware_ti814x.h | 30 ++
board/phytec/pcm051/board.c|2 +-
board/ti/am335x/board.c|6 +-
8 files changed, 200 insertions(+), 72 deletions(-)
create mode 100644 arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
create mode 100644 arch/arm/include/asm/arch-am33xx/hardware_ti814x.h
diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c
index fd9fc4a..4b771c8 100644
--- a/arch/arm/cpu/armv7/am33xx/ddr.c
+++ b/arch/arm/cpu/armv7/am33xx/ddr.c
@@ -24,15 +24,20 @@ http://www.ti.com/
/**
* Base address for EMIF instances
*/
-static struct emif_reg_struct *emif_reg = {
- (struct emif_reg_struct *)EMIF4_0_CFG_BASE};
+static struct emif_reg_struct *emif_reg[2] = {
+ (struct emif_reg_struct *)EMIF4_0_CFG_BASE,
+ (struct emif_reg_struct *)EMIF4_1_CFG_BASE};
/**
- * Base address for DDR instance
+ * Base addresses for DDR PHY cmd/data regs
*/
-static struct ddr_regs *ddr_reg[2] = {
- (struct ddr_regs *)DDR_PHY_BASE_ADDR,
- (struct ddr_regs *)DDR_PHY_BASE_ADDR2};
+static struct ddr_cmd_regs *ddr_cmd_reg[2] = {
+ (struct ddr_cmd_regs *)DDR_PHY_CMD_ADDR,
+ (struct ddr_cmd_regs *)DDR_PHY_CMD_ADDR2};
+
+static struct ddr_data_regs *ddr_data_reg[2] = {
+ (struct ddr_data_regs *)DDR_PHY_DATA_ADDR,
+ (struct ddr_data_regs *)DDR_PHY_DATA_ADDR2};
/**
* Base address for ddr io control instances
@@ -43,70 +48,84 @@ static struct ddr_cmdtctrl *ioctrl_reg = {
/**
* Configure SDRAM
*/
-void config_sdram(const struct emif_regs *regs)
+void config_sdram(const struct emif_regs *regs, int nr)
{
- writel(regs-ref_ctrl, emif_reg-emif_sdram_ref_ctrl);
- writel(regs-ref_ctrl, emif_reg-emif_sdram_ref_ctrl_shdw);
+ writel(regs-ref_ctrl, emif_reg[nr]-emif_sdram_ref_ctrl);
+ writel(regs-ref_ctrl, emif_reg[nr]-emif_sdram_ref_ctrl_shdw);
if (regs-zq_config){
- writel(regs-zq_config, emif_reg-emif_zq_config);
+ writel(regs-zq_config, emif_reg[nr]-emif_zq_config);
writel(regs-sdram_config, cstat-secure_emif_sdram_config);
}
- writel(regs-sdram_config, emif_reg-emif_sdram_config);
+ writel(regs-sdram_config, emif_reg[nr]-emif_sdram_config);
}
/**
* Set SDRAM timings
*/
-void set_sdram_timings(const struct emif_regs *regs)
+void set_sdram_timings(const struct emif_regs *regs, int nr)
{
- writel(regs-sdram_tim1, emif_reg-emif_sdram_tim_1);
- writel(regs-sdram_tim1, emif_reg-emif_sdram_tim_1_shdw);
- writel(regs-sdram_tim2, emif_reg-emif_sdram_tim_2);
- writel(regs-sdram_tim2, emif_reg-emif_sdram_tim_2_shdw);
- writel(regs-sdram_tim3, emif_reg-emif_sdram_tim_3);
- writel(regs-sdram_tim3, emif_reg-emif_sdram_tim_3_shdw);
+ writel(regs-sdram_tim1, emif_reg[nr]-emif_sdram_tim_1);
+ writel(regs-sdram_tim1, emif_reg[nr]-emif_sdram_tim_1_shdw);
+ writel(regs-sdram_tim2, emif_reg[nr]-emif_sdram_tim_2);
+ writel(regs-sdram_tim2, emif_reg[nr]-emif_sdram_tim_2_shdw);
+ writel(regs-sdram_tim3, emif_reg[nr]-emif_sdram_tim_3);
+ writel(regs-sdram_tim3, emif_reg[nr]-emif_sdram_tim_3_shdw);
}
/**
* Configure DDR PHY
*/
-void config_ddr_phy(const struct emif_regs *regs)
+void config_ddr_phy(const struct emif_regs *regs, int nr)
{
- writel(regs-emif_ddr_phy_ctlr_1, emif_reg-emif_ddr_phy_ctrl_1);
- writel(regs-emif_ddr_phy_ctlr_1, emif_reg-emif_ddr_phy_ctrl_1_shdw);
+ writel(regs-emif_ddr_phy_ctlr_1,
+ emif_reg[nr]-emif_ddr_phy_ctrl_1);
+ writel(regs-emif_ddr_phy_ctlr_1,
+ emif_reg[nr]-emif_ddr_phy_ctrl_1_shdw);
}
/**
* Configure DDR CMD control registers
*/
-void config_cmd_ctrl(const struct cmd_control *cmd)
+void config_cmd_ctrl(const struct cmd_control *cmd,
[U-Boot] [PATCH v4 3/9] am33xx: refactor am33xx clocks and add ti814x support
Split clock.c for am335x and ti814x and add ti814x specific
clock support.
Signed-off-by: Matt Porter mpor...@ti.com
---
v4: no changes
v3:
* Fix EMIF/L3F clock enable ordering issue
(Exposed on UART boot with hang at check for L3F enabled)
v2:
* remove unused dmtimer support
* add register structs bit definitions
* rename soc-specific clock files for consistency
* move ti814x specific defs to clock_ti814x.c
* move am335x specific defs to clock_am335x.c
* fix copyright date
* remove clocks_*.h and go back to clock.h
---
arch/arm/cpu/armv7/am33xx/Makefile |3 +-
.../cpu/armv7/am33xx/{clock.c = clock_am33xx.c} | 34 +-
arch/arm/cpu/armv7/am33xx/clock_ti814x.c | 406
arch/arm/include/asm/arch-am33xx/clock.h |2 +-
arch/arm/include/asm/arch-am33xx/clocks_am33xx.h | 33 +-
5 files changed, 443 insertions(+), 35 deletions(-)
rename arch/arm/cpu/armv7/am33xx/{clock.c = clock_am33xx.c} (91%)
create mode 100644 arch/arm/cpu/armv7/am33xx/clock_ti814x.c
diff --git a/arch/arm/cpu/armv7/am33xx/Makefile
b/arch/arm/cpu/armv7/am33xx/Makefile
index 70c443e..c97e30d 100644
--- a/arch/arm/cpu/armv7/am33xx/Makefile
+++ b/arch/arm/cpu/armv7/am33xx/Makefile
@@ -16,7 +16,8 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
-COBJS += clock.o
+COBJS-$(CONFIG_AM33XX) += clock_am33xx.o
+COBJS-$(CONFIG_TI814X) += clock_ti814x.o
COBJS += sys_info.o
COBJS += mem.o
COBJS += ddr.o
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c
b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c
similarity index 91%
rename from arch/arm/cpu/armv7/am33xx/clock.c
rename to arch/arm/cpu/armv7/am33xx/clock_am33xx.c
index d7d98d1..65cb9f8 100644
--- a/arch/arm/cpu/armv7/am33xx/clock.c
+++ b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c
@@ -1,9 +1,9 @@
/*
- * clock.c
+ * clock_am33xx.c
*
* clocks for AM33XX based boards
*
- * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+ * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -42,6 +42,36 @@
#define CPGMAC0_IDLE 0x3
#define DPLL_CLKDCOLDO_GATE_CTRL0x300
+#define OSC(V_OSCK/100)
+
+/* MAIN PLL Fdll = 550 MHZ, */
+#define MPUPLL_M 550
+#define MPUPLL_N (OSC-1)
+#define MPUPLL_M2 1
+
+/* Core PLL Fdll = 1 GHZ, */
+#define COREPLL_M 1000
+#define COREPLL_N (OSC-1)
+
+#define COREPLL_M4 10 /* CORE_CLKOUTM4 = 200 MHZ */
+#define COREPLL_M5 8 /* CORE_CLKOUTM5 = 250 MHZ */
+#define COREPLL_M6 4 /* CORE_CLKOUTM6 = 500 MHZ */
+
+/*
+ * USB PHY clock is 960 MHZ. Since, this comes directly from Fdll, Fdll
+ * frequency needs to be set to 960 MHZ. Hence,
+ * For clkout = 192 MHZ, Fdll = 960 MHZ, divider values are given below
+ */
+#define PERPLL_M 960
+#define PERPLL_N (OSC-1)
+#define PERPLL_M2 5
+
+/* DDR Freq is 266 MHZ for now */
+/* Set Fdll = 400 MHZ , Fdll = M * 2 * CLKINP/ N + 1; clkout = Fdll /(2 * M2)
*/
+#define DDRPLL_M 266
+#define DDRPLL_N (OSC-1)
+#define DDRPLL_M2 1
+
const struct cm_perpll *cmper = (struct cm_perpll *)CM_PER;
const struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP;
const struct cm_dpll *cmdpll = (struct cm_dpll *)CM_DPLL;
diff --git a/arch/arm/cpu/armv7/am33xx/clock_ti814x.c
b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c
new file mode 100644
index 000..cb4210f
--- /dev/null
+++ b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c
@@ -0,0 +1,406 @@
+/*
+ * clock_ti814x.c
+ *
+ * Clocks for TI814X based boards
+ *
+ * Copyright (C) 2013, Texas Instruments, Incorporated
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include common.h
+#include asm/arch/cpu.h
+#include asm/arch/clock.h
+#include asm/arch/hardware.h
+#include asm/io.h
+
+/* PRCM */
+#define PRCM_MOD_EN0x2
+
+/* CLK_SRC */
+#define OSC_SRC0 0
+#define OSC_SRC1 1
+
+#define L3_OSC_SRC OSC_SRC0
+
+#define OSC_0_FREQ 20
+
+#define DCO_HS2_MIN500
+#define DCO_HS2_MAX1000
+#define DCO_HS1_MIN1000
+#define DCO_HS1_MAX2000
+
+#define SELFREQDCO_HS2 0x0801
+#define SELFREQDCO_HS1 0x1001
+
+#define MPU_N 0x1
+#define MPU_M
[U-Boot] [PATCH v4 4/9] am33xx: refactor am33xx mux support and add ti814x support
AM33XX and TI814X have a similar mux though the pinmux register
layout and address space differ. Add a separate ti814x mux include
to support the TI814X-specific differences.
Signed-off-by: Matt Porter mpor...@ti.com
Reviewed-by: Tom Rini tr...@ti.com
Acked-by: Peter Korsgaard jac...@sunsite.dk
---
v4: no changes
v3: no changes
v2:
* fixed copyright date and file header
* rename split mux includes for consistency
---
arch/arm/include/asm/arch-am33xx/mux.h| 235 +--
arch/arm/include/asm/arch-am33xx/mux_am33xx.h | 247
arch/arm/include/asm/arch-am33xx/mux_ti814x.h | 311 +
3 files changed, 566 insertions(+), 227 deletions(-)
create mode 100644 arch/arm/include/asm/arch-am33xx/mux_am33xx.h
create mode 100644 arch/arm/include/asm/arch-am33xx/mux_ti814x.h
diff --git a/arch/arm/include/asm/arch-am33xx/mux.h
b/arch/arm/include/asm/arch-am33xx/mux.h
index 460ac1c..1c6b65f 100644
--- a/arch/arm/include/asm/arch-am33xx/mux.h
+++ b/arch/arm/include/asm/arch-am33xx/mux.h
@@ -1,7 +1,7 @@
/*
* mux.h
*
- * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -19,234 +19,15 @@
#include common.h
#include asm/io.h
-#define MUX_CFG(value, offset) \
- __raw_writel(value, (CTRL_BASE + offset));
-
-/* PAD Control Fields */
-#define SLEWCTRL (0x1 6)
-#define RXACTIVE (0x1 5)
-#define PULLDOWN_EN(0x0 4) /* Pull Down Selection */
-#define PULLUP_EN (0x1 4) /* Pull Up Selection */
-#define PULLUDEN (0x0 3) /* Pull up enabled */
-#define PULLUDDIS (0x1 3) /* Pull up disabled */
-#define MODE(val) val /* used for Readability */
-
-/*
- * PAD CONTROL OFFSETS
- * Field names corresponds to the pad signal name
- */
-struct pad_signals {
- int gpmc_ad0;
- int gpmc_ad1;
- int gpmc_ad2;
- int gpmc_ad3;
- int gpmc_ad4;
- int gpmc_ad5;
- int gpmc_ad6;
- int gpmc_ad7;
- int gpmc_ad8;
- int gpmc_ad9;
- int gpmc_ad10;
- int gpmc_ad11;
- int gpmc_ad12;
- int gpmc_ad13;
- int gpmc_ad14;
- int gpmc_ad15;
- int gpmc_a0;
- int gpmc_a1;
- int gpmc_a2;
- int gpmc_a3;
- int gpmc_a4;
- int gpmc_a5;
- int gpmc_a6;
- int gpmc_a7;
- int gpmc_a8;
- int gpmc_a9;
- int gpmc_a10;
- int gpmc_a11;
- int gpmc_wait0;
- int gpmc_wpn;
- int gpmc_be1n;
- int gpmc_csn0;
- int gpmc_csn1;
- int gpmc_csn2;
- int gpmc_csn3;
- int gpmc_clk;
- int gpmc_advn_ale;
- int gpmc_oen_ren;
- int gpmc_wen;
- int gpmc_be0n_cle;
- int lcd_data0;
- int lcd_data1;
- int lcd_data2;
- int lcd_data3;
- int lcd_data4;
- int lcd_data5;
- int lcd_data6;
- int lcd_data7;
- int lcd_data8;
- int lcd_data9;
- int lcd_data10;
- int lcd_data11;
- int lcd_data12;
- int lcd_data13;
- int lcd_data14;
- int lcd_data15;
- int lcd_vsync;
- int lcd_hsync;
- int lcd_pclk;
- int lcd_ac_bias_en;
- int mmc0_dat3;
- int mmc0_dat2;
- int mmc0_dat1;
- int mmc0_dat0;
- int mmc0_clk;
- int mmc0_cmd;
- int mii1_col;
- int mii1_crs;
- int mii1_rxerr;
- int mii1_txen;
- int mii1_rxdv;
- int mii1_txd3;
- int mii1_txd2;
- int mii1_txd1;
- int mii1_txd0;
- int mii1_txclk;
- int mii1_rxclk;
- int mii1_rxd3;
- int mii1_rxd2;
- int mii1_rxd1;
- int mii1_rxd0;
- int rmii1_refclk;
- int mdio_data;
- int mdio_clk;
- int spi0_sclk;
- int spi0_d0;
- int spi0_d1;
- int spi0_cs0;
- int spi0_cs1;
- int ecap0_in_pwm0_out;
- int uart0_ctsn;
- int uart0_rtsn;
- int uart0_rxd;
- int uart0_txd;
- int uart1_ctsn;
- int uart1_rtsn;
- int uart1_rxd;
- int uart1_txd;
- int i2c0_sda;
- int i2c0_scl;
- int mcasp0_aclkx;
- int mcasp0_fsx;
- int mcasp0_axr0;
- int mcasp0_ahclkr;
- int mcasp0_aclkr;
- int mcasp0_fsr;
- int mcasp0_axr1;
- int mcasp0_ahclkx;
- int xdma_event_intr0;
- int xdma_event_intr1;
- int nresetin_out;
- int porz;
- int nnmi;
- int osc0_in;
- int osc0_out;
- int rsvd1;
- int tms;
- int tdi;
- int tdo;
- int tck;
- int ntrst;
- int emu0;
- int emu1;
- int osc1_in;
- int osc1_out;
- int pmic_power_en;
- int rtc_porz;
- int rsvd2;
- int ext_wakeup;
- int enz_kaldo_1p8v;
[U-Boot] [PATCH v4 5/9] am33xx: add ti814x specific register definitions
Support the ti814x specific register definitions within arch-am33xx. Signed-off-by: Matt Porter mpor...@ti.com Reviewed-by: Tom Rini tr...@ti.com --- v4: Removed config.h from omap.h v3: no changes v2: Update for hardware.h split --- arch/arm/cpu/armv7/am33xx/sys_info.c |3 +++ arch/arm/include/asm/arch-am33xx/cpu.h | 11 + arch/arm/include/asm/arch-am33xx/hardware.h| 21 - arch/arm/include/asm/arch-am33xx/hardware_am33xx.h | 24 arch/arm/include/asm/arch-am33xx/hardware_ti814x.h | 23 +++ arch/arm/include/asm/arch-am33xx/omap.h|5 arch/arm/include/asm/arch-am33xx/spl.h |5 7 files changed, 71 insertions(+), 21 deletions(-) diff --git a/arch/arm/cpu/armv7/am33xx/sys_info.c b/arch/arm/cpu/armv7/am33xx/sys_info.c index 507b618..402127c 100644 --- a/arch/arm/cpu/armv7/am33xx/sys_info.c +++ b/arch/arm/cpu/armv7/am33xx/sys_info.c @@ -98,6 +98,9 @@ int print_cpuinfo(void) case AM335X: cpu_s = AM335X; break; + case TI81XX: + cpu_s = TI81XX; + break; default: cpu_s = Unknown cpu type; break; diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index 16e8a80..3d3a7c8 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -42,9 +42,10 @@ #define HS_DEVICE 0x2 #define GP_DEVICE 0x3 -/* cpu-id for AM33XX family */ +/* cpu-id for AM33XX and TI81XX family */ #define AM335X 0xB944 -#define DEVICE_ID 0x44E10600 +#define TI81XX 0xB81E +#define DEVICE_ID (CTRL_BASE + 0x0600) /* This gives the status of the boot mode pins on the evm */ #define SYSBOOT_MASK (BIT(0) | BIT(1) | BIT(2)\ @@ -52,9 +53,11 @@ /* Reset control */ #ifdef CONFIG_AM33XX -#define PRM_RSTCTRL0x44E00F00 -#define PRM_RSTST 0x44E00F08 +#define PRM_RSTCTRL(PRCM_BASE + 0x0F00) +#elif defined(CONFIG_TI814X) +#define PRM_RSTCTRL(PRCM_BASE + 0x00A0) #endif +#define PRM_RSTST (PRM_RSTCTRL + 8) #define PRM_RSTCTRL_RESET 0x01 #define PRM_RSTST_WARM_RESET_MASK 0x232 diff --git a/arch/arm/include/asm/arch-am33xx/hardware.h b/arch/arm/include/asm/arch-am33xx/hardware.h index 24a9b8d..5a27f9c 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware.h +++ b/arch/arm/include/asm/arch-am33xx/hardware.h @@ -19,6 +19,7 @@ #ifndef __AM33XX_HARDWARE_H #define __AM33XX_HARDWARE_H +#include config.h #include asm/arch/omap.h #ifdef CONFIG_AM33XX #include asm/arch/hardware_am33xx.h @@ -26,8 +27,9 @@ #include asm/arch/hardware_ti814x.h #endif -/* Module base addresses */ -#define UART0_BASE 0x44E09000 +/* + * Common hardware definitions + */ /* DM Timer base addresses */ #define DM_TIMER0_BASE 0x4802C000 @@ -42,21 +44,10 @@ /* GPIO Base address */ #define GPIO0_BASE 0x48032000 #define GPIO1_BASE 0x4804C000 -#define GPIO2_BASE 0x481AC000 /* BCH Error Location Module */ #define ELM_BASE 0x4808 -/* Watchdog Timer */ -#define WDT_BASE 0x44E35000 - -/* Control Module Base Address */ -#define CTRL_BASE 0x44E1 -#define CTRL_DEVICE_BASE 0x44E10600 - -/* PRCM Base Address */ -#define PRCM_BASE 0x44E0 - /* EMIF Base address */ #define EMIF4_0_CFG_BASE 0x4C00 #define EMIF4_1_CFG_BASE 0x4D00 @@ -90,10 +81,6 @@ /* CPSW Config space */ #define CPSW_BASE 0x4A10 -#define CPSW_MDIO_BASE 0x4A101000 - -/* RTC base address */ -#define RTC_BASE 0x44E3E000 /* OTG */ #define USB0_OTG_BASE 0x47401000 diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h index 7a4070c..fa02f19 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h +++ b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h @@ -19,6 +19,24 @@ #ifndef __AM33XX_HARDWARE_AM33XX_H #define __AM33XX_HARDWARE_AM33XX_H +/* Module base addresses */ + +/* UART Base Address */ +#define UART0_BASE 0x44E09000 + +/* GPIO Base address */ +#define GPIO2_BASE 0x481AC000 + +/* Watchdog Timer */ +#define WDT_BASE 0x44E35000 + +/* Control Module Base Address */ +#define CTRL_BASE 0x44E1 +#define CTRL_DEVICE_BASE 0x44E10600 + +/* PRCM Base Address */ +#define PRCM_BASE 0x44E0 + /*
[U-Boot] [PATCH v4 7/9] am33xx: support ti814x mmc reference clock
TI814x has a 192MHz hsmmc reference clock. Select that clock rate
when building for TI814x.
Signed-off-by: Matt Porter mpor...@ti.com
---
v4: no changes
v3: no changes
v2: no changes, new to the series
---
arch/arm/include/asm/arch-am33xx/mmc_host_def.h |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h
b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h
index 1f597c0..e0a3b8b 100644
--- a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h
+++ b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h
@@ -153,7 +153,11 @@ typedef struct hsmmc {
#define MMC_CMD0 (INDEX(0) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE)
/* Clock Configurations and Macros */
+#ifdef CONFIG_AM33XX
#define MMC_CLOCK_REFERENCE96 /* MHz */
+#elif defined(CONFIG_TI814X)
+#define MMC_CLOCK_REFERENCE192 /* MHz */
+#endif
#define mmc_reg_out(addr, mask, val)\
writel((readl(addr) (~(mask))) | ((val) (mask)), (addr))
--
1.7.9.5
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[U-Boot] [PATCH v4 6/9] am33xx: add dmm support to emif4 library
Adds a config_dmm() routine to support TI814X DMM configuration.
Signed-off-by: Matt Porter mpor...@ti.com
Reviewed-by: Tom Rini tr...@ti.com
---
v4: no changes
v3: no changes
v2: no changes
---
arch/arm/cpu/armv7/am33xx/emif4.c | 17 +
arch/arm/include/asm/arch-am33xx/ddr_defs.h |5 +
2 files changed, 22 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c
b/arch/arm/cpu/armv7/am33xx/emif4.c
index 76459d8..aa84e96 100644
--- a/arch/arm/cpu/armv7/am33xx/emif4.c
+++ b/arch/arm/cpu/armv7/am33xx/emif4.c
@@ -44,6 +44,8 @@ void dram_init_banksize(void)
#ifdef CONFIG_SPL_BUILD
+static struct dmm_lisa_map_regs *hw_lisa_map_regs =
+ (struct dmm_lisa_map_regs *)DMM_BASE;
static struct vtp_reg *vtpreg[2] = {
(struct vtp_reg *)VTP0_CTRL_ADDR,
(struct vtp_reg *)VTP1_CTRL_ADDR};
@@ -51,6 +53,21 @@ static struct vtp_reg *vtpreg[2] = {
static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
#endif
+void config_dmm(const struct dmm_lisa_map_regs *regs)
+{
+ enable_dmm_clocks();
+
+ writel(0, hw_lisa_map_regs-dmm_lisa_map_3);
+ writel(0, hw_lisa_map_regs-dmm_lisa_map_2);
+ writel(0, hw_lisa_map_regs-dmm_lisa_map_1);
+ writel(0, hw_lisa_map_regs-dmm_lisa_map_0);
+
+ writel(regs-dmm_lisa_map_3, hw_lisa_map_regs-dmm_lisa_map_3);
+ writel(regs-dmm_lisa_map_2, hw_lisa_map_regs-dmm_lisa_map_2);
+ writel(regs-dmm_lisa_map_1, hw_lisa_map_regs-dmm_lisa_map_1);
+ writel(regs-dmm_lisa_map_0, hw_lisa_map_regs-dmm_lisa_map_0);
+}
+
static void config_vtp(int nr)
{
writel(readl(vtpreg[nr]-vtp0ctrlreg) | VTP_CTRL_ENABLE,
diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index 1cbadff..15ca4c1 100644
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -100,6 +100,11 @@
#define MT41J512M8RH125_IOCTRL_VALUE 0x18B
/**
+ * Configure DMM
+ */
+void config_dmm(const struct dmm_lisa_map_regs *regs);
+
+/**
* Configure SDRAM
*/
void config_sdram(const struct emif_regs *regs, int nr);
--
1.7.9.5
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[U-Boot] [PATCH v4 8/9] ns16550: enable quirks for ti814x
TI814X requires the same quirks as AM33XX to be enabled. Signed-off-by: Matt Porter mpor...@ti.com Reviewed-by: Tom Rini tr...@ti.com --- v4: no changes v3: no changes v2: no changes --- drivers/serial/ns16550.c |5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 87a0917..02bc85b 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -43,7 +43,7 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) serial_out(CONFIG_SYS_NS16550_IER, com_port-ier); #if (defined(CONFIG_OMAP) !defined(CONFIG_OMAP3_ZOOM2)) || \ - defined(CONFIG_AM33XX) + defined(CONFIG_AM33XX) || defined(CONFIG_TI814X) serial_out(0x7, com_port-mdr1); /* mode select reset TL16C750*/ #endif serial_out(UART_LCR_BKSE | UART_LCRVAL, (ulong)com_port-lcr); @@ -57,7 +57,8 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) serial_out((baud_divisor 8) 0xff, com_port-dlm); serial_out(UART_LCRVAL, com_port-lcr); #if (defined(CONFIG_OMAP) !defined(CONFIG_OMAP3_ZOOM2)) || \ - defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) + defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \ + defined(CONFIG_TI814X) #if defined(CONFIG_APTIX) /* /13 mode so Aptix 6MHz can hit 115200 */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 9/9] ti814x_evm: add ti814x evm board support
Add TI814X EVM board directory, config file, and MAINTAINERS entry. Enable build. Signed-off-by: Matt Porter mpor...@ti.com Reviewed-by: Tom Rini tr...@ti.com --- v4: * Removed unused include * Removed CONFIG_FS_* options to use fallbacks v3: no change v2: * squash MAINTAINERS and Makefile commits here * config file fixes (copyright, mtest, findfdt, fs options, cleanups) * move wdtimer variable under SPL build --- MAINTAINERS |4 + Makefile|2 +- arch/arm/cpu/armv7/Makefile |2 +- arch/arm/cpu/armv7/omap-common/Makefile |2 +- board/ti/ti814x/Makefile| 46 +++ board/ti/ti814x/evm.c | 198 board/ti/ti814x/evm.h |7 + board/ti/ti814x/mux.c | 51 +++ boards.cfg |1 + include/configs/ti814x_evm.h| 220 +++ spl/Makefile|2 +- 11 files changed, 531 insertions(+), 4 deletions(-) create mode 100644 board/ti/ti814x/Makefile create mode 100644 board/ti/ti814x/evm.c create mode 100644 board/ti/ti814x/evm.h create mode 100644 board/ti/ti814x/mux.c create mode 100644 include/configs/ti814x_evm.h diff --git a/MAINTAINERS b/MAINTAINERS index 6b1f657..3a59c6c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -832,6 +832,10 @@ Stelian Pop stel...@popies.net at91sam9263ek ARM926EJS (AT91SAM9263 SoC) at91sam9rlekARM926EJS (AT91SAM9RL SoC) +Matt Porter mpor...@ti.com + + ti814x_evm ARM ARMV7 (TI814x Soc) + Dave Purdy david.c.pu...@gmail.com pogo_e02ARM926EJS (Kirkwood SoC) diff --git a/Makefile b/Makefile index 55bd55c..4e3e242 100644 --- a/Makefile +++ b/Makefile @@ -331,7 +331,7 @@ LIBS-y += api/libapi.o LIBS-y += post/libpost.o LIBS-y += test/libtest.o -ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),) LIBS-y += $(CPUDIR)/omap-common/libomap-common.o endif diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index ee8c2b3..c961247 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -32,7 +32,7 @@ COBJS += cache_v7.o COBJS += cpu.o COBJS += syslib.o -ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA),) +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_TI814X),) SOBJS += lowlevel_init.o endif diff --git a/arch/arm/cpu/armv7/omap-common/Makefile b/arch/arm/cpu/armv7/omap-common/Makefile index 0efc80d..55e82ba 100644 --- a/arch/arm/cpu/armv7/omap-common/Makefile +++ b/arch/arm/cpu/armv7/omap-common/Makefile @@ -36,7 +36,7 @@ COBJS += emif-common.o COBJS += vc.o endif -ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),) COBJS += boot-common.o SOBJS += lowlevel_init.o endif diff --git a/board/ti/ti814x/Makefile b/board/ti/ti814x/Makefile new file mode 100644 index 000..09d2422 --- /dev/null +++ b/board/ti/ti814x/Makefile @@ -0,0 +1,46 @@ +# +# Makefile +# +# Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed as is WITHOUT ANY WARRANTY of any +# kind, whether express or implied; without even the implied warranty +# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +ifdef CONFIG_SPL_BUILD +COBJS := mux.o +endif + +COBJS += evm.o +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c new file mode 100644 index 000..acc18fb --- /dev/null +++ b/board/ti/ti814x/evm.c @@ -0,0 +1,198 @@ +/* + * evm.c + * + * Board functions for TI814x EVM + * + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it
Re: [U-Boot] [PULL] : Please pull u-boot-imx
Hi Stefano, On Fri, Mar 15, 2013 at 3:51 PM, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Applied to u-boot-arm/master, thanks! Could you please merge u-boot-arm/master back into u-boot-imx/master? -- Otavio Salvador O.S. Systems E-mail: ota...@ossystems.com.br http://www.ossystems.com.br Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4 v6] Exynos: Add hardware accelerated SHA256 and SHA1
Hi Akshay,
On Fri, Mar 15, 2013 at 1:52 AM, Akshay Saraswat aksha...@samsung.com wrote:
SHA-256 and SHA-1 accelerated using ACE hardware.
Signed-off-by: ARUN MANKUZHI aru...@samsung.com
Signed-off-by: Akshay Saraswat aksha...@samsung.com
One nit below, but otherwise:
Acked-by: Simon Glass s...@chromium.org
[...]
Changes since v5:
- Removed ace_sha.h.
- Renamed ace_sfr.h as ace_sha.h.
- Removed timeout and checking for PRNG_ERROR bit in HASH_STATUS
register.
PRNG_ERROR bit high means setup was not done properly. Since there
is no
way to detect faulty h/w, we consider the possible fact that h/w
should
not be able to setup feed properly if it's faulty.
- Renamed function name ace_sha256 to hw_sha256 and ace_sha1 to
hw_sha1.
Makefile | 1 +
arch/arm/include/asm/arch-exynos/ace_sha.h | 327
+
arch/arm/include/asm/arch-exynos/cpu.h | 4 +
drivers/crypto/Makefile| 47 +
drivers/crypto/ace_sha.c | 129
5 files changed, 508 insertions(+)
create mode 100644 arch/arm/include/asm/arch-exynos/ace_sha.h
create mode 100644 drivers/crypto/Makefile
create mode 100644 drivers/crypto/ace_sha.c
[...]
diff --git a/drivers/crypto/ace_sha.c b/drivers/crypto/ace_sha.c
new file mode 100644
index 000..e8d9b2d
--- /dev/null
+++ b/drivers/crypto/ace_sha.c
@@ -0,0 +1,129 @@
+/*
+ * Advanced Crypto Engine - SHA Firmware
+ * Copyright (c) 2012 Samsung Electronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+#include common.h
+#include sha256.h
+#include sha1.h
+#include asm/errno.h
+#include asm/arch/clk.h
+#include asm/arch/ace_sha.h
+
+/* Maximum frequency supported by the SoC*/
+#define MAX_FREQ (1.7 * 1000 * 1000 * 1000)
+
+/* SHA1 value for the message of zero length */
+static const unsigned char sha1_digest_emptymsg[SHA1_SUM_LEN] = {
+ 0xDA, 0x39, 0xA3, 0xEE, 0x5E, 0x6B, 0x4B, 0x0D,
+ 0x32, 0x55, 0xBF, 0xFF, 0x95, 0x60, 0x18, 0x90,
+ 0xAF, 0xD8, 0x07, 0x09};
+
+/* SHA256 value for the message of zero length */
+static const unsigned char sha256_digest_emptymsg[SHA256_SUM_LEN] = {
+ 0xE3, 0xB0, 0xC4, 0x42, 0x98, 0xFC, 0x1C, 0x14,
+ 0x9A, 0xFB, 0xF4, 0xC8, 0x99, 0x6F, 0xB9, 0x24,
+ 0x27, 0xAE, 0x41, 0xE4, 0x64, 0x9B, 0x93, 0x4C,
+ 0xA4, 0x95, 0x99, 0x1B, 0x78, 0x52, 0xB8, 0x55};
+
+int ace_sha_hash_digest(const unsigned char *pbuf, unsigned int buf_len,
+ unsigned char *pout, unsigned int hash_type)
Since you don't check the return value and it only ever return 0, you
may as well make this void.
+{
+ unsigned int i, reg, len;
+ unsigned int *pdigest;
+ struct exynos_ace_sfr *ace_sha_reg =
+ (struct exynos_ace_sfr *)samsung_get_base_ace_sfr();
+
+ if (buf_len == 0) {
+ /* ACE H/W cannot compute hash value for empty string */
+ if (hash_type == ACE_SHA_TYPE_SHA1)
+ memcpy(pout, sha1_digest_emptymsg, SHA1_SUM_LEN);
+ else
+ memcpy(pout, sha256_digest_emptymsg, SHA256_SUM_LEN);
+ return 0;
+ }
+
+ /* Flush HRDMA */
+ writel(ACE_FC_HRDMACFLUSH_ON, ace_sha_reg-fc_hrdmac);
+ writel(ACE_FC_HRDMACFLUSH_OFF, ace_sha_reg-fc_hrdmac);
+
+ /* Set byte swap of data in */
+ writel(ACE_HASH_SWAPDI_ON | ACE_HASH_SWAPDO_ON | ACE_HASH_SWAPIV_ON,
+ ace_sha_reg-hash_byteswap);
+
+ /* Select Hash input mux as external source */
+ reg = readl(ace_sha_reg-fc_fifoctrl);
+ reg = (reg ~ACE_FC_SELHASH_MASK) | ACE_FC_SELHASH_EXOUT;
+ writel(reg, ace_sha_reg-fc_fifoctrl);
+
+ /* Set Hash as SHA1 or SHA256 and start Hash engine */
+ reg = (hash_type == ACE_SHA_TYPE_SHA1) ?
+ ACE_HASH_ENGSEL_SHA1HASH : ACE_HASH_ENGSEL_SHA256HASH;
+ reg |= ACE_HASH_STARTBIT_ON;
+ writel(reg, ace_sha_reg-hash_control);
+
+ /* Enable FIFO mode */
+ writel(ACE_HASH_FIFO_ON, ace_sha_reg-hash_fifo_mode);
+
+ /* Set message length */
+
Re: [U-Boot] [PATCH 3/4 v6] gen: Add sha h/w acceleration to hash
Hi Akshay,
On Fri, Mar 15, 2013 at 1:52 AM, Akshay Saraswat aksha...@samsung.com wrote:
Adding H/W acceleration support to hash which can be used
to test SHA 256 hash algorithm.
Signed-off-by: ARUN MANKUZHI aru...@samsung.com
Signed-off-by: Akshay Saraswat aksha...@samsung.com
---
Changes since v1:
- Added sha256 support to hash command instead of new sha256
command.
Changes sice v2:
- Added new nodes for SHA1 and SHA256 in struct hash_algo for the
case when ACE is enabled.
- Added new declaration for function pointer hash_func_ws with
different return type.
Changes sice v3:
- Changed command names to lower case in algo struct.
- Added generic ace_sha config.
Changes sice v4:
- Changed function names in struct algo.
- Replaced ACE_SHA_TYPE to CHUNSZ in struct algo.
Changes sice v5:
- Added file hw_sha.h.
- Changed CONFIG_ACE_SHA to CONFIG_SHA_HW_ACCEL.
- Renamed function names ace_sha1 and ace_sha256 to hw_sha1 and
hw_sha256 respectively.
common/hash.c| 14 ++
include/hw_sha.h | 50 ++
2 files changed, 64 insertions(+)
create mode 100644 include/hw_sha.h
diff --git a/common/hash.c b/common/hash.c
index e3a6e43..23b1334 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -28,12 +28,26 @@
#include hash.h
#include sha1.h
#include sha256.h
+#include hw_sha.h
Put this immediate above hash.h (alpha order)
/*
* These are the hash algorithms we support. Chips which support accelerated
* crypto could perhaps add named version of these algorithms here.
*/
static struct hash_algo hash_algo[] = {
You need to rebase this patch to mainline. Other than these two things
it looks good.
+#ifdef CONFIG_SHA_HW_ACCEL
+ {
+ sha1,
+ SHA1_SUM_LEN,
+ hw_sha1,
+ CHUNKSZ_SHA1,
+ }, {
+ sha256,
+ SHA256_SUM_LEN,
+ hw_sha256,
+ CHUNKSZ_SHA256,
+ },
+#endif
#ifdef CONFIG_SHA1
{
SHA1,
diff --git a/include/hw_sha.h b/include/hw_sha.h
new file mode 100644
index 000..565e5a0
--- /dev/null
+++ b/include/hw_sha.h
@@ -0,0 +1,50 @@
+/*
+ * Header file for SHA hardware acceleration
+ *
+ * Copyright (c) 2012 Samsung Electronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+#ifndef __HW_SHA_H
+#define __HW_SHA_H
+
+
+/**
+ * Computes hash value of input pbuf using h/w acceleration
+ *
+ * @param in_addr A pointer to the input buffer
+ * @param bufleni Byte length of input buffer
+ * @param out_addr A pointer to the output buffer. When complete
+ * 32 bytes are copied to pout[0]...pout[31]. Thus, a
user
+ * should allocate at least 32 bytes at pOut in advance.
+ * @param chunk_size chunk size for sha256
+ */
+void hw_sha256(const uchar *in_addr, uint buflen,
+ uchar *out_addr, uint chunk_size);
+
+/**
+ * Computes hash value of input pbuf using h/w acceleration
+ *
+ * @param in_addr A pointer to the input buffer
+ * @param bufleni Byte length of input buffer
+ * @param out_addr A pointer to the output buffer. When complete
+ * 32 bytes are copied to pout[0]...pout[31]. Thus, a
user
+ * should allocate at least 32 bytes at pOut in advance.
+ * @param chunk_size chunk_size for sha1
+ */
+void hw_sha1(const uchar *in_addr, uint buflen,
+ uchar *out_addr, uint chunk_size);
+#endif
--
1.8.0
Regards,
Simon
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Re: [U-Boot] [PATCH 4/4 v6] Exynos: config: Enable hash command
On Fri, Mar 15, 2013 at 1:52 AM, Akshay Saraswat aksha...@samsung.com wrote: This enables hash command. Tested with command hash sha256 0x40008000 0x2B 0x40009000. Used mm and md to write a standard string to memory location 0x40008000 and ran the above command to verify the output. Signed-off-by: ARUN MANKUZHI aru...@samsung.com Signed-off-by: Akshay Saraswat aksha...@samsung.com Acked-by: Simon Glass s...@chromium.org --- Changes since v2: - New patch to enable config for hash command. Changes since v3: - Added new generic config for ace_sha to enable ace support in hash.c. Changes since v4: - Added Acked-by: Simon Glass s...@chromium.org. Changes since v5: - Removed Acked-by: Simon Glass s...@chromium.org because of a change. - Changed CONFIG_ACE_SHA to CONFIG_SHA_HW_ACCEL. include/configs/exynos5250-dt.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 9b15bf3..8d361fa 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -47,6 +47,7 @@ /* Enable ACE acceleration for SHA1 and SHA256 */ #define CONFIG_EXYNOS_ACE_SHA +#define CONFIG_SHA_HW_ACCEL #define CONFIG_SYS_SDRAM_BASE 0x4000 #define CONFIG_SYS_TEXT_BASE 0x43E0 @@ -116,6 +117,7 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT #define CONFIG_CMD_NET +#define CONFIG_CMD_HASH #define CONFIG_BOOTDELAY 3 #define CONFIG_ZERO_BOOTDELAY_CHECK -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/4 V3] EXYNOS5: FDT: Add serial device node values
On Fri, Mar 15, 2013 at 3:38 AM, Rajeshwari Shinde rajeshwar...@samsung.com wrote: This patch adds the device node required for serial driver Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com Acked-by: Simon Glass s...@chromium.org --- Changes in V2: - Changed the compatible string to samsung,exynos4210-uart Changes in V3: - Added a alias console as we will support one at any point of time. arch/arm/dts/exynos5250.dtsi | 27 +++ board/samsung/dts/exynos5250-smdk5250.dts |2 ++ 2 files changed, 29 insertions(+), 0 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4 V3] S5P: Serial: Add fdt support to driver
Hi Rajeshwari, On Fri, Mar 15, 2013 at 3:43 AM, Rajeshwari Shinde rajeshwar...@samsung.com wrote: This patch adds FDT support to the serial s5p driver. At present disabling the serial console (from the device tree) crashes U-Boot. Add checks for this case, so that execution can continue without a serial console. It also enables the serial_s5p driver recognize the silent_console option. Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com Signed-off-by: Gabe Black gabebl...@google.com Signed-off-by: Simon Glass s...@chromium.org Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com This is a little limited in that we only have one port with FDT, but that's all we need for now (perhaps forever). So it looks fine to me. Acked-by: Simon Glass s...@chromium.org --- Changes in V2: - None Changes in V3: - Moved driver config structure to data section. - Changed silent_console to silent-console. - Did put a check for base address before doing fdt decoding. drivers/serial/serial_s5p.c | 78 +++ 1 files changed, 78 insertions(+), 0 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] Add initial support for Wandboard dual lite and solo.
On Fri, Mar 15, 2013 at 3:21 PM, Fabio Estevam feste...@gmail.com wrote: Hi Wolfgang, On Thu, Mar 14, 2013 at 9:31 AM, Wolfgang Denk w...@denx.de wrote: +#define CONFIG_SYS_MEMTEST_START 0x1000 +#define CONFIG_SYS_MEMTEST_END 0x1001 This makes no sense. Please see doc/README.memory-test This is something that always causes me confusion. doc/README.memory-test is not available in u-boot-imx. but I looked in the archives. What is a good and safe value, I should use here? I think that the following is safe to use: #define CONFIG_SYS_MEMTEST_START0x1000 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] .checkpatch.conf: ignore udelay-usleep_range warnings
usleep_range() is a Linux facility, ignore it when udelay() is encountered. Signed-off-by: Matt Porter mpor...@ti.com --- .checkpatch.conf |3 +++ 1 file changed, 3 insertions(+) diff --git a/.checkpatch.conf b/.checkpatch.conf index 38386b3..d88af57 100644 --- a/.checkpatch.conf +++ b/.checkpatch.conf @@ -15,3 +15,6 @@ # enable more tests --strict + +# Not Linux, so we don't recommend usleep_range() over udelay() +--ignore USLEEP_RANGE -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5] Add initial support for Wandboard dual lite and solo.
From: Fabio Estevam fabio.este...@freescale.com
Wandboard is a development board that has two variants: one version based
on mx6 dual lite and another one based on mx6 solo.
For more details about Wandboard, please refer to: http://www.wandboard.org/
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Changes since v4:
- Improved commit log
- Rebased against the latest u-boot-imx tree
- Added README
- Remove hardcode in get_board_rev()
- Define MACH_TYPE_WANDBOARD
- Moved includes to the start of the file
- Use less space for CONFIG_SYS_MALLOC_LEN
- Use 5 seconds for boot delay
- Removed CONFIG_PREBOOT
- Adjust fdt_file for the solo variant
- Increase CONFIG_SYS_MEMTEST_END
Changes since v3:
- Rebased after fixing nitrogen DDR size:
http://marc.info/?l=u-bootm=136321557726201w=2
Changes since v2:
- Also added support to the mx6solo variant.
- Rebased against u-boot-imx
Changes since v1:
- Use get_ram_size
- Remove ARP_TIMEOUT
- Remove unneeded 1u
MAINTAINERS|1 +
arch/arm/include/asm/arch-mx6/mx6dl_pins.h |3 +
board/wandboard/Makefile | 29
board/wandboard/README | 42 ++
board/wandboard/wandboard.c| 181
boards.cfg |2 +
include/configs/wandboard.h| 211
7 files changed, 469 insertions(+)
create mode 100644 board/wandboard/Makefile
create mode 100644 board/wandboard/README
create mode 100644 board/wandboard/wandboard.c
create mode 100644 include/configs/wandboard.h
diff --git a/MAINTAINERS b/MAINTAINERS
index f490d62..791afce 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -664,6 +664,7 @@ Fabio Estevam fabio.este...@freescale.com
mx53smd i.MX53
mx6qsabresd i.MX6Q
mx6qsabreauto i.MX6Q
+ wandboard i.MX6DL/S
Daniel Gorsulowski daniel.gorsulow...@esd.eu
diff --git a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
index 9494e41..9846f1b 100644
--- a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
@@ -50,6 +50,8 @@
#define NO_MUX_I0
#define NO_PAD_I0
enum {
+ MX6_PAD_CSI0_DAT10__UART1_TXD = IOMUX_PAD(0x0360, 0x004C, 3,
0x, 0, 0),
+ MX6_PAD_CSI0_DAT11__UART1_RXD = IOMUX_PAD(0x0364, 0x0050, 3,
0x08FC, 1, 0),
MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK = IOMUX_PAD(0x03B0, 0x009C, 0,
0x, 0, PAD_CTL_DSE_120ohm),
MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15 = IOMUX_PAD(0x03B4, 0x00A0, 0,
0x, 0, PAD_CTL_DSE_120ohm),
MX6_PAD_DI0_PIN2__IPU1_DI0_PIN2 = IOMUX_PAD(0x03B8, 0x00A4, 0, 0x,
0, PAD_CTL_DSE_120ohm),
@@ -90,6 +92,7 @@ enum {
MX6_PAD_EIM_D27__UART2_RXD = IOMUX_PAD(0x0540, 0x0170, 4,
0x0904, 1, 0),
MX6_PAD_EIM_D28__I2C1_SDA = IOMUX_PAD(0x0544, 0x0174, 1 |
IOMUX_CONFIG_SION, 0x086C, 1, 0),
MX6_PAD_EIM_D28__GPIO_3_28 = IOMUX_PAD(0x0544, 0x0174, 5,
0x, 0, 0),
+ MX6_PAD_EIM_D29__GPIO_3_29 = IOMUX_PAD(0x0548, 0x0178, 5,
0x, 0, 0),
MX6_PAD_ENET_MDC__ENET_MDC = IOMUX_PAD(0x05B8, 0x01E8, 1,
0x, 0, 0),
MX6_PAD_ENET_MDIO__ENET_MDIO= IOMUX_PAD(0x05BC, 0x01EC, 1,
0x0810, 0, 0),
MX6_PAD_ENET_REF_CLK__ENET_TX_CLK = IOMUX_PAD(0x05C0, 0x01F0, 1,
0x, 0, 0),
diff --git a/board/wandboard/Makefile b/board/wandboard/Makefile
new file mode 100644
index 000..014ea6c
--- /dev/null
+++ b/board/wandboard/Makefile
@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2013 Freescale Semiconductor, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := wandboard.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/wandboard/README b/board/wandboard/README
new file mode 100644
index 000..1a55cc4
--- /dev/null
+++ b/board/wandboard/README
@@ -0,0 +1,42 @@
+U-Boot for Wandboard
+
+
+This file contains information for the port of U-Boot to the Wandboard.
+
+Wandboard is a development board that has two variants: one version based
+on mx6 dual lite and another one based on mx6 solo.
+
+For more details about Wandboard, please refer to:
+http://www.wandboard.org/
+
+Building
Re: [U-Boot] pull request for u-boot-tegra/master into ARM/master
Hi Tom,
On Fri, 15 Mar 2013 08:25:11 -0700, Tom Warren
twarren.nvi...@gmail.com wrote:
Albert,
Please pull u-boot-tegra/master into ARM/master. Thanks!
./MAKEALL for all the Tegra boards is OK, running a ./MAKEALL -a arm
now. Checkpatch.pl is clean.
The following changes since commit ef123c525370463254a6f8e67563fdb0b0b46412:
Albert ARIBAUD (1):
Refactor linker-generated arrays
are available in the git repository at:
git://git.denx.de/u-boot-tegra master
Lucas Stach (7):
tegra: usb: set USB_PORTS_MAX to correct value
tegra: usb: make controller init functions more self contained
tegra: usb: remove unneeded function parameter
tegra: usb: move controller init into start_port
tegra: usb: various small cleanups
tegra: usb: move implementation into right directory
tegra: usb: move [start|stop]_port into ehci_hcd_[init|stop]
Stephen Warren (5):
ARM: tegra: implement WAR for Tegra114 CPU reset vector
ARM: tegra: make bounce buffer option common
disk: define HAVE_BLOCK_DEVICE in a common place
disk: define HAVE_BLOCK_DEVICE if CONFIG_CMD_PART
ARM: tegra: enable a common set of disk-related commands everywhere
Tom Warren (27):
Tegra114: I2C: Take DVFS out of reset to allow I2C5 (PWR_I2C) to work
Tegra: I2C: Add T114 clock support to tegra_i2c driver
Tegra114: fdt: Update DT files with I2C info for T114/Dalmore
Tegra114: I2C: Enable I2C driver on Dalmore E1611 eval board
Tegra: fdt: Change /include/ to #include for C preprocessor
Tegra: fdt: tamonten: Add common tamonten.dtsi file from linux
Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files
Tegra: MMC: Add DT support to MMC driver for all T20 boards
Tegra: fdt: Remove memreserve line from Cardhu/Seaboard DT files
Tegra30: fdt: Sync DT nodes with kernel DT files (I2C, SPI, GPIO, clock)
Tegra: Add twarren as maintainer for Tegra30 and Tegra114 SoCs
Tegra: Remove unused CONFIG_SYS_CPU_OSC_FREQUENCY define
Tegra114: fdt: Sync DT nodes with kernel DT files (GPIO, tegra_car)
Tegra30: Cardhu: Remove unneeded cardhu.c.mmc file
Tegra114: pinmux: Update pinmux tables code, fix a bug w/SDMMC3 init
Tegra30: Cardhu: Add pad config tables/code based on pinmux code
Tegra30: fdt: Add SDMMC (sdhci) nodes for T30 boards (Cardhu for now)
Tegra: MMC: Added/update SDMMC registers/base addresses for T20/T30
Tegra30: MMC: Add SD bus power-rail and SDMMC pad init routines
mmc: Tegra: Add SD bus power/voltage function and MMC pad init call.
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec driver
Tegra30: MMC: Enable DT MMC driver support for Tegra30 Cardhu boards
Tegra114: pinmux: Fix bad CAM_MCLK func 3 table entry
Tegra114: Fix/update GP padcfg register struct
Tegra114: Dalmore: Always use DEFAULT instead of DISABLE for lock bits
Tegra114: fdt: Move aliases from dtsi to dts file as per other Tegras
Tegra114: Dalmore: Add pad config tables/code based on pinmux code
MAINTAINERS|2 +
arch/arm/cpu/arm720t/tegra114/cpu.c| 37 ++-
arch/arm/cpu/armv7/tegra20/Makefile|1 -
arch/arm/cpu/armv7/tegra20/usb.c | 567
arch/arm/cpu/tegra114-common/pinmux.c | 410 +++---
arch/arm/cpu/tegra30-common/pinmux.c | 190 +++-
arch/arm/dts/tegra114.dtsi | 75 +++-
arch/arm/dts/tegra20.dtsi | 18 +-
arch/arm/dts/tegra30.dtsi | 124 +++--
arch/arm/include/asm/arch-tegra/mmc.h |2 +-
arch/arm/include/asm/arch-tegra/tegra_i2c.h|6 +
arch/arm/include/asm/arch-tegra/tegra_mmc.h| 48 ++-
.../include/asm/{arch-tegra20 = arch-tegra}/usb.h | 22 -
arch/arm/include/asm/arch-tegra114/gp_padctrl.h| 34 +-
arch/arm/include/asm/arch-tegra114/pinmux.h| 246 +-
arch/arm/include/asm/arch-tegra20/tegra.h |1 -
arch/arm/include/asm/arch-tegra30/gp_padctrl.h |6 +
arch/arm/include/asm/arch-tegra30/pinmux.h | 67 +++-
arch/arm/include/asm/arch-tegra30/tegra.h |2 +
board/avionic-design/common/tamonten.c | 19 +-
board/avionic-design/dts/tegra20-medcom-wide.dts |3 +-
board/avionic-design/dts/tegra20-plutux.dts|3 +-
board/avionic-design/dts/tegra20-tamonten.dtsi | 489 +
board/avionic-design/dts/tegra20-tec.dts |3 +-
board/compal/dts/tegra20-paz00.dts | 21 +-
board/compal/paz00/paz00.c | 26 +-
board/compulab/dts/tegra20-trimslice.dts | 16 +-
board/compulab/trimslice/trimslice.c | 23
Re: [U-Boot] [PATCH v4] Add initial support for Wandboard dual lite and solo.
Dear Stefano, In message 514367ed.6070...@denx.de you wrote: It is ok to move the information to bdinfo, but then it should not break the consistence: all i.MX should follow the same rule. This makes also easier for board maintainers to switch from a SOC to the next one, because they have to provide quite the same functions in their code (and using the same functions, too.). 100% agreement. I agree with you that this should be done by a separate patchset: it is not related to the Wandboard. But if we go on this way, the same changes should be done for all i.MX, not only for i.MX5/i.MX6. Indeed. It was just with this specific board that I got awre of the issue. I fully agree that we should implement a common solution that covers all these systems. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The ideal situation is to have massive computing power right at home. Something that dims the streetlights and shrinks the picture on the neighbours' TVs when you boot it up. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] Add initial support for Wandboard dual lite and solo.
Dear Fabio Estevam, In message caomzo5d6notktvx0+bpfczhsht7fa_ksg-vnvaq45tjr-xw...@mail.gmail.com you wrote: +#define CONFIG_SYS_MEMTEST_START 0x1000 +#define CONFIG_SYS_MEMTEST_END 0x1001 This makes no sense. Please see doc/README.memory-test This is something that always causes me confusion. doc/README.memory-test is not available in u-boot-imx. but I looked in the archives. It's in master by now. What is a good and safe value, I should use here? As explained, reasonable values for _START are just above the exception vectors - if any, and _END should be a bit below the space used for U-Boot's stack. I have to admit that I don't understand what the i.MX6 port is doing with the memory. Normally, a warmboot should not change it's content, yet here it does. Also I don't think there are exception vectors actually used in low memory, because when I erase all this memory the system still continues to run. Sorry, I'm afraid I'm not much of a help here. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Never worry about theory as long as the machinery does what it's supposed to do. - R. A. Heinlein ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/4] Enable CPSW on TI814x EVM
This series adds support for CPSW on the PG1.0 TI814x EVM board. The V1 CPSW on TI814x requires minor register changes to the existing driver as well as TI814x-specific pll/clock support. An ET1011C phy driver is added to support the PHY present on the PG1.0 EVM. It has been tested loading/booting a Linux kernel and regression tested on BeagleBone and EVM-SK AM33XX boards. It has also been MAKEALL tested for all am33xx platforms. The series applies on top of the following patches: - am33xx: Add required includes to some omap/am33xx code http://patchwork.ozlabs.org/patch/227804/ - Add TI814x EVM Support v4 http://www.mail-archive.com/u-boot@lists.denx.de/msg108356.html Matt Porter (4): am33xx: add pll and clock support for TI814x CPSW cpsw: add support for TI814x slave_regs differences phy: add support for ET1011C phys ti814x_evm: enable CPSW support arch/arm/cpu/armv7/am33xx/clock_ti814x.c | 56 +- arch/arm/include/asm/arch-am33xx/hardware_ti814x.h |1 + board/ti/ti814x/evm.c | 75 + board/ti/ti814x/evm.h |1 + board/ti/ti814x/mux.c | 35 +++ drivers/net/cpsw.c |6 ++ drivers/net/phy/Makefile |1 + drivers/net/phy/et1011c.c | 110 drivers/net/phy/phy.c |3 + include/configs/ti814x_evm.h | 21 include/phy.h |1 + 11 files changed, 308 insertions(+), 2 deletions(-) create mode 100644 drivers/net/phy/et1011c.c -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/4] am33xx: add pll and clock support for TI814x CPSW
Enables required PLLs and clocks for CPSW on TI814x.
Signed-off-by: Matt Porter mpor...@ti.com
---
arch/arm/cpu/armv7/am33xx/clock_ti814x.c | 56 +++-
arch/arm/include/asm/arch-am33xx/hardware_ti814x.h |1 +
board/ti/ti814x/evm.c |3 ++
3 files changed, 58 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/clock_ti814x.c
b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c
index cb4210f..69ecf72 100644
--- a/arch/arm/cpu/armv7/am33xx/clock_ti814x.c
+++ b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c
@@ -183,7 +183,7 @@ struct cm_alwon {
unsigned int resv5[2];
unsigned int gpmcclkctrl;
unsigned int ethernet0clkctrl;
- unsigned int resv6[1];
+ unsigned int ethernet1clkctrl;
unsigned int mpuclkctrl;
unsigned int debugssclkctrl;
unsigned int l3clkctrl;
@@ -203,9 +203,23 @@ struct cm_alwon {
unsigned int custefuseclkctrl;
};
+#define SATA_PLL_BASE (CTRL_BASE + 0x0720)
+
+struct sata_pll {
+ unsigned int pllcfg0;
+ unsigned int pllcfg1;
+ unsigned int pllcfg2;
+ unsigned int pllcfg3;
+ unsigned int pllcfg4;
+ unsigned int pllstatus;
+ unsigned int rxstatus;
+ unsigned int txstatus;
+ unsigned int testcfg;
+};
const struct cm_alwon *cmalwon = (struct cm_alwon *)CM_ALWON_BASE;
const struct cm_def *cmdef = (struct cm_def *)CM_DEFAULT_BASE;
+const struct sata_pll *spll = (struct sata_pll *)SATA_PLL_BASE;
/*
* Enable the peripheral clock for required peripherals
@@ -221,6 +235,18 @@ static void enable_per_clocks(void)
writel(PRCM_MOD_EN, cmalwon-mmchs1clkctrl);
while (readl(cmalwon-mmchs1clkctrl) != PRCM_MOD_EN)
;
+
+ /* Ethernet */
+ writel(PRCM_MOD_EN, cmalwon-l3slowclkstctrl);
+ while ((readl(cmalwon-l3slowclkstctrl) 0x2100) != 0x2100)
+ ;
+ writel(PRCM_MOD_EN, cmalwon-ethclkstctrl);
+ writel(PRCM_MOD_EN, cmalwon-ethernet0clkctrl);
+ while ((readl(cmalwon-ethernet0clkctrl) 0x3) != 0)
+ ;
+ writel(PRCM_MOD_EN, cmalwon-ethernet1clkctrl);
+ while ((readl(cmalwon-ethernet1clkctrl) 0x3) != 0)
+ ;
}
/*
@@ -365,6 +391,31 @@ void ddr_pll_config(unsigned int ddrpll_m)
pll_config(DDR_PLL_BASE, DDR_N, DDR_M, DDR_M2, DDR_CLKCTRL, 1);
}
+void sata_pll_config(void)
+{
+ /* TRM 21.3.1 */
+ writel(0xc12c003c, spll-pllcfg1);
+ udelay(50);
+
+ writel(0x004008e0, spll-pllcfg3);
+ udelay(50);
+
+ writel(0x8004, spll-pllcfg0);
+ udelay(50);
+
+ writel(0x8014, spll-pllcfg0);
+ udelay(50);
+
+ writel(0x8016, spll-pllcfg0);
+ udelay(50);
+
+ writel(0xc017, spll-pllcfg0);
+ udelay(50);
+
+ while (((readl(spll-pllstatus) 0x01) == 0))
+ ;
+}
+
void enable_emif_clocks(void) {};
void enable_dmm_clocks(void)
@@ -397,9 +448,10 @@ void pll_init()
/* Enable the control module */
writel(PRCM_MOD_EN, cmalwon-controlclkctrl);
+ /* Configure PLLs */
mpu_pll_config();
-
l3_pll_config();
+ sata_pll_config();
/* Enable the required peripherals */
enable_per_clocks();
diff --git a/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h
b/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h
index a950ac3..8f9315c 100644
--- a/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h
@@ -29,6 +29,7 @@
/* Control Module Base Address */
#define CTRL_BASE 0x4814
+#define CTRL_DEVICE_BASE 0x48140600
/* PRCM Base Address */
#define PRCM_BASE 0x4818
diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c
index acc18fb..8513220 100644
--- a/board/ti/ti814x/evm.c
+++ b/board/ti/ti814x/evm.c
@@ -151,6 +151,9 @@ void s_init(void)
*/
wdt_disable();
+ /* Enable timer */
+ timer_init();
+
/* Setup the PLLs and the clocks for the peripherals */
pll_init();
--
1.7.9.5
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[U-Boot] [PATCH 2/4] cpsw: add support for TI814x slave_regs differences
TI814x's version 1 CPSW has a different slave_regs layout.
Add support for the differing registers.
Signed-off-by: Matt Porter mpor...@ti.com
---
drivers/net/cpsw.c |6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
index f5c5b9a..34c9fdd 100644
--- a/drivers/net/cpsw.c
+++ b/drivers/net/cpsw.c
@@ -109,7 +109,13 @@ struct cpsw_slave_regs {
u32 flow_thresh;
u32 port_vlan;
u32 tx_pri_map;
+#ifdef CONFIG_AM33XX
u32 gap_thresh;
+#elif defined(CONFIG_TI814X)
+ u32 ts_ctl;
+ u32 ts_seq_ltype;
+ u32 ts_vlan;
+#endif
u32 sa_lo;
u32 sa_hi;
};
--
1.7.9.5
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Re: [U-Boot] AT91SAM9M10 Custom Board U-boot reboot after Wrong Image Format
Hi B. Thanks for your attention! Bad Data CRC don't help. Because, many possible issue will cause this issue. I will provide the log. Consider you use 16bit NAND flash. Have you define CONFIG_SYS_NAND_DBW_16 in board configuration header? Yes I did that. Before I include this definition the board did not even try to boot the kernel. BTW, which bootstrap version do you use? (As I suspect the bootstrap has enabled for supporting 16bit NAND, so it read u-boot OK) The At91bootstrap indeed loads U-boot OK. The problem is afterward. U-Boot 2012.10-00075-g0362411-dirty (Mar 15 2013 - 11:33:53) U-Boot code: 73F0 - 73F370C0 BSS: - 73F79654 CPU: AT91SAM9G45 Crystal frequency: 12 MHz CPU clock : 400 MHz Master clock : 133.333 MHz dram_init dram_init tam_ram=67108864 testa_ram_readonly: Inicio testa_ram_readonly: Fim monitor len: 00079654 ramsize: 0400 TLB table at: 73ff Top of RAM usable for U-Boot at: 73ff Reserving 485k for U-Boot at: 73f76000 Reserving 640k for malloc() at: 73ed6000 Reserving 32 Bytes for Board Info at: 73ed5fe0 Reserving 144 Bytes for Global Data at: 73ed5f50 New Stack Pointer is: 73ed5f40 comeca a configurar a DRAM Display DRAM display_dram_config: DRAM: 64 MiB reloca e perde o controle relocation Offset is: 00076000 board_init_r: gd=73ed5f50 WARNING: Caches not enabled monitor flash len: 0003C950 Now running in RAM - U-Boot at: 73f76000 NAND: 256 MiB board_init_r: Initialize Environmet env_relocate: Inicio gd=73ed5f50 gd-env_valid=0 Using default environment env_relocate: Fim board_init_r: jumptable board_init_r: jumptable sai In: serial Out: serial Err: serial board_init_r:interrupts board_init_r: initialize board_init_r: main loop ### main_loop entered: bootdelay=3 ### main_loop: bootcmd=nand read 0x7000 0x20 0x30;bootm 0x7000 Hit any key to stop autoboot: 0 NAND read: device 0 offset 0x20, size 0x30 3145728 bytes read: OK * kernel: cmdline image address = 0x7000 ## Booting kernel from Legacy Image at 7000 ... Image Name: Linux-2.6.39.4 Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 3630052 Bytes = 3.5 MiB Load Address: 70008000 Entry Point: 70008000 Verifying Checksum ... Bad Data CRC ERROR: can't get kernel image! -- View this message in context: http://u-boot.10912.n7.nabble.com/AT91SAM9M10-Custom-Board-U-boot-reboot-after-Wrong-Image-Format-tp149567p149822.html Sent from the U-Boot mailing list archive at Nabble.com.___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] AT91SAM9M10 Custom Board U-boot reboot after Wrong Image Format
Hi B I would like to mention that I run U-boot either via the code located in flash(using at91bootstrap) or directly in the DDRAM via Eclipse/GDB/JTAG(Jflash). Thanks Marcio On Thu, 14 Mar 2013 19:31:39 -0700 (PDT), Bo Shen-3 [via U-Boot] wrote: Hi Marcio, On 3/14/2013 20:23, [hidden email] wrote: Hi Bo Shen I have used a SAMBA old version and I managed to write the Linux Kernel that can be recognized by U-boot but now it sends a message Veritying Checksum : Bad Data CRC. It seems that U-Boot is only reading the first sector OK and the rest of the Kernel is being worngly read. Bad Data CRC don't help. Because, many possible issue will cause this issue. Consider you use 16bit NAND flash. Have you define CONFIG_SYS_NAND_DBW_16 in board configuration header? BTW, which bootstrap version do you use? (As I suspect the bootstrap has enabled for supporting 16bit NAND, so it read u-boot OK) Please provide the log information output from dbgu. Thanks for your attention Marcio Best Regards, Bo Shen ___ U-Boot mailing list [hidden email] http://lists.denx.de/mailman/listinfo/u-boot [1] - If you reply to this email, your message will be added to the discussion below: http://u-boot.10912.n7.nabble.com/AT91SAM9M10-Custom-Board-U-boot-reboot-after-Wrong-Image-Format-tp149567p149763.html [2] To unsubscribe from AT91SAM9M10 Custom Board U-boot reboot after Wrong Image Format, click here [3]. NAML [4] Links: -- [1] http://lists.denx.de/mailman/listinfo/u-boot [2] http://u-boot.10912.n7.nabble.com/AT91SAM9M10-Custom-Board-U-boot-reboot-after-Wrong-Image-Format-tp149567p149763.html [3] http://u-boot.10912.n7.nabble.com/template/NamlServlet.jtp?macro=unsubscribe_by_code|+|amp|+|node=149567|+|amp|+|code=bWFyY2lvQG5ldG9wZW4uY29tLmJyfDE0OTU2N3wxMDMwNzQyMzcx [4] http://u-boot.10912.n7.nabble.com/template/NamlServlet.jtp?macro=macro_viewer|+|amp|+|id=instant_html%21nabble%3Aemail.naml|+|amp|+|base=nabble.naml.namespaces.BasicNamespace-nabble.view.web.template.NabbleNamespace-nabble.view.web.template.NodeNamespace|+|amp|+|breadcrumbs=notify_subscribers%21nabble%3Aemail.naml-instant_emails%21nabble%3Aemail.naml-send_instant_email%21nabble%3Aemail.naml -- View this message in context: http://u-boot.10912.n7.nabble.com/AT91SAM9M10-Custom-Board-U-boot-reboot-after-Wrong-Image-Format-tp149567p149825.html Sent from the U-Boot mailing list archive at Nabble.com.___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Uboot support for MT29F2G16ABBEAH4 NAND 16 bit
Hi Scott Thanks a lot for your attention. I am using a custom board based at the Atmel AT91SAM9M10G45-EK Development Kit. I am quite sure The Linux Kernel is properly loaded in the NAND memory. Here is the U-boot log. U-Boot 2012.10-00075-g0362411-dirty (Mar 15 2013 - 11:33:53) U-Boot code: 73F0 - 73F370C0 BSS: - 73F79654 CPU: AT91SAM9G45 Crystal frequency: 12 MHz CPU clock : 400 MHz Master clock : 133.333 MHz dram_init dram_init tam_ram=67108864 testa_ram_readonly: Inicio testa_ram_readonly: Fim monitor len: 00079654 ramsize: 0400 TLB table at: 73ff Top of RAM usable for U-Boot at: 73ff Reserving 485k for U-Boot at: 73f76000 Reserving 640k for malloc() at: 73ed6000 Reserving 32 Bytes for Board Info at: 73ed5fe0 Reserving 144 Bytes for Global Data at: 73ed5f50 New Stack Pointer is: 73ed5f40 comeca a configurar a DRAM Display DRAM display_dram_config: DRAM: 64 MiB reloca e perde o controle relocation Offset is: 00076000 board_init_r: gd=73ed5f50 WARNING: Caches not enabled monitor flash len: 0003C950 Now running in RAM - U-Boot at: 73f76000 NAND: 256 MiB board_init_r: Initialize Environmet env_relocate: Inicio gd=73ed5f50 gd-env_valid=0 Using default environment env_relocate: Fim board_init_r: jumptable board_init_r: jumptable sai In: serial Out: serial Err: serial board_init_r:interrupts board_init_r: initialize board_init_r: main loop ### main_loop entered: bootdelay=3 ### main_loop: bootcmd=nand read 0x7000 0x20 0x30;bootm 0x7000 Hit any key to stop autoboot: 0 NAND read: device 0 offset 0x20, size 0x30 3145728 bytes read: OK * kernel: cmdline image address = 0x7000 ## Booting kernel from Legacy Image at 7000 ... Image Name: Linux-2.6.39.4 Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 3630052 Bytes = 3.5 MiB Load Address: 70008000 Entry Point: 70008000 Verifying Checksum ... Bad Data CRC ERROR: can't get kernel image! U-Boot Marcio On 03/14/2013 05:52:57 PM, mar...@netopen.com.br [1]wrote: Hi has Anybody managed to load the Linux Kernel using MT29F2G16ABBEAH4 NAND or other 16 bits NAND memory? I haven't personally, but there's no general reason why 16-bit NAND shouldn't work in U-Boot. Some NAND controllers or drivers don't support it, though -- which controller are you using? -Scott Links: -- [1] mailto:mar...@netopen.com.br ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/4] ti814x_evm: enable CPSW support
Adds CPSW support to the TI814X EVM configured with
an ET1011C PHY in GMII mode.
Signed-off-by: Matt Porter mpor...@ti.com
---
board/ti/ti814x/evm.c| 72 ++
board/ti/ti814x/evm.h|1 +
board/ti/ti814x/mux.c| 35
include/configs/ti814x_evm.h | 21
4 files changed, 129 insertions(+)
diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c
index 8513220..d6c19f5 100644
--- a/board/ti/ti814x/evm.c
+++ b/board/ti/ti814x/evm.c
@@ -17,6 +17,7 @@
*/
#include common.h
+#include cpsw.h
#include errno.h
#include spl.h
#include asm/arch/cpu.h
@@ -39,6 +40,8 @@ static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
#endif
+static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
+
/* UART Defines */
#ifdef CONFIG_SPL_BUILD
#define UART_RESET (0x1 1)
@@ -166,6 +169,9 @@ void s_init(void)
/* Set MMC pins */
enable_mmc1_pin_mux();
+ /* Set Ethernet pins */
+ enable_enet_pin_mux();
+
/* Enable UART */
uart_enable();
@@ -199,3 +205,69 @@ int board_mmc_init(bd_t *bis)
return 0;
}
#endif
+
+#ifdef CONFIG_DRIVER_TI_CPSW
+static void cpsw_control(int enabled)
+{
+ /* VTP can be added here */
+
+ return;
+}
+
+static struct cpsw_slave_data cpsw_slaves[] = {
+ {
+ .slave_reg_ofs = 0x50,
+ .sliver_reg_ofs = 0x700,
+ .phy_id = 1,
+ },
+ {
+ .slave_reg_ofs = 0x90,
+ .sliver_reg_ofs = 0x740,
+ .phy_id = 0,
+ },
+};
+
+static struct cpsw_platform_data cpsw_data = {
+ .mdio_base = CPSW_MDIO_BASE,
+ .cpsw_base = CPSW_BASE,
+ .mdio_div = 0xff,
+ .channels = 8,
+ .cpdma_reg_ofs = 0x100,
+ .slaves = 1,
+ .slave_data = cpsw_slaves,
+ .ale_reg_ofs= 0x600,
+ .ale_entries= 1024,
+ .host_port_reg_ofs = 0x28,
+ .hw_stats_reg_ofs = 0x400,
+ .mac_control= (1 5),
+ .control= cpsw_control,
+ .host_port_num = 0,
+ .version= CPSW_CTRL_VERSION_1,
+};
+#endif
+
+int board_eth_init(bd_t *bis)
+{
+ uint8_t mac_addr[6];
+ uint32_t mac_hi, mac_lo;
+
+ if (!eth_getenv_enetaddr(ethaddr, mac_addr)) {
+ printf(ethaddr not set. Reading from E-fuse\n);
+ /* try reading mac address from efuse */
+ mac_lo = readl(cdev-macid0l);
+ mac_hi = readl(cdev-macid0h);
+ mac_addr[0] = mac_hi 0xFF;
+ mac_addr[1] = (mac_hi 0xFF00) 8;
+ mac_addr[2] = (mac_hi 0xFF) 16;
+ mac_addr[3] = (mac_hi 0xFF00) 24;
+ mac_addr[4] = mac_lo 0xFF;
+ mac_addr[5] = (mac_lo 0xFF00) 8;
+
+ if (is_valid_ether_addr(mac_addr))
+ eth_setenv_enetaddr(ethaddr, mac_addr);
+ else
+ printf(Unable to read MAC address. Set ethaddr\n);
+ }
+
+ return cpsw_register(cpsw_data);
+}
diff --git a/board/ti/ti814x/evm.h b/board/ti/ti814x/evm.h
index 40f8710..6aebec6 100644
--- a/board/ti/ti814x/evm.h
+++ b/board/ti/ti814x/evm.h
@@ -3,5 +3,6 @@
void enable_uart0_pin_mux(void);
void enable_mmc1_pin_mux(void);
+void enable_enet_pin_mux(void);
#endif /* _EVM_H */
diff --git a/board/ti/ti814x/mux.c b/board/ti/ti814x/mux.c
index 137acb4..fd9f364 100644
--- a/board/ti/ti814x/mux.c
+++ b/board/ti/ti814x/mux.c
@@ -40,6 +40,36 @@ static struct module_pin_mux mmc1_pin_mux[] = {
{-1},
};
+static struct module_pin_mux enet_pin_mux[] = {
+ {OFFSET(pincntl232), MODE(0x01)}, /* EMAC_RMREFCLK */
+ {OFFSET(pincntl233), PULLUP_EN | MODE(0x01)}, /* MDCLK */
+ {OFFSET(pincntl234), PULLUP_EN | MODE(0x01)}, /* MDIO */
+ {OFFSET(pincntl235), MODE(0x01)}, /* EMAC[0]_MTCLK */
+ {OFFSET(pincntl236), MODE(0x01)}, /* EMAC[0]_MCOL */
+ {OFFSET(pincntl237), MODE(0x01)}, /* EMAC[0]_MCRS */
+ {OFFSET(pincntl238), MODE(0x01)}, /* EMAC[0]_MRXER */
+ {OFFSET(pincntl239), MODE(0x01)}, /* EMAC[0]_MRCLK */
+ {OFFSET(pincntl240), MODE(0x01)}, /* EMAC[0]_MRXD[0] */
+ {OFFSET(pincntl241), MODE(0x01)}, /* EMAC[0]_MRXD[1] */
+ {OFFSET(pincntl242), MODE(0x01)}, /* EMAC[0]_MRXD[2] */
+ {OFFSET(pincntl243), MODE(0x01)}, /* EMAC[0]_MRXD[3] */
+ {OFFSET(pincntl244), MODE(0x01)}, /* EMAC[0]_MRXD[4] */
+ {OFFSET(pincntl245), MODE(0x01)}, /* EMAC[0]_MRXD[5]
[U-Boot] [PATCH 3/4] phy: add support for ET1011C phys
Adds an ET1011C PHY driver which is derived from
the current Linux kernel PHY driver. Note that an
errata workaround config option is implemented to
allow for TX_CLK to be enabled even when gigabit
mode is negotiated. This workaround is used on the
TI814x-EVM.
Signed-off-by: Matt Porter mpor...@ti.com
---
drivers/net/phy/Makefile |1 +
drivers/net/phy/et1011c.c | 110 +
drivers/net/phy/phy.c |3 ++
include/phy.h |1 +
4 files changed, 115 insertions(+)
create mode 100644 drivers/net/phy/et1011c.c
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 5e90d70..af5f4b8 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -34,6 +34,7 @@ COBJS-$(CONFIG_PHYLIB_10G) += generic_10g.o
COBJS-$(CONFIG_PHY_ATHEROS) += atheros.o
COBJS-$(CONFIG_PHY_BROADCOM) += broadcom.o
COBJS-$(CONFIG_PHY_DAVICOM) += davicom.o
+COBJS-$(CONFIG_PHY_ET1011C) += et1011c.o
COBJS-$(CONFIG_PHY_LXT) += lxt.o
COBJS-$(CONFIG_PHY_MARVELL) += marvell.o
COBJS-$(CONFIG_PHY_MICREL) += micrel.o
diff --git a/drivers/net/phy/et1011c.c b/drivers/net/phy/et1011c.c
new file mode 100644
index 000..5e22399
--- /dev/null
+++ b/drivers/net/phy/et1011c.c
@@ -0,0 +1,110 @@
+/*
+ * ET1011C PHY driver
+ *
+ * Derived from Linux kernel driver by Chaithrika U S
+ * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#include config.h
+#include phy.h
+
+#define ET1011C_CONFIG_REG (0x16)
+#define ET1011C_TX_FIFO_MASK (0x3 12)
+#define ET1011C_TX_FIFO_DEPTH_8(0x0 12)
+#define ET1011C_TX_FIFO_DEPTH_16 (0x1 12)
+#define ET1011C_INTERFACE_MASK (0x7 0)
+#define ET1011C_GMII_INTERFACE (0x2 0)
+#define ET1011C_SYS_CLK_EN (0x1 4)
+#define ET1011C_TX_CLK_EN (0x1 5)
+
+#define ET1011C_STATUS_REG (0x1A)
+#define ET1011C_DUPLEX_STATUS (0x1 7)
+#define ET1011C_SPEED_MASK (0x3 8)
+#define ET1011C_SPEED_1000 (0x2 8)
+#define ET1011C_SPEED_100 (0x1 8)
+#define ET1011C_SPEED_10 (0x0 8)
+
+static int et1011c_config(struct phy_device *phydev)
+{
+ int ctl = 0;
+ ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
+ if (ctl 0)
+ return ctl;
+ ctl = ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 |
+BMCR_ANENABLE);
+ /* First clear the PHY */
+ phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl | BMCR_RESET);
+
+ return genphy_config_aneg(phydev);
+}
+
+static int et1011c_parse_status(struct phy_device *phydev)
+{
+ int mii_reg;
+ int speed;
+
+ mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, ET1011C_STATUS_REG);
+
+ if (mii_reg ET1011C_DUPLEX_STATUS)
+ phydev-duplex = DUPLEX_FULL;
+ else
+ phydev-duplex = DUPLEX_HALF;
+
+ speed = mii_reg ET1011C_SPEED_MASK;
+ switch (speed) {
+ case ET1011C_SPEED_1000:
+ phydev-speed = SPEED_1000;
+ mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, ET1011C_CONFIG_REG);
+ mii_reg = ~ET1011C_TX_FIFO_MASK;
+ phy_write(phydev, MDIO_DEVAD_NONE, ET1011C_CONFIG_REG,
+ mii_reg |
+ ET1011C_GMII_INTERFACE |
+ ET1011C_SYS_CLK_EN |
+#ifdef CONFIG_PHY_ET1011C_TX_CLK_FIX
+ ET1011C_TX_CLK_EN |
+#endif
+ ET1011C_TX_FIFO_DEPTH_16);
+ break;
+ case ET1011C_SPEED_100:
+ phydev-speed = SPEED_100;
+ break;
+ case ET1011C_SPEED_10:
+ phydev-speed = SPEED_10;
+ break;
+ }
+
+ return 0;
+}
+
+static int et1011c_startup(struct phy_device *phydev)
+{
+ genphy_update_link(phydev);
+ et1011c_parse_status(phydev);
+ return 0;
+}
+
+static struct phy_driver et1011c_driver = {
+ .name = ET1011C,
+ .uid= 0x0282f014,
+ .mask = 0xfff0,
+ .features = PHY_GBIT_FEATURES,
+ .config = et1011c_config,
+ .startup= et1011c_startup,
+};
+
+int phy_et1011c_init(void)
+{
+ phy_register(et1011c_driver);
+
+ return 0;
+}
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index d0ed766..f8c5481 100644
--- a/drivers/net/phy/phy.c
+++
Re: [U-Boot] [PATCH 4/4] ti814x_evm: enable CPSW support
On Fri, Mar 15, 2013 at 04:58:20PM -0400, Matt Porter wrote: Adds CPSW support to the TI814X EVM configured with an ET1011C PHY in GMII mode. Signed-off-by: Matt Porter mpor...@ti.com Reviewed-by: Tom Rini tr...@ti.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] phy: add support for ET1011C phys
On Fri, Mar 15, 2013 at 04:58:19PM -0400, Matt Porter wrote: Adds an ET1011C PHY driver which is derived from the current Linux kernel PHY driver. Note that an errata workaround config option is implemented to allow for TX_CLK to be enabled even when gigabit mode is negotiated. This workaround is used on the TI814x-EVM. You need to specify the git hash or tag, not just current. The code itself is fine, so Reviewed-by: Tom Rini tr...@ti.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] nitrogen6x: Pass the correct CPU revision to the kernel
From: Fabio Estevam fabio.este...@freescale.com
As nitrogen6x boards support different i.MX6 flavors (quad, dual-lite and solo)
the correct CPU revision needs to passed to the kernel, so call get_cpu_rev()
instead of hardcoding it.
Freescale 3.0.35 kernel assumes that the CPU revision is passed passed from the
bootloader.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/boundary/nitrogen6x/nitrogen6x.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/boundary/nitrogen6x/nitrogen6x.c
b/board/boundary/nitrogen6x/nitrogen6x.c
index 229c237..fec0e3a 100644
--- a/board/boundary/nitrogen6x/nitrogen6x.c
+++ b/board/boundary/nitrogen6x/nitrogen6x.c
@@ -330,7 +330,7 @@ int board_mmc_init(bd_t *bis)
u32 get_board_rev(void)
{
- return 0x63000;
+ return get_cpu_rev();
}
#ifdef CONFIG_MXC_SPI
--
1.7.9.5
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Re: [U-Boot] [PATCH 1/4] am33xx: add pll and clock support for TI814x CPSW
On Fri, Mar 15, 2013 at 04:58:17PM -0400, Matt Porter wrote:
[snip]
+ /* Ethernet */
+ writel(PRCM_MOD_EN, cmalwon-l3slowclkstctrl);
+ while ((readl(cmalwon-l3slowclkstctrl) 0x2100) != 0x2100)
+ ;
+ writel(PRCM_MOD_EN, cmalwon-ethclkstctrl);
+ writel(PRCM_MOD_EN, cmalwon-ethernet0clkctrl);
+ while ((readl(cmalwon-ethernet0clkctrl) 0x3) != 0)
+ ;
+ writel(PRCM_MOD_EN, cmalwon-ethernet1clkctrl);
+ while ((readl(cmalwon-ethernet1clkctrl) 0x3) != 0)
Please define away the magic numbers.
[snip]
+void sata_pll_config(void)
+{
+ /* TRM 21.3.1 */
+ writel(0xc12c003c, spll-pllcfg1);
I'm OK with comments, but please make it a multi-line thing that
explains what's going on so that it's clear that yes, really, we
shouldn't have defined these.
--
Tom
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Re: [U-Boot] [PATCH 2/4] cpsw: add support for TI814x slave_regs differences
On Fri, Mar 15, 2013 at 04:58:18PM -0400, Matt Porter wrote: TI814x's version 1 CPSW has a different slave_regs layout. Add support for the differing registers. Signed-off-by: Matt Porter mpor...@ti.com Reviewed-by: Tom Rini tr...@ti.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] mx6qsabrelite: Do not hardcode the CPU revision
From: Fabio Estevam fabio.este...@freescale.com
Instead of hardcoding the CPU revision, it is better to use get_cpu_rev().
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/freescale/mx6qsabrelite/mx6qsabrelite.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index 5b69a6d..9bd444e 100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -26,6 +26,7 @@
#include asm/arch/imx-regs.h
#include asm/arch/iomux.h
#include asm/arch/mx6q_pins.h
+#include asm/arch/sys_proto.h
#include asm/errno.h
#include asm/gpio.h
#include asm/imx-common/iomux-v3.h
@@ -300,7 +301,7 @@ int board_mmc_init(bd_t *bis)
u32 get_board_rev(void)
{
- return 0x63000 ;
+ return get_cpu_rev();
}
#ifdef CONFIG_MXC_SPI
--
1.7.9.5
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[U-Boot] Pull request: u-boot-arm/master
Hello Tom, Here is a PR for ARM. Note that doc/README.scrapyard will need a manual merge resolution due to ARM tree having a commit that reorders the headers and reformats the lines while mainline has a commit adding two new entries still in the older format. The following changes since commit fc959081d41aab2d6f4614c5fb3dd1b77ffcdcf4: x86: Enable CONFIG_OF_CONTROL on coreboot (2013-03-04 15:57:52 -0800) are available in the git repository at: git://git.denx.de/u-boot-arm master for you to fetch changes up to b27673ccbd3d5435319b5c09c3e7061f559f925d: Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master' (2013-03-15 20:50:43 +0100) Albert ARIBAUD (9): Merge 'u-boot-microblaze/mainline/arm' into 'u-boot-arm/master' Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master' arm: omap: map u_boot_lists section to .sram Remove linker lists (LGAs) from SPL linker scripts arm: make __bss_start and __bss_end__ compiler-generated Refactor linker-generated arrays Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master' Benoît Thébaudeau (6): imx: mx6q DDR3 init: Fix tMRD imx: mx6q DDR3 init: Fix tXPR imx: mx6q DDR3 init: Fix SDE_to_RST imx: mx6q DDR3 init: Fix RST_to_CKE imx: mx6q DDR3 init: Fix MR0.PPD imx: mx6q DDR3 init: Benefit from available CL = 7 Bo Shen (3): ARM: atmel: add at91sam9g20ek_2mmc nand boot support ARM: at91: change nand flash table ARM: at91sam9x5: Using CPU string directly Chase Maupin (3): am335x_evm: Add NAND environment variables am335x_evm: Add SPI environment variables am335x_evm: Add NET environment variables Enric Balletbo i Serra (7): OMAP3: igep00x0: use official board names. OMAP3: igep00x0: add missing include mach-types.h OMAP3: igep00x0: Add new IGEP COM PROTON. SPL: ONENAND: Fix some ONENAND related defines. SPL: ONENAND: Fix onenand_spl_load_image implementation. SPL: ONENAND: Support SPL to boot u-boot from OneNAND. OMAP3: Initialize gpmc if SPL_ONENAND_SUPPORT is enabled. Eric Nelson (8): i.MX6Q: mx6qsabre*: Configure to allow CONFIG_SYS_ALT_MEMTEST i.MX6: mx6qsabrelite: indent with tabs i.MX6: consolidate pad names for multi-CPU boards i.MX6: crm_regs: define CCM_CCGRx for use in board config files i.MX6: crm_regs: define IOMUXC_GPR4/6/7 i.MX6DL: define IOMUX pads NANDF_CS1-3 for use as GPIO i.MX6: Add DDR controller registers Add Boundary Devices Nitrogen6X boards Fabio Estevam (6): mx6: Disable Power Down Bit of watchdog mx23evk: Remove CONFIG_SYS_BAUDRATE_TABLE mx23evk: Turn on caches common: cmd_sata: Fix usage text for 'sata init' mx6: Provide a structure for accessing HDMI registers nitrogen6x: Fix RAM size variable Fadil Berisha (2): mxs: timrot: Add support to i.MX23 mxs: timrot: Rename local macros Howard Gray (1): omap3: mvblx: change console to ttyO0 and make silent by default. Ilya Yanok (4): spl: support for booting via usbeth am33xx: support for booting via usbeth am335x_evm: enable support for booting via USB doc/SPL/README.am335x-network: Document using ethernet (and USB) SPL Jesse Gilles (1): ARM: sam9x5: fix ethernet pins in MII mode Lars Poeschel (1): am33xx: pcm051: Remove wp pin mux for sd-card Lokesh Vutla (13): ARM: OMAP4+: emif: Detect SDRAM from SDRAM config register ARM: OMAP4+: Cleanup emif specific files ARM: OMAP4+: Make control module register structure generic ARM: OMAP5: Clean up iosettings code ARM: OMAP5: Add DDR changes required for OMAP543X ES2.0 SOCs ARM: OMAP5: srcomp: enable slew rate compensation cells after powerup arm: dra7xx: clock: Add the prcm changes arm: dra7xx: clock: Add the dplls data arm: dra7xx: Add control module changes arm: dra7xx: Add DDR related data for DRA752 ES1.0 arm: dra7xx: Add board files for DRA7XX socs arm: dra7xx: Add dra7xx_evm build support arm: dra7xx: Add silicon id support for DRA752 soc Lucas Stach (7): tegra: usb: set USB_PORTS_MAX to correct value tegra: usb: make controller init functions more self contained tegra: usb: remove unneeded function parameter tegra: usb: move controller init into start_port tegra: usb: various small cleanups tegra: usb: move implementation into right directory tegra: usb: move [start|stop]_port into ehci_hcd_[init|stop] Marek Vasut (7): mxs: Reset the EMI block on mx23 mxs: mmc: spi: dma: Better wrap the MXS differences mxs: spi: Fix the MXS SPI for mx23 mxs: spi: Remove CONFIG_MXS_SPI_DMA_ENABLE mxs: Squash the
Re: [U-Boot] [PATCH v9 0/31] Create generic board init for ARM, x86, PPC
On Wed, Mar 13, 2013 at 09:46:26AM +0100, Wolfgang Denk wrote: Dear Simon Glass, In message 1363020460-14307-1-git-send-email-...@chromium.org you wrote: This series creates a generic board init implementation which contains the essential functions of the major arch/xxx/lib/board.c files. It is split into two parts: board_f.c for pre-relocation and board_r.c for post-relocation. ... ARM is a relatively large board.c file and one which I can test, therefore I think it is a good target for this series. On the other hand, x86 is relatively small and simple, but different enough that it introduces a few issues to be solved. So I have chosen both ARM and x86 for this series. After a suggestion from Wolfgang I have added PPC also. This is the largest and most feature-full board, so hopefully we have all bases covered in this series. Other archs are mostly a subset of these. I did some testing on Power Architecture systems - to be precise: CPU Board -- MPC860T TQM860L MPC5200 TQM5200S PPC405EX Kilauea PPC440EP Yosemite PPC440EX Sequoia PPC440SPe Katmai PPC460EX Canyonlands On all boards I verified at least environment access (printenv, saveenv) and network operation (TFTP download); where available also PCI. Everything appears to work fine, no problems noted. A well done job, thanks a lot! For the whole series: Tested-by: Wolfgang Denk w...@denx.de Acked-by: Wolfgang Denk w...@denx.de OK, I've taken http://patchwork.ozlabs.org/bundle/sjg/us-board/ but with http://patchwork.ozlabs.org/patch/228080/ for 2/31 and applied this to u-boot/master now, thanks again! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V5 REPOST 6/7] mmc: add bcm2835 driver
On 03/11/2013 12:35 AM, Albert ARIBAUD wrote: Hi Stephen, On Sat, 09 Mar 2013 23:34:21 -0700, Stephen Warren swar...@wwwdotorg.org wrote: On 02/03/2013 04:27 AM, Albert ARIBAUD wrote: On Tue, 15 Jan 2013 19:26:58 -0700, Stephen Warren swar...@wwwdotorg.org wrote: This adds a simple driver for the BCM2835's SD controller. ... Are you OK pulling this series out of patchwork to be applied, or should I repost? Thanks. I'll apply the series from patchwork to u-boot-arm/master, adding Andy's Ack manually in 6/7. If these apply cleanly, then all right. I know it's only been a few days, but I haven't seen these show up in your tree yet. Did they not apply OK from patchwork? Let me know if I need to rebase/repost. Thanks. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] patman: Allow specifying the message ID your series is in reply to
Some versions of git don't seem to prompt you for the message ID that
your series is in reply to. Allow specifying this from the command
line.
Signed-off-by: Doug Anderson diand...@chromium.org
---
tools/patman/gitutil.py | 7 ++-
tools/patman/patman.py | 4 +++-
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py
index ca3ba4a..f40bbb4 100644
--- a/tools/patman/gitutil.py
+++ b/tools/patman/gitutil.py
@@ -203,7 +203,7 @@ def BuildEmailList(in_list, tag=None, alias=None):
return result
def EmailPatches(series, cover_fname, args, dry_run, cc_fname,
-self_only=False, alias=None):
+self_only=False, alias=None, in_reply_to=None):
Email a patch series.
Args:
@@ -213,6 +213,8 @@ def EmailPatches(series, cover_fname, args, dry_run,
cc_fname,
dry_run: Just return the command that would be run
cc_fname: Filename of Cc file for per-commit Cc
self_only: True to just email to yourself as a test
+in_reply_to: If non-None we'll pass this to git as --in-reply-to.
+Should be a message ID that this is in reply to.
Returns:
Git command that was/would be run
@@ -262,6 +264,9 @@ def EmailPatches(series, cover_fname, args, dry_run,
cc_fname,
to = BuildEmailList([os.getenv('USER')], '--to', alias)
cc = []
cmd = ['git', 'send-email', '--annotate']
+if in_reply_to:
+cmd.append('--in-reply-to=%s' % in_reply_to)
+
cmd += to
cmd += cc
cmd += ['--cc-cmd', '%s --cc-cmd %s' % (sys.argv[0], cc_fname)]
diff --git a/tools/patman/patman.py b/tools/patman/patman.py
index e049081..377408d 100755
--- a/tools/patman/patman.py
+++ b/tools/patman/patman.py
@@ -53,6 +53,8 @@ parser.add_option('-n', '--dry-run', action='store_true',
dest='dry_run',
parser.add_option('-p', '--project', default=project.DetectProject(),
help=Project name; affects default option values and
aliases [default: %default])
+parser.add_option('-r', '--in-reply-to', type='string', action='store',
+ help=Message ID that this series is in reply to)
parser.add_option('-s', '--start', dest='start', type='int',
default=0, help='Commit to start creating patches from (0 = HEAD)')
parser.add_option('-t', '--test', action='store_true', dest='test',
@@ -163,7 +165,7 @@ else:
cmd = ''
if ok or options.ignore_errors:
cmd = gitutil.EmailPatches(series, cover_fname, args,
-options.dry_run, cc_file)
+options.dry_run, cc_file, in_reply_to=options.in_reply_to)
# For a dry run, just show our actions as a sanity check
if options.dry_run:
--
1.8.1.3
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[U-Boot] [PATCH] patman: Make Reviewed-by an important tag
Although Reviewed-by: is a tag that gerrit adds, it's also a tag
used by upstream. Stripping it is undesirable. In fact, we should
treat it as important.
Signed-off-by: Doug Anderson diand...@chromium.org
---
tools/patman/README | 4 ++--
tools/patman/patchstream.py | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/tools/patman/README b/tools/patman/README
index 1832ebd..86d366f 100644
--- a/tools/patman/README
+++ b/tools/patman/README
@@ -198,8 +198,9 @@ END
override the default signoff that patman automatically adds.
Tested-by: Their Name email
+ Reviewed-by: Their Name email
Acked-by: Their Name email
- These indicate that someone has acked or tested your patch.
+ These indicate that someone has tested/reviewed/acked your patch.
When you get this reply on the mailing list, you can add this
tag to the relevant commit and the script will include it when
you send out the next version. If 'Tested-by:' is set to
@@ -231,7 +232,6 @@ TEST=...
Change-Id:
Review URL:
Reviewed-on:
-Reviewed-by:
Exercise for the reader: Try adding some tags to one of your current
diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py
index f7ee75a..4ff6ce7 100644
--- a/tools/patman/patchstream.py
+++ b/tools/patman/patchstream.py
@@ -31,7 +31,7 @@ from series import Series
# Tags that we detect and remove
re_remove = re.compile('^BUG=|^TEST=|^BRANCH=|^Change-Id:|^Review URL:'
-'|Reviewed-on:|Reviewed-by:|Commit-Ready:')
+'|Reviewed-on:|Commit-Ready:')
# Lines which are allowed after a TEST= line
re_allowed_after_test = re.compile('^Signed-off-by:')
@@ -46,7 +46,7 @@ re_cover = re.compile('^Cover-letter:')
re_series = re.compile('^Series-(\w*): *(.*)')
# Commit tags that we want to collect and keep
-re_tag = re.compile('^(Tested-by|Acked-by|Cc): (.*)')
+re_tag = re.compile('^(Tested-by|Acked-by|Reviewed-by|Cc): (.*)')
# The start of a new commit in the git log
re_commit = re.compile('^commit (.*)')
--
1.8.1.3
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Re: [U-Boot] AT91SAM9M10 Custom Board U-boot reboot after Wrong Image Format
Hi Marcio, 于 2013/3/16 2:46, mar...@netopen.com.br 写道: Hi B. Thanks for your attention! Bad Data CRC don't help. Because, many possible issue will cause this issue. I will provide the log. Consider you use 16bit NAND flash. Have you define CONFIG_SYS_NAND_DBW_16 in board configuration header? Yes I did that. Before I include this definition the board did not even try to boot the kernel. BTW, which bootstrap version do you use? (As I suspect the bootstrap has enabled for supporting 16bit NAND, so it read u-boot OK) The At91bootstrap indeed loads U-boot OK. The problem is afterward. U-Boot 2012.10-00075-g0362411-dirty (Mar 15 2013 - 11:33:53) U-Boot code: 73F0 - 73F370C0 BSS: - 73F79654 CPU: AT91SAM9G45 Crystal frequency: 12 MHz CPU clock : 400 MHz Master clock : 133.333 MHz dram_init dram_init tam_ram=67108864 testa_ram_readonly: Inicio testa_ram_readonly: Fim monitor len: 00079654 ramsize: 0400 TLB table at: 73ff Top of RAM usable for U-Boot at: 73ff Reserving 485k for U-Boot at: 73f76000 Reserving 640k for malloc() at: 73ed6000 Reserving 32 Bytes for Board Info at: 73ed5fe0 Reserving 144 Bytes for Global Data at: 73ed5f50 New Stack Pointer is: 73ed5f40 comeca a configurar a DRAM Display DRAM display_dram_config: DRAM: 64 MiB reloca e perde o controle relocation Offset is: 00076000 board_init_r: gd=73ed5f50 WARNING: Caches not enabled monitor flash len: 0003C950 Now running in RAM - U-Boot at: 73f76000 NAND: 256 MiB board_init_r: Initialize Environmet env_relocate: Inicio gd=73ed5f50 gd-env_valid=0 Using default environment env_relocate: Fim board_init_r: jumptable board_init_r: jumptable sai In: serial Out: serial Err: serial board_init_r:interrupts board_init_r: initialize board_init_r: main loop ### main_loop entered: bootdelay=3 ### main_loop: bootcmd=nand read 0x7000 0x20 0x30;bootm 0x7000 Hit any key to stop autoboot: 0 NAND read: device 0 offset 0x20, size 0x30 3145728 bytes read: OK * kernel: cmdline image address = 0x7000 ## Booting kernel from Legacy Image at 7000 ... Image Name: Linux-2.6.39.4 Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 3630052 Bytes = 3.5 MiB Load Address: 70008000 Entry Point: 70008000 Verifying Checksum ... Bad Data CRC ERROR: can't get kernel image! I see you read only 3MiB, however, the kernel size is 3.5 MiB (Data Size: 3630052 Bytes = 3.5 MiB). So, you only read partial kernel, this cause CRC error. Best Regards, Bo Shen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] nitrogen6x: Pass the correct CPU revision to the kernel
On 03/15/2013 02:06 PM, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
As nitrogen6x boards support different i.MX6 flavors (quad, dual-lite and solo)
the correct CPU revision needs to passed to the kernel, so call get_cpu_rev()
instead of hardcoding it.
Freescale 3.0.35 kernel assumes that the CPU revision is passed passed from the
bootloader.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/boundary/nitrogen6x/nitrogen6x.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/boundary/nitrogen6x/nitrogen6x.c
b/board/boundary/nitrogen6x/nitrogen6x.c
index 229c237..fec0e3a 100644
--- a/board/boundary/nitrogen6x/nitrogen6x.c
+++ b/board/boundary/nitrogen6x/nitrogen6x.c
@@ -330,7 +330,7 @@ int board_mmc_init(bd_t *bis)
u32 get_board_rev(void)
{
- return 0x63000;
+ return get_cpu_rev();
}
#ifdef CONFIG_MXC_SPI
This is the **board** revision, right?
At first glance, the kernel seems to be getting the silicon revision
from the same place as get_cpu_rev():
https://github.com/boundarydevices/linux-imx6/blob/boundary-imx_3.0.35_1.1.1/arch/arm/mach-mx6/cpu.c#L51
http://git.denx.de/u-boot.git/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/mx6/soc.c;h=a8aad5dd0a6c8548277021ebe8f6e159dbf31b9b;hb=HEAD#l42
Is there a reference to the ATAG that I'm not seeing somewhere?
Please advise,
Eric
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Re: [U-Boot] [PATCH] Exynos: clock: Fix a bug in PLL lock check condition
On Fri, Mar 15, 2013 at 5:29 AM, Akshay Saraswat aksha...@samsung.com wrote: The condition for testing of PLL getting locked was incorrect. Rectify this error in this patch. Reported-by: Alexei Fedorov alexie.fedo...@arm.com Signed-off-by: Hatim Ali hatim...@samsung.com Signed-off-by: Akshay Saraswat aksha...@samsung.com Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
