Current print only display width of PCIe device. Add print to display
PCIe generation supported by the device.
Signed-off-by: Prabhakar Kushwaha
---
drivers/pci/fsl_pci_init.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_
create vendor board directory ids and move ids8247 board to it.
Signed-off-by: Heiko Schocher
Cc: Wolfgang Denk
Cc: Kim Phillips
---
board/{ => ids}/ids8247/Makefile | 0
board/{ => ids}/ids8247/ids8247.c | 0
boards.cfg| 2 +-
3 files changed, 1 insertion(+), 1 deleti
mpc831x has no muram, so muram cannot be used for bootcounter
function.
Signed-off-by: Heiko Schocher
Cc: Kim Phillips
---
arch/powerpc/cpu/mpc83xx/cpu.c | 2 +-
arch/powerpc/cpu/mpc83xx/fdt.c | 5 +++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/cpu/mpc83xx/cpu
add support for the ids8313 board.
CPU: e300c3, MPC8313, Rev: 2.1 at 396 MHz, CSB: 132 MHz
I2C: ready
SPI: ready
DRAM: 128 MiB (DDR2, 32-bit, ECC off, 264 MHz)
Flash: 8 MiB
NAND: 128 MiB
Net: TSEC0, TSEC1 [PRIME]
public key on NOR flash start
Signed-off-by: Heiko Schocher
Cc: Kim Phil
add support for the ids8313 board.
CPU: e300c3, MPC8313, Rev: 2.1 at 396 MHz, CSB: 132 MHz
I2C: ready
SPI: ready
DRAM: 128 MiB (DDR2, 32-bit, ECC off, 264 MHz)
Flash: 8 MiB
NAND: 128 MiB
Net: TSEC0, TSEC1 [PRIME]
This board uses signed fit images, signed with sha256,rsa4096
algorithm.
- add sha256,rsa2048 and sha256,rsa4098 support to u-boot.
- add "fdt sign" command to u-boot cmdshell. This command
checks, if a fdt is correct signed.
- add hosttool "fit_info" which prints the offset and
the len of a property from in a fdt file. This
values can be used, to extract the data
add sha256 support to fit images
Signed-off-by: Heiko Schocher
Cc: Simon Glass
---
common/image-fit.c | 5 +
include/image.h| 9 +
lib/sha256.c | 2 +-
tools/Makefile | 3 +++
4 files changed, 18 insertions(+), 1 deletion(-)
diff --git a/common/image-fit.c b/common/im
based on patch from andr...@oetken.name:
http://patchwork.ozlabs.org/patch/294318/
- removed checkpatch warnings
- removed compiler warnings
- rebased against current head
Signed-off-by: Heiko Schocher
Cc: Simon Glass
Cc: andr...@oetken.name
---
common/image-sig.c | 33 +
Signed-off-by: Heiko Schocher
Cc: Simon Glass
---
common/image-sig.c | 23 ++
include/image.h| 1 +
include/rsa-checksum.h | 1 +
include/rsa.h | 10
lib/rsa/rsa-checksum.c | 65 --
lib/rsa/rsa-verify
property "sign-images" is never found, fix this.
Signed-off-by: Heiko Schocher
Cc: Simon Glass
---
tools/image-host.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/image-host.c b/tools/image-host.c
index 0d5c88c..8e185ec 100644
--- a/tools/image-host.c
+++ b/tools/im
add host tool "fit_check_sign" which verifies, if a fit image is
signed correct.
Signed-off-by: Heiko Schocher
---
Makefile | 1 +
common/image-sig.c | 22 ++---
include/fdt_support.h | 5 +++
include/image.h| 16 ---
lib/libfdt/fdt_wip.c | 17 +++
check if a fdt is correct signed
pass an optional addr value. Contains the addr of the key blob
Signed-off-by: Heiko Schocher
Cc: Simon Glass
---
common/cmd_fdt.c | 38 +-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/common/cmd_fdt.c b/common
add fit_info command to the host tools. This command prints
the name, offset and the len from a property from a node in
a fit file. This info can be used to extract a properties
data with linux tools, for example "dd".
Signed-off-by: Heiko Schocher
---
Makefile | 1 +
tools/Makefile
Due to increased size of u-boot, FMAN ucode start address has been shifted
by 256KB causing a overlap with rootfs start address.
Update rootfs start address to reflect correct memory map.
Also fix minor typo in README
Signed-off-by: Prabhakar Kushwaha
---
board/freescale/t1040qds/README |6
add support for bootcounter on an i2c device. And add a
README for all bootcounter options.
Signed-off-by: Heiko Schocher
---
README| 20 ++
drivers/bootcount/Makefile| 1 +
drivers/bootcount/bootcount_i2c.c | 44 ++
compare two U-Boot Environment variables with itest.s, example:
=> print tmp ver
tmp=U-Boot 2013.10-g75e
ver=U-Boot 2013.10-g75eb4bc (Jan 21 2014 - 10:35:39)MPC83XX
=> print check_ub_ver
check_ub_ver=if itest.s \${tmp} == \${ver}; then echo equal; else echo diff ;fi
=> run check_ub_ver
diff
=> set
check with this ubi command, if a UBI volume with "volumename"
exists in current ubi device.
Signed-off-by: Heiko Schocher
---
common/cmd_ubi.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/common/cmd_ubi.c b/common/cmd_ubi.c
index 122ba7e..7c4d950 100644
-
From: Stephen Warren
This enables generic filesystem commands such as load and ls, which
automatically work with multiple filesystem types, without having to
be told which is present, unlike e.g. ext2load, fatls.
Signed-off-by: Stephen Warren
---
README | 2 ++
1 file changed, 2 insertions(+)
On Wed, Jan 15, 2014 at 01:56:50PM +0900, Masahiro Yamada wrote:
> The 8th field of boards.cfg takes the form:
> [:comma separated config options]
>
> We should describe explicitely the 8th field only when it is necessary
> to do so.
> Specify "-" in the 8th field if it is the same as 7th fi
On Thu, Dec 19, 2013 at 11:10:24AM +0100, Patrice B wrote:
> Hi,
>
> I needed to be able to uncompress lzma files. I did this command
> based on unzip command and propose it if it could help. Hopping the
> patch is correctly done...
>
> Best regards.
>
>Patrice
>
>
> Signed-off-by:
On Fri, 2014-01-24 at 14:45 +0100, Wolfgang Denk wrote:
> Dear Danny,
>
> In message <52e15bad.1020...@coloradoengineeringinc.com> you wrote:
> >
> > > Yes - if you add support for 64 bit configurations in general, and
> > > for powerpc64 in particular.
> > I don't even have a sense for what woul
On Fri, Jan 24, 2014 at 02:23:09PM -0500, Tom Rini wrote:
> Signed-off-by: Tom Rini
Applied to u-boot-ti/master, thanks!
--
Tom
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Hey,
The following changes since commit c71b4dd2da0dcddabd7c29e6c3dc8a495d4bd928:
arm: koelsch: Add support QSPI device and enable boot from SPI flash
(2014-01-16 08:07:20 +0900)
are available in the git repository at:
git://git.denx.de/u-boot-ti master
for you to fetch changes up to b1cd
On Tue, Jan 14, 2014 at 10:54:42AM -0600, Nishanth Menon wrote:
> ES1.1 silicon is a very minor variant of ES1.0. Add priliminary support
> for ES1.1 IDCODE change.
>
> Signed-off-by: Nishanth Menon
> Reviewed-by: Tom Rini
Applied to u-boot-ti/master, thanks!
--
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On Mon, Jan 20, 2014 at 08:40:07AM -0500, Tom Rini wrote:
> Upon further inspection of relevant parts of the architecture, the
> maximum SPL binary size is 220KiB.
>
> Cc: Lokesh Vutla
> Signed-off-by: Tom Rini
Applied to u-boot-ti/master, thanks!
--
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On Tue, Jan 14, 2014 at 12:27:29PM -0600, Nishanth Menon wrote:
> Patch adds modification to shared omap5 abb_setup() function, and
> proper registers definitions needed for ABB setup sequence. ABB is
> initialized for MPU voltage domain at OPP_NOM.
>
> Signed-off-by: Nishanth Menon
> Reviewed-b
On Thu, Dec 19, 2013 at 10:00:29AM +0530, Lokesh Vutla wrote:
> From: "Satyanarayana, Sandhya"
>
> This patch enables dynamically powering down the
> IO receiver when not performing a read on boards using DDR3.
> This optimizes both active and standby power consumption.
> This bit is not set on
On Tue, Aug 07, 2012 at 02:59:52PM +0530, Jassi Brar wrote:
> The commit
> f3f98bb0 : "ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls"
> removed the config option aimed towards moving that stuff into kernel, which
> renders some code unreachable. Remove that code.
>
> Signed-off
On Thu, Dec 19, 2013 at 10:00:28AM +0530, Lokesh Vutla wrote:
> This patch enables dynamically powering down the
> IO receiver when not performing a read on DDR3 board.
> This optimizes both active and standby power consumption.
> This is derived from a patch that is done on AM335x[1]
>
> [1]
>
On Tue, Aug 07, 2012 at 02:59:18PM +0530, Jassi Brar wrote:
> The commit
> f3f98bb0 : "ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls"
> removed the config option aimed towards moving that stuff into kernel, which
> renders some code unreachable. Remove that code.
>
> Signed-of
On Wednesday, January 22, 2014 at 05:26:36 PM, Jagannadha Sutradharudu Teki
wrote:
> Hi Tom,
>
> SF code optimized stuff and few fixes.
>
> --
> Thanks!
> Jagan.
>
> The following changes since commit
> b44bd2c73c4cfb6e3b9e7f8cf987e8e39aa74a0b:
>
> Prepare v2014.01 (2014-01-20 17:52:59 -0500
Signed-off-by: Tom Rini
---
doc/feature-removal-schedule.txt | 16
1 file changed, 16 deletions(-)
diff --git a/doc/feature-removal-schedule.txt b/doc/feature-removal-schedule.txt
index 1c79c14..16819c7 100644
--- a/doc/feature-removal-schedule.txt
+++ b/doc/feature-removal-sc
From: Jim Lin
Fix the timeout issue after running "bootp" command in U-Boot console.
TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10 after a
controller reset and before RUN bit is se, (per technical reference
manual.
Signed-off-by: Jim Lin
Signed-off-by: Stephen Warren
Tested-
From: Tom Warren
These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC
files. PMIC init will be moved to pmic_common_init later.
This builds/boots on Venice2, SPI/MMC/USB/I2C all work. Audio, display
and WB/LP0 are not supported yet.
Signed-off-by: Tom Warren
Signed-off-by: St
From: Tom Warren
These are fairly complete, and near-clones of Tegra114 Venice, with an
additional I2C port, and MMC address changes for Tegra124.
Signed-off-by: Tom Warren
Signed-off-by: Stephen Warren
Tested-by: Thierry Reding
---
v2:
* Added aliases for SPI devices so they always have the
From: Tom Warren
This provides SPL support for Tegra124 boards - AVP early init, plus
CPU (A15) init/jump to main U-Boot.
Signed-off-by: Tom Warren
Signed-off-by: Stephen Warren
Tested-by: Thierry Reding
---
v3:
* Create new function pllx_set_iddq() to avoid declaring new variables
in the m
From: Tom Warren
These files are for code that runs on the CPU (A15) on Tegra124 boards.
At this time, there is no A15-specific code here. The warmboot/LP0 files
aren't included as that code hasn't been ported yet.
Signed-off-by: Tom Warren
Signed-off-by: Stephen Warren
Tested-by: Thierry Redi
From: Tom Warren
These files are used by both SPL and main U-Boot.
Signed-off-by: Tom Warren
Signed-off-by: Stephen Warren
Tested-by: Thierry Reding
---
v2:
* Fixed incorrect brace placement in tegra_get_chip_sku(), and allow any
SKU on Tegra124 just like other SoCs.
* Simplified change to
From: Stephen Warren
The reg property for node spi@7000d800 was wrong. Fix it to match the
HW. This change was verified against the Linux kernel.
Signed-off-by: Stephen Warren
Tested-by: Thierry Reding
---
arch/arm/dts/tegra114.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
From: Stephen Warren
This programming sequence is correct per Jimmy Zhang, and makes sense
too!
Signed-off-by: Stephen Warren
Tested-by: Thierry Reding
---
v2: New patch, split out from the later Tegra124 changes.
---
arch/arm/cpu/arm720t/tegra-common/cpu.c | 13 +
1 file changed,
From: Tom Warren
__pinmux_nand() won't compile if PERIPH_ID_NDFLASH isn't defined.
Prevent this from causing build problems on newer SoCs without NAND
support (or without SW support for NAND yet), but preventing
compilation unless the function will actually be used, i.e. when
CONFIG_TEGRA_NAND is
From: Stephen Warren
Tegra124's MMC controller is very similar to earlier SoC generations,
and can be supported by the same driver.
However, there are some non-backwards-compatible HW differences, and
hence a new DT compatible value must be used to describe the HW. This
patch updates the driver
From: Stephen Warren
Use a named constant for the PLL lock bit in enable_cpu_clocks().
Construct the complete value of pmc_pwrgate_toggle, rather than doing a
read-modify-write; the register is simple enough and doesn't need to
maintain state between operations.
Signed-off-by: Stephen Warren
T
From: Stephen Warren
Pass just the partition ID to power_partition(), rather than also passing
the partition's status register mask too. This makes it simpler to get
call-sites correct, since they don't need to pass two different values
that define the same thing and must match.
Consequently, we
From: Stephen Warren
There's already an SoC-specific conditional in cpu.h to determine the
PLLP rate. Define the CSITE clock rate inside the same conditional, so
that we can remove a conditional from clock_enable_coresight(). This
means one less place to update the code for new SoCs.
Signed-off-
On Fri, 2014-01-24 at 15:19 +0100, Alexander Graf wrote:
> On 24.01.2014, at 02:39, Scott Wood wrote:
>
> > On Fri, 2014-01-24 at 02:25 +0100, Alexander Graf wrote:
> >> On 24.01.2014, at 01:49, Scott Wood wrote:
> >>
> >>> On Thu, 2014-01-23 at 14:08 +0100, Alexander Graf wrote:
> which i
On 01/24/2014 08:44 AM, Thierry Reding wrote:
> On Thu, Jan 23, 2014 at 05:42:55PM -0700, Stephen Warren wrote:
>> diff --git a/arch/arm/cpu/arm720t/tegra124/cpu.c
>> b/arch/arm/cpu/arm720t/tegra124/cpu.c
> [...]
>> +static void enable_cpu_power_rail(void)
>> +{
> [...]
>> +/* un-tristate PWR
El Fri, 24 Jan 2014 10:20:16 -0700
Stephen Warren escribió:
> On 01/24/2014 09:15 AM, Tom Rini wrote:
> > On Thu, Jan 23, 2014 at 12:55:27PM -0700, Stephen Warren wrote:
> >> From: Stephen Warren
> >>
> >> People who write (or scripts that auto-generate) extlinux.conf
> >> don't want to know abou
On 01/24/2014 08:20 AM, Thierry Reding wrote:
> On Thu, Jan 23, 2014 at 05:42:54PM -0700, Stephen Warren wrote:
> [...]
>> diff --git a/arch/arm/include/asm/arch-tegra/clk_rst.h
>> b/arch/arm/include/asm/arch-tegra/clk_rst.h
> [...]
>> @@ -105,10 +128,10 @@ struct clk_rst_ctlr {
>> uint crc_c
On 01/21/2014 09:34 AM, York Sun wrote:
> On 01/21/2014 09:29 AM, Scott Wood wrote:
>> On Tue, 2014-01-21 at 10:14 +0100, Wolfgang Denk wrote:
>>> Dear York,
>>>
>>> In message you wrote:
> On second thought, I also think we should avoid solutions where the
> BE/LE test has to be done
On 01/24/2014 08:44 AM, Thierry Reding wrote:
> On Thu, Jan 23, 2014 at 05:42:55PM -0700, Stephen Warren wrote:
>> +static bool is_partition_powered(u32 mask)
>> +{
>> +struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
>> +u32 reg;
>> +
>> +/* Get power gate status */
>> +r
On 01/24/2014 08:20 AM, Thierry Reding wrote:
> On Thu, Jan 23, 2014 at 05:42:54PM -0700, Stephen Warren wrote:
>> diff --git a/arch/arm/include/asm/arch-tegra124/gpio.h
>> b/arch/arm/include/asm/arch-tegra124/gpio.h
> [...]
>> +enum gpio_pin {
>> +GPIO_PA0 = 0, /* pin 0 */
> [...]
>> +
From: Jimmy Zhang
Based on the Tegra TRM, the system clock (which is the AVP clock) can
run up to 275MHz. On power on, the default sytem clock source is set to
PLLP_OUT0. In function clock_early_init(), PLLP_OUT0 will be set to
408MHz which is beyond system clock's upper limit.
The fix is to set
On 01/24/2014 07:13 AM, Thierry Reding wrote:
> On Thu, Jan 23, 2014 at 11:58:13AM -0700, Stephen Warren wrote:
> [...]
>> diff --git a/arch/arm/cpu/tegra-common/clock.c
>> b/arch/arm/cpu/tegra-common/clock.c
> [...]
>> @@ -575,3 +575,91 @@ void clock_init(void)
>> /* Do any special system ti
From: Stephen Warren
Tegra114 and later's PMC module removes the pwrgate_timer_on register
and replaces it with a clamp_status register. Adjust pmc.h to reflect
this, and update any code affected by the change.
The cpu.c change in this patch was extracted from a much larger patch
by Jimmy Zhang.
On 01/24/2014 09:15 AM, Tom Rini wrote:
> On Thu, Jan 23, 2014 at 12:55:27PM -0700, Stephen Warren wrote:
>> From: Stephen Warren
>>
>> People who write (or scripts that auto-generate) extlinux.conf don't
>> want to know about HW-specific information such as FDT filenames. Create
>> a new extlinux
From: Stephen Warren
Since all code that sets or interprets MASK_BITS_* now uses the enums
to define/compare the values, there is no need for MASK_BITS_* to have
a specific integer value. In fact, having a specific integer value may
encourage people to hard-code those values, or interpret the val
From: Stephen Warren
Not all code that set or interpreted "mux_bits" was using the named
macros, but rather some was simply using hard-coded integer constants.
This makes it hard to determine which pieces of code are affected by
changes to those constants.
Replace the integer constants with the
From: Stephen Warren
OUT_CLK_SOURCE_ are currently named after the number of bits the mask
they represent includes. However, bit count is not the only possible
variable; bit position may also vary. Rename OUT_CLK_SOURCE_ to
OUT_CLK_SOURCE_31_30_ and OUT_CLK_SOURCE4_ to OUT_CLK_SOURCE_31_28 to
mor
From: Tom Warren
Some clock sources have 3-bit muxes in bits 31:29. Implement core
support for this mux field.
Signed-off-by: Tom Warren
[swarren, extracted from a larger patch by Tom]
Signed-off-by: Stephen Warren
Reviewed-by: Thierry Reding
Tested-by: Thierry Reding
Acked-by: Thierry Redin
From: Stephen Warren
The only place where the MASK_BITS_* values are used is in
adjust_periph_pll(), which interprets the value 4 (old MASK_BITS_29_28,
new MASK_BITS_31_28) as being associated with mask OUT_CLK_SOURCE4_MASK,
i.e. bits 31:28. Rename the MASK_BITS_ macro to reflect how it's actuall
On 01/24/2014 06:50 AM, Thierry Reding wrote:
> On Wed, Jan 22, 2014 at 01:20:35PM -0700, Stephen Warren wrote:
>> From: Stephen Warren
>>
>> Since all code that sets or interprets MASK_BITS_* now uses the enums
>> to define/compare the values, there is no need for MASK_BITS_* to have
>> a specifi
From: Tom Warren
The enum used to define the set of register bits used to represent a
clock's input mux, MUX_BITS_*, is defined separately for each SoC at
present. Move this definition to a common location to ease fixing up
some issues with the definition, and the code that uses it.
Signed-off-b
On 01/24/2014 06:54 AM, Thierry Reding wrote:
> On Wed, Jan 22, 2014 at 01:20:31PM -0700, Stephen Warren wrote:
...
> With the few small comments addressed, the series:
>
> Reviewed-by: Thierry Reding
>
> I've also given these a spin together with your reworked Tegra124
> patches and it al
On 01/24/2014 06:47 AM, Thierry Reding wrote:
> On Wed, Jan 22, 2014 at 01:20:33PM -0700, Stephen Warren wrote:
>> From: Stephen Warren
>>
>> OUT_CLK_SOURCE_ are currently named after the number of bits the mask
>> they represent includes. However, bit count is not the only possible
>> variable; b
On 01/24/2014 06:44 AM, Thierry Reding wrote:
> On Wed, Jan 22, 2014 at 01:20:32PM -0700, Stephen Warren wrote:
>> From: Stephen Warren
>>
>> The only place where the MASK_BITS_* values are used is in
>> adjust_periph_pll(), which interprets the value 4 (old MASK_BITS_29_28,
>> new MASK_BITS_31_28
On Wed, Jan 22, 2014 at 09:45:53AM -0800, York Sun wrote:
> Tom,
>
> The following changes since commit e222b1f36fedb0363dbc21e0add7dc3848bae553:
>
> powerpc/mpc85xx:Increase binary size for P, B & T series boards. (2014-01-21
> 14:06:30 -0800)
>
> are available in the git repository at:
>
>
On Thu, Jan 23, 2014 at 12:55:27PM -0700, Stephen Warren wrote:
> From: Stephen Warren
>
> People who write (or scripts that auto-generate) extlinux.conf don't
> want to know about HW-specific information such as FDT filenames. Create
> a new extlinux.conf tag "fdtdir" that specifies only the dir
I've been booting Venice2 with these patches for a day now, everything
seems to work as expected, so:
Tested-by: Thierry Reding
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On Thu, Jan 23, 2014 at 05:42:55PM -0700, Stephen Warren wrote:
[...]
> diff --git a/arch/arm/cpu/arm720t/tegra-common/cpu.c
> b/arch/arm/cpu/arm720t/tegra-common/cpu.c
[...]
> @@ -128,6 +144,18 @@ int pllx_set_rate(struct clk_pll_simple *pll , u32 divn,
> u32 divm,
>
> debug(" pllx_set_r
Add a callback so that a board can implement it's own specific routine to
toggle the port's nRESET line.
Signed-off-by: Marek Vasut
Cc: Stefano Babic
---
drivers/pci/pcie_imx.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/
On Friday, January 24, 2014 at 04:15:37 PM, Wally Yeh wrote:
> Dear Marek:
> thank you very much! you really help me a lot. :D
>
> and I see you in the community at the samw post about uboot pcie:
> https://community.freescale.com/message/375723?et=watches.email.thread#3757
> 23
>
> I'm Wally
On Thu, Jan 23, 2014 at 05:42:54PM -0700, Stephen Warren wrote:
[...]
> diff --git a/arch/arm/include/asm/arch-tegra/clk_rst.h
> b/arch/arm/include/asm/arch-tegra/clk_rst.h
[...]
> @@ -105,10 +128,10 @@ struct clk_rst_ctlr {
> uint crc_clk_cpug_cmplx;/* _CLK_CPUG_CMPLX_0, 0x378
Hi Wolfgang,
El Fri, 24 Jan 2014 14:50:10 +0100
Wolfgang Denk escribió:
> Dear Dennis Gilmore,
>
> In message <1390501358-4564-3-git-send-email-den...@ausil.us> you
> wrote:
> > describe a set of default features that distros can rely on being
> > available. having this common definition means
On 24.01.2014, at 02:39, Scott Wood wrote:
> On Fri, 2014-01-24 at 02:25 +0100, Alexander Graf wrote:
>> On 24.01.2014, at 01:49, Scott Wood wrote:
>>
>>> On Thu, 2014-01-23 at 14:08 +0100, Alexander Graf wrote:
On 21.01.2014, at 03:25, Scott Wood wrote:
> On Sun, 2014-01-19 at
- "Prafulla Wadaskar" wrote:
> Hi Ajay,
>
> Please avoid re-post with the same subject.
> I think, Yesterday you posted the same patches.
> If there is any diff or updates, then you should add next version info
> to them.
>
> Regards...
> Prafulla . . .
>
Hi Prafulla,
I apologize for thi
Hi Tom,
2014/1/24 Tom Rini :
> On Fri, Jan 24, 2014 at 09:45:36AM +0100, Enric Balletbo Serra wrote:
>> Hi Tom,
>>
>> 2014/1/6 Tom Rini :
>> > On Mon, Dec 23, 2013 at 12:11:25PM +0100, Enric Balletbo Serra wrote:
>> >> 2013/12/6 Enric Balletbo i Serra :
>> >> > Hi all,
>> >> >
>> >> > Most of the
Hi Stephen,
Looks fine to me..
On Jan 24, 2014, at 2:42 AM, Stephen Warren wrote:
> From: Stephen Warren
>
> Tegra124's MMC controller is very similar to earlier SoC generations,
> and can be supported by the same driver.
>
> However, there are some non-backwards-compatible HW differences, an
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Hash: SHA1
On 01/24/2014 08:49 AM, Wolfgang Denk wrote:
> Dear Dennis Gilmore,
>
> In message <1390501358-4564-2-git-send-email-den...@ausil.us> you wrote:
>> Signed-off-by: Dennis Gilmore
>
> "add any option for filesystem with sysboot uses generic load" ?
>
On Thu, Jan 23, 2014 at 11:58:13AM -0700, Stephen Warren wrote:
[...]
> diff --git a/arch/arm/cpu/tegra-common/clock.c
> b/arch/arm/cpu/tegra-common/clock.c
[...]
> @@ -575,3 +575,91 @@ void clock_init(void)
> /* Do any special system timer/TSC setup */
> arch_timer_init();
> }
> +
>
Dear micro1183,
In message <52e2615c.1000...@gmail.com> you wrote:
> This patch adds support for the silica pengwyn board with AM335x SoC
Your patch is line-wrapped and does not apply. Please fix your mailer
configuration.
> +/*
> + * board.c
> + *
> + * Copyright (C) 2013 Lothar Felten
> + *
On Fri, Jan 24, 2014 at 13:49 +0100, micro1183 wrote:
>
> This patch adds support for the silica pengwyn board with AM335x SoC
>
> Signed-off-by: Lothar Felten
Please consider using git send-email for submission. Your MUA
broke the patch so it doesn't apply, and the From and S-o-b specs
don't
On 01/24/2014 04:27 AM, Fabio Estevam wrote:
From: Fabio Estevam
MAINTAINERS file has been removed from the project.
Replace its reference with 'boards.cfg' file instead.
Signed-off-by: Fabio Estevam
---
board/boundary/nitrogen6x/README | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-
Thanks Fabio,
On 01/24/2014 04:15 AM, Fabio Estevam wrote:
From: Fabio Estevam
No need to pass 'u-boot.imx' as parameter for 'make' because u-boot.imx is
built by default.
Signed-off-by: Fabio Estevam
---
board/boundary/nitrogen6x/README | 2 +-
1 file changed, 1 insertion(+), 1 deletion(
On Wed, Jan 22, 2014 at 01:20:59PM -0700, Stephen Warren wrote:
[...]
> diff --git a/arch/arm/include/asm/arch-tegra/pmc.h
> b/arch/arm/include/asm/arch-tegra/pmc.h
[...]
> @@ -21,7 +21,11 @@ struct pmc_ctlr {
> uint pmc_dpd_sample;/* _DPD_PADS_SAMPLE_0, offset 20 */
> uint
Dear mks,
it would be nice if you could use a real name here...
In message <1310410193.3166.2.camel@debian> you wrote:
>
> Im getting a trouble with mtd on my imx27 27 board, I can't write or
> erase it on U-Boot-1.3.4, here is the log :
I'm sorry, but v1.3.4 is more than 5 years old - this is
On Friday, January 24, 2014 at 12:55:07 PM, Wally Yeh wrote:
> Dear Marek:
> I'm sorry to send this email bothering you.
> but I'm so curious about your patch in uboot:
> http://patchwork.ozlabs.org/patch/301216/
>
> in your patch imx_pcie.c, there's a fuction replace the DABT handler for
> fr
On Wed, Jan 22, 2014 at 01:20:31PM -0700, Stephen Warren wrote:
> From: Tom Warren
>
> The enum used to define the set of register bits used to represent a
> clock's input mux, MUX_BITS_*, is defined separately for each SoC at
> present. Move this definition to a common location to ease fixing up
On Wed, Jan 22, 2014 at 01:20:33PM -0700, Stephen Warren wrote:
> From: Stephen Warren
>
> OUT_CLK_SOURCE_ are currently named after the number of bits the mask
> they represent includes. However, bit count is not the only possible
> variable; bit position may also vary. Rename OUT_CLK_SOURCE_ to
On Wed, Jan 22, 2014 at 01:20:32PM -0700, Stephen Warren wrote:
> From: Stephen Warren
>
> The only place where the MASK_BITS_* values are used is in
> adjust_periph_pll(), which interprets the value 4 (old MASK_BITS_29_28,
> new MASK_BITS_31_28) as being associated with mask OUT_CLK_SOURCE4_MASK
Dear Dennis Gilmore,
In message <1390501358-4564-3-git-send-email-den...@ausil.us> you wrote:
> describe a set of default features that distros can rely on being available.
> having this common definition means that distros can easily support systems
> implementing them.
>
> Signed-off-by: Dennis
On Wed, Jan 22, 2014 at 01:20:35PM -0700, Stephen Warren wrote:
> From: Stephen Warren
>
> Since all code that sets or interprets MASK_BITS_* now uses the enums
> to define/compare the values, there is no need for MASK_BITS_* to have
> a specific integer value. In fact, having a specific integer
Dear Dennis Gilmore,
In message <1390501358-4564-2-git-send-email-den...@ausil.us> you wrote:
> Signed-off-by: Dennis Gilmore
"add any option for filesystem with sysboot uses generic load" ?
I'm sorry, but I cannot understand what this is supposed to mean.
> +#ifdef CONFIG_CMD_FS_GENERIC
Can
Dear Danny,
In message <52e15bad.1020...@coloradoengineeringinc.com> you wrote:
>
> > Yes - if you add support for 64 bit configurations in general, and
> > for powerpc64 in particular.
> I don't even have a sense for what would be involved here. How
> fundamentally would the U-Boot code need to
On Fri, Jan 24, 2014 at 09:45:36AM +0100, Enric Balletbo Serra wrote:
> Hi Tom,
>
> 2014/1/6 Tom Rini :
> > On Mon, Dec 23, 2013 at 12:11:25PM +0100, Enric Balletbo Serra wrote:
> >> 2013/12/6 Enric Balletbo i Serra :
> >> > Hi all,
> >> >
> >> > Most of the boards based on TI processors uses comm
Hi Ajay,
Please avoid re-post with the same subject.
I think, Yesterday you posted the same patches.
If there is any diff or updates, then you should add next version info to them.
Regards...
Prafulla . . .
> -Original Message-
> From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com]
>
This patch adds support for the silica pengwyn board with AM335x SoC
Signed-off-by: Lothar Felten
---
arch/arm/include/asm/arch-am33xx/ddr_defs.h | 16 ++
board/silica/pengwyn/Makefile | 13 +
board/silica/pengwyn/board.c| 245 +++
board/silica/
Enable entherent for T1040QDS. It enables FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5
- Define MDIO related configs
- Added eth.c file
- Update t1040.c to support RGMII and SGMII
- Update t1040qds.c to support ethernet
- Define the PHY address
Signed-off-by: Arpit Goel
Signed-off-by: Poonam Aggrwal
T1040 has only one SerDes block. so update the code accordingly.
Also, add support of SerDes Protocol 0x00, 0x06, 0x40, 0x69 0x85,
0xA7 and 0xAA
Signed-off-by: Arpit Goel
Signed-off-by: Poonam Aggrwal
Signed-off-by: Priyanka Jain
Signed-off-by: Prabhakar Kushwaha
---
arch/powerpc/cpu/mpc85xx
From: Fabio Estevam
MAINTAINERS file has been removed from the project.
Replace its reference with 'boards.cfg' file instead.
Signed-off-by: Fabio Estevam
---
board/boundary/nitrogen6x/README | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/boundary/nitrogen6x/README
1 - 100 of 149 matches
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