date:20140428

Hi Tom,

On Fri, 2014-04-25 at 15:45 -0400, Tom Rini wrote:
 On Fri, Apr 25, 2014 at 02:24:57PM +, Alexey Brodkin wrote:
 
  Dear Tom,
  
  The following changes since commit
  adcdeacc3eda1e5949e54062aa99c299e12483be:
  
Merge branch 'master' of git://git.denx.de/u-boot-mips (2014-04-23
  11:07:11 -0400)
  
  are available in the git repository at:
  
  
ssh://gu-...@git.denx.de/u-boot-arc master
 
 Note we usually use one of the git:// URIs here :)

I understand it. But unfortunately in our company most ports are closed
for external resources except SSH. That's why I may only use SSH for
secure pull/push from/to external repos.

If this is completely not-acceptable for you I'll try to work with IT
people and get access to U-boot repos via GIT protocol, but this might
be a bit problematic.

But IMHO since in pull request you have full command line for pulling I
may expect that it should not complicate your operation significantly.

Regards,
Alexey

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[U-Boot] [PATCH] nand_spl: remove unused linker scripts u-boot-nand.lds

Commit 345b77ba removed some nand_spl boards but
it missed to delete linker scripts.

These linker scripts are not used now.

And one more fix:
amcc/acadia does not support nand_spl anymore, so remove

Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Stefan Roese s...@denx.de
---
 board/amcc/acadia/acadia.c |   2 -
 board/amcc/acadia/u-boot-nand.lds  |  87 
 board/amcc/bamboo/u-boot-nand.lds  |  88 
 board/amcc/canyonlands/u-boot-nand.lds |  88 
 board/amcc/kilauea/u-boot-nand.lds |  87 
 board/amcc/sequoia/u-boot-nand.lds |  88 
 board/esd/pmc440/u-boot-nand.lds   | 118 -
 7 files changed, 558 deletions(-)
 delete mode 100644 board/amcc/acadia/u-boot-nand.lds
 delete mode 100644 board/amcc/bamboo/u-boot-nand.lds
 delete mode 100644 board/amcc/canyonlands/u-boot-nand.lds
 delete mode 100644 board/amcc/kilauea/u-boot-nand.lds
 delete mode 100644 board/amcc/sequoia/u-boot-nand.lds
 delete mode 100644 board/esd/pmc440/u-boot-nand.lds

diff --git a/board/amcc/acadia/acadia.c b/board/amcc/acadia/acadia.c
index 9c6deea..2eb18df 100644
--- a/board/amcc/acadia/acadia.c
+++ b/board/amcc/acadia/acadia.c
@@ -39,12 +39,10 @@ int board_early_init_f(void)
 {
unsigned int reg;
 
-#if !defined(CONFIG_NAND_U_BOOT)
/* don't reinit PLL when booting via I2C bootstrap option */
mfsdr(SDR0_PINSTP, reg);
if (reg != 0xf000)
board_pll_init_f();
-#endif
 
acadia_gpio_init();
 
diff --git a/board/amcc/acadia/u-boot-nand.lds 
b/board/amcc/acadia/u-boot-nand.lds
deleted file mode 100644
index 9a331c5..000
--- a/board/amcc/acadia/u-boot-nand.lds
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * (C) Copyright 2007
- * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .text  :
-  {
-/* WARNING - the following is hand-optimized to fit within */
-/* the sector layout of our flash chips!   XXX FIXME XXX   */
-
-arch/powerpc/cpu/ppc4xx/start.o(.text*)
-
-/* Align to next NAND block */
-. = ALIGN(0x4000);
-common/env_embedded.o  (.ppcenv)
-/* Keep some space here for redundant env and potential bad env blocks */
-. = ALIGN(0x1);
-
-*(.text*)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata:
-  {
-*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF)  0xFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-KEEP(*(.got))
-_GOT2_TABLE_ = .;
-KEEP(*(.got2))
-_FIXUP_TABLE_ = .;
-KEEP(*(.fixup))
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) 2;
-  __fixup_entries = (. - _FIXUP_TABLE_)2;
-
-  .data:
-  {
-*(.data*)
-*(.sdata*)
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-
-  .u_boot_list : {
-   KEEP(*(SORT(.u_boot_list*)));
-  }
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)   :
-  {
-   *(.bss*)
-   *(.sbss*)
-   *(COMMON)
-   . = ALIGN(4);
-  }
-
-  __bss_end = . ;
-  PROVIDE (end = .);
-}
diff --git a/board/amcc/bamboo/u-boot-nand.lds 
b/board/amcc/bamboo/u-boot-nand.lds
deleted file mode 100644
index 5e84369..000
--- a/board/amcc/bamboo/u-boot-nand.lds
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * (C) Copyright 2007
- * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .text  :
-  {
-/* WARNING - the following is hand-optimized to fit within */
-/* the sector layout of our flash chips!   XXX FIXME XXX   */
-
-arch/powerpc/cpu/ppc4xx/start.o(.text*)
-board/amcc/bamboo/init.o   (.text*)
-
-/* Align to next NAND block */
-. = ALIGN(0x4000);
-common/env_embedded.o  (.ppcenv)
-/* Keep some space here for redundant env and potential bad env blocks */
-. = ALIGN(0x1);
-
-*(.text*)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata:
-  {
-*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF)  0xFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-KEEP(*(.got))
-_GOT2_TABLE_ = .;
-KEEP(*(.got2))
-_FIXUP_TABLE_ = .;
-KEEP(*(.fixup))
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) 2;
-  __fixup_entries = (. - _FIXUP_TABLE_)2;
-
-

Re: [U-Boot] [PATCH] sh: delete an unused source file

Hi Nobuhiro,

On Mon, 31 Mar 2014 15:02:24 +0900
Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com wrote:

 Applied to u-boot-sh.git.
 Thanks!
 
 Nobuhiro
 
 2014-03-31 14:46 GMT+09:00 Nobuhiro Iwamatsu 
 nobuhiro.iwamatsu...@renesas.com:
  2014-03-31 13:09 GMT+09:00 Masahiro Yamada yamad...@jp.panasonic.com:
  Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
  Cc: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
 
  Acked-by: Nobuhiro Iwamatsu iwama...@nigauri.org


This patch went to u-boot-sh/next but it has not been synced with
the mainline.

Could you send a pull-request of u-boot-sh/next ?

Best Regards
Masahiro Yamada

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Re: [U-Boot] [PATCH] spl: consolidate arch/arm/include/asm/arch-*/spl.h

Hi Tom,

On Fri, 25 Apr 2014 14:52:06 -0400
Tom Rini tr...@ti.com wrote:

 On Wed, Apr 16, 2014 at 03:44:36PM +0900, Masahiro Yamada wrote:
 
  arch/arm/include/asm/spl.h requires all SoCs to have
  arch/arm/include/asm/arch-*/spl.h.
  
  But many of them just define BOOT_DEVICE_* macros.
  
  Those macros are used in the switch (boot_device) { ... }
  statement in common/spl/spl.c.
  
  So they should not be archtecture specific, but described as
  a simpile enumeration.
  
  This commit merge most of arch/arm/include/asm/arch-*/spl.h
  into arch/arm/include/asm/spl.h.
  
  With a little more effort, arch-zynq/spl.h and arch-socfpga/spl.h
  will be merged, while I am not sure about OMAP and Exynos.
 
 The problem is that on TI platforms these values have meaning defined by
 ROM (which changes occasionally).  When ROM starts us up, we get a
 little bit of info that says I found and loaded you on   So while
 we could move towards moving BOOT_DEVICE_FOO into spl.h we'd need in
 arch/arm/cpu/armv7/omap-common/boot-common.c some logic to translate
 from ROM numbers to U-Boot numbers.

Could you apply my patch first and fix the OMAP translation logic lator?

I want to stop duplication of similar spl.h headers.

Best Regards
Masahiro Yamada
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Re: [U-Boot] [PATCH] nand_spl: remove unused linker scripts u-boot-nand.lds

2014-04-28 Thread Stefan Roese


On 28.04.2014 09:53, Masahiro Yamada wrote:

Commit 345b77ba removed some nand_spl boards but
it missed to delete linker scripts.

These linker scripts are not used now.

And one more fix:
amcc/acadia does not support nand_spl anymore, so remove

Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Stefan Roese s...@denx.de


Thanks for catching those missed files:

Acked-by: Stefan Roese s...@denx.de

Thanks,
Stefan

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[U-Boot] [PATCH v2] qe: disable qe when qe-ucode fails to be uploaded

2014-04-28 Thread Zhao Qiang

when qe-ucode fails to be uploaded, disable qe.

Signed-off-by: Zhao Qiang b45...@freescale.com
---
Changes for v2:
- add #ifdef CONFIG_MPC85xx

 drivers/qe/qe.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index b5ddc4b..c41bfcc 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -14,6 +14,8 @@
 #include asm/immap_qe.h
 #include qe.h
 
+#define MPC85xx_DEVDISR_QE_DISABLE 0x1
+
 qe_map_t   *qe_immr = NULL;
 static qe_snum_t   snums[QE_NUM_OF_SNUM];
 
@@ -317,7 +319,9 @@ int qe_upload_firmware(const struct qe_firmware *firmware)
size_t calc_size = sizeof(struct qe_firmware);
size_t length;
const struct qe_header *hdr;
-
+#ifdef CONFIG_MPC85xx
+   ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+#endif
if (!firmware) {
printf(Invalid address\n);
return -EINVAL;
@@ -330,6 +334,9 @@ int qe_upload_firmware(const struct qe_firmware *firmware)
if ((hdr-magic[0] != 'Q') || (hdr-magic[1] != 'E') ||
(hdr-magic[2] != 'F')) {
printf(Not a microcode\n);
+#ifdef CONFIG_MPC85xx
+   setbits_be32(gur-devdisr, MPC85xx_DEVDISR_QE_DISABLE);
+#endif
return -EPERM;
}
 
-- 
1.8.5

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[U-Boot] [PATCH v2] nand_spl: remove unused linker scripts u-boot-nand.lds

Commit 345b77ba removed some nand_spl boards but
it missed to delete linker scripts.

These linker scripts are not used now.

And one more fix:
amcc/acadia does not support nand_spl anymore, so remove
  #if !defined(CONFIG_NAND_U_BOOT) ... #endif

Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Stefan Roese s...@denx.de
Acked-by: Stefan Roese s...@denx.de
---

Changes in v2:
  - Fix commit description:
  Add #if !defined(CONFIG_NAND_U_BOOT) ... #endif
   (At v1, it was accidentally dropped from git log,
   because it begins with '#'.

 board/amcc/acadia/acadia.c |   2 -
 board/amcc/acadia/u-boot-nand.lds  |  87 
 board/amcc/bamboo/u-boot-nand.lds  |  88 
 board/amcc/canyonlands/u-boot-nand.lds |  88 
 board/amcc/kilauea/u-boot-nand.lds |  87 
 board/amcc/sequoia/u-boot-nand.lds |  88 
 board/esd/pmc440/u-boot-nand.lds   | 118 -
 7 files changed, 558 deletions(-)
 delete mode 100644 board/amcc/acadia/u-boot-nand.lds
 delete mode 100644 board/amcc/bamboo/u-boot-nand.lds
 delete mode 100644 board/amcc/canyonlands/u-boot-nand.lds
 delete mode 100644 board/amcc/kilauea/u-boot-nand.lds
 delete mode 100644 board/amcc/sequoia/u-boot-nand.lds
 delete mode 100644 board/esd/pmc440/u-boot-nand.lds

diff --git a/board/amcc/acadia/acadia.c b/board/amcc/acadia/acadia.c
index 9c6deea..2eb18df 100644
--- a/board/amcc/acadia/acadia.c
+++ b/board/amcc/acadia/acadia.c
@@ -39,12 +39,10 @@ int board_early_init_f(void)
 {
unsigned int reg;
 
-#if !defined(CONFIG_NAND_U_BOOT)
/* don't reinit PLL when booting via I2C bootstrap option */
mfsdr(SDR0_PINSTP, reg);
if (reg != 0xf000)
board_pll_init_f();
-#endif
 
acadia_gpio_init();
 
diff --git a/board/amcc/acadia/u-boot-nand.lds 
b/board/amcc/acadia/u-boot-nand.lds
deleted file mode 100644
index 9a331c5..000
--- a/board/amcc/acadia/u-boot-nand.lds
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * (C) Copyright 2007
- * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .text  :
-  {
-/* WARNING - the following is hand-optimized to fit within */
-/* the sector layout of our flash chips!   XXX FIXME XXX   */
-
-arch/powerpc/cpu/ppc4xx/start.o(.text*)
-
-/* Align to next NAND block */
-. = ALIGN(0x4000);
-common/env_embedded.o  (.ppcenv)
-/* Keep some space here for redundant env and potential bad env blocks */
-. = ALIGN(0x1);
-
-*(.text*)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata:
-  {
-*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF)  0xFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-KEEP(*(.got))
-_GOT2_TABLE_ = .;
-KEEP(*(.got2))
-_FIXUP_TABLE_ = .;
-KEEP(*(.fixup))
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) 2;
-  __fixup_entries = (. - _FIXUP_TABLE_)2;
-
-  .data:
-  {
-*(.data*)
-*(.sdata*)
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-
-  .u_boot_list : {
-   KEEP(*(SORT(.u_boot_list*)));
-  }
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)   :
-  {
-   *(.bss*)
-   *(.sbss*)
-   *(COMMON)
-   . = ALIGN(4);
-  }
-
-  __bss_end = . ;
-  PROVIDE (end = .);
-}
diff --git a/board/amcc/bamboo/u-boot-nand.lds 
b/board/amcc/bamboo/u-boot-nand.lds
deleted file mode 100644
index 5e84369..000
--- a/board/amcc/bamboo/u-boot-nand.lds
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * (C) Copyright 2007
- * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .text  :
-  {
-/* WARNING - the following is hand-optimized to fit within */
-/* the sector layout of our flash chips!   XXX FIXME XXX   */
-
-arch/powerpc/cpu/ppc4xx/start.o(.text*)
-board/amcc/bamboo/init.o   (.text*)
-
-/* Align to next NAND block */
-. = ALIGN(0x4000);
-common/env_embedded.o  (.ppcenv)
-/* Keep some space here for redundant env and potential bad env blocks */
-. = ALIGN(0x1);
-
-*(.text*)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata:
-  {
-*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF)  0xFF00;
-  _erotext =

Re: [U-Boot] [PATCH] ventana: fixed comments in eeprom header

Hallo Tim,

On 03/04/2014 07:10, Tim Harvey wrote:
 Fix several invalid comments regarding the EEPROM structure used by Gateworks
 Ventana boards.
 
 Signed-off-by: Tim Harvey thar...@gateworks.com
 ---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
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Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
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Re: [U-Boot] [PATCH] ventana: remove redundant include

Hi Tim,

On 03/04/2014 07:11, Tim Harvey wrote:
 Signed-off-by: Tim Harvey thar...@gateworks.com
 ---
  board/gateworks/gw_ventana/gw_ventana.c | 1 -
  1 file changed, 1 deletion(-)
 
 diff --git a/board/gateworks/gw_ventana/gw_ventana.c 
 b/board/gateworks/gw_ventana/gw_ventana.c
 index c130e2c..2113740 100644
 --- a/board/gateworks/gw_ventana/gw_ventana.c
 +++ b/board/gateworks/gw_ventana/gw_ventana.c
 @@ -31,7 +31,6 @@
  #include netdev.h
  #include power/pmic.h
  #include power/pfuze100_pmic.h
 -#include i2c.h
  #include fdt_support.h
  #include jffs2/load_kernel.h
  #include spi_flash.h

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH 1/8] wandboard: Convert to generic board

Hi Fabio,

On 22/04/2014 20:34, Fabio Estevam wrote:
 Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning 
 on
 boot:
 
 Warning: Your board does not use generic board. Please read  

 doc/README.generic-board and take action. Boards not  
   
 upgraded by the late 2014 may break or be removed.
 
 Signed-off-by: Fabio Estevam fabio.este...@freescale.com
 ---
  include/configs/wandboard.h | 2 ++
  1 file changed, 2 insertions(+)
 
 diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
 index 6c74c72..b137d06 100644
 --- a/include/configs/wandboard.h
 +++ b/include/configs/wandboard.h
 @@ -26,6 +26,8 @@
  #define CONFIG_INITRD_TAG
  #define CONFIG_REVISION_TAG
  
 +#define CONFIG_SYS_GENERIC_BOARD
 +

Applied (whole patchset) to u-boot-imx, thanks !

Best regards,
Stefano Babic


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Re: [U-Boot] [PATCH] ARM: imx6: nitrogen6x: Enable CONFIG_SYS_GENERIC_BOARD

On 28/04/2014 07:05, Marek Vasut wrote:
 On Saturday, April 26, 2014 at 01:15:46 AM, Eric Nelson wrote:
 
 You should learn to write sensible commit messages ;-)
 

Well, the current main issue is the warning, but the subject already
says what is the change. IMHO the patch is ok. I will add myself by
merging the same commit message that Fabio adds for his patchset on the
same issue:

Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following
warning on
boot:

Warning: Your board does not use generic board. Please read

doc/README.generic-board and take action. Boards not

upgraded by the late 2014 may break or be removed.

This completes the patch and address Marek's comment.

 Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
 ---
 Note that this seems a bit premature until we have some infrastructure
 around DTB files in place, but we certainly don't want big hairy
 warning messages on our boards.

 Is anyone planning on pulling in at least the pinfunc and .dtsi
 files for i.MX? I'm not sure how much else will be useful in U-Boot.

I have currently no projects in this direction, so personally I will not
work in a short amount of time on this topic. However, I agree that the
first thing for a DTS in U-Boot should be the pinmux.

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH v3 8/9] sunxi: non-FEL SPL boot support for sun7i

On Mon, 2014-04-28 at 01:58 +0200, Marek Vasut wrote:
 On Sunday, April 27, 2014 at 09:29:02 PM, Ian Campbell wrote:
  On Sun, 2014-04-27 at 21:15 +0200, Marek Vasut wrote:
   On Sunday, April 27, 2014 at 08:38:52 PM, Ian Campbell wrote:
On Sun, 2014-04-27 at 20:07 +0200, Marek Vasut wrote:
 # git grep common.h tools/
 tools/patman/test.py: include/common.h|8 ++
 tools/patman/test.py:+#include common.h
 tools/scripts/define2mk.sed:# which preprocesses the common.h header
 files and outputs the final

I only got these three when I looked. I'm on v2014.04, but even with
current trunk I only see fit_common.h not the ones which you show below
(tools/updater isn't even in trunk). Perhaps this is some newer stuff
not yet in trunk?
   
   Ah, darn. What errors do you get ?
  
  All sorts...
 
 Ouch, ok. How come the other files can include this stuff without errors ?

AFAIK nothing in the current mainline master does, I think you must have
some other branch merged.

Ian.


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Re: [U-Boot] [PATCH 03/11] kconfig: add board Kconfig and defconfig files

Hi Stephen,


On Thu, 24 Apr 2014 14:36:33 -0600
Stephen Warren swar...@wwwdotorg.org wrote:

 On 04/23/2014 11:04 PM, Masahiro Yamada wrote:
  This commit adds
   - arch/*/Kconfig: provide a menu to select target boards
   - board/*/Kconfig: set CONFIG macros to the appropriate values
  for each board
   - configs/*_defconfig: default setting of each board
  
  (This commit was automatically generated by a conversion script
  based on boards.cfg)
  
  In Linux Kernel, defconfig files are located under
  arch/${ARCH}/configs/ directory.
  It works in Linux Kernel because ARCH is always given from the
  command line for cross compile.
  
  But in U-Boot, ARCH is not given from the command line.
  Which means we cannot know ARCH before the board configuration.
  That is why *_defconfig files over all architectures should be
  gathered into one directory ./configs/.
  (The problem is configs/ directory contains about 1200 files!)
 
 Perhaps we can change the command-line used to build U-Boot, rather than
 shoe-horning U-Boot's Kconfig usage to fit that current limitation.

I am afraid something like
 make ARCH=arm seaboard_defconfig
 make ARCH=arm  CROSS_COMPILE=arm-linux-gnueabi-
is annoying for some users.

This item was an open discussion in the RFC version, but
Simon was the only person who replyed this question.

See
https://www.mail-archive.com/u-boot@lists.denx.de/msg134502.html
How ARCH should be given?   section.


Of course, this part is changable if other people accept
Linux's ARCH=${ARCH} way.

Comments are still welcome.


  Besides, we must configure boards for SPL and TPL too
  if they are supported.
  For those boards, defconfig files with the same name are placed
  in configs/spl/, configs/tpl/ directories.
 
 I really don't think we should have separate defconfig files for SPL/TPL/...
 
 I don't think that the approach of a single huge Kconfig file (albeit
 split into multiple included files per architecture and board) is going
 to work; it requires a massive amount of irrelevant Kconfig to be
 parsed, whereas scanning boards.cfg is a much simpler
 scan-until-you-find-a-matching-line approach.
 
  diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
 
  +config TARGET_SEABOARD
  +   bool Support seaboard
 
 If U-Boot is built like:
 
 make seaboard_config
 make
 
 ... then I'm not sure why there is a Kconfig option for TARGET_SEABAORD.
 Are you intending for the .config file to dictate that we're building
 for Seaboard? If so, then presumably the make commands above will no
 longer be valid, and if we can change that aspect, why couldn't we
 require the user to add the architecture to the build command-line, just
 like the kernel does?

TARGET_SEABOARD is used just for selecting hard-coded
CONFIG_SYS_CPU=armv7(CONFIG_SYS_CPU=arm720t in spl/.config)
CONFIG_SYS_BOARD=seaboard
CONFIG_SYS_VENDOR=nvidia
etc.

You said adding non-user-editable CONFIG to defconfig is odd.
So, this patch selects a board with CONFIG_TARGET_*  and then
selects hard-coded macros.


  diff --git a/board/nvidia/seaboard/Kconfig b/board/nvidia/seaboard/Kconfig
  new file mode 100644
  index 000..7d38a81
  --- /dev/null
  +++ b/board/nvidia/seaboard/Kconfig
  @@ -0,0 +1,32 @@
  +if TARGET_SEABOARD
  +
  +config SYS_CPU
  +   string
  +   default arm720t if SPL_BUILD
  +   default armv7 if !SPL_BUILD
  +
  +config SYS_BOARD
  +   string
  +   default seaboard
  +
  +config SYS_VENDOR
  +   string
  +   default nvidia
  +
  +config SYS_SOC
  +   string
  +   default tegra20
  +
  +config SYS_CONFIG_NAME
  +   string
  +   default seaboard
  +
  +config BOARD_MAINTAINER
  +   string
  +   default Tom Warren twar...@nvidia.com
  +
  +config BOARD_STATUS
  +   string
  +   default Active +4
  +
  +endif
 
 Maintainter information seems better in MAINTAINERS.

Personally, I prefer MAINTAINERS file.
But Wolfgang really dislikes it.

I just wanted to show what will happen
if I add CONFIG_BOARD_MAINTAINER and CONFIG_BOARD_STATUS
as hard-coded settings into board-specific Kconfig file.



  diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig
  new file mode 100644
  index 000..88819b9
  --- /dev/null
  +++ b/configs/seaboard_defconfig
  @@ -0,0 +1,3 @@
  +CONFIG_SPL=y
  +CONFIG_ARM=y
  +CONFIG_TARGET_SEABOARD=y
 
  diff --git a/configs/spl/seaboard_defconfig b/configs/spl/seaboard_defconfig
  new file mode 100644
  index 000..bc3eab4
  --- /dev/null
  +++ b/configs/spl/seaboard_defconfig
  @@ -0,0 +1,2 @@
  +CONFIG_ARM=y
  +CONFIG_TARGET_SEABOARD=y
 
 This definitely feels wrong. We shouldn't need to repeat the content of
 these files twice with/without CONFIG_SPL=y.
 
 Should SPL/non-SPL be two build targets that get built when you ask to
 build for Seaboard, not two entirely unrelated defconfig files?

This is another item worth discussion.

The idea in my mind is to not treat SPL and TPL as special cases.
(This is an idea proposed by Simon.)

I was thinking of handling Non-SPL, SPL, TPL as

[U-Boot] Failure on attempt to build env tools

Hi Marek,

I noticed you recently committed support of AES encryption in U-Boot
tools here -
http://git.denx.de/?p=u-boot.git;a=commit;h=a8a752c084031905940129f8a6ba303925e0fac9

And now I cannot build env tools.

Here's how to reproduce my experience:
===
$ make yourboard_config
$ make env
make[1]: *** No rule to make target `tools/env/aes.c', needed by
`tools/env/aes.o'.  Stop.
make: *** [env] Error 2
===

And from tools/env/Makefile I see that target aes.o exists while
aes.c itself is situated in ./lib folder.

Could you please try to build env tools and if you see the same error
could you please fix it?

If it's me who builds env tools improperly could you please teach me how
to build them correctly?

-- 
Best regards,
Alexey Brodkin


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Re: [U-Boot] [PATCH v9 0/2] S5P: Exynos: Add GPIO numbering feature


Hello Akshay,

On 04/25/2014 05:31 PM, Akshay Saraswat wrote:

Hi Przemyslaw Marczak,


Hello,

On 04/21/2014 04:25 PM, Akshay Saraswat wrote:

Used a script to recheck/verify pin mapping and existing mapping
appears to be fine, returning correct bank and pin values.
Did ./MAKEALL -a arm and found all Exynos/S5P related boards
compiled successfully.
Couldn't test booting over all of them.
Tested U-Boot bootup over SMDK5420, SMDK5250, Snow.
Requesting maintaners to please test over affected SoCs/boards.

Changes in V2:
- Enabled CMD_GPIO as suggested by Simon Glass
  and supported same for EXYNOS5.
Changes in V3:
- New patch added to rename S5P GPIO definitions
  to S5P_GPIO.
- GPIO Table added to calculate the base address
  of input gpio bank.
Changes in V4:
- To have consistent 0..n-1 GPIO numbering the banks
  are divided into different parts where ever they
  have holes in them.
- Function and table to support gpio command moved
  to s5p-gpio driver.
- Rebased on latest u-boot-samsung tree.
Changes in V5:
- Rebased on latest u-boot-samsung tree.
- Removed Exynos5 specific code in gpio driver api to
  get bank.
- Added #define HAVE_GENERIC_GPIO in config file
  to remove conditinal CPU check in gpio driver.
Changes in V6:
- Isolated config changes in a new patch.
- Updated patches with corresponding changes for Exynos 5420.
Changes in V7:
- Added changes for other SoCs like Exynos 4412, 4210 etc.
Changes in V8:
- Changed Subject of patch 2/2 to reflect affected SoCs/boards.
- Fixed arndale board compile time errors introduced due to
  patch-set v7.
Changes in V9:
- Fixed checkpatch errors.
- Fixed naming error in exynos_gpio_data arrays which could
  be the possible reason behind data abort witnessed over
  Exynos4 boards.

Akshay Saraswat (2):
EXYNOS: Add GPIO pin numbering and rename definitions
S5P: Exynos: Config: Enable Generic GPIO and CMD configs

   arch/arm/cpu/armv7/exynos/pinmux.c   |  403 +++
   arch/arm/include/asm/arch-exynos/cpu.h   |   17 +-
   arch/arm/include/asm/arch-exynos/gpio.h  | 1786 
+-
   arch/arm/include/asm/arch-s5pc1xx/gpio.h |  941 +---
   board/samsung/arndale/arndale.c  |   11 +-
   board/samsung/goni/goni.c|   26 +-
   board/samsung/smdk5250/exynos5-dt.c  |   20 +-
   board/samsung/smdk5250/smdk5250.c|   19 +-
   board/samsung/smdk5420/smdk5420.c|   15 +-
   board/samsung/smdkc100/smdkc100.c|5 +-
   board/samsung/smdkv310/smdkv310.c|   17 +-
   board/samsung/trats/trats.c  |   39 +-
   board/samsung/trats2/trats2.c|   74 +-
   board/samsung/universal_c210/universal.c |   51 +-
   drivers/gpio/s5p_gpio.c  |  195 +++-
   include/configs/arndale.h|1 +
   include/configs/exynos5-dt.h |3 +
   include/configs/origen.h |1 +
   include/configs/s5p_goni.h   |5 +-
   include/configs/s5pc210_universal.h  |   17 +-
   include/configs/smdkc100.h   |1 +
   include/configs/smdkv310.h   |2 +
   include/configs/trats.h  |9 +-
   include/configs/trats2.h |5 +-
   24 files changed, 2806 insertions(+), 857 deletions(-)



I think that you missed my last few comments.
You are still using exynos_gpio_get() - what for?
It returns some number and next it's interpreted as
gpio continuous number - but it isn't continuous.
It's because each samsung board has now defined HAVE_GENERIC_GPIO,
so gpio numbers are interpreted as linear.
We don't need additional macro since you introduce linear numbering.

Please read my last comments again.


I have read your comments and replied to it. I am sorry may be I was not clear.
Please look at the patch-set 2/2 again, I am not introducing I just replaced
bank and pin number with sequential pin number. exynos_gpio_get() function was
already there. I can't afford to remove it because I2C driver uses it and
also I don't have boards to test outcomes of such changes.
In opinion it would be better if the maintainer of the board could do these
changes.



I tried test this on trats2 device but data abort occurs at PMIC init,
it's probably because exynos_gpio_get(). Please use just gpio numbering
as you defined in this patchset.



As far as I could understand, exynos_gpio_get still returns what it used to 
before
this patch because we still extract bank and pin number from linear number to do
the needfull.
But I will definitely try to look for the bug. Thanks for the suggestion.



If you replace every call like: exynos_gpio_get(AAA, BBB)
with just BBB - then this code will work.

example for trats2.h:
---

Re: [U-Boot] [PATCH v9 1/2] S5P: Exynos: Add GPIO pin numbering and rename definitions


Hi again,

On 04/25/2014 05:32 PM, Akshay Saraswat wrote:

Hi Przemyslaw Marczak,


Hi,

On 04/21/2014 04:25 PM, Akshay Saraswat wrote:

This patch includes following changes :
* Adds gpio pin numbering support for EXYNOS SOCs.
To have consistent 0..n-1 GPIO numbering the banks are divided
into different parts where ever they have holes in them.

* Rename GPIO definitions from GPIO_... to S5P_GPIO_...
These changes were done to enable cmd_gpio for EXYNOS and
cmd_gpio has GPIO_INPUT same as s5p_gpio driver and hence
getting a error during compilation.

* Adds support for name to gpio conversion in s5p_gpio to enable
gpio command EXYNOS SoCs. Function has been added to asm/gpio.h
to decode the input gpio name to gpio number.
Example: SMDK5420 # gpio set gpa00

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Signed-off-by: Akshay Saraswat aksha...@samsung.com
---
   arch/arm/cpu/armv7/exynos/pinmux.c   |  403 +++
   arch/arm/include/asm/arch-exynos/cpu.h   |   17 +-
   arch/arm/include/asm/arch-exynos/gpio.h  | 1786 
+-
   arch/arm/include/asm/arch-s5pc1xx/gpio.h |  941 +---
   board/samsung/arndale/arndale.c  |   11 +-
   board/samsung/goni/goni.c|   26 +-
   board/samsung/smdk5250/exynos5-dt.c  |   20 +-
   board/samsung/smdk5250/smdk5250.c|   19 +-
   board/samsung/smdk5420/smdk5420.c|   15 +-
   board/samsung/smdkc100/smdkc100.c|5 +-
   board/samsung/smdkv310/smdkv310.c|   17 +-
   board/samsung/trats/trats.c  |   39 +-
   board/samsung/trats2/trats2.c|   74 +-
   board/samsung/universal_c210/universal.c |   51 +-
   drivers/gpio/s5p_gpio.c  |  195 +++-
   15 files changed, 2778 insertions(+), 841 deletions(-)

diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
index 11a0472..a93928a 100644
--- a/drivers/gpio/s5p_gpio.c
+++ b/drivers/gpio/s5p_gpio.c
@@ -8,11 +8,12 @@
   #include common.h
   #include asm/io.h
   #include asm/gpio.h
+#include asm/arch-exynos/gpio.h

This is common driver, so it should be:

#include asm/arch/gpio.h



Will fix it in the next patch-set.


   #define S5P_GPIO_GET_BANK(x) ((x  S5P_GPIO_BANK_SHIFT) \
 S5P_GPIO_BANK_MASK)

-#define S5P_GPIO_GET_PIN(x)(x  S5P_GPIO_PIN_MASK)
+#define S5P_GPIO_GET_PIN(x)((x  S5P_GPIO_PIN_MASK) % GPIO_PER_BANK)


And again...we don't need above macros, we can use now linear numbering.



Yes, you are right we don't need S5P_GPIO_GET_BANK but we are still using 
S5P_GPIO_GET_PIN.
Will fix it.




+#ifdef HAVE_GENERIC_GPIO
+struct s5p_gpio_bank *s5p_gpio_get_bank(unsigned int gpio)
+{
+   const struct gpio_info *data;
+   unsigned int upto;
+   int i, count;
+
+   data = get_gpio_data();
+   count = get_bank_num();
+   for (i = upto = 0; i  count;
+   i++, upto = data-max_gpio, data++) {
+   debug(i=%d, upto=%d\n, i, upto);
+   if (gpio  data-max_gpio) {
+   struct s5p_gpio_bank *bank;
+   bank = (struct s5p_gpio_bank *)data-reg_addr;
+   bank += (gpio - upto) / GPIO_PER_BANK;
+   debug(gpio=%d, bank=%p\n, gpio, bank);
+   return bank;
+   }
+   }
+   return NULL;
+}
+#else


You are using exynos_gpio_get() in code but this function is not
compiled. Again please remove it.



Yes, #else part is not being used, I can get rid of this.
But I can't see exynos_gpio_get() call here.



I mean calls in whole code.


   struct s5p_gpio_bank *s5p_gpio_get_bank(unsigned gpio)
   {
unsigned bank = S5P_GPIO_GET_BANK(gpio);
@@ -134,6 +252,7 @@ struct s5p_gpio_bank *s5p_gpio_get_bank(unsigned gpio)

return (struct s5p_gpio_bank *)(base + bank);
   }
+#endif


Thanks

--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com



Regards,
Akshay Saraswat



I hope that everything is clear now.
Thanks
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com

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[U-Boot] [PATCH] tools: env: Add aes.c placeholder

2014-04-28 Thread Marek Vasut

Add missing aes.c placeholder which includes lib/aes.c . Without this
one, tools/env/ will fail to build.

Signed-off-by: Marek Vasut ma...@denx.de
Cc: Alexey Brodkin alexey.brod...@synopsys.com
Cc: Masahiro Yamada yamad...@jp.panasonic.com
---
 tools/env/aes.c | 1 +
 1 file changed, 1 insertion(+)
 create mode 100644 tools/env/aes.c

diff --git a/tools/env/aes.c b/tools/env/aes.c
new file mode 100644
index 000..9e42679
--- /dev/null
+++ b/tools/env/aes.c
@@ -0,0 +1 @@
+#include ../../lib/aes.c
-- 
1.8.5.3

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Re: [U-Boot] Failure on attempt to build env tools

2014-04-28 Thread Marek Vasut

On Monday, April 28, 2014 at 11:40:05 AM, Alexey Brodkin wrote:
 Hi Marek,
 
 I noticed you recently committed support of AES encryption in U-Boot
 tools here -
 http://git.denx.de/?p=u-boot.git;a=commit;h=a8a752c084031905940129f8a6ba303
 925e0fac9
 
 And now I cannot build env tools.
 
 Here's how to reproduce my experience:
 ===
 $ make yourboard_config
 $ make env
 make[1]: *** No rule to make target `tools/env/aes.c', needed by
 `tools/env/aes.o'.  Stop.
 make: *** [env] Error 2
 ===
 
 And from tools/env/Makefile I see that target aes.o exists while
 aes.c itself is situated in ./lib folder.
 
 Could you please try to build env tools and if you see the same error
 could you please fix it?

It's here as well, must be some post-kbuild-migration problem. Patch is out.

+CC Masahiro-san .

btw. did you have time to look at my PCIe email please?

Best regards,
Marek Vasut
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[U-Boot] [RFC] Kconfig: MAINTAINERS file or not?

Hi.

Before I send Kconfig series v2,
please let me cofirm our approach of maintainers info.


When I posted the RFC series in March, I put
maintainers info and board status
into defconfig of each board.
But this idea was rejected.

Instead, MAINTAINERS file as in Linux Kernel was proposed.
(And the patch series by Daniel is already on Patchwork.)
http://patchwork.ozlabs.org/patch/340546/
But Wolfgang (and Albert) disagreed with it.

In Kconfig v1 series, I put maintainers info and board status
in board/*/*/Kconfig as non-user-editable settings:
http://patchwork.ozlabs.org/patch/342089/

But I am not sure if this is a good idea.
(At least, it is dirty.)

In v2, I will drop maintainers info and board status from Kconfig
and leave them to Daniel's patch.

Any furthur comments about this?


Best Regards
Masahiro Yamada

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Re: [U-Boot] [PATCH] tools: env: Add aes.c placeholder

Hi Marek,

On Mon, 2014-04-28 at 11:56 +0200, Marek Vasut wrote:
 Add missing aes.c placeholder which includes lib/aes.c . Without this
 one, tools/env/ will fail to build.

 Signed-off-by: Marek Vasut ma...@denx.de
 Cc: Alexey Brodkin alexey.brod...@synopsys.com
 Cc: Masahiro Yamada yamad...@jp.panasonic.com
 ---
  tools/env/aes.c | 1 +
  1 file changed, 1 insertion(+)
  create mode 100644 tools/env/aes.c

 diff --git a/tools/env/aes.c b/tools/env/aes.c
 new file mode 100644
 index 000..9e42679
 --- /dev/null
 +++ b/tools/env/aes.c
 @@ -0,0 +1 @@
 +#include ../../lib/aes.c

With this patch I may now build env tools.
So...

Tested-by: Alexey Brodkin abrod...@synopsys.com

Would be good to apply this one to master ASAP so others don't suffer
from the missing part.

Regards,
Alexey
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[U-Boot] [PATCH v4 2/5] mtd: nand: force NAND_CMD_READID onto 8-bit bus

From: Brian Norris computersforpe...@gmail.com

As per following Sections in ONFI Spec, NAND_CMD_READID should use only
lower 8-bit for transfering command, address and data even on x16 NAND device.

*Section: Target Initialization
The Read ID and Read Parameter Page commands only use the lower 8-bits of the
 data bus. The host shall not issue commands that use a word data width on x16
 devices until the host determines the device supports a 16-bit data bus width
 in the parameter page.

*Section: Bus Width Requirements*
When the host supports a 16-bit bus width, only data is transferred at the
 16-bit width. All address and command line transfers shall use only the lower
 8-bits of the data bus. During command transfers, the host may place any value
 on the upper 8-bits of the data bus. During address transfers, the host shall
 set the upper 8-bits of the data bus to 00h.

Thus porting  following commit from linux-kernel to ensure that column address
is not altered to align to x16 bus when issuing NAND_CMD_READID command.

commit 3dad2344e92c6e1aeae42df1c4824f307c51bcc7
mtd: nand: force NAND_CMD_READID onto 8-bit bus
Author: Brian Norris computersforpe...@gmail.com (preserving authorship)

The NAND command helpers tend to automatically shift the column address
for x16 bus devices, since most commands expect a word address, not a
byte address. The Read ID command, however, expects an 8-bit address
(i.e., 0x00, 0x20, or 0x40 should not be translated to 0x00, 0x10, or
0x20).

This fixes the column address for a few drivers which imitate the
nand_base defaults.

Signed-off-by: Pekon Gupta pe...@ti.com
---
 drivers/mtd/nand/am335x_spl_bch.c  |  2 +-
 drivers/mtd/nand/atmel_nand.c  |  2 +-
 drivers/mtd/nand/nand_base.c   |  6 --
 drivers/mtd/nand/nand_spl_simple.c |  2 +-
 include/linux/mtd/nand.h   | 10 ++
 5 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/nand/am335x_spl_bch.c 
b/drivers/mtd/nand/am335x_spl_bch.c
index c84851b..86572a2 100644
--- a/drivers/mtd/nand/am335x_spl_bch.c
+++ b/drivers/mtd/nand/am335x_spl_bch.c
@@ -55,7 +55,7 @@ static int nand_command(int block, int page, uint32_t offs,
}
 
/* Shift the offset from byte addressing to word addressing. */
-   if (this-options  NAND_BUSWIDTH_16)
+   if ((this-options  NAND_BUSWIDTH_16)  !nand_opcode_8bits(cmd))
offs = 1;
 
/* Set ALE and clear CLE to start address cycle */
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index e1fc48f..e73834d 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -1195,7 +1195,7 @@ static int nand_command(int block, int page, uint32_t 
offs, u8 cmd)
 
hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
 
-   if (this-options  NAND_BUSWIDTH_16)
+   if ((this-options  NAND_BUSWIDTH_16)  !nand_opcode_8bits(cmd))
offs = 1;
 
hwctrl(mtd, offs  0xff, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 5d3232c..376976d 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -575,7 +575,8 @@ static void nand_command(struct mtd_info *mtd, unsigned int 
command,
/* Serially input address */
if (column != -1) {
/* Adjust columns for 16 bit buswidth */
-   if (chip-options  NAND_BUSWIDTH_16)
+   if ((chip-options  NAND_BUSWIDTH_16) 
+   !nand_opcode_8bits(command))
column = 1;
chip-cmd_ctrl(mtd, column, ctrl);
ctrl = ~NAND_CTRL_CHANGE;
@@ -668,7 +669,8 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned 
int command,
/* Serially input address */
if (column != -1) {
/* Adjust columns for 16 bit buswidth */
-   if (chip-options  NAND_BUSWIDTH_16)
+   if ((chip-options  NAND_BUSWIDTH_16) 
+   !nand_opcode_8bits(command))
column = 1;
chip-cmd_ctrl(mtd, column, ctrl);
ctrl = ~NAND_CTRL_CHANGE;
diff --git a/drivers/mtd/nand/nand_spl_simple.c 
b/drivers/mtd/nand/nand_spl_simple.c
index cead4b5..e1ddead 100644
--- a/drivers/mtd/nand/nand_spl_simple.c
+++ b/drivers/mtd/nand/nand_spl_simple.c
@@ -78,7 +78,7 @@ static int nand_command(int block, int page, uint32_t offs,
}
 
/* Shift the offset from byte addressing to word addressing. */
-   if (this-options  NAND_BUSWIDTH_16)
+   if ((this-options  NAND_BUSWIDTH_16)  !nand_opcode_8bits(command))
offs = 1;
 
/* Begin command latch cycle */
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 0546565..4be8858 100644
--- a/include/linux/mtd/nand.h
+++

[U-Boot] [PATCH v4 0/5] enable support for x16 NAND devices

*changes v3 - v4*
[PATCH 1/5] no update
[PATCH 2/5] new mtd: nand: force NAND_CMD_READID onto 8-bit bus
[PATCH 3/5] new mtd: nand: fix GET/SET_FEATURES address on 16-bit devices
[PATCH 4/5]  same as [PATCH v2 2/3] rebased over 
http://lists.denx.de/pipermail/u-boot/2014-April/177323.html
[PATCH 5/5] no update


*changes v2 - v3*
[PATCH v3 1/3] (new) porting Brian Norri's patch from linux tree
   This patch allows reading of ONFI params independent of controller 
configuration
   and NAND device width.
[PATCH v3 2/2] rebase [PATCH v2 2/4] on latest release
[PATCH v3 3/3] (new) cleaned remaining GPMC_NAND_ECC_LP_xx macros from OMAP3 
platform
Compile Tested# ./MAKEALL -s omap3 -s omap4 -s omap5 -s dra7xx -s am33xx


*changes v1 - v2*
[PATCH v2 1/4]: 
  - dropped NAND_BUSWIDTH_AUTO, instead using CONFIG_SYS_NAND_ONFI_DETECTION
  - added check in nand_flash_detect_onfi() for x8 mode
[PATCH v2 2/4]: (new) Adds CONFIG_SYS_NAND_DEVICE_WIDTH
  - updated for auto-detection of bus-width in non-SPL and ONFI_DETECTION mode
  Refer: http://lists.denx.de/pipermail/u-boot/2013-September/163748.html
[PATCH v2 3/4] no update
[PATCH v2 4/4] disabled Pulls on output only I/O pads.
  - updated commit description to add details about NAND cape


*original v1*
This series includes independent patch-sets aiming to enable x16 NAND
support on AM33xx boards (like beaglebone-LT).
[PATCH 1/4]: This patch is ported from linux driver/mtd/nand to allow detection
device-width of NAND by reading ONFI parameter page.
[PATCH 2/4]: enable NAND_BUSWIDTH_AUTO feature in omap_nand.c
[PATCH 3/4]: cleaning of GPMC configs for NAND and NOR

Brian Norris (2):
  mtd: nand: don't use read_buf for 8-bit ONFI transfers
  mtd: nand: force NAND_CMD_READID onto 8-bit bus

David Mosberger (1):
  mtd: nand: fix GET/SET_FEATURES address on 16-bit devices

Pekon Gupta (2):
  mtd: nand: omap: add CONFIG_SYS_NAND_DEVICE_WIDTH to determine NAND
device bus-width
  omap3: remove remnant macros GPMC_NAND_ECC_LP_x8_LAYOUT and
GPMC_NAND_ECC_LP_x16_LAYOUT

 arch/arm/cpu/armv7/omap3/mem.c | 12 
 arch/arm/include/asm/arch-omap3/mem.h  |  8 
 board/compulab/cm_t35/cm_t35.c | 12 ++--
 doc/README.nand|  9 +
 drivers/mtd/nand/am335x_spl_bch.c  |  2 +-
 drivers/mtd/nand/atmel_nand.c  |  2 +-
 drivers/mtd/nand/nand_base.c   | 11 +++
 drivers/mtd/nand/nand_spl_simple.c |  2 +-
 drivers/mtd/nand/omap_gpmc.c   | 13 +
 include/configs/am335x_evm.h   |  1 +
 include/configs/am335x_igep0033.h  |  1 +
 include/configs/am3517_crane.h |  1 +
 include/configs/am3517_evm.h   |  1 +
 include/configs/cm_t335.h  |  2 +-
 include/configs/cm_t35.h   |  1 +
 include/configs/devkit8000.h   |  1 +
 include/configs/dig297.h   |  1 +
 include/configs/mcx.h  |  1 +
 include/configs/omap3_beagle.h |  1 +
 include/configs/omap3_evm_common.h |  2 +-
 include/configs/omap3_igep00x0.h   |  1 +
 include/configs/omap3_logic.h  |  1 +
 include/configs/omap3_overo.h  |  1 +
 include/configs/omap3_pandora.h|  2 +-
 include/configs/omap3_zoom1.h  |  1 +
 include/configs/pengwyn.h  |  2 +-
 include/configs/siemens-am33x-common.h |  1 +
 include/configs/tam3517-common.h   |  1 +
 include/configs/tao3530.h  |  2 +-
 include/configs/tricorder.h|  1 +
 include/configs/tseries.h  |  2 +-
 include/linux/mtd/nand.h   | 19 +++
 32 files changed, 75 insertions(+), 43 deletions(-)

-- 
1.8.5.1.163.gd7aced9

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[U-Boot] [PATCH v4 3/5] mtd: nand: fix GET/SET_FEATURES address on 16-bit devices

From: David Mosberger dav...@egauge.net

As per following Sections in ONFI Spec, GET_FEATURES and SET_FEATURES also need
byte-addressing on 16-bit devices.

*Section: Target Initialization
The Read ID and Read Parameter Page commands only use the lower 8-bits of the
 data bus. The host shall not issue commands that use a word data width on x16
 devices until the host determines the device supports a 16-bit data bus width
 in the parameter page.

*Section: Bus Width Requirements*
When the host supports a 16-bit bus width, only data is transferred at the
 16-bit width. All address and command line transfers shall use only the lower
 8-bits of the data bus. During command transfers, the host may place any value
 on the upper 8-bits of the data bus. During address transfers, the host shall
 set the upper 8-bits of the data bus to 00h.

So porting following commit from linux kernel
commit e34fcb07a6d57411de6e15a47724fbe92c5caa42
Author: David Mosberger dav...@egauge.net  (preserving authorship)
mtd: nand: fix GET/SET_FEATURES address on 16-bit devices

Signed-off-by: Pekon Gupta pe...@ti.com
---
 include/linux/mtd/nand.h | 11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 4be8858..991bd8e 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -725,7 +725,16 @@ static inline int onfi_get_sync_timing_mode(struct 
nand_chip *chip)
  */
 static inline int nand_opcode_8bits(unsigned int command)
 {
-   return command == NAND_CMD_READID;
+   switch (command) {
+   case NAND_CMD_READID:
+   case NAND_CMD_PARAM:
+   case NAND_CMD_GET_FEATURES:
+   case NAND_CMD_SET_FEATURES:
+   return 1;
+   default:
+   break;
+   }
+   return 0;
 }
 
 
-- 
1.8.5.1.163.gd7aced9

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[U-Boot] [PATCH v4 4/5] mtd: nand: omap: add CONFIG_SYS_NAND_DEVICE_WIDTH to determine NAND device bus-width

This patch introduces CONFIG_SYS_NAND_DEVICE_WIDTH to specify bus-width of NAND 
device
  CONFIG_SYS_NAND_DEVICE_WIDTH == 16: NAND device with x16 bus-width
  CONFIG_SYS_NAND_DEVICE_WIDTH == 8:  NAND device with x8 bus-width

Need for a separate CONFIG_SYS_NAND_xx arise from following requirements:
(1) SPL NAND drivers does not have framework to parse ONFI parameter page.

(2) GPMC controller needs to know about the bus-width of device connected to it 
on board.
But as GPMC controller is initialized before the NAND device is probed, and
there is no way of re-configuring the GPMC controller based on-chip ONFI 
parameters.
if !defined (CONFIG_SYS_NAND_SELF_INIT)
 |- board_nand_init()
 |- nand_scan()
   |- nand_scan_ident()
   |- nand_scan_tail()

(3) Non-ONFI compliant devices need some mechanism to specify device bus-width
   to driver.

Signed-off-by: Pekon Gupta pe...@ti.com
---
 doc/README.nand|  9 +
 drivers/mtd/nand/omap_gpmc.c   | 13 +
 include/configs/am335x_evm.h   |  1 +
 include/configs/am335x_igep0033.h  |  1 +
 include/configs/am3517_crane.h |  1 +
 include/configs/am3517_evm.h   |  1 +
 include/configs/cm_t335.h  |  1 +
 include/configs/cm_t35.h   |  1 +
 include/configs/devkit8000.h   |  1 +
 include/configs/dig297.h   |  1 +
 include/configs/mcx.h  |  1 +
 include/configs/omap3_beagle.h |  1 +
 include/configs/omap3_evm_common.h |  2 +-
 include/configs/omap3_igep00x0.h   |  1 +
 include/configs/omap3_logic.h  |  1 +
 include/configs/omap3_overo.h  |  1 +
 include/configs/omap3_pandora.h|  2 +-
 include/configs/omap3_zoom1.h  |  1 +
 include/configs/pengwyn.h  |  1 +
 include/configs/siemens-am33x-common.h |  1 +
 include/configs/tam3517-common.h   |  1 +
 include/configs/tao3530.h  |  1 +
 include/configs/tricorder.h|  1 +
 include/configs/tseries.h  |  1 +
 24 files changed, 40 insertions(+), 6 deletions(-)

diff --git a/doc/README.nand b/doc/README.nand
index b91f198..90d857e 100644
--- a/doc/README.nand
+++ b/doc/README.nand
@@ -190,6 +190,15 @@ Configuration Options:
This is used by SoC platforms which do not have built-in ELM
hardware engine required for BCH ECC correction.
 
+   CONFIG_SYS_NAND_DEVICE_WIDTH
+   Specifies bus-width of the default NAND device connected to SoC.
+   This config is useful for driver which cannot self initialize or
+   parse ONFI parameter (like SPL drivers), or for supporting non-ONFI
+   compliant devices.
+   This config can take following values:
+   - 8: x8 NAND devices is connected
+   - 16: x16 NAND device is connected
+
 
 Platform specific options
 =
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 325ebfd..ba7ac2b 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -782,13 +782,18 @@ int board_nand_init(struct nand_chip *nand)
nand-priv  = omap_nand_info;
nand-cmd_ctrl  = omap_nand_hwcontrol;
nand-options   |= NAND_NO_PADDING | NAND_CACHEPRG;
-   /* If we are 16 bit dev, our gpmc config tells us that */
-   if ((readl(gpmc_cfg-cs[cs].config1)  0x3000) == 0x1000)
-   nand-options |= NAND_BUSWIDTH_16;
-
nand-chip_delay = 100;
nand-ecc.layout = omap_ecclayout;
 
+   /* configure driver and controller based on NAND device bus-width */
+   gpmc_config = readl(gpmc_cfg-cs[cs].config1);
+   if (CONFIG_SYS_NAND_DEVICE_WIDTH == 16) {
+   nand-options |= NAND_BUSWIDTH_16;
+   writel(gpmc_config | (0x1  12), gpmc_cfg-cs[cs].config1);
+   } else {
+   nand-options = ~NAND_BUSWIDTH_16;
+   writel(gpmc_config  ~(0x1  12), gpmc_cfg-cs[cs].config1);
+   }
/* select ECC scheme */
 #if defined(CONFIG_NAND_OMAP_ECCSCHEME)
err = omap_select_ecc_scheme(nand, CONFIG_NAND_OMAP_ECCSCHEME,
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index ea9e758..8a38cb2 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -229,6 +229,7 @@
 #ifdef CONFIG_NAND
 #define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_NAND_OMAP_ELM
+#define CONFIG_SYS_NAND_DEVICE_WIDTH   8
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
 CONFIG_SYS_NAND_PAGE_SIZE)
diff --git a/include/configs/am335x_igep0033.h 
b/include/configs/am335x_igep0033.h
index c17327f..0563935 100644
--- a/include/configs/am335x_igep0033.h
+++ b/include/configs/am335x_igep0033.h
@@ -245,6 +245,7 @@
 #define CONFIG_SPL_NAND_BASE
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_ECC
+#define CONFIG_SYS_NAND_DEVICE_WIDTH   8

[U-Boot] [PATCH v4 1/5] mtd: nand: don't use read_buf for 8-bit ONFI transfers

From: Brian Norris computersforpe...@gmail.com

Porting below commit from linux-tree, preserving original authorship  commit 
log
commit bd9c6e99b58255b9de1982711ac9487c9a2f18be
Author: Brian Norris computersforpe...@gmail.com
mtd: nand: don't use read_buf for 8-bit ONFI transfers

  Use a repeated read_byte() instead of read_buf(), since for x16 buswidth
  devices, we need to avoid the upper I/O[16:9] bits. See the following
  commit for reference:

  commit 05f7835975dad6b3b517f9e23415985e648fb875 (from linux-tree)
  Author: Uwe Kleine-König u.kleine-koe...@pengutronix.de
  Date:   Thu Dec 5 22:22:04 2013 +0100

  mtd: nand: don't use {read,write}_buf for 8-bit transfers

  Now, I think that all barriers to probing ONFI on x16 devices are
  removed, so remove the check from nand_flash_detect_onfi().

Signed-off-by: Pekon Gupta pe...@ti.com
---
 drivers/mtd/nand/nand_base.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 1ce55fd..5d3232c 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2582,7 +2582,7 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, 
struct nand_chip *chip,
int *busw)
 {
struct nand_onfi_params *p = chip-onfi_params;
-   int i;
+   int i, j;
int val;
 
/* Try ONFI for unknown chip or LP */
@@ -2593,7 +2593,8 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, 
struct nand_chip *chip,
 
chip-cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
for (i = 0; i  3; i++) {
-   chip-read_buf(mtd, (uint8_t *)p, sizeof(*p));
+   for (j = 0; j  sizeof(*p); j++)
+   ((uint8_t *)p)[j] = chip-read_byte(mtd);
if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==
le16_to_cpu(p-crc)) {
pr_info(ONFI param page %d valid\n, i);
-- 
1.8.5.1.163.gd7aced9

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[U-Boot] [PATCH v4 5/5] omap3: remove remnant macros GPMC_NAND_ECC_LP_x8_LAYOUT and GPMC_NAND_ECC_LP_x16_LAYOUT

OMAP3 used GPMC_NAND_ECC_LP_x8_LAYOUT and GPMC_NAND_ECC_LP_x16_LAYOUT macros
to configure GPMC controller for x7 or x8 bit device connected to its interface.
Now this information is encoded in CONFIG_SYS_NAND_DEVICE_WIDTH macro, so above
macros can be completely removed.

Signed-off-by: Pekon Gupta pe...@ti.com
---
 arch/arm/cpu/armv7/omap3/mem.c| 12 
 arch/arm/include/asm/arch-omap3/mem.h |  8 
 board/compulab/cm_t35/cm_t35.c| 12 ++--
 include/configs/cm_t335.h |  1 -
 include/configs/pengwyn.h |  1 -
 include/configs/tao3530.h |  1 -
 include/configs/tseries.h |  1 -
 7 files changed, 6 insertions(+), 30 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap3/mem.c b/arch/arm/cpu/armv7/omap3/mem.c
index e649409..1832aff 100644
--- a/arch/arm/cpu/armv7/omap3/mem.c
+++ b/arch/arm/cpu/armv7/omap3/mem.c
@@ -21,17 +21,6 @@
 struct gpmc *gpmc_cfg;
 
 #if defined(CONFIG_CMD_NAND)
-#if defined(GPMC_NAND_ECC_SP_x8_LAYOUT) || defined(GPMC_NAND_ECC_LP_x8_LAYOUT)
-static const u32 gpmc_m_nand[GPMC_MAX_REG] = {
-   SMNAND_GPMC_CONFIG1,
-   SMNAND_GPMC_CONFIG2,
-   SMNAND_GPMC_CONFIG3,
-   SMNAND_GPMC_CONFIG4,
-   SMNAND_GPMC_CONFIG5,
-   SMNAND_GPMC_CONFIG6,
-   0,
-};
-#else
 static const u32 gpmc_m_nand[GPMC_MAX_REG] = {
M_NAND_GPMC_CONFIG1,
M_NAND_GPMC_CONFIG2,
@@ -40,7 +29,6 @@ static const u32 gpmc_m_nand[GPMC_MAX_REG] = {
M_NAND_GPMC_CONFIG5,
M_NAND_GPMC_CONFIG6, 0
 };
-#endif
 #endif /* CONFIG_CMD_NAND */
 
 #if defined(CONFIG_CMD_ONENAND)
diff --git a/arch/arm/include/asm/arch-omap3/mem.h 
b/arch/arm/include/asm/arch-omap3/mem.h
index 1804191..d90fe16 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -353,14 +353,6 @@ enum {
 
 #define GPMC_CS_ENABLE 0x1
 
-#define SMNAND_GPMC_CONFIG10x0800
-#define SMNAND_GPMC_CONFIG20x00141400
-#define SMNAND_GPMC_CONFIG30x00141400
-#define SMNAND_GPMC_CONFIG40x0F010F01
-#define SMNAND_GPMC_CONFIG50x010C1414
-#define SMNAND_GPMC_CONFIG60x1F0F0A80
-#define SMNAND_GPMC_CONFIG70x0C44
-
 #define M_NAND_GPMC_CONFIG10x1800
 #define M_NAND_GPMC_CONFIG20x00141400
 #define M_NAND_GPMC_CONFIG30x00141400
diff --git a/board/compulab/cm_t35/cm_t35.c b/board/compulab/cm_t35/cm_t35.c
index 00bcf41..0944903 100644
--- a/board/compulab/cm_t35/cm_t35.c
+++ b/board/compulab/cm_t35/cm_t35.c
@@ -54,12 +54,12 @@ static u32 gpmc_net_config[GPMC_MAX_REG] = {
 };
 
 static u32 gpmc_nand_config[GPMC_MAX_REG] = {
-   SMNAND_GPMC_CONFIG1,
-   SMNAND_GPMC_CONFIG2,
-   SMNAND_GPMC_CONFIG3,
-   SMNAND_GPMC_CONFIG4,
-   SMNAND_GPMC_CONFIG5,
-   SMNAND_GPMC_CONFIG6,
+   M_NAND_GPMC_CONFIG1,
+   M_NAND_GPMC_CONFIG2,
+   M_NAND_GPMC_CONFIG3,
+   M_NAND_GPMC_CONFIG4,
+   M_NAND_GPMC_CONFIG5,
+   M_NAND_GPMC_CONFIG6,
0,
 };
 
diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h
index 158cf8f..850f3b0 100644
--- a/include/configs/cm_t335.h
+++ b/include/configs/cm_t335.h
@@ -141,7 +141,6 @@
 #define CONFIG_SYS_NAND_U_BOOT_OFFS0x20
 
 #define CONFIG_CMD_NAND
-#define GPMC_NAND_ECC_LP_x8_LAYOUT
 #defineCONFIG_SYS_NAND_DEVICE_WIDTH8
 #define MTDIDS_DEFAULT nand0=nand
 #define MTDPARTS_DEFAULT   mtdparts=nand:2m(spl), \
diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h
index 0a0c77f..289628a 100644
--- a/include/configs/pengwyn.h
+++ b/include/configs/pengwyn.h
@@ -150,7 +150,6 @@
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_OFFS0x8
 
-#define GPMC_NAND_ECC_LP_x8_LAYOUT 1
 #define MTDIDS_DEFAULT nand0=omap2-nand.0
 #define MTDPARTS_DEFAULT   mtdparts=omap2-nand.0:128k(SPL), \
128k(SPL.backup1), \
diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index 7dee34e..689a8a3 100644
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -137,7 +137,6 @@
 #define CONFIG_SYS_NAND_BASE   NAND_BASE   /* physical address */
/* to access nand at */
/* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
 
 #define CONFIG_SYS_MAX_NAND_DEVICE 1   /* Max number of NAND */
/* devices */
diff --git a/include/configs/tseries.h b/include/configs/tseries.h
index 4c5f11a..764e3b4 100644
--- a/include/configs/tseries.h
+++ b/include/configs/tseries.h
@@ -157,7 +157,6 @@
 /* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */
 #define CONFIG_NAND_OMAP_ELM
 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
-#define GPMC_NAND_ECC_LP_x16_LAYOUT1
 #define CONFIG_SYS_NAND_DEVICE_WIDTH   8

Re: [U-Boot] [PATCH 1/2] arm: mxs: Enable CONFIG_SYS_GENERIC_BOARD

On 04/04/2014 00:41, Marek Vasut wrote:
 Signed-off-by: Marek Vasut ma...@denx.de
 ---
  include/configs/m28evk.h | 1 -
  include/configs/mxs.h| 1 +
  2 files changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
 index bb1fa44..3e387c4 100644
 --- a/include/configs/m28evk.h
 +++ b/include/configs/m28evk.h
 @@ -7,7 +7,6 @@
  #ifndef __CONFIGS_M28EVK_H__
  #define __CONFIGS_M28EVK_H__
  
 -
  /* System configurations */
  #define CONFIG_MX28  /* i.MX28 SoC */
  #define MACH_TYPE_M28EVK 3613
 diff --git a/include/configs/mxs.h b/include/configs/mxs.h
 index a9f4d89..7339eb0 100644
 --- a/include/configs/mxs.h
 +++ b/include/configs/mxs.h
 @@ -40,6 +40,7 @@
  /*
   * CPU specifics
   */
 +#define CONFIG_SYS_GENERIC_BOARD
  
  /* MXS uses FDT */
  #define CONFIG_OF_LIBFDT
 

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH] mx6slevk: Add SPI NOR flash support

On 11/04/2014 13:39, Fabio Estevam wrote:
 From: Fabio Estevam fabio.este...@freescale.com
 
 mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port.
 
 Add support for it.
 
 Signed-off-by: Fabio Estevam fabio.este...@freescale.com
 ---


Applied to u-boot-imx, thaanks !

Best regards,
Stefano Babic


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Re: [U-Boot] [PATCH] nitrogen6x: Fix the PAD settings for the ECSPI chipselect

On 11/04/2014 22:43, Fabio Estevam wrote:
 From: Fabio Estevam fabio.este...@freescale.com
 
 ECSPI chipselect (MX6_PAD_EIM_D19__GPIO3_IO19) is used with GPIO 
 functionality,
 so it does not make sense to set its pad as SPI pin.
 
 Signed-off-by: Fabio Estevam fabio.este...@freescale.com
 ---

Near Eric's Acked and Tested-by, I see Troy agree on this patch, too.

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH 2/3] net/designware: invalidate entire descriptor in dw_eth_send

Dear Ian,

On Sun, 2014-04-27 at 19:47 +0100, Ian Campbell wrote:

 This is the driver for one particular ARM cache controller and not the
 one used for the SoC. In any case it does proper start/end handling
 only for cache flush operations, not cache invalidate.
 
 Cache invalidate is a potentially destructive operation (throwing away
 data in the caches), having it operate on anything more than the precise
 region requested would be very surprising to almost anyone I think.
...
 I think you are missing the important differences between a cache 
 flush and a cache invalidate.

IMHO cache invalidation and flush operations are sort of antipodes.

With invalidation you discard all data in corresponding line in cache
and replace it with freshly read data from memory.

With flush you move cache line to corresponding memory location
overriding previously existing values in memory.

So if you deal with 2 independent data fields which both share the same
one cache line it's potentially dangerous to do both flush and
invalidate of this cache line.

In case of MMU utilization we have a luxury of uncached access, so we
may safely access control structures in memory with granularity which is
available for this particular CPU. This is AFAIK drivers deal with
buffer descriptors in Linux kernel.

In case of U-Boot where we prefer to keep things simple we don't use
MMU. So no generic way for cache bypassing. Still some architectures
like ARC700 have special instructions for accessing memory bypassing
cache but I prever to not use them and keep sources
platform-independent.

And in this situation IMHO the only safe solution could be in proper
design of data layout. In other words we need to keep independent data
blocks aligned to cache line.

And as you may see from designware.h buffer descriptor structure is
aligned:
==
struct dmamacdescr {
u32 txrx_status;
u32 dmamac_cntl;
void *dmamac_addr;
struct dmamacdescr *dmamac_next;
} __aligned(ARCH_DMA_MINALIGN);
==

Regards,
Alexey


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Re: [U-Boot] [PATCH v4 4/5] samsung: misc: keys: fix gpio key bouncing by adding 50 ms delay

2014-04-28 Thread Gerhard Sittig

On Fri, 2014-04-25 at 12:20 +0200, Przemyslaw Marczak wrote:
 
 This change prevents gpio keys bouncing by adding 50 ms delay
 when key pressed condition met.
 
 [ ... ]
 @@ -105,6 +105,10 @@ static int check_keys(void)
   if (key_pressed(KEY_VOLUMEDOWN))
   keys += KEY_VOLUMEDOWN;
  
 + /* Avoids gpio keys debouncing */
 + if (keys)
 + mdelay(50);
 +
   return keys;
  }

The approach might have helped in your case, since you tested it
and found it's good.  I'm just wondering whether the code really
does correct de-bouncing.

The delay does decrease the polling frequency (assuming that the
routine is called in a loop).  But you return data that was
sampled before the delay.  You don't re-fetch samples after the
delay.  And this would not necessarily help either, I'm afraid.

In case the GPIO (or the key_pressed() call) does debouncing, you
wouldn't need it here.  If the key_pressed() result still is
bouncy, then the above logic would not debounce it.  What you
need is some kind of trigger where you notice that the line
levels are changing, and a delayed fetch of the lines' values
after they have settled.  Without the first condition, you always
have the risk of sampling arbitrary data that does not reflect
the keys' status.

nit: The comment still appears to be misleading, you don't want
to avoid debouncing. :)


virtually yours
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[U-Boot] [PATCH v2] Exynos5: config: Enable FIT

2014-04-28 Thread Akshay Saraswat

Adding two configs:
* CONFIG_FIT - Enable FIT image support.
* CONFIG_FIT_BEST_MATCH - Enable fetching correct DTB from
  FIT image by comparing compatibles.

Change in V2:
- Added Acked-by.

Signed-off-by: Akshay Saraswat aksha...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
 include/configs/exynos5-dt.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h
index 414db42..dee53e9 100644
--- a/include/configs/exynos5-dt.h
+++ b/include/configs/exynos5-dt.h
@@ -288,4 +288,8 @@
 
 #define CONFIG_CMD_BOOTZ
 
+/* Enable FIT support and comparison */
+#define CONFIG_FIT
+#define CONFIG_FIT_BEST_MATCH
+
 #endif /* __CONFIG_H */
-- 
1.8.3.2

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[U-Boot] [PATCH v10 0/2] S5P: Exynos: Add GPIO numbering feature

2014-04-28 Thread Akshay Saraswat

Used a script to recheck/verify pin mapping and existing mapping
appears to be fine, returning correct bank and pin values.
Did ./MAKEALL -a arm and found all Exynos/S5P related boards
compiled successfully.
Couldn't test booting over all of them.
Tested U-Boot bootup over SMDK5420, SMDK5250, Snow.
Requesting maintaners to please test over affected SoCs/boards.

Changes in V2:
- Enabled CMD_GPIO as suggested by Simon Glass
  and supported same for EXYNOS5.
Changes in V3:
- New patch added to rename S5P GPIO definitions
  to S5P_GPIO.
- GPIO Table added to calculate the base address
  of input gpio bank.
Changes in V4:
- To have consistent 0..n-1 GPIO numbering the banks
  are divided into different parts where ever they
  have holes in them.
- Function and table to support gpio command moved
  to s5p-gpio driver.
- Rebased on latest u-boot-samsung tree.
Changes in V5:
- Rebased on latest u-boot-samsung tree.
- Removed Exynos5 specific code in gpio driver api to
  get bank.
- Added #define HAVE_GENERIC_GPIO in config file
  to remove conditinal CPU check in gpio driver.
Changes in V6:
- Isolated config changes in a new patch.
- Updated patches with corresponding changes for Exynos 5420.
Changes in V7:
- Added changes for other SoCs like Exynos 4412, 4210 etc.
Changes in V8:
- Changed Subject of patch 2/2 to reflect affected SoCs/boards.
- Fixed arndale board compile time errors introduced due to
  patch-set v7.
Changes in V9:
- Fixed checkpatch errors.
- Fixed naming error in exynos_gpio_data arrays which could
  be the possible reason behind data abort witnessed over
  Exynos4 boards.
Changes in v10:
- Made arch-exynos/gpio.h - arch/gpio.h.
- Removed dead code.
- Replaced exynos_gpio_get calls with corresponding pin number.
- Edited pin numbmers in dts files.

Akshay Saraswat (2):
  EXYNOS: Add GPIO pin numbering and rename definitions
  S5P: Exynos: Config: Enable GPIO CMD config

 arch/arm/cpu/armv7/exynos/pinmux.c |  403 +++
 arch/arm/dts/exynos4210-origen.dts |4 +-
 arch/arm/dts/exynos4210-trats.dts  |6 +-
 arch/arm/dts/exynos4210-universal_c210.dts |4 +-
 arch/arm/dts/exynos4412-trats2.dts |4 +-
 arch/arm/include/asm/arch-exynos/cpu.h |   17 +-
 arch/arm/include/asm/arch-exynos/gpio.h| 1788 +++-
 arch/arm/include/asm/arch-s5pc1xx/gpio.h   |  940 +--
 board/samsung/arndale/arndale.c|   11 +-
 board/samsung/goni/goni.c  |   26 +-
 board/samsung/smdk5250/exynos5-dt.c|   20 +-
 board/samsung/smdk5250/smdk5250.c  |   19 +-
 board/samsung/smdk5420/smdk5420.c  |   15 +-
 board/samsung/smdkc100/smdkc100.c  |5 +-
 board/samsung/smdkv310/smdkv310.c  |   17 +-
 board/samsung/trats/trats.c|   39 +-
 board/samsung/trats2/trats2.c  |   74 +-
 board/samsung/universal_c210/universal.c   |   51 +-
 drivers/gpio/s5p_gpio.c|  198 ++-
 include/configs/exynos5-dt.h   |2 +
 include/configs/s5p_goni.h |4 +-
 include/configs/s5pc210_universal.h|   16 +-
 include/configs/smdkv310.h |1 +
 include/configs/trats.h|8 +-
 include/configs/trats2.h   |4 +-
 25 files changed, 2793 insertions(+), 883 deletions(-)

-- 
1.8.3.2

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[U-Boot] [PATCH v10 2/2] S5P: Exynos: Config: Enable GPIO CMD config

2014-04-28 Thread Akshay Saraswat

Enabling configs for GPIO CMD, EXYNOS4 family and replacing
exynos_gpio_get with new linear GPIO pin number required
because of the new function asking only 2 arguments (pin
and value) instead of 3 (bank, pin and value).

Signed-off-by: Akshay Saraswat aksha...@samsung.com
---
 include/configs/exynos5-dt.h|  2 ++
 include/configs/s5p_goni.h  |  4 ++--
 include/configs/s5pc210_universal.h | 16 
 include/configs/smdkv310.h  |  1 +
 include/configs/trats.h |  8 
 include/configs/trats2.h|  4 ++--
 6 files changed, 19 insertions(+), 16 deletions(-)

diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h
index 414db42..5a9b1b4 100644
--- a/include/configs/exynos5-dt.h
+++ b/include/configs/exynos5-dt.h
@@ -288,4 +288,6 @@
 
 #define CONFIG_CMD_BOOTZ
 
+#define CONFIG_CMD_GPIO
+
 #endif /* __CONFIG_H */
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 991c43e..799d4fe 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -214,8 +214,8 @@
 /*
  * I2C Settings
  */
-#define CONFIG_SOFT_I2C_GPIO_SCL s5pc110_gpio_get(j4, 3)
-#define CONFIG_SOFT_I2C_GPIO_SDA s5pc110_gpio_get(j4, 0)
+#define CONFIG_SOFT_I2C_GPIO_SCL S5PC110_GPIO_J43
+#define CONFIG_SOFT_I2C_GPIO_SDA S5PC110_GPIO_J40
 
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_SOFT/* I2C bit-banged */
diff --git a/include/configs/s5pc210_universal.h 
b/include/configs/s5pc210_universal.h
index 2da8871..b368266 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -170,8 +170,8 @@
 /*
  * I2C Settings
  */
-#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(1, b, 7)
-#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(1, b, 6)
+#define CONFIG_SOFT_I2C_GPIO_SCL EXYNOS4_GPIO_B7
+#define CONFIG_SOFT_I2C_GPIO_SDA EXYNOS4_GPIO_B6
 
 #define CONFIG_CMD_I2C
 
@@ -196,10 +196,10 @@
  */
 #define CONFIG_SOFT_SPI
 #define CONFIG_SOFT_SPI_MODE SPI_MODE_3
-#define CONFIG_SOFT_SPI_GPIO_SCLK exynos4_gpio_get(2, y3, 1)
-#define CONFIG_SOFT_SPI_GPIO_MOSI exynos4_gpio_get(2, y3, 3)
-#define CONFIG_SOFT_SPI_GPIO_MISO exynos4_gpio_get(2, y3, 0)
-#define CONFIG_SOFT_SPI_GPIO_CS exynos4_gpio_get(2, y4, 3)
+#define CONFIG_SOFT_SPI_GPIO_SCLK EXYNOS4_GPIO_Y31
+#define CONFIG_SOFT_SPI_GPIO_MOSI EXYNOS4_GPIO_Y33
+#define CONFIG_SOFT_SPI_GPIO_MISO EXYNOS4_GPIO_Y30
+#define CONFIG_SOFT_SPI_GPIO_CS EXYNOS4_GPIO_Y43
 
 #define SPI_DELAY udelay(1)
 #undef SPI_INIT
@@ -231,8 +231,8 @@ int universal_spi_read(void);
 #define KEY_PWR_INTERRUPT_REG  MAX8998_REG_IRQ1
 #define KEY_PWR_INTERRUPT_MASK (1  7)
 
-#define KEY_VOL_UP_GPIOexynos4_gpio_get(2, x2, 0)
-#define KEY_VOL_DOWN_GPIO  exynos4_gpio_get(2, x2, 1)
+#define KEY_VOL_UP_GPIOEXYNOS4_GPIO_X20
+#define KEY_VOL_DOWN_GPIO  EXYNOS4_GPIO_X21
 #endif /* __ASSEMBLY__ */
 
 /* LCD console */
diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h
index 1388f49..34adfaf 100644
--- a/include/configs/smdkv310.h
+++ b/include/configs/smdkv310.h
@@ -12,6 +12,7 @@
 /* High Level Configuration Options */
 #define CONFIG_SAMSUNG 1   /* in a SAMSUNG core */
 #define CONFIG_S5P 1   /* S5P Family */
+#define CONFIG_EXYNOS4 /* EXYNOS4 Family */
 #define CONFIG_EXYNOS4210  1   /* which is a EXYNOS4210 SoC */
 #define CONFIG_SMDKV3101   /* working with 
SMDKV310*/
 
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 5d8bd60..6cade07 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -207,8 +207,8 @@
 #define CONFIG_SYS_I2C_INIT_BOARD
 
 /* I2C FG */
-#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(2, y4, 1)
-#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(2, y4, 0)
+#define CONFIG_SOFT_I2C_GPIO_SCL EXYNOS4_GPIO_Y41
+#define CONFIG_SOFT_I2C_GPIO_SDA EXYNOS4_GPIO_Y40
 
 /* POWER */
 #define CONFIG_POWER
@@ -245,8 +245,8 @@
 #define KEY_PWR_INTERRUPT_REG  MAX8997_REG_INT1
 #define KEY_PWR_INTERRUPT_MASK (1  0)
 
-#define KEY_VOL_UP_GPIOexynos4_gpio_get(2, x2, 0)
-#define KEY_VOL_DOWN_GPIO  exynos4_gpio_get(2, x2, 1)
+#define KEY_VOL_UP_GPIOEXYNOS4_GPIO_X20
+#define KEY_VOL_DOWN_GPIO  EXYNOS4_GPIO_X21
 #endif /* __ASSEMBLY__ */
 
 /* LCD console */
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index 53d449c..856c03b 100644
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -227,8 +227,8 @@ int get_soft_i2c_sda_pin(void);
 #define KEY_PWR_INTERRUPT_REG  MAX77686_REG_PMIC_INT1
 #define KEY_PWR_INTERRUPT_MASK (1  1)
 
-#define KEY_VOL_UP_GPIOexynos4x12_gpio_get(2, x2, 2)
-#define KEY_VOL_DOWN_GPIO  exynos4x12_gpio_get(2, x3, 3)
+#define KEY_VOL_UP_GPIO

Re: [U-Boot] [PATCH v4 4/5] samsung: misc: keys: fix gpio key bouncing by adding 50 ms delay

2014-04-28 Thread Gerhard Sittig

On Mon, 2014-04-28 at 15:44 +0200, Gerhard Sittig wrote:
 
 [ ... ]  What you
 need is some kind of trigger where you notice that the line
 levels are changing, and a delayed fetch of the lines' values
 after they have settled.  Without the first condition, you always
 have the risk of sampling arbitrary data that does not reflect
 the keys' status.

Let me mention another approach here for completeness.

You might want to fetch samples into some buffer (a FIFO of a
certain depth), and only pass along pressed or released
conditions when a certain number of successive samples have the
same level and this level is different from what you have passed
along previously.  That is, you only report changes in the keys'
condition after they have become stable.

This approach might be the least intrusive in the context of the
routine that you modify in your patch.  And it can be acceptably
cheap both in terms of computation as well as in storage.

  bool last_reported = 0;
  int last_sampled = 0;

  last_sampled = 1;
  last_sampled = 0xfff;
  last_sampled |= (key_pressed() ? 1 : 0;

  if (last_reported  last_sampled == 0) {
/* report the released edge */
last_reported = false;
  }
  if (!last_reported  last_sampled == 0xfff) {
/* report the pressed edge */
last_reported = true;
  }
  /* other cases either are no changes, or changes that
   * have not yet become stable */

Just pick a depth and sampling frequency that matches the
characteristics of the mechanical bouncing of the switches.
Several ten milliseconds is a good estimate (and most users
won't notice the delay).  This might be a useful helper for
other boards to use, too.


virtually yours
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[U-Boot] [PATCH v4 2/3] usb:gadget:f_thor: fix write to filesystem by add dfu_flush()

Since dfu read/write operations needs to be flushed manually,
writing to filesystem on MMC by thor was broken. MMC raw write
actually is working fine because current dfu_flush() function
writes filesystem only. This commit adds dfu_flush() to f_thor
and now filesystem write is working.

This change was tested on Trats2 board.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Marek Vasut ma...@denx.de
Cc: Heiko Schocher h...@denx.de
Cc: Tom Rini tr...@ti.com

---
Changes v2:
- separate fix and cleanup into two commits

Changes v3:
- none

Changes v4:
- download_tail(): remove dfu_write with 0 size
---
 drivers/usb/gadget/f_thor.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
index 1190c74..a3ab6b9 100644
--- a/drivers/usb/gadget/f_thor.c
+++ b/drivers/usb/gadget/f_thor.c
@@ -219,15 +219,15 @@ static int download_tail(long long int left, int cnt)
}
 
/*
-* To store last packet DFU storage backend requires dfu_write with
-* size parameter equal to 0
+* To store last packet or write file from buffer to filesystem
+* DFU storage backend requires dfu_flush
 *
 * This also frees memory malloc'ed by dfu_get_buf(), so no explicit
 * need fo call dfu_free_buf() is needed.
 */
-   ret = dfu_write(dfu_entity, transfer_buffer, 0, cnt);
+   ret = dfu_flush(dfu_entity, transfer_buffer, 0, cnt);
if (ret)
-   error(DFU write failed [%d] cnt: %d, ret, cnt);
+   error(DFU flush failed!);
 
 exit:
return ret;
-- 
1.9.1

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[U-Boot] [PATCH v4 1/3] usb:gadget:f_thor: code cleanup in function download_tail()

In thor's download_tail() function, dfu_get_entity() is called
before each dfu_write() call and the returned entity pointers
are the same. So dfu_get_entity() can be called just once and
this patch changes this.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Marek Vasut ma...@denx.de
Cc: Heiko Schocher h...@denx.de
Cc: Tom Rini tr...@ti.com

---
Changes v2:
- separate fix and cleanup into two commits

Changes v3:
- download_tail(): add exit label

Changes v4:
- none
---
 drivers/usb/gadget/f_thor.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
index f5c0224..1190c74 100644
--- a/drivers/usb/gadget/f_thor.c
+++ b/drivers/usb/gadget/f_thor.c
@@ -204,17 +204,17 @@ static long long int download_head(unsigned long long 
total,
 
 static int download_tail(long long int left, int cnt)
 {
+   struct dfu_entity *dfu_entity = dfu_get_entity(alt_setting_num);
void *transfer_buffer = dfu_get_buf();
int ret;
 
debug(%s: left: %llu cnt: %d\n, __func__, left, cnt);
 
if (left) {
-   ret = dfu_write(dfu_get_entity(alt_setting_num),
-   transfer_buffer, left, cnt++);
+   ret = dfu_write(dfu_entity, transfer_buffer, left, cnt++);
if (ret) {
error(DFU write failed [%d]: left: %llu, ret, left);
-   return ret;
+   goto exit;
}
}
 
@@ -225,11 +225,11 @@ static int download_tail(long long int left, int cnt)
 * This also frees memory malloc'ed by dfu_get_buf(), so no explicit
 * need fo call dfu_free_buf() is needed.
 */
-   ret = dfu_write(dfu_get_entity(alt_setting_num),
-   transfer_buffer, 0, cnt);
+   ret = dfu_write(dfu_entity, transfer_buffer, 0, cnt);
if (ret)
error(DFU write failed [%d] cnt: %d, ret, cnt);
 
+exit:
return ret;
 }
 
-- 
1.9.1

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[U-Boot] [PATCH v4 3/3] drivers:dfu: dfu_flush(): add raw data flush to complete

Before dfu write and flush operations separation,
dfu write data was flushed by host download request
with len of zero size.

Since above change manually calling dfu write with zero
size has non sense (e.g. in THOR). This should be done by
flush operation.
So now dfu_write_buffer_drain() is called in dfu_flush().
If there is any raw data to flush (like it can be in thor)
then it will be physically written to medium.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com

---
Changes v4:
- new commit
---
 drivers/dfu/dfu.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index 8a09aaf..94e9116 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -131,6 +131,10 @@ int dfu_flush(struct dfu_entity *dfu, void *buf, int size, 
int blk_seq_num)
 {
int ret = 0;
 
+   ret = dfu_write_buffer_drain(dfu);
+   if (ret)
+   return ret;
+
if (dfu-flush_medium)
ret = dfu-flush_medium(dfu);
 
-- 
1.9.1

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Re: [U-Boot] [PATCH 04/11] kconfig: add basic Kconfig files

HI Masahiro,

On 23 April 2014 23:04, Masahiro Yamada yamad...@jp.panasonic.com wrote:
 This commit adds more Kconfig files, which were written by hand.

 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 ---

  Kconfig  | 47 +++
  arch/Kconfig | 66 
 
  2 files changed, 113 insertions(+)
  create mode 100644 Kconfig
  create mode 100644 arch/Kconfig

 diff --git a/Kconfig b/Kconfig
 new file mode 100644
 index 000..4e383d2
 --- /dev/null
 +++ b/Kconfig
 @@ -0,0 +1,47 @@
 +#
 +# For a description of the syntax of this configuration file,
 +# see Documentation/kbuild/kconfig-language.txt.
 +#
 +mainmenu U-Boot $UBOOTVERSION $BUILD_MODE Configuration
 +
 +config UBOOTVERSION
 +   string
 +   option env=UBOOTVERSION
 +
 +config KCONFIG_OBJDIR
 +   string
 +   option env=KCONFIG_OBJDIR
 +
 +config BUILD_MODE
 +   string
 +   default SPL if $KCONFIG_OBJDIR=spl/
 +   default TPL if $KCONFIG_OBJDIR=tpl/
 +   default Main
 +
 +menu General setup
 +
 +config SPL_BUILD
 +   bool
 +   depends on BUILD_MODE=SPL || BUILD_MODE=TPL

What is the TPL term for?

 +   default y
 +
 +config TPL_BUILD
 +   bool
 +   depends on BUILD_MODE=TPL
 +   default y
 +
 +config SPL
 +   bool
 +   prompt Build SPL image if !SPL_BUILD
 +   default y if SPL_BUILD
 +
 +config TPL
 +   bool
 +   depends on SPL
 +   prompt Build TPL image if !SPL_BUILD
 +   default y if TPL_BUILD
 +
 +endmenu# General setup
[snip]

Regards,
Simon
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Re: [U-Boot] [PATCH 05/11] include: define CONFIG_SPL and CONFIG_TPL as 1

On 23 April 2014 23:04, Masahiro Yamada yamad...@jp.panasonic.com wrote:
 We are about to switch to Kconfig in the next commit.
 But there are something to get done beforehand.

 In Kconfig, include/generated/autoconf.h defines boolean
 CONFIG macros as 1.

 CONFIG_SPL and CONFIG_TPL, if defined, must be defined as 1.
 Otherwise, when switching to Kconfig, the build log
 would be sprinkled with warning messages like this:
   warning: CONFIG_SPL redefined [enabled by default]

 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com

Oh well.

Reviewed-by: Simon Glass s...@chromium.org
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Re: [U-Boot] [PATCH 06/11] kconfig: switch to Kconfig

On 23 April 2014 23:04, Masahiro Yamada yamad...@jp.panasonic.com wrote:
 This commit enables Kconfig.
 Going forward, we use Kconfig for board configuration.
 mkconfig will never be used. Nor will include/config.mk be generated.

 Kconfig must be adjusted for U-Boot because our situation is
 a little more complicated than Linux Kernel.
 We have to generate 3 images at most: Main image, SPL, TPL.
 And each of them can have a different set of CONFIG macros.

 In order to keep this scheme in Kconfig, some files must be modified.
 But the modification should be minimum.

 The location of Kconfig related files is as follows:

  [1] Main
- .config  (saved CONFIG list)
- include/config/auto.conf (for use in makefiles)
- include/generated/autoconf.h (for use in C sources)
- include/config/* (for if_changed_dep)

  [2] SPL
- spl/.config  (saved CONFIG list)
- spl/include/config/auto.conf (for use in makefiles)
- spl/include/generated/autoconf.h (for use in C sources)
- spl/include/config/* (for if_changed_dep)

  [3] TPL
- tpl/.config  (saved CONFIG list)
- tpl/include/config/auto.conf (for use in makefiles)
- tpl/include/generated/autoconf.h (for use in C sources)
- tpl/include/config/* (for if_changed_dep)

 Usage:

 Execute make board_defconfig to configure board and then run make.
 Or make board_defconfig all to configure and build in one time.

 To modify configuration, run make config, make menuconfig, etc.
 To see the other configuration targets execute make help.

 In Kconfig for U-boot, the configuration is done on three levels at most.

 make menuconfig will show a menu with a blue background for the
 main configuration.

 Enable Build SPL image, Build TPL image under General setup
 to build SPL, TPL, respectively.

 After modifying settings, choose Exit.
 CONFIG macros will be saved into .config file.

 If SPL build is enabled, the second menu for SPL configuration
 will come up.

 And if TPL build is also enabled, the third menu for TPL will
 be displayed.

 By the way, there is another item worth remarking here:
 coexistence of Kconfig and board herder files.

 To define the set of CONFIG macros, we have used C headers.

 We expect long term to move existing CONFIG macros to Kconfig.
 Two different infractructure must coexist in the interim.

 Prior to Kconfig, include/autoconf.mk, include/spl-autoconf.mk,
 include/tpl-autoconf.mk were generated from the config header
 for the use in makefiles.

 They are still supported in Kconfig for U-Boot.
 They are created at the beginning of the build and merged into
 include/config/auto.conf, spl/include/config/auto.conf,
 tpl/include/config/auto.conf, respectively.

 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com

Reviewed-by: Simon Glass s...@chromium.org
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Re: [U-Boot] [PATCH] sandbox: move source files from board/ to arch/sandbox/

Hi Masahiro,

On 23 April 2014 20:14, Masahiro Yamada yamad...@jp.panasonic.com wrote:
 Hi Simon,

 On Wed, 23 Apr 2014 09:04:20 -0600
 Simon Glass s...@chromium.org wrote:

 Hi Masahiro,

 On 21 April 2014 19:00, Masahiro Yamada yamad...@jp.panasonic.com wrote:
  Hi Simon,
 
 
  On Mon, 21 Apr 2014 15:02:20 -0600
  Simon Glass s...@chromium.org wrote:
 
  Hi Masahiro,
 
  On 21 April 2014 03:39, Masahiro Yamada yamad...@jp.panasonic.com wrote:
   Prior to commit 33a02da0, all boards must have board/${BOARD}/
   or board/${VENDOR}/${BOARD}/ directory.
   Now this rule is obsolete.
  
   It looks weird that sandbox defines vendor and board just for
   meeting the old U-Boot directory structure.
  
   Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
   Cc: Simon Glass s...@chromium.org
   ---
   Simon,
  
   I moved board/sandbox/sandbox/sandbox.c to arch/sandbox/lib/sandbox.c
  
   But if there is a more suitable place or file-name, please move.
 
  I like the README move, but I worry about not having a sandbox board,
  from the point of view of discoverability. How will people find it?
 
  I am not sure if this is necessary.
 
  I just personaly thought the board directory seems odd for Sandbox
  because it is not a real board.
 
  If you don't like this patch, feel free to reject it.

 I think it is better to have board/sandbox. Is it possible to have a
 null vendor, so we don't need board/sandbox/sandbox?

 Of cource.
 There are many boards without vendors.


 In that case, you can set the 5th column to '-' in boards.cfg.


 Active  sandbox sandbox-   sandbox sandbox sandbox

 to

 Active  sandbox sandbox-   - sandbox sandbox



 With this change, you can decrease one level hierarchy.

 board/sandbox/sandbox/sandbox.c
 -  board/sandbox/sandbox.c

That seems better to me. Will you update your patch?

Regards,
Simon
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Re: [U-Boot] [PATCH 09/11] kconfig: delete redundant CONFIG_${ARCH} definition

On 23 April 2014 23:04, Masahiro Yamada yamad...@jp.panasonic.com wrote:
 CONFIG_${ARCH} is defined by Kconfig.

 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com

Reviewed-by: Simon Glass s...@chromium.org
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Re: [U-Boot] [PATCH 11/11] kconfig: remove old script

On 23 April 2014 23:04, Masahiro Yamada yamad...@jp.panasonic.com wrote:
 mkconfig is no longer used in Kconfig.

 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com

Reviewed-by: Simon Glass s...@chromium.org
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Re: [U-Boot] [PATCH 10/11] kbuild: remove CONFIG_SPL/CONFIG_TPL definition in config headers

On 23 April 2014 23:04, Masahiro Yamada yamad...@jp.panasonic.com wrote:
 CONFIG_SPL and CONFIG_TPL are defined in Kconfig.

 Remove the redundant definition in config headers.

 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com

Reviewed-by: Simon Glass s...@chromium.org
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Re: [U-Boot] [PATCH 03/11] kconfig: add board Kconfig and defconfig files

On 04/28/2014 03:39 AM, Masahiro Yamada wrote:
 On Thu, 24 Apr 2014 14:36:33 -0600
 Stephen Warren swar...@wwwdotorg.org wrote:

 diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig
 new file mode 100644
 index 000..88819b9
 --- /dev/null
 +++ b/configs/seaboard_defconfig
 @@ -0,0 +1,3 @@
 +CONFIG_SPL=y
 +CONFIG_ARM=y
 +CONFIG_TARGET_SEABOARD=y

 diff --git a/configs/spl/seaboard_defconfig b/configs/spl/seaboard_defconfig
 new file mode 100644
 index 000..bc3eab4
 --- /dev/null
 +++ b/configs/spl/seaboard_defconfig
 @@ -0,0 +1,2 @@
 +CONFIG_ARM=y
 +CONFIG_TARGET_SEABOARD=y

 This definitely feels wrong. We shouldn't need to repeat the content of
 these files twice with/without CONFIG_SPL=y.

 Should SPL/non-SPL be two build targets that get built when you ask to
 build for Seaboard, not two entirely unrelated defconfig files?
 
 This is another item worth discussion.
 
 The idea in my mind is to not treat SPL and TPL as special cases.
 (This is an idea proposed by Simon.)
 
 I was thinking of handling Non-SPL, SPL, TPL as generic images.
 
 Currently, C sources and Makefiles are really dirty because of
 ifdef CONFIG_SPL_BUILD everywhere.
 
 But, roughly, the difference among them is how many CONFIG_ macros
 are enabled.
 
 Non-SPL:  enable hush command line, many useful commands,
  many drivers, net work feature etc. But the image size is big.
 
 SPL: disable hush command line  all commands
enable only some drivers enough for loading another image.
The image size is small.
 
 So, in future, many user ediatable settings will be moved to Kconfig.
 And then, 
 
 config/seaboard_defconfig will include
 CONFIG_SYS_HUSH_PARSER=y
 CONFIG_CMD_FOO=y
 CONFIG_CMD_BAR=y
 ...
 
 but config/spl/seaboard_defconfig will disable most of them.

I guess the main issue I see here is that all the HW-configuration needs
to be repeated in seaboard_defconfig and spl/seaboard_defconfig.

(As an aside, if there's nothing special about SPL-vs-not and they're
just different builds of U-Boot, why put the SPL configurations into a
special-case sub-directory, why not name them seaboard_spl_defconfig and
seaboard_defconfig, and put them in the same configs directory).

Can we allow one defconfig to include or inherit from another? I know
that ChromeOS stores kernel defconfigs in split configs that build
upon each-other. Probably, this feature comes from elsewhere, and we
could just crib the config split/combine script for U-Boot's use. To
make this work, we'd probably need the user to run something like:

./build-u-boot seaboard
or:
./build-u-boot seaboard_spl

... rather than running make directly, so that script could generate the
.config from a set of defconfigs, and then invoke make.

(as an aside, having the user run a script to build rather than make
directly gives us a huge amount more flexibility to add run arbitrary
code to set up the build process before invoking make. I've found this
kind of thing extremely useful in the past on other projects).

This would allow us to create something like:

file: tegra20_soc_config
System is ARM
...

file: seaboard_board_config:
include tegra20_soc_config
Main UART is UARTD # some boards use UART A, etc.
Enable UART support
DT filename is tegra20-seaboard.dtb
...

file: seaboard_defconfig
include seaboard_board_config
Enable a whole slew of options like shell, commands, MMC drivers, USB, ...

file: seaboard_spl_defconfig
include seaboard_board_config
Enable a few SPL-specific options, if any
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Re: [U-Boot] [PATCH v10 0/2] S5P: Exynos: Add GPIO numbering feature


Hi Akshay,

On 04/28/2014 03:59 PM, Akshay Saraswat wrote:

Used a script to recheck/verify pin mapping and existing mapping
appears to be fine, returning correct bank and pin values.
Did ./MAKEALL -a arm and found all Exynos/S5P related boards
compiled successfully.
Couldn't test booting over all of them.
Tested U-Boot bootup over SMDK5420, SMDK5250, Snow.
Requesting maintaners to please test over affected SoCs/boards.

Changes in V2:
- Enabled CMD_GPIO as suggested by Simon Glass
  and supported same for EXYNOS5.
Changes in V3:
- New patch added to rename S5P GPIO definitions
  to S5P_GPIO.
- GPIO Table added to calculate the base address
  of input gpio bank.
Changes in V4:
- To have consistent 0..n-1 GPIO numbering the banks
  are divided into different parts where ever they
  have holes in them.
- Function and table to support gpio command moved
  to s5p-gpio driver.
- Rebased on latest u-boot-samsung tree.
Changes in V5:
- Rebased on latest u-boot-samsung tree.
- Removed Exynos5 specific code in gpio driver api to
  get bank.
- Added #define HAVE_GENERIC_GPIO in config file
  to remove conditinal CPU check in gpio driver.
Changes in V6:
- Isolated config changes in a new patch.
- Updated patches with corresponding changes for Exynos 5420.
Changes in V7:
- Added changes for other SoCs like Exynos 4412, 4210 etc.
Changes in V8:
- Changed Subject of patch 2/2 to reflect affected SoCs/boards.
- Fixed arndale board compile time errors introduced due to
  patch-set v7.
Changes in V9:
- Fixed checkpatch errors.
- Fixed naming error in exynos_gpio_data arrays which could
  be the possible reason behind data abort witnessed over
  Exynos4 boards.
Changes in v10:
- Made arch-exynos/gpio.h - arch/gpio.h.
- Removed dead code.
- Replaced exynos_gpio_get calls with corresponding pin number.
- Edited pin numbmers in dts files.

Akshay Saraswat (2):
   EXYNOS: Add GPIO pin numbering and rename definitions
   S5P: Exynos: Config: Enable GPIO CMD config

  arch/arm/cpu/armv7/exynos/pinmux.c |  403 +++
  arch/arm/dts/exynos4210-origen.dts |4 +-
  arch/arm/dts/exynos4210-trats.dts  |6 +-
  arch/arm/dts/exynos4210-universal_c210.dts |4 +-
  arch/arm/dts/exynos4412-trats2.dts |4 +-
  arch/arm/include/asm/arch-exynos/cpu.h |   17 +-
  arch/arm/include/asm/arch-exynos/gpio.h| 1788 +++-
  arch/arm/include/asm/arch-s5pc1xx/gpio.h   |  940 +--
  board/samsung/arndale/arndale.c|   11 +-
  board/samsung/goni/goni.c  |   26 +-
  board/samsung/smdk5250/exynos5-dt.c|   20 +-
  board/samsung/smdk5250/smdk5250.c  |   19 +-
  board/samsung/smdk5420/smdk5420.c  |   15 +-
  board/samsung/smdkc100/smdkc100.c  |5 +-
  board/samsung/smdkv310/smdkv310.c  |   17 +-
  board/samsung/trats/trats.c|   39 +-
  board/samsung/trats2/trats2.c  |   74 +-
  board/samsung/universal_c210/universal.c   |   51 +-
  drivers/gpio/s5p_gpio.c|  198 ++-
  include/configs/exynos5-dt.h   |2 +
  include/configs/s5p_goni.h |4 +-
  include/configs/s5pc210_universal.h|   16 +-
  include/configs/smdkv310.h |1 +
  include/configs/trats.h|8 +-
  include/configs/trats2.h   |4 +-
  25 files changed, 2793 insertions(+), 883 deletions(-)



Only quick test on Trats2:
- VOLUP and VOLDOWN works fine (gpio definitions in trats2.h are proper)
- I2C works fine (gpios defined in trats2.c)
- MMC init failed but it looks like dts values are proper, so maybe 
returned gpio bank addresses are not valid.


I will check this tommorow.

And there is also dead code in arch-xxx/gpio.h,
like S5P_GPIO_SET_PART() and S5P_GPIO_GET_PART().

Thanks
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH v4 6/6] PPC 85xx: Add qemu-ppce500 machine

On 02/20/2014 04:52 AM, Alexander Graf wrote:
 For KVM we have a special PV machine type called ppce500. This machine
 is inspired by the MPC8544DS board, but implements a lot less features
 than that one.
 
 It also provides more PCI slots and is supposed to be enumerated by
 device tree only.
 
 This patch adds support for the generic ppce500 machine and tries to
 rely solely on device tree for device enumeration.
 
 Signed-off-by: Alexander Graf ag...@suse.de
 
 ---
 
 v3 - v4:
 
   - use new tlb map syntax
   - check that tlb map mapped everything
   - always save/restore r3 for cpu_init_early_f
   - remove CONFIG_DYNAMIC_CCSRBAR
   - make init_tlbs weak and remove all init_tlbs_dynamic() cruft
   - always map fdt to fixed virtual address
   - fold together AS=1 fdt map functions
   - use tlb_map_range for CCSR map
   - search for PCI based on device type rather than compatible
   - remove unnecessary cast
   - call get_linear_ram_size directly
   - override get_tbclk with timebase-frequency fetching code
 ---

snip

 diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c 
 b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
 index 993b8b8..998781b 100644
 --- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
 +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
 @@ -79,7 +79,7 @@ void setup_ifc(void)
  #endif
  
  /* We run cpu_init_early_f in AS = 1 */
 -void cpu_init_early_f(void)
 +void cpu_init_early_f(void *fdt)
  {
   u32 mas0, mas1, mas2, mas3, mas7;
   int i;
 @@ -102,6 +102,12 @@ void cpu_init_early_f(void)
   for (i = 0; i  sizeof(gd_t); i++)
   ((char *)gd)[i] = 0;
  
 + /*
 +  * CONFIG_SYS_CCSRBAR_PHYS below may use gd-fdt_blob on ePAPR systems,
 +  * so we need to populate it before it accesses it.
 +  */
 + gd-fdt_blob = fdt;
 +

Alex,

I am thinking to add back #ifdef CONFIG_QEMU_E500 you had for your v3 and
earlier version for the above change. Do you have any concerns?

The reason I am proposing this is to use generic board architecture.
gd-fdt_blob is used by some other functions to detect if device tree exists.
Your change takes r3 from entry and treat it as device tree. It is not the case
for a normal metal SoC. I need to clear this variable.

York

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[U-Boot] [PATCH v5 02/12] part: header fix

Implementation made use of types defined in common.h, even though it
wasn't #included. It worked in circumstances when .c files included
every needed header (all).

Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Cc: Tom Rini tr...@ti.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes since v1:
- none
---
 include/part.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/part.h b/include/part.h
index 4beb6db..53532dc 100644
--- a/include/part.h
+++ b/include/part.h
@@ -8,6 +8,7 @@
 #define _PART_H
 
 #include ide.h
+#include common.h
 
 typedef struct block_dev_desc {
int if_type;/* type of the interface */
-- 
1.9.0

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[U-Boot] [PATCH v5 01/12] mmc: mmc header fix

Structure definition used type block_dev_desc_t, defined in part.h, which
wasn't included in mmc.h. It worked only in circumstances when common.h,
or another header using part.h was incuded in implementation files.

Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
---
Changes since v1:
- none
---
 include/mmc.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/mmc.h b/include/mmc.h
index 42d0125..bc11f45 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -12,6 +12,7 @@
 
 #include linux/list.h
 #include linux/compiler.h
+#include part.h
 
 #define SD_VERSION_SD  0x2
 #define SD_VERSION_3   (SD_VERSION_SD | 0x300)
-- 
1.9.0

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[U-Boot] [PATCH v5 08/12] USB: gadget: added a saner gadget downloader registration API

Preprocessor definitions and hardcoded implementation selection in
g_dnl core were replaced by a linker list made of (usb_function_name,
bind_callback) pairs.

Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Acked-by: Lukasz Majewski l.majew...@samsung.com
Acked-by: Marek Vasut ma...@denx.de
---
Changes since v1:
- reordered
since v2:
- fixed coding style issues reported by [Marek Vasut]
- added convenient macro wrappers for used ll_entry_declare
since v4:
- fixed coding style issues reported by [Jaehoon Chung]
---
 common/cmd_dfu.c|  3 +-
 common/cmd_thordown.c   |  3 +-
 common/cmd_usb_mass_storage.c   |  2 +-
 drivers/usb/gadget/f_dfu.c  |  3 ++
 drivers/usb/gadget/f_mass_storage.c |  3 ++
 drivers/usb/gadget/f_thor.c |  2 ++
 drivers/usb/gadget/g_dnl.c  | 64 -
 include/dfu.h   |  7 
 include/g_dnl.h | 23 +
 include/thor.h  |  8 -
 include/usb_mass_storage.h  |  8 -
 11 files changed, 62 insertions(+), 64 deletions(-)

diff --git a/common/cmd_dfu.c b/common/cmd_dfu.c
index 5547678..a03538d 100644
--- a/common/cmd_dfu.c
+++ b/common/cmd_dfu.c
@@ -22,7 +22,6 @@ static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
char *interface = argv[2];
char *devstring = argv[3];
 
-   char *s = dfu;
int ret, i = 0;
 
ret = dfu_init_env_entities(interface, simple_strtoul(devstring,
@@ -38,7 +37,7 @@ static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
int controller_index = simple_strtoul(usb_controller, NULL, 0);
board_usb_init(controller_index, USB_INIT_DEVICE);
 
-   g_dnl_register(s);
+   g_dnl_register(usb_dnl_dfu);
while (1) {
if (dfu_reset())
/*
diff --git a/common/cmd_thordown.c b/common/cmd_thordown.c
index c4b3511..2dd7509 100644
--- a/common/cmd_thordown.c
+++ b/common/cmd_thordown.c
@@ -22,7 +22,6 @@ int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
char *interface = argv[2];
char *devstring = argv[3];
 
-   const char *s = thor;
int ret;
 
puts(TIZEN \THOR\ Downloader\n);
@@ -40,7 +39,7 @@ int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
goto exit;
}
 
-   g_dnl_register(s);
+   g_dnl_register(usb_dnl_thor);
 
ret = thor_init();
if (ret) {
diff --git a/common/cmd_usb_mass_storage.c b/common/cmd_usb_mass_storage.c
index 14a5b6a..d8d9efd 100644
--- a/common/cmd_usb_mass_storage.c
+++ b/common/cmd_usb_mass_storage.c
@@ -40,7 +40,7 @@ int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
return CMD_RET_FAILURE;
}
 
-   g_dnl_register(ums);
+   g_dnl_register(usb_dnl_ums);
 
/* Timeout unit: seconds */
int cable_ready_timeout = UMS_CABLE_READY_TIMEOUT;
diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c
index de75ff1..1b1e179 100644
--- a/drivers/usb/gadget/f_dfu.c
+++ b/drivers/usb/gadget/f_dfu.c
@@ -24,6 +24,7 @@
 #include linux/usb/composite.h
 
 #include dfu.h
+#include g_dnl.h
 #include f_dfu.h
 
 struct f_dfu {
@@ -817,3 +818,5 @@ int dfu_add(struct usb_configuration *c)
 
return dfu_bind_config(c);
 }
+
+DECLARE_GADGET_BIND_CALLBACK(usb_dnl_dfu, dfu_add);
diff --git a/drivers/usb/gadget/f_mass_storage.c 
b/drivers/usb/gadget/f_mass_storage.c
index 4fae5cd..6374bb9 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -255,6 +255,7 @@
 #include linux/usb/gadget.h
 #include linux/usb/composite.h
 #include usb/lin_gadget_compat.h
+#include g_dnl.h
 
 /**/
 
@@ -2778,3 +2779,5 @@ int fsg_init(struct ums *ums_dev)
 
return 0;
 }
+
+DECLARE_GADGET_BIND_CALLBACK(usb_dnl_ums, fsg_add);
diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
index f5c0224..59d246d 100644
--- a/drivers/usb/gadget/f_thor.c
+++ b/drivers/usb/gadget/f_thor.c
@@ -999,3 +999,5 @@ int thor_add(struct usb_configuration *c)
debug(%s:\n, __func__);
return thor_func_init(c);
 }
+
+DECLARE_GADGET_BIND_CALLBACK(usb_dnl_thor, thor_add);
diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c
index 973d737..743bae5 100644
--- a/drivers/usb/gadget/g_dnl.c
+++ b/drivers/usb/gadget/g_dnl.c
@@ -41,7 +41,6 @@
 
 #define DRIVER_VERSION usb_dnl 2.0
 
-static const char shortname[] = usb_dnl_;
 static const char product[] = USB download gadget;
 static char g_dnl_serial[MAX_STRING_SERIAL];
 static const char manufacturer[] = CONFIG_G_DNL_MANUFACTURER;
@@ -96,29 +95,36 @@ static int g_dnl_unbind(struct usb_composite_dev *cdev)
free(cdev-config);
cdev-config = NULL;
debug(%s: calling usb_gadget_disconnect for 
-

[U-Boot] [PATCH v5 00/12] DFU, MMC, Gadget, Goni, misc.

Patchset contains fixes for:
* DFU write issues
* USB cable detection
* ums command
* U-Boot's base framework (headers)
* fixed base DFU offsets
and features:
* convenient USB Gadget registration
* Samsung Goni DFU, UMS, GPT bringup
also:
* am335x will no longer support DFU in SPL builds

There _are_ dependencies between these patches. ie. Goni stuff depends on the
new Gadget registration API, which in turn depends on disabling DFU in
am335x's SPL build so that some poor soul wouldn't trip over a board-breaking
commit while running git bisect, and I could have not written correct code
without fixing u-boot headers first...

Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Tom Rini tr...@ti.com
Cc: Marek Vasut ma...@denx.de

---
Changes since v1:
- reordered USB: gadget: added a saner gadget downloader registration API
- fixed a bug related to usb_cable_connected() which broke previous Goni
  configuration patches
- disabled DFU in TI's am335x SPL build due to insufficient ROM capacity
since v2:
in USB: gadget: added a saner gadget downloader:
fixed issues which came to [Marek Vasut]'s attention:
- fixed coding style issues
- added convenient macro wrappers for used ll_entry_declare
since v3:
- grouped patches related to common topics
in ums: always initialize mmc before ums_disk_init()
- Added const attribute of ums_disk_init introduced type warnings. It would
  take a lot of changes to MMC core code to fix it, so it was dropped, even
  though ums_disk_init shouldn't and doesn't change struct mmc it is passed.
since v4:
- added detailed changelog to each patch
- removed patches which can go in separately:
  common: fixed linker-list example
  mmc: postponed needless timer initialization
in dfu: mmc: raw data write fix:
- commit message was made more detailed
- the patch was split in two, introducing
  dfu: mmc: change offset base handling to the patchset
in usb: dfu: fix boards wo USB cable detection:
- removed CONFIG_USB_CABLE_CHECK
- moved implementation from usb.h (reserved for USB host code)
  to USB gadget
- renamed usb_cable_connected to g_dnl_usb_cable_connected
- removed defunct board implementations (origen, universal)
- added __weak default implementation and removed ifdef'd blocks around
  dependent code
in gadget: added a saner gadget downloader
- fixed coding style issues reported by [Jaehoon Chung] 
---

Mateusz Zalega (12):
  mmc: mmc header fix
  part: header fix
  usb: dfu: fix boards wo USB cable detection
  dfu: mmc: raw data write fix
  dfu: mmc: change offset base handling
  ums: always initialize mmc before ums_disk_init()
  am335x: dfu: disable DFU in am335x_evm SPL build
  USB: gadget: added a saner gadget downloader registration API
  arm: goni: Update configuration for Goni target
  arm: goni: dfu: Add support for DFU to Goni target
  arm: goni: enable GPT command
  arm: goni: enable USB Mass Storage

 README   |   7 --
 board/samsung/common/ums.c   |   6 +-
 board/samsung/goni/goni.c|   8 +++
 board/samsung/origen/origen.c|   7 --
 board/samsung/trats/trats.c  |   4 +-
 board/samsung/trats2/trats2.c|   4 +-
 board/samsung/universal_c210/universal.c |   7 --
 common/cmd_dfu.c |   3 +-
 common/cmd_thordown.c|   3 +-
 common/cmd_usb_mass_storage.c|  10 ++-
 drivers/dfu/dfu_mmc.c| 109 ++---
 drivers/usb/gadget/f_dfu.c   |   3 +
 drivers/usb/gadget/f_mass_storage.c  |  11 +--
 drivers/usb/gadget/f_thor.c  |   2 +
 drivers/usb/gadget/g_dnl.c   |  69 +--
 include/configs/am335x_evm.h |  10 +--
 include/configs/exynos4-dt.h |   1 -
 include/configs/s5p_goni.h   | 113 +--
 include/configs/trats.h  |   2 +-
 include/configs/trats2.h |   2 +-
 include/dfu.h|  12 
 include/g_dnl.h  |  24 +++
 include/mmc.h|   1 +
 include/part.h   |   1 +
 include/thor.h   |   8 ---
 include/usb.h|  10 ---
 include/usb_mass_storage.h   |   8 ---
 27 files changed, 247 insertions(+), 198 deletions(-)

-- 
1.9.0

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[U-Boot] [PATCH v5 03/12] usb: dfu: fix boards wo USB cable detection

Former usb_cable_connected() patch broke compilation of boards which do
not support this feature.

I've renamed usb_cable_connected() to g_dnl_usb_cable_connected() and added
its default implementation to gadget downloader driver code. There's
only one driver of this kind and it's unlikely there'll be another, so
there's no point in keeping it in /common.

Previously this function was declared in usb.h. I've moved it, since
it's more appropriate to keep it in g_dnl.h - usb.h seems to be intended
for USB host implementation.

Existing code, confronted with default -EOPNOTSUPP return value,
continues as if the cable was connected.

CONFIG_USB_CABLE_CHECK was removed.

Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Marek Vasut ma...@denx.de
---
Changes since v4:
- removed CONFIG_USB_CABLE_CHECK
- moved implementation from usb.h (reserved for USB host code)
  to USB gadget
- renamed usb_cable_connected to g_dnl_usb_cable_connected
- removed defunct board implementations (origen, universal)
- added __weak default implementation and removed ifdef'd blocks around
  dependent code
---
 README   |  7 ---
 board/samsung/origen/origen.c|  7 ---
 board/samsung/trats/trats.c  |  4 +---
 board/samsung/trats2/trats2.c|  4 +---
 board/samsung/universal_c210/universal.c |  7 ---
 common/cmd_usb_mass_storage.c|  8 ++--
 drivers/usb/gadget/f_mass_storage.c  |  8 
 drivers/usb/gadget/g_dnl.c   |  5 +
 include/configs/exynos4-dt.h |  1 -
 include/g_dnl.h  |  1 +
 include/usb.h| 10 --
 11 files changed, 18 insertions(+), 44 deletions(-)

diff --git a/README b/README
index 12758dc..b973344 100644
--- a/README
+++ b/README
@@ -1484,13 +1484,6 @@ The following options need to be configured:
for your device
- CONFIG_USBD_PRODUCTID 0x
 
-   Some USB device drivers may need to check USB cable attachment.
-   In this case you can enable following config in BoardName.h:
-   CONFIG_USB_CABLE_CHECK
-   This enables function definition:
-   - usb_cable_connected() in include/usb.h
-   Implementation of this function is board-specific.
-
 - ULPI Layer Support:
The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
the generic ULPI layer. The generic layer accesses the ULPI PHY
diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c
index d502f02..a539267 100644
--- a/board/samsung/origen/origen.c
+++ b/board/samsung/origen/origen.c
@@ -30,13 +30,6 @@ int board_usb_init(int index, enum usb_init_type init)
return 0;
 }
 
-#ifdef CONFIG_USB_CABLE_CHECK
-int usb_cable_connected(void)
-{
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 int exynos_early_init_f(void)
 {
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 7c79e7b..ab0ad1d 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -430,8 +430,7 @@ int board_usb_init(int index, enum usb_init_type init)
return s3c_udc_probe(s5pc210_otg_data);
 }
 
-#ifdef CONFIG_USB_CABLE_CHECK
-int usb_cable_connected(void)
+int g_dnl_board_usb_cable_connected(void)
 {
struct pmic *muic = pmic_get(MAX8997_MUIC);
if (!muic)
@@ -440,7 +439,6 @@ int usb_cable_connected(void)
return !!muic-chrg-chrg_type(muic);
 }
 #endif
-#endif
 
 static void pmic_reset(void)
 {
diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c
index f558ef9..4709525 100644
--- a/board/samsung/trats2/trats2.c
+++ b/board/samsung/trats2/trats2.c
@@ -312,8 +312,7 @@ int board_usb_init(int index, enum usb_init_type init)
return s3c_udc_probe(s5pc210_otg_data);
 }
 
-#ifdef CONFIG_USB_CABLE_CHECK
-int usb_cable_connected(void)
+int g_dnl_board_usb_cable_connected(void)
 {
struct pmic *muic = pmic_get(MAX77693_MUIC);
if (!muic)
@@ -322,7 +321,6 @@ int usb_cable_connected(void)
return !!muic-chrg-chrg_type(muic);
 }
 #endif
-#endif
 
 static int pmic_init_max77686(void)
 {
diff --git a/board/samsung/universal_c210/universal.c 
b/board/samsung/universal_c210/universal.c
index f9d71b6..8e49195 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -197,13 +197,6 @@ int board_usb_init(int index, enum usb_init_type init)
return s3c_udc_probe(s5pc210_otg_data);
 }
 
-#ifdef CONFIG_USB_CABLE_CHECK
-int usb_cable_connected(void)
-{
-   return 0;
-}
-#endif
-
 int exynos_early_init_f(void)
 {
wdt_stop();
diff --git a/common/cmd_usb_mass_storage.c b/common/cmd_usb_mass_storage.c
index 5f557d5..14a5b6a 100644
--- a/common/cmd_usb_mass_storage.c
+++

[U-Boot] [PATCH v5 09/12] arm: goni: Update configuration for Goni target

Configuration file for GONI has been updated to support FAT file system,
new mmc partitioning scheme and read linux kernel from eMMC instead of
OneNAND.

Signed-off-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Tested-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Tested-by: Mateusz Zalega m.zal...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes since v1:
- reordered
---
 include/configs/s5p_goni.h | 56 +-
 1 file changed, 30 insertions(+), 26 deletions(-)

diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 991c43e..b9b66c7 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -17,6 +17,7 @@
 #define CONFIG_S5PC110 1   /* which is in a S5PC110 */
 #define CONFIG_MACH_GONI   1   /* working with Goni */
 
+#include linux/sizes.h
 #include asm/arch/cpu.h  /* get chip and board defs */
 
 #define CONFIG_ARCH_CPU_INIT
@@ -38,11 +39,9 @@
 #define CONFIG_INITRD_TAG
 #define CONFIG_CMDLINE_EDITING
 
-/*
- * Size of malloc() pool
- * 1MB = 0x10, 0x10 = 1024 * 1024
- */
-#define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + (1  20))
+/* Size of malloc() pool.*/
+#define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + SZ_1M)
+
 /*
  * select serial console configuration
  */
@@ -90,30 +89,25 @@
,7m(kernel)\
,1m(log)\
,12m(modem)\
-   ,60m(qboot)\
-   ,-(UBI)\0
+   ,60m(qboot)\0
 
 #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
 
-#define CONFIG_BOOTCOMMAND run ubifsboot
+#define CONFIG_BOOTCOMMAND run mmcboot
 
 #define CONFIG_DEFAULT_CONSOLE console=ttySAC2,115200n8\0
 
-#define CONFIG_RAMDISK_BOOTroot=/dev/ram0 rw rootfstype=ext2 \
+#define CONFIG_RAMDISK_BOOTroot=/dev/ram0 rw rootfstype=ext4 \
 ${console} ${meminfo}
 
 #define CONFIG_COMMON_BOOT ${console} ${meminfo} ${mtdparts}
 
-#define CONFIG_BOOTARGSroot=/dev/mtdblock8 ubi.mtd=8 ubi.mtd=3 
ubi.mtd=6 \
-rootfstype=cramfs  CONFIG_COMMON_BOOT
+#define CONFIG_BOOTARGSroot=/dev/mtdblock8 rootfstype=ext4  \
+   CONFIG_COMMON_BOOT
 
 #define CONFIG_UPDATEB updateb=onenand erase 0x0 0x10; \
 onenand write 0x32008000 0x0 0x10\0
 
-#define CONFIG_UBI_MTD  ubi.mtd=${ubiblock} ubi.mtd=3 ubi.mtd=6
-
-#define CONFIG_UBIFS_OPTIONrootflags=bulk_read,no_chk_data_crc
-
 #define CONFIG_MISC_COMMON
 #define CONFIG_MISC_INIT_R
 
@@ -130,36 +124,38 @@
onenand erase 0x0156 0x1eaa; \
onenand write 0x3200 0x126 0x8C\0 \
bootk= \
-   onenand read 0x30007FC0 0xc0 0x60; \
+   run loaduimage; \
bootm 0x30007FC0\0 \
flashboot= \
set bootargs root=/dev/mtdblock${bootblock}  \
-   rootfstype=${rootfstype} CONFIG_UBI_MTD  ${opts}  \
+   rootfstype=${rootfstype} ${opts}  \
${lcdinfo}  CONFIG_COMMON_BOOT ; run bootk\0 \
ubifsboot= \
set bootargs root=ubi0!rootfs rootfstype=ubifs  \
-   CONFIG_UBIFS_OPTION CONFIG_UBI_MTD  ${opts} ${lcdinfo}  \
+   ${opts} ${lcdinfo}  \
CONFIG_COMMON_BOOT ; run bootk\0 \
tftpboot= \
set bootargs root=ubi0!rootfs rootfstype=ubifs  \
-   CONFIG_UBIFS_OPTION CONFIG_UBI_MTD  ${opts} ${lcdinfo}  \
-   CONFIG_COMMON_BOOT ; tftp 0x30007FC0 uImage;  \
-   bootm 0x30007FC0\0 \
+   ${opts} ${lcdinfo}  CONFIG_COMMON_BOOT \
+   ; tftp 0x30007FC0 uImage; bootm 0x30007FC0\0 \
ramboot= \
set bootargs  CONFIG_RAMDISK_BOOT \
-initrd=0x3300,8M ramdisk=8192\0 \
+   initrd=0x3300,8M ramdisk=8192\0 \
mmcboot= \
-   set bootargs root=${mmcblk} rootfstype=${rootfstype} \
-   CONFIG_UBI_MTD  ${opts} ${lcdinfo}  \
+   set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart}  \
+   rootfstype=${rootfstype} ${opts} ${lcdinfo}  \
CONFIG_COMMON_BOOT ; run bootk\0 \
boottrace=setenv opts initcall_debug; run bootcmd\0 \
bootchart=set opts init=/sbin/bootchartd; run bootcmd\0 \
verify=n\0 \
-   rootfstype=cramfs\0 \
+   rootfstype=ext4\0 \
console= CONFIG_DEFAULT_CONSOLE \
mtdparts= MTDPARTS_DEFAULT \
meminfo=mem=80M mem=256M@0x4000 mem=128M@0x5000\0 \
-   mmcblk=/dev/mmcblk1p1\0 \
+   loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x30007FC0 uImage\0 \
+   mmcdev=0\0 \
+   mmcbootpart=2\0 \
+   mmcrootpart=5\0

[U-Boot] [PATCH v5 11/12] arm: goni: enable GPT command

Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes since v1:
- reordered
---
 include/configs/s5p_goni.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index f97b52d..c52a00a 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -73,6 +73,7 @@
 #define CONFIG_CMD_ONENAND
 #define CONFIG_CMD_MMC
 #define CONFIG_CMD_DFU
+#define CONFIG_CMD_GPT
 
 /* USB Composite download gadget - g_dnl */
 #define CONFIG_USBDOWNLOAD_GADGET
@@ -237,6 +238,10 @@
 #define CONFIG_FAT_WRITE
 #define CONFIG_EXT4_WRITE
 
+/* GPT */
+#define CONFIG_EFI_PARTITION
+#define CONFIG_PARTITION_UUIDS
+
 #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_LOAD_ADDR - 0x100)
 
 #define CONFIG_SYS_CACHELINE_SIZE   64
-- 
1.9.0

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[U-Boot] [PATCH v5 06/12] ums: always initialize mmc before ums_disk_init()

In cases when MMC hadn't been initialized before, ie. by the user or other
subsystem, it was still uninitialized while UMS media capacity check,
leading to broken ums command.

UMS has to initialize resources it uses.

Tested on Samsung Goni.

Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Tested-by: Mateusz Zalega m.zal...@samsung.com
Acked-by: Lukasz Majewski l.majew...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes since v3:
- Added const attribute of ums_disk_init introduced type warnings. It would
  take a lot of changes to MMC core code to fix it, so it was dropped, even
  though ums_disk_init shouldn't and doesn't change struct mmc it is passed.
Changes since v4:
- added slightly more detailed commit message 
---
 board/samsung/common/ums.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/board/samsung/common/ums.c b/board/samsung/common/ums.c
index dc155ad..cebabe9 100644
--- a/board/samsung/common/ums.c
+++ b/board/samsung/common/ums.c
@@ -66,11 +66,9 @@ static struct ums *ums_disk_init(struct mmc *mmc)
 
 struct ums *ums_init(unsigned int dev_num)
 {
-   struct mmc *mmc = NULL;
+   struct mmc *mmc = find_mmc_device(dev_num);
 
-   mmc = find_mmc_device(dev_num);
-   if (!mmc)
+   if (!mmc || mmc_init(mmc))
return NULL;
-
return ums_disk_init(mmc);
 }
-- 
1.9.0

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[U-Boot] [PATCH v5 12/12] arm: goni: enable USB Mass Storage

UMS-related defines were added to Samsung Goni config header.

Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes since v1:
- reordered
---
 include/configs/s5p_goni.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index c52a00a..f551c22 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -267,5 +267,7 @@
 #define CONFIG_USB_GADGET_S3C_UDC_OTG
 #define CONFIG_USB_GADGET_DUALSPEED
 #define CONFIG_USB_GADGET_VBUS_DRAW 2
+#define CONFIG_CMD_USB_MASS_STORAGE
+#define CONFIG_USB_GADGET_MASS_STORAGE
 
 #endif /* __CONFIG_H */
-- 
1.9.0

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[U-Boot] [PATCH v5 04/12] dfu: mmc: raw data write fix

When user attempted to perform a raw write using DFU (vide
dfu_fill_entity_mmc) with MMC interface not initialized before,
get_mmc_blk_size() reported invalid (zero) block size - it wasn't
possible to write ie. a new u-boot image.

This commit fixes that by initializing MMC device before use in
dfu_fill_entity_mmc().

While fixing initialization sequence, I had to change about half of
dfu_fill_entity_mmc's body, so I refactored it on the way to make it,
IMHO, considerably more comprehensible.

Being left as dead code, get_mmc_blk_size() was removed.

Tested on Samsung Goni.

Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Acked-by: Lukasz Majewski l.majew...@samsung.com
Acked-by: Tom Rini tr...@ti.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes since v4:
- added more detailed commit message
- converted to C90-style
- split into two patches: write fix and offset interpretation change
---
 drivers/dfu/dfu_mmc.c | 105 +++---
 include/dfu.h |   5 ---
 2 files changed, 65 insertions(+), 45 deletions(-)

diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
index 651cfff..b41785d 100644
--- a/drivers/dfu/dfu_mmc.c
+++ b/drivers/dfu/dfu_mmc.c
@@ -184,66 +184,91 @@ int dfu_read_medium_mmc(struct dfu_entity *dfu, u64 
offset, void *buf,
return ret;
 }
 
+/*
+ * @param s Parameter string containing space-separated arguments:
+ * 1st:
+ * raw (raw read/write)
+ * fat (files)
+ * ext4(^)
+ * part(partition image)
+ * 2nd and 3rd:
+ * lba_start and lba_size, for raw write
+ * mmc_dev and mmc_part, for filesystems and part
+ */
 int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *s)
 {
-   int dev, part;
-   struct mmc *mmc;
-   block_dev_desc_t *blk_dev;
-   disk_partition_t partinfo;
-   char *st;
+   const char *entity_type;
+   size_t second_arg;
+   size_t third_arg;
 
-   dfu-dev_type = DFU_DEV_MMC;
-   st = strsep(s,  );
-   if (!strcmp(st, mmc)) {
-   dfu-layout = DFU_RAW_ADDR;
-   dfu-data.mmc.lba_start = simple_strtoul(s, s, 16);
-   dfu-data.mmc.lba_size = simple_strtoul(++s, s, 16);
-   dfu-data.mmc.lba_blk_size = get_mmc_blk_size(dfu-dev_num);
-   } else if (!strcmp(st, fat)) {
-   dfu-layout = DFU_FS_FAT;
-   } else if (!strcmp(st, ext4)) {
-   dfu-layout = DFU_FS_EXT4;
-   } else if (!strcmp(st, part)) {
-
-   dfu-layout = DFU_RAW_ADDR;
+   struct mmc *mmc;
 
-   dev = simple_strtoul(s, s, 10);
-   s++;
-   part = simple_strtoul(s, s, 10);
+   const char *argv[3];
+   const char **parg = argv;
 
-   mmc = find_mmc_device(dev);
-   if (mmc == NULL || mmc_init(mmc)) {
-   printf(%s: could not find mmc device #%d!\n,
-  __func__, dev);
+   for (; parg  argv + sizeof(argv) / sizeof(*argv); ++parg) {
+   *parg = strsep(s,  );
+   if (*parg == NULL) {
+   error(Invalid number of arguments.\n);
return -ENODEV;
}
+   }
 
-   blk_dev = mmc-block_dev;
-   if (get_partition_info(blk_dev, part, partinfo) != 0) {
-   printf(%s: could not find partition #%d on mmc device 
#%d!\n,
-  __func__, part, dev);
+   entity_type = argv[0];
+   second_arg = simple_strtoul(argv[1], NULL, 16);
+   third_arg = simple_strtoul(argv[2], NULL, 16);
+
+   mmc = find_mmc_device(dfu-dev_num);
+   if (mmc == NULL) {
+   error(Couldn't find MMC device no. %d.\n, dfu-dev_num);
+   return -ENODEV;
+   }
+
+   if (mmc_init(mmc)) {
+   error(Couldn't init MMC device.\n);
+   return -ENODEV;
+   }
+
+   if (!strcmp(entity_type, raw)) {
+   dfu-layout = DFU_RAW_ADDR;
+   dfu-data.mmc.lba_start = second_arg;
+   dfu-data.mmc.lba_size  = third_arg;
+   dfu-data.mmc.lba_blk_size  = mmc-read_bl_len;
+   } else if (!strcmp(entity_type, part)) {
+   disk_partition_t partinfo;
+   block_dev_desc_t *blk_dev = mmc-block_dev;
+   int mmcdev = second_arg;
+   int mmcpart = third_arg;
+
+   if (get_partition_info(blk_dev, mmcpart, partinfo) != 0) {
+   error(Couldn't find part #%d on mmc device #%d\n,
+ mmcpart, mmcdev);
return -ENODEV;
}
 
-   dfu-data.mmc.lba_start = partinfo.start;
-   dfu-data.mmc.lba_size = partinfo.size;
-   dfu-data.mmc.lba_blk_size =

[U-Boot] [PATCH v5 05/12] dfu: mmc: change offset base handling

Previously offsets handled by dfu_fill_entity_mmc(), defined in boards'
CONFIG_DFU_ALT were treated as hexadecimal regardless of their prefix,
which sometimes led to confusion. This patch forces usage of explicit
numerical base prefixes.

Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Tom Rini tr...@ti.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Introduced in v5.
---
 drivers/dfu/dfu_mmc.c| 8 ++--
 include/configs/am335x_evm.h | 8 
 include/configs/trats.h  | 2 +-
 include/configs/trats2.h | 2 +-
 4 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
index b41785d..5e10ea7 100644
--- a/drivers/dfu/dfu_mmc.c
+++ b/drivers/dfu/dfu_mmc.c
@@ -215,8 +215,12 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *s)
}
 
entity_type = argv[0];
-   second_arg = simple_strtoul(argv[1], NULL, 16);
-   third_arg = simple_strtoul(argv[2], NULL, 16);
+   /*
+* Base 0 means we'll accept (prefixed with 0x or 0) base 16, 8,
+* with default 10.
+*/
+   second_arg = simple_strtoul(argv[1], NULL, 0);
+   third_arg = simple_strtoul(argv[2], NULL, 0);
 
mmc = find_mmc_device(dfu-dev_num);
if (mmc == NULL) {
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index ea9e758..4147f9f 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -320,10 +320,10 @@
boot part 0 1; \
rootfs part 0 2; \
MLO fat 0 1; \
-   MLO.raw mmc 100 100; \
-   u-boot.img.raw mmc 300 400; \
-   spl-os-args.raw mmc 80 80; \
-   spl-os-image.raw mmc 900 2000; \
+   MLO.raw mmc 0x100 0x100; \
+   u-boot.img.raw mmc 0x300 0x400; \
+   spl-os-args.raw mmc 0x80 0x80; \
+   spl-os-image.raw mmc 0x900 0x2000; \
spl-os-args fat 0 1; \
spl-os-image fat 0 1; \
u-boot.img fat 0 1; \
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 5d8bd60..8461343 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -101,7 +101,7 @@
name=PARTS_UMS,size=-,uuid=${uuid_gpt_PARTS_UMS}\0 \
 
 #define CONFIG_DFU_ALT \
-   u-boot mmc 80 400; \
+   u-boot raw 0x80 0x400; \
uImage ext4 0 2; \
modem.bin ext4 0 2; \
exynos4210-trats.dtb ext4 0 2; \
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index 53d449c..03e88ee 100644
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -91,7 +91,7 @@
name=PARTS_UMS,size=-,uuid=${uuid_gpt_PARTS_UMS}\0 \
 
 #define CONFIG_DFU_ALT \
-   u-boot mmc 80 800; \
+   u-boot raw 0x80 0x800; \
uImage ext4 0 2; \
modem.bin ext4 0 2; \
exynos4412-trats2.dtb ext4 0 2; \
-- 
1.9.0

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[U-Boot] [PATCH v5 07/12] am335x: dfu: disable DFU in am335x_evm SPL build

Future patches will make DFU too large to fit in this board's SPL build.

Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Acked-by: Tom Rini tr...@ti.com
Reviewed-by: Lukasz Majewski l.majew...@samsung.com
---
Changes since v2:
- none
---
 include/configs/am335x_evm.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 4147f9f..670e3f1 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -312,6 +312,7 @@
 #endif
 
 /* USB Device Firmware Update support */
+#ifndef CONFIG_SPL_BUILD
 #define CONFIG_DFU_FUNCTION
 #define CONFIG_DFU_MMC
 #define CONFIG_CMD_DFU
@@ -354,6 +355,7 @@
DFU_ALT_INFO_MMC \
DFU_ALT_INFO_RAM \
DFU_ALT_INFO_NAND
+#endif
 
 /*
  * Default to using SPI for environment, etc.
-- 
1.9.0

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[U-Boot] [PATCH v5 10/12] arm: goni: dfu: Add support for DFU to Goni target

Proper adjustment for supporting DFU at GONI target has been made.
The s5p_goni.h file has been updated. Moreover the code for low level
USB initialization has been added to GONI board code.

The malloc pool has been enlarged in order to support larger buffer
sizes needed by DFU implementation.

Signed-off-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Tested-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Tested-by: Mateusz Zalega m.zal...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes since v1:
- reordered
---
 board/samsung/goni/goni.c  |  8 +++
 include/configs/s5p_goni.h | 54 --
 2 files changed, 51 insertions(+), 11 deletions(-)

diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index 61b9ece..273fa42 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -14,6 +14,8 @@
 #include asm/arch/cpu.h
 #include power/max8998_pmic.h
 #include samsung/misc.h
+#include usb.h
+#include usb_mass_storage.h
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -179,6 +181,12 @@ struct s3c_plat_otg_data s5pc110_otg_data = {
.regs_otg = S5PC110_OTG_BASE,
.usb_phy_ctrl = S5PC110_USB_PHY_CONTROL,
 };
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+   debug(USB_udc_probe\n);
+   return s3c_udc_probe(s5pc110_otg_data);
+}
 #endif
 
 #ifdef CONFIG_MISC_INIT_R
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index b9b66c7..f97b52d 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -40,7 +40,7 @@
 #define CONFIG_CMDLINE_EDITING
 
 /* Size of malloc() pool.*/
-#define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + SZ_1M)
+#define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + 80 * SZ_1M)
 
 /*
  * select serial console configuration
@@ -71,14 +71,18 @@
 #define CONFIG_CMD_CACHE
 #define CONFIG_CMD_REGINFO
 #define CONFIG_CMD_ONENAND
-#define CONFIG_CMD_MTDPARTS
 #define CONFIG_CMD_MMC
+#define CONFIG_CMD_DFU
 
-#define CONFIG_BOOTDELAY   1
-#define CONFIG_ZERO_BOOTDELAY_CHECK
+/* USB Composite download gadget - g_dnl */
+#define CONFIG_USBDOWNLOAD_GADGET
+#define CONFIG_DFU_FUNCTION
+#define CONFIG_DFU_MMC
 
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
+/* USB Samsung's IDs */
+#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
+#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
+#define CONFIG_G_DNL_MANUFACTURER Samsung
 
 /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
 #define MTDIDS_DEFAULT onenand0=samsung-onenand
@@ -91,7 +95,34 @@
,12m(modem)\
,60m(qboot)\0
 
-#define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
+#define CONFIG_BOOTDELAY   1
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+/* partitions definitions */
+#define PARTS_CSA  csa-mmc
+#define PARTS_BOOTLOADER   u-boot
+#define PARTS_BOOT boot
+#define PARTS_ROOT platform
+#define PARTS_DATA data
+#define PARTS_CSC  csc
+#define PARTS_UMS  ums
+
+#define CONFIG_DFU_ALT \
+   u-boot raw 0x80 0x400; \
+   uImage ext4 0 2; \
+   exynos3-goni.dtb ext4 0 2; \
+   PARTS_ROOT part 0 5\0
+
+#define PARTS_DEFAULT \
+   uuid_disk=${uuid_gpt_disk}; \
+   name=PARTS_CSA,size=8MiB,uuid=${uuid_gpt_PARTS_CSA}; \
+   name=PARTS_BOOTLOADER,size=60MiB, \
+   uuid=${uuid_gpt_PARTS_BOOTLOADER}; \
+   name=PARTS_BOOT,size=100MiB,uuid=${uuid_gpt_PARTS_BOOT}; \
+   name=PARTS_ROOT,size=1GiB,uuid=${uuid_gpt_PARTS_ROOT}; \
+   name=PARTS_DATA,size=3GiB,uuid=${uuid_gpt_PARTS_DATA}; \
+   name=PARTS_CSC,size=150MiB,uuid=${uuid_gpt_PARTS_CSC}; \
+   name=PARTS_UMS,size=-,uuid=${uuid_gpt_PARTS_UMS}\0 \
 
 #define CONFIG_BOOTCOMMAND run mmcboot
 
@@ -150,18 +181,18 @@
verify=n\0 \
rootfstype=ext4\0 \
console= CONFIG_DEFAULT_CONSOLE \
-   mtdparts= MTDPARTS_DEFAULT \
meminfo=mem=80M mem=256M@0x4000 mem=128M@0x5000\0 \
-   loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x30007FC0 uImage\0 \
+   loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x30007FC0 uImage\0 \
mmcdev=0\0 \
mmcbootpart=2\0 \
mmcrootpart=5\0 \
+   partitions= PARTS_DEFAULT \
bootblock=9\0 \
ubiblock=8\0 \
ubi=enabled\0 \
-   opts=always_resume=1
+   opts=always_resume=1\0 \
+   dfu_alt_info= CONFIG_DFU_ALT \0
 
-/* Miscellaneous configurable options */
 #define CONFIG_SYS_LONGHELP/* undef to save memory */
 #define CONFIG_SYS_HUSH_PARSER /* use hush command parser*/
 #define CONFIG_SYS_PROMPT  Goni # 
@@ -200,6 +231,7 @@
 
 #define CONFIG_CMD_FAT
 #define CONFIG_CMD_EXT4
+#define CONFIG_CMD_EXT4_WRITE
 
 /* write support for

[U-Boot] [PATCH] net/designware: call phy_connect_dev() to properly setup phylib device

This sets up the linkage from the phydev back to the ethernet device. This
symptom of not doing this which I noticed was:
NULL Waiting for PHY auto negotiation to complete
rather than:
dwmac.1c5 Waiting for PHY auto negotiation to complete

Signed-off-by: Ian Campbell i...@hellion.org.uk
Cc: Alexey Brodkin alexey.brod...@synopsys.com
---
 drivers/net/designware.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index c9afe16..b8a7631 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -390,6 +390,8 @@ static int dw_phy_init(struct eth_device *dev)
if (!phydev)
return -1;
 
+   phy_connect_dev(phydev, dev);
+
phydev-supported = PHY_GBIT_FEATURES;
phydev-advertising = phydev-supported;
 
-- 
1.9.0

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Re: [U-Boot] [PATCH 2/3] net/designware: invalidate entire descriptor in dw_eth_send

On Mon, 2014-04-28 at 12:05 +, Alexey Brodkin wrote:

 And in this situation IMHO the only safe solution could be in proper
 design of data layout. In other words we need to keep independent data
 blocks aligned to cache line.
 
 And as you may see from designware.h buffer descriptor structure is
 aligned:

There's no point in taking all this care if you then go and flush
subfields, as the driver does, since they are not necessarily going to
have the required alignment. That was the entire point of this patch!

I'm going to do the roundup thing you asked for, even though it seems
like a pointless optimisation to me given the context.

 ==
 struct dmamacdescr {
   u32 txrx_status;
   u32 dmamac_cntl;
   void *dmamac_addr;
   struct dmamacdescr *dmamac_next;
 } __aligned(ARCH_DMA_MINALIGN);
 ==
 
 Regards,
 Alexey
 
 
 


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[U-Boot] [PATCH v2 1/2] net/designware: ensure device private data is DMA aligned.

struct dw_eth_dev contains fields which are accessed via DMA, so make sure it
is aligned to a dma boundary. Without this I see:
ERROR: v7_dcache_inval_range - start address is not aligned - 0x7fb677e0

Signed-off-by: Ian Campbell i...@hellion.org.uk
Reviewed-by: Alexey Brodkin abrod...@synopsys.com
Acked-by: Marek Vasut ma...@denx.de
---
v2: Sign of with my own mail not my work mail. I made these changes on my
own time, but a .gitconfig vcsh mismerge caused git commit -s to use the
wrong thing. (I wondered why everyone was CCing me at work...)
---
 drivers/net/designware.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 9824b42..b70df82 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -414,7 +414,8 @@ int designware_initialize(ulong base_addr, u32 interface)
 * Since the priv structure contains the descriptors which need a strict
 * buswidth alignment, memalign is used to allocate memory
 */
-   priv = (struct dw_eth_dev *) memalign(16, sizeof(struct dw_eth_dev));
+   priv = (struct dw_eth_dev *) memalign(ARCH_DMA_MINALIGN,
+ sizeof(struct dw_eth_dev));
if (!priv) {
free(dev);
return -ENOMEM;
-- 
1.9.0

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[U-Boot] [PATCH v2 2/2] net/designware: ensure cache invalidations are aligned to ARCH_DMA_MINALIGN

This is required at least on ARM.

When sending instead of simply invalidating the entire descriptor, flush
as little as possible while still respecting ARCH_DMA_MINALIGN, as
requested by Alexey.

Signed-off-by: Ian Campbell i...@hellion.org.uk
Cc: Alexey Brodkin abrod...@synopsys.com
---
v2: - collapsed net/designware: align cache invalidation on rx and
  net/designware: invalidate entire descriptor in dw_eth_send into
  one.
- roundup sizeof(txrx_status) to ARCH_DMA_MINALIGN instead of just
  invalidating the entire descriptor.
---
 drivers/net/designware.c | 18 +-
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index b70df82..02ceb91 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -280,10 +280,18 @@ static int dw_eth_send(struct eth_device *dev, void 
*packet, int length)
u32 desc_num = priv-tx_currdescnum;
struct dmamacdescr *desc_p = priv-tx_mac_descrtable[desc_num];
 
-   /* Invalidate only status field for the following check */
-   invalidate_dcache_range((unsigned long)desc_p-txrx_status,
-   (unsigned long)desc_p-txrx_status +
-   sizeof(desc_p-txrx_status));
+   /*
+* Strictly we only need to invalidate the txrx_status field
+* for the following check, but on some platforms we cannot
+* invalidate only 4 bytes, so roundup to
+* ARCH_DMA_MINALIGN. This is safe because the individual
+* descriptors in the array are each aligned to
+* ARCH_DMA_MINALIGN.
+*/
+   invalidate_dcache_range(
+   (unsigned long)desc_p,
+   (unsigned long)desc_p +
+   roundup(sizeof(desc_p-txrx_status), ARCH_DMA_MINALIGN));
 
/* Check if the descriptor is owned by CPU */
if (desc_p-txrx_status  DESC_TXSTS_OWNBYDMA) {
@@ -351,7 +359,7 @@ static int dw_eth_recv(struct eth_device *dev)
/* Invalidate received data */
invalidate_dcache_range((unsigned long)desc_p-dmamac_addr,
(unsigned long)desc_p-dmamac_addr +
-   length);
+   roundup(length, ARCH_DMA_MINALIGN));
 
NetReceive(desc_p-dmamac_addr, length);
 
-- 
1.9.0

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Re: [U-Boot] [linux-sunxi] Uboot error: address not aligned in v7_dcache_inval_range

On Sat, 2014-04-26 at 20:27 +0200, Marek Vasut wrote:
 On Saturday, April 19, 2014 at 03:30:14 PM, Ian Campbell wrote:
  On Sun, 2014-04-13 at 23:45 -0400, Shixin Zeng wrote:
   Hi,
   
   I compiled the current u-boot from
   https://github.com/jwrdegoede/u-boot-sunxi.git for cubieboard2, and
   wrote it to the SD card. I was trying to boot the kernel on my
   computer over network by tftp, however it failed when I ran dhcp or
   tftp command in uboot with a tons of:
   
   
   ERROR: v7_dcache_inval_range - start address is not aligned - 0x7fb677e0
   ERROR: v7_dcache_inval_range - stop address is not aligned - 0x7fb67820
  
  I'm seeing this on Cubieboard2 and Cubietruck. It appears to be down to
  a change to the upstream designware driver:
  
  commit 50b0df814b0f75c08a3d45a017016a75af3edb5d
  Author: Alexey Brodkin alexey.brod...@synopsys.com
  Date:   Wed Jan 22 20:49:09 2014 +0400
  
  net/designware: make driver compatible with data cache
  
  Up until now this driver only worked with data cache disabled.
  To make it work with enabled data cache following changes were
  required:
  
   * Flush Tx/Rx buffer descriptors their modification
   * Invalidate Tx/Rx buffer descriptors before reading its values
   * Flush cache for data passed from CPU to GMAC
   * Invalidate cache for data passed from GMAC to CPU
  
  http://git.denx.de/?p=u-boot.git;a=commit;h=50b0df814b0f75c08a3d45a017016a7
  5af3edb5d
  
  I suppose this was only tested on some architecture which allows DMA
  flush/invaidation at a fairly fine granularity (at least down to 4 byte
  boundaries)
 
 This was a sheer luck this ever worked. Looking at the entire driver, to fix 
 all 
 your issues with DMA and caches, it would be sufficient to re-align struct 
 dw_eth_dev properly.
 
 See drivers/net/designware.h:
 1) struct dmamacdescr {} is already __aligned(ARCH_DMA_MINALIGN)
= This structure, if aligned in memory to proper boundary, can be flushed/
   invalidated without problems.
 2) struct dw_eth_dev {} can be aligned to ANY 4-byte boundary
But this structure contains two arrays of struct dmamacdescr {} , which 
 each
have their elements' lenght aligned to ARCH_DMA_MINALIGN
 
 Solution:
 
 Your patch [1/3] and reorder the structure in designware.h so that the
 struct dmamacdescr tx_mac_descrtable[]
 struct dmamacdescr rx_mac_descrtable[]
 are first and anything that does not need to be aligned follows. This way, 
 the 
 DMA descriptors will always be aligned and you need not worry about the 
 flushes. 
 You don't even need to ROUNDUP their length, since they are already fine.

Unfortunately this isn't sufficient, at least a change in the spirit of
my second patch (to flush the entire descriptor) is also needed, because
flushing just a subfield misaligns things again.

And my patch 3/3 is still needed because it deals with the data itself
and not the descriptors.

So having done all that it doesn't seem that reordering dw_eth_dev is
necessary.

Ian.


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[U-Boot] [PATCH 00/12] MX6: SPL NAND support

This series adds some necessary framework for IMX6 SPL support. The series
includes support for NAND SPL and has been tested with MMC as well. I have
tested this on five differing Ventana baseboards with a variety of memory
(32bit 512MB, 32bit 1024MB, 64bit 1024MB) and CPU configurations (IMX6Q,
IMX6DL, IMX6S).

v2:
 - use compatible linker script instead of creating new one
 - remove structure passing data from SPL to u-boot
 - remove dependence on mtdpart, mtdcore, nand_util, nand_ecc, nand_base
   and nand_bbt to bring SPL down in size. This reduced codesize by about 32k
   where now mxs_spl_nand is about 12k total
 - adjust CONFIG_SPL_TEXT_BASE, CONFIG_SPL_STACK and CONFIG_SPL_MAX_SIZE
   to accomodate the IMX6SOLO/DUALLITE which have half the iRAM of the
   IMX6DUAL/IMX6QUAD
 - move boot dev detection into imx-common/spl.c
 - move macros for using pinmux array into iomux-v3.h
 - remove missing/unnecessary include
 - revert mtdparts change
 - use get_ram_size() to detect memory
 - add support for MX6SOLO and MX6DUAL
 - set CS0_END for 4GB so get_ram_size() works
 - updated DDR3 calibration values for ventana boards
 - fixed build issue - only compile spl if doing spl build
 - fixed line length issue in README
 - remove CONFIG_SPL* conditions and conditionally compile instead
 - removed prints for CPU type and DRAM size/width - uboot will print these l
 - removed unused gw_ventana_spl.cfg
 - use common read_eeprom function
 - added MMC support to SPL
 - added Masahiro Yamada's boot mode consolidation patch
   http://patchwork.ozlabs.org/patch/341817 and rebase on top of it

Masahiro Yamada (1):
  spl: consolidate arch/arm/include/asm/arch-*/spl.h

Tim Harvey (11):
  SPL: NAND: remove CONFIG_SYS_NAND_PAGE_SIZE
  SPL: NAND: add support for mxs nand
  MX6: add common SPL configuration
  MX6: add boot device support for SPL
  IMX: add comments and remove unused struct fields
  MX6: add structs for mmdc and ddr iomux registers
  MX6: add mmdc configuration for MX6Q/MX6DL
  IMX: add additional function for pinmux using an array
  imx: ventana: split read_eeprom into standalone file
  imx: ventana: auto-configure for IMX6Q vs IMX6DL
  imx: ventana: switch to SPL

 arch/arm/cpu/arm720t/tegra-common/spl.c |   2 +-
 arch/arm/cpu/armv7/mx6/Makefile |   1 +
 arch/arm/cpu/armv7/mx6/ddr.c| 469 ++
 arch/arm/imx-common/Makefile|   1 +
 arch/arm/imx-common/cpu.c   |  16 +-
 arch/arm/imx-common/iomux-v3.c  |  19 +-
 arch/arm/imx-common/spl.c   |  79 
 arch/arm/include/asm/arch-at91/spl.h|  24 --
 arch/arm/include/asm/arch-davinci/spl.h |  16 -
 arch/arm/include/asm/arch-mx35/spl.h|  22 --
 arch/arm/include/asm/arch-mx5/spl.h |  13 -
 arch/arm/include/asm/arch-mx6/mx6-ddr.h | 231 +++
 arch/arm/include/asm/arch-tegra114/spl.h|  22 --
 arch/arm/include/asm/arch-tegra124/spl.h|  13 -
 arch/arm/include/asm/arch-tegra20/spl.h |  12 -
 arch/arm/include/asm/arch-tegra30/spl.h |  12 -
 arch/arm/include/asm/imx-common/iomux-v3.h  |  15 +
 arch/arm/include/asm/spl.h  |  20 +
 board/denx/m53evk/m53evk.c  |   2 +-
 board/gateworks/gw_ventana/Makefile |   3 +-
 board/gateworks/gw_ventana/README   |  92 +++--
 board/gateworks/gw_ventana/eeprom.c |  89 +
 board/gateworks/gw_ventana/gw_ventana.c | 591 +++-
 board/gateworks/gw_ventana/gw_ventana.cfg   |  15 -
 board/gateworks/gw_ventana/gw_ventana_spl.c | 407 +++
 board/gateworks/gw_ventana/ventana_eeprom.h |  11 +
 boards.cfg  |   6 +-
 common/spl/spl_nand.c   |   2 +-
 drivers/mtd/nand/Makefile   |   1 +
 drivers/mtd/nand/mxs_nand_spl.c | 239 +++
 include/configs/gw_ventana.h|  11 +
 include/configs/imx6_spl.h  |  71 
 32 files changed, 2050 insertions(+), 477 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/mx6/ddr.c
 create mode 100644 arch/arm/imx-common/spl.c
 delete mode 100644 arch/arm/include/asm/arch-at91/spl.h
 delete mode 100644 arch/arm/include/asm/arch-davinci/spl.h
 delete mode 100644 arch/arm/include/asm/arch-mx35/spl.h
 delete mode 100644 arch/arm/include/asm/arch-mx5/spl.h
 delete mode 100644 arch/arm/include/asm/arch-tegra114/spl.h
 delete mode 100644 arch/arm/include/asm/arch-tegra124/spl.h
 delete mode 100644 arch/arm/include/asm/arch-tegra20/spl.h
 delete mode 100644 arch/arm/include/asm/arch-tegra30/spl.h
 create mode 100644 board/gateworks/gw_ventana/eeprom.c
 create mode 100644 board/gateworks/gw_ventana/gw_ventana_spl.c
 create mode 100644 drivers/mtd/nand/mxs_nand_spl.c
 create mode 100644 include/configs/imx6_spl.h

-- 
1.8.3.2

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[U-Boot] [PATCH 01/12] SPL: NAND: remove CONFIG_SYS_NAND_PAGE_SIZE

We only need to read in the size of struct image_header and thus don't
need to know the page size of the nand device.

Cc: Scott Wood scottw...@freescale.com
Signed-off-by: Tim Harvey thar...@gateworks.com
Acked-by: Stefano Babic sba...@denx.de
Acked-by: Scott Wood scottw...@freescale.com
---
v2:
 - cc Scott Wood scottw...@freescale.com on this
 - Acked-by: Stefano Babic sba...@denx.de
 - Acked-by: Scott Wood scottw...@freescale.com
---
 common/spl/spl_nand.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index 9da0218..062461b 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -76,7 +76,7 @@ void spl_nand_load_image(void)
 #endif
/* Load u-boot */
nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
-   CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+   sizeof(*header), (void *)header);
spl_parse_image_header(header);
nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
spl_image.size, (void *)spl_image.load_addr);
-- 
1.8.3.2

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[U-Boot] [PATCH 03/12] MX6: add common SPL configuration

Add a common header which can hopefully be shared amon imx6 SPL users

Signed-off-by: Tim Harvey thar...@gateworks.com
---
v2:
- adjust CONFIG_SPL_TEXT_BASE, CONFIG_SPL_STACK and CONFIG_SPL_MAX_SIZE
  to accomodate the IMX6SOLO/DUALLITE which have half the iRAM of the
  IMX6DUAL/IMX6QUAD
---
 include/configs/imx6_spl.h | 71 ++
 1 file changed, 71 insertions(+)
 create mode 100644 include/configs/imx6_spl.h

diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h
new file mode 100644
index 000..20078cc
--- /dev/null
+++ b/include/configs/imx6_spl.h
@@ -0,0 +1,71 @@
+/*
+ * Copyright (C) 2014 Gateworks Corporation
+ * Author: Tim Harvey thar...@gateworks.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#ifndef __IMX6_SPL_CONFIG_H
+#define __IMX6_SPL_CONFIG_H
+
+#ifdef CONFIG_SPL
+
+#define CONFIG_SPL_FRAMEWORK
+
+/*
+ * see Figure 8-3 in IMX6DQ/IMX6SDL Reference manuals:
+ *  - IMX6 OCRAM (IRAM) is from 0x00907000 to 0x0091 (IMX6SLD)
+ *  - IMX6DQ has 2x IRAM of IMX6SLD but we intend to support IMX6SLD as well
+ *  - BOOT ROM stack is at 0x0091FFB8
+ *  - if icache/dcache is enabled (eFuse/strapping controlled) then the
+ *IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to
+ *fit between 0x00907000 and 0x00918000.
+ *  - Additionally the BOOT ROM loads what they consider the firmware image
+ *which consists of a 4K header in front of us that contains the IVT, DCD
+ *and some padding thus 'our' max size is really 0x00908000 - 0x00918000
+ *or 64KB
+ */
+#define CONFIG_SPL_LDSCRIPTarch/arm/cpu/armv7/omap-common/u-boot-spl.lds
+#define CONFIG_SPL_TEXT_BASE   0x00908000
+#define CONFIG_SPL_MAX_SIZE(64 * 1024)
+#define CONFIG_SPL_START_S_PATHarch/arm/cpu/armv7
+#define CONFIG_SPL_STACK   0x0091FFB8
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_GPIO_SUPPORT
+
+/* NAND support */
+#if defined(CONFIG_SPL_NAND_SUPPORT)
+#define CONFIG_SPL_NAND_MXS
+#define CONFIG_SPL_DMA_SUPPORT
+#endif
+
+/* MMC support */
+#if defined(CONFIG_SPL_MMC_SUPPORT)
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR138 /* offset 69KB */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION   1
+#define CONFIG_SYS_MONITOR_LEN  (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS/2*1024)
+#endif
+
+/* SATA support */
+#if defined(CONFIG_SPL_SATA_SUPPORT)
+#define CONFIG_SPL_SATA_BOOT_DEVICE0
+#define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1
+#endif
+
+/* Define the payload for FAT/EXT support */
+#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME  u-boot.img
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#endif
+
+#define CONFIG_SPL_BSS_START_ADDR  0x1820
+#define CONFIG_SPL_BSS_MAX_SIZE0x10/* 1 MB */
+#define CONFIG_SYS_SPL_MALLOC_START0x1830
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x320   /* 50 MB */
+#define CONFIG_SYS_TEXT_BASE   0x1780
+#endif
+
+#endif
-- 
1.8.3.2

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[U-Boot] [PATCH 02/12] SPL: NAND: add support for mxs nand

This utilizes existing mxs_nand support layer to provide a method to load an
image off nand for SPL. The flash device will be detected in order to support
multiple flash devices instead of having layout hard coded at build time.

Cc: Scott Wood scottw...@freescale.com
Signed-off-by: Tim Harvey thar...@gateworks.com
---
v2:
- remove dependence on mtdpart, mtdcore, nand_util, nand_ecc, nand_base
  and nand_bbt to bring SPL down in size. This reduced codesize by about 32k
  where now mxs_spl_nand is about 12k total.
---
 drivers/mtd/nand/Makefile   |   1 +
 drivers/mtd/nand/mxs_nand_spl.c | 239 
 2 files changed, 240 insertions(+)
 create mode 100644 drivers/mtd/nand/mxs_nand_spl.c

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 02b149c..de5b461 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -65,5 +65,6 @@ else  # minimal SPL drivers
 obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
 obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
 obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
+obj-$(CONFIG_NAND_MXS) += mxs_nand_spl.o mxs_nand.o
 
 endif # drivers
diff --git a/drivers/mtd/nand/mxs_nand_spl.c b/drivers/mtd/nand/mxs_nand_spl.c
new file mode 100644
index 000..82491a4
--- /dev/null
+++ b/drivers/mtd/nand/mxs_nand_spl.c
@@ -0,0 +1,239 @@
+/*
+ * Copyright (C) 2014 Gateworks Corporation
+ * Author: Tim Harvey thar...@gateworks.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include common.h
+#include nand.h
+#include malloc.h
+
+static nand_info_t mtd;
+static struct nand_chip nand_chip;
+
+static void mxs_nand_command(struct mtd_info *mtd, unsigned int command,
+int column, int page_addr)
+{
+   register struct nand_chip *chip = mtd-priv;
+   int ctrl = NAND_NCE | NAND_CTRL_CLE | NAND_CTRL_CHANGE;
+   u32 timeo, time_start;
+
+   /* write out the command to the device */
+   chip-cmd_ctrl(mtd, command, ctrl);
+
+   /* Address cycle, when necessary */
+   ctrl = NAND_NCE | NAND_CTRL_ALE | NAND_CTRL_CHANGE;
+   /* Serially input address */
+   if (column != -1) {
+   ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;
+   chip-cmd_ctrl(mtd, column, ctrl);
+   ctrl = ~NAND_CTRL_CHANGE;
+   chip-cmd_ctrl(mtd, column  8, ctrl);
+   }
+   if (page_addr != -1) {
+   chip-cmd_ctrl(mtd, page_addr, ctrl);
+   chip-cmd_ctrl(mtd, page_addr  8, NAND_NCE | NAND_ALE);
+   /* One more address cycle for devices  128MiB */
+   if (chip-chipsize  (128  20))
+   chip-cmd_ctrl(mtd, page_addr  16,
+  NAND_NCE | NAND_ALE);
+   }
+   chip-cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
+
+   if (command == NAND_CMD_READ0) {
+   chip-cmd_ctrl(mtd, NAND_CMD_READSTART,
+  NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
+   chip-cmd_ctrl(mtd, NAND_CMD_NONE,
+  NAND_NCE | NAND_CTRL_CHANGE);
+   }
+
+   /* wait for nand ready */
+   ndelay(100);
+   timeo = (CONFIG_SYS_HZ * 20) / 1000;
+   time_start = get_timer(0);
+   while (get_timer(time_start)  timeo) {
+   if (chip-dev_ready(mtd))
+   break;
+   }
+}
+
+static int mxs_flash_ident(struct mtd_info *mtd)
+{
+   register struct nand_chip *chip = mtd-priv;
+   int i;
+   u8 mfg_id, dev_id;
+   u8 id_data[8];
+   struct nand_onfi_params *p = chip-onfi_params;
+
+   /* Reset the chip */
+   chip-cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
+
+   /* Send the command for reading device ID */
+   chip-cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
+
+   /* Read manufacturer and device IDs */
+   mfg_id = chip-read_byte(mtd);
+   dev_id = chip-read_byte(mtd);
+
+   /* Try again to make sure */
+   chip-cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
+   for (i = 0; i  8; i++)
+   id_data[i] = chip-read_byte(mtd);
+   if (id_data[0] != mfg_id || id_data[1] != dev_id) {
+   printf(second ID read did not match);
+   return -1;
+   }
+   debug(0x%02x:0x%02x , mfg_id, dev_id);
+
+   /* read ONFI */
+   chip-onfi_version = 0;
+   chip-cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
+   if (chip-read_byte(mtd) != 'O' || chip-read_byte(mtd) != 'N' ||
+   chip-read_byte(mtd) != 'F' || chip-read_byte(mtd) != 'I') {
+   return -2;
+   }
+
+   /* we have ONFI, probe it */
+   chip-cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
+   chip-read_buf(mtd, (uint8_t *)p, sizeof(*p));
+   mtd-name = p-model;
+   mtd-writesize = le32_to_cpu(p-byte_per_page);
+   mtd-erasesize = le32_to_cpu(p-pages_per_block) * mtd-writesize;
+   mtd-oobsize = le16_to_cpu(p-spare_bytes_per_page);
+   chip-chipsize =

[U-Boot] [PATCH 07/12] MX6: add structs for mmdc and ddr iomux registers

Add memory-mapped structures for MMDC iomux and configuration. Note that while
the MMDC configuration registers are common between the IMX6DQ
(IMX6DUAL/IMX6QUAD) and IMX6SDL (IMX6SOLO/IMX6DUALLITE) types the iomux
registers differ. This requires two sets of structures.

Add structures to describe DDR3 device information, system information
(memory layout, etc), and MMDC calibration regitsers that can be used to
configure the MMDC dynamically.

We define these structures for SPL builds instead of including mx6q-ddr.h and
mx6dl-ddr.h which use the same namespace and are only useful for imximage cfg
files.

Signed-off-by: Tim Harvey thar...@gateworks.com
---
v2:
- split out from original mmdc configuration patch
- only define for SPL build
- do not include mx6q-ddr.h and mx6dl-ddr.h for SPL build - these use the
  same namespace and are only useful for imximage cfg files
---
 arch/arm/include/asm/arch-mx6/mx6-ddr.h | 231 
 1 file changed, 231 insertions(+)

diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h 
b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
index 43d377a..d544d2e 100644
--- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
+++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
@@ -6,6 +6,7 @@
 #ifndef __ASM_ARCH_MX6_DDR_H__
 #define __ASM_ARCH_MX6_DDR_H__
 
+#ifndef CONFIG_SPL_BUILD
 #ifdef CONFIG_MX6Q
 #include mx6q-ddr.h
 #else
@@ -15,6 +16,236 @@
 #error Please select cpu
 #endif /* CONFIG_MX6DL or CONFIG_MX6S */
 #endif /* CONFIG_MX6Q */
+#else
+
+/* MMDC P0/P1 Registers */
+struct mmdc_p_regs {
+   u32 mdctl;
+   u32 mdpdc;
+   u32 mdotc;
+   u32 mdcfg0;
+   u32 mdcfg1;
+   u32 mdcfg2;
+   u32 mdmisc;
+   u32 mdscr;
+   u32 mdref;
+   u32 res1[2];
+   u32 mdrwd;
+   u32 mdor;
+   u32 res2[3];
+   u32 mdasp;
+   u32 res3[240];
+   u32 mapsr;
+   u32 res4[254];
+   u32 mpzqhwctrl;
+   u32 res5[2];
+   u32 mpwldectrl0;
+   u32 mpwldectrl1;
+   u32 res6;
+   u32 mpodtctrl;
+   u32 mprddqby0dl;
+   u32 mprddqby1dl;
+   u32 mprddqby2dl;
+   u32 mprddqby3dl;
+   u32 res7[4];
+   u32 mpdgctrl0;
+   u32 mpdgctrl1;
+   u32 res8;
+   u32 mprddlctl;
+   u32 res9;
+   u32 mpwrdlctl;
+   u32 res10[25];
+   u32 mpmur0;
+};
+
+/*
+ * MMDC iomux registers (pinctl/padctl) - (different for IMX6DQ vs IMX6SDL)
+ */
+#define MX6DQ_IOM_DDR_BASE  0x020e0500
+struct mx6dq_iomux_ddr_regs {
+   u32 res1[3];
+   u32 dram_sdqs5;
+   u32 dram_dqm5;
+   u32 dram_dqm4;
+   u32 dram_sdqs4;
+   u32 dram_sdqs3;
+   u32 dram_dqm3;
+   u32 dram_sdqs2;
+   u32 dram_dqm2;
+   u32 res2[16];
+   u32 dram_cas;
+   u32 res3[2];
+   u32 dram_ras;
+   u32 dram_reset;
+   u32 res4[2];
+   u32 dram_sdclk_0;
+   u32 dram_sdba2;
+   u32 dram_sdcke0;
+   u32 dram_sdclk_1;
+   u32 dram_sdcke1;
+   u32 dram_sdodt0;
+   u32 dram_sdodt1;
+   u32 res5;
+   u32 dram_sdqs0;
+   u32 dram_dqm0;
+   u32 dram_sdqs1;
+   u32 dram_dqm1;
+   u32 dram_sdqs6;
+   u32 dram_dqm6;
+   u32 dram_sdqs7;
+   u32 dram_dqm7;
+};
+
+#define MX6DQ_IOM_GRP_BASE  0x020e0700
+struct mx6dq_iomux_grp_regs {
+   u32 res1[18];
+   u32 grp_b7ds;
+   u32 grp_addds;
+   u32 grp_ddrmode_ctl;
+   u32 res2;
+   u32 grp_ddrpke;
+   u32 res3[6];
+   u32 grp_ddrmode;
+   u32 res4[3];
+   u32 grp_b0ds;
+   u32 grp_b1ds;
+   u32 grp_ctlds;
+   u32 res5;
+   u32 grp_b2ds;
+   u32 grp_ddr_type;
+   u32 grp_b3ds;
+   u32 grp_b4ds;
+   u32 grp_b5ds;
+   u32 grp_b6ds;
+};
+
+#define MX6SDL_IOM_DDR_BASE 0x020e0400
+struct mx6sdl_iomux_ddr_regs {
+   u32 res1[25];
+   u32 dram_cas;
+   u32 res2[2];
+   u32 dram_dqm0;
+   u32 dram_dqm1;
+   u32 dram_dqm2;
+   u32 dram_dqm3;
+   u32 dram_dqm4;
+   u32 dram_dqm5;
+   u32 dram_dqm6;
+   u32 dram_dqm7;
+   u32 dram_ras;
+   u32 dram_reset;
+   u32 res3[2];
+   u32 dram_sdba2;
+   u32 dram_sdcke0;
+   u32 dram_sdcke1;
+   u32 dram_sdclk_0;
+   u32 dram_sdclk_1;
+   u32 dram_sdodt0;
+   u32 dram_sdodt1;
+   u32 dram_sdqs0;
+   u32 dram_sdqs1;
+   u32 dram_sdqs2;
+   u32 dram_sdqs3;
+   u32 dram_sdqs4;
+   u32 dram_sdqs5;
+   u32 dram_sdqs6;
+   u32 dram_sdqs7;
+};
+
+#define MX6SDL_IOM_GRP_BASE 0x020e0700
+struct mx6sdl_iomux_grp_regs {
+   u32 res1[18];
+   u32 grp_b7ds;
+   u32 grp_addds;
+   u32 grp_ddrmode_ctl;
+   u32 grp_ddrpke;
+   u32 res2[2];
+   u32 grp_ddrmode;
+   u32 grp_b0ds;
+   u32 res3;
+   u32 grp_ctlds;
+   u32 grp_b1ds;
+   u32 grp_ddr_type;
+   u32 grp_b2ds;
+   u32 grp_b3ds;
+   u32 grp_b4ds;
+   u32 grp_b5ds;
+   u32 res4;
+   u32 grp_b6ds;
+};
+
+/* Device Information:

[U-Boot] [PATCH 05/12] MX6: add boot device support for SPL

Add a common spl.c file to support boot device functions needed for SPL
such as detecting the boot device.

Signed-off-by: Tim Harvey thar...@gateworks.com
---
v2:
- re-base on top of Masahiro Yamada's consolidation patch:
  http://patchwork.ozlabs.org/patch/341817/
- moved spl_boot_device() and get_boot_mode() into own common imx spl.c file
- use mem-mapped structure for smbr reg access
---
 arch/arm/imx-common/Makefile |  1 +
 arch/arm/imx-common/spl.c| 79 
 2 files changed, 80 insertions(+)
 create mode 100644 arch/arm/imx-common/spl.c

diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index b04dfbb..c97ea48 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
 endif
 ifeq ($(SOC),$(filter $(SOC),mx6 mxs))
 obj-y  += misc.o
+obj-$(CONFIG_SPL_BUILD)+= spl.o
 endif
 ifeq ($(SOC),$(filter $(SOC),mx6))
 obj-$(CONFIG_CMD_SATA) += sata.o
diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c
new file mode 100644
index 000..5c1667c
--- /dev/null
+++ b/arch/arm/imx-common/spl.c
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2014 Gateworks Corporation
+ * Author: Tim Harvey thar...@gateworks.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/spl.h
+#include spl.h
+
+#if defined(CONFIG_MX6)
+/* determine boot device from SRC_SBMR1 register (BOOT_CFG[4:1]) */
+u32 spl_boot_device(void)
+{
+   struct src *psrc = (struct src *)SRC_BASE_ADDR;
+   unsigned reg = readl(psrc-sbmr1);
+
+   /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
+   switch ((reg  0x00FF)  4) {
+/* EIM: See 8.5.1, Table 8-9 */
+   case 0x0:
+   /* BOOT_CFG1[3]: NOR/OneNAND Selection */
+   if ((reg  0x0008)  3)
+   return BOOT_DEVICE_ONENAND;
+   else
+   return BOOT_DEVICE_NOR;
+   break;
+   /* SATA: See 8.5.4, Table 8-20 */
+   case 0x2:
+   return BOOT_DEVICE_SATA;
+   /* Serial ROM: See 8.5.5.1, Table 8-22 */
+   case 0x3:
+   /* BOOT_CFG4[2:0] */
+   switch ((reg  0x0700)  24) {
+   case 0x0 ... 0x4:
+   return BOOT_DEVICE_SPI;
+   case 0x5 ... 0x7:
+   return BOOT_DEVICE_I2C;
+   }
+   break;
+   /* SD/eSD: 8.5.3, Table 8-15  */
+   case 0x4:
+   case 0x5:
+   return BOOT_DEVICE_MMC1;
+   /* MMC/eMMC: 8.5.3 */
+   case 0x6:
+   case 0x7:
+   return BOOT_DEVICE_MMC1;
+   /* NAND Flash: 8.5.2 */
+   case 0x8 ... 0xf:
+   return BOOT_DEVICE_NAND;
+   }
+   return BOOT_DEVICE_NONE;
+}
+#endif
+
+#if defined(CONFIG_SPL_MMC_SUPPORT)
+/* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */
+u32 spl_boot_mode(void)
+{
+   switch (spl_boot_device()) {
+   /* for MMC return either RAW or FAT mode */
+   case BOOT_DEVICE_MMC1:
+   case BOOT_DEVICE_MMC2:
+#ifdef CONFIG_SPL_FAT_SUPPORT
+   return MMCSD_MODE_FAT;
+#else
+   return MMCSD_MODE_RAW;
+#endif
+   break;
+   default:
+   puts(spl: ERROR:  unsupported device\n);
+   hang();
+   }
+}
+#endif
-- 
1.8.3.2

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[U-Boot] [PATCH 06/12] IMX: add comments and remove unused struct fields

Add comment block for the imx_ddr_size function and remove the extra unused
fields from struct esd_mmdc_regs which are also not common between IMX53 and
IMX6. There are no functional changes here.

Signed-off-by: Tim Harvey thar...@gateworks.com
---
 arch/arm/imx-common/cpu.c | 16 +++-
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index a77c4de..392b8d4 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -58,6 +58,7 @@ char *get_reset_cause(void)
 static const unsigned char col_lookup[] = {9, 10, 11, 8, 12, 9, 9, 9};
 static const unsigned char bank_lookup[] = {3, 2};
 
+/* these MMDC registers are common to the IMX53 and IMX6 */
 struct esd_mmdc_regs {
uint32_tctl;
uint32_tpdc;
@@ -66,15 +67,6 @@ struct esd_mmdc_regs {
uint32_tcfg1;
uint32_tcfg2;
uint32_tmisc;
-   uint32_tscr;
-   uint32_tref;
-   uint32_trsvd1;
-   uint32_trsvd2;
-   uint32_trwd;
-   uint32_tor;
-   uint32_tmrr;
-   uint32_tcfg3lp;
-   uint32_tmr4;
 };
 
 #define ESD_MMDC_CTL_GET_ROW(mdctl)((ctl  24)  7)
@@ -83,6 +75,12 @@ struct esd_mmdc_regs {
 #define ESD_MMDC_CTL_GET_CS1(mdctl)((ctl  30)  1)
 #define ESD_MMDC_MISC_GET_BANK(mdmisc) ((misc  5)  1)
 
+/**
+ * imx_ddr_size - return size in bytes of DRAM according MMDC config
+ * The MMDC MDCTL register holds the number of bits for row, col, and data
+ * width and the MMDC MDMISC register holds the number of banks. Combine
+ * all these bits to determine the meme size the MMDC has been configured for
+ */
 unsigned imx_ddr_size(void)
 {
struct esd_mmdc_regs *mem = (struct esd_mmdc_regs *)MEMCTL_BASE;
-- 
1.8.3.2

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[U-Boot] [PATCH 08/12] MX6: add mmdc configuration for MX6Q/MX6DL

Add functions for configuring MMDC iomux and configuration based on
board-specific configurations. 

Signed-off-by: Tim Harvey thar...@gateworks.com
---
v2:
- split out mmdc and iomux structs into separate patch
---
 arch/arm/cpu/armv7/mx6/Makefile |   1 +
 arch/arm/cpu/armv7/mx6/ddr.c| 469 
 2 files changed, 470 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/mx6/ddr.c

diff --git a/arch/arm/cpu/armv7/mx6/Makefile b/arch/arm/cpu/armv7/mx6/Makefile
index d7285fc..6dc9f8e 100644
--- a/arch/arm/cpu/armv7/mx6/Makefile
+++ b/arch/arm/cpu/armv7/mx6/Makefile
@@ -8,4 +8,5 @@
 #
 
 obj-y  := soc.o clock.o
+obj-$(CONFIG_SPL_BUILD) += ddr.o
 obj-$(CONFIG_SECURE_BOOT)+= hab.o
diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c
new file mode 100644
index 000..1536418
--- /dev/null
+++ b/arch/arm/cpu/armv7/mx6/ddr.c
@@ -0,0 +1,469 @@
+/*
+ * Copyright (C) 2014 Gateworks Corporation
+ * Author: Tim Harvey thar...@gateworks.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include common.h
+#include linux/types.h
+#include asm/arch/mx6-ddr.h
+#include asm/arch/sys_proto.h
+#include asm/io.h
+#include asm/types.h
+
+/* Configure MX6DQ mmdc iomux */
+void mx6dq_dram_iocfg(unsigned width,
+ const struct mx6dq_iomux_ddr_regs *ddr,
+ const struct mx6dq_iomux_grp_regs *grp)
+{
+   volatile struct mx6dq_iomux_ddr_regs *mx6_ddr_iomux;
+   volatile struct mx6dq_iomux_grp_regs *mx6_grp_iomux;
+
+   mx6_ddr_iomux = (struct mx6dq_iomux_ddr_regs *)MX6DQ_IOM_DDR_BASE;
+   mx6_grp_iomux = (struct mx6dq_iomux_grp_regs *)MX6DQ_IOM_GRP_BASE;
+
+   /* DDR IO Type */
+   mx6_grp_iomux-grp_ddr_type = grp-grp_ddr_type;
+   mx6_grp_iomux-grp_ddrpke = grp-grp_ddrpke;
+
+   /* Clock */
+   mx6_ddr_iomux-dram_sdclk_0 = ddr-dram_sdclk_0;
+   mx6_ddr_iomux-dram_sdclk_1 = ddr-dram_sdclk_1;
+
+   /* Address */
+   mx6_ddr_iomux-dram_cas = ddr-dram_cas;
+   mx6_ddr_iomux-dram_ras = ddr-dram_ras;
+   mx6_grp_iomux-grp_addds = grp-grp_addds;
+
+   /* Control */
+   mx6_ddr_iomux-dram_reset = ddr-dram_reset;
+   mx6_ddr_iomux-dram_sdcke0 = ddr-dram_sdcke0;
+   mx6_ddr_iomux-dram_sdcke1 = ddr-dram_sdcke1;
+   mx6_ddr_iomux-dram_sdba2 = ddr-dram_sdba2;
+   mx6_ddr_iomux-dram_sdodt0 = ddr-dram_sdodt0;
+   mx6_ddr_iomux-dram_sdodt1 = ddr-dram_sdodt1;
+   mx6_grp_iomux-grp_ctlds = grp-grp_ctlds;
+
+   /* Data Strobes */
+   mx6_grp_iomux-grp_ddrmode_ctl = grp-grp_ddrmode_ctl;
+   mx6_ddr_iomux-dram_sdqs0 = ddr-dram_sdqs0;
+   mx6_ddr_iomux-dram_sdqs1 = ddr-dram_sdqs1;
+   if (width = 32) {
+   mx6_ddr_iomux-dram_sdqs2 = ddr-dram_sdqs2;
+   mx6_ddr_iomux-dram_sdqs3 = ddr-dram_sdqs3;
+   }
+   if (width = 64) {
+   mx6_ddr_iomux-dram_sdqs4 = ddr-dram_sdqs4;
+   mx6_ddr_iomux-dram_sdqs5 = ddr-dram_sdqs5;
+   mx6_ddr_iomux-dram_sdqs6 = ddr-dram_sdqs6;
+   mx6_ddr_iomux-dram_sdqs7 = ddr-dram_sdqs7;
+   }
+
+   /* Data */
+   mx6_grp_iomux-grp_ddrmode = grp-grp_ddrmode;
+   mx6_grp_iomux-grp_b0ds = grp-grp_b0ds;
+   mx6_grp_iomux-grp_b1ds = grp-grp_b1ds;
+   if (width = 32) {
+   mx6_grp_iomux-grp_b2ds = grp-grp_b2ds;
+   mx6_grp_iomux-grp_b3ds = grp-grp_b3ds;
+   }
+   if (width = 64) {
+   mx6_grp_iomux-grp_b4ds = grp-grp_b4ds;
+   mx6_grp_iomux-grp_b5ds = grp-grp_b5ds;
+   mx6_grp_iomux-grp_b6ds = grp-grp_b6ds;
+   mx6_grp_iomux-grp_b7ds = grp-grp_b7ds;
+   }
+   mx6_ddr_iomux-dram_dqm0 = ddr-dram_dqm0;
+   mx6_ddr_iomux-dram_dqm1 = ddr-dram_dqm1;
+   if (width = 32) {
+   mx6_ddr_iomux-dram_dqm2 = ddr-dram_dqm2;
+   mx6_ddr_iomux-dram_dqm3 = ddr-dram_dqm3;
+   }
+   if (width = 64) {
+   mx6_ddr_iomux-dram_dqm4 = ddr-dram_dqm4;
+   mx6_ddr_iomux-dram_dqm5 = ddr-dram_dqm5;
+   mx6_ddr_iomux-dram_dqm6 = ddr-dram_dqm6;
+   mx6_ddr_iomux-dram_dqm7 = ddr-dram_dqm7;
+   }
+}
+
+/* Configure MX6SDL mmdc iomux */
+void mx6sdl_dram_iocfg(unsigned width,
+  const struct mx6sdl_iomux_ddr_regs *ddr,
+  const struct mx6sdl_iomux_grp_regs *grp)
+{
+   volatile struct mx6sdl_iomux_ddr_regs *mx6_ddr_iomux;
+   volatile struct mx6sdl_iomux_grp_regs *mx6_grp_iomux;
+
+   mx6_ddr_iomux = (struct mx6sdl_iomux_ddr_regs *)MX6SDL_IOM_DDR_BASE;
+   mx6_grp_iomux = (struct mx6sdl_iomux_grp_regs *)MX6SDL_IOM_GRP_BASE;
+
+   /* DDR IO Type */
+   mx6_grp_iomux-grp_ddr_type = grp-grp_ddr_type;
+   mx6_grp_iomux-grp_ddrpke = grp-grp_ddrpke;
+
+   /* Clock */
+   mx6_ddr_iomux-dram_sdclk_0 = ddr-dram_sdclk_0;
+   mx6_ddr_iomux-dram_sdclk_1 = ddr-dram_sdclk_1;
+
+   /* Address */
+

[U-Boot] [PATCH 10/12] imx: ventana: split read_eeprom into standalone file

Split the read_eeprom function out so that it can be shared (ie with SPL)

Signed-off-by: Tim Harvey thar...@gateworks.com
---
 board/gateworks/gw_ventana/Makefile |  2 +-
 board/gateworks/gw_ventana/eeprom.c | 89 +
 board/gateworks/gw_ventana/gw_ventana.c | 89 +
 board/gateworks/gw_ventana/ventana_eeprom.h | 11 
 4 files changed, 102 insertions(+), 89 deletions(-)
 create mode 100644 board/gateworks/gw_ventana/eeprom.c

diff --git a/board/gateworks/gw_ventana/Makefile 
b/board/gateworks/gw_ventana/Makefile
index e8dab89..03bd1fd 100644
--- a/board/gateworks/gw_ventana/Makefile
+++ b/board/gateworks/gw_ventana/Makefile
@@ -6,5 +6,5 @@
 # SPDX-License-Identifier:  GPL-2.0+
 #
 
-obj-y  := gw_ventana.o gsc.o
+obj-y  := gw_ventana.o gsc.o eeprom.o
 
diff --git a/board/gateworks/gw_ventana/eeprom.c 
b/board/gateworks/gw_ventana/eeprom.c
new file mode 100644
index 000..e90186e
--- /dev/null
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -0,0 +1,89 @@
+/*
+ * Copyright (C) 2014 Gateworks Corporation
+ * Author: Tim Harvey thar...@gateworks.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include common.h
+#include i2c.h
+
+#include gsc.h
+#include ventana_eeprom.h
+
+/* read ventana EEPROM, check for validity, and return baseboard type */
+int
+read_eeprom(int bus, struct ventana_board_info *info)
+{
+   int i;
+   int chksum;
+   char baseboard;
+   int type;
+   unsigned char *buf = (unsigned char *)info;
+
+   memset(info, 0, sizeof(*info));
+
+   /*
+* On a board with a missing/depleted backup battery for GSC, the
+* board may be ready to probe the GSC before its firmware is
+* running.  We will wait here indefinately for the GSC/EEPROM.
+*/
+   while (1) {
+   if (0 == i2c_set_bus_num(bus) 
+   0 == i2c_probe(GSC_EEPROM_ADDR))
+   break;
+   mdelay(1);
+   }
+
+   /* read eeprom config section */
+   if (gsc_i2c_read(GSC_EEPROM_ADDR, 0x00, 1, buf, sizeof(*info))) {
+   puts(EEPROM: Failed to read EEPROM\n);
+   info-model[0] = 0;
+   return GW_UNKNOWN;
+   }
+
+   /* sanity checks */
+   if (info-model[0] != 'G' || info-model[1] != 'W') {
+   puts(EEPROM: Invalid Model in EEPROM\n);
+   info-model[0] = 0;
+   return GW_UNKNOWN;
+   }
+
+   /* validate checksum */
+   for (chksum = 0, i = 0; i  sizeof(*info)-2; i++)
+   chksum += buf[i];
+   if ((info-chksum[0] != chksum8) ||
+   (info-chksum[1] != (chksum0xff))) {
+   puts(EEPROM: Failed EEPROM checksum\n);
+   info-model[0] = 0;
+   return GW_UNKNOWN;
+   }
+
+   /* original GW5400-A prototype */
+   baseboard = info-model[3];
+   if (strncasecmp((const char *)info-model, GW5400-A, 8) == 0)
+   baseboard = '0';
+
+   switch (baseboard) {
+   case '0': /* original GW5400-A prototype */
+   type = GW54proto;
+   break;
+   case '1':
+   type = GW51xx;
+   break;
+   case '2':
+   type = GW52xx;
+   break;
+   case '3':
+   type = GW53xx;
+   break;
+   case '4':
+   type = GW54xx;
+   break;
+   default:
+   printf(EEPROM: Unknown model in EEPROM: %s\n, info-model);
+   type = GW_UNKNOWN;
+   break;
+   }
+   return type;
+}
diff --git a/board/gateworks/gw_ventana/gw_ventana.c 
b/board/gateworks/gw_ventana/gw_ventana.c
index 2113740..3b6bc01 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -81,15 +81,6 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 static struct ventana_board_info ventana_info;
 
-enum {
-   GW54proto, /* original GW5400-A prototype */
-   GW51xx,
-   GW52xx,
-   GW53xx,
-   GW54xx,
-   GW_UNKNOWN,
-};
-
 int board_type;
 
 /* UART1: Function varies per baseboard */
@@ -368,84 +359,6 @@ int board_eth_init(bd_t *bis)
return 0;
 }
 
-/* read ventana EEPROM, check for validity, and return baseboard type */
-static int
-read_eeprom(void)
-{
-   int i;
-   int chksum;
-   char baseboard;
-   int type;
-   struct ventana_board_info *info = ventana_info;
-   unsigned char *buf = (unsigned char *)ventana_info;
-
-   memset(info, 0, sizeof(ventana_info));
-
-   /*
-* On a board with a missing/depleted backup battery for GSC, the
-* board may be ready to probe the GSC before its firmware is
-* running.  We will wait here indefinately for the GSC/EEPROM.
-*/
-   while (1) {
-   if (0 == i2c_set_bus_num(I2C_GSC) 
-   0 == i2c_probe(GSC_EEPROM_ADDR))
-   break;
-

[U-Boot] [PATCH 11/12] imx: ventana: auto-configure for IMX6Q vs IMX6DL

use the new iomux function and a macros to create a multi-dimensional array
of iomux values without duplicating the defintions.

Signed-off-by: Tim Harvey thar...@gateworks.com
---
v2:
- use macros that have been moved to iomux-v3.h
---
 board/gateworks/gw_ventana/gw_ventana.c | 493 
 1 file changed, 311 insertions(+), 182 deletions(-)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c 
b/board/gateworks/gw_ventana/gw_ventana.c
index 3b6bc01..584762f 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -85,109 +85,149 @@ int board_type;
 
 /* UART1: Function varies per baseboard */
 iomux_v3_cfg_t const uart1_pads[] = {
-   MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-   MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
+   IOMUX_PADS(PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
 };
 
 /* UART2: Serial Console */
 iomux_v3_cfg_t const uart2_pads[] = {
-   MX6_PAD_SD4_DAT7__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-   MX6_PAD_SD4_DAT4__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
+   IOMUX_PADS(PAD_SD4_DAT7__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD4_DAT4__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
 };
 
 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
 
 /* I2C1: GSC */
-struct i2c_pads_info i2c_pad_info0 = {
+struct i2c_pads_info mx6q_i2c_pad_info0 = {
.scl = {
-   .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC,
-   .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC,
+   .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC,
+   .gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | PC,
.gp = IMX_GPIO_NR(3, 21)
},
.sda = {
-   .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC,
-   .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC,
+   .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC,
+   .gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | PC,
+   .gp = IMX_GPIO_NR(3, 28)
+   }
+};
+struct i2c_pads_info mx6dl_i2c_pad_info0 = {
+   .scl = {
+   .i2c_mode = MX6DL_PAD_EIM_D21__I2C1_SCL | PC,
+   .gpio_mode = MX6DL_PAD_EIM_D21__GPIO3_IO21 | PC,
+   .gp = IMX_GPIO_NR(3, 21)
+   },
+   .sda = {
+   .i2c_mode = MX6DL_PAD_EIM_D28__I2C1_SDA | PC,
+   .gpio_mode = MX6DL_PAD_EIM_D28__GPIO3_IO28 | PC,
.gp = IMX_GPIO_NR(3, 28)
}
 };
 
 /* I2C2: PMIC/PCIe Switch/PCIe Clock/Mezz */
-struct i2c_pads_info i2c_pad_info1 = {
+struct i2c_pads_info mx6q_i2c_pad_info1 = {
.scl = {
-   .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC,
-   .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC,
+   .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
+   .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC,
.gp = IMX_GPIO_NR(4, 12)
},
.sda = {
-   .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC,
-   .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC,
+   .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
+   .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC,
+   .gp = IMX_GPIO_NR(4, 13)
+   }
+};
+struct i2c_pads_info mx6dl_i2c_pad_info1 = {
+   .scl = {
+   .i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | PC,
+   .gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | PC,
+   .gp = IMX_GPIO_NR(4, 12)
+   },
+   .sda = {
+   .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC,
+   .gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC,
.gp = IMX_GPIO_NR(4, 13)
}
 };
 
 /* I2C3: Misc/Expansion */
-struct i2c_pads_info i2c_pad_info2 = {
+struct i2c_pads_info mx6q_i2c_pad_info2 = {
+   .scl = {
+   .i2c_mode = MX6Q_PAD_GPIO_3__I2C3_SCL | PC,
+   .gpio_mode = MX6Q_PAD_GPIO_3__GPIO1_IO03 | PC,
+   .gp = IMX_GPIO_NR(1, 3)
+   },
+   .sda = {
+   .i2c_mode = MX6Q_PAD_GPIO_6__I2C3_SDA | PC,
+   .gpio_mode = MX6Q_PAD_GPIO_6__GPIO1_IO06 | PC,
+   .gp = IMX_GPIO_NR(1, 6)
+   }
+};
+struct i2c_pads_info mx6dl_i2c_pad_info2 = {
.scl = {
-   .i2c_mode = MX6_PAD_GPIO_3__I2C3_SCL | PC,
-   .gpio_mode = MX6_PAD_GPIO_3__GPIO1_IO03 | PC,
+   .i2c_mode = MX6DL_PAD_GPIO_3__I2C3_SCL | PC,
+   .gpio_mode = MX6DL_PAD_GPIO_3__GPIO1_IO03 | PC,
.gp = IMX_GPIO_NR(1, 3)
},
.sda = {
-   .i2c_mode = MX6_PAD_GPIO_6__I2C3_SDA | PC,
-   .gpio_mode = MX6_PAD_GPIO_6__GPIO1_IO06 | PC,
+   .i2c_mode = MX6DL_PAD_GPIO_6__I2C3_SDA | PC,
+   .gpio_mode = MX6DL_PAD_GPIO_6__GPIO1_IO06 | PC,
.gp = IMX_GPIO_NR(1, 6)

[U-Boot] [PATCH 12/12] imx: ventana: switch to SPL

Switch to an SPL image. The SPL for Ventana does the following:
 - setup i2c and read the factory programmed EEPROM to obtain DRAM config
   and model for board-specific calibration data
 - configure DRAM per CPU/size/layout/devices/calibration
 - load u-boot.img from NAND or MTD depending on boot device  and jump to it

This allows for a single SPL+u-boot.img to replace the previous multiple board
configurations.

Signed-off-by: Tim Harvey thar...@gateworks.com
---
v2:
- remove missing/unnecessary include
- revert mtdparts change
- use imx_ddr_size() which uses MMDC configuration to determine mem size
  explicitly
- add support for MX6SOLO and MX6DUAL
- set CS0_END for 4GB so get_ram_size() works
- updated DDR3 calibration values for ventana boards
- fixed build issue - only compile spl if doing spl build
- fixed line length issue in README
- remove CONFIG_SPL* conditions and conditionally compile instead
- removed prints for CPU type and DRAM size/width - uboot will print these later
- removed unused gw_ventana_spl.cfg
- use common read_eeprom function
- added MMC support to SPL
---
 board/gateworks/gw_ventana/Makefile |   1 +
 board/gateworks/gw_ventana/README   |  92 ---
 board/gateworks/gw_ventana/gw_ventana.c |   9 +-
 board/gateworks/gw_ventana/gw_ventana.cfg   |  15 -
 board/gateworks/gw_ventana/gw_ventana_spl.c | 407 
 boards.cfg  |   6 +-
 include/configs/gw_ventana.h|  11 +
 7 files changed, 485 insertions(+), 56 deletions(-)
 create mode 100644 board/gateworks/gw_ventana/gw_ventana_spl.c

diff --git a/board/gateworks/gw_ventana/Makefile 
b/board/gateworks/gw_ventana/Makefile
index 03bd1fd..33a1788 100644
--- a/board/gateworks/gw_ventana/Makefile
+++ b/board/gateworks/gw_ventana/Makefile
@@ -7,4 +7,5 @@
 #
 
 obj-y  := gw_ventana.o gsc.o eeprom.o
+obj-$(CONFIG_SPL_BUILD) += gw_ventana_spl.o
 
diff --git a/board/gateworks/gw_ventana/README 
b/board/gateworks/gw_ventana/README
index 9e697d6..888657c 100644
--- a/board/gateworks/gw_ventana/README
+++ b/board/gateworks/gw_ventana/README
@@ -3,53 +3,81 @@ U-Boot for the Gateworks Ventana Product Family boards
 This file contains information for the port of U-Boot to the Gateworks
 Ventana Product family boards.
 
-1. Boot source, boot from NAND
+1. Secondary Program Loader (SPL)
+-
+
+The i.MX6 has a BOOT ROM PPL (Primary Program Loader) which supports loading
+an executable image from various boot devices.
+
+The Gateworks Ventana board config uses an SPL build configuration. This
+will build the following artifacts from u-boot source:
+ - SPL - Secondary Program Loader that the i.MX6 BOOT ROM (Primary Program
+ Loader) boots.  This detects CPU/DRAM configuration, configures
+ The DRAM controller, loads u-boot.img from the detected boot device,
+ and jumps to it.  As this is booted from the PPL, it has an IVT/DCD
+ table.
+ - u-boot.img - The main u-boot core which is u-boot.bin with a image header.
+
+
+2. Build
+
+
+To build U-Boot for the Gateworks Ventana product family:
+
+ make gwventana_config
+ make
+
+
+3. Boot source, boot from NAND
 --
 
 The i.MX6 BOOT ROM expects some structures that provide details of NAND layout
 and bad block information (referred to as 'bootstreams') which are replicated
-multiple times in NAND. The number of replications is configurable through
-board strapping options and eFUSE settings.  The Freescale 'kobs-ng'
-application from the Freescale LTIB BSP, which runs under Linux, must be used
-to program the bootstream in order to setup the replicated headers correctly.
+multiple times in NAND. The number of replications and their spacing (referred
+to as search stride) is configurable through board strapping options and/or
+eFUSE settings (BOOT_SEARCH_COUNT / Pages in block from BOOT_CFG2). In
+addition, the i.MX6 BOOT ROM Flash Configuration Block (FCB) supports two
+copies of a bootloader in flash in the case that a bad block has corrupted one.
+The Freescale 'kobs-ng' application from the Freescale LTIB BSP, which runs
+under Linux and operates on an MTD partition, must be used to program the
+bootstream in order to setup this flash structure correctly.
 
 The Gateworks Ventana boards with NAND flash have been factory programmed
 such that their eFUSE settings expect 2 copies of the boostream (this is
 specified by providing kobs-ng with the --search_exponent=1 argument). Once in
-Linux with MTD support for the NAND on /dev/mtd0 you can program the boostream
+Linux with MTD support for the NAND on /dev/mtd0 you can program the SPL
 with:
 
-kobs-ng init -v -x --search_exponent=1 u-boot.imx
+kobs-ng init -v -x --search_exponent=1 SPL
 
-The kobs-ng application uses an imximage (u-boot.imx) which contains the
-Image Vector Table (IVT) and Device Configuration Data (DCD) structures that
-the i.MX6 BOOT ROM requires to

[U-Boot] [PATCH 09/12] IMX: add additional function for pinmux using an array

Add new function that can take an array of iomux configs, an index, and
a stride to allow a multi-dimentional array of pinmux values to be used
to define pinmux values per cpu-type.

This takes a different approach to previously proposed solutions which used
multiple arrays of pad lists. The goal is to eliminate having these multiple
arrays such as 'mx6q_uart1_pads' and 'mx6dl_uart1_pads' which are almost
identical copies of each other except for the MX6Q/MX6DL prefix on the PAD.

Signed-off-by: Tim Harvey thar...@gateworks.com
---
v2:
 - moved macros for declaring and using structs for array variant
 - removed non-related whitespace cleanup
---
 arch/arm/imx-common/iomux-v3.c | 19 +++
 arch/arm/include/asm/imx-common/iomux-v3.h | 15 +++
 2 files changed, 30 insertions(+), 4 deletions(-)

diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c
index b59b802..d3e1e30 100644
--- a/arch/arm/imx-common/iomux-v3.c
+++ b/arch/arm/imx-common/iomux-v3.c
@@ -46,12 +46,23 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
 #endif
 }
 
-void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
- unsigned count)
+/* configures a list of pads within an array of lists */
+void imx_iomux_v3_setup_multiple_pads_array(iomux_v3_cfg_t const *pad_list,
+   unsigned count, unsigned list,
+   unsigned stride)
 {
iomux_v3_cfg_t const *p = pad_list;
int i;
 
-   for (i = 0; i  count; i++)
-   imx_iomux_v3_setup_pad(*p++);
+   p += list;
+   for (i = 0; i  count; i++) {
+   imx_iomux_v3_setup_pad(*p);
+   p += stride;
+   }
+}
+
+void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
+ unsigned count)
+{
+   imx_iomux_v3_setup_multiple_pads_array(pad_list, count, 0, 1);
 }
diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h 
b/arch/arm/include/asm/imx-common/iomux-v3.h
index dec11a1..2f7a1cb 100644
--- a/arch/arm/include/asm/imx-common/iomux-v3.h
+++ b/arch/arm/include/asm/imx-common/iomux-v3.h
@@ -167,7 +167,22 @@ typedef u64 iomux_v3_cfg_t;
 #define GPIO_PORTF (5  GPIO_PORT_SHIFT)
 
 void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
+void imx_iomux_v3_setup_multiple_pads_array(iomux_v3_cfg_t const *pad_list,
+   unsigned count, unsigned list,
+   unsigned stride);
 void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
 unsigned count);
 
+/* macros for declaring and using pinmux array */
+#define IOMUX_PADS(x) (MX6Q_##x), (MX6DL_##x)
+#define SETUP_IOMUX_PAD(def)   \
+if (is_cpu_type(MXC_CPU_MX6Q)) {   \
+   imx_iomux_v3_setup_pad(MX6Q_##def); \
+} else {   \
+   imx_iomux_v3_setup_pad(MX6DL_##def);\
+}
+#define SETUP_IOMUX_PADS(x)\
+   imx_iomux_v3_setup_multiple_pads_array(x,   \
+   ARRAY_SIZE(x)/2, is_cpu_type(MXC_CPU_MX6Q) ? 0 : 1, 2)
+
 #endif /* __MACH_IOMUX_V3_H__*/
-- 
1.8.3.2

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Re: [U-Boot] [PATCH v3 9/9] net/designware: Reduce DMA burst length

Hi Marek,

On Mon, 2014-04-28 at 07:55 +0200, Marek Vasut wrote:
On Monday, April 28, 2014 at 07:51:49 AM, Chen-Yu Tsai wrote:
On Mon, Apr 28, 2014 at 2:08 AM, Marek Vasut ma...@denx.de wrote:
On Sunday, April 27, 2014 at 05:29:29 PM, Chen-Yu Tsai wrote:
On Sun, Apr 27, 2014 at 11:25 PM, Ian Campbell i...@hellion.org.uk
wrote:
On Sat, 2014-04-26 at 20:28 +0200, Marek Vasut wrote:
On Friday, April 18, 2014 at 08:05:50 PM, Ian Campbell wrote:
From: Jens Kuske jensku...@gmail.com

The GMAC module in Allwinner sunxi SoCs seems to have problems with
burst lengths 8.

Is there any explanation for the problems please ?

Jens or Wens, can you answer this?

IIRC, with burst lengths 8, GMAC doesn't work, no ping, no DHCP.
I don't remember if it was TX or RX that suffered, or even both.

Hope this clarifies things a bit.

No, it does not at all, sorry. What you describe are symptoms, but what I
want to know is what is the root cause of those symptoms. You did not
explain that.

I can not offer much more explanation. The value was hardcoded in
Allwinner's code. The datasheets don't offer much, except this line
might be related:

(DMA) Descriptor architecture, allowing large blocks of data transfer
with minimum CPU intervention; each descriptor can transfer up to
4 KB data.

Also probably related:

4KB TX FIFO for transmission packets and 16KB RX FIFO for reception
packets.

I'm not an expert in hardware. We could ask Allwinner, but given past
inquiries from the linux-sunxi community, I'd say getting a reply on
hardware specifics is unlikely to happen.

So my guess is that this is limited by the DWMAC IP Allwinner licensed
from Synopsys.

Even though I'm not an expert in DW GMAC I may confirm that it has tons
of settings people may use for fine-tuning performance and I may assume
that there're corner cases when some settings may lead to real problems.

And IMHO if different boards may need different configurations why don't
we satisfy their needs. But it's good to keep others who used to use
existing settings happy too.

If you look in corresponding driver in Linux kernel
(https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/drivers/net/ethernet/stmicro)
you'll see much more complicated code compared to driver in U-Boot. And among
other things you may see some GMAC parameters could be set per platform.

And Programmable Burst Length (PBL) is one of them. Look at
stmmac_init_dma_engine() in
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c

You may see default PBL (DEFAULT_DMA_PBL = 8) is used if other value is
not provided by platform.

So I would propose to act this way:

1. Introduce driver-specific config value. Something like
DW_GMAC_DEFAULT_DMA_PBL and in designware.h set it to BURST_8. I
hope driver in Linux was used a lot and this value could be treated as
safe.

2. Ask people to try this new setting on existing boards that use DW
GMAC. If everybody is happy there's nothing else to do here.

3. Otherwise if people report regressions add mentioned config option in
board configuration files for problematic boards.

I think with this approach everybody will be happy.

-Alexey
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Re: [U-Boot] [RFC] Kconfig: MAINTAINERS file or not?

2014-04-28 Thread Wolfgang Denk

Dear Masahiro,

In message 20140428185854.b2b8.aa925...@jp.panasonic.com you wrote:
 
 Before I send Kconfig series v2,
 please let me cofirm our approach of maintainers info.

Thanks for all your patience when dealing with all these apparently
simple things that nevertheless take so much time and nerves to
decide.

 Instead, MAINTAINERS file as in Linux Kernel was proposed.
 (And the patch series by Daniel is already on Patchwork.)
 http://patchwork.ozlabs.org/patch/340546/
 But Wolfgang (and Albert) disagreed with it.
 
 In Kconfig v1 series, I put maintainers info and board status
 in board/*/*/Kconfig as non-user-editable settings:
 http://patchwork.ozlabs.org/patch/342089/

I find myself in the difficult situation that I'm not really happy
with either of these approaches, but then I don't have any better
solution to suggest.  I think I find the board/*/*/Kconfig a bit
better.

 But I am not sure if this is a good idea.
 (At least, it is dirty.)

Could you please explain why you think so?

 In v2, I will drop maintainers info and board status from Kconfig
 and leave them to Daniel's patch.

Hm... :-(

I hope others will provide more feedback - I'd be seriously unhappy if
this decision was based only on gut feelings like mine...

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
The use of COBOL cripples the mind; its teaching  should,  therefore,
be regarded as a criminal offense.   - E. W. Dijkstra
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[U-Boot] [PATCH 04/12] spl: consolidate arch/arm/include/asm/arch-*/spl.h

From: Masahiro Yamada yamad...@jp.panasonic.com

arch/arm/include/asm/spl.h requires all SoCs to have
arch/arm/include/asm/arch-*/spl.h.

But many of them just define BOOT_DEVICE_* macros.

Those macros are used in the switch (boot_device) { ... }
statement in common/spl/spl.c.

So they should not be archtecture specific, but be described as
a simpile enumeration.

This commit merges most of arch/arm/include/asm/arch-*/spl.h
into arch/arm/include/asm/spl.h.

With a little more effort, arch-zynq/spl.h and arch-socfpga/spl.h
will be merged, while I am not sure about OMAP and Exynos.

Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Tom Rini tr...@ti.com
Cc: Michal Simek michal.si...@xilinx.com
Cc: Andreas Bießmann andreas.de...@googlemail.com
Cc: Stephen Warren swar...@nvidia.com
Cc: Tom Warren twar...@nvidia.com
CC: Stefano Babic sba...@denx.de
CC: Minkyu Kang mk7.k...@samsung.com
Cc: Dinh Nguyen dingu...@altera.com
Acked-by: Andreas Bießmann andreas.de...@googlemail.com
Acked-by: Michal Simek mon...@monstr.eu
Acked-by: Stefano Babic sba...@denx.de
Acked-by: Stephen Warren swar...@nvidia.com
Acked-by: Tim Harvey thar...@gateworks.com
Tested-by: Bo Shen voice.s...@atmel.com [on sama5d3xek board for at91 part]
Acked-by: Stephen Warren swar...@nvidia.com
Signed-off-by: Tim Harvey thar...@gateworks.com
---
 arch/arm/cpu/arm720t/tegra-common/spl.c  |  2 +-
 arch/arm/include/asm/arch-at91/spl.h | 24 
 arch/arm/include/asm/arch-davinci/spl.h  | 16 
 arch/arm/include/asm/arch-mx35/spl.h | 22 --
 arch/arm/include/asm/arch-mx5/spl.h  | 13 -
 arch/arm/include/asm/arch-tegra114/spl.h | 22 --
 arch/arm/include/asm/arch-tegra124/spl.h | 13 -
 arch/arm/include/asm/arch-tegra20/spl.h  | 12 
 arch/arm/include/asm/arch-tegra30/spl.h  | 12 
 arch/arm/include/asm/spl.h   | 20 
 board/denx/m53evk/m53evk.c   |  2 +-
 11 files changed, 22 insertions(+), 136 deletions(-)
 delete mode 100644 arch/arm/include/asm/arch-at91/spl.h
 delete mode 100644 arch/arm/include/asm/arch-davinci/spl.h
 delete mode 100644 arch/arm/include/asm/arch-mx35/spl.h
 delete mode 100644 arch/arm/include/asm/arch-mx5/spl.h
 delete mode 100644 arch/arm/include/asm/arch-tegra114/spl.h
 delete mode 100644 arch/arm/include/asm/arch-tegra124/spl.h
 delete mode 100644 arch/arm/include/asm/arch-tegra20/spl.h
 delete mode 100644 arch/arm/include/asm/arch-tegra30/spl.h

diff --git a/arch/arm/cpu/arm720t/tegra-common/spl.c 
b/arch/arm/cpu/arm720t/tegra-common/spl.c
index 5171a8f..8147806 100644
--- a/arch/arm/cpu/arm720t/tegra-common/spl.c
+++ b/arch/arm/cpu/arm720t/tegra-common/spl.c
@@ -14,7 +14,7 @@
 #include asm/arch/pinmux.h
 #include asm/arch/tegra.h
 #include asm/arch-tegra/board.h
-#include asm/arch/spl.h
+#include asm/spl.h
 #include cpu.h
 
 void spl_board_init(void)
diff --git a/arch/arm/include/asm/arch-at91/spl.h 
b/arch/arm/include/asm/arch-at91/spl.h
deleted file mode 100644
index d8a87da..000
--- a/arch/arm/include/asm/arch-at91/spl.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright (C) 2013 Atmel Corporation
- *   Bo Shen voice.s...@atmel.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#ifndef_ASM_ARCH_SPL_H_
-#define_ASM_ARCH_SPL_H_
-
-enum {
-   BOOT_DEVICE_NONE,
-#ifdef CONFIG_SYS_USE_MMC
-   BOOT_DEVICE_MMC1,
-   BOOT_DEVICE_MMC2,
-   BOOT_DEVICE_MMC2_2,
-#elif CONFIG_SYS_USE_NANDFLASH
-   BOOT_DEVICE_NAND,
-#elif CONFIG_SYS_USE_SERIALFLASH
-   BOOT_DEVICE_SPI,
-#endif
-};
-
-#endif
diff --git a/arch/arm/include/asm/arch-davinci/spl.h 
b/arch/arm/include/asm/arch-davinci/spl.h
deleted file mode 100644
index 5afe0d4..000
--- a/arch/arm/include/asm/arch-davinci/spl.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * (C) Copyright 2012
- * Texas Instruments, www.ti.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-#ifndef_ASM_ARCH_SPL_H_
-#define_ASM_ARCH_SPL_H_
-
-#define BOOT_DEVICE_NAND   1
-#define BOOT_DEVICE_SPI2
-#define BOOT_DEVICE_MMC1   3
-#define BOOT_DEVICE_MMC2   4   /* dummy */
-#define BOOT_DEVICE_MMC2_2 5   /* dummy */
-
-#endif
diff --git a/arch/arm/include/asm/arch-mx35/spl.h 
b/arch/arm/include/asm/arch-mx35/spl.h
deleted file mode 100644
index d0efec2..000
--- a/arch/arm/include/asm/arch-mx35/spl.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * (C) Copyright 2012
- * Texas Instruments, www.ti.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-#ifndef_ASM_ARCH_SPL_H_
-#define_ASM_ARCH_SPL_H_
-
-#define BOOT_DEVICE_NONE   0
-#define BOOT_DEVICE_XIP1
-#define BOOT_DEVICE_XIPWAIT2
-#define BOOT_DEVICE_NAND   3
-#define BOOT_DEVICE_ONENAND4
-#define BOOT_DEVICE_MMC1   5
-#define BOOT_DEVICE_MMC2   6
-#define BOOT_DEVICE_MMC2_2 7
-#define BOOT_DEVICE_NOR

Re: [U-Boot] IPv6 in U-BOOT

2014-04-28 Thread chris packham

Hi,

 On 29/4/2014 at 05:01 AM, Jean-Pierre TOSONI jp.tos...@acksys.fr wrote: 
 Hello Chris,
 
 I am looking for IPv6 support in U-Boot. I saw that you made some work
 about it last year.
 
 Did you obtain a working IPv6 ? Is it available somewhere ?
 

I've got it to a point where it is possible to process ICMPv6 echos (ping6). My 
next
planned step was to get tftp to work over IPv6. Unfortunately $life and $dayjob
have got in the way and I haven't been able to spend the time I would like to 
on it.
I don't think it's actually far off getting tftp working but getting the code 
into shape
where it's acceptable to Joe and Wolfgang/Tom might take a bit of work.
  
My code is up on github https://github.com/cpackham/u-boot/tree/ipv6 I haven't
rebased against u-boot master for a while so it's fairly out of date.

If there is enough interest I'd be happy to put some more work into this. I 
could try
to convince my employer to let me spend some work time on it.

 
 Thanks for your time,
 
 Jean-Pierre Tosoni



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Re: [U-Boot] [PATCH v4 6/6] PPC 85xx: Add qemu-ppce500 machine

2014-04-28 Thread Alexander Graf



 Am 28.04.2014 um 20:40 schrieb York Sun york...@freescale.com:
 
 On 02/20/2014 04:52 AM, Alexander Graf wrote:
 For KVM we have a special PV machine type called ppce500. This machine
 is inspired by the MPC8544DS board, but implements a lot less features
 than that one.
 
 It also provides more PCI slots and is supposed to be enumerated by
 device tree only.
 
 This patch adds support for the generic ppce500 machine and tries to
 rely solely on device tree for device enumeration.
 
 Signed-off-by: Alexander Graf ag...@suse.de
 
 ---
 
 v3 - v4:
 
  - use new tlb map syntax
  - check that tlb map mapped everything
  - always save/restore r3 for cpu_init_early_f
  - remove CONFIG_DYNAMIC_CCSRBAR
  - make init_tlbs weak and remove all init_tlbs_dynamic() cruft
  - always map fdt to fixed virtual address
  - fold together AS=1 fdt map functions
  - use tlb_map_range for CCSR map
  - search for PCI based on device type rather than compatible
  - remove unnecessary cast
  - call get_linear_ram_size directly
  - override get_tbclk with timebase-frequency fetching code
 ---
 
 snip
 
 diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c 
 b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
 index 993b8b8..998781b 100644
 --- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
 +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
 @@ -79,7 +79,7 @@ void setup_ifc(void)
 #endif
 
 /* We run cpu_init_early_f in AS = 1 */
 -void cpu_init_early_f(void)
 +void cpu_init_early_f(void *fdt)
 {
u32 mas0, mas1, mas2, mas3, mas7;
int i;
 @@ -102,6 +102,12 @@ void cpu_init_early_f(void)
for (i = 0; i  sizeof(gd_t); i++)
((char *)gd)[i] = 0;
 
 +/*
 + * CONFIG_SYS_CCSRBAR_PHYS below may use gd-fdt_blob on ePAPR systems,
 + * so we need to populate it before it accesses it.
 + */
 +gd-fdt_blob = fdt;
 +
 
 Alex,
 
 I am thinking to add back #ifdef CONFIG_QEMU_E500 you had for your v3 and
 earlier version for the above change. Do you have any concerns?
 
 The reason I am proposing this is to use generic board architecture.
 gd-fdt_blob is used by some other functions to detect if device tree exists.
 Your change takes r3 from entry and treat it as device tree. It is not the 
 case
 for a normal metal SoC. I need to clear this variable.

No complaints at all from me here :)

Alex

 
 York
 
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Re: [U-Boot] [PATCH v4 6/6] PPC 85xx: Add qemu-ppce500 machine

On 04/28/2014 02:27 PM, Alexander Graf wrote:
 I am thinking to add back #ifdef CONFIG_QEMU_E500 you had for your v3 and
 earlier version for the above change. Do you have any concerns?

 The reason I am proposing this is to use generic board architecture.
 gd-fdt_blob is used by some other functions to detect if device tree exists.
 Your change takes r3 from entry and treat it as device tree. It is not the 
 case
 for a normal metal SoC. I need to clear this variable.
 
 No complaints at all from me here :)
 

Thanks. I will submit a patch to fix it.

York


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[U-Boot] [PATCH] usb: gadget: allow ci_udc to build with new gadget framework

From: Stephen Warren swar...@nvidia.com

Allow ci_udc.o to be built when using the new(?) USB gadget framework,
as enabled by CONFIG_USB_GADGET.

Note that this duplicates the Makefile entry for ci_udc.o, since it's
also included inside #ifdef CONFIG_USB_ETHER. I'm not sure what that
define means; perhaps an old style of Ethernet-specific USB gadget
implementation?

I wonder if the line that this patch adds shouldn't be outside all of
the ifdefs, so it stands on its own, similar to how e.g. epautoconf.o
is shared between the two?

Signed-off-by: Stephen Warren swar...@nvidia.com
---
 drivers/usb/gadget/Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 804a2bd412dd..896c8d407e4b 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -13,6 +13,7 @@ ifdef CONFIG_USB_GADGET
 obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o
 obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o
 obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o
+obj-$(CONFIG_CI_UDC)   += ci_udc.o
 obj-$(CONFIG_THOR_FUNCTION) += f_thor.o
 obj-$(CONFIG_USBDOWNLOAD_GADGET) += g_dnl.o
 obj-$(CONFIG_DFU_FUNCTION) += f_dfu.o
-- 
1.8.1.5

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Re: [U-Boot] [linux-sunxi] Uboot error: address not aligned in v7_dcache_inval_range

2014-04-28 Thread Marek Vasut

On Monday, April 28, 2014 at 09:55:46 PM, Ian Campbell wrote:
 On Sat, 2014-04-26 at 20:27 +0200, Marek Vasut wrote:
  On Saturday, April 19, 2014 at 03:30:14 PM, Ian Campbell wrote:
   On Sun, 2014-04-13 at 23:45 -0400, Shixin Zeng wrote:
Hi,

I compiled the current u-boot from
https://github.com/jwrdegoede/u-boot-sunxi.git for cubieboard2, and
wrote it to the SD card. I was trying to boot the kernel on my
computer over network by tftp, however it failed when I ran dhcp or
tftp command in uboot with a tons of:


ERROR: v7_dcache_inval_range - start address is not aligned -
0x7fb677e0 ERROR: v7_dcache_inval_range - stop address is not
aligned - 0x7fb67820
   
   I'm seeing this on Cubieboard2 and Cubietruck. It appears to be down to
   a change to the upstream designware driver:
   
   commit 50b0df814b0f75c08a3d45a017016a75af3edb5d
   Author: Alexey Brodkin alexey.brod...@synopsys.com
   Date:   Wed Jan 22 20:49:09 2014 +0400
   
   net/designware: make driver compatible with data cache
   
   Up until now this driver only worked with data cache disabled.
   To make it work with enabled data cache following changes were
   
   required:
* Flush Tx/Rx buffer descriptors their modification
* Invalidate Tx/Rx buffer descriptors before reading its values
* Flush cache for data passed from CPU to GMAC
* Invalidate cache for data passed from GMAC to CPU
   
   http://git.denx.de/?p=u-boot.git;a=commit;h=50b0df814b0f75c08a3d45a0170
   16a7 5af3edb5d
   
   I suppose this was only tested on some architecture which allows DMA
   flush/invaidation at a fairly fine granularity (at least down to 4 byte
   boundaries)
  
  This was a sheer luck this ever worked. Looking at the entire driver, to
  fix all your issues with DMA and caches, it would be sufficient to
  re-align struct dw_eth_dev properly.
  
  See drivers/net/designware.h:
  1) struct dmamacdescr {} is already __aligned(ARCH_DMA_MINALIGN)
  
 = This structure, if aligned in memory to proper boundary, can be
 flushed/
 
invalidated without problems.
  
  2) struct dw_eth_dev {} can be aligned to ANY 4-byte boundary
  
 But this structure contains two arrays of struct dmamacdescr {} ,
 which each have their elements' lenght aligned to ARCH_DMA_MINALIGN
  
  Solution:
  
  Your patch [1/3] and reorder the structure in designware.h so that the
  struct dmamacdescr tx_mac_descrtable[]
  struct dmamacdescr rx_mac_descrtable[]
  are first and anything that does not need to be aligned follows. This
  way, the DMA descriptors will always be aligned and you need not worry
  about the flushes. You don't even need to ROUNDUP their length, since
  they are already fine.
 
 Unfortunately this isn't sufficient, at least a change in the spirit of
 my second patch (to flush the entire descriptor) is also needed, because
 flushing just a subfield misaligns things again.

Ah, true. Your second patch is needed as well, sorry.

 And my patch 3/3 is still needed because it deals with the data itself
 and not the descriptors.

True.

 So having done all that it doesn't seem that reordering dw_eth_dev is
 necessary.

Reordering dw_eth_dev is necessary. Look:

108 struct dmamacdescr {// sizeof() = 0x10
109 u32 txrx_status;// +0x0
110 u32 dmamac_cntl;// +0x4
111 void *dmamac_addr;  // +0x8
112 struct dmamacdescr *dmamac_next;// +0xc
113 } __aligned(ARCH_DMA_MINALIGN); // total size = 0x40

217 struct dw_eth_dev {
218 u32 interface;// +0x0
219 u32 tx_currdescnum;   // +0x4
220 u32 rx_currdescnum;   // +0x8
221 
222 struct dmamacdescr tx_mac_descrtable[CONFIG_TX_DESCR_NUM];//+0xc

You do memalign() to allocate this. The .$interface ends up at address aligned 
to 64byte boundary (aka. it's cache aligned). Now, the structure is naturally 
aligned so tx_mac_descrtable[0] ends up at +0xc offset from the start of the 
structure , am I right ?

If I am wrong, then the compiler considers struct dmamacdescr {} as a one big 
chunk of data aligned to ARCH_DMA_MINALIGN boundary and thus inserts a big slop 
between rx_currdescnum and tx_mac_descrtable[0] to pad it correctly, which is 
not nice.

Reordering the structure will make sure there is no slop and there is no 
posibility of making tx_mac_descrtable unaligned ever.
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[U-Boot] [PATCH 2/2] common/board_f: Fix size variable

DRAM size should use 64-bit variable when the size could be more than 4GB.
Caught and verified on P4080DS with 4GB DDR.

Signed-off-by: York Sun york...@freescale.com
---
 common/board_f.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/board_f.c b/common/board_f.c
index 3a00b92..954605b 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -194,7 +194,7 @@ static int init_func_ram(void)
 
 static int show_dram_config(void)
 {
-   ulong size;
+   unsigned long long size;
 
 #ifdef CONFIG_NR_DRAM_BANKS
int i;
-- 
1.7.9.5

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[U-Boot] [PATCH 1/2] common/board_f: Add back gd init

For powerpc SoCs, the initial gd is in INIT_RAM, in most cases, resideing
in locked D-cache. At the time the function baord_inti_f() runs, no other
RAM is available as a stack. This technique has been used in
arch/powerpc/lib/board.c and should be added to generic board for powerpc.

Signed-off-by: York Sun york...@freescale.com
---
 common/board_f.c |5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/common/board_f.c b/common/board_f.c
index cbdf06f..3a00b92 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -970,7 +970,10 @@ static init_fnc_t init_sequence_f[] = {
 
 void board_init_f(ulong boot_flags)
 {
-#ifndef CONFIG_X86
+#ifdef CONFIG_PPC
+   gd = (gd_t *)(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
+   __asm__ __volatile__( : : : memory);
+#elif !defined(CONFIG_X86)
gd_t data;
 
gd = data;
-- 
1.7.9.5

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[U-Boot] [PATCH 3/4] powerpc/mpc85xx: Fix argument for calling board_init_f

baord_init_f takes one argument. It has not been used for powerpc, until
recently changing to use generic board architecture.

Signed-off-by: York Sun york...@freescale.com
---
 arch/powerpc/cpu/mpc85xx/start.S |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 0e3c86a..5f6f97b 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -1159,6 +1159,7 @@ _start_cont:
isync
 
bl  cpu_init_f
+   li  r3, 0
bl  board_init_f
isync
 
-- 
1.7.9.5

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[U-Boot] [PATCH 1/4] powerpc/mpc85xx: Ignore FDT pointer for non-QEMU in cpu_init_early_f()

The pointer of device tree comes from r3 for QEMU. This is not the case
for normal SoCs out of reset. Having gd-fdt_blob as 0 is important for
other functions to detect the non-existence of device tree.

Signed-off-by: York Sun york...@freescale.com
CC: Alexander Graf ag...@suse.de
---
 arch/powerpc/cpu/mpc85xx/cpu_init_early.c |2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c 
b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
index 998781b..47b712d 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
@@ -102,11 +102,13 @@ void cpu_init_early_f(void *fdt)
for (i = 0; i  sizeof(gd_t); i++)
((char *)gd)[i] = 0;
 
+#ifdef CONFIG_QEMU_E500
/*
 * CONFIG_SYS_CCSRBAR_PHYS below may use gd-fdt_blob on ePAPR systems,
 * so we need to populate it before it accesses it.
 */
gd-fdt_blob = fdt;
+#endif
 
mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(13);
mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_TS | MAS1_TSIZE(BOOKE_PAGESZ_1M);
-- 
1.7.9.5

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[U-Boot] [PATCH 4/4] powerpc/freescale: Convert selected boards to generic board architecture

This patch converts the following boards to use generic board: MPC8536DS,
MPC8572DS, MPC8641HPCN, p1_p2_rdb_pc, corenet_ds, t4qds, B4860QDS. It has
been tested on NOR boot on MPC8536DS, MPC8572DS, P1021RDB, P4080DS,
P5020DS, P5040DS, P3041DS, T4240QDS, B4860QDS.

Signed-off-by: York Sun york...@freescale.com
CC: Ying Zhang b40...@freescale.com
CC: Prabhakar Kushwaha prabha...@freescale.com
CC: Haijun.Zhang haijun.zh...@freescale.com
CC: Scott Wood scottw...@freescale.com
CC: Shaohui Xie shaohui@freescale.com
---
 include/configs/B4860QDS.h |3 +++
 include/configs/MPC8536DS.h|2 ++
 include/configs/MPC8572DS.h|3 +++
 include/configs/MPC8641HPCN.h  |3 +++
 include/configs/corenet_ds.h   |3 +++
 include/configs/p1_p2_rdb_pc.h |3 +++
 include/configs/t4qds.h|2 ++
 7 files changed, 19 insertions(+)

diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index df371b7..e0c08dc 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -7,6 +7,9 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
+
 /*
  * B4860 QDS board configuration file
  */
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index f15e162..72f5fde 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -11,6 +11,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
 #include ../board/freescale/common/ics307_clk.h
 
 #ifdef CONFIG_36BIT
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 3a30feb..48ae9d4 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -11,6 +11,9 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
+
 #include ../board/freescale/common/ics307_clk.h
 
 #ifdef CONFIG_36BIT
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 7443ace..a0d7d52 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -16,6 +16,9 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
+
 /* High Level Configuration Options */
 #define CONFIG_MPC8641 1   /* MPC8641 specific */
 #define CONFIG_MPC8641HPCN 1   /* MPC8641HPCN board specific */
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index db6b9be..c8b7c2d 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -10,6 +10,9 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
+
 #include ../board/freescale/common/ics307_clk.h
 
 #ifdef CONFIG_RAMBOOT_PBL
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index e745945..56b638e 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -10,6 +10,9 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
+
 #ifdef CONFIG_36BIT
 #define CONFIG_PHYS_64BIT
 #endif
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index 36bc529..75609b9 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -10,6 +10,8 @@
 #ifndef __T4QDS_H
 #define __T4QDS_H
 
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
 #define CONFIG_CMD_REGINFO
 
 /* High Level Configuration Options */
-- 
1.7.9.5

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[U-Boot] [PATCH 2/4] powerpc/freescale: Change the return value of mac_read_from_eeprom()

The return value has not been checked by its caller, until recent change
of using generic board architecture. The error of this function is not
critical enough to hang the system. Printing the warning message is enough
to catch user's attention. U-boot should continue to boot to give user
a chance to fix the EEPROM. Chaning the return value to 0 to avoid hanging
in the board_init_r().

Signed-off-by: York Sun york...@freescale.com
---
 board/freescale/common/sys_eeprom.c |6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/board/freescale/common/sys_eeprom.c 
b/board/freescale/common/sys_eeprom.c
index 9c18dd8..33a5a5a 100644
--- a/board/freescale/common/sys_eeprom.c
+++ b/board/freescale/common/sys_eeprom.c
@@ -425,13 +425,13 @@ int mac_read_from_eeprom(void)
 
if (read_eeprom()) {
printf(Read failed.\n);
-   return -1;
+   return 0;
}
 
if (!is_valid) {
printf(Invalid ID (%02x %02x %02x %02x)\n,
   e.id[0], e.id[1], e.id[2], e.id[3]);
-   return -1;
+   return 0;
}
 
 #ifdef CONFIG_SYS_I2C_EEPROM_NXID
@@ -447,7 +447,7 @@ int mac_read_from_eeprom(void)
crcp = (void *)e + crc_offset;
if (crc != be32_to_cpu(*crcp)) {
printf(CRC mismatch (%08x != %08x)\n, crc, 
be32_to_cpu(e.crc));
-   return -1;
+   return 0;
}
 
 #ifdef CONFIG_SYS_I2C_EEPROM_NXID
-- 
1.7.9.5

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Re: [U-Boot] [Ac100] [PATCH v2 5/6] ARM: tegra: paz00: add dt bindings for nvec

On 04/26/2014 07:14 PM, Andrey Danin wrote:

This patch isn't adding DT bindings for NVEC, but rather add DT nodes.
The binding is the schema, not the content.

We need a DT binding document that's been reviewed by the DT binding
maintainers. Can you please first submit a patch to the Linux kernel
that modifies the existing I2C core and Tegra I2C controller binding
documentation to add slave mode support. Once that's fully reviewed and
ack'd, this patch series can implement support for it in U-Boot.

 diff --git a/arch/arm/dts/tegra20-paz00.dts b/arch/arm/dts/tegra20-paz00.dts

   i2c@7000c500 {
 - status = disabled;
 + status = okay;
 + clock-frequency = 4;
 + slave-addr = 138;
 + nvec {
 + compatible = nvidia,tegra20-nvec;
 + request-gpios = gpio 170 0; /* gpio PV2 */

The reg property is missing here. Since the i2c node has
#address-cells/#size-cells, there must be a reg property in the children.

There's nothing here to indicate that this node is a slave device rather
than a master device, and doesn't seem to be any allowance for a single
I2C controller to support both master and slave nodes at the same time
(which I think Tegra's controller can IIRC).

IIRC, I had previously suggested something like encoding master/slave
into the reg property of the I2C child nodes. We could either do:

a) Set some top-bit to indicate a slave device.

b) If #address-cells=1, only master devices are present. If
#address-cells=2, either master or slave devices could be present.
Cell 0 could be 0==master, 1==slave, and cell 1 the actual I2C bus address.

Either of those approaches would allow representing an I2C controller
that supported multiple slave addresses. Even though I think Tegra's
slave controller doesn't support that, I still think we should use a
generic binding so that I2C slave mode looks the same everywhere.
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Re: [U-Boot] [Ac100] [PATCH v2 1/6] i2c: add slave mode support

On 04/26/2014 07:14 PM, Andrey Danin wrote:
 Signed-off-by: Andrey Danin danind...@mail.ru
 CC: Stephen Warren swar...@nvidia.com
 CC: Marc Dietrich marvi...@gmx.de
 CC: Julian Andres Klode j...@jak-linux.org
 CC: ac...@lists.launchpad.net

Don't you want to CC the I2C maintainer, Heiko Schocher h...@denx.de, on
this series?
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[U-Boot] [PATCH] iomux-v3: Add support for mx6sl LVE bit

2014-04-28 Thread Fabio Estevam

From: Fabio Estevam fabio.este...@freescale.com

On mx6sl there is a LVE (Low Voltage Enable) in the IOMUXC_SW_PAD_CTL register.

LVE is bit 22 of IOMUXC_SW_PAD_CTL register, but in order to make the 
calculation easier we can define it as bit 17 as this bit is unused and fits the
current MUX_PAD_CTRL_MASK mask.

Add support for it.

Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
 arch/arm/imx-common/iomux-v3.c | 8 
 arch/arm/include/asm/imx-common/iomux-v3.h | 2 ++
 2 files changed, 10 insertions(+)

diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c
index b59b802..6e46ea8 100644
--- a/arch/arm/imx-common/iomux-v3.c
+++ b/arch/arm/imx-common/iomux-v3.c
@@ -30,6 +30,14 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
(pad  MUX_PAD_CTRL_OFS_MASK)  MUX_PAD_CTRL_OFS_SHIFT;
u32 pad_ctrl = (pad  MUX_PAD_CTRL_MASK)  MUX_PAD_CTRL_SHIFT;
 
+#if defined CONFIG_MX6SL
+   /* Check whether LVE bit needs to be set */
+   if (pad_ctrl  PAD_CTL_LVE) {
+   pad_ctrl = ~PAD_CTL_LVE;
+   pad_ctrl |= PAD_CTL_LVE_BIT;
+   }
+#endif
+
if (mux_ctrl_ofs)
__raw_writel(mux_mode, base + mux_ctrl_ofs);
 
diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h 
b/arch/arm/include/asm/imx-common/iomux-v3.h
index dec11a1..6d3561f 100644
--- a/arch/arm/include/asm/imx-common/iomux-v3.h
+++ b/arch/arm/include/asm/imx-common/iomux-v3.h
@@ -88,6 +88,8 @@ typedef u64 iomux_v3_cfg_t;
 #ifdef CONFIG_MX6
 
 #define PAD_CTL_HYS(1  16)
+#define PAD_CTL_LVE(1  17)
+#define PAD_CTL_LVE_BIT(1  22)
 
 #define PAD_CTL_PUS_100K_DOWN  (0  14 | PAD_CTL_PUE)
 #define PAD_CTL_PUS_47K_UP (1  14 | PAD_CTL_PUE)
-- 
1.8.3.2

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Re: [U-Boot] [Ac100] [PATCH v2 4/6] ARM: tegra: nvec: add keyboard support