The current approach set the initial value of crc32 calculation to zero,
which is correct for calculating checksum of the whole chunk of data.
It however, lacks the flexibility, when one wants to calculate CRC32 of
a file comprised of many smaller parts received separately.
In the proposed
Hi Masahiro,
On 05/07/2014 07:47 AM, Masahiro Yamada wrote:
Hi Michal,
Sorry for late reply. (I'm back from my vacations.)
No problem at all.
Before you build u-boot you have to copy ps7_init.c/h from your
hw design to the u-boot if you want to use SPL.
Oops, I forgot to mention this.
I
Hi Scott,
On Thu, 1 May 2014 13:21:08 -0500
Scott Wood scottw...@freescale.com wrote:
On Thu, 2014-04-24 at 14:04 +0900, Masahiro Yamada wrote:
+config KCONFIG_OBJDIR
+ string
+ option env=KCONFIG_OBJDIR
+
+config BUILD_MODE
+ string
+ default SPL if $KCONFIG_OBJDIR=spl/
Hi Rob,
From: Rob Herring r...@kernel.org
This is the 3nd version since I revived the fastboot patches
Sebastian submitted.
I'm reviving the Android Fastboot support after 2+ years since the
last posting[1]. The previous postings had some questions about
licensing and source of some
On Fri, May 02 2014 at 9:13:08 pm BST, Jon Loeliger loeli...@gmail.com wrote:
On Sat, Apr 26, 2014 at 7:17 AM, Marc Zyngier marc.zyng...@arm.com wrote:
diff --git a/arch/arm/cpu/armv7/virt-dt.c b/arch/arm/cpu/armv7/virt-dt.c
new file mode 100644
index 000..0b0d6a7
--- /dev/null
+++
On Fri, May 02 2014 at 9:30:05 pm BST, Jon Loeliger loeli...@gmail.com wrote:
Hi Jon,
I finally have all this working for me on an A9 system too!
Awesome! Ship it! ;-)
However, there were a few things that I had to change a bit.
For example, by CPUs will always come out of reset at 0x0
On Fri, May 02 2014 at 10:03:37 pm BST, Jon Loeliger loeli...@gmail.com wrote:
Mark,
In your nonsec_init code, you suggest this change:
+ mrc p15, 0, r0, c1, c1, 2
movwr1, #0x3fff
- movtr1, #0x0006
- mcr p15, 0, r1, c1, c1, 2 @ NSACR =
Hello Simon,
Am 05.05.2014 20:31, schrieb Simon Glass:
Hi Wolfgang,
On 5 May 2014 11:55, Wolfgang Denkw...@denx.de wrote:
Dear Simon,
In messageCAPnjgZ2-qC8YK8t2DvmzXWKy3Wd+=7VY1Ti=jm98lf96plf...@mail.gmail.com
you wrote:
Should we not prevent booting uImages or not signed FIT Images
On Mon, May 05 2014 at 3:34:31 pm BST, Jon Loeliger loeli...@gmail.com wrote:
Mark,
Not sure on which patch of your series to base the following comment,
but thought it was worth bringing up for discussion nevertheless.
So, over in U-Boot ARMv7's arch/arm/cpu/armv7/start.S code, there
is
Hey guys, I am new to u-Boot and New to porting android software /
bootloaders ETC,... to new hardware.
I Posses the 2 following samsung devices, 1) The Samsung Tab Pro 10.1
SM-T520 product name Picassowifi and 2) the Canadian d2LTE qualcom Galaxy s3
I desire to port u-Boot to the SM-T520 and I
Dear Lukasz Majewski,
On 09/04/14 17:44, Lukasz Majewski wrote:
During providing device tree support for Exynos4 based boards,
a tiny mistake has creeped in the 1ecab0f commit.
This commit restores proper setting of default console for the
trats2 board.
Signed-off-by: Lukasz Majewski
Dear Lukasz Majewski,
On 09/04/14 17:44, Lukasz Majewski wrote:
During providing device tree support for Exynos4 based boards,
a tiny mistake has creeped in the fe60164 commit.
This commit restores proper setting of default console for the
trats board.
Signed-off-by: Lukasz Majewski
Dear Przemyslaw Marczak,
On 06/05/14 17:45, Przemyslaw Marczak wrote:
Hello Minkyu,
On 05/05/2014 03:27 PM, Minkyu Kang wrote:
Dear Przemyslaw Marczak,
On 30 April 2014 20:28, Przemyslaw Marczak p.marc...@samsung.com
mailto:p.marc...@samsung.com wrote:
This change removes LCD menu
The commits
commit b7b5f1a16ca66dfdd817e7339f0e263a5b9f2758
Author: Albert ARIBAUD albert.u.b...@aribaud.net
da850evm, da850_am18xxevm: convert to CONFIG_SPL_MAX_FOOTPRINT
and
commit e7497891e34efe5cb2b3a3dc7c6c096c012ede28
Author: Albert ARIBAUD albert.u.b...@aribaud.net
cam_enc_4xx: convert
We need check the NULL pointer as at91_pio_get_port() may return NULL.
Also print a error message when at91_pio_get_port() failed otherwise we
cannot notice the failure.
Signed-off-by: Josh Wu josh...@atmel.com
---
drivers/gpio/at91_gpio.c |3 ++-
1 file changed, 2 insertions(+), 1
On Wednesday, May 07, 2014 at 08:10:20 AM, Lukasz Majewski wrote:
[...]
--- a/lib/crc32.c
+++ b/lib/crc32.c
@@ -255,9 +255,12 @@ uint32_t ZEXPORT crc32_wd (uint32_t crc,
void crc32_wd_buf(const unsigned char *input, unsigned int ilen,
unsigned char *output, unsigned int
B4460 differs from B4860 only in number of CPU cores,
hence used existing support for B4860.
B4460 has 2 PPC cores whereas B4860 has 4 PPC cores.
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Sandeep Singh sand...@freescale.com
Signed-off-by: Poonam Aggrwal
On 30/04/14 09:09, Jaehoon Chung wrote:
mmc boot command didn't use anywhere.
It can be replace mmc dev command.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
---
Changelog v2:
- Fixed the different address for loading and uploading.
Signed-off-by: Josh Wu josh...@atmel.com
---
drivers/mmc/gen_atmel_mci.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c
index acca026..eb2fe1c 100644
--- a/drivers/mmc/gen_atmel_mci.c
+++
Hello ,
I am a newbie to linux internals.I am trying to do a firmware
updation scheme by combining ubl,uboot,kernel and filesystem for davinci
processor.i suceed in making an image comprising of all four. I am confused
whether this scheme works or not. I dont know how to integrate the
Hi Tim,
On 06/05/2014 20:18, Tim Harvey wrote:
Stefano / York,
While preparing for a v3 patch series of my IMX6 SPL bootloader, I
find that commit dec1861be90c948ea9fb771927d3d26a994d2e20 [1] breaks
the above code because gd is now needed within setup_i2c.
I've always been a bit fuzzy
Hi Marek,
On Wednesday, May 07, 2014 at 08:10:20 AM, Lukasz Majewski wrote:
[...]
--- a/lib/crc32.c
+++ b/lib/crc32.c
@@ -255,9 +255,12 @@ uint32_t ZEXPORT crc32_wd (uint32_t crc,
void crc32_wd_buf(const unsigned char *input, unsigned int ilen,
unsigned char *output,
Dear Lukasz Majewski,
In message 1399443021-11748-1-git-send-email-l.majew...@samsung.com you wrote:
The current approach set the initial value of crc32 calculation to zero,
which is correct for calculating checksum of the whole chunk of data.
...
+ if (*output)
+ memcpy(crc,
Hi Krunal,
sorry for delay.
On 04/25/2014 06:19 PM, Krunal Desai wrote:
Hi all -
I noticed that in zynq_sdhci.c, responsible for initializing PS SD
controller(s), host controller max clock frequency is always set to 52MHz
Hi Wolfgang,
Dear Lukasz Majewski,
In message 1399443021-11748-1-git-send-email-l.majew...@samsung.com
you wrote:
The current approach set the initial value of crc32 calculation to
zero, which is correct for calculating checksum of the whole chunk
of data.
...
+ if (*output)
+
On Tue, May 06, 2014 at 04:56:08PM -0700, Ash Charles wrote:
On Tue, May 6, 2014 at 11:14 AM, Tom Rini tr...@ti.com wrote:
Please see DEFAULT_LINUX_BOOT_ENV and the related discussions. If you
have less than 128MB DDR we can sort something out, but if you have
256MB it's really advised to
The current approach set the initial value of crc32 calculation to zero,
which is correct for calculating checksum of the whole chunk of data.
It however, lacks the flexibility, when one wants to calculate CRC32 of
a file comprised of many smaller parts received separately.
In the proposed
No functional changes.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2: None
board/esd/pmc440/fpga.c | 2 +-
board/matrix_vision/mvsmr/fpga.c | 2 +-
drivers/fpga/spartan2.c | 40
drivers/fpga/xilinx.c
No functional changes.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2: None
board/armadeus/apf27/fpga.c | 4 ++--
board/astro/mcf5373l/fpga.c | 4 ++--
board/balloon3/balloon3.c| 2 +-
board/esd/pmc440/fpga.c | 4 ++--
No functional changes.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2: None
board/armadeus/apf27/fpga.c | 2 +-
board/astro/mcf5373l/fpga.c | 2 +-
board/balloon3/balloon3.c| 2 +-
board/esd/pmc440/fpga.c | 2 +-
No functional changes.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2: None
board/gen860t/fpga.c | 4 ++--
drivers/fpga/virtex2.c | 34 +-
drivers/fpga/xilinx.c | 14 +++---
include/virtex2.h | 34
No functional changes.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
- Fix compilation errors in Astro
board/astro/mcf5373l/fpga.c | 38 +++---
include/spartan2.h | 40
include/spartan3.h
Warnings:
drivers/fpga/zynqpl.c:150:32: warning: Using plain integer as NULL pointer
drivers/fpga/zynqpl.c:152:16: warning: Using plain integer as NULL pointer
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2: None
drivers/fpga/zynqpl.c | 4 ++--
1 file changed, 2
From: Siva Durga Prasad Paladugu siva.durga.palad...@xilinx.com
Use zynq_dma_xfer_init, zynq_align_dma_buffer,
zynq_dma_transfer helper function performing dma
transfers so that the code can be reused easily for
different cases of dma transfer.
Signed-off-by: Siva Durga Prasad Paladugu
Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
- Exchange fpga_op and name in xilinx_desc because spartan2/3,
From: Siva Durga Prasad Paladugu siva.durga.palad...@xilinx.com
Use helper function zynq_validate_bitstream so that the
code can be reused easily for different cases of dma transfer.
Signed-off-by: Siva Durga Prasad Paladugu siva...@xilinx.com
Signed-off-by: Michal Simek michal.si...@xilinx.com
Hi,
Tom reported me one warning in spear board and I have run
buildman for all boards which have xilinx_desc in board folder.
Below is the report for this patch series.
Thanks,
Michal
[u-boot]$ ./tools/buildman/buildman -b xnext/fpga apf27 zynq spear astro
balloon3 pmc440 gen860t mvsmr
Introduce new APIs to write fsl usb registers that have w1c bits.
Existing API framework do not take care of w1c bits
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com
---
drivers/usb/host/ehci-fsl.c | 17 -
On Wed, 2014-05-07 at 10:09 +0800, Xuebing Wang wrote:
On 05/04/2014 07:33 PM, Jeroen Hofstee wrote:
Hello Xuebing, (freebsd-arm added on cc),
On di, 2014-04-08 at 16:52 +0800, Xuebing Wang wrote:
Hi u-boot community,
I am trying to port u-boot (release u-boot-2014.04-rc3.tar.bz2) to
On Wed, May 7, 2014 at 2:05 AM, Marc Zyngier marc.zyng...@arm.com wrote:
On Fri, May 02 2014 at 10:03:37 pm BST, Jon Loeliger loeli...@gmail.com
wrote:
Mark,
In your nonsec_init code, you suggest this change:
+ mrc p15, 0, r0, c1, c1, 2
movwr1, #0x3fff
- movt
/*
* With the Secure Monitor at 0x0, its reset vector must also
* then point off to the correct out-of-reset entry function.
*/
#define CONFIG_SECURE_MONITOR_RESET_FUNCTION_myplatform_cpu_entry
#define CONFIG_ARMV7_SECURE_BASE0x0
That _myplatform_cpu_entry corresponds to your
This adds the Gumstix Pepper[1] single-board computer based on the
TI AM335x processor. Schematics are available [2].
[1] https://store.gumstix.com/index.php/products/344/
[2] https://pubs.gumstix.com/boards/PEPPER/
Signed-off-by: Ash Charles a...@gumstix.com
Cc: Tom Rini tr...@ti.com
---
On May 6, 2014, at 7:09 PM, Xuebing Wang xbi...@gmail.com wrote:
2) Would you please point to me which revision that reserves both r8 and r9?
r258527 | andrew | 2013-11-24 12:33:38 -0800 (Sun, 24 Nov 2013) | 3 lines
On May 7, 2014, at 8:02 AM, Tim Kientzle t...@kientzle.com wrote:
On May 6, 2014, at 7:09 PM, Xuebing Wang xbi...@gmail.com wrote:
2) Would you please point to me which revision that reserves both r8 and r9?
Hi!
I know that mainline U-Boot SPL is quite far from working on
socfpga... but would like to ask, what is the status of U-Boot
proper. That should work on socfpga, right? Or are there some pieces
missing?
I tried
commit 173d294b94cfec10063a5be40934d6d8fb7981ce
Merge: 33b0f7b 870e0bd
Author:
On Tue, May 6, 2014 at 11:06 AM, Tom Rini tr...@ti.com wrote:
You really are using uImage and not zImage for this board, but not for
pepper?
As with Pepper, the default kernel for this DuoVero board is currently
a uImage. We're moving to a device tree kernel but having the
fall-back to uImage,
This adds the Gumstix DuoVero machine [1]. This is a OMAP4430-based
computer-on-module (COM aka SOM) that can be mounted on various
expansion boards with different peripherals.
[1] https://store.gumstix.com/index.php/category/43/
Signed-off-by: Ash Charles a...@gumstix.com
Cc: Tom Rini
On 05/06/2014 04:35 PM, Tim Harvey wrote:
On Tue, May 6, 2014 at 12:11 PM, Jeroen Hofstee dasub...@myspectrum.nl
wrote:
Hello Tim,
snip
Since Crt0.S already created gd on the stack before calling
board_init_f, can't the assignment of gd not simply be removed?
Is there anything special
On 06/05/14 07:35, Tim Harvey wrote:
On Tue, Apr 29, 2014 at 8:22 AM, Eric Nelson
eric.nel...@boundarydevices.com wrote:
snip
The function name ..._array() also doesn't really capture what's
going on here. Naming is hard though, and I'm not coming up
with something else.
Perhaps 'sparse',
On 28/04/14 23:17, Tim Harvey wrote:
Add a common header which can hopefully be shared amon imx6 SPL users
Signed-off-by: Tim Harvey thar...@gateworks.com
---
v2:
- adjust CONFIG_SPL_TEXT_BASE, CONFIG_SPL_STACK and CONFIG_SPL_MAX_SIZE
to accomodate the IMX6SOLO/DUALLITE which have half the
On Wed, May 7, 2014 at 5:40 AM, Tom Rini tr...@ti.com wrote:
I'd like to start by seeing if we can adopt the files (ti_omap3_common.h
which grabs ti_armv7_common.h). The intention is to have the
really common parts there and the board specific elsewhere. It's indeed
not quite perfect and we
Clean-up the board configuration file for the Gumstix Overo board by
including common omap3 definitions from ti_omap3_common.h as suggested
here [1].
[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/185960
Signed-off-by: Ash Charles ashchar...@gmail.com
---
Dear Nikhil Badola,
In message 1399468595-953-1-git-send-email-nikhil.bad...@freescale.com you
wrote:
Introduce new APIs to write fsl usb registers that have w1c bits.
Existing API framework do not take care of w1c bits
Why exactly do we need a new API for that? All you'r doing is adding
From: Stephen Warren swar...@nvidia.com
This enables specifying which eMMC HW partition to target for any U-Boot
command that uses the generic get_partition() function to parse its
command-line arguments.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
disk/part.c | 6 +-
From: Stephen Warren swar...@nvidia.com
The implementation of mmc_select_hwpart() was cribbed from do_mmcops().
Update do_mmcops() to call mmc_select_hwpart() to avoid duplication.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
common/cmd_mmc.c | 19 +--
1 file changed, 5
From: Stephen Warren swar...@nvidia.com
Some device types (e.g. eMMC) have hardware-level partitions (for eMMC,
separate boot and user data partitions). This change allows the user to
specify the HW partition they wish to access when passing a device ID to
U-Boot Commands such as part, ls, load,
From: Stephen Warren swar...@nvidia.com
All the sub-commands start with the main command anme, but it was
missing from one of the help texts.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
common/cmd_part.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Wed, May 7, 2014 at 3:19 PM, Stephen Warren swar...@wwwdotorg.org wrote:
+int mmc_select_hwpart(int dev_num, int hwpart)
+{
+ struct mmc *mmc = find_mmc_device(dev_num);
+ int ret;
+
+ if (!mmc)
+ return -1;
+
+ if (mmc-part_num == hwpart)
+
On 05/07/2014 12:22 PM, Fabio Estevam wrote:
On Wed, May 7, 2014 at 3:19 PM, Stephen Warren swar...@wwwdotorg.org wrote:
+int mmc_select_hwpart(int dev_num, int hwpart)
...
+ ret = mmc_switch_part(dev_num, hwpart);
+ if (ret)
+ return -1;
Can't you return more
Hi,
On wo, 2014-05-07 at 09:14 -0700, York Sun wrote:
snip
Since Crt0.S already created gd on the stack before calling
board_init_f, can't the assignment of gd not simply be removed?
Is there anything special about gdata?
That does make sense, but what I find is that York's ocmmit
On Sat, 2014-02-15 at 13:36 +, Marc Zyngier wrote:
@@ -32,5 +33,11 @@ int arch_fixup_fdt(void *blob)
size[bank] = bd-bi_dram[bank].size;
}
- return fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
+ ret = fdt_fixup_memory_banks(blob, start,
Hi Stephen,
I was just porting this change to barebox and stumbled upon a few errors
here.
Am Donnerstag, den 24.04.2014, 13:30 -0600 schrieb Stephen Warren:
From: Stephen Warren swar...@nvidia.com
[...]
diff --git a/arch/arm/cpu/arm720t/tegra30/cpu.c
b/arch/arm/cpu/arm720t/tegra30/cpu.c
On 05/07/2014 01:57 PM, Lucas Stach wrote:
Hi Stephen,
I was just porting this change to barebox and stumbled upon a few errors
here.
Wow, I suck. Thanks for the heads up. I'll repost a fixed up version soon.
Am Donnerstag, den 24.04.2014, 13:30 -0600 schrieb Stephen Warren:
diff --git
On Wed, May 7, 2014 at 9:14 AM, York Sun york...@freescale.com wrote:
On 05/06/2014 04:35 PM, Tim Harvey wrote:
On Tue, May 6, 2014 at 12:11 PM, Jeroen Hofstee dasub...@myspectrum.nl
wrote:
Hello Tim,
snip
Since Crt0.S already created gd on the stack before calling
board_init_f, can't
On 05/07/2014 01:27 PM, Tim Harvey wrote:
On Wed, May 7, 2014 at 9:14 AM, York Sun york...@freescale.com wrote:
On 05/06/2014 04:35 PM, Tim Harvey wrote:
On Tue, May 6, 2014 at 12:11 PM, Jeroen Hofstee dasub...@myspectrum.nl
wrote:
Hello Tim,
snip
Since Crt0.S already created gd on the
On Wed, May 7, 2014 at 1:29 PM, York Sun york...@freescale.com wrote:
On 05/07/2014 01:27 PM, Tim Harvey wrote:
On Wed, May 7, 2014 at 9:14 AM, York Sun york...@freescale.com wrote:
On 05/06/2014 04:35 PM, Tim Harvey wrote:
On Tue, May 6, 2014 at 12:11 PM, Jeroen Hofstee dasub...@myspectrum.nl
On 05/07/2014 01:35 PM, Tim Harvey wrote:
On Wed, May 7, 2014 at 1:29 PM, York Sun york...@freescale.com wrote:
On 05/07/2014 01:27 PM, Tim Harvey wrote:
On Wed, May 7, 2014 at 9:14 AM, York Sun york...@freescale.com wrote:
On 05/06/2014 04:35 PM, Tim Harvey wrote:
On Tue, May 6, 2014 at
On Tuesday, May 06, 2014 at 01:48:11 AM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
Modify ci_ep_alloc_request() to return a dynamically allocated request
object, rather than a singleton that's part of the endpoint. This
requires moving various state from the endpoint
On Tuesday, May 06, 2014 at 11:29:32 AM, Lukasz Majewski wrote:
Hi Marek,
The following changes since commit
af41d6b4cb1602abebaaa9c8774a9b0ece564796:
common: fixed linker-list example (2014-05-05 10:24:13 +0200)
are available in the git repository at:
On Tuesday, May 06, 2014 at 01:48:12 AM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
Now that the ci_udc driver supports allocating multiple requests per
endpoint, we can revert the special-case added by a022c1e13c01 usb:
ums: use only 1 buffer for CI_UDC.
Signed-off-by:
Hi Stephen and Masahiro
On 6 May 2014 20:15, Masahiro Yamada yamad...@jp.panasonic.com wrote:
Hi Simon, Stephen,
On Mon, 05 May 2014 10:54:52 -0600
Stephen Warren swar...@wwwdotorg.org wrote:
On 05/05/2014 10:09 AM, Simon Glass wrote:
Linux supports this, and if we are to have
Hi Heiko,
On 7 May 2014 01:06, Heiko Schocher h...@denx.de wrote:
Hello Simon,
Am 05.05.2014 20:31, schrieb Simon Glass:
Hi Wolfgang,
On 5 May 2014 11:55, Wolfgang Denkw...@denx.de wrote:
Dear Simon,
In messageCAPnjgZ2-qC8YK8t2DvmzXWKy3Wd+=7VY1Ti=Jm
98lf96plf...@mail.gmail.com you
Hi Lukasz,
On 7 May 2014 06:57, Lukasz Majewski l.majew...@samsung.com wrote:
The current approach set the initial value of crc32 calculation to zero,
which is correct for calculating checksum of the whole chunk of data.
It however, lacks the flexibility, when one wants to calculate CRC32 of
Hi Stephen,
On 5 May 2014 10:57, Stephen Warren swar...@wwwdotorg.org wrote:
On 05/05/2014 10:09 AM, Simon Glass wrote:
These files are taken from Linux 3.14.
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
This looks good. Can the patch be extended to all tegra*.dtsi
On 30/04/14 20:28, Przemyslaw Marczak wrote:
Increase menu loop delay to 200 ms helps choose the right
menu option by user. Before this, each time key was pressed
the current menu option was changed few times.
Now it changes only once and also changes few times if key
is pressed for a longer
On 30/04/14 20:28, Przemyslaw Marczak wrote:
This menu option allows restore gpt.
This is usefull and no needs access to the u-boot console.
For proper operation:
- each partition uuid should be set in environment or
- CONFIG_RANDOM_UUID should be defined for automatically uuid setting
On 30/04/14 20:28, Przemyslaw Marczak wrote:
Function cmd_process() runs commands with directly given list of arguments
but it doesn't expand given environmental variables names as macros.
Command gpt as one of arguments expects expanded macro e.g. $partitions
so it needs to be called by
On 30/04/14 20:28, Przemyslaw Marczak wrote:
This change removes LCD menu download mode info screen.
Now key press timeout is checked in function download_menu()
and menu options are displayed directly after PWR + VOLUP keys.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc:
On 30/04/14 20:28, Przemyslaw Marczak wrote:
From: Inha Song ideal.s...@samsung.com
This change allows reset device environment to default without using u-boot
console, which is useful for system developers.
Signed-off-by: Inha Song ideal.s...@samsung.com
Acked-by: Przemyslaw Marczak
On Wed, May 7, 2014 at 9:59 AM, Nikita Kiryanov nik...@compulab.co.il wrote:
On 06/05/14 07:35, Tim Harvey wrote:
On Tue, Apr 29, 2014 at 8:22 AM, Eric Nelson
eric.nel...@boundarydevices.com wrote:
snip
The function name ..._array() also doesn't really capture what's
going on here.
Hi Simon,
The maintainer field of chromebook-x86 is blank.
Active x86 x86corebootchromebook-x86 coreboot
coreboot-x86
coreboot:SYS_TEXT_BASE=0x0111
Hello Tom,
please pull from u-boot-i2c.git, thanks!
The following changes since commit 173d294b94cfec10063a5be40934d6d8fb7981ce:
Merge branch 'serial' of git://www.denx.de/git/u-boot-microblaze (2014-05-06
14:55:45 -0400)
are available in the git repository at:
We only need to read in the size of struct image_header and thus don't
need to know the page size of the nand device.
Cc: Scott Wood scottw...@freescale.com
Signed-off-by: Tim Harvey thar...@gateworks.com
Acked-by: Stefano Babic sba...@denx.de
Acked-by: Scott Wood scottw...@freescale.com
---
v3:
This series adds some necessary framework for IMX6 SPL support. The series
includes support for NAND SPL and has been tested with MMC as well. I have
tested this on five differing Ventana baseboards with a variety of memory
(32bit 512MB, 32bit 1024MB, 64bit 1024MB) and CPU configurations (IMX6Q,
Add comment block for the imx_ddr_size function and remove the extra unused
fields from struct esd_mmdc_regs which are also not common between IMX53 and
IMX6.
Signed-off-by: Tim Harvey thar...@gateworks.com
Acked-by: Stefano Babic sba...@denx.de
---
v3:
- fixed doxygen-style comment block
-
Add a common spl.c file to support boot device functions needed for SPL
such as detecting the boot device.
Signed-off-by: Tim Harvey thar...@gateworks.com
---
v3:
- added Freescale copyright
v2:
- re-base on top of Masahiro Yamada's consolidation patch:
This utilizes existing mxs_nand support layer to provide a method to load an
image off nand for SPL. The flash device will be detected in order to support
multiple flash devices instead of having layout hard coded at build time.
Cc: Scott Wood scottw...@freescale.com
Signed-off-by: Tim Harvey
Add a common header which can hopefully be shared amon imx6 SPL users
Signed-off-by: Tim Harvey thar...@gateworks.com
Acked-by: Stefano Babic sba...@denx.de
Acked-by: Nikita Kiryanov nik...@compulab.co.il
---
v3:
- fixed typo s/IMX6SLD/IMX6SDL
- add acks from Stefano and Nikita
v2:
- adjust
Add memory-mapped structures for MMDC iomux and configuration. Note that
the MMDC configuration registers are common between the IMX6DQ
(IMX6DUAL/IMX6QUAD) and IMX6SDL (IMX6SOLO/IMX6DUALLITE) the iomux
register addresses differ. This requires two sets of structures.
Add structures to describe
Add functions for configuring iomux based on board-specific regs and
for configuring mmdc based on board-specific and chip-specific data.
Signed-off-by: Tim Harvey thar...@gateworks.com
---
v3:
- added ifdef's around cpu specific iocfg functions for code-reduction with
single-variant board
Switch to an SPL image. The SPL for Ventana does the following:
- setup i2c and read the factory programmed EEPROM to obtain DRAM config
and model for board-specific calibration data
- configure DRAM per CPU/size/layout/devices/calibration
- load u-boot.img from NAND and jump to it
This
Split the read_eeprom function out so that it can be shared (ie with SPL)
Signed-off-by: Tim Harvey thar...@gateworks.com
---
v3:
- no changes
v2:
- new patch in series
---
board/gateworks/gw_ventana/Makefile | 2 +-
board/gateworks/gw_ventana/eeprom.c | 89
Allow imx_iomux_v3_setup_multiple_pads to take a multi-cpu pad_list
and add macros for declaring the pad_list that take into account the
SoC types supported using CONFIG_MX6QDL (supports both the MX6Q and MX6DL
iomux).
Signed-off-by: Tim Harvey thar...@gateworks.com
---
v3:
- remove commit msg
use the new iomux function and a macros to create a multi-dimensional array
of iomux values without duplicating the defintions.
Signed-off-by: Tim Harvey thar...@gateworks.com
---
v3:
- replace use of imx_iomux_v3_setup_multiple_pads_array with
imx_iomux_v3_setup_multiple_pads
v2:
- use
The IMX6QUAD/DUAL have SATA, but the IMX6SOLO/DL do not. Return failure
instead of attempting a memory access that results in a data abort and reset.
Signed-off-by: Tim Harvey thar...@gateworks.com
---
v2:
- remove print as this condition isn't really an error just something not
possible
---
The IMX6QUAD/DUAL have SATA, but the IMX6SOLO/DL do not. Return
instead of configuring the SATA clock and GPR13 registers.
Signed-off-by: Tim Harvey thar...@gateworks.com
---
arch/arm/imx-common/sata.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git
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