Dear Tushar Behera,
On 29/05/14 12:43, Masahiro Yamada wrote:
Minkyu,
Inderpal Singh inderpal.si...@linaro.org is invalid.
Could you assign another enginner resposible for arndale board?
It seems to Inderpal Singh is no longer with Linaro.
Could you please assign some people to maintain
On 05/29/2014 07:19 PM, Murali Karicheri wrote:
On 5/29/2014 11:59 AM, Ivan Khoronzhuk wrote:
Move AEMIF driver to drivers/memory/ti-aemif.c along with AEMIF
definitions collected in drivers/memory/ti-aemif.h
Acked-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Ivan Khoronzhuk
Hi Andreas,
Ok, I read you all and it's quite a pity.
I found recently a project call ethernut and it works fine with an unbuggy
sdramc evk1100 with their c-code. Let's confirmed.
I'm not in the way to get rid of u-boot loader.
When test will be done, I think that evk1100 must working on
On 05/29/2014 07:19 PM, Murali Karicheri wrote:
On 5/29/2014 11:59 AM, Ivan Khoronzhuk wrote:
Move AEMIF driver to drivers/memory/ti-aemif.c along with AEMIF
definitions collected in drivers/memory/ti-aemif.h
Acked-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Ivan Khoronzhuk
Move AEMIF driver to drivers/memory/ti-aemif.c along with AEMIF
definitions collected in drivers/memory/ti-aemif.h
Acked-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
Based on [U-boot] [Patch v2] mtd: nand: davinci: add header file for driver
Hi,
On 29 May 2014 09:58, Stephen Warren swar...@wwwdotorg.org wrote:
On 05/23/2014 06:51 PM, Simon Glass wrote:
Hi Lukasz,
On 22 May 2014 00:43, Lukasz Majewski l.majew...@samsung.com wrote:
This commit adds test script for testing if any commit has introduced
regression to the DFU.
It
Hi Tom,
On 29 May 2014 08:33, Tom Rini tr...@ti.com wrote:
On Wed, May 28, 2014 at 07:24:44AM -1000, Simon Glass wrote:
Hi Tom,
On 27 May 2014 04:22, Tom Rini tr...@ti.com wrote:
Hey all,
I've pushed v2014.07-rc2 out to the repository and tarballs should exist
soon.
Looking over
On 14-05-29 11:51 AM, Stephen Warren wrote:
On 05/29/2014 11:58 AM, Steve Rae wrote:
Hi, Stephen
On 14-05-29 09:25 AM, Stephen Warren wrote:
On 05/28/2014 04:15 PM, Steve Rae wrote:
Each wrapper function:
- switches to the specified physical partition, then
- performs the original
On 29/05/14 09:48, Stefano Babic wrote:
Hi Tim,
On 29/05/2014 06:16, Tim Harvey wrote:
perhaps, but I would assume if anyone needs these in u-boot they can
broaden the scope when needed.
Agree. At the moment, there is only one user of the structure and it is ok.
Best regards,
Stefano
Hi, Steve.
On 05/29/2014 07:15 AM, Steve Rae wrote:
Each wrapper function:
- switches to the specified physical partition, then
- performs the original function, and then
- switches back to the original physical partition
where the physical partition (aka HW partition) is
0=User, 1=Boot1,
On 14-05-29 01:30 PM, Stephen Warren wrote:
On 05/29/2014 01:44 PM, Steve Rae wrote:
On 14-05-29 11:51 AM, Stephen Warren wrote:
On 05/29/2014 11:58 AM, Steve Rae wrote:
Hi, Stephen
On 14-05-29 09:25 AM, Stephen Warren wrote:
On 05/28/2014 04:15 PM, Steve Rae wrote:
Each wrapper
From: Doug Anderson diand...@chromium.org
Setting ps_hold ought to be one of the first things we do when we
first boot up. If we wait until the main u-boot runs we won't set it
in time and the PMIC may power us back off.
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Akshay
On 05/19/2014 02:21 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
usb_hub_power_on() currently waits for the maximum of (a) the hub port's
power output to become good, (b) the max time the USB specification
allows a device to take to connect.
However, these two
On 29 May 2014 11:30, Minkyu Kang mk7.k...@samsung.com wrote:
Dear Tushar Behera,
On 29/05/14 12:43, Masahiro Yamada wrote:
Minkyu,
Inderpal Singh inderpal.si...@linaro.org is invalid.
Could you assign another enginner resposible for arndale board?
It seems to Inderpal Singh is no longer
On 05/29/2014 06:19 AM, Rob Herring wrote:
On Wed, May 28, 2014 at 6:46 PM, York Sun york...@freescale.com wrote:
snip
+static void set_pgtable_section(u64 *page_table, u64 index, u64 section,
+ u8 memory_type)
+{
+ u64 value;
+
+ value = section
Hi Tim,
On 05/29/14 07:11, Tim Harvey wrote:
On Wed, May 28, 2014 at 9:38 AM, Nikita Kiryanov nik...@compulab.co.il
wrote:
Hi Tim,
Sorry for the late reply.
no worries - your the only review of this revision thus far ;)
On 08/05/14 08:16, Tim Harvey wrote:
Add a common spl.c file
On 5/29/2014 11:59 AM, Ivan Khoronzhuk wrote:
Move AEMIF driver to drivers/memory/ti-aemif.c along with AEMIF
definitions collected in drivers/memory/ti-aemif.h
Acked-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
Based on [U-boot] [PATCH] mtd:
From: Stephen Warren swar...@nvidia.com
For each of Jetson TK1, Venice2, and Beaver:
- Enable the first USB controller in DT, and describe its configuration.
- Enable USB device/gadget support. This allows the user to type e.g.
ums 0 mmc 0 at the command-line to cause U-Boot to act a USB
From: Stephen Warren swar...@nvidia.com
The flipping of ep0 between IN and OUT relies on ci_ep_queue() consuming
the current IN/OUT setting immediately. If this is deferred to a later
point when the req is pulled out of ci_req-queue, then the IN/OUT
setting may have been changed since the req was
From: WingMan Kwok w-kw...@ti.com
Enable support of nand ecclayout command.
Acked-By: Murali Karicheri m-kariche...@ti.com
Acked-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: WingMan Kwok w-kw...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
include/configs/k2hk_evm.h |
From: Marek Vasut ma...@denx.de
Fix the method of flashing FCB blocks into NAND. The new env
writes all four FCB blocks and also does not scrub such a big
part of the NAND. This fixed complains about busted NAND blocks
in Linux.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Fabio Estevam
On Friday, May 30, 2014 at 01:14:33 AM, Joerg Krause wrote:
From: Marek Vasut ma...@denx.de
Fix the method of flashing FCB blocks into NAND. The new env
writes all four FCB blocks and also does not scrub such a big
part of the NAND. This fixed complains about busted NAND blocks
in Linux.
The definitions inside emif_defs.h concern davinci nand driver and
should be in it's header. So create header file for davinci nand
driver and move definitions from emif_defs.h to it.
Acked-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
On Thu, May 29, 2014 at 10:19 AM, York Sun york...@freescale.com wrote:
On 05/29/2014 06:19 AM, Rob Herring wrote:
On Wed, May 28, 2014 at 6:46 PM, York Sun york...@freescale.com wrote:
snip
+static void set_pgtable_section(u64 *page_table, u64 index, u64 section,
+
On 05/29/2014 07:13 PM, Murali Karicheri wrote:
On 5/29/2014 11:58 AM, Ivan Khoronzhuk wrote:
The definitions inside emif_defs.h concern davinci nand driver and
should be in it's header. So create header file for davinci nand
driver and move definitions from emif_defs.h to it.
Ivan,
It is
On 05/29/2014 11:58 AM, Steve Rae wrote:
Hi, Stephen
On 14-05-29 09:25 AM, Stephen Warren wrote:
On 05/28/2014 04:15 PM, Steve Rae wrote:
Each wrapper function:
- switches to the specified physical partition, then
- performs the original function, and then
- switches back to the original
LS2100A is an ARMv8 implementation. This adds board support for emulator
and simulator:
Two DDR controllers
UART2 is used as the console
IFC timing is tightened for speedy booting
Support DDR3 and DDR4 as separated targets
Management Complex (MC) is enabled
Signed-off-by: York Sun
Hi, Marc:
I am studying ARMv8's u-boot code with FVP model.
In do_nonsec_virt_switch() function in bootm.c :
It will call smp_kick_all_cpus() function :
It seems it would set GICD_SGIR[24] = 1, forward the interrupt to all
CPU interfaces except tha tof the processor that requested the
interrupt.
On Wed, May 28, 2014 at 6:46 PM, York Sun york...@freescale.com wrote:
Freescale LayerScape with Chassis Generation 3 is a set of SoCs with
ARMv8 cores and 3rd generation of Chassis. We use different MMU setup
to support memory map and cache attribute for these SoCs. MMU and cache
are enabled
From: Stephen Warren swar...@nvidia.com
ci_udc currently points ep-desc at separate descriptors for IN and OUT.
These descriptors only differ in the ep address IN/OUT field. Modify the
code to use a single descriptor, and change that descriptor's ep address
to indicate IN/OUT as required. This
On Wed, May 28, 2014 at 07:24:44AM -1000, Simon Glass wrote:
Hi Tom,
On 27 May 2014 04:22, Tom Rini tr...@ti.com wrote:
Hey all,
I've pushed v2014.07-rc2 out to the repository and tarballs should exist
soon.
Looking over the log, we've gotten some of the re-syncing that needed
Hi Simon,
Hi,
On 29 May 2014 09:58, Stephen Warren swar...@wwwdotorg.org wrote:
On 05/23/2014 06:51 PM, Simon Glass wrote:
Hi Lukasz,
On 22 May 2014 00:43, Lukasz Majewski l.majew...@samsung.com
wrote:
This commit adds test script for testing if any commit has
introduced
From: J. German Rivera german.riv...@freescale.com
This is needed for accessing peripherals with 64-bit MMIO registers,
from ARMv8 processors.
Signed-off-by: J. German Rivera german.riv...@freescale.com
---
Change log
v4: no change
v3: no change
arch/arm/include/asm/io.h |8
1
On 05/29/2014 01:44 PM, Steve Rae wrote:
On 14-05-29 11:51 AM, Stephen Warren wrote:
On 05/29/2014 11:58 AM, Steve Rae wrote:
Hi, Stephen
On 14-05-29 09:25 AM, Stephen Warren wrote:
On 05/28/2014 04:15 PM, Steve Rae wrote:
Each wrapper function:
- switches to the specified physical
From: Stephen Warren swar...@nvidia.com
Allocate ep0's USB request object when the UDC driver is probed. This
solves a couple of issues in the current code:
a) A request object always exists for ep0. Prior to this patch, if setup
transactions arrived in an unexpected order, handle_setup() would
Make MMU functions reusable. Platform code can setup its own MMU tables.
Also fix a typo of TCR_EL3_IPS_BITS in cache_v8.c.
Signed-off-by: York Sun york...@freescale.com
CC: David Feng feng...@phytium.com.cn
---
Change log:
v4: new patch, splitted from v3 2/4
Revise set_pgtable_section() to
Hi Tim,
I cannot build with this version. A setup for a couple of pins is not
yet replaces.
In fact, I have:
/* Enable Backlight */
imx_iomux_v3_setup_pad(MX6_PAD_SD1_CMD__GPIO1_IO18 |
and it should be:
SETUP_IOMUX_PAD(PAD_SD1_CMD__GPIO1_IO18 |
The same some lines later:
The quad100hd has been unmaintained and dead ever since it's been
added some 6 years ago. Remove it.
Also update README.scrapyard and insert some commit IDs for removed
boards.
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Stefan Roese s...@denx.de
Cc: Gary Jennejohn gljennj...@googlemail.com
Freescale LayerScape with Chassis Generation 3 is a set of SoCs with
ARMv8 cores and 3rd generation of Chassis. We use different MMU setup
to support memory map and cache attribute for these SoCs. MMU and cache
are enabled very early to bootst performance, especially for early
development on
Move AEMIF driver to drivers/memory/ti-aemif.c along with AEMIF
definitions collected in drivers/memory/ti-aemif.h
Acked-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
Based on [U-boot] [PATCH] mtd: nand: davinci: add header file for driver
Hi, Stephen
On 14-05-29 09:25 AM, Stephen Warren wrote:
On 05/28/2014 04:15 PM, Steve Rae wrote:
Each wrapper function:
- switches to the specified physical partition, then
- performs the original function, and then
- switches back to the original physical partition
where the physical
From: J. German Rivera german.riv...@freescale.com
Adding supoort to load and start the Layerscape Management Complex (MC)
firmware. First, the MC GCR register is set to 0 to reset all cores. MC
firmware and DPL images are copied from their location in NOR flash to
DDR. MC registers are updated
On 05/15/2014 04:34 PM, die...@gmx.de wrote:
From: Thomas Diener die...@gmx.de
Signed-off-by: Thomas Diener die...@gmx.de
---
drivers/input/Makefile |3 +-
drivers/input/fma1125.c | 47
include/fma1125.h | 140
On Thu, May 29, 2014 at 5:43 AM, Masahiro Yamada
yamad...@jp.panasonic.com wrote:
Linus,
Matt Waddel matt.wad...@linaro.org is unreachable addres.
Can anybody pick up the maintainership on vexpress_ca5x2
and vexpress_ca9x4 boards?
I've got nothing to do with the vexpress really, but I have
Hi Minkyu,
On 28 May 2014 07:02, Minkyu Kang mk7.k...@samsung.com wrote:
Dear Simon Glass,
On 27/05/14 09:01, Simon Glass wrote:
Hi Minkyu,
On 25 May 2014 21:15, Minkyu Kang mk7.k...@samsung.com wrote:
Dear Simon,
On 23/05/14 02:27, Simon Glass wrote:
Hi Minkyu,
On 21 May 2014 15:20,
Hi Tim,
On 29/05/2014 06:16, Tim Harvey wrote:
perhaps, but I would assume if anyone needs these in u-boot they can
broaden the scope when needed.
Agree. At the moment, there is only one user of the structure and it is ok.
Best regards,
Stefano Babic
--
Hi, Jaehoon
On 14-05-29 12:03 AM, Jaehoon Chung wrote:
Hi, Steve.
On 05/29/2014 07:15 AM, Steve Rae wrote:
Each wrapper function:
- switches to the specified physical partition, then
- performs the original function, and then
- switches back to the original physical partition
where the
From: Murali Karicheri m-kariche...@ti.com
Currently PWREMU_MGMT is not configured in the Linux generic UART
driver as this register seems to be specific TI UART IP. So this
needs to be enabled in u-boot to use UART1 from kernel space.
Acked-By: Vitaly Andrianov vita...@ti.com
Signed-off-by:
On 5/29/2014 11:58 AM, Ivan Khoronzhuk wrote:
The definitions inside emif_defs.h concern davinci nand driver and
should be in it's header. So create header file for davinci nand
driver and move definitions from emif_defs.h to it.
Ivan,
It is difficult to see what is done here. Can you rename
Dear Masahiro,
In message 20140529124331.47af.aa925...@jp.panasonic.com you wrote:
Wolfgang,
Gary Jennejohn ga...@denx.de is not working any more.
Is it possible to assign a new maintainer for quad100hd board?
I've submitted a patch tp remove this board. It has been dead ever
since it has
On Thu, May 29, 2014 at 12:02 AM, Stefano Babic sba...@denx.de wrote:
Hi Tim,
I cannot build with this version. A setup for a couple of pins is not
yet replaces.
In fact, I have:
/* Enable Backlight */
imx_iomux_v3_setup_pad(MX6_PAD_SD1_CMD__GPIO1_IO18 |
and it should be:
Hi, Steve.
On 05/29/2014 07:15 AM, Steve Rae wrote:
Each wrapper function:
- switches to the specified physical partition, then
- performs the original function, and then
- switches back to the original physical partition
where the physical partition (aka HW partition) is
0=User, 1=Boot1,
On 05/23/2014 06:51 PM, Simon Glass wrote:
Hi Lukasz,
On 22 May 2014 00:43, Lukasz Majewski l.majew...@samsung.com wrote:
This commit adds test script for testing if any commit has introduced
regression to the DFU.
It uses md5 to test if sent and received file is correct.
The test
The definitions inside emif_defs.h concern davinci nand driver and
should be in it's header. So create header file for davinci nand
driver and move definitions from emif_defs.h to it.
Acked-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
On 05/29/2014 10:37 AM, Rob Herring wrote:
On Thu, May 29, 2014 at 10:19 AM, York Sun york...@freescale.com wrote:
On 05/29/2014 06:19 AM, Rob Herring wrote:
On Wed, May 28, 2014 at 6:46 PM, York Sun york...@freescale.com wrote:
snip
+static void set_pgtable_section(u64 *page_table, u64
hi Tiger,
Hi, fenghua:
Followed your steps, I also downloaded linux-3.14.4.tar.xz .
And run it with ATF + Uboot.
It could boot into linux kernel, and hangs at mounting root fs.
Thanks a lot!
I did not test rootfs. It depends on where you place the rootfs(ramdisk or mmc
etc).
The kernel
From: Stephen Warren swar...@nvidia.com
handle_setup() currently assumes that the response to a Setup transaction
will be an OUT transaction, and any subsequent packet (if any) will be an
IN transaction. This appears to be valid in many cases; both USB
enumeration and Mass Storage work OK with
From: Heiko Schocher [mailto:h...@denx.de]
Am 28.05.2014 23:00, schrieb Tom Rini:
On Tue, May 27, 2014 at 12:21:21PM -0500, Scott Wood wrote:
On Tue, 2014-05-27 at 11:48 +, Gupta, Pekon wrote:
[...]
This series few other patch series are awaiting response from
long time.
Sorry for the
On 05/28/2014 04:15 PM, Steve Rae wrote:
Each wrapper function:
- switches to the specified physical partition, then
- performs the original function, and then
- switches back to the original physical partition
where the physical partition (aka HW partition) is
0=User, 1=Boot1, 2=Boot2,
Hi Tim,
On 30/05/2014 06:52, Tim Harvey wrote:
On Thu, May 29, 2014 at 12:02 AM, Stefano Babic sba...@denx.de wrote:
Hi Tim,
I cannot build with this version. A setup for a couple of pins is not
yet replaces.
In fact, I have:
/* Enable Backlight */
Fabio Estevam wrote:
On Wed, May 28, 2014 at 4:40 AM, David Müller (ELSOFT AG)
d.muel...@elsoft.ch wrote:
I use an additional delay in imx6_add_pcie_port() as a workaround so far.
How much of additional delay? Could you please share your patch?
diff --git a/drivers/pci/host/pci-imx6.c
Signed-off-by: Alison Wang alison.w...@freescale.com
---
drivers/i2c/mxc_i2c.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 48468d7..792fc40 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -423,7 +423,7
Hello all,
I have noticed that command repeat doesn't work as it should.
CONFIG_SYS_HUSH_PARSER is disabled in my config.
Here is what happens: main_loop() expects run_command() to return -1 for
failure, 0 or 1 for success (not repeatable or repeatable). However,
run_command() actually
Signed-off-by: Alison Wang alison.w...@freescale.com
---
drivers/net/fsl_mdio.c | 15 ---
drivers/net/tsec.c | 7 +++
include/tsec.h | 7 ++-
3 files changed, 25 insertions(+), 4 deletions(-)
diff --git a/drivers/net/fsl_mdio.c b/drivers/net/fsl_mdio.c
index
hello,,I am from India.I am electronics hobbyist.currently I am using
beaglebone black in my project.and I am afraid of security of linux systemits
quite easy to copy or modify data from linux system if it has physical
access.lets say ,I have BBB , and I boot it from external device(like
From: York Sun york...@freescale.com
JEDEC spec allows DRAM vendors to use prime DQ for write leveling. This
is not an issue unless some DQ pins are not connected. If a platform uses
regular DIMMs but with reduced DDR ECC pins, the prime DQ may end up on
those floating pins for the second rank.
From: York Sun york...@freescale.com
If less than 8 ECC pins are used for DDR data bus width smaller than 64
bits, the 8-bit ECC code will be transmitted/received across several beats,
and it will be used to check 64-bits of data once 8-bits of ECC are
accumulated.
Signed-off-by: York Sun
From: York Sun york...@freescale.com
Reading DDR register should use ddr_in32() for proper endianess.
This patch fixes incorrect waiting time for ARM platforms.
Signed-off-by: York Sun york...@freescale.com
---
drivers/ddr/fsl/arm_ddr_gen3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
This series contain the support for Freescale LS102xA SoC and LS1021AQDS board.
The QorIQ LS1 family is built on Layerscape architecture, the industry's first
software-aware, core-agnostic networking architecture to offer unprecedented
efficiency and scale.
Freescale LS102xA is a set of SoCs
The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.
Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores that have been optimized for high
reliability and
Signed-off-by: Alison Wang alison.w...@freescale.com
Signed-off-by: Jason Jin jason@freescale.com
Signed-off-by: York Sun york...@freescale.com
Signed-off-by: Yuan Yao yao.y...@freescale.com
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
board/freescale/ls1021aqds/Makefile
From: Claudiu Manoil claudiu.man...@freescale.com
fsl_enet.h defines the mapping of the usual MII management
registers, which are included in the MDIO register block
common to Freescale ethernet controllers. So it shouldn't
depend on the CPU architecture but it should be actually
part of the arch
Signed-off-by: Alison Wang alison.w...@freescale.com
---
drivers/mmc/fsl_esdhc.c | 4 ++--
include/fsl_esdhc.h | 14 +-
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 5541613..aec459f 100644
---
Hi Stephen,
On 05/22/2014 04:20 AM, Lukasz Majewski wrote:
Hi Stephen,
From: Stephen Warren swar...@nvidia.com
DFU read support appears to rely upon dfu-read_medium() updating
the passed-by-reference len parameter to indicate the remaining
size available for reading.
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC8xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Wolfgang Denx w...@denx.de
---
board/adder/Makefile| 11
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Wolfgang Denx w...@denx.de
---
board/etin/debris/Makefile |
The maintainers are no longer repsponding.
These boards are so old that nobody would have
motivation to maintain them.
I built all the other boards.
I confirmed there is no impact to the other boards.
Apply Wolfgang's patch first:
http://patchwork.ozlabs.org/patch/353935/
to avoid a conflict
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Wolfgang Denx w...@denx.de
---
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Wolfgang Denx w...@denx.de
---
board/zpc1900/Makefile|
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Wolfgang Denx w...@denx.de
---
board/ep8248/Makefile| 8
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Wolfgang Denx w...@denx.de
---
board/etin/kvme080/Makefile
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Wolfgang Denx w...@denx.de
---
board/rattler/Makefile|
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Wolfgang Denx w...@denx.de
---
board/ispan/Makefile| 11
Hi Liu,
On 30/05/14 03:25, tiger...@via-alliance.com wrote:
Hi, Marc:
I am studying ARMv8's u-boot code with FVP model.
In do_nonsec_virt_switch() function in bootm.c :
It will call smp_kick_all_cpus() function :
It seems it would set GICD_SGIR[24] = 1, forward the interrupt to all
CPU
There is no way to reset the cpu, so use the watchdog for this.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/cpu/armv7/sunxi/board.c| 7 +++
arch/arm/include/asm/arch-sunxi/timer.h | 5 +
2 files changed, 12 insertions(+)
diff --git
Adjust the u-boot-spl.lds linker script to match the changes made in the
arm: move exception handling out of start.S files commit.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/cpu/armv7/sunxi/u-boot-spl.lds | 1 +
1 file changed, 1 insertion(+)
diff --git
Hi All,
Here is a patch series to be applied on top of Ian's recently merged
series which added basic sun7i support.
This patch series begins with a few bug fixes found while working on preparing
the rest of the series, adds sun4i and sun5i support, pmic support (which is
necessary to clock the
We should not be aligning the amount of bytes which we try to read from the
disk, this leads to trying to read more bytes then there are which fails.
file_size is already aligned to BLOCK_SIZE before being stored in
img.header.length, so there is no need for load_size at all.
Signed-off-by: Hans
The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the
dma descriptors on the stack, and then exits while the dma transfer is in
progress, so the dma engine is reading stack memory which at that point may
be re-used. So far we've gotten away with this by luck, but recent
Add support for the Allwinner A13 and A10s SoCs also know as the Allwinner
sun5i family.
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Stefan Roese s...@denx.de
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Hans de Goede hdego...@redhat.com
---
Add support for the x-powers axp152 pmic which is found on most A10s boards.
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Ian Campbell i...@hellion.org.uk
Signed-off-by: Hans de Goede hdego...@redhat.com
---
board/sunxi/board.c| 10
boards.cfg |
From: Henrik Nordstrom hen...@henriknordstrom.net
Add support for the x-powers axp209 pmic which is found on most A10, A13 and
A20 boards.
While changing the boards.cfg lines for the Cubietruck, add myself as board
maintainer for the Cubietruck.
Signed-off-by: Henrik Nordstrom
Add support for the Allwinner A10 SoC also know as the Allwinner sun4i family.
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Stefan Roese s...@denx.de
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Hans de Goede hdego...@redhat.com
---
Add support for the i2c controller found on all Allwinner sunxi SoCs,
this is the same controller as found on the Marvell orion5x and kirkwood
SoC families, with a slightly different register layout, so this patch uses
the existing mvtwsi code.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
From: Chen-Yu Tsai w...@csie.org
Many A20 boards (ie Cubieboard2, A20-OLinuXino_MICRO) use an 100 Mbit MII
phy together with the GMAC nic found in the A20 SoC, add support for this
(this will get used when we add these boards in a later patch).
Signed-off-by: Chen-Yu Tsai w...@csie.org
From: Stefan Roese s...@denx.de
There have been 3 versions of the sunxi_emac support patch during its
development. Somehow version 2 ended up in upstream u-boot where as
the u-boot-sunxi git repo got version 3.
This bumps the version in upstream u-boot to version 3 of the patch:
- Initialize MII
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/cpu/armv7/sunxi/board.c | 8
boards.cfg | 2 +-
include/configs/sunxi-common.h | 5 +
3 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c
On Fri, 2014-05-30 at 11:06 +0200, Hans de Goede wrote:
We should not be aligning the amount of bytes which we try to read from the
disk, this leads to trying to read more bytes then there are which fails.
file_size is already aligned to BLOCK_SIZE before being stored in
img.header.length,
On Fri, 2014-05-30 at 11:06 +0200, Hans de Goede wrote:
Adjust the u-boot-spl.lds linker script to match the changes made in the
arm: move exception handling out of start.S files commit.
(perhaps include the sha1 here)
Signed-off-by: Hans de Goede hdego...@redhat.com
Acked-by: Ian Campbell
On Fri, 2014-05-30 at 11:06 +0200, Hans de Goede wrote:
The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the
dma descriptors on the stack,
Oh dear!
and then exits while the dma transfer is in
progress, so the dma engine is reading stack memory which at that point may
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