[U-Boot] [PATCH 3/5] iMX6DL:SABRESD: Add new DDR script
Add specified mx6dl_4x_mt41j128.cfg DDR script for iMX6DLSABRESD board. Not share from nitrogen6x. The default boot device also changes to SD card. Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6sabresd/mx6dl_4x_mt41j128.cfg | 130 ++ configs/mx6dlsabresd_defconfig |2 +- 2 files changed, 131 insertions(+), 1 deletions(-) create mode 100644 board/freescale/mx6sabresd/mx6dl_4x_mt41j128.cfg diff --git a/board/freescale/mx6sabresd/mx6dl_4x_mt41j128.cfg b/board/freescale/mx6sabresd/mx6dl_4x_mt41j128.cfg new file mode 100644 index 000..19de8d4 --- /dev/null +++ b/board/freescale/mx6sabresd/mx6dl_4x_mt41j128.cfg @@ -0,0 +1,130 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * Jason Liu r64...@freescale.com + * + * SPDX-License-Identifier:GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type AddressValue + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4 0x020e0774 0x000C +DATA 4 0x020e0754 0x +DATA 4 0x020e04ac 0x0030 +DATA 4 0x020e04b0 0x0030 +DATA 4 0x020e0464 0x0030 +DATA 4 0x020e0490 0x0030 +DATA 4 0x020e074c 0x0030 +DATA 4 0x020e0494 0x0030 +DATA 4 0x020e04a0 0x +DATA 4 0x020e04b4 0x0030 +DATA 4 0x020e04b8 0x0030 +DATA 4 0x020e076c 0x0030 +DATA 4 0x020e0750 0x0002 +DATA 4 0x020e04bc 0x0030 +DATA 4 0x020e04c0 0x0030 +DATA 4 0x020e04c4 0x0030 +DATA 4 0x020e04c8 0x0030 +DATA 4 0x020e04cc 0x0030 +DATA 4 0x020e04d0 0x0030 +DATA 4 0x020e04d4 0x0030 +DATA 4 0x020e04d8 0x0030 +DATA 4 0x020e0760 0x0002 +DATA 4 0x020e0764 0x0030 +DATA 4 0x020e0770 0x0030 +DATA 4 0x020e0778 0x0030 +DATA 4 0x020e077c 0x0030 +DATA 4 0x020e0780 0x0030 +DATA 4 0x020e0784 0x0030 +DATA 4 0x020e078c 0x0030 +DATA 4 0x020e0748 0x0030 +DATA 4 0x020e0470 0x0030 +DATA 4 0x020e0474 0x0030 +DATA 4 0x020e0478 0x0030 +DATA 4 0x020e047c 0x0030 +DATA 4 0x020e0480 0x0030 +DATA 4 0x020e0484 0x0030 +DATA 4 0x020e0488 0x0030 +DATA 4 0x020e048c 0x0030 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b080c 0x001F001F +DATA 4 0x021b0810 0x001F001F +DATA 4 0x021b480c 0x001F001F +DATA 4 0x021b4810 0x001F001F +DATA 4 0x021b083c 0x4220021F +DATA 4 0x021b0840 0x0207017E +DATA 4 0x021b483c 0x4201020C +DATA 4 0x021b4840 0x01660172 +DATA 4 0x021b0848 0x4A4D4E4D +DATA 4 0x021b4848 0x4A4F5049 +DATA 4 0x021b0850 0x3F3C3D31 +DATA 4 0x021b4850 0x3238372B +DATA 4 0x021b081c 0x +DATA 4 0x021b0820 0x +DATA 4 0x021b0824 0x +DATA 4 0x021b0828 0x +DATA 4 0x021b481c 0x +DATA 4 0x021b4820 0x +DATA 4 0x021b4824 0x +DATA 4 0x021b4828 0x +DATA 4 0x021b08b8 0x0800 +DATA 4 0x021b48b8 0x0800 +DATA 4 0x021b0004 0x0002002D +DATA 4 0x021b0008 0x00333030 +DATA 4 0x021b000c 0x3F435313 +DATA 4 0x021b0010 0xB66E8B63 +DATA 4 0x021b0014 0x01FF00DB +DATA 4 0x021b0018 0x1740 +DATA 4 0x021b001c 0x8000 +DATA 4 0x021b002c 0x26d2 +DATA 4 0x021b0030 0x00431023 +DATA 4 0x021b0040 0x0027 +DATA 4 0x021b 0x831A +DATA 4 0x021b001c 0x04008032 +DATA 4 0x021b001c 0x8033 +DATA 4 0x021b001c 0x00048031 +DATA 4 0x021b001c 0x05208030 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b0020 0x5800 +DATA 4 0x021b0818 0x0007 +DATA 4 0x021b4818 0x0007 +DATA 4 0x021b0004 0x0002556D +DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b001c 0x + +/* set the default clock gate to save power */ +DATA 4 0x020c4068 0x00C03F3F +DATA 4 0x020c406c 0x0030FC03 +DATA 4 0x020c4070 0x0FFFC000 +DATA 4 0x020c4074 0x3FF0 +DATA 4 0x020c4078 0x00FFF300 +DATA 4 0x020c407c 0x0FC3 +DATA 4 0x020c4080 0x03FF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4 0x020e0010 0xF0CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4 0x020e0018 0x007F007F +DATA 4 0x020e001c 0x007F007F diff --git a/configs/mx6dlsabresd_defconfig b/configs/mx6dlsabresd_defconfig index b8e6d29..d6d4524 100644 --- a/configs/mx6dlsabresd_defconfig +++ b/configs/mx6dlsabresd_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS=IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DEFAULT_FDT_FILE=\imx6dl-sabresd.dtb\,DDR_MB=1024 +CONFIG_SYS_EXTRA_OPTIONS=IMX_CONFIG=board/freescale/mx6sabresd/mx6dl_4x_mt41j128.cfg,MX6DL,DEFAULT_FDT_FILE=\imx6dl-sabresd.dtb\,DDR_MB=1024 CONFIG_ARM=y CONFIG_TARGET_MX6SABRESD=y -- 1.7.4.1 ___ U-Boot
[U-Boot] [PATCH 4/5] iMX6Solo:SABRESD: Add the i.MX6Solo SABRESD board support
The i.MX6solo SABRE-SD board configuration has the following
difference with i.MX6dl sabre-sd:
- DDR bus width: 32bit
- DDR capacity: 512M
Signed-off-by: Ye.Li b37...@freescale.com
---
board/freescale/mx6sabresd/mx6solo_4x_mt41j128.cfg | 106
configs/mx6solosabresd_defconfig |3 +
include/configs/mx6sabre_common.h | 14 ++-
3 files changed, 121 insertions(+), 2 deletions(-)
create mode 100644 board/freescale/mx6sabresd/mx6solo_4x_mt41j128.cfg
create mode 100644 configs/mx6solosabresd_defconfig
diff --git a/board/freescale/mx6sabresd/mx6solo_4x_mt41j128.cfg
b/board/freescale/mx6sabresd/mx6solo_4x_mt41j128.cfg
new file mode 100644
index 000..c886d66
--- /dev/null
+++ b/board/freescale/mx6sabresd/mx6solo_4x_mt41j128.cfg
@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ * Jason Liu r64...@freescale.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Refer doc/README.imximage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+
+/* image version */
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi, sd (the board has no nand neither onenand)
+ */
+BOOT_FROM sd
+
+/*
+ * Device Configuration Data (DCD)
+ *
+ * Each entry must have the format:
+ * Addr-type AddressValue
+ *
+ * where:
+ * Addr-type register length (1,2 or 4 bytes)
+ * Address absolute address of the register
+ * value value to be stored in the register
+ */
+DATA 4 0x020e0774 0x000C
+DATA 4 0x020e0754 0x
+DATA 4 0x020e04ac 0x0030
+DATA 4 0x020e04b0 0x0030
+DATA 4 0x020e0464 0x0030
+DATA 4 0x020e0490 0x0030
+DATA 4 0x020e074c 0x0030
+DATA 4 0x020e0494 0x0030
+DATA 4 0x020e04a0 0x
+DATA 4 0x020e04b4 0x0030
+DATA 4 0x020e04b8 0x0030
+DATA 4 0x020e076c 0x0030
+DATA 4 0x020e0750 0x0002
+DATA 4 0x020e04bc 0x0030
+DATA 4 0x020e04c0 0x0030
+DATA 4 0x020e04c4 0x0030
+DATA 4 0x020e04c8 0x0030
+DATA 4 0x020e0760 0x0002
+DATA 4 0x020e0764 0x0030
+DATA 4 0x020e0770 0x0030
+DATA 4 0x020e0778 0x0030
+DATA 4 0x020e077c 0x0030
+DATA 4 0x020e0470 0x0030
+DATA 4 0x020e0474 0x0030
+DATA 4 0x020e0478 0x0030
+DATA 4 0x020e047c 0x0030
+DATA 4 0x021b0800 0xa1390003
+DATA 4 0x021b080c 0x001F001F
+DATA 4 0x021b0810 0x001F001F
+DATA 4 0x021b083c 0x42190219
+DATA 4 0x021b0840 0x017B0177
+DATA 4 0x021b0848 0x4B4D4E4D
+DATA 4 0x021b0850 0x3F3E2D36
+DATA 4 0x021b081c 0x
+DATA 4 0x021b0820 0x
+DATA 4 0x021b0824 0x
+DATA 4 0x021b0828 0x
+DATA 4 0x021b08b8 0x0800
+DATA 4 0x021b0004 0x0002002D
+DATA 4 0x021b0008 0x00333030
+DATA 4 0x021b000c 0x3F435313
+DATA 4 0x021b0010 0xB66E8B63
+DATA 4 0x021b0014 0x01FF00DB
+DATA 4 0x021b0018 0x1740
+DATA 4 0x021b001c 0x8000
+DATA 4 0x021b002c 0x26d2
+DATA 4 0x021b0030 0x00431023
+DATA 4 0x021b0040 0x0017
+DATA 4 0x021b 0x8319
+DATA 4 0x021b001c 0x04008032
+DATA 4 0x021b001c 0x8033
+DATA 4 0x021b001c 0x00048031
+DATA 4 0x021b001c 0x05208030
+DATA 4 0x021b001c 0x04008040
+DATA 4 0x021b0020 0x5800
+DATA 4 0x021b0818 0x0007
+DATA 4 0x021b0004 0x0002556D
+DATA 4 0x021b0404 0x00011006
+DATA 4 0x021b001c 0x
+
+/* set the default clock gate to save power */
+DATA 4 0x020c4068 0x00C03F3F
+DATA 4 0x020c406c 0x0030FC03
+DATA 4 0x020c4070 0x0FFFC000
+DATA 4 0x020c4074 0x3FF0
+DATA 4 0x020c4078 0x00FFF300
+DATA 4 0x020c407c 0x0FC3
+DATA 4 0x020c4080 0x03FF
+
+/* enable AXI cache for VDOA/VPU/IPU */
+DATA 4 0x020e0010 0xF0CF
+/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
+DATA 4 0x020e0018 0x007F007F
+DATA 4 0x020e001c 0x007F007F
diff --git a/configs/mx6solosabresd_defconfig b/configs/mx6solosabresd_defconfig
new file mode 100644
index 000..d41754d
--- /dev/null
+++ b/configs/mx6solosabresd_defconfig
@@ -0,0 +1,3 @@
+CONFIG_SYS_EXTRA_OPTIONS=IMX_CONFIG=board/freescale/mx6sabresd/mx6solo_4x_mt41j128.cfg,MX6S,DEFAULT_FDT_FILE=\imx6dl-sabresd.dtb\,DDR_MB=512
+CONFIG_ARM=y
+CONFIG_TARGET_MX6SABRESD=y
diff --git a/include/configs/mx6sabre_common.h
b/include/configs/mx6sabre_common.h
index e59a3b4..82de5e6 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -11,6 +11,11 @@
#define CONFIG_MX6
+#ifdef CONFIG_MX6S
+#define CONFIG_MX6DL
+#define CONFIG_SYS_NOSMP nosmp
+#endif
+
#include mx6_common.h
#include linux/sizes.h
@@ -97,6 +102,10 @@
#define CONFIG_LOADADDR0x1200
#define CONFIG_SYS_TEXT_BASE 0x1780
+#ifndef CONFIG_SYS_NOSMP
+#define CONFIG_SYS_NOSMP
+#endif
+
#ifdef CONFIG_SUPPORT_EMMC_BOOT
#define EMMC_ENV \
emmcdev=2\0 \
@@ -146,7 +155,8 @@
fi; \
fi\0 \
EMMC_ENV \
- mmcargs=setenv bootargs console=${console},${baudrate} \
+
[U-Boot] [PATCH 5/5] iMX6Solo:SABREAUTO: Add the i.MX6Solo SABREAUTO board support
This patch is to add the i.MX6solo sabreauto support, The i.MX6solo sabreauto board configuration has the following difference with i.MX6dl sabreauto: - DDR bus width: 32bit - DDR capacity: 1024M Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6qsabreauto/mx6solo.cfg | 106 + configs/mx6solosabreauto_defconfig|3 + 2 files changed, 109 insertions(+), 0 deletions(-) create mode 100644 board/freescale/mx6qsabreauto/mx6solo.cfg create mode 100644 configs/mx6solosabreauto_defconfig diff --git a/board/freescale/mx6qsabreauto/mx6solo.cfg b/board/freescale/mx6qsabreauto/mx6solo.cfg new file mode 100644 index 000..4311f68 --- /dev/null +++ b/board/freescale/mx6qsabreauto/mx6solo.cfg @@ -0,0 +1,106 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * Jason Liu r64...@freescale.com + * + * SPDX-License-Identifier:GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type AddressValue + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4 0x020e0774 0x000C +DATA 4 0x020e0754 0x +DATA 4 0x020e04ac 0x0030 +DATA 4 0x020e04b0 0x0030 +DATA 4 0x020e0464 0x0030 +DATA 4 0x020e0490 0x0030 +DATA 4 0x020e074c 0x0030 +DATA 4 0x020e0494 0x0030 +DATA 4 0x020e04a0 0x +DATA 4 0x020e04b4 0x0030 +DATA 4 0x020e04b8 0x0030 +DATA 4 0x020e076c 0x0030 +DATA 4 0x020e0750 0x0002 +DATA 4 0x020e04bc 0x0028 +DATA 4 0x020e04c0 0x0028 +DATA 4 0x020e04c4 0x0028 +DATA 4 0x020e04c8 0x0028 +DATA 4 0x020e0760 0x0002 +DATA 4 0x020e0764 0x0028 +DATA 4 0x020e0770 0x0028 +DATA 4 0x020e0778 0x0028 +DATA 4 0x020e077c 0x0028 +DATA 4 0x020e0470 0x0028 +DATA 4 0x020e0474 0x0028 +DATA 4 0x020e0478 0x0028 +DATA 4 0x020e047c 0x0028 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b080c 0x001F001F +DATA 4 0x021b0810 0x001F001F +DATA 4 0x021b083c 0x421C0216 +DATA 4 0x021b0840 0x017B017A +DATA 4 0x021b0848 0x4B4A4E4C +DATA 4 0x021b0850 0x3F3F3334 +DATA 4 0x021b081c 0x +DATA 4 0x021b0820 0x +DATA 4 0x021b0824 0x +DATA 4 0x021b0828 0x +DATA 4 0x021b08b8 0x0800 +DATA 4 0x021b0004 0x00020025 +DATA 4 0x021b0008 0x00333030 +DATA 4 0x021b000c 0x676B5313 +DATA 4 0x021b0010 0xB66E8B63 +DATA 4 0x021b0014 0x01FF00DB +DATA 4 0x021b0018 0x1740 +DATA 4 0x021b001c 0x8000 +DATA 4 0x021b002c 0x26d2 +DATA 4 0x021b0030 0x006B1023 +DATA 4 0x021b0040 0x0027 +DATA 4 0x021b 0x8419 +DATA 4 0x021b001c 0x04008032 +DATA 4 0x021b001c 0x8033 +DATA 4 0x021b001c 0x00048031 +DATA 4 0x021b001c 0x05208030 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b0020 0x5800 +DATA 4 0x021b0818 0x0007 +DATA 4 0x021b0004 0x00025565 +DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b001c 0x + +/* set the default clock gate to save power */ +DATA 4 0x020c4068 0x00C03F3F +DATA 4 0x020c406c 0x0030FC03 +DATA 4 0x020c4070 0x0FFFC000 +DATA 4 0x020c4074 0x3FF0 +DATA 4 0x020c4078 0xF300 +DATA 4 0x020c407c 0x0FC3 +DATA 4 0x020c4080 0x0FFF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4 0x020e0010 0xF0CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4 0x020e0018 0x007F007F +DATA 4 0x020e001c 0x007F007F diff --git a/configs/mx6solosabreauto_defconfig b/configs/mx6solosabreauto_defconfig new file mode 100644 index 000..17610c6 --- /dev/null +++ b/configs/mx6solosabreauto_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS=IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6S,DEFAULT_FDT_FILE=\imx6dl-sabreauto.dtb\,DDR_MB=1024 +CONFIG_ARM=y +CONFIG_TARGET_MX6QSABREAUTO=y -- 1.7.4.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/5] iMX6Q:SABREAUTO: Rename the imximage.cfg to mx6q.cfg
Rename the imximage.cfg to mx6q.cfg. No function change at all Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6qsabreauto/imximage.cfg | 129 board/freescale/mx6qsabreauto/mx6q.cfg | 129 configs/mx6qsabreauto_defconfig|2 +- 3 files changed, 130 insertions(+), 130 deletions(-) delete mode 100644 board/freescale/mx6qsabreauto/imximage.cfg create mode 100644 board/freescale/mx6qsabreauto/mx6q.cfg diff --git a/board/freescale/mx6qsabreauto/imximage.cfg b/board/freescale/mx6qsabreauto/imximage.cfg deleted file mode 100644 index 16bf473..000 --- a/board/freescale/mx6qsabreauto/imximage.cfg +++ /dev/null @@ -1,129 +0,0 @@ -/* - * Copyright (C) 2012 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier:GPL-2.0+ - * - * Refer doc/README.imximage for more details about how-to configure - * and create imximage boot image - * - * The syntax is taken as close as possible with the kwbimage - */ -/* image version */ - -IMAGE_VERSION 2 - -/* - * Boot Device : one of - * spi, sd (the board has no nand neither onenand) - */ -BOOT_FROM sd - -/* - * Device Configuration Data (DCD) - * - * Each entry must have the format: - * Addr-type AddressValue - * - * where: - * Addr-type register length (1,2 or 4 bytes) - * Address absolute address of the register - * value value to be stored in the register - */ -DATA 4 0x020e0798 0x000C -DATA 4 0x020e0758 0x -DATA 4 0x020e0588 0x0030 -DATA 4 0x020e0594 0x0030 -DATA 4 0x020e056c 0x0030 -DATA 4 0x020e0578 0x0030 -DATA 4 0x020e074c 0x0030 -DATA 4 0x020e057c 0x0030 -DATA 4 0x020e058c 0x -DATA 4 0x020e059c 0x0030 -DATA 4 0x020e05a0 0x0030 -DATA 4 0x020e078c 0x0030 -DATA 4 0x020e0750 0x0002 -DATA 4 0x020e05a8 0x0028 -DATA 4 0x020e05b0 0x0028 -DATA 4 0x020e0524 0x0028 -DATA 4 0x020e051c 0x0028 -DATA 4 0x020e0518 0x0028 -DATA 4 0x020e050c 0x0028 -DATA 4 0x020e05b8 0x0028 -DATA 4 0x020e05c0 0x0028 -DATA 4 0x020e0774 0x0002 -DATA 4 0x020e0784 0x0028 -DATA 4 0x020e0788 0x0028 -DATA 4 0x020e0794 0x0028 -DATA 4 0x020e079c 0x0028 -DATA 4 0x020e07a0 0x0028 -DATA 4 0x020e07a4 0x0028 -DATA 4 0x020e07a8 0x0028 -DATA 4 0x020e0748 0x0028 -DATA 4 0x020e05ac 0x0028 -DATA 4 0x020e05b4 0x0028 -DATA 4 0x020e0528 0x0028 -DATA 4 0x020e0520 0x0028 -DATA 4 0x020e0514 0x0028 -DATA 4 0x020e0510 0x0028 -DATA 4 0x020e05bc 0x0028 -DATA 4 0x020e05c4 0x0028 -DATA 4 0x021b0800 0xa1390003 -DATA 4 0x021b080c 0x001F001F -DATA 4 0x021b0810 0x001F001F -DATA 4 0x021b480c 0x001F001F -DATA 4 0x021b4810 0x001F001F -DATA 4 0x021b083c 0x43260335 -DATA 4 0x021b0840 0x031A030B -DATA 4 0x021b483c 0x4323033B -DATA 4 0x021b4840 0x0323026F -DATA 4 0x021b0848 0x483D4545 -DATA 4 0x021b4848 0x44433E48 -DATA 4 0x021b0850 0x41444840 -DATA 4 0x021b4850 0x4835483E -DATA 4 0x021b081c 0x -DATA 4 0x021b0820 0x -DATA 4 0x021b0824 0x -DATA 4 0x021b0828 0x -DATA 4 0x021b481c 0x -DATA 4 0x021b4820 0x -DATA 4 0x021b4824 0x -DATA 4 0x021b4828 0x -DATA 4 0x021b08b8 0x0800 -DATA 4 0x021b48b8 0x0800 -DATA 4 0x021b0004 0x00020036 -DATA 4 0x021b0008 0x09444040 -DATA 4 0x021b000c 0x8A8F7955 -DATA 4 0x021b0010 0xFF328F64 -DATA 4 0x021b0014 0x01FF00DB -DATA 4 0x021b0018 0x1740 -DATA 4 0x021b001c 0x8000 -DATA 4 0x021b002c 0x26d2 -DATA 4 0x021b0030 0x008F1023 -DATA 4 0x021b0040 0x0047 -DATA 4 0x021b 0x841A -DATA 4 0x021b001c 0x04088032 -DATA 4 0x021b001c 0x8033 -DATA 4 0x021b001c 0x00048031 -DATA 4 0x021b001c 0x09408030 -DATA 4 0x021b001c 0x04008040 -DATA 4 0x021b0020 0x5800 -DATA 4 0x021b0818 0x0007 -DATA 4 0x021b4818 0x0007 -DATA 4 0x021b0004 0x00025576 -DATA 4 0x021b0404 0x00011006 -DATA 4 0x021b001c 0x - -/* set the default clock gate to save power */ -DATA 4 0x020c4068 0x00C03F3F -DATA 4 0x020c406c 0x0030FC03 -DATA 4 0x020c4070 0x0FFFC000 -DATA 4 0x020c4074 0x3FF0 -DATA 4 0x020c4078 0xF300 -DATA 4 0x020c407c 0x0FF3 -DATA 4 0x020c4080 0x0FFF - -/* enable AXI cache for VDOA/VPU/IPU */ -DATA 4 0x020e0010 0xF0CF -/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ -DATA 4 0x020e0018 0x007F007F -DATA 4 0x020e001c 0x007F007F diff --git a/board/freescale/mx6qsabreauto/mx6q.cfg b/board/freescale/mx6qsabreauto/mx6q.cfg new file mode 100644 index 000..075d51a --- /dev/null +++ b/board/freescale/mx6qsabreauto/mx6q.cfg @@ -0,0 +1,129 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier:GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has
[U-Boot] [PATCH 1/5] iMX6Q/DL:SABREAUTO/SABRESD: Move DDR and FDT configs to defconfig
To support more iMX6 variants,
1. Make the DDR size configurable based on the defconfig file
2. Make the FDT file configurable based on the defconfig file
Signed-off-by: Ye.Li b37...@freescale.com
---
board/freescale/mx6qsabreauto/mx6qsabreauto.c |2 +-
board/freescale/mx6sabresd/mx6sabresd.c |2 +-
configs/mx6dlsabreauto_defconfig |2 +-
configs/mx6dlsabresd_defconfig|2 +-
configs/mx6qsabreauto_defconfig |2 +-
configs/mx6qsabresd_defconfig |2 +-
include/configs/mx6qsabreauto.h |9 ++---
include/configs/mx6sabresd.h |8 +---
8 files changed, 9 insertions(+), 20 deletions(-)
diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index 928dadf..bfb9b6a 100644
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -45,7 +45,7 @@ DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
- gd-ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
+ gd-ram_size = (phys_size_t)CONFIG_DDR_MB * 1024 * 1024;
return 0;
}
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c
b/board/freescale/mx6sabresd/mx6sabresd.c
index 80c8ebd..5f65f1b 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -53,7 +53,7 @@ DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
- gd-ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
+ gd-ram_size = (phys_size_t)CONFIG_DDR_MB * 1024 * 1024;
return 0;
}
diff --git a/configs/mx6dlsabreauto_defconfig b/configs/mx6dlsabreauto_defconfig
index b649935..ce755d1 100644
--- a/configs/mx6dlsabreauto_defconfig
+++ b/configs/mx6dlsabreauto_defconfig
@@ -1,3 +1,3 @@
-CONFIG_SYS_EXTRA_OPTIONS=IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL
+CONFIG_SYS_EXTRA_OPTIONS=IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE=\imx6dl-sabreauto.dtb\,DDR_MB=2048
CONFIG_ARM=y
CONFIG_TARGET_MX6QSABREAUTO=y
diff --git a/configs/mx6dlsabresd_defconfig b/configs/mx6dlsabresd_defconfig
index 9ce960e..b8e6d29 100644
--- a/configs/mx6dlsabresd_defconfig
+++ b/configs/mx6dlsabresd_defconfig
@@ -1,3 +1,3 @@
-CONFIG_SYS_EXTRA_OPTIONS=IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL
+CONFIG_SYS_EXTRA_OPTIONS=IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DEFAULT_FDT_FILE=\imx6dl-sabresd.dtb\,DDR_MB=1024
CONFIG_ARM=y
CONFIG_TARGET_MX6SABRESD=y
diff --git a/configs/mx6qsabreauto_defconfig b/configs/mx6qsabreauto_defconfig
index 7d86700..25085a9 100644
--- a/configs/mx6qsabreauto_defconfig
+++ b/configs/mx6qsabreauto_defconfig
@@ -1,3 +1,3 @@
-CONFIG_SYS_EXTRA_OPTIONS=IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q
+CONFIG_SYS_EXTRA_OPTIONS=IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q,DEFAULT_FDT_FILE=\imx6q-sabreauto.dtb\,DDR_MB=2048
CONFIG_ARM=y
CONFIG_TARGET_MX6QSABREAUTO=y
diff --git a/configs/mx6qsabresd_defconfig b/configs/mx6qsabresd_defconfig
index dc8e254..edfb988 100644
--- a/configs/mx6qsabresd_defconfig
+++ b/configs/mx6qsabresd_defconfig
@@ -1,3 +1,3 @@
-CONFIG_SYS_EXTRA_OPTIONS=IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q
+CONFIG_SYS_EXTRA_OPTIONS=IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q,DEFAULT_FDT_FILE=\imx6q-sabresd.dtb\,DDR_MB=1024
CONFIG_ARM=y
CONFIG_TARGET_MX6SABRESD=y
diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h
index d1639c4..e8580e6 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale i.MX6Q SabreAuto board.
*
@@ -12,13 +12,8 @@
#define CONFIG_MACH_TYPE 3529
#define CONFIG_MXC_UART_BASE UART4_BASE
#define CONFIG_CONSOLE_DEV ttymxc3
-#if defined CONFIG_MX6Q
-#define CONFIG_DEFAULT_FDT_FILEimx6q-sabreauto.dtb
-#elif defined CONFIG_MX6DL
-#define CONFIG_DEFAULT_FDT_FILEimx6dl-sabreauto.dtb
-#endif
+
#define CONFIG_MMCROOT /dev/mmcblk0p2
-#define PHYS_SDRAM_SIZE(2u * 1024 * 1024 * 1024)
/* USB Configs */
#define CONFIG_CMD_USB
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index e666ebb..c8ac5aa 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale i.MX6Q SabreSD board.
*
@@ -16,12 +16,6 @@
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CONSOLE_DEV ttymxc0
#define CONFIG_MMCROOT /dev/mmcblk1p2
-#if defined(CONFIG_MX6Q)
-#define CONFIG_DEFAULT_FDT_FILE
[U-Boot] [GIT] Pull request: u-boot-dfu
Dear Marek, The following changes since commit 74c0d756dea14855bec47f380b6ccb557be5db7c: usb: hub: don't check CONNECTION in hub_port_reset() (2014-08-29 11:27:43 +0200) are available in the git repository at: u-boot-denx-usb/master for you to fetch changes up to ea1545301efd42811eded401fcdedc2ffa5a2fd1: usb: ci_udc: implement dfu_usb_get_reset (2014-09-01 08:46:59 +0200) Stephen Warren (1): usb: ci_udc: implement dfu_usb_get_reset Łukasz Majewski (2): dfu: Provide means to find difference between dfu-util -e and -R udc: dfu: s3c_udc: Provide function to check if USB reset was asserted common/cmd_dfu.c | 23 +++ drivers/dfu/dfu.c| 31 ++- drivers/usb/gadget/ci_udc.c | 7 +++ drivers/usb/gadget/f_dfu.c | 2 +- drivers/usb/gadget/s3c_udc_otg.c | 5 + include/dfu.h| 5 - 6 files changed, 62 insertions(+), 11 deletions(-) -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] tools-only build broken
On Sun, 2014-08-31 at 21:54 -0700, Simon Glass wrote: Hi, On 30 August 2014 19:44, Ian Campbell i...@hellion.org.uk wrote: On Sat, 2014-08-30 at 13:40 +0400, Matwey V. Kornilov wrote: 30.08.2014 04:04, Ian Campbell пишет: In the meantime touch include/config/auto.conf lets it build (hardly ideal though!) Hi, I do make defconfig make silentoldconfig make tools-only Thanks. I feared that would be baking some sort of non-default defconfig (IYSWIM) stuff into the tools build. Perhaps that worry is unfounded though. That works, You mean that make defconfig is (now) the recommended way to get tools-only to build? and builds with sandbox_defconfig so that you get full functionality (verified boot). Not sure what you mean here. Verified in what way? What is booting that way, this should only build tools, not something which can boot. We are using tools-only as part of the Debian packaging, what we are trying to build is a usable generic version of mkimage (and potentially other tools in the future) which can be placed in a generic u-boot-tools package which is separate from the u-boot package(s) which contain(s) u-boot binaries. Ian. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ARM: at91sam9rlek: convert to generic board support
Signed-off-by: Josh Wu josh...@atmel.com --- include/configs/at91sam9rlek.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index 3747098..b8d5dd1 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -34,6 +34,8 @@ #define CONFIG_CMD_BOOTZ #define CONFIG_OF_LIBFDT +#define CONFIG_SYS_GENERIC_BOARD + #define CONFIG_ATMEL_LEGACY #define CONFIG_AT91_GPIO 1 #define CONFIG_AT91_GPIO_PULLUP1 -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ARM: at91sam9n12ek: convert to generic board support
Signed-off-by: Josh Wu josh...@atmel.com --- include/configs/at91sam9n12ek.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 9b0e588..f02fce9 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -31,6 +31,7 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_OF_LIBFDT +#define CONFIG_SYS_GENERIC_BOARD /* general purpose I/O */ #define CONFIG_AT91_GPIO -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4] arm: tegra: initial support for apalis t30
This patch adds board support for the Toradex Apalis T30 a computer on
module which can be used on different carrier boards.
For the sake of ease of use we do not distinguish between different
carrier boards for now as the base module features are deemed
sufficient enough for regular booting.
The following functionality is working so far:
- eMMC boot and environment storage
- Gigabit Ethernet (once Thierry's PCIe as well as Marek's i210 patches
hit mainline)
- MMC/SD cards (both 8-bit as well as 4-bit slot)
- USB client/host (dual role port as client e.g. for DFU/UMS, other two
ports as host)
Signed-off-by: Marcel Ziswiler mar...@ziswiler.com
Acked-by: Stephen Warren swar...@nvidia.com
---
changes in v4:
- Update device tree to conform to Thierry's latest PCIe specific supply
scheme.
changes in v3:
- Drop architecture specific memcpy configuration again in favour of
enabling it for all Tegra configurations (via separate patch)
- Fix 8-bit operation of 8-bit MMC/SD card slot
Changes in v2:
- Fixed my odd commenting style within the device tree
- Added gigabit Ethernet (and with it PCIe and PMIC) support
- Fixed PCIe pinmux
- Cleaned-up order of includes in board file
- Added comments in configuration file
- Use architecture specific memcpy to speed up things
This patch got re-based to u-boot-tegra.
arch/arm/Kconfig | 4 +
arch/arm/dts/Makefile | 1 +
arch/arm/dts/tegra30-apalis.dts| 300 ++
arch/arm/include/asm/mach-types.h | 13 +
board/toradex/apalis_t30/Kconfig | 24 ++
board/toradex/apalis_t30/MAINTAINERS | 7 +
board/toradex/apalis_t30/Makefile | 6 +
board/toradex/apalis_t30/apalis_t30.c | 92 ++
.../toradex/apalis_t30/pinmux-config-apalis_t30.h | 347 +
configs/apalis_t30_defconfig | 3 +
include/configs/apalis_t30.h | 80 +
11 files changed, 877 insertions(+)
create mode 100644 arch/arm/dts/tegra30-apalis.dts
create mode 100644 board/toradex/apalis_t30/Kconfig
create mode 100644 board/toradex/apalis_t30/MAINTAINERS
create mode 100644 board/toradex/apalis_t30/Makefile
create mode 100644 board/toradex/apalis_t30/apalis_t30.c
create mode 100644 board/toradex/apalis_t30/pinmux-config-apalis_t30.h
create mode 100644 configs/apalis_t30_defconfig
create mode 100644 include/configs/apalis_t30.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index dd987cc..e5d31f9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -701,6 +701,9 @@ config TARGET_WHISTLER
config TARGET_COLIBRI_T20_IRIS
bool Support colibri_t20_iris
+config TARGET_APALIS_T30
+ bool Support Apalis T30
+
config TARGET_COLIBRI_T30
bool Support Colibri T30
@@ -990,6 +993,7 @@ source board/ti/ti816x/Kconfig
source board/ti/tnetv107xevm/Kconfig
source board/timll/devkit3250/Kconfig
source board/timll/devkit8000/Kconfig
+source board/toradex/apalis_t30/Kconfig
source board/toradex/colibri_pxa270/Kconfig
source board/toradex/colibri_t20_iris/Kconfig
source board/toradex/colibri_t30/Kconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c46b7be..45f7f8b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -19,6 +19,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-ventana.dtb \
tegra20-whistler.dtb \
tegra20-colibri_t20_iris.dtb \
+ tegra30-apalis.dtb \
tegra30-beaver.dtb \
tegra30-cardhu.dtb \
tegra30-colibri.dtb \
diff --git a/arch/arm/dts/tegra30-apalis.dts b/arch/arm/dts/tegra30-apalis.dts
new file mode 100644
index 000..5c717e2c
--- /dev/null
+++ b/arch/arm/dts/tegra30-apalis.dts
@@ -0,0 +1,300 @@
+/dts-v1/;
+
+#include tegra30.dtsi
+
+/ {
+ model = Toradex Apalis T30;
+ compatible = toradex,apalis_t30, nvidia,tegra30;
+
+ aliases {
+ i2c0 = /i2c@7000d000;
+ i2c1 = /i2c@7000c000;
+ i2c2 = /i2c@7000c500;
+ i2c3 = /i2c@7000c700;
+ sdhci0 = /sdhci@78000600;
+ sdhci1 = /sdhci@78000400;
+ sdhci2 = /sdhci@7800;
+ usb0 = /usb@7d00;
+ usb1 = /usb@7d004000;
+ usb2 = /usb@7d008000;
+ };
+
+ memory {
+ device_type = memory;
+ reg = 0x8000 0x4000;
+ };
+
+ pcie-controller@3000 {
+ status = okay;
+ avdd-pexa-supply = vdd2_reg;
+ vdd-pexa-supply = vdd2_reg;
+ avdd-pexb-supply = vdd2_reg;
+ vdd-pexb-supply = vdd2_reg;
+ avdd-pex-pll-supply = vdd2_reg;
+ avdd-plle-supply = ldo6_reg;
+ vddio-pex-ctl-supply = sys_3v3_reg;
+ hvdd-pex-supply = sys_3v3_reg;
+
+ pci@1,0 {
+
Re: [U-Boot] [PATCH 6/8] ARMv8: PSCI: Fixup the device tree for PSCI v0.2
On Mon, Sep 01, 2014 at 07:43:18PM +0100, Mark Rutland wrote:
Hi,
diff --git a/arch/arm/cpu/armv8/cpu-dt.c b/arch/arm/cpu/armv8/cpu-dt.c
index 9792bc0..c2c8fe7 100644
--- a/arch/arm/cpu/armv8/cpu-dt.c
+++ b/arch/arm/cpu/armv8/cpu-dt.c
@@ -9,7 +9,69 @@
#include fdt_support.h
#ifdef CONFIG_MP
+#ifdef CONFIG_ARMV8_PSCI
+static void psci_reserve_mem(void *fdt)
+{
+#ifndef CONFIG_ARMV8_SECURE_BASE
+/* secure code lives in RAM, keep it alive */
+fdt_add_mem_rsv(fdt, (unsigned long)__secure_start,
+__secure_end - __secure_start);
+#endif
+}
With PSCI I'd be worried about telling the OS about this memory at all.
If the OS maps the memory we could encounter issues with mismatched
aliases and/or unexpected hits in the D-cache, which can result in a
loss of ordering and/or visbility guarantees, which could break the PSCI
implementation.
With the KVM or trusted firmware PSCI implementations the (guest) OS
cannot map the implementation's memory, preventing such problems. The
arm64 Linux boot-wrapper is dodgy in this regard currently.
The idea here is that if there is no PSCI specific (most likely secure)
memory allocated in the system, the macro CONFIG_ARMV8_SECURE_BASE
will not be defined. In this case the PSCI vector table and its support
code will be in DDR and will be protected from Linux using memreserve.
Sure, this will prevent the OS from explicitly modifying this memory.
However, the OS will still map the memory. This renders the protection
incomplete due to the possibility of mismatched attributes and/or
unexpected cache hits resulting in nasty coherency problems. We are
likely to get away with this most of the time (if the kernel and U-Boot
use the same attributes), but it would be very easy to blow things up
accidentally.
The only way to prevent that is to completely remove a portion of the
memory from the view of the OS, such that it doesn't map the memory at
all.
To clarify:
If the PSCI implementation uses some memory not described to the OS
there is no problem. Ideally this would be some secure SRAM somwhere,
which the OS can never map. So if you are using some secure RAM then
there is no issue.
If the memory is described to the non-secure OS, then there can be
coherency issues unless either:
* The caches are not in use at EL3. This necessitates something like
bakery locks for synchronization.
* The memory is mapped at EL3 as secure, and the core makes a
distinction between secure and non-secure memory (see
ID_AA64MMFR0_EL1.SNSMem). Otherwise misatched attributes can cause
coherency issues (see B2.9 Mismatched memory attributes in the ARM
ARM).
Thanks,
Mark.
___
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[U-Boot] [PATCH] mtd: atmel_nand: Disable subpage NAND write when using Atmel PMECC
Disable subpage write when using PMECC to prevent buggy partial page write. This fix has been taken from linux sources (see commit 90445ff6241e2a13445310803e2efa606c61f276) Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com --- Hi, Here is a link to the linux commit: https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/drivers/mtd/nand/atmel_nand.c?id=90445ff6241e2a13445310803e2efa606c61f276 Best Regards, Boris drivers/mtd/nand/atmel_nand.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index e73834d..ee67662 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -881,6 +881,7 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand, return -ENOMEM; } + nand-options |= NAND_NO_SUBPAGE_WRITE; nand-ecc.read_page = atmel_nand_pmecc_read_page; nand-ecc.write_page = atmel_nand_pmecc_write_page; nand-ecc.strength = cap; -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 5/6] MAINTAINERS: add me as a maintainer of UniPhier platform
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- Changes in v3: None Changes in v2: - Newly added MAINTAINERS | 8 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index af194ca..cb5b3f0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -149,6 +149,14 @@ F: arch/arm/include/asm/arch-davinci/ F: arch/arm/include/asm/arch-omap*/ F: arch/arm/include/asm/ti-common/ +ARM UNIPHIER +M: Masahiro Yamada yamad...@jp.panasonic.com +S: Maintained +F: arch/arm/cpu/armv7/uniphier/ +F: arch/arm/include/asm/arch-uniphier/ +F: configs/ph1_*_defconfig +F: drivers/serial/serial_uniphier.c + ARM ZYNQ M: Michal Simek mon...@monstr.eu S: Maintained -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/6] serial: add UniPhier serial driver
The driver for on-chip UART used on Panasonic UniPhier platform.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
Changes in v3: None
Changes in v2:
- Use const unsigned int mode_x_div = 16
instead of #define MODE_X_DIV 16
- Use DIV_ROUND_CLOSEST() macro to compute the divisor
drivers/serial/Makefile | 1 +
drivers/serial/serial.c | 2 +
drivers/serial/serial_uniphier.c | 204 +++
3 files changed, 207 insertions(+)
create mode 100644 drivers/serial/serial_uniphier.c
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 571c18f..385b2f9 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_BFIN_SERIAL) += serial_bfin.o
obj-$(CONFIG_FSL_LPUART) += serial_lpuart.o
obj-$(CONFIG_MXS_AUART) += mxs_auart.o
obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
+obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index d2eb752..d32673e 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -157,6 +157,7 @@ serial_initfunc(sh_serial_initialize);
serial_initfunc(arm_dcc_initialize);
serial_initfunc(mxs_auart_initialize);
serial_initfunc(arc_serial_initialize);
+serial_initfunc(uniphier_serial_initialize);
/**
* serial_register() - Register serial driver with serial driver core
@@ -250,6 +251,7 @@ void serial_initialize(void)
arm_dcc_initialize();
mxs_auart_initialize();
arc_serial_initialize();
+ uniphier_serial_initialize();
serial_assign(default_serial_console()-name);
}
diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/serial_uniphier.c
new file mode 100644
index 000..f8c9d92
--- /dev/null
+++ b/drivers/serial/serial_uniphier.c
@@ -0,0 +1,204 @@
+/*
+ * Copyright (C) 2012-2014 Panasonic Corporation
+ * Author: Masahiro Yamada yamad...@jp.panasonic.com
+ *
+ * Based on serial_ns16550.c
+ * (C) Copyright 2000
+ * Rob Taylor, Flying Pig Systems. r...@flyingpig.com.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include serial.h
+
+#define UART_REG(x)\
+ u8 x; \
+ u8 postpad_##x[3];
+
+/*
+ * Note: Register map is slightly different from that of 16550.
+ */
+struct uniphier_serial {
+ UART_REG(rbr); /* 0x00 */
+ UART_REG(ier); /* 0x04 */
+ UART_REG(iir); /* 0x08 */
+ UART_REG(fcr); /* 0x0c */
+ u8 mcr; /* 0x10 */
+ u8 lcr;
+ u16 __postpad;
+ UART_REG(lsr); /* 0x14 */
+ UART_REG(msr); /* 0x18 */
+ u32 __none1;
+ u32 __none2;
+ u16 dlr;
+ u16 __postpad2;
+};
+
+#define thr rbr
+
+/*
+ * These are the definitions for the Line Control Register
+ */
+#define UART_LCR_WLS_8 0x03/* 8 bit character length */
+
+/*
+ * These are the definitions for the Line Status Register
+ */
+#define UART_LSR_DR0x01/* Data ready */
+#define UART_LSR_THRE 0x20/* Xmit holding register empty */
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void uniphier_serial_init(struct uniphier_serial *port)
+{
+ const unsigned int mode_x_div = 16;
+ unsigned int divisor;
+
+ writeb(UART_LCR_WLS_8, port-lcr);
+
+ divisor = DIV_ROUND_CLOSEST(CONFIG_SYS_UNIPHIER_UART_CLK,
+ mode_x_div * gd-baudrate);
+
+ writew(divisor, port-dlr);
+}
+
+static void uniphier_serial_setbrg(struct uniphier_serial *port)
+{
+ uniphier_serial_init(port);
+}
+
+static int uniphier_serial_tstc(struct uniphier_serial *port)
+{
+ return (readb(port-lsr) UART_LSR_DR) != 0;
+}
+
+static int uniphier_serial_getc(struct uniphier_serial *port)
+{
+ while (!uniphier_serial_tstc(port))
+ ;
+
+ return readb(port-rbr);
+}
+
+static void uniphier_serial_putc(struct uniphier_serial *port, const char c)
+{
+ if (c == '\n')
+ uniphier_serial_putc(port, '\r');
+
+ while (!(readb(port-lsr) UART_LSR_THRE))
+ ;
+
+ writeb(c, port-thr);
+}
+
+static struct uniphier_serial *serial_ports[4] = {
+#ifdef CONFIG_SYS_UNIPHIER_SERIAL_BASE0
+ (struct uniphier_serial *)CONFIG_SYS_UNIPHIER_SERIAL_BASE0,
+#else
+ NULL,
+#endif
+#ifdef CONFIG_SYS_UNIPHIER_SERIAL_BASE1
+ (struct uniphier_serial *)CONFIG_SYS_UNIPHIER_SERIAL_BASE1,
+#else
+ NULL,
+#endif
+#ifdef CONFIG_SYS_UNIPHIER_SERIAL_BASE2
+ (struct uniphier_serial *)CONFIG_SYS_UNIPHIER_SERIAL_BASE2,
+#else
+ NULL,
+#endif
+#ifdef CONFIG_SYS_UNIPHIER_SERIAL_BASE3
+ (struct uniphier_serial *)CONFIG_SYS_UNIPHIER_SERIAL_BASE3,
+#else
+ NULL,
+#endif
+};
+
+/* Multi serial device functions */
+#define
[U-Boot] [PATCH v3 1/6] nand: denali: add Denali NAND driver for SPL
The SPL-mode driver for Denali(Cadence) NAND Flash Memory Controller IP.
This driver requires two CONFIG macros:
- CONFIG_NAND_DENALI
Define to enable this driver.
- CONFIG_SYS_NAND_BAD_BLOCK_POS
Specify bad block mark position in the oob space. Typically 0.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Chin Liang See cl...@altera.com
Cc: Scott Wood scottw...@freescale.com
---
Changes in v3: None
Changes in v2:
- Avoid unaligned access
- Replace a magic number 0x2000 with PIPELINE_ACCESS
drivers/mtd/nand/Makefile | 1 +
drivers/mtd/nand/denali_spl.c | 226 ++
2 files changed, 227 insertions(+)
create mode 100644 drivers/mtd/nand/denali_spl.c
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index f298f84..052c285 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -66,6 +66,7 @@ obj-$(CONFIG_NAND_DOCG4) += docg4.o
else # minimal SPL drivers
+obj-$(CONFIG_NAND_DENALI) += denali_spl.o
obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
diff --git a/drivers/mtd/nand/denali_spl.c b/drivers/mtd/nand/denali_spl.c
new file mode 100644
index 000..13833d3
--- /dev/null
+++ b/drivers/mtd/nand/denali_spl.c
@@ -0,0 +1,226 @@
+/*
+ * Copyright (C) 2014 Panasonic Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/unaligned.h
+#include denali.h
+
+#define SPARE_ACCESS 0x41
+#define MAIN_ACCESS0x42
+#define PIPELINE_ACCESS0x2000
+
+#define BANK(x) ((x) 24)
+
+static void __iomem *denali_flash_mem =
+ (void __iomem *)CONFIG_SYS_NAND_DATA_BASE;
+static void __iomem *denali_flash_reg =
+ (void __iomem *)CONFIG_SYS_NAND_REGS_BASE;
+
+static const int flash_bank;
+static uint8_t page_buffer[NAND_MAX_PAGESIZE];
+static int page_size, oob_size, pages_per_block;
+
+static void index_addr(uint32_t address, uint32_t data)
+{
+ writel(address, denali_flash_mem + INDEX_CTRL_REG);
+ writel(data, denali_flash_mem + INDEX_DATA_REG);
+}
+
+static int wait_for_irq(uint32_t irq_mask)
+{
+ unsigned long timeout = 100;
+ uint32_t intr_status;
+
+ do {
+ intr_status = readl(denali_flash_reg + INTR_STATUS(flash_bank));
+
+ if (intr_status INTR_STATUS__ECC_UNCOR_ERR) {
+ debug(Uncorrected ECC detected\n);
+ return -EIO;
+ }
+
+ if (intr_status irq_mask)
+ break;
+
+ udelay(1);
+ timeout--;
+ } while (timeout);
+
+ if (!timeout) {
+ debug(Timeout with interrupt status %08x\n, intr_status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static void read_data_from_flash_mem(uint8_t *buf, int len)
+{
+ int i;
+ uint32_t *buf32;
+
+ /* transfer the data from the flash */
+ buf32 = (uint32_t *)buf;
+
+ /*
+* Let's take care of unaligned access although it rarely happens.
+* Avoid put_unaligned() for the normal use cases since it leads to
+* a bit performance regression.
+*/
+ if ((unsigned long)buf32 % 4) {
+ for (i = 0; i len / 4; i++)
+ put_unaligned(readl(denali_flash_mem + INDEX_DATA_REG),
+ buf32++);
+ } else {
+ for (i = 0; i len / 4; i++)
+ *buf32++ = readl(denali_flash_mem + INDEX_DATA_REG);
+ }
+
+ if (len % 4) {
+ u32 tmp;
+
+ tmp = cpu_to_le32(readl(denali_flash_mem + INDEX_DATA_REG));
+ buf = (uint8_t *)buf32;
+ for (i = 0; i len % 4; i++) {
+ *buf++ = tmp;
+ tmp = 8;
+ }
+ }
+}
+
+int denali_send_pipeline_cmd(int page, int ecc_en, int access_type)
+{
+ uint32_t addr, cmd;
+ static uint32_t page_count = 1;
+
+ writel(ecc_en, denali_flash_reg + ECC_ENABLE);
+
+ /* clear all bits of intr_status. */
+ writel(0x, denali_flash_reg + INTR_STATUS(flash_bank));
+
+ addr = BANK(flash_bank) | page;
+
+ /* setup the acccess type */
+ cmd = MODE_10 | addr;
+ index_addr(cmd, access_type);
+
+ /* setup the pipeline command */
+ index_addr(cmd, PIPELINE_ACCESS | page_count);
+
+ cmd = MODE_01 | addr;
+ writel(cmd, denali_flash_mem + INDEX_CTRL_REG);
+
+ return wait_for_irq(INTR_STATUS__LOAD_COMP);
+}
+
+static int nand_read_oob(void *buf, int page)
+{
+ int ret;
+
+ ret = denali_send_pipeline_cmd(page, 0, SPARE_ACCESS);
+ if (ret 0)
+ return ret;
+
+ read_data_from_flash_mem(buf, oob_size);
+
+ return 0;
+}
+
+static int
[U-Boot] [PATCH v3 6/6] git-mailrc: add me as a maintainer of UniPhier platform
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- Changes in v3: None Changes in v2: - Rebase doc/git-mailrc | 1 + 1 file changed, 1 insertion(+) diff --git a/doc/git-mailrc b/doc/git-mailrc index 0fba100..35f2eb2 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -63,6 +63,7 @@ alias sunxi uboot, ijc, jwrdegoede alias tegra uboot, sjg, Tom Warren twar...@nvidia.com, Stephen Warren swar...@nvidia.com alias tegra2 tegra alias ti uboot, trini +alias uniphier uboot, masahiro alias zynq uboot, monstr alias avr32 uboot, abiessmann -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 4/6] arm: uniphier: add Kconfig and defconfig
Add entries for Panasonic UniPhier family: PH1-LD4, PH1-Pro4, PH1-sLD8 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- Changes in v3: - Rebase on the current u-boot/master Changes in v2: - Rebase on the current u-boot/master arch/arm/Kconfig| 5 + arch/arm/cpu/armv7/uniphier/Kconfig | 32 configs/ph1_ld4_defconfig | 4 configs/ph1_pro4_defconfig | 4 configs/ph1_sld8_defconfig | 4 5 files changed, 49 insertions(+) create mode 100644 arch/arm/cpu/armv7/uniphier/Kconfig create mode 100644 configs/ph1_ld4_defconfig create mode 100644 configs/ph1_pro4_defconfig create mode 100644 configs/ph1_sld8_defconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9cdd5f0..95d3538 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -512,6 +512,9 @@ config TARGET_COLIBRI_PXA270 config TARGET_JORNADA bool Support jornada +config ARCH_UNIPHIER + bool Panasonic UniPhier platform + endchoice source arch/arm/cpu/armv8/Kconfig @@ -540,6 +543,8 @@ source arch/arm/cpu/armv7/rmobile/Kconfig source arch/arm/cpu/armv7/tegra-common/Kconfig +source arch/arm/cpu/armv7/uniphier/Kconfig + source arch/arm/cpu/arm926ejs/versatile/Kconfig source arch/arm/cpu/armv7/zynq/Kconfig diff --git a/arch/arm/cpu/armv7/uniphier/Kconfig b/arch/arm/cpu/armv7/uniphier/Kconfig new file mode 100644 index 000..34f5496 --- /dev/null +++ b/arch/arm/cpu/armv7/uniphier/Kconfig @@ -0,0 +1,32 @@ +menu Panasonic UniPhier platform + depends on ARCH_UNIPHIER + +config SYS_CPU + string + default armv7 + +config SYS_SOC + string + default uniphier + +config SYS_CONFIG_NAME + string + default ph1_pro4 if MACH_PH1_PRO4 + default ph1_ld4 if MACH_PH1_LD4 + default ph1_sld8 if MACH_PH1_SLD8 + +choice + prompt UniPhier SoC select + +config MACH_PH1_PRO4 + bool PH1-Pro4 + +config MACH_PH1_LD4 + bool PH1-LD4 + +config MACH_PH1_SLD8 + bool PH1-sLD8 + +endchoice + +endmenu diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig new file mode 100644 index 000..d6fcb25 --- /dev/null +++ b/configs/ph1_ld4_defconfig @@ -0,0 +1,4 @@ +CONFIG_SPL=y ++S:CONFIG_ARM=y ++S:CONFIG_ARCH_UNIPHIER=y ++S:CONFIG_MACH_PH1_LD4=y diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig new file mode 100644 index 000..557b3aa --- /dev/null +++ b/configs/ph1_pro4_defconfig @@ -0,0 +1,4 @@ +CONFIG_SPL=y ++S:CONFIG_ARM=y ++S:CONFIG_ARCH_UNIPHIER=y ++S:CONFIG_MACH_PH1_PRO4=y diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig new file mode 100644 index 000..8028d12 --- /dev/null +++ b/configs/ph1_sld8_defconfig @@ -0,0 +1,4 @@ +CONFIG_SPL=y ++S:CONFIG_ARM=y ++S:CONFIG_ARCH_UNIPHIER=y ++S:CONFIG_MACH_PH1_SLD8=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 0/6] Add support for Panasonic UniPhier SoCs/boards
UniPhier is the SoC family developed by Panasonic Corporation, based on ARM Cortex-A9. This patch set adds its SoC/board support code with some drivers. This series depends on the Denali NAND driver patch: http://patchwork.ozlabs.org/patch/381305/ It must be applied first. Masahiro Yamada (6): nand: denali: add Denali NAND driver for SPL serial: add UniPhier serial driver arm: uniphier: add UniPhier SoC support code arm: uniphier: add Kconfig and defconfig MAINTAINERS: add me as a maintainer of UniPhier platform git-mailrc: add me as a maintainer of UniPhier platform MAINTAINERS|8 + arch/arm/Kconfig |5 + arch/arm/cpu/armv7/uniphier/Kconfig| 32 + arch/arm/cpu/armv7/uniphier/Makefile | 23 + arch/arm/cpu/armv7/uniphier/board_common.c | 32 + arch/arm/cpu/armv7/uniphier/board_late_init.c | 79 ++ arch/arm/cpu/armv7/uniphier/cache_uniphier.c | 154 +++ arch/arm/cpu/armv7/uniphier/cmd_pinmon.c | 33 + arch/arm/cpu/armv7/uniphier/cpu_info.c | 59 ++ arch/arm/cpu/armv7/uniphier/dram_init.c| 37 + arch/arm/cpu/armv7/uniphier/init_page_table.c | 1068 arch/arm/cpu/armv7/uniphier/lowlevel_init.S| 159 +++ arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile | 10 + arch/arm/cpu/armv7/uniphier/ph1-ld4/bcu_init.c | 33 + arch/arm/cpu/armv7/uniphier/ph1-ld4/board_info.c | 16 + .../armv7/uniphier/ph1-ld4/board_postclk_init.c| 42 + arch/arm/cpu/armv7/uniphier/ph1-ld4/boot-mode.c|1 + arch/arm/cpu/armv7/uniphier/ph1-ld4/clkrst_init.c | 29 + arch/arm/cpu/armv7/uniphier/ph1-ld4/pinctrl.c | 63 ++ arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_init.c | 189 arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_spectrum.c |1 + arch/arm/cpu/armv7/uniphier/ph1-ld4/sbc_init.c | 44 + arch/arm/cpu/armv7/uniphier/ph1-ld4/sg_init.c | 28 + arch/arm/cpu/armv7/uniphier/ph1-ld4/umc_init.c | 10 + arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile | 10 + arch/arm/cpu/armv7/uniphier/ph1-pro4/board_info.c | 16 + .../armv7/uniphier/ph1-pro4/board_postclk_init.c | 39 + arch/arm/cpu/armv7/uniphier/ph1-pro4/boot-mode.c | 66 ++ arch/arm/cpu/armv7/uniphier/ph1-pro4/clkrst_init.c | 29 + arch/arm/cpu/armv7/uniphier/ph1-pro4/pinctrl.c | 45 + arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_init.c| 168 +++ .../arm/cpu/armv7/uniphier/ph1-pro4/pll_spectrum.c | 18 + arch/arm/cpu/armv7/uniphier/ph1-pro4/sbc_init.c| 75 ++ arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c | 28 + arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c| 10 + arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile | 10 + arch/arm/cpu/armv7/uniphier/ph1-sld8/bcu_init.c|1 + arch/arm/cpu/armv7/uniphier/ph1-sld8/board_info.c | 16 + .../armv7/uniphier/ph1-sld8/board_postclk_init.c |1 + arch/arm/cpu/armv7/uniphier/ph1-sld8/boot-mode.c |1 + arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c | 29 + arch/arm/cpu/armv7/uniphier/ph1-sld8/pinctrl.c | 57 ++ arch/arm/cpu/armv7/uniphier/ph1-sld8/pll_init.c| 201 .../arm/cpu/armv7/uniphier/ph1-sld8/pll_spectrum.c |1 + arch/arm/cpu/armv7/uniphier/ph1-sld8/sbc_init.c| 51 + arch/arm/cpu/armv7/uniphier/ph1-sld8/sg_init.c |1 + arch/arm/cpu/armv7/uniphier/ph1-sld8/umc_init.c| 10 + arch/arm/cpu/armv7/uniphier/reset.c| 29 + arch/arm/cpu/armv7/uniphier/smp.S | 54 + arch/arm/cpu/armv7/uniphier/spl.c | 17 + arch/arm/cpu/armv7/uniphier/support_card.c | 180 arch/arm/cpu/armv7/uniphier/timer.c| 39 + arch/arm/include/asm/arch-uniphier/arm-mpcore.h| 46 + arch/arm/include/asm/arch-uniphier/bcu-regs.h | 29 + arch/arm/include/asm/arch-uniphier/board.h | 35 + arch/arm/include/asm/arch-uniphier/boot-device.h | 20 + arch/arm/include/asm/arch-uniphier/led.h | 101 ++ arch/arm/include/asm/arch-uniphier/sbc-regs.h | 107 ++ arch/arm/include/asm/arch-uniphier/sc-regs.h | 62 ++ arch/arm/include/asm/arch-uniphier/sg-regs.h | 182 arch/arm/include/asm/arch-uniphier/ssc-regs.h | 65 ++ configs/ph1_ld4_defconfig |4 + configs/ph1_pro4_defconfig |4 + configs/ph1_sld8_defconfig |4 + doc/git-mailrc |1 + drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/denali_spl.c | 226 + drivers/serial/Makefile|1 + drivers/serial/serial.c|2 + drivers/serial/serial_uniphier.c | 204 include/configs/ph1_ld4.h | 59 ++
[U-Boot] Fwd: Recommended SH toolchain
Hi Tom, On Thu, Aug 21, 2014 at 2:07 PM, Vasili Galka vvv...@gmail.com wrote: Hi Nobuhiro, I'm trying to verify the correct build of all SH boards in U-Boot. What is the recommended toolchain to use? I tried the one from kernel.org [1], but it does not work for all the boards, I get build errors like this one: Building rsk7203 board... sh4-linux-gcc: error: command line option '-m3e' is not supported by this configuration sh4-linux-gcc: error: command line option '-m3e' is not supported by this configuration make[3]: *** [include/autoconf.mk] Error 1 make[3]: *** [include/autoconf.mk.dep] Error 1 make[2]: *** [silentoldconfig] Error 1 make: *** [sub-make] Error 2 sh4-linux-size: '/home/lab/dev/u-boot/out/all_sh/u-boot': No such file sh4-linux-gcc: error: command line option '-m3e' is not supported by this configuration sh4-linux-gcc: error: command line option '-m3e' is not supported by this configuration make[3]: *** [include/autoconf.mk] Error 1 make[3]: *** Waiting for unfinished jobs make[3]: *** [include/autoconf.mk.dep] Error 1 'make -f /home/lab/dev/u-boot/scripts/Makefile.autoconf obj=include include/autoconf.mk include/autoconf.mk.dep' Failed make[2]: *** [silentoldconfig] Error 1 make[1]: *** No rule to make target `include/config/auto.conf', needed by `include/config/uboot.release'. Stop. make: *** [sub-make] Error 2 I'll appreciate your help. [1] https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.6.3/ Regards, Vasili What is the state of U-Boot support for the SH architecture? Is it maintained at all? I wanted to verify the build, but failed finding a proper toolchain. I tried contacting the custodian (Nobuhiro), but got no answer. Best, Vasili ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 04/25] spi: kirkwood_spi.c: Make global variable static
Signed-off-by: Stefan Roese s...@denx.de Cc: Jagannadha Sutradharudu Teki jaga...@xilinx.com Acked-by: Prafulla Wadaskar prafu...@marvell.com Tested-by: Luka Perkov l...@openwrt.org --- Changes in v3: - Added Acked-by from Prafulla to all Kirkwood patches - Added Tested-by from Luka Changes in v2: None drivers/spi/kirkwood_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index 449e9f8..7d1c1f9 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -18,7 +18,7 @@ static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE; -u32 cs_spi_mpp_back[2]; +static u32 cs_spi_mpp_back[2]; struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int mode) -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 08/25] arm: marvell: Move arch-kirkwood/spi.h to arch-mvebu/spi.h
This move makes it possible to use this kirkwood SPI driver from other
MVEBU platforms as well. This will be used by the upcoming Armada XP
support.
Signed-off-by: Stefan Roese s...@denx.de
Acked-by: Prafulla Wadaskar prafu...@marvell.com
Reviewed-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
Tested-by: Luka Perkov l...@openwrt.org
---
Changes in v3:
- Added Acked-by from Prafulla to all Kirkwood patches
- Added Tested-by from Luka
- Added Reviewed-by from Jagannadha
Changes in v2: None
arch/arm/include/asm/{arch-kirkwood = arch-mvebu}/spi.h | 0
drivers/spi/kirkwood_spi.c | 2 +-
2 files changed, 1 insertion(+), 1 deletion(-)
rename arch/arm/include/asm/{arch-kirkwood = arch-mvebu}/spi.h (100%)
diff --git a/arch/arm/include/asm/arch-kirkwood/spi.h
b/arch/arm/include/asm/arch-mvebu/spi.h
similarity index 100%
rename from arch/arm/include/asm/arch-kirkwood/spi.h
rename to arch/arm/include/asm/arch-mvebu/spi.h
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index de0e914..9710f12 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -13,8 +13,8 @@
#include spi.h
#include asm/io.h
#include asm/arch/soc.h
-#include asm/arch/spi.h
#include asm/arch/mpp.h
+#include asm/arch-mvebu/spi.h
static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE;
--
2.1.0
___
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http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 12/25] arm: marvell: Extract kirkwood gpio functions into new common file gpio.c
This makes is possible to use those gpio functions from other MVEBU SoC's as
well.
Signed-off-by: Stefan Roese s...@denx.de
Acked-by: Prafulla Wadaskar prafu...@marvell.com
Tested-by: Luka Perkov l...@openwrt.org
---
Changes in v3:
- Added Acked-by from Prafulla to all Kirkwood patches
- Added Tested-by from Luka
Changes in v2: None
arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 17 --
arch/arm/include/asm/arch-kirkwood/cpu.h| 2 +-
arch/arm/include/asm/arch-kirkwood/gpio.h | 16 ++---
arch/arm/include/asm/arch-kirkwood/soc.h| 4 ++--
arch/arm/mvebu-common/Makefile | 1 +
arch/arm/mvebu-common/gpio.c| 30 +
board/LaCie/net2big_v2/net2big_v2.c | 4 ++--
board/LaCie/netspace_v2/netspace_v2.c | 4 ++--
board/LaCie/wireless_space/wireless_space.c | 4 ++--
board/Marvell/dreamplug/dreamplug.c | 6 ++---
board/Marvell/guruplug/guruplug.c | 6 ++---
board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c | 6 ++---
board/Marvell/openrd/openrd.c | 6 ++---
board/Marvell/rd6281a/rd6281a.c | 6 ++---
board/Marvell/sheevaplug/sheevaplug.c | 6 ++---
board/Seagate/dockstar/dockstar.c | 8 +++
board/Seagate/goflexhome/goflexhome.c | 8 +++
board/buffalo/lsxl/lsxl.c | 6 ++---
board/cloudengines/pogo_e02/pogo_e02.c | 6 ++---
board/d-link/dns325/dns325.c| 4 ++--
board/iomega/iconnect/iconnect.c| 6 ++---
board/karo/tk71/tk71.c | 6 ++---
board/keymile/km_arm/km_arm.c | 4 ++--
board/raidsonic/ib62x0/ib62x0.c | 6 ++---
24 files changed, 93 insertions(+), 79 deletions(-)
create mode 100644 arch/arm/mvebu-common/gpio.c
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
index 75d3799..ea835fc 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
@@ -140,23 +140,6 @@ int kw_config_adr_windows(void)
}
/*
- * kw_config_gpio - GPIO configuration
- */
-void kw_config_gpio(u32 gpp0_oe_val, u32 gpp1_oe_val, u32 gpp0_oe, u32 gpp1_oe)
-{
- struct kwgpio_registers *gpio0reg =
- (struct kwgpio_registers *)KW_GPIO0_BASE;
- struct kwgpio_registers *gpio1reg =
- (struct kwgpio_registers *)KW_GPIO1_BASE;
-
- /* Init GPIOS to default values as per board requirement */
- writel(gpp0_oe_val, gpio0reg-dout);
- writel(gpp1_oe_val, gpio1reg-dout);
- writel(gpp0_oe, gpio0reg-oe);
- writel(gpp1_oe, gpio1reg-oe);
-}
-
-/*
* kw_config_mpp - Multi-Purpose Pins Functionality configuration
*
* Each MPP can be configured to different functionality through
diff --git a/arch/arm/include/asm/arch-kirkwood/cpu.h
b/arch/arm/include/asm/arch-kirkwood/cpu.h
index 97daa40..5900a15 100644
--- a/arch/arm/include/asm/arch-kirkwood/cpu.h
+++ b/arch/arm/include/asm/arch-kirkwood/cpu.h
@@ -144,7 +144,7 @@ unsigned int kw_sdram_bar(enum memory_bank bank);
unsigned int kw_sdram_bs(enum memory_bank bank);
void kw_sdram_size_adjust(enum memory_bank bank);
int kw_config_adr_windows(void);
-void kw_config_gpio(unsigned int gpp0_oe_val, unsigned int gpp1_oe_val,
+void mvebu_config_gpio(unsigned int gpp0_oe_val, unsigned int gpp1_oe_val,
unsigned int gpp0_oe, unsigned int gpp1_oe);
int kw_config_mpp(unsigned int mpp0_7, unsigned int mpp8_15,
unsigned int mpp16_23, unsigned int mpp24_31,
diff --git a/arch/arm/include/asm/arch-kirkwood/gpio.h
b/arch/arm/include/asm/arch-kirkwood/gpio.h
index 5f4d786..aa8c5da 100644
--- a/arch/arm/include/asm/arch-kirkwood/gpio.h
+++ b/arch/arm/include/asm/arch-kirkwood/gpio.h
@@ -21,14 +21,14 @@
#define GPIO_MAX 50
#define GPIO_OFF(pin) (((pin) 5) ? 0x0040 : 0x)
-#define GPIO_OUT(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x00)
-#define GPIO_IO_CONF(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x04)
-#define GPIO_BLINK_EN(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x08)
-#define GPIO_IN_POL(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x0c)
-#define GPIO_DATA_IN(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x10)
-#define GPIO_EDGE_CAUSE(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x14)
-#define GPIO_EDGE_MASK(pin)(KW_GPIO0_BASE + GPIO_OFF(pin) + 0x18)
-#define GPIO_LEVEL_MASK(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x1c)
+#define GPIO_OUT(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x00)
+#define GPIO_IO_CONF(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x04)
+#define GPIO_BLINK_EN(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x08)
+#define GPIO_IN_POL(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x0c)
+#define GPIO_DATA_IN(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x10)
+#define GPIO_EDGE_CAUSE(pin) (MVEBU_GPIO0_BASE +
[U-Boot] [PATCH v3 21/25] arm: kirkwood: Remove some dead code from cpu.c
All those functions removed with this patch are not accessed at all. So lets
remove them.
Signed-off-by: Stefan Roese s...@denx.de
---
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 55 ---
1 file changed, 55 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
index ea835fc..9e412bb 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
@@ -9,14 +9,11 @@
#include common.h
#include netdev.h
#include asm/cache.h
-#include u-boot/md5.h
#include asm/io.h
#include asm/arch/cpu.h
#include asm/arch/soc.h
#include mvebu_mmc.h
-#define BUFLEN 16
-
void reset_cpu(unsigned long ignored)
{
struct kwcpu_registers *cpureg =
@@ -30,31 +27,6 @@ void reset_cpu(unsigned long ignored)
}
/*
- * Generates Ramdom hex number reading some time varient system registers
- * and using md5 algorithm
- */
-unsigned char get_random_hex(void)
-{
- int i;
- u32 inbuf[BUFLEN];
- u8 outbuf[BUFLEN];
-
- /*
-* in case of 88F6281/88F6282/88F6192 A0,
-* Bit7 need to reset to generate random values in KW_REG_UNDOC_0x1470
-* Soc reg offsets KW_REG_UNDOC_0x1470 and KW_REG_UNDOC_0x1478 are
-* reserved regs and does not have names at this moment
-* (no errata available)
-*/
- writel(readl(KW_REG_UNDOC_0x1478) ~(1 7), KW_REG_UNDOC_0x1478);
- for (i = 0; i BUFLEN; i++) {
- inbuf[i] = readl(KW_REG_UNDOC_0x1470);
- }
- md5((u8 *) inbuf, (BUFLEN * sizeof(u32)), outbuf);
- return outbuf[outbuf[7] % 0x0f];
-}
-
-/*
* Window Size
* Used with the Base register to set the address window size and location.
* Must be programmed from LSB to MSB as sequence of ones followed by
@@ -140,33 +112,6 @@ int kw_config_adr_windows(void)
}
/*
- * kw_config_mpp - Multi-Purpose Pins Functionality configuration
- *
- * Each MPP can be configured to different functionality through
- * MPP control register, ref (sec 6.1 of kirkwood h/w specification)
- *
- * There are maximum 64 Multi-Pourpose Pins on Kirkwood
- * Each MPP functionality can be configuration by a 4bit value
- * of MPP control reg, the value and associated functionality depends
- * upon used SoC varient
- */
-int kw_config_mpp(u32 mpp0_7, u32 mpp8_15, u32 mpp16_23, u32 mpp24_31,
- u32 mpp32_39, u32 mpp40_47, u32 mpp48_55)
-{
- u32 *mppreg = (u32 *) KW_MPP_BASE;
-
- /* program mpp registers */
- writel(mpp0_7, mppreg[0]);
- writel(mpp8_15, mppreg[1]);
- writel(mpp16_23, mppreg[2]);
- writel(mpp24_31, mppreg[3]);
- writel(mpp32_39, mppreg[4]);
- writel(mpp40_47, mppreg[5]);
- writel(mpp48_55, mppreg[6]);
- return 0;
-}
-
-/*
* SYSRSTn Duration Counter Support
*
* Kirkwood SoC implements a hardware-based SYSRSTn duration counter.
--
2.1.0
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 10/25] arm: mvebu: Add common mbus functions to use on Marvell SoCs
These mbus functions are ported from Barebox. The Barebox version is
ported from Linux. These functions will be first used by the upcoming
Armada XP support. Later other Marvell SoC's will be adopted to use
these functions as well (Kirkwood, Orion).
Signed-off-by: Stefan Roese s...@denx.de
Tested-by: Luka Perkov l...@openwrt.org
---
Changes in v3:
- Added Tested-by from Luka
Changes in v2:
- Fixed issue in mbus_dt_setup_win() to also assign remappable windows
- Made mbus_dt_setup_win() non-static, so that it can be called from
other files for board specific mbus window configuration
arch/arm/mvebu-common/Makefile | 1 +
arch/arm/mvebu-common/mbus.c | 471 +
include/linux/mbus.h | 73 +++
3 files changed, 545 insertions(+)
create mode 100644 arch/arm/mvebu-common/mbus.c
create mode 100644 include/linux/mbus.h
diff --git a/arch/arm/mvebu-common/Makefile b/arch/arm/mvebu-common/Makefile
index 4d20d2c..391a125 100644
--- a/arch/arm/mvebu-common/Makefile
+++ b/arch/arm/mvebu-common/Makefile
@@ -7,4 +7,5 @@
#
obj-y = dram.o
+obj-$(CONFIG_ARMADA_XP) += mbus.o
obj-y += timer.o
diff --git a/arch/arm/mvebu-common/mbus.c b/arch/arm/mvebu-common/mbus.c
new file mode 100644
index 000..05c9ef2
--- /dev/null
+++ b/arch/arm/mvebu-common/mbus.c
@@ -0,0 +1,471 @@
+/*
+ * Address map functions for Marvell EBU SoCs (Kirkwood, Armada
+ * 370/XP, Dove, Orion5x and MV78xx0)
+ *
+ * Ported from the Barebox version to U-Boot by:
+ * Stefan Roese s...@denx.de
+ *
+ * The Barebox version is:
+ * Sebastian Hesselbarth sebastian.hesselba...@gmail.com
+ *
+ * based on mbus driver from Linux
+ * (C) Copyright 2008 Marvell Semiconductor
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ *
+ * The Marvell EBU SoCs have a configurable physical address space:
+ * the physical address at which certain devices (PCIe, NOR, NAND,
+ * etc.) sit can be configured. The configuration takes place through
+ * two sets of registers:
+ *
+ * - One to configure the access of the CPU to the devices. Depending
+ * on the families, there are between 8 and 20 configurable windows,
+ * each can be use to create a physical memory window that maps to a
+ * specific device. Devices are identified by a tuple (target,
+ * attribute).
+ *
+ * - One to configure the access to the CPU to the SDRAM. There are
+ * either 2 (for Dove) or 4 (for other families) windows to map the
+ * SDRAM into the physical address space.
+ *
+ * This driver:
+ *
+ * - Reads out the SDRAM address decoding windows at initialization
+ * time, and fills the mbus_dram_info structure with these
+ * informations. The exported function mv_mbus_dram_info() allow
+ * device drivers to get those informations related to the SDRAM
+ * address decoding windows. This is because devices also have their
+ * own windows (configured through registers that are part of each
+ * device register space), and therefore the drivers for Marvell
+ * devices have to configure those device - SDRAM windows to ensure
+ * that DMA works properly.
+ *
+ * - Provides an API for platform code or device drivers to
+ * dynamically add or remove address decoding windows for the CPU -
+ * device accesses. This API is mvebu_mbus_add_window_by_id(),
+ * mvebu_mbus_add_window_remap_by_id() and
+ * mvebu_mbus_del_window().
+ */
+
+#include common.h
+#include asm/errno.h
+#include asm/io.h
+#include asm/arch/cpu.h
+#include asm/arch/soc.h
+#include linux/mbus.h
+
+#define BIT(nr)(1UL (nr))
+
+/* DDR target is the same on all platforms */
+#define TARGET_DDR 0
+
+/* CPU Address Decode Windows registers */
+#define WIN_CTRL_OFF 0x
+#define WIN_CTRL_ENABLE BIT(0)
+#define WIN_CTRL_TGT_MASK 0xf0
+#define WIN_CTRL_TGT_SHIFT4
+#define WIN_CTRL_ATTR_MASK0xff00
+#define WIN_CTRL_ATTR_SHIFT 8
+#define WIN_CTRL_SIZE_MASK0x
+#define WIN_CTRL_SIZE_SHIFT 16
+#define WIN_BASE_OFF 0x0004
+#define WIN_BASE_LOW 0x
+#define WIN_BASE_HIGH 0xf
+#define WIN_REMAP_LO_OFF 0x0008
+#define WIN_REMAP_LOW 0x
+#define WIN_REMAP_HI_OFF 0x000c
+
+#define ATTR_HW_COHERENCY (0x1 4)
+
+#define DDR_BASE_CS_OFF(n) (0x + ((n) 3))
+#define DDR_BASE_CS_HIGH_MASK 0xf
+#define DDR_BASE_CS_LOW_MASK 0xff00
+#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) 3))
+#define DDR_SIZE_ENABLED BIT(0)
+#define DDR_SIZE_CS_MASK 0x1c
+#define DDR_SIZE_CS_SHIFT 2
+#define DDR_SIZE_MASK 0xff00
+
+#define DOVE_DDR_BASE_CS_OFF(n) ((n) 4)
+
+struct mvebu_mbus_state;
+
+struct mvebu_mbus_soc_data {
+ unsigned int num_wins;
+ unsigned int num_remappable_wins;
+ unsigned int (*win_cfg_offset)(const int win);
+ void (*setup_cpu_target)(struct mvebu_mbus_state *s);
+};
+
+struct mvebu_mbus_state mbus_state
+ __attribute__
[U-Boot] [PATCH v3 24/25] tools: kwbimage: Add image version 1 support for Armada XP / 370
This patch integrates the Barebox version of this kwbimage.c file into
U-Boot. As this version supports the image version 1 type for the
Armada XP / 370 SoCs.
It was easier to integrate the existing and known to be working Barebox
source than to update the current U-Boot version to support this
v1 image header format. Now all Marvell MVEBU SoCs are supported:
Image type 0: Kirkwood Dove
Image type 1: Armada 370 Armada XP
Please note that the current v1 support has this restuction (same as
has Barebox version):
Not implemented: support for the register headers and secure headers
in v1 images
Tested on Marvell DB-78460-BP eval board.
Signed-off-by: Stefan Roese s...@denx.de
Tested-by: Luka Perkov l...@openwrt.org
---
Changes in v3: None
Changes in v2: None
tools/kwbimage.c | 1050 --
1 file changed, 782 insertions(+), 268 deletions(-)
diff --git a/tools/kwbimage.c b/tools/kwbimage.c
index 109d616..1120e9b 100644
--- a/tools/kwbimage.c
+++ b/tools/kwbimage.c
@@ -1,364 +1,805 @@
/*
- * (C) Copyright 2008
- * Marvell Semiconductor www.marvell.com
- * Written-by: Prafulla Wadaskar prafu...@marvell.com
+ * Image manipulator for Marvell SoCs
+ * supports Kirkwood, Dove, Armada 370, and Armada XP
+ *
+ * (C) Copyright 2013 Thomas Petazzoni
+ * thomas.petazz...@free-electrons.com
*
* SPDX-License-Identifier:GPL-2.0+
+ *
+ * Not implemented: support for the register headers and secure
+ * headers in v1 images
*/
#include imagetool.h
#include image.h
+#include stdint.h
#include kwbimage.h
-/*
- * Supported commands for configuration file
- */
-static table_entry_t kwbimage_cmds[] = {
- {CMD_BOOT_FROM, BOOT_FROM,boot command, },
- {CMD_NAND_ECC_MODE, NAND_ECC_MODE,NAND mode,},
- {CMD_NAND_PAGE_SIZE,NAND_PAGE_SIZE, NAND size,},
- {CMD_SATA_PIO_MODE, SATA_PIO_MODE,SATA mode,},
- {CMD_DDR_INIT_DELAY,DDR_INIT_DELAY, DDR init dly, },
- {CMD_DATA, DATA, Reg Write Data, },
- {CMD_INVALID, , , },
+#define ALIGN_SUP(x, a) (((x) + (a - 1)) ~(a - 1))
+
+/* Structure of the main header, version 0 (Kirkwood, Dove) */
+struct main_hdr_v0 {
+ uint8_t blockid; /*0 */
+ uint8_t nandeccmode; /*1 */
+ uint16_t nandpagesize; /*2-3 */
+ uint32_t blocksize; /*4-7 */
+ uint32_t rsvd1; /*8-11 */
+ uint32_t srcaddr; /*12-15 */
+ uint32_t destaddr; /*16-19 */
+ uint32_t execaddr; /*20-23 */
+ uint8_t satapiomode; /*24*/
+ uint8_t rsvd3; /*25*/
+ uint16_t ddrinitdelay; /*26-27 */
+ uint16_t rsvd2; /*28-29 */
+ uint8_t ext; /*30*/
+ uint8_t checksum; /*31*/
+};
+
+struct ext_hdr_v0_reg {
+ uint32_t raddr;
+ uint32_t rdata;
+};
+
+#define EXT_HDR_V0_REG_COUNT ((0x1dc - 0x20) / sizeof(struct ext_hdr_v0_reg))
+
+struct ext_hdr_v0 {
+ uint32_t offset;
+ uint8_t reserved[0x20 - sizeof(uint32_t)];
+ struct ext_hdr_v0_reg rcfg[EXT_HDR_V0_REG_COUNT];
+ uint8_t reserved2[7];
+ uint8_t checksum;
+};
+
+/* Structure of the main header, version 1 (Armada 370, Armada XP) */
+struct main_hdr_v1 {
+ uint8_t blockid; /* 0 */
+ uint8_t reserved1; /* 1 */
+ uint16_t reserved2; /* 2-3 */
+ uint32_t blocksize; /* 4-7 */
+ uint8_t version; /* 8 */
+ uint8_t headersz_msb; /* 9 */
+ uint16_t headersz_lsb; /* A-B */
+ uint32_t srcaddr; /* C-F */
+ uint32_t destaddr; /* 10-13 */
+ uint32_t execaddr; /* 14-17 */
+ uint8_t reserved3; /* 18 */
+ uint8_t nandblocksize; /* 19 */
+ uint8_t nandbadblklocation;/* 1A */
+ uint8_t reserved4; /* 1B */
+ uint16_t reserved5; /* 1C-1D */
+ uint8_t ext; /* 1E */
+ uint8_t checksum; /* 1F */
};
/*
- * Supported Boot options for configuration file
+ * Header for the optional headers, version 1 (Armada 370, Armada XP)
*/
-static table_entry_t kwbimage_bootops[] = {
- {IBR_HDR_SPI_ID,spi, SPI Flash,},
- {IBR_HDR_NAND_ID, nand, NAND Flash, },
- {IBR_HDR_SATA_ID, sata, Sata port,},
- {IBR_HDR_PEX_ID,pex, PCIe port,},
- {IBR_HDR_UART_ID, uart, Serial port, },
- {-1,, Invalid, },
+struct opt_hdr_v1 {
+ uint8_t
[U-Boot] [PATCH v3 19/25] arm: armada-xp: Add basic support for the Marvell DB-MV784MP-GP board
This patch adds basic support for the Marvell DB-MV784MP-GP evaulation board. This is the first board that uses the recently created Armada XP 78460 SoC support. Signed-off-by: Stefan Roese s...@denx.de Tested-by: Luka Perkov l...@openwrt.org --- Changes in v3: - Added Tested-by from Luka - Rebased on current top-of-tree (git ID a1263632) Changes in v2: - Renamed target from db-78460-bp to db-mv784mp-gp as this matches the real eval board name arch/arm/Kconfig| 4 + board/Marvell/db-mv784mp-gp/Kconfig | 23 ++ board/Marvell/db-mv784mp-gp/MAINTAINERS | 6 ++ board/Marvell/db-mv784mp-gp/Makefile| 7 ++ board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c | 120 board/Marvell/db-mv784mp-gp/kwbimage.cfg| 12 +++ configs/db-mv784mp-gp_defconfig | 2 + include/configs/db-mv784mp-gp.h | 68 8 files changed, 242 insertions(+) create mode 100644 board/Marvell/db-mv784mp-gp/Kconfig create mode 100644 board/Marvell/db-mv784mp-gp/MAINTAINERS create mode 100644 board/Marvell/db-mv784mp-gp/Makefile create mode 100644 board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c create mode 100644 board/Marvell/db-mv784mp-gp/kwbimage.cfg create mode 100644 configs/db-mv784mp-gp_defconfig create mode 100644 include/configs/db-mv784mp-gp.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 22f0f09..c896ff8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -139,6 +139,9 @@ config ARCH_DAVINCI config KIRKWOOD bool Marvell Kirkwood +config TARGET_DB_MV784MP_GP + bool Support db-mv784mp-gp + config TARGET_DEVKIT3250 bool Support devkit3250 @@ -546,6 +549,7 @@ source board/BuS/eb_cpux9k2/Kconfig source board/BuS/vl_ma2sc/Kconfig source board/CarMediaLab/flea3/Kconfig source board/Marvell/aspenite/Kconfig +source board/Marvell/db-mv784mp-gp/Kconfig source board/Marvell/dkb/Kconfig source board/Marvell/gplugd/Kconfig source board/afeb9260/Kconfig diff --git a/board/Marvell/db-mv784mp-gp/Kconfig b/board/Marvell/db-mv784mp-gp/Kconfig new file mode 100644 index 000..f94a444 --- /dev/null +++ b/board/Marvell/db-mv784mp-gp/Kconfig @@ -0,0 +1,23 @@ +if TARGET_DB_MV784MP_GP + +config SYS_CPU + string + default armv7 + +config SYS_BOARD + string + default db-mv784mp-gp + +config SYS_VENDOR + string + default Marvell + +config SYS_SOC + string + default armada-xp + +config SYS_CONFIG_NAME + string + default db-mv784mp-gp + +endif diff --git a/board/Marvell/db-mv784mp-gp/MAINTAINERS b/board/Marvell/db-mv784mp-gp/MAINTAINERS new file mode 100644 index 000..a095f89 --- /dev/null +++ b/board/Marvell/db-mv784mp-gp/MAINTAINERS @@ -0,0 +1,6 @@ +DB_MV784MP_GP BOARD +M: Stefan Roese s...@denx.de +S: Maintained +F: board/Marvell/db-mv784mp-gp/ +F: include/configs/db-mv784mp-gp.h +F: configs/db-mv784mp-gp_defconfig diff --git a/board/Marvell/db-mv784mp-gp/Makefile b/board/Marvell/db-mv784mp-gp/Makefile new file mode 100644 index 000..8f5a7fb --- /dev/null +++ b/board/Marvell/db-mv784mp-gp/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2014 Stefan Roese s...@denx.de +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := db-mv784mp-gp.o diff --git a/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c b/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c new file mode 100644 index 000..b3dae89 --- /dev/null +++ b/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c @@ -0,0 +1,120 @@ +/* + * Copyright (C) 2014 Stefan Roese s...@denx.de + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#include common.h +#include miiphy.h +#include asm/io.h +#include asm/arch/cpu.h +#include asm/arch/soc.h + +DECLARE_GLOBAL_DATA_PTR; + +#define BIT(nr)(1UL (nr)) + +#define ETH_PHY_CTRL_REG 0 +#define ETH_PHY_CTRL_POWER_DOWN_BIT11 +#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 ETH_PHY_CTRL_POWER_DOWN_BIT) + +/* + * Those values and defines are taken from the Marvell U-Boot version + * u-boot-2011.12-2014_T1.0 for the board rd78460gp aka + * RD-AXP-GP rev 1.0. + * + * GPPs + * MPP#NAMEIN/OUT + * -- + * 21 SW_Reset_ OUT + * 25 Phy_Int#IN + * 28 SDI_WP IN + * 29 SDI_Status IN + * 54-61 On GPP Connector? + * 62 Switch InterruptIN + * 63-65 Reserved from SW Board ? + * 66 SW_BRD connectedIN + */ +#define RD_78460_GP_GPP_OUT_ENA_LOW(~(BIT(21) | BIT(20))) +#define RD_78460_GP_GPP_OUT_ENA_MID(~(BIT(26) | BIT(27))) +#define RD_78460_GP_GPP_OUT_ENA_HIGH (~(0x0)) + +#define RD_78460_GP_GPP_OUT_VAL_LOW(BIT(21) | BIT(20)) +#define RD_78460_GP_GPP_OUT_VAL_MID(BIT(26) | BIT(27)) +#define RD_78460_GP_GPP_OUT_VAL_HIGH 0x0 + +int
[U-Boot] [PATCH v3 18/25] arm: armada-xp: Add basic support for Marvell Armada XP SoC
This basic support for the Marvell Armada XP is base on the existing kirkwood
support. Which has been generatized by moving some common files into
common marvell locations.
This is in preparation for the upcoming Armada XP MV78460 support.
Signed-off-by: Stefan Roese s...@denx.de
Tested-by: Luka Perkov l...@openwrt.org
---
Changes in v3:
- Added Tested-by from Luka
Changes in v2: None
Makefile | 2 +-
arch/arm/cpu/armv7/armada-xp/Makefile| 7 +
arch/arm/cpu/armv7/armada-xp/cpu.c | 186 +++
arch/arm/include/asm/arch-armada-xp/config.h | 80
arch/arm/include/asm/arch-armada-xp/cpu.h| 107 +++
arch/arm/include/asm/arch-armada-xp/soc.h| 57
6 files changed, 438 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/cpu/armv7/armada-xp/Makefile
create mode 100644 arch/arm/cpu/armv7/armada-xp/cpu.c
create mode 100644 arch/arm/include/asm/arch-armada-xp/config.h
create mode 100644 arch/arm/include/asm/arch-armada-xp/cpu.h
create mode 100644 arch/arm/include/asm/arch-armada-xp/soc.h
diff --git a/Makefile b/Makefile
index b835921..c793440 100644
--- a/Makefile
+++ b/Makefile
@@ -655,7 +655,7 @@ ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs
vf610))
libs-y += arch/$(ARCH)/imx-common/
endif
-ifneq (,$(filter $(SOC), kirkwood))
+ifneq (,$(filter $(SOC), armada-xp kirkwood))
libs-y += arch/$(ARCH)/mvebu-common/
endif
diff --git a/arch/arm/cpu/armv7/armada-xp/Makefile
b/arch/arm/cpu/armv7/armada-xp/Makefile
new file mode 100644
index 000..885dcee
--- /dev/null
+++ b/arch/arm/cpu/armv7/armada-xp/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2014 Stefan Roese s...@denx.de
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y = cpu.o
diff --git a/arch/arm/cpu/armv7/armada-xp/cpu.c
b/arch/arm/cpu/armv7/armada-xp/cpu.c
new file mode 100644
index 000..3ad43d2
--- /dev/null
+++ b/arch/arm/cpu/armv7/armada-xp/cpu.c
@@ -0,0 +1,186 @@
+/*
+ * Copyright (C) 2014 Stefan Roese s...@denx.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include netdev.h
+#include asm/io.h
+#include asm/arch/cpu.h
+#include asm/arch/soc.h
+
+#define DDR_BASE_CS_OFF(n) (0x + ((n) 3))
+#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) 3))
+
+static struct mbus_win windows[] = {
+ /* PCIE MEM address space */
+ { DEFADR_PCI_MEM, 256 20, CPU_TARGET_PCIE13, CPU_ATTR_PCIE_MEM },
+
+ /* PCIE IO address space */
+ { DEFADR_PCI_IO, 64 10, CPU_TARGET_PCIE13, CPU_ATTR_PCIE_IO },
+
+ /* SPI */
+ { DEFADR_SPIF, 8 20, CPU_TARGET_DEVICEBUS_BOOTROM_SPI,
+ CPU_ATTR_SPIFLASH },
+
+ /* NOR */
+ { DEFADR_BOOTROM, 8 20, CPU_TARGET_DEVICEBUS_BOOTROM_SPI,
+ CPU_ATTR_BOOTROM },
+};
+
+void reset_cpu(unsigned long ignored)
+{
+ struct mvebu_system_registers *reg =
+ (struct mvebu_system_registers *)MVEBU_SYSTEM_REG_BASE;
+
+ writel(readl(reg-rstoutn_mask) | 1, reg-rstoutn_mask);
+ writel(readl(reg-sys_soft_rst) | 1, reg-sys_soft_rst);
+ while (1)
+ ;
+}
+
+#if defined(CONFIG_DISPLAY_CPUINFO)
+int print_cpuinfo(void)
+{
+ u16 devid = (readl(MVEBU_REG_PCIE_DEVID) 16) 0x;
+ u8 revid = readl(MVEBU_REG_PCIE_REVID) 0xff;
+
+ puts(SoC: );
+
+ switch (devid) {
+ case SOC_MV78460_ID:
+ puts(MV78460-);
+ break;
+ default:
+ puts(Unknown-);
+ break;
+ }
+
+ switch (revid) {
+ case 1:
+ puts(A0\n);
+ break;
+ case 2:
+ puts(B0\n);
+ break;
+ default:
+ puts(??\n);
+ break;
+ }
+
+ return 0;
+}
+#endif /* CONFIG_DISPLAY_CPUINFO */
+
+/*
+ * This function initialize Controller DRAM Fastpath windows.
+ * It takes the CS size information from the 0x1500 scratch registers
+ * and sets the correct windows sizes and base addresses accordingly.
+ *
+ * These values are set in the scratch registers by the Marvell
+ * DDR3 training code, which is executed by the BootROM before the
+ * main payload (U-Boot) is executed. This training code is currently
+ * only available in the Marvell U-Boot version. It needs to be
+ * ported to mainline U-Boot SPL at some point.
+ */
+static void update_sdram_window_sizes(void)
+{
+ u64 base = 0;
+ u32 size, temp;
+ int i;
+
+ for (i = 0; i SDRAM_MAX_CS; i++) {
+ size = readl((MVEBU_SDRAM_SCRATCH + (i * 8))) SDRAM_ADDR_MASK;
+ if (size != 0) {
+ size |= ~(SDRAM_ADDR_MASK);
+
+ /* Set Base Address */
+ temp = (base 0xFF00ll) | ((base 32) 0xF);
+ writel(temp, MVEBU_SDRAM_BASE + DDR_BASE_CS_OFF(i));
+
+ /*
+* Check if out of max
[U-Boot] [PATCH v3 16/25] net: phy.h: Make PHY autonegotiation timeout configurable
The Marvell MV78460 eval board DB-78460-BP seems to need a longer
PHY autonegotiation timeout than the standard 4 seconds. So lets
make this timeout configurable. If not defined in the board config
header the original 4000ms is used.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Joe Hershberger joe.hershber...@gmail.com
---
Changes in v3: None
Changes in v2: None
include/phy.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/phy.h b/include/phy.h
index 2fcc328..b495077 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -32,7 +32,9 @@
#define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
SUPPORTED_1baseT_Full)
+#ifndef PHY_ANEG_TIMEOUT
#define PHY_ANEG_TIMEOUT 4000
+#endif
typedef enum {
--
2.1.0
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[U-Boot] [PATCH v3 03/25] spi: kirkwood_spi.c: Some fixes and cleanup
This patch introduces the clrsetbits_le32() accessor functions in the
kirkwood SPI driver. Note that it also includes a fix:
-writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, spireg-ctrl);
+writel(KWSPI_SMEMRDY, spireg-ctrl);
Here the bit KWSPI_CSN_ACT (0x1) should have been cleared. Instead
0xfffe is written into this control register. This is the main
reason to use the clrsetbits() functions now. As they make clearing
bits much less error prone.
Additionally KWSPI_IRQUNMASK is not used in spi_cs_activate() and
spi_cs_deactivate() any more. Its the wrong macro but has the same
value as the correct one (KWSPI_CSN_ACT).
This is in preparation for use of this driver on the Marvell Armada XP
platform as well.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Jagannadha Sutradharudu Teki jaga...@xilinx.com
Acked-by: Prafulla Wadaskar prafu...@marvell.com
Tested-by: Luka Perkov l...@openwrt.org
---
Changes in v3:
- Added Acked-by from Prafulla to all Kirkwood patches
- Added Tested-by from Luka
Changes in v2: None
drivers/spi/kirkwood_spi.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index 942a208..449e9f8 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -37,7 +37,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned
int cs,
if (!slave)
return NULL;
- writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, spireg-ctrl);
+ writel(KWSPI_SMEMRDY, spireg-ctrl);
/* calculate spi clock prescaller using max_hz */
data = ((CONFIG_SYS_TCLK / 2) / max_hz) + 0x10;
@@ -137,12 +137,12 @@ void spi_init(void)
void spi_cs_activate(struct spi_slave *slave)
{
- writel(readl(spireg-ctrl) | KWSPI_IRQUNMASK, spireg-ctrl);
+ setbits_le32(spireg-ctrl, KWSPI_CSN_ACT);
}
void spi_cs_deactivate(struct spi_slave *slave)
{
- writel(readl(spireg-ctrl) KWSPI_IRQMASK, spireg-ctrl);
+ clrbits_le32(spireg-ctrl, KWSPI_CSN_ACT);
}
int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
@@ -161,8 +161,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *dout,
* handle data in 8-bit chunks
* TBD: 2byte xfer mode to be enabled
*/
- writel(((readl(spireg-cfg) ~KWSPI_XFERLEN_MASK) |
- KWSPI_XFERLEN_1BYTE), spireg-cfg);
+ clrsetbits_le32(spireg-cfg, KWSPI_XFERLEN_MASK, KWSPI_XFERLEN_1BYTE);
while (bitlen 4) {
debug(loopstart bitlen %d\n, bitlen);
@@ -172,7 +171,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *dout,
if (dout)
tmpdout = *(u32 *) dout 0x0ff;
- writel(~KWSPI_SMEMRDIRQ, spireg-irq_cause);
+ clrbits_le32(spireg-irq_cause, KWSPI_SMEMRDIRQ);
writel(tmpdout, spireg-dout); /* Write the data out */
debug(*** spi_xfer: ... %08x written, bitlen %d\n,
tmpdout, bitlen);
--
2.1.0
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[U-Boot] [PATCH v3 20/25] arm: armada-xp: Add basic support for the maxBCM board
The maxBCM board is equipped with the Marvell Armada-XP MV78460 SoC. It
integrates an SPI NOR flash and an Marvell 88E6185 switch.
Signed-off-by: Stefan Roese s...@denx.de
---
Changes in v3:
- Rebased on current top-of-tree (git ID a1263632)
Changes in v2: None
arch/arm/Kconfig | 4 +++
board/maxbcm/Kconfig | 19
board/maxbcm/MAINTAINERS | 6
board/maxbcm/Makefile | 7 +
board/maxbcm/kwbimage.cfg | 12
board/maxbcm/maxbcm.c | 77 +++
configs/maxbcm_defconfig | 2 ++
include/configs/maxbcm.h | 68 +
8 files changed, 195 insertions(+)
create mode 100644 board/maxbcm/Kconfig
create mode 100644 board/maxbcm/MAINTAINERS
create mode 100644 board/maxbcm/Makefile
create mode 100644 board/maxbcm/kwbimage.cfg
create mode 100644 board/maxbcm/maxbcm.c
create mode 100644 configs/maxbcm_defconfig
create mode 100644 include/configs/maxbcm.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c896ff8..263886f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -142,6 +142,9 @@ config KIRKWOOD
config TARGET_DB_MV784MP_GP
bool Support db-mv784mp-gp
+config TARGET_MAXBCM
+ bool Support maxbcm
+
config TARGET_DEVKIT3250
bool Support devkit3250
@@ -627,6 +630,7 @@ source board/jornada/Kconfig
source board/karo/tx25/Kconfig
source board/logicpd/imx27lite/Kconfig
source board/logicpd/imx31_litekit/Kconfig
+source board/maxbcm/Kconfig
source board/mpl/vcma9/Kconfig
source board/olimex/mx23_olinuxino/Kconfig
source board/palmld/Kconfig
diff --git a/board/maxbcm/Kconfig b/board/maxbcm/Kconfig
new file mode 100644
index 000..d34e2ab
--- /dev/null
+++ b/board/maxbcm/Kconfig
@@ -0,0 +1,19 @@
+if TARGET_MAXBCM
+
+config SYS_CPU
+ string
+ default armv7
+
+config SYS_BOARD
+ string
+ default maxbcm
+
+config SYS_SOC
+ string
+ default armada-xp
+
+config SYS_CONFIG_NAME
+ string
+ default maxbcm
+
+endif
diff --git a/board/maxbcm/MAINTAINERS b/board/maxbcm/MAINTAINERS
new file mode 100644
index 000..3c8af21
--- /dev/null
+++ b/board/maxbcm/MAINTAINERS
@@ -0,0 +1,6 @@
+MAXBCM BOARD
+M: Stefan Roese s...@denx.de
+S: Maintained
+F: board/maxbcm/
+F: include/configs/maxbcm.h
+F: configs/maxbcm_defconfig
diff --git a/board/maxbcm/Makefile b/board/maxbcm/Makefile
new file mode 100644
index 000..37c17d6
--- /dev/null
+++ b/board/maxbcm/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2014 Stefan Roese s...@denx.de
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := maxbcm.o
diff --git a/board/maxbcm/kwbimage.cfg b/board/maxbcm/kwbimage.cfg
new file mode 100644
index 000..5a3bc67
--- /dev/null
+++ b/board/maxbcm/kwbimage.cfg
@@ -0,0 +1,12 @@
+#
+# Copyright (C) 2014 Stefan Roese s...@denx.de
+#
+
+# Armada XP uses version 1 image format
+VERSION1
+
+# Boot Media configurations
+BOOT_FROM spi
+
+# Binary Header (bin_hdr) with DDR3 training code
+BINARY board/maxbcm/binary.0 005b 0068
diff --git a/board/maxbcm/maxbcm.c b/board/maxbcm/maxbcm.c
new file mode 100644
index 000..7fc83ee
--- /dev/null
+++ b/board/maxbcm/maxbcm.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2014 Stefan Roese s...@denx.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include miiphy.h
+#include asm/io.h
+#include asm/arch/cpu.h
+#include asm/arch/soc.h
+#include linux/mbus.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Base addresses for the external device chip selects */
+#define DEV_CS0_BASE 0xe000
+#define DEV_CS1_BASE 0xe100
+#define DEV_CS2_BASE 0xe200
+#define DEV_CS3_BASE 0xe300
+
+/* Needed for dynamic (board-specific) mbus configuration */
+extern struct mvebu_mbus_state mbus_state;
+
+int board_early_init_f(void)
+{
+ /*
+* Don't configure MPP (pin multiplexing) and GPIO here,
+* its already done in bin_hdr
+*/
+
+ /*
+* Setup some board specific mbus address windows
+*/
+ mbus_dt_setup_win(mbus_state, DEV_CS0_BASE, 16 20,
+ CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS0);
+ mbus_dt_setup_win(mbus_state, DEV_CS1_BASE, 16 20,
+ CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS1);
+ mbus_dt_setup_win(mbus_state, DEV_CS2_BASE, 16 20,
+ CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS2);
+ mbus_dt_setup_win(mbus_state, DEV_CS3_BASE, 16 20,
+ CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS3);
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* adress of boot parameters */
+ gd-bd-bi_boot_params = mvebu_sdram_bar(0) + 0x100;
+
+ return 0;
+}
+
+int checkboard(void)
+{
+ puts(Board: maxBCM\n);
+
+ return 0;
+}
+
+#ifdef CONFIG_RESET_PHY_R
+/* Configure and enable MV88E6185
[U-Boot] [PATCH v3 17/25] i2c: mvtwsi: Add support for Marvell Armada XP
To support the Armada XP SoC, we just need to include the correct header. Signed-off-by: Stefan Roese s...@denx.de Acked-by: Heiko Schocher h...@denx.de Tested-by: Luka Perkov l...@openwrt.org --- Changes in v3: - Added Tested-by from Luka - Added Acked-by from Heiko Changes in v2: None drivers/i2c/mvtwsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c index a2deae6..9b2ca1e 100644 --- a/drivers/i2c/mvtwsi.c +++ b/drivers/i2c/mvtwsi.c @@ -20,7 +20,7 @@ #if defined(CONFIG_ORION5X) #include asm/arch/orion5x.h -#elif defined(CONFIG_KIRKWOOD) +#elif (defined(CONFIG_KIRKWOOD) || defined(CONFIG_ARMADA_XP)) #include asm/arch/soc.h #elif defined(CONFIG_SUNXI) #include asm/arch/i2c.h -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 15/25] net: mvneta.c: Add support for the ethernet controller of the Marvell Armada XP SoC
This patch adds support for the NETA ethernet controller which is integrated in the Marvell Armada XP SoC's. This port is based on the Linux driver which has been stripped of the in U-Boot unused portions. Tested on the Marvell MV78460 eval board db-78460-bp. Signed-off-by: Stefan Roese s...@denx.de Cc: Joe Hershberger joe.hershber...@gmail.com Tested-by: Luka Perkov l...@openwrt.org --- Changes in v3: - Added Tested-by from Luka Changes in v2: None drivers/net/Makefile |1 + drivers/net/mvneta.c | 1653 ++ include/netdev.h |1 + 3 files changed, 1655 insertions(+) create mode 100644 drivers/net/mvneta.c diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 2c4dd7c..fb0cf8c 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -41,6 +41,7 @@ obj-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o obj-$(CONFIG_MPC5xxx_FEC) += mpc5xxx_fec.o obj-$(CONFIG_MPC512x_FEC) += mpc512x_fec.o obj-$(CONFIG_MVGBE) += mvgbe.o +obj-$(CONFIG_MVNETA) += mvneta.o obj-$(CONFIG_NATSEMI) += natsemi.o obj-$(CONFIG_DRIVER_NE2000) += ne2000.o ne2000_base.o obj-$(CONFIG_DRIVER_AX88796L) += ax88796.o ne2000_base.o diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c new file mode 100644 index 000..a2a69b4 --- /dev/null +++ b/drivers/net/mvneta.c @@ -0,0 +1,1653 @@ +/* + * Driver for Marvell NETA network card for Armada XP and Armada 370 SoCs. + * + * U-Boot version: + * Copyright (C) 2014 Stefan Roese s...@denx.de + * + * Based on the Linux version which is: + * Copyright (C) 2012 Marvell + * + * Rami Rosen ros...@marvell.com + * Thomas Petazzoni thomas.petazz...@free-electrons.com + * + * SPDX-License-Identifier:GPL-2.0 + */ + +#include common.h +#include net.h +#include netdev.h +#include config.h +#include malloc.h +#include asm/io.h +#include asm/errno.h +#include phy.h +#include miiphy.h +#include watchdog.h +#include asm/arch/cpu.h +#include asm/arch/soc.h +#include linux/compat.h +#include linux/mbus.h + +#if !defined(CONFIG_PHYLIB) +# error Marvell mvneta requires PHYLIB +#endif + +/* Some linux - U-Boot compatibility stuff */ +#define netdev_err(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_warn(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_info(dev, fmt, args...) \ + printf(fmt, ##args) + +#define CONFIG_NR_CPUS 1 +#define BIT(nr)(1UL (nr)) +#define ETH_HLEN 14 /* Total octets in header */ + +/* 2(HW hdr) 14(MAC hdr) 4(CRC) 32(extra for cache prefetch) */ +#define WRAP (2 + ETH_HLEN + 4 + 32) +#define MTU1500 +#define RX_BUFFER_SIZE (ALIGN(MTU + WRAP, ARCH_DMA_MINALIGN)) + +#define MVNETA_SMI_TIMEOUT 1 + +/* Registers */ +#define MVNETA_RXQ_CONFIG_REG(q)(0x1400 + ((q) 2)) +#define MVNETA_RXQ_HW_BUF_ALLOCBIT(1) +#define MVNETA_RXQ_PKT_OFFSET_ALL_MASK (0xf 8) +#define MVNETA_RXQ_PKT_OFFSET_MASK(offs) ((offs) 8) +#define MVNETA_RXQ_THRESHOLD_REG(q) (0x14c0 + ((q) 2)) +#define MVNETA_RXQ_NON_OCCUPIED(v) ((v) 16) +#define MVNETA_RXQ_BASE_ADDR_REG(q) (0x1480 + ((q) 2)) +#define MVNETA_RXQ_SIZE_REG(q) (0x14a0 + ((q) 2)) +#define MVNETA_RXQ_BUF_SIZE_SHIFT 19 +#define MVNETA_RXQ_BUF_SIZE_MASK (0x1fff 19) +#define MVNETA_RXQ_STATUS_REG(q)(0x14e0 + ((q) 2)) +#define MVNETA_RXQ_OCCUPIED_ALL_MASK 0x3fff +#define MVNETA_RXQ_STATUS_UPDATE_REG(q) (0x1500 + ((q) 2)) +#define MVNETA_RXQ_ADD_NON_OCCUPIED_SHIFT 16 +#define MVNETA_RXQ_ADD_NON_OCCUPIED_MAX255 +#define MVNETA_PORT_RX_RESET0x1cc0 +#define MVNETA_PORT_RX_DMA_RESET BIT(0) +#define MVNETA_PHY_ADDR 0x2000 +#define MVNETA_PHY_ADDR_MASK 0x1f +#define MVNETA_SMI 0x2004 +#define MVNETA_PHY_REG_MASK0x1f +/* SMI register fields */ +#define MVNETA_SMI_DATA_OFFS 0 /* Data */ +#define MVNETA_SMI_DATA_MASK (0x MVNETA_SMI_DATA_OFFS) +#define MVNETA_SMI_DEV_ADDR_OFFS 16 /* PHY device address */ +#define MVNETA_SMI_REG_ADDR_OFFS 21 /* PHY device reg addr*/ +#define MVNETA_SMI_OPCODE_OFFS 26 /* Write/Read opcode */ +#define MVNETA_SMI_OPCODE_READ (1 MVNETA_SMI_OPCODE_OFFS) +#define MVNETA_SMI_READ_VALID (1 27) /* Read Valid */ +#define MVNETA_SMI_BUSY(1 28) /* Busy */ +#define MVNETA_MBUS_RETRY 0x2010 +#define MVNETA_UNIT_INTR_CAUSE 0x2080 +#define MVNETA_UNIT_CONTROL 0x20B0 +#define MVNETA_PHY_POLLING_ENABLE BIT(1) +#define MVNETA_WIN_BASE(w)
[U-Boot] [PATCH v3 23/25] tools: Compile kwboot for Marvell Armada XP as those SoCs are now supported
Signed-off-by: Stefan Roese s...@denx.de Tested-by: Luka Perkov l...@openwrt.org --- Changes in v3: None Changes in v2: None tools/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/Makefile b/tools/Makefile index 90e966d..7495f17 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -139,6 +139,7 @@ ubsha1-objs := os_support.o ubsha1.o lib/sha1.o HOSTCFLAGS_ubsha1.o := -pedantic hostprogs-$(CONFIG_KIRKWOOD) += kwboot +hostprogs-$(CONFIG_ARMADA_XP) += kwboot hostprogs-y += proftool hostprogs-$(CONFIG_STATIC_RELA) += relocate-rela -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 01/25] sf: Add M25PX64 SPI NOR flash ID
Add ID for this Numonix / STMicro chip.
Tested on Marvell DB-78460-BP board.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Jagannadha Sutradharudu Teki jaga...@xilinx.com
Tested-by: Luka Perkov l...@openwrt.org
---
Changes in v3:
- Added Tested-by from Luka
Changes in v2: None
drivers/mtd/spi/sf_params.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index ac886fd..b8186e9 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -71,6 +71,7 @@ const struct spi_flash_params spi_flash_params_table[] = {
{M25P32, 0x202016, 0x0, 64 * 1024,64, 0,
0},
{M25P64, 0x202017, 0x0, 64 * 1024, 128, 0,
0},
{M25P128,0x202018, 0x0, 256 * 1024,64, 0,
0},
+ {M25PX64,0x207117, 0x0, 64 * 1024, 128, 0,
SECT_4K},
{N25Q32, 0x20ba16, 0x0, 64 * 1024,64, RD_FULL,
WR_QPP | SECT_4K},
{N25Q32A,0x20bb16, 0x0, 64 * 1024,64, RD_FULL,
WR_QPP | SECT_4K},
{N25Q64, 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL,
WR_QPP | SECT_4K},
--
2.1.0
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[U-Boot] [PATCH v3 02/25] arm: kirkwood: spi.h: Add some missing parenthesis
Signed-off-by: Stefan Roese s...@denx.de
Cc: Jagannadha Sutradharudu Teki jaga...@xilinx.com
Tested-by: Luka Perkov l...@openwrt.org
---
Changes in v3:
- Added Tested-by from Luka
Changes in v2: None
arch/arm/include/asm/arch-kirkwood/spi.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-kirkwood/spi.h
b/arch/arm/include/asm/arch-kirkwood/spi.h
index b1cf614..e512dce 100644
--- a/arch/arm/include/asm/arch-kirkwood/spi.h
+++ b/arch/arm/include/asm/arch-kirkwood/spi.h
@@ -43,10 +43,10 @@ struct kwspi_registers {
#define KWSPI_XFERLEN_2BYTE(1 5)
#define KWSPI_XFERLEN_MASK (1 5)
#define KWSPI_ADRLEN_1BYTE 0
-#define KWSPI_ADRLEN_2BYTE 1 8
-#define KWSPI_ADRLEN_3BYTE 2 8
-#define KWSPI_ADRLEN_4BYTE 3 8
-#define KWSPI_ADRLEN_MASK 3 8
+#define KWSPI_ADRLEN_2BYTE (1 8)
+#define KWSPI_ADRLEN_3BYTE (2 8)
+#define KWSPI_ADRLEN_4BYTE (3 8)
+#define KWSPI_ADRLEN_MASK (3 8)
#define KWSPI_TIMEOUT 1
#endif /* __KW_SPI_H__ */
--
2.1.0
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[U-Boot] [PATCH v3 05/25] spi: kirkwood_spi.c: cosmetic: Fix minor coding style issues
Signed-off-by: Stefan Roese s...@denx.de
Cc: Jagannadha Sutradharudu Teki jaga...@xilinx.com
Acked-by: Prafulla Wadaskar prafu...@marvell.com
Tested-by: Luka Perkov l...@openwrt.org
---
Changes in v3:
- Added Acked-by from Prafulla to all Kirkwood patches
- Added Tested-by from Luka
Changes in v2: None
drivers/spi/kirkwood_spi.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index 7d1c1f9..3d58bcc 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -46,7 +46,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned
int cs,
/* program spi clock prescaller using max_hz */
writel(KWSPI_ADRLEN_3BYTE | data, spireg-cfg);
- debug(data = 0x%08x \n, data);
+ debug(data = 0x%08x\n, data);
writel(KWSPI_SMEMRDIRQ, spireg-irq_cause);
writel(KWSPI_IRQMASK, spireg-irq_mask);
@@ -100,7 +100,6 @@ int spi_claim_bus(struct spi_slave *slave)
/* set new spi mpp and save current mpp config */
kirkwood_mpp_conf(spi_mpp_config, spi_mpp_backup);
-
#endif
return board_spi_claim_bus(slave);
@@ -127,7 +126,7 @@ void spi_release_bus(struct spi_slave *slave)
*/
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
- return (bus == 0 (cs == 0 || cs == 1));
+ return bus == 0 (cs == 0 || cs == 1);
}
#endif
@@ -169,7 +168,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *dout,
/* Shift data so it's msb-justified */
if (dout)
- tmpdout = *(u32 *) dout 0x0ff;
+ tmpdout = *(u32 *)dout 0xff;
clrbits_le32(spireg-irq_cause, KWSPI_SMEMRDIRQ);
writel(tmpdout, spireg-dout); /* Write the data out */
@@ -185,12 +184,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int
bitlen, const void *dout,
if (readl(spireg-irq_cause) KWSPI_SMEMRDIRQ) {
isread = 1;
tmpdin = readl(spireg-din);
- debug
- (spi_xfer: din %p..%08x read\n,
- din, tmpdin);
+ debug(spi_xfer: din %p..%08x read\n,
+ din, tmpdin);
if (din) {
- *((u8 *) din) = (u8) tmpdin;
+ *((u8 *)din) = (u8)tmpdin;
din += 1;
}
if (dout)
--
2.1.0
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[U-Boot] [PATCH v3 22/25] tools/kwboot: Sync with latest barebox version to support Armada XP
The barebox version of the kwboot tool has evolved a bit. To support
Armada XP and Dove. Additionally a few minor fixes have been applied.
So lets sync with the latest barebox version.
Please note that the main difference between both versions now is, that
the U-Boot version still supports the -p option, to dynamically patch
an image for UART boot mode. I didn't test it now though.
Signed-off-by: Stefan Roese s...@denx.de
Tested-by: Luka Perkov l...@openwrt.org
---
Changes in v3: None
Changes in v2:
- Added optional '-a' parameter to use the timings for Armada XP, as they
are incompatibel with the currently used ones for Kirkwood (etc).
tools/kwboot.c | 111 +
1 file changed, 97 insertions(+), 14 deletions(-)
diff --git a/tools/kwboot.c b/tools/kwboot.c
index e773f01..1368b4c 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -1,5 +1,6 @@
/*
- * Boot a Marvell Kirkwood SoC, with Xmodem over UART0.
+ * Boot a Marvell SoC, with Xmodem over UART0.
+ * supports Kirkwood, Dove, Armada 370, Armada XP
*
* (c) 2012 Daniel Stodden daniel.stod...@gmail.com
*
@@ -37,9 +38,18 @@ static unsigned char kwboot_msg_boot[] = {
0xBB, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77
};
+static unsigned char kwboot_msg_debug[] = {
+ 0xDD, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77
+};
+
+/* Defines known to work on Kirkwood */
#define KWBOOT_MSG_REQ_DELAY 10 /* ms */
#define KWBOOT_MSG_RSP_TIMEO 50 /* ms */
+/* Defines known to work on Armada XP */
+#define KWBOOT_MSG_REQ_DELAY_AXP 1000 /* ms */
+#define KWBOOT_MSG_RSP_TIMEO_AXP 1000 /* ms */
+
/*
* Xmodem Transfers
*/
@@ -62,6 +72,9 @@ struct kwboot_block {
static int kwboot_verbose;
+static int msg_req_delay = KWBOOT_MSG_REQ_DELAY;
+static int msg_rsp_timeo = KWBOOT_MSG_RSP_TIMEO;
+
static void
kwboot_printv(const char *fmt, ...)
{
@@ -184,6 +197,9 @@ kwboot_tty_send(int fd, const void *buf, size_t len)
int rc;
ssize_t n;
+ if (!buf)
+ return 0;
+
rc = -1;
do {
@@ -268,7 +284,10 @@ kwboot_bootmsg(int tty, void *msg)
int rc;
char c;
- kwboot_printv(Sending boot message. Please reboot the target...);
+ if (msg == NULL)
+ kwboot_printv(Please reboot the target into UART boot
mode...);
+ else
+ kwboot_printv(Sending boot message. Please reboot the
target...);
do {
rc = tcflush(tty, TCIOFLUSH);
@@ -277,11 +296,11 @@ kwboot_bootmsg(int tty, void *msg)
rc = kwboot_tty_send(tty, msg, 8);
if (rc) {
- usleep(KWBOOT_MSG_REQ_DELAY * 1000);
+ usleep(msg_req_delay * 1000);
continue;
}
- rc = kwboot_tty_recv(tty, c, 1, KWBOOT_MSG_RSP_TIMEO);
+ rc = kwboot_tty_recv(tty, c, 1, msg_rsp_timeo);
kwboot_spinner();
@@ -293,6 +312,37 @@ kwboot_bootmsg(int tty, void *msg)
}
static int
+kwboot_debugmsg(int tty, void *msg)
+{
+ int rc;
+
+ kwboot_printv(Sending debug message. Please reboot the target...);
+
+ do {
+ char buf[16];
+
+ rc = tcflush(tty, TCIOFLUSH);
+ if (rc)
+ break;
+
+ rc = kwboot_tty_send(tty, msg, 8);
+ if (rc) {
+ usleep(msg_req_delay * 1000);
+ continue;
+ }
+
+ rc = kwboot_tty_recv(tty, buf, 16, msg_rsp_timeo);
+
+ kwboot_spinner();
+
+ } while (rc);
+
+ kwboot_printv(\n);
+
+ return rc;
+}
+
+static int
kwboot_xm_makeblock(struct kwboot_block *block, const void *data,
size_t size, int pnum)
{
@@ -300,6 +350,7 @@ kwboot_xm_makeblock(struct kwboot_block *block, const void
*data,
size_t n;
int i;
+ block-soh = SOH;
block-pnum = pnum;
block-_pnum = ~block-pnum;
@@ -326,9 +377,15 @@ kwboot_xm_sendblock(int fd, struct kwboot_block *block)
if (rc)
break;
- rc = kwboot_tty_recv(fd, c, 1, KWBOOT_BLK_RSP_TIMEO);
- if (rc)
- break;
+ do {
+ rc = kwboot_tty_recv(fd, c, 1, KWBOOT_BLK_RSP_TIMEO);
+ if (rc)
+ break;
+
+ if (c != ACK c != NAK c != CAN)
+ printf(%c, c);
+
+ } while (c != ACK c != NAK c != CAN);
if (c != ACK)
kwboot_progress(-1, '+');
@@ -511,7 +568,6 @@ kwboot_mmap_image(const char *path, size_t *size, int prot)
void *img;
rc = -1;
- fd = -1;
img = NULL;
fd = open(path, O_RDONLY);
@@ -601,11 +657,16 @@ static void
kwboot_usage(FILE *stream, char
[U-Boot] [PATCH v3 11/25] spi: kirkwood_spi.c: Compile MPP (pin-mux) only for kirkwood SoC's
Compile the pin multiplexing only on Kirkwood platforms. As the
Armada XP doesn't need it.
Signed-off-by: Stefan Roese s...@denx.de
Acked-by: Prafulla Wadaskar prafu...@marvell.com
Reviewed-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
Tested-by: Luka Perkov l...@openwrt.org
---
Changes in v3:
- Added Acked-by from Prafulla to all Kirkwood patches
- Added Tested-by from Luka
- Added Reviewed-by from Jagannadha
Changes in v2: None
drivers/spi/kirkwood_spi.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index 9710f12..ce2ba96 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -13,22 +13,28 @@
#include spi.h
#include asm/io.h
#include asm/arch/soc.h
+#ifdef CONFIG_KIRKWOOD
#include asm/arch/mpp.h
+#endif
#include asm/arch-mvebu/spi.h
static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE;
+#ifdef CONFIG_KIRKWOOD
static u32 cs_spi_mpp_back[2];
+#endif
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
struct spi_slave *slave;
u32 data;
+#ifdef CONFIG_KIRKWOOD
static const u32 kwspi_mpp_config[2][2] = {
{ MPP0_SPI_SCn, 0 }, /* if cs == 0 */
{ MPP7_SPI_SCn, 0 } /* if cs != 0 */
};
+#endif
if (!spi_cs_is_valid(bus, cs))
return NULL;
@@ -51,15 +57,19 @@ struct spi_slave *spi_setup_slave(unsigned int bus,
unsigned int cs,
writel(KWSPI_SMEMRDIRQ, spireg-irq_cause);
writel(KWSPI_IRQMASK, spireg-irq_mask);
+#ifdef CONFIG_KIRKWOOD
/* program mpp registers to select SPI_CSn */
kirkwood_mpp_conf(kwspi_mpp_config[cs ? 1 : 0], cs_spi_mpp_back);
+#endif
return slave;
}
void spi_free_slave(struct spi_slave *slave)
{
+#ifdef CONFIG_KIRKWOOD
kirkwood_mpp_conf(cs_spi_mpp_back, NULL);
+#endif
free(slave);
}
--
2.1.0
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[U-Boot] [PATCH v3 09/25] arm: marvell: Rework timer.c to make it usable for other MVEBU platforms
This patch does the following:
- Rename defines and registers to not use kirkwood
- Remove unused defines
- Use clrsetbits() accessor functions
- Coding style cleanup
- Clear 25MHZ bit in timer controller register init for Armada XP
There is no functional change for kirkwood. At least not intentionally.
This will be used by the upcoming Armada XP support.
Signed-off-by: Stefan Roese s...@denx.de
Acked-by: Prafulla Wadaskar prafu...@marvell.com
Tested-by: Luka Perkov l...@openwrt.org
---
Changes in v3:
- Added Acked-by from Prafulla to all Kirkwood patches
- Added Tested-by from Luka
Changes in v2: None
arch/arm/include/asm/arch-kirkwood/soc.h | 2 +-
arch/arm/mvebu-common/timer.c| 90 ++--
2 files changed, 41 insertions(+), 51 deletions(-)
diff --git a/arch/arm/include/asm/arch-kirkwood/soc.h
b/arch/arm/include/asm/arch-kirkwood/soc.h
index 3ea51d7..29fb2d9 100644
--- a/arch/arm/include/asm/arch-kirkwood/soc.h
+++ b/arch/arm/include/asm/arch-kirkwood/soc.h
@@ -33,7 +33,7 @@
#define KW_SPI_BASE(KW_REGISTER(0x10600))
#define KW_CPU_WIN_BASE(KW_REGISTER(0x2))
#define KW_CPU_REG_BASE(KW_REGISTER(0x20100))
-#define KW_TIMER_BASE (KW_REGISTER(0x20300))
+#define MVEBU_TIMER_BASE (KW_REGISTER(0x20300))
#define KW_REG_PCIE_BASE (KW_REGISTER(0x4))
#define KW_USB20_BASE (KW_REGISTER(0x5))
#define KW_EGIGA0_BASE (KW_REGISTER(0x72000))
diff --git a/arch/arm/mvebu-common/timer.c b/arch/arm/mvebu-common/timer.c
index b7aa645..40c4bc2 100644
--- a/arch/arm/mvebu-common/timer.c
+++ b/arch/arm/mvebu-common/timer.c
@@ -9,73 +9,66 @@
#include asm/io.h
#include asm/arch/soc.h
-#define UBOOT_CNTR 0 /* counter to use for uboot timer */
-
-/* Timer reload and current value registers */
-struct kwtmr_val {
- u32 reload; /* Timer reload reg */
- u32 val;/* Timer value reg */
-};
-
-/* Timer registers */
-struct kwtmr_registers {
- u32 ctrl; /* Timer control reg */
- u32 pad[3];
- struct kwtmr_val tmr[2];
- u32 wdt_reload;
- u32 wdt_val;
-};
-
-struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE;
+#define UBOOT_CNTR 0 /* counter to use for U-Boot timer */
/*
* ARM Timers Registers Map
*/
-#define CNTMR_CTRL_REG kwtmr_regs-ctrl
-#define CNTMR_RELOAD_REG(tmrnum) kwtmr_regs-tmr[tmrnum].reload
-#define CNTMR_VAL_REG(tmrnum) kwtmr_regs-tmr[tmrnum].val
+#define CNTMR_CTRL_REG tmr_regs-ctrl
+#define CNTMR_RELOAD_REG(tmrnum) tmr_regs-tmr[tmrnum].reload
+#define CNTMR_VAL_REG(tmrnum) tmr_regs-tmr[tmrnum].val
/*
* ARM Timers Control Register
* CPU_TIMERS_CTRL_REG (CTCR)
*/
#define CTCR_ARM_TIMER_EN_OFFS(cntr) (cntr * 2)
-#define CTCR_ARM_TIMER_EN_MASK(cntr) (1 CTCR_ARM_TIMER_EN_OFFS)
#define CTCR_ARM_TIMER_EN(cntr)(1
CTCR_ARM_TIMER_EN_OFFS(cntr))
-#define CTCR_ARM_TIMER_DIS(cntr) (0 CTCR_ARM_TIMER_EN_OFFS(cntr))
#define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1)
-#define CTCR_ARM_TIMER_AUTO_MASK(cntr) (1 1)
#define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 CTCR_ARM_TIMER_AUTO_OFFS(cntr))
-#define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 CTCR_ARM_TIMER_AUTO_OFFS(cntr))
-/*
- * ARM Timer\Watchdog Reload Register
- * CNTMR_RELOAD_REG (TRR)
- */
-#define TRG_ARM_TIMER_REL_OFFS 0
-#define TRG_ARM_TIMER_REL_MASK 0x
+/* Only Armada XP have the 25MHz enable bit (Kirkwood doesn't) */
+#if defined(CONFIG_ARMADA_XP)
+#define CTCR_ARM_TIMER_25MHZ_OFFS(cntr)(cntr + 11)
+#define CTCR_ARM_TIMER_25MHZ(cntr) (1 CTCR_ARM_TIMER_25MHZ_OFFS(cntr))
+#else
+#define CTCR_ARM_TIMER_25MHZ(cntr) 0
+#endif
-/*
- * ARM Timer\Watchdog Register
- * CNTMR_VAL_REG (TVRG)
- */
-#define TVR_ARM_TIMER_OFFS 0
-#define TVR_ARM_TIMER_MASK 0x
-#define TVR_ARM_TIMER_MAX 0x
#define TIMER_LOAD_VAL 0x
-#define READ_TIMER (readl(CNTMR_VAL_REG(UBOOT_CNTR)) /
\
-(CONFIG_SYS_TCLK / 1000))
+#define timestamp gd-arch.tbl
+#define lastdecgd-arch.lastinc
+
+/* Timer reload and current value registers */
+struct kwtmr_val {
+ u32 reload; /* Timer reload reg */
+ u32 val;/* Timer value reg */
+};
+
+/* Timer registers */
+struct kwtmr_registers {
+ u32 ctrl; /* Timer control reg */
+ u32 pad[3];
+ struct kwtmr_val tmr[4];
+ u32 wdt_reload;
+ u32 wdt_val;
+};
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp gd-arch.tbl
-#define lastdec gd-arch.lastinc
+static struct kwtmr_registers *tmr_regs =
+ (struct kwtmr_registers *)MVEBU_TIMER_BASE;
+
+static
[U-Boot] [PATCH v3 25/25] Makefile: Add CONFIG_BUILD_TARGET to automatically build an special image
Add target to build it automatically upon make / MAKEALL. This can/should be set by board / cpu specific headers if a special U-Boot image is required for this SoC / board. E.g. used by Marvell Armada XP to automatically build the u-boot.kwb target. Signed-off-by: Stefan Roese s...@denx.de Cc: Masahiro Yamada yamad...@jp.panasonic.com --- Changes in v3: None Changes in v2: - Rebased on latest U-Boot version already including the Kconfig support switch. - Removed patch [PATCH v1 21/25] arm: kirkwood: Use mvebu new common mbus API as this breaks Kirkwood booting. This needs to be resolved at some time, but I don't have access to a Kirkwood based board with JTAG BDI access to debug it right now. Till somebody fixes this issue, lets just remove it from this series for now. - Added basic support for the maxBCM MV78460 based board Makefile | 5 + README | 8 2 files changed, 13 insertions(+) diff --git a/Makefile b/Makefile index c793440..0354e56 100644 --- a/Makefile +++ b/Makefile @@ -761,6 +761,11 @@ endif endif endif +# Add optional build target if defined in board/cpu/soc headers +ifneq ($(CONFIG_BUILD_TARGET),) +ALL-y += $(CONFIG_BUILD_TARGET:%=%) +endif + LDFLAGS_u-boot += $(LDFLAGS_FINAL) ifneq ($(CONFIG_SYS_TEXT_BASE),) LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE) diff --git a/README b/README index 0a0f528..3036d5e 100644 --- a/README +++ b/README @@ -2700,6 +2700,14 @@ CBFS (Coreboot Filesystem) support 200 ms. - Configuration Management: + CONFIG_BUILD_TARGET + + Some SoCs need special image types (e.g. U-Boot binary + with a special header) as build targets. By defining + CONFIG_BUILD_TARGET in the SoC / board header, this + special image will be automatically built upon calling + make / MAKEALL. + CONFIG_IDENT_STRING If defined, this string will be added to the U-Boot -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 13/25] spi: kirkwood_spi.c: Change KW_SPI_BASE to MVEBU_SPI_BASE
This makes is possible to use this SPI driver from other MVEBU SoC's as well. As the upcoming Armada XP support will do. Signed-off-by: Stefan Roese s...@denx.de Acked-by: Prafulla Wadaskar prafu...@marvell.com Reviewed-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com Tested-by: Luka Perkov l...@openwrt.org --- Changes in v3: - Added Acked-by from Prafulla to all Kirkwood patches - Added Tested-by from Luka - Added Reviewed-by from Jagannadha Changes in v2: None arch/arm/include/asm/arch-kirkwood/soc.h | 2 +- drivers/spi/kirkwood_spi.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-kirkwood/soc.h b/arch/arm/include/asm/arch-kirkwood/soc.h index 332cc24..4ef32c7 100644 --- a/arch/arm/include/asm/arch-kirkwood/soc.h +++ b/arch/arm/include/asm/arch-kirkwood/soc.h @@ -30,7 +30,7 @@ #define MVEBU_GPIO1_BASE (KW_REGISTER(0x10140)) #define KW_RTC_BASE(KW_REGISTER(0x10300)) #define KW_NANDF_BASE (KW_REGISTER(0x10418)) -#define KW_SPI_BASE(KW_REGISTER(0x10600)) +#define MVEBU_SPI_BASE (KW_REGISTER(0x10600)) #define KW_CPU_WIN_BASE(KW_REGISTER(0x2)) #define KW_CPU_REG_BASE(KW_REGISTER(0x20100)) #define MVEBU_TIMER_BASE (KW_REGISTER(0x20300)) diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index ce2ba96..e7b0982 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -18,7 +18,8 @@ #endif #include asm/arch-mvebu/spi.h -static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE; +static struct kwspi_registers *spireg = + (struct kwspi_registers *)MVEBU_SPI_BASE; #ifdef CONFIG_KIRKWOOD static u32 cs_spi_mpp_back[2]; -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 07/25] arm: marvell: Move arch/kirkwood.h to arch/soc.h
This move makes is possible to use this header not only from kirkwood
platforms but from all Marvell mvebu platforms.
Signed-off-by: Stefan Roese s...@denx.de
Acked-by: Prafulla Wadaskar prafu...@marvell.com
Tested-by: Luka Perkov l...@openwrt.org
---
Changes in v3:
- Added Acked-by from Prafulla to all Kirkwood patches
- Added Tested-by from Luka
- Added newly introduced driver drivers/mmc/mvebu_mmc.c
Changes in v2: None
arch/arm/cpu/arm926ejs/kirkwood/cpu.c| 2 +-
arch/arm/cpu/arm926ejs/kirkwood/mpp.c| 2 +-
arch/arm/include/asm/arch-kirkwood/config.h | 2 +-
arch/arm/include/asm/arch-kirkwood/{kirkwood.h = soc.h} | 0
arch/arm/mvebu-common/dram.c | 2 +-
arch/arm/mvebu-common/timer.c| 2 +-
board/LaCie/net2big_v2/net2big_v2.c | 2 +-
board/LaCie/netspace_v2/netspace_v2.c| 2 +-
board/LaCie/wireless_space/wireless_space.c | 2 +-
board/Marvell/dreamplug/dreamplug.c | 2 +-
board/Marvell/guruplug/guruplug.c| 2 +-
board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c | 2 +-
board/Marvell/openrd/openrd.c| 2 +-
board/Marvell/rd6281a/rd6281a.c | 2 +-
board/Marvell/sheevaplug/sheevaplug.c| 2 +-
board/Seagate/dockstar/dockstar.c| 2 +-
board/Seagate/goflexhome/goflexhome.c| 2 +-
board/buffalo/lsxl/lsxl.c| 2 +-
board/cloudengines/pogo_e02/pogo_e02.c | 2 +-
board/d-link/dns325/dns325.c | 2 +-
board/iomega/iconnect/iconnect.c | 2 +-
board/karo/tk71/tk71.c | 2 +-
board/keymile/km_arm/km_arm.c| 2 +-
board/raidsonic/ib62x0/ib62x0.c | 2 +-
drivers/block/mvsata_ide.c | 2 +-
drivers/gpio/kw_gpio.c | 2 +-
drivers/i2c/mvtwsi.c | 2 +-
drivers/mmc/mvebu_mmc.c | 2 +-
drivers/mtd/nand/kirkwood_nand.c | 2 +-
drivers/net/mvgbe.c | 2 +-
drivers/rtc/mvrtc.h | 2 +-
drivers/spi/kirkwood_spi.c | 2 +-
drivers/usb/host/ehci-marvell.c | 2 +-
33 files changed, 32 insertions(+), 32 deletions(-)
rename arch/arm/include/asm/arch-kirkwood/{kirkwood.h = soc.h} (100%)
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
index 881e2de..75d3799 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
@@ -12,7 +12,7 @@
#include u-boot/md5.h
#include asm/io.h
#include asm/arch/cpu.h
-#include asm/arch/kirkwood.h
+#include asm/arch/soc.h
#include mvebu_mmc.h
#define BUFLEN 16
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
index 0ba6f09..7222504 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
@@ -12,7 +12,7 @@
#include common.h
#include asm/io.h
#include asm/arch/cpu.h
-#include asm/arch/kirkwood.h
+#include asm/arch/soc.h
#include asm/arch/mpp.h
static u32 kirkwood_variant(void)
diff --git a/arch/arm/include/asm/arch-kirkwood/config.h
b/arch/arm/include/asm/arch-kirkwood/config.h
index f7bfa0e..ccc8e4e 100644
--- a/arch/arm/include/asm/arch-kirkwood/config.h
+++ b/arch/arm/include/asm/arch-kirkwood/config.h
@@ -23,7 +23,7 @@
#error SOC Name not defined
#endif /* CONFIG_KW88F6281 */
-#include asm/arch/kirkwood.h
+#include asm/arch/soc.h
#define CONFIG_ARM926EJS 1 /* Basic Architecture */
#define CONFIG_SYS_CACHELINE_SIZE 32
/* default Dcache Line length for kirkwood */
diff --git a/arch/arm/include/asm/arch-kirkwood/kirkwood.h
b/arch/arm/include/asm/arch-kirkwood/soc.h
similarity index 100%
rename from arch/arm/include/asm/arch-kirkwood/kirkwood.h
rename to arch/arm/include/asm/arch-kirkwood/soc.h
diff --git a/arch/arm/mvebu-common/dram.c b/arch/arm/mvebu-common/dram.c
index bb5989b..e468136 100644
--- a/arch/arm/mvebu-common/dram.c
+++ b/arch/arm/mvebu-common/dram.c
@@ -10,7 +10,7 @@
#include common.h
#include asm/io.h
#include asm/arch/cpu.h
-#include asm/arch/kirkwood.h
+#include asm/arch/soc.h
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mvebu-common/timer.c b/arch/arm/mvebu-common/timer.c
index a08f4a1..b7aa645 100644
--- a/arch/arm/mvebu-common/timer.c
+++ b/arch/arm/mvebu-common/timer.c
@@ -7,7 +7,7 @@
#include common.h
#include asm/io.h
-#include asm/arch/kirkwood.h
+#include asm/arch/soc.h
#define UBOOT_CNTR 0 /* counter to use for uboot timer */
diff --git
[U-Boot] [PATCH v3 14/25] arm: kirkwood: Change naming of dram functions from km_foo() to mvebu_foo()
Additionally the SDRAM address decoding register address is not hard coded
in the C code any more. A define is introduced for this base address.
This makes is possible to use those gpio functions from other MVEBU SoC's
as well.
Signed-off-by: Stefan Roese s...@denx.de
Acked-by: Prafulla Wadaskar prafu...@marvell.com
Tested-by: Luka Perkov l...@openwrt.org
---
Changes in v3:
- Added Acked-by from Prafulla to all Kirkwood patches
- Added Tested-by from Luka
Changes in v2: None
arch/arm/include/asm/arch-kirkwood/cpu.h| 6 +--
arch/arm/include/asm/arch-kirkwood/soc.h| 1 +
arch/arm/mvebu-common/dram.c| 53 +
board/LaCie/net2big_v2/net2big_v2.c | 2 +-
board/LaCie/netspace_v2/netspace_v2.c | 2 +-
board/LaCie/wireless_space/wireless_space.c | 2 +-
board/Marvell/dreamplug/dreamplug.c | 2 +-
board/Marvell/guruplug/guruplug.c | 2 +-
board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c | 2 +-
board/Marvell/openrd/openrd.c | 2 +-
board/Marvell/rd6281a/rd6281a.c | 2 +-
board/Marvell/sheevaplug/sheevaplug.c | 2 +-
board/Seagate/dockstar/dockstar.c | 2 +-
board/Seagate/goflexhome/goflexhome.c | 2 +-
board/buffalo/lsxl/lsxl.c | 2 +-
board/cloudengines/pogo_e02/pogo_e02.c | 2 +-
board/d-link/dns325/dns325.c| 2 +-
board/iomega/iconnect/iconnect.c| 2 +-
board/karo/tk71/tk71.c | 2 +-
board/keymile/km_arm/km_arm.c | 4 +-
board/raidsonic/ib62x0/ib62x0.c | 2 +-
21 files changed, 50 insertions(+), 48 deletions(-)
diff --git a/arch/arm/include/asm/arch-kirkwood/cpu.h
b/arch/arm/include/asm/arch-kirkwood/cpu.h
index 5900a15..926d347 100644
--- a/arch/arm/include/asm/arch-kirkwood/cpu.h
+++ b/arch/arm/include/asm/arch-kirkwood/cpu.h
@@ -140,9 +140,9 @@ struct kwgpio_registers {
* functions
*/
unsigned char get_random_hex(void);
-unsigned int kw_sdram_bar(enum memory_bank bank);
-unsigned int kw_sdram_bs(enum memory_bank bank);
-void kw_sdram_size_adjust(enum memory_bank bank);
+unsigned int mvebu_sdram_bar(enum memory_bank bank);
+unsigned int mvebu_sdram_bs(enum memory_bank bank);
+void mvebu_sdram_size_adjust(enum memory_bank bank);
int kw_config_adr_windows(void);
void mvebu_config_gpio(unsigned int gpp0_oe_val, unsigned int gpp1_oe_val,
unsigned int gpp0_oe, unsigned int gpp1_oe);
diff --git a/arch/arm/include/asm/arch-kirkwood/soc.h
b/arch/arm/include/asm/arch-kirkwood/soc.h
index 4ef32c7..58ed71b 100644
--- a/arch/arm/include/asm/arch-kirkwood/soc.h
+++ b/arch/arm/include/asm/arch-kirkwood/soc.h
@@ -22,6 +22,7 @@
#define KW_REG_UNDOC_0x1470(KW_REGISTER(0x1470))
#define KW_REG_UNDOC_0x1478(KW_REGISTER(0x1478))
+#define MVEBU_SDRAM_BASE (KW_REGISTER(0x1500))
#define KW_TWSI_BASE (KW_REGISTER(0x11000))
#define KW_UART0_BASE (KW_REGISTER(0x12000))
#define KW_UART1_BASE (KW_REGISTER(0x12100))
diff --git a/arch/arm/mvebu-common/dram.c b/arch/arm/mvebu-common/dram.c
index e468136..db18791 100644
--- a/arch/arm/mvebu-common/dram.c
+++ b/arch/arm/mvebu-common/dram.c
@@ -14,27 +14,27 @@
DECLARE_GLOBAL_DATA_PTR;
-struct kw_sdram_bank {
+struct sdram_bank {
u32 win_bar;
u32 win_sz;
};
-struct kw_sdram_addr_dec {
- struct kw_sdram_banksdram_bank[4];
+struct sdram_addr_dec {
+ struct sdram_bank sdram_bank[4];
};
-#define KW_REG_CPUCS_WIN_ENABLE(1 0)
-#define KW_REG_CPUCS_WIN_WR_PROTECT(1 1)
-#define KW_REG_CPUCS_WIN_WIN0_CS(x)(((x) 0x3) 2)
-#define KW_REG_CPUCS_WIN_SIZE(x) (((x) 0xff) 24)
+#define REG_CPUCS_WIN_ENABLE (1 0)
+#define REG_CPUCS_WIN_WR_PROTECT (1 1)
+#define REG_CPUCS_WIN_WIN0_CS(x) (((x) 0x3) 2)
+#define REG_CPUCS_WIN_SIZE(x) (((x) 0xff) 24)
/*
- * kw_sdram_bar - reads SDRAM Base Address Register
+ * mvebu_sdram_bar - reads SDRAM Base Address Register
*/
-u32 kw_sdram_bar(enum memory_bank bank)
+u32 mvebu_sdram_bar(enum memory_bank bank)
{
- struct kw_sdram_addr_dec *base =
- (struct kw_sdram_addr_dec *)KW_REGISTER(0x1500);
+ struct sdram_addr_dec *base =
+ (struct sdram_addr_dec *)MVEBU_SDRAM_BASE;
u32 result = 0;
u32 enable = 0x01 readl(base-sdram_bank[bank].win_sz);
@@ -46,31 +46,31 @@ u32 kw_sdram_bar(enum memory_bank bank)
}
/*
- * kw_sdram_bs_set - writes SDRAM Bank size
+ * mvebu_sdram_bs_set - writes SDRAM Bank size
*/
-static void kw_sdram_bs_set(enum memory_bank bank, u32 size)
+static void mvebu_sdram_bs_set(enum memory_bank bank, u32 size)
{
- struct kw_sdram_addr_dec *base =
- (struct kw_sdram_addr_dec *)KW_REGISTER(0x1500);
+ struct
[U-Boot] [PATCH v3 06/25] arm: kirkwood: Move some SoC files into new arch/arm/mvebu-common
By moving some kirkwood files into a Marvell common directory, those files
can be used by other Marvell platforms as well. The name mvebu is taken
from the Linux kernel source tree. It has been chosen there to represent
the SoC's from the Marvell EBU (Engineering Business Unit). Those SoC's
currently are:
Armada 370/375/XP, Dove, mv78xx0, Kirkwood, Orion5x
This will be used by the upcoming Armada XP (MV78460) platform support.
Signed-off-by: Stefan Roese s...@denx.de
Acked-by: Prafulla Wadaskar prafu...@marvell.com
Tested-by: Luka Perkov l...@openwrt.org
---
Changes in v3:
- Added Acked-by from Prafulla to all Kirkwood patches
- Added Tested-by from Luka
Changes in v2: None
Makefile | 4
arch/arm/cpu/arm926ejs/kirkwood/Makefile | 4 +---
arch/arm/mvebu-common/Makefile| 10 ++
arch/arm/{cpu/arm926ejs/kirkwood = mvebu-common}/dram.c | 8 +++-
arch/arm/{cpu/arm926ejs/kirkwood = mvebu-common}/timer.c | 0
5 files changed, 22 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/mvebu-common/Makefile
rename arch/arm/{cpu/arm926ejs/kirkwood = mvebu-common}/dram.c (91%)
rename arch/arm/{cpu/arm926ejs/kirkwood = mvebu-common}/timer.c (100%)
diff --git a/Makefile b/Makefile
index 9646859..b835921 100644
--- a/Makefile
+++ b/Makefile
@@ -655,6 +655,10 @@ ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs
vf610))
libs-y += arch/$(ARCH)/imx-common/
endif
+ifneq (,$(filter $(SOC), kirkwood))
+libs-y += arch/$(ARCH)/mvebu-common/
+endif
+
libs-$(CONFIG_ARM) += arch/arm/cpu/
libs-$(CONFIG_PPC) += arch/powerpc/cpu/
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/Makefile
b/arch/arm/cpu/arm926ejs/kirkwood/Makefile
index c230ce8..df4756e 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/Makefile
+++ b/arch/arm/cpu/arm926ejs/kirkwood/Makefile
@@ -7,7 +7,5 @@
#
obj-y = cpu.o
-obj-y += dram.o
-obj-y += mpp.o
-obj-y += timer.o
obj-y += cache.o
+obj-y += mpp.o
diff --git a/arch/arm/mvebu-common/Makefile b/arch/arm/mvebu-common/Makefile
new file mode 100644
index 000..4d20d2c
--- /dev/null
+++ b/arch/arm/mvebu-common/Makefile
@@ -0,0 +1,10 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor www.marvell.com
+# Written-by: Prafulla Wadaskar prafu...@marvell.com
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y = dram.o
+obj-y += timer.o
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/dram.c
b/arch/arm/mvebu-common/dram.c
similarity index 91%
rename from arch/arm/cpu/arm926ejs/kirkwood/dram.c
rename to arch/arm/mvebu-common/dram.c
index d73ae47..bb5989b 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/dram.c
+++ b/arch/arm/mvebu-common/dram.c
@@ -110,7 +110,13 @@ int dram_init(void)
if (gd-bd-bi_dram[i].start != gd-ram_size)
break;
- gd-ram_size += gd-bd-bi_dram[i].size;
+ /*
+* Don't report more than 3GiB of SDRAM, otherwise there is no
+* address space left for the internal registers etc.
+*/
+ if ((gd-ram_size + gd-bd-bi_dram[i].size != 0)
+ (gd-ram_size + gd-bd-bi_dram[i].size = (3 30)))
+ gd-ram_size += gd-bd-bi_dram[i].size;
}
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/timer.c
b/arch/arm/mvebu-common/timer.c
similarity index 100%
rename from arch/arm/cpu/arm926ejs/kirkwood/timer.c
rename to arch/arm/mvebu-common/timer.c
--
2.1.0
___
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[U-Boot] [PATCH v3 0/25] Add Marvell Armada XP MV78460 SoC support
This patch series adds support for the Marvell Armada XP SoC's. Specifically the MV78460. Basic support for the db-78460-bp evaluation board is added. Supporting the following interfaces: - UART - SPI (including SPI NOR flash) - I2C - Ethernet (neta) While doing this port, I tried to consolidate common Marvell code into the arch/arm/mvebu-common directory. This directory should be used to collect more common code for the MVEBU SoC's (Dove, Kirkwood, Armada 370, Armada 380, Armada XP). I started with Kirkwood and some of its interfaces. Dove is definitely a candidate to move some of its code into thise directory as well. Because of the renaming of some functions from kirkwood to mvebu (to make them better usable on other MVEBU SoCs), this patch series not only touches the ARM SoC specific files (in arch/arm/...). But also some device drivers (e.g. SPI, I2C). Separating these driver specific patches into different patches that are not depending on this ARM patch series seems hard if not impossible. Thats why I would really like to get this patch series to get applied completely be one custodian. Not sure if this could / should go through Tom directly? Only if all the subsystem custodians have given their Acked-by ... of course. Testing on Kirkwood based boards would be greatly appreciated. So anyone with access to some of those board, please give this patch series a try. I really hope that I didn't break anything while merging some of the code into the common mvebu directory. Please note that this Armada XP port still requires the Binary Header (bin_hdr) from the Marvell U-Boot tree to be included as a binary blob into the resulting image (u-boot.kwb) that can be booted by the MVEBU BootROM. This binary bin_hdr is usually responsible for the DDR3 controller configuration and the DDR3 training. One way to extract this bin_hdr binary from an existing Marvell boot image right now is to use the kwbimage tool from Barebox. Please refer to the documentation thats available there for more details. v3 status: Tom, how do you feel about this patch series? Its been abround for quite some time now. And I would really like to see it applied to mainline. Prafulla has acked all Kirkwood related patches. Heiko the I2C patch. Jagan the I2C stuff. If you feel its okay, then please pull the complete patch-series directly. Thanks, Stefan Changes in v3: - Added Tested-by from Luka - Added Tested-by from Luka - Added Acked-by from Prafulla to all Kirkwood patches - Added Tested-by from Luka - Added Acked-by from Prafulla to all Kirkwood patches - Added Tested-by from Luka - Added Acked-by from Prafulla to all Kirkwood patches - Added Tested-by from Luka - Added Acked-by from Prafulla to all Kirkwood patches - Added Tested-by from Luka - Added Acked-by from Prafulla to all Kirkwood patches - Added Tested-by from Luka - Added newly introduced driver drivers/mmc/mvebu_mmc.c - Added Acked-by from Prafulla to all Kirkwood patches - Added Tested-by from Luka - Added Reviewed-by from Jagannadha - Added Acked-by from Prafulla to all Kirkwood patches - Added Tested-by from Luka - Added Tested-by from Luka - Added Acked-by from Prafulla to all Kirkwood patches - Added Tested-by from Luka - Added Reviewed-by from Jagannadha - Added Acked-by from Prafulla to all Kirkwood patches - Added Tested-by from Luka - Added Acked-by from Prafulla to all Kirkwood patches - Added Tested-by from Luka - Added Reviewed-by from Jagannadha - Added Acked-by from Prafulla to all Kirkwood patches - Added Tested-by from Luka - Added Tested-by from Luka - Added Tested-by from Luka - Added Acked-by from Heiko - Added Tested-by from Luka - Added Tested-by from Luka - Rebased on current top-of-tree (git ID a1263632) - Rebased on current top-of-tree (git ID a1263632) Changes in v2: - Fixed issue in mbus_dt_setup_win() to also assign remappable windows - Made mbus_dt_setup_win() non-static, so that it can be called from other files for board specific mbus window configuration - Renamed target from db-78460-bp to db-mv784mp-gp as this matches the real eval board name - Added optional '-a' parameter to use the timings for Armada XP, as they are incompatibel with the currently used ones for Kirkwood (etc). - Rebased on latest U-Boot version already including the Kconfig support switch. - Removed patch [PATCH v1 21/25] arm: kirkwood: Use mvebu new common mbus API as this breaks Kirkwood booting. This needs to be resolved at some time, but I don't have access to a Kirkwood based board with JTAG BDI access to debug it right now. Till somebody fixes this issue, lets just remove it from this series for now. - Added basic support for the maxBCM MV78460 based board Stefan Roese (25): sf: Add M25PX64 SPI NOR flash ID arm: kirkwood: spi.h: Add some missing parenthesis spi: kirkwood_spi.c: Some fixes and cleanup spi: kirkwood_spi.c: Make global variable static spi: kirkwood_spi.c: cosmetic: Fix minor coding style issues arm: kirkwood: Move
Re: [U-Boot] [PATCH 3/5] iMX6DL:SABRESD: Add new DDR script
Hi Ye Li, On Tue, Sep 2, 2014 at 3:11 AM, Ye.Li b37...@freescale.com wrote: Add specified mx6dl_4x_mt41j128.cfg DDR script for iMX6DLSABRESD board. Not share from nitrogen6x. The default boot device also changes to SD card. Signed-off-by: Ye.Li b37...@freescale.com Thanks for the patch, but I have already sent this one: https://patchwork.ozlabs.org/patch/381961/ Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mpc5xxx: Add stub implementation of cache functions
On Mon, Sep 01, 2014 at 10:53:10PM +0200, Wolfgang Denk wrote: Dear Vasili Galka, In message 1409051131-7260-1-git-send-email-vvv...@gmail.com you wrote: Some drivers (e.g. net/e1000) reference these functions. So, this fixes the build of MVBC_P board. I'm not familiar with the MPC5xxx platform, maybe a full implementation shall be implemented instead of this stub in the future. Signed-off-by: Vasili Galka vvv...@gmail.com Cc: Wolfgang Denk w...@denx.de, Marek Vasut ma...@denx.de --- arch/powerpc/cpu/mpc5xxx/Makefile |1 + arch/powerpc/cpu/mpc5xxx/cache.c | 15 +++ 2 files changed, 16 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/cpu/mpc5xxx/cache.c Acked-by: Wolfgang Denk w...@denx.de Tom, can you please pick this up directly? Thanks! Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] uboot env in mmc partition
Hi Hannes, Yes, its an eMMC. If I read your response correctly, #define CONFIG_SYS_MMC_ENV_PART Can only have 2 values, 1 2 is that correct ? Pls also keep in mind that from linux, it works fine, with fw_env.config set to /dev/mmcblk0p4 0 0x1 From: Hannes Petermaier hannes.peterma...@br-automation.com To: Naitik Amin naitik.a...@ametek.com, Cc: u-boot@lists.denx.de, u-boot-boun...@lists.denx.de Date: 09/01/2014 12:54 AM Subject:Re: [U-Boot] uboot env in mmc partition HI there, Hi Naitik, I recently made changes to my system, where I created a new partition on my mmc. (mmcblk0p4) do you use MMC or eMMC ? I guess eMMC. Then i dd'd a uboot env image into this partition, updated the fw_env.config to point to /dev/mmcblk0p4. At this point, my fw_printenv and fw_setenv work good. So as a next step, I am tried to modify uboot to make it point to my env image in my new partition. I made below changes to my config header and rebuilt the uboot. On doing printenv from uboot, I dont see the same env that I pushed it from linux, infact I see it as its defined in the config header. Can some one help ? /* environment setting for MMC */ #ifdef CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ #define CONFIG_SYS_MMC_ENV_PART 4 #define CONFIG_ENV_OFFSET 0 /* just after the MBR */ #endif I understand this #defines as following: CONFIG_SYS_MMC_ENV_DEV says: use mmc-device #0 CONFIG_SYS_MMC_ENV_PART says: use partition #4 i know that u-boot is using the boot-partitions to store the environment, an emmc only has 2 partitions. So #4 is a an illegal paramater CONFIG_ENV_OFFSET is an absolute address within the device/partition so it is not just after the MBR, instead the environment is instead the MBR best regards, Hannes ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-dm.git
On Mon, Sep 01, 2014 at 05:15:37PM -0700, Simon Glass wrote: Hi Tom, I have to leave off the exynos and tegra patches while I wait for feedback. But here are some GPIO enhancements that might as well go in. Next will be serial, but it needs a rev first. Should be in the next few days. The following changes since commit a1263632bb05f0a21620bad0661235fcbbe79dca: mx6: tqma6: get board support back to Kconfig build system (2014-08-31 12:01:04 -0400) are available in the git repository at: git://git.denx.de/u-boot-dm.git for you to fetch changes up to 4bc9a19324ba27eb867316d2ea0d55bba95e8724: dm: sandbox: dts: Add a GPIO bank (2014-08-31 23:21:42 -0600) Simon Glass (3): dm: gpio: Enhance gpio command to show only active GPIOs dm: gpio: Allow gpio command to adjust GPIOs that are busy dm: sandbox: dts: Add a GPIO bank arch/sandbox/dts/sandbox.dts | 8 + common/cmd_gpio.c| 110 ++-- include/asm-generic/gpio.h | 15 -- 3 files changed, 96 insertions(+), 37 deletions(-) Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v10, 11/14] buildman: Add an option to show which boards caused which errors
On Thu, Aug 28, 2014 at 09:43:43AM -0600, Simon Glass wrote: Add a -l option to display a list of offending boards against each error/warning line. The information will be shown in brackets as below: [snip] diff --git a/tools/buildman/README b/tools/buildman/README index b8c2bd6..fbc8449 100644 --- a/tools/buildman/README +++ b/tools/buildman/README [snip] If you really want to see build results as they happen, use -v when doing a -build (and -e if you want to see errors as well). +build (-e will be enabled automatically). OK, so here is my confusion. I didn't get from the help that -s implies -v. If I do: -s -v -e -l I get a verbose summary with per-board warning/error information. If I do: -s -v -l I don't get that information. If I follow what you're saying and the help right, I should do: $ export COMMON=-b master -c 1 -T 1 -j 24 -o /tmp/trini/eldk521 -G ~/.buildman.eldk521 $ ./tools/buildman/buildman $COMMON 'arm|powerpc' $ ./tools/buildman/buildman $COMMON 'arm|powerpc' -s And that should give me errors as well as which boards gave which? -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PULL] u-boot-usb/master
The following changes since commit a1263632bb05f0a21620bad0661235fcbbe79dca: mx6: tqma6: get board support back to Kconfig build system (2014-08-31 12:01:04 -0400) are available in the git repository at: git://git.denx.de/u-boot-usb.git HEAD for you to fetch changes up to 06fa91cd671eae291b05e2138d291c56ddd394df: USB: gadget: s3c: get rid of debug compile warning (2014-09-02 14:32:15 +0200) Bo Shen (2): USB: gadget: atmel: get rid of debug compile warning USB: gadget: s3c: get rid of debug compile warning Stephen Warren (1): usb: ci_udc: implement dfu_usb_get_reset Łukasz Majewski (2): dfu: Provide means to find difference between dfu-util -e and -R udc: dfu: s3c_udc: Provide function to check if USB reset was asserted common/cmd_dfu.c | 23 +++ drivers/dfu/dfu.c | 31 ++- drivers/usb/gadget/atmel_usba_udc.c | 12 ++-- drivers/usb/gadget/ci_udc.c | 7 +++ drivers/usb/gadget/f_dfu.c| 2 +- drivers/usb/gadget/s3c_udc_otg.c | 15 ++- drivers/usb/gadget/s3c_udc_otg_xfer_dma.c | 6 +++--- include/dfu.h | 5 - 8 files changed, 76 insertions(+), 25 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] USB: gadget: s3c: get rid of debug compile warning
On Monday, September 01, 2014 at 04:59:39 AM, Bo Shen wrote: Hi Marek, On 08/29/2014 05:34 PM, Marek Vasut wrote: On Wednesday, August 27, 2014 at 11:28:18 AM, Bo Shen wrote: When enable debug option to compile, it will give the following warning, this patch is used to get rid of it. ---8--- warning: 'flags' is used uninitialized in this function [-Wuninitialized] ---8--- Signed-off-by: Bo Shen voice.s...@atmel.com Are those two still relevant with u-boot/master please ? As the patch applied on u-boot/master is different with [1], so we still need this patch series. Will pick, thanks for the checking! Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT] Pull request: u-boot-dfu
On Tuesday, September 02, 2014 at 09:13:44 AM, Lukasz Majewski wrote: Dear Marek, Pulled, thanks! Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] omap3_beagle: Add boot script support to omap3 beagle board
Ping.
Guillaume
Le 26/08/2014 10:48, Guillaume GARDET a écrit :
This patch adds boot script support to omap3 beagle board.
Signed-off-by: Guillaume GARDET guillaume.gar...@free.fr
Cc: Tom Rini tr...@ti.com
---
include/configs/omap3_beagle.h | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 644e97f..f25a940 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -207,6 +207,9 @@
rootfstype=${ramrootfstype}\0 \
loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0 \
loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0 \
+ loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0 \
+ bootscript=echo Running bootscript from mmc${mmcdev} ...; \
+ source ${loadaddr}\0 \
loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr}
${bootdir}/${fdtfile}\0 \
mmcboot=echo Booting from mmc ...; \
run mmcargs; \
@@ -243,9 +246,13 @@
echo Running uenvcmd ...; \
run uenvcmd; \
fi; \
- if run loadimage; then \
- run mmcboot; \
- fi; \
+ if run loadbootscript; then \
+ run bootscript; \
+ else \
+ if run loadimage; then \
+ run mmcboot; \
+ fi; \
+ fi; \
fi; \
run nandboot; \
setenv bootfile zImage; \
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Re: [U-Boot] [PATCH 4/5] iMX6Solo:SABRESD: Add the i.MX6Solo SABRESD board support
On Tue, Sep 2, 2014 at 3:11 AM, Ye.Li b37...@freescale.com wrote:
#ifdef CONFIG_SUPPORT_EMMC_BOOT
#define EMMC_ENV \
emmcdev=2\0 \
@@ -146,7 +155,8 @@
fi; \
fi\0 \
EMMC_ENV \
- mmcargs=setenv bootargs console=${console},${baudrate} \
+ smp= CONFIG_SYS_NOSMP \0\
Why do we need this 'smp' string?
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Re: [U-Boot] [PATCH 2/5] iMX6Q:SABREAUTO: Rename the imximage.cfg to mx6q.cfg
On Tue, Sep 2, 2014 at 3:11 AM, Ye.Li b37...@freescale.com wrote: Rename the imximage.cfg to mx6q.cfg. No function change at all Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6qsabreauto/imximage.cfg | 129 board/freescale/mx6qsabreauto/mx6q.cfg | 129 It would be better to use git format -M so that git can detect the file rename. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tools: imximage: Fix the maximum DCD size for mx53/mx6
On Mon, Sep 01, 2014 at 01:35:22PM +, Nitin Garg wrote: Acked! Please note that patchwork won't pick that up, only a properly formatted acked-by line, thanks! Regards, Nitin Garg -Original Message- From: Fabio Estevam [mailto:fabio.este...@freescale.com] Sent: Monday, September 01, 2014 7:56 AM To: sba...@denx.de Cc: u-boot@lists.denx.de; jonas.d.karls...@gmail.com; Li Ye-B37916; Garg Nitin-B37173; Estevam Fabio-R49496 Subject: [PATCH] tools: imximage: Fix the maximum DCD size for mx53/mx6 According to mx53 and mx6 reference manuals: The maximum size of the DCD limited to 1768 bytes. As each DCD entry consists of 8 bytes, we have a total of 1768 / 8 = 221, and excluding the first entry, which is the header leads to 220 as the maximum number for DCD size. Reported-by: Jonas Karlsson jonas.d.karls...@gmail.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- tools/imximage.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/imximage.h b/tools/imximage.h index 01f861e..5b5ad0e 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -8,7 +8,7 @@ #ifndef _IMXIMAGE_H_ #define _IMXIMAGE_H_ -#define MAX_HW_CFG_SIZE_V2 121 /* Max number of registers imx can set for v2 */ +#define MAX_HW_CFG_SIZE_V2 220 /* Max number of registers imx can set +for v2 */ #define MAX_HW_CFG_SIZE_V1 60 /* Max number of registers imx can set for v1 */ #define APP_CODE_BARKER 0xB1 #define DCD_BARKER 0xB17219E9 -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mtd: nand: omap_gpmc: Enable multiple NAND flash devices
Since the CS of a device connected to the GPMC was
stored in the global variable, it was not possible to
use multiple devices. In this patch the CS is stored per
device in its 'struct omap_nand_info'. This makes it
possible to use up to 'GPMC_MAX_CS' NAND Flash devices
connected to U-boot.
Signed-off-by: Rostislav Lisovy lis...@merica.cz
---
Tested with custom AM335x board having two different
NAND flash chips (CS0 and CS1).
To use/test the change, the particular board.c should contain:
+ /*
+* gpmc_init is capable of initializing only one device
+* of each type (i.e. 1x NAND, 1x NOR, etc.). Since we
+* have 2 NAND flash devices, we have to do the initialization
+* manually
+*/
gpmc_init();
+ enable_gpmc_cs_config(gpmc_regs, gpmc_cfg-cs[0],
+ CONFIG_SYS_NAND_BASE, GPMC_SIZE_16M);
+ enable_gpmc_cs_config(gpmc_regs, gpmc_cfg-cs[1],
+ CONFIG_SYS_NAND_BASE + (16*1024*1024),
+ GPMC_SIZE_16M);
and your configuration file:
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_MAX_NAND_DEVICE 2
-#define MTDIDS_DEFAULT nand0=omap2-nand.0
+#define MTDIDS_DEFAULT nand0=omap2-nand.0,nand1=omap2-nand.1
+#define MTDIDS_DEFAULT nand0=omap2-nand.0,nand1=omap2-nand.1
#define MTDPARTS_DEFAULT mtdparts=omap2-nand.0: \
- -(Filesystem);
+ -(Filesystem); \
+ omap2-nand.1: \
+ -(Filesystem2);
---
drivers/mtd/nand/omap_gpmc.c | 42 --
1 file changed, 20 insertions(+), 22 deletions(-)
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 1acf06b..96618e1 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -27,10 +27,22 @@
static u8 bch8_polynomial[] = {0xef, 0x51, 0x2e, 0x09, 0xed, 0x93, 0x9a, 0xc2,
0x97, 0x79, 0xe5, 0x24, 0xb5};
#endif
-static uint8_t cs;
+static uint8_t cs_next;
static __maybe_unused struct nand_ecclayout omap_ecclayout;
/*
+ * Driver configurations
+ */
+struct omap_nand_info {
+ struct bch_control *control;
+ enum omap_ecc ecc_scheme;
+ int cs;
+};
+
+/* We are wasting a bit of memory but al least we are safe */
+static struct omap_nand_info omap_nand_info[GPMC_MAX_CS];
+
+/*
* omap_nand_hwcontrol - Set the address pointers corretly for the
* following address/data/command operation
*/
@@ -38,6 +50,8 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t
cmd,
uint32_t ctrl)
{
register struct nand_chip *this = mtd-priv;
+ struct omap_nand_info *info = this-priv;
+ int cs = info-cs;
/*
* Point the IO_ADDR to DATA and ADDRESS registers instead
@@ -148,24 +162,6 @@ static int __maybe_unused omap_correct_data(struct
mtd_info *mtd, uint8_t *dat,
}
/*
- * Driver configurations
- */
-struct omap_nand_info {
- struct bch_control *control;
- enum omap_ecc ecc_scheme;
-};
-
-/*
- * This can be a single instance cause all current users have only one NAND
- * with nearly the same setup (BCH8, some with ELM and others with sw BCH
- * library).
- * When some users with other BCH strength will exists this have to change!
- */
-static __maybe_unused struct omap_nand_info omap_nand_info = {
- .control = NULL
-};
-
-/*
* omap_reverse_list - re-orders list elements in reverse order [internal]
* @list: pointer to start of list
* @length:length of list
@@ -198,6 +194,7 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t
mode)
unsigned int eccsize1 = 0x00, eccsize0 = 0x00, bch_wrapmode = 0x00;
u32 ecc_size_config_val = 0;
u32 ecc_config_val = 0;
+ int cs = info-cs;
/* configure GPMC for specific ecc-scheme */
switch (info-ecc_scheme) {
@@ -826,7 +823,7 @@ int __maybe_unused omap_nand_switch_ecc(uint32_t hardware,
uint32_t eccstrength)
int board_nand_init(struct nand_chip *nand)
{
int32_t gpmc_config = 0;
- cs = 0;
+ int cs = cs_next++;
int err = 0;
/*
* xloader/Uboot's gpmc configuration would have configured GPMC for
@@ -856,7 +853,9 @@ int board_nand_init(struct nand_chip *nand)
nand-IO_ADDR_R = (void __iomem *)gpmc_cfg-cs[cs].nand_dat;
nand-IO_ADDR_W = (void __iomem *)gpmc_cfg-cs[cs].nand_cmd;
- nand-priv = omap_nand_info;
+ omap_nand_info[cs].control = NULL;
+ omap_nand_info[cs].cs = cs;
+ nand-priv = omap_nand_info[cs];
nand-cmd_ctrl = omap_nand_hwcontrol;
nand-options |= NAND_NO_PADDING | NAND_CACHEPRG;
nand-chip_delay = 100;
@@ -890,6 +889,5 @@ int board_nand_init(struct
Re: [U-Boot] [PATCH] tools: imximage: Fix the maximum DCD size for mx53/mx6
On 09/01/2014 07:56 AM, Fabio Estevam wrote: According to mx53 and mx6 reference manuals: The maximum size of the DCD limited to 1768 bytes. As each DCD entry consists of 8 bytes, we have a total of 1768 / 8 = 221, and excluding the first entry, which is the header leads to 220 as the maximum number for DCD size. Reported-by: Jonas Karlsson jonas.d.karls...@gmail.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- tools/imximage.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/imximage.h b/tools/imximage.h index 01f861e..5b5ad0e 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -8,7 +8,7 @@ #ifndef _IMXIMAGE_H_ #define _IMXIMAGE_H_ -#define MAX_HW_CFG_SIZE_V2 121 /* Max number of registers imx can set for v2 */ +#define MAX_HW_CFG_SIZE_V2 220 /* Max number of registers imx can set for v2 */ #define MAX_HW_CFG_SIZE_V1 60 /* Max number of registers imx can set for v1 */ #define APP_CODE_BARKER 0xB1 #define DCD_BARKER 0xB17219E9 Acked-by: Nitin Garg nitin.g...@freescale.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mtd: nand: omap_gpmc: Fix 'bit-flip' errors
OMAP GPMC driver used with some NAND Flash devices (e.g. Spansion
S34ML08G1) causes that U-boot shows hundreds of 'nand: bit-flip
corrected' error messages. Possible cause was discussed in the
mailinglist thread:
http://lists.denx.de/pipermail/u-boot/2014-April/177508.html
Quote (Author: Pekon Gupta pe...@ti.com): The issue is mainly
due to a NAND protocol violation in the omap driver since the
Random Data Output command (05h-E0h) expects to see only the
column address that should be addressed within the already loaded
read page into the read buffer. Only 2 address cycles with ALE
active should be provided between the 05h and E0h commands. The
Page read command expects the full address footprint (2bytes for
column address + 3bytes for row address), but once the page is
loaded into the read buffer, Random Data Output should be used
with only 2bytes for column address.
This patch combines the solution proposed in the mailinglist and
the patch provided by the Spansion company (GPLv2 code, source:
http://www.spansion.com/Support/Software/u-boot-psp-04.04.00.01-NAND.zip)
Signed-off-by: Rostislav Lisovy lis...@merica.cz
---
drivers/mtd/nand/omap_gpmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 1acf06b..7dd7d41 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -478,11 +478,11 @@ static int omap_read_page_bch(struct mtd_info *mtd,
struct nand_chip *chip,
oob += eccbytes) {
chip-ecc.hwctl(mtd, NAND_ECC_READ);
/* read data */
- chip-cmdfunc(mtd, NAND_CMD_RNDOUT, data_pos, page);
+ chip-cmdfunc(mtd, NAND_CMD_RNDOUT, data_pos, -1);
chip-read_buf(mtd, p, eccsize);
/* read respective ecc from oob area */
- chip-cmdfunc(mtd, NAND_CMD_RNDOUT, oob_pos, page);
+ chip-cmdfunc(mtd, NAND_CMD_RNDOUT, oob_pos, -1);
chip-read_buf(mtd, oob, eccbytes);
/* read syndrome */
chip-ecc.calculate(mtd, p, ecc_calc[i]);
--
1.9.1
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Re: [U-Boot] [PATCH v2] sun7i: Add support for Olimex A20-OLinuXino-LIME
On Tue, 2014-09-02 at 11:17 +0900, FUKAUMI Naoki wrote: This patch adds support for Olimex A20-OLinuXino-LIME board. Signed-off-by: FUKAUMI Naoki nao...@gmail.com Acked and applied to u-boot-sunxi#next, thanks. Ia ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] sunxi: Correct typo CONFIG_FTDFILE = CONFIG_FDTFILE
On Mon, 2014-09-01 at 10:30 +0200, Hans de Goede wrote: Hi, On 08/31/2014 02:13 PM, Ian Campbell wrote: Patch is the result of: sed -i -e 's/FTDFILE/FDTFILE/g' board/sunxi/Kconfig configs/* include/configs/sunxi-common.h sed -i -e 's/ftdfile/fdtfile/g' board/sunxi/Kconfig Spotted-by: Vagrant Cascadian vagr...@debian.org Signed-off-by: Ian Campbell i...@hellion.org.uk --- v2: Kconfig help (lowercase) too. Looks good: Acked-by: Hans de Goede hdego...@redhat.com Thanks, applied to u-boot-sunxi#next with s/Spotted-by/Reported-by/ and trivially resolved the conflict vs remove redundant SPL from CONFIG_SYS_EXTRA_OPTIONS. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] kconfig: remove redundant SPL from CONFIG_SYS_EXTRA_OPTIONS
On Sun, 2014-08-31 at 15:44 +0100, Ian Campbell wrote: On Sun, 2014-08-31 at 22:32 +0900, Masahiro Yamada wrote: CONFIG_SPL is defined as a primary option in Kconfig. It should not be added to CONFIG_SYS_EXTRA_OPTIONS. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Looks good to me. Build tested on Cubietruck (in an airport, so no runtime test). Acked-by: Ian Campbell i...@hellion.org.uk and applied to u-boot-sunxi#next, thanks. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tools: imximage: Fix the maximum DCD size for mx53/mx6
On 09/01/2014 07:56 AM, Fabio Estevam wrote: According to mx53 and mx6 reference manuals: The maximum size of the DCD limited to 1768 bytes. As each DCD entry consists of 8 bytes, we have a total of 1768 / 8 = 221, and excluding the first entry, which is the header leads to 220 as the maximum number for DCD size. Reported-by: Jonas Karlsson jonas.d.karls...@gmail.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- tools/imximage.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/imximage.h b/tools/imximage.h index 01f861e..5b5ad0e 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -8,7 +8,7 @@ #ifndef _IMXIMAGE_H_ #define _IMXIMAGE_H_ -#define MAX_HW_CFG_SIZE_V2 121 /* Max number of registers imx can set for v2 */ +#define MAX_HW_CFG_SIZE_V2 220 /* Max number of registers imx can set for v2 */ #define MAX_HW_CFG_SIZE_V1 60 /* Max number of registers imx can set for v1 */ #define APP_CODE_BARKER 0xB1 #define DCD_BARKER 0xB17219E9 Acked-by: Nitin Garg nitin.g...@freescale.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/8] ARMv8: PSCI: Fixup the device tree for PSCI v0.2
The idea here is that if there is no PSCI specific (most likely secure) memory allocated in the system, the macro CONFIG_ARMV8_SECURE_BASE will not be defined. In this case the PSCI vector table and its support code will be in DDR and will be protected from Linux using memreserve. Sure, this will prevent the OS from explicitly modifying this memory. However, the OS will still map the memory. This renders the protection incomplete due to the possibility of mismatched attributes and/or unexpected cache hits resulting in nasty coherency problems. We are likely to get away with this most of the time (if the kernel and U-Boot use the same attributes), but it would be very easy to blow things up accidentally. The only way to prevent that is to completely remove a portion of the memory from the view of the OS, such that it doesn't map the memory at all. Can't this be done by simply removing that secure portion of memory from the memory advertised in the memory node of the device tree passed to the non-secure OS? ...should prevent the OS from mapping the memory. Stuart ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v10, 11/14] buildman: Add an option to show which boards caused which errors
Hi Tom, On 2 September 2014 06:36, Tom Rini tr...@ti.com wrote: On Thu, Aug 28, 2014 at 09:43:43AM -0600, Simon Glass wrote: Add a -l option to display a list of offending boards against each error/warning line. The information will be shown in brackets as below: [snip] diff --git a/tools/buildman/README b/tools/buildman/README index b8c2bd6..fbc8449 100644 --- a/tools/buildman/README +++ b/tools/buildman/README [snip] If you really want to see build results as they happen, use -v when doing a -build (and -e if you want to see errors as well). +build (-e will be enabled automatically). OK, so here is my confusion. I didn't get from the help that -s implies -v. If I do: -s -v -e -l I get a verbose summary with per-board warning/error information. If I do: -s -v -l I don't get that information. If I follow what you're saying and the help right, I should do: $ export COMMON=-b master -c 1 -T 1 -j 24 -o /tmp/trini/eldk521 -G ~/.buildman.eldk521 $ ./tools/buildman/buildman $COMMON 'arm|powerpc' $ ./tools/buildman/buildman $COMMON 'arm|powerpc' -s And that should give me errors as well as which boards gave which? I don't think that's quite right. There are two completely separate modes for buildman: building (no -s) not building (-s) I added the -v feature to let you see build results while building. So -v only applies to the 'building' mode, and implies -e. For the 'not building' mode, you get a basic summary for free, and can tell buildman all sorts of things you want to see - like errors (-e) sizes (-S) function bloat (-B) and list of broken boards (-l) Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] tools-only build broken
Hi Ian, On 2 September 2014 03:22, Ian Campbell i...@hellion.org.uk wrote: On Sun, 2014-08-31 at 21:54 -0700, Simon Glass wrote: Hi, On 30 August 2014 19:44, Ian Campbell i...@hellion.org.uk wrote: On Sat, 2014-08-30 at 13:40 +0400, Matwey V. Kornilov wrote: 30.08.2014 04:04, Ian Campbell пишет: In the meantime touch include/config/auto.conf lets it build (hardly ideal though!) Hi, I do make defconfig make silentoldconfig make tools-only Thanks. I feared that would be baking some sort of non-default defconfig (IYSWIM) stuff into the tools build. Perhaps that worry is unfounded though. That works, You mean that make defconfig is (now) the recommended way to get tools-only to build? I mean that it builds sandbox, which is the best thing to build. and builds with sandbox_defconfig so that you get full functionality (verified boot). Not sure what you mean here. Verified in what way? What is booting that way, this should only build tools, not something which can boot. We are using tools-only as part of the Debian packaging, what we are trying to build is a usable generic version of mkimage (and potentially other tools in the future) which can be placed in a generic u-boot-tools package which is separate from the u-boot package(s) which contain(s) u-boot binaries. mkimage has additional support for verified/secure boot, but only if enabled at build time. It is enabled for sandbox. So if you want full functionality you should use that build. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 04/25] dm: spi: Move cmd device code into its own function
Hi Jagan, On 25 August 2014 12:31, Jagan Teki jagannadh.t...@gmail.com wrote: On 15 July 2014 06:26, Simon Glass s...@chromium.org wrote: In preparation for changing the error handling in this code for driver model, move it into its own function. Signed-off-by: Simon Glass s...@chromium.org --- common/cmd_spi.c | 53 - 1 file changed, 32 insertions(+), 21 deletions(-) Reviewed-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com Thanks. I'd quite like to pull these reviewed patches through the -dm tree as it is easier for me to keep things consistent. Is that OK with you? Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 14/40] i2c: tegra: Implement i2c_get_bus_num_fdt()
On 26 August 2014 09:34, Thierry Reding thierry.red...@gmail.com wrote: From: Thierry Reding tred...@nvidia.com This is useful to retrieve the U-Boot bus number of an I2C controller given a device tree node. Signed-off-by: Thierry Reding tred...@nvidia.com Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-arc/master
On Tue, Aug 26, 2014 at 03:15:33PM +, Alexey Brodkin wrote: Hi Tom, The following changes since commit 7bee1c91a94db19bd26f92cc67be35d3592c6429: Merge branch 'ag...@denx.de' of git://git.denx.de/u-boot-staging (2014-08-25 08:34:39 -0400) are available in the git repository at: git://git.denx.de/u-boot-arc.git master for you to fetch changes up to 2fea4f5addb40d7551ed754175acbec7f2750005: axs101: Fix type mismatch warning (2014-08-26 18:54:02 +0400) Vasili Galka (2): arc: Fix printf size_t format related warnings (again...) axs101: Fix type mismatch warning arch/arc/include/asm/posix_types.h | 4 board/synopsys/axs101/nand.c | 6 -- 2 files changed, 8 insertions(+), 2 deletions(-) Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PULL] u-boot-usb/master
On Tue, Sep 02, 2014 at 02:34:17PM +0200, Marek Vasut wrote: The following changes since commit a1263632bb05f0a21620bad0661235fcbbe79dca: mx6: tqma6: get board support back to Kconfig build system (2014-08-31 12:01:04 -0400) are available in the git repository at: git://git.denx.de/u-boot-usb.git HEAD for you to fetch changes up to 06fa91cd671eae291b05e2138d291c56ddd394df: USB: gadget: s3c: get rid of debug compile warning (2014-09-02 14:32:15 +0200) Bo Shen (2): USB: gadget: atmel: get rid of debug compile warning USB: gadget: s3c: get rid of debug compile warning Stephen Warren (1): usb: ci_udc: implement dfu_usb_get_reset Łukasz Majewski (2): dfu: Provide means to find difference between dfu-util -e and -R udc: dfu: s3c_udc: Provide function to check if USB reset was asserted common/cmd_dfu.c | 23 +++ drivers/dfu/dfu.c | 31 ++- drivers/usb/gadget/atmel_usba_udc.c | 12 ++-- drivers/usb/gadget/ci_udc.c | 7 +++ drivers/usb/gadget/f_dfu.c| 2 +- drivers/usb/gadget/s3c_udc_otg.c | 15 ++- drivers/usb/gadget/s3c_udc_otg_xfer_dma.c | 6 +++--- include/dfu.h | 5 - 8 files changed, 76 insertions(+), 25 deletions(-) Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [ANN] U-Boot v2014.10-rc2 released
Hey all, I've pushed v2014.10-rc2 out to the repository and tarballs should exist soon, really this time. One of the big changes is we're back to not needing Python to be installed for at least regular building, just make and friends, like it was before. I feel this is important so if there's a use case we've missed where that doesn't work, please speak up. And related, we're seriously talking about replacing MAKEALL (bash based) with buildman (python2 based). If you've got a use case that's not covered today, or with the various series of patches Simon has in patchwork, please speak up. We won't drop MAKEALL in v2014.10 but it's possible for v2015.01. As always, if anything is broken please speak up. Thanks all! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] tools-only build broken
On Tue, Sep 2, 2014 at 4:19 PM, Simon Glass s...@chromium.org wrote: ... We are using tools-only as part of the Debian packaging, what we are trying to build is a usable generic version of mkimage (and potentially other tools in the future) which can be placed in a generic u-boot-tools package which is separate from the u-boot package(s) which contain(s) u-boot binaries. mkimage has additional support for verified/secure boot, but only if enabled at build time. It is enabled for sandbox. So if you want full functionality you should use that build. However there are exceptions for it. For example MX28 has special mxsimage support when it is in use. -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 0/3] add support for new arch stv0991
This patchset add support for new arch stv0991. Changes in v3: - removed period from commit messages Changes in v2: - corrected files license to GPL-2.0+ - replaced printf() usage with puts() for string print - sorted sourcing of board Kconfig Vikas Manocha (3): stv0991: Add basic stv0991 architecture support stv0991: enable ethernet support stv0991: default + misc command configs enabled arch/arm/Kconfig |4 + arch/arm/cpu/armv7/stv0991/Makefile|9 ++ arch/arm/cpu/armv7/stv0991/clock.c | 41 +++ arch/arm/cpu/armv7/stv0991/lowlevel.S | 12 ++ arch/arm/cpu/armv7/stv0991/pinmux.c| 62 +++ arch/arm/cpu/armv7/stv0991/reset.c | 26 + arch/arm/cpu/armv7/stv0991/timer.c | 114 +++ arch/arm/include/asm/arch-stv0991/gpio.h | 22 arch/arm/include/asm/arch-stv0991/hardware.h | 73 arch/arm/include/asm/arch-stv0991/stv0991_cgu.h| 116 arch/arm/include/asm/arch-stv0991/stv0991_creg.h | 95 arch/arm/include/asm/arch-stv0991/stv0991_defs.h | 16 +++ arch/arm/include/asm/arch-stv0991/stv0991_gpt.h| 43 arch/arm/include/asm/arch-stv0991/stv0991_periph.h | 44 arch/arm/include/asm/arch-stv0991/stv0991_wdru.h | 28 + board/st/stv0991/Kconfig | 23 board/st/stv0991/Makefile |8 ++ board/st/stv0991/stv0991.c | 91 +++ configs/stv0991_defconfig |3 + include/configs/stv0991.h | 88 +++ 20 files changed, 918 insertions(+) create mode 100644 arch/arm/cpu/armv7/stv0991/Makefile create mode 100644 arch/arm/cpu/armv7/stv0991/clock.c create mode 100644 arch/arm/cpu/armv7/stv0991/lowlevel.S create mode 100644 arch/arm/cpu/armv7/stv0991/pinmux.c create mode 100644 arch/arm/cpu/armv7/stv0991/reset.c create mode 100644 arch/arm/cpu/armv7/stv0991/timer.c create mode 100644 arch/arm/include/asm/arch-stv0991/gpio.h create mode 100644 arch/arm/include/asm/arch-stv0991/hardware.h create mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_cgu.h create mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_creg.h create mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_defs.h create mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_gpt.h create mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_periph.h create mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_wdru.h create mode 100644 board/st/stv0991/Kconfig create mode 100644 board/st/stv0991/Makefile create mode 100644 board/st/stv0991/stv0991.c create mode 100644 configs/stv0991_defconfig create mode 100644 include/configs/stv0991.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/3] stv0991: Add basic stv0991 architecture support
stv0991 architecture support added. It contains the support for
following blocks
- Timer
- uart
Signed-off-by: Vikas Manocha vikas.mano...@st.com
---
Changes in v3:
- removed period from commit message
Changes in v2:
- corrected files license to GPL-2.0+
- replaced printf() usage with puts() for string print
- sorted sourcing of board Kconfig
arch/arm/Kconfig |4 +
arch/arm/cpu/armv7/stv0991/Makefile|9 ++
arch/arm/cpu/armv7/stv0991/clock.c | 27 +
arch/arm/cpu/armv7/stv0991/lowlevel.S | 12 +++
arch/arm/cpu/armv7/stv0991/pinmux.c| 48 +
arch/arm/cpu/armv7/stv0991/reset.c | 26 +
arch/arm/cpu/armv7/stv0991/timer.c | 114
arch/arm/include/asm/arch-stv0991/hardware.h | 73 +
arch/arm/include/asm/arch-stv0991/stv0991_cgu.h| 80 ++
arch/arm/include/asm/arch-stv0991/stv0991_creg.h | 82 ++
arch/arm/include/asm/arch-stv0991/stv0991_defs.h | 16 +++
arch/arm/include/asm/arch-stv0991/stv0991_gpt.h| 43
arch/arm/include/asm/arch-stv0991/stv0991_periph.h | 43
arch/arm/include/asm/arch-stv0991/stv0991_wdru.h | 28 +
board/st/stv0991/Kconfig | 23
board/st/stv0991/Makefile |8 ++
board/st/stv0991/stv0991.c | 54 ++
configs/stv0991_defconfig |3 +
include/configs/stv0991.h | 58 ++
19 files changed, 751 insertions(+)
create mode 100644 arch/arm/cpu/armv7/stv0991/Makefile
create mode 100644 arch/arm/cpu/armv7/stv0991/clock.c
create mode 100644 arch/arm/cpu/armv7/stv0991/lowlevel.S
create mode 100644 arch/arm/cpu/armv7/stv0991/pinmux.c
create mode 100644 arch/arm/cpu/armv7/stv0991/reset.c
create mode 100644 arch/arm/cpu/armv7/stv0991/timer.c
create mode 100644 arch/arm/include/asm/arch-stv0991/hardware.h
create mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_cgu.h
create mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_creg.h
create mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_defs.h
create mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_gpt.h
create mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_periph.h
create mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_wdru.h
create mode 100644 board/st/stv0991/Kconfig
create mode 100644 board/st/stv0991/Makefile
create mode 100644 board/st/stv0991/stv0991.c
create mode 100644 configs/stv0991_defconfig
create mode 100644 include/configs/stv0991.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e385eda..81656c3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -305,6 +305,9 @@ config TARGET_SPEAR310
config TARGET_SPEAR320
bool Support spear320
+config TARGET_STV0991
+ bool Support stv0991
+
config TARGET_SPEAR600
bool Support spear600
@@ -963,6 +966,7 @@ source board/spear/x600/Kconfig
source board/st-ericsson/snowball/Kconfig
source board/st-ericsson/u8500/Kconfig
source board/st/nhk8815/Kconfig
+source board/st/stv0991/Kconfig
source board/sunxi/Kconfig
source board/syteco/jadecpu/Kconfig
source board/syteco/zmx25/Kconfig
diff --git a/arch/arm/cpu/armv7/stv0991/Makefile
b/arch/arm/cpu/armv7/stv0991/Makefile
new file mode 100644
index 000..95641d3
--- /dev/null
+++ b/arch/arm/cpu/armv7/stv0991/Makefile
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2014
+# Vikas Manocha, ST Microelectronics, vikas.manocha@stcom
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := timer.o clock.o pinmux.o reset.o
+obj-y += lowlevel.o
diff --git a/arch/arm/cpu/armv7/stv0991/clock.c
b/arch/arm/cpu/armv7/stv0991/clock.c
new file mode 100644
index 000..aca6aba
--- /dev/null
+++ b/arch/arm/cpu/armv7/stv0991/clock.c
@@ -0,0 +1,27 @@
+/*
+ * (C) Copyright 2014
+ * Vikas Manocha, ST Micoelectronics, vikas.mano...@st.com.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include asm/io.h
+#include asm/arch/hardware.h
+#include asm/arch/stv0991_cgu.h
+#includeasm/arch/stv0991_periph.h
+
+static struct stv0991_cgu_regs *const stv0991_cgu_regs = \
+ (struct stv0991_cgu_regs *) (CGU_BASE_ADDR);
+
+void clock_setup(int peripheral)
+{
+ switch (peripheral) {
+ case UART_CLOCK_CFG:
+ writel(UART_CLK_CFG, stv0991_cgu_regs-uart_freq);
+ break;
+ case ETH_CLOCK_CFG:
+ break;
+ default:
+ break;
+ }
+}
diff --git a/arch/arm/cpu/armv7/stv0991/lowlevel.S
b/arch/arm/cpu/armv7/stv0991/lowlevel.S
new file mode 100644
index 000..6dafba3
--- /dev/null
+++ b/arch/arm/cpu/armv7/stv0991/lowlevel.S
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2014 stmicroelectronics
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include config.h
+#include linux/linkage.h
+
[U-Boot] [PATCH v3 2/3] stv0991: enable ethernet support
Signed-off-by: Vikas Manocha vikas.mano...@st.com
---
Changes in v3:
- removed period from commit message
Changes in v2: None
arch/arm/cpu/armv7/stv0991/clock.c | 14
arch/arm/cpu/armv7/stv0991/pinmux.c| 14
arch/arm/include/asm/arch-stv0991/gpio.h | 22
arch/arm/include/asm/arch-stv0991/stv0991_cgu.h| 36 +++
arch/arm/include/asm/arch-stv0991/stv0991_creg.h | 13 +++
arch/arm/include/asm/arch-stv0991/stv0991_periph.h |1 +
board/st/stv0991/stv0991.c | 37
include/configs/stv0991.h | 15 +++-
8 files changed, 151 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/include/asm/arch-stv0991/gpio.h
diff --git a/arch/arm/cpu/armv7/stv0991/clock.c
b/arch/arm/cpu/armv7/stv0991/clock.c
index aca6aba..70b8a8d 100644
--- a/arch/arm/cpu/armv7/stv0991/clock.c
+++ b/arch/arm/cpu/armv7/stv0991/clock.c
@@ -13,6 +13,13 @@
static struct stv0991_cgu_regs *const stv0991_cgu_regs = \
(struct stv0991_cgu_regs *) (CGU_BASE_ADDR);
+void enable_pll1(void)
+{
+ /* pll1 already configured for 1000Mhz, just need to enable it */
+ writel(readl(stv0991_cgu_regs-pll1_ctrl) ~(0x01),
+ stv0991_cgu_regs-pll1_ctrl);
+}
+
void clock_setup(int peripheral)
{
switch (peripheral) {
@@ -20,6 +27,13 @@ void clock_setup(int peripheral)
writel(UART_CLK_CFG, stv0991_cgu_regs-uart_freq);
break;
case ETH_CLOCK_CFG:
+ enable_pll1();
+ writel(ETH_CLK_CFG, stv0991_cgu_regs-eth_freq);
+
+ /* Clock selection for ethernet tx_clk rx_clk*/
+ writel((readl(stv0991_cgu_regs-eth_ctrl) ETH_CLK_MASK)
+ | ETH_CLK_CTRL, stv0991_cgu_regs-eth_ctrl);
+
break;
default:
break;
diff --git a/arch/arm/cpu/armv7/stv0991/pinmux.c
b/arch/arm/cpu/armv7/stv0991/pinmux.c
index 6d4414a..1d086a2 100644
--- a/arch/arm/cpu/armv7/stv0991/pinmux.c
+++ b/arch/arm/cpu/armv7/stv0991/pinmux.c
@@ -41,6 +41,20 @@ int stv0991_pinmux_config(int peripheral)
CFG_GPIOB_16_UART_TX,
stv0991_creg-mux7);
break;
+ case ETH_GPIOB_10_31_C_0_4:
+ writel(readl(stv0991_creg-mux6) 0x00FF,
+ stv0991_creg-mux6);
+ writel(0x, stv0991_creg-mux7);
+ writel(0x, stv0991_creg-mux8);
+ writel(readl(stv0991_creg-mux9) 0xFFF0,
+ stv0991_creg-mux9);
+ /* Ethernet Voltage configuration to 1.8V*/
+ writel((readl(stv0991_creg-vdd_pad1) VDD_ETH_PS_MASK) |
+ ETH_VDD_CFG, stv0991_creg-vdd_pad1);
+ writel((readl(stv0991_creg-vdd_pad1) VDD_ETH_PS_MASK) |
+ ETH_M_VDD_CFG, stv0991_creg-vdd_pad1);
+
+ break;
default:
break;
}
diff --git a/arch/arm/include/asm/arch-stv0991/gpio.h
b/arch/arm/include/asm/arch-stv0991/gpio.h
new file mode 100644
index 000..9131ded
--- /dev/null
+++ b/arch/arm/include/asm/arch-stv0991/gpio.h
@@ -0,0 +1,22 @@
+/*
+ * (C) Copyright 2014
+ * Vikas Manocha, ST Micoelectronics, vikas.mano...@st.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_STV0991_GPIO_H
+#define __ASM_ARCH_STV0991_GPIO_H
+
+enum gpio_direction {
+ GPIO_DIRECTION_IN,
+ GPIO_DIRECTION_OUT,
+};
+
+struct gpio_regs {
+ u32 data; /* offset 0x0 */
+ u32 reserved[0xff]; /* 0x4--0x3fc */
+ u32 dir;/* offset 0x400 */
+};
+
+#endif /* __ASM_ARCH_STV0991_GPIO_H */
diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h
b/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h
index 4926395..ddcbb57 100644
--- a/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h
+++ b/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h
@@ -77,4 +77,40 @@ struct stv0991_cgu_regs {
#define UART_CLK_CFG (4 DIV_SHIFT_UART \
| 1 MDIV_SHIFT_UART | CLK_UART_MCLK)
+/* CGU Ethernet clock config */
+#define CLK_ETH_MCLK 0
+#define CLK_ETH_PLL1 1
+#define CLK_ETH_PLL2 2
+
+#define MDIV_SHIFT_ETH 3
+#define DIV_SHIFT_ETH 6
+#define DIV_ETH_1259
+#define DIV_ETH_50 12
+#define DIV_ETH_P2P15
+
+#define ETH_CLK_CFG(4 DIV_ETH_P2P | 4 DIV_ETH_50 \
+ | 1 DIV_ETH_125 \
+ | 0 DIV_SHIFT_ETH \
+ | 3 MDIV_SHIFT_ETH | CLK_ETH_PLL1)
+ /* CGU
[U-Boot] [PATCH v3 3/3] stv0991: default + misc command configs enabled
Signed-off-by: Vikas Manocha vikas.mano...@st.com --- Changes in v3: - removed period from commit message Changes in v2: None include/configs/stv0991.h | 21 +++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index a7181b1..d6ff243 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -8,7 +8,6 @@ #ifndef __CONFIG_STV0991_H #define __CONFIG_STV0991_H #define CONFIG_SYS_DCACHE_OFF -#define CONFIG_SYS_ICACHE_OFF #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH #define CONFIG_BOARD_EARLY_INIT_F @@ -40,7 +39,7 @@ /* user interface */ #define CONFIG_SYS_PROMPT STV0991 -#define CONFIG_SYS_CBSIZE 256/* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ +sizeof(CONFIG_SYS_PROMPT) + 16) @@ -68,4 +67,22 @@ #define CONFIG_CMD_PING #define CONFIG_PHY_RESET_DELAY 1 /* in usec */ +#include config_cmd_default.h +#undef CONFIG_CMD_SAVEENV + +#define CONFIG_SYS_MEMTEST_START 0x +#define CONFIG_SYS_MEMTEST_END 1024*1024 +#define CONFIG_CMD_MEMTEST + +/* Misc configuration */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING + +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTCOMMAND go 0x4004 +#define CONFIG_AUTOBOOT_KEYED +#define CONFIG_AUTOBOOT_STOP_STR +#define CONFIG_AUTOBOOT_PROMPT \ + Hit SPACE in %d seconds to stop autoboot.\n, bootdelay + #endif /* __CONFIG_H */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 3/3] tools/genboardscfg.py: improve performance more with Kconfiglib
On 1 September 2014 04:57, Masahiro Yamada yamad...@jp.panasonic.com wrote: The idea of using Kconfiglib was given by Tom Rini. It allows us to scan lots of defconfigs very quickly. This commit also uses multiprocessing for further acceleration. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Suggested-by: Tom Rini tr...@ti.com --- Changes in v2: - Do not install Kconfiglib - Comments fixes, cleanups based on Simon's review. Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] tools-only build broken
Hi Otavio, On 2 September 2014 15:44, Otavio Salvador ota...@ossystems.com.br wrote: On Tue, Sep 2, 2014 at 4:19 PM, Simon Glass s...@chromium.org wrote: ... We are using tools-only as part of the Debian packaging, what we are trying to build is a usable generic version of mkimage (and potentially other tools in the future) which can be placed in a generic u-boot-tools package which is separate from the u-boot package(s) which contain(s) u-boot binaries. mkimage has additional support for verified/secure boot, but only if enabled at build time. It is enabled for sandbox. So if you want full functionality you should use that build. However there are exceptions for it. For example MX28 has special mxsimage support when it is in use. Yes, I see the '#ifdef CONFIG_MXS' at the top of tools/mksimage.c. That seem wrong to me - do you know the reason for it? Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/2] fix issue with mmc partition management
This series aims at addressing an issue discovered with SPL mode when the MMC device being used lacks an environment partition. http://www.mail-archive.com/meta-ti@yoctoproject.org/msg04320.html includes details on the original failure with this diagnosis: This is a bug in handling mmc_switch_part: what's happening is that the code reconfigures the mmc device to look at the partition on which the environment is to be found, but fails to restore it to reflect the state of the whole device. I.e., the mmc capacity and lba are zero in my case (I have no partition 2 on the uSD card), but mmc_switch_part() returns -ENODEV on the attempt to switch back in fini_mmc_for_env() without also resetting the capacity to what the rest of the system expects. The first fixes a mistaken assumption about how mmc_switch_part() behaves. (Personally, I think mmc_switch_part() should have recorded the new partition in the device structure, but that's an behavioral change that I'm not going to introduce.) The second fixes the underlying problem, which was the failure to restore the capacity configuration to the whole device after interacting with the environment. FWIW: The second patch is relevant to 2014.07; the first is not. Peter A. Bigot (2): env_mmc: remove condition on call to mmc_switch_part mmc: restore capacity when switching to partition 0 common/env_mmc.c | 11 --- drivers/mmc/mmc.c | 11 --- 2 files changed, 12 insertions(+), 10 deletions(-) -- 1.8.5.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] mmc: restore capacity when switching to partition 0
The capacity and lba for an MMC device with part_num 0 reflects the whole device. When mmc_switch_part() successfully switches to a partition, the capacity is changed to that partition. As partition 0 does not physically exist, attempts to switch back to the whole device will indicate an error, but the capacity setting for the whole device must still be restored to match the partition. Signed-off-by: Peter A. Bigot p...@pabigot.com --- drivers/mmc/mmc.c | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index a26f3ce..fa04a3f 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -594,10 +594,15 @@ int mmc_switch_part(int dev_num, unsigned int part_num) ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, (mmc-part_config ~PART_ACCESS_MASK) | (part_num PART_ACCESS_MASK)); - if (ret) - return ret; - return mmc_set_capacity(mmc, part_num); + /* +* Set the capacity if the switch succeeded or was intended +* to return to representing the raw device. +*/ + if ((ret == 0) || ((ret == -ENODEV) (part_num == 0))) + ret = mmc_set_capacity(mmc, part_num); + + return ret; } int mmc_getcd(struct mmc *mmc) -- 1.8.5.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] env_mmc: remove condition on call to mmc_switch_part
Though it might be expected to do so, mmc_switch_part() does not change
the part_num field of the device on which the partition has been
changed. As such, checking to see whether the partition is already the
target partition will fail to correctly restore the original
configuration in cases like env_mmc which rely on this behavior to
avoid having to preserve the pre-switch partition number outside the
device structure.
Signed-off-by: Peter A. Bigot p...@pabigot.com
---
common/env_mmc.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/common/env_mmc.c b/common/env_mmc.c
index a7621a8..9556296 100644
--- a/common/env_mmc.c
+++ b/common/env_mmc.c
@@ -78,11 +78,9 @@ static int mmc_set_env_part(struct mmc *mmc)
dev = 0;
#endif
- if (part != mmc-part_num) {
- ret = mmc_switch_part(dev, part);
- if (ret)
- puts(MMC partition switch failed\n);
- }
+ ret = mmc_switch_part(dev, part);
+ if (ret)
+ puts(MMC partition switch failed\n);
return ret;
}
@@ -113,8 +111,7 @@ static void fini_mmc_for_env(struct mmc *mmc)
#ifdef CONFIG_SPL_BUILD
dev = 0;
#endif
- if (CONFIG_SYS_MMC_ENV_PART != mmc-part_num)
- mmc_switch_part(dev, mmc-part_num);
+ mmc_switch_part(dev, mmc-part_num);
#endif
}
--
1.8.5.5
___
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Re: [U-Boot] [PATCH v2 1/4] add code to handle Android sparse image format
On 14-08-29 04:13 PM, Steve Rae wrote: On 14-08-29 01:54 PM, Marek Vasut wrote: On Friday, August 29, 2014 at 07:38:39 PM, Steve Rae wrote: On 14-08-29 08:11 AM, Tom Rini wrote: On Thu, Aug 28, 2014 at 02:52:40PM -0700, Steve Rae wrote: On 14-08-28 02:31 PM, Steve Rae wrote: On 14-08-28 02:16 PM, Tom Rini wrote: On Thu, Aug 28, 2014 at 10:53:51AM -0700, Steve Rae wrote: Add original file (pristine) from : https://www.codeaurora.org/cgit/quic/la/kernel/lk/plain/app/aboot/abo ot.c?h=master [3b5092d20bd15a7a2879c13e9f64acc48d04af2d] Signed-off-by: Steve Rae s...@broadcom.com OK, let us back the truck up, so to speak. This particular version of the file has an odd license. Looking at https://android.googlesource.com/kernel/lk/+/master/app/aboot/aboot.c [54963a727d3e4ed1e945c7ec012b5cc5de168ac5] and it has the normal BSD-3-Clause text. Lets grab and adapt that so we can drop the license issue. OK -- v3 coming soon! OOPS! -- this aboot.c does not contain the support for the sparse image format -- I cannot use this file! Can you poke around more for a version of aboot.c that has sparse image support and comes more directly from google.com and thus hopefully someone caught the rather strange license text changes? I have previously spent hours looking for: (1) sparse_format.h -- which we now have (thanks to Colin Cross) (2) any implementation of the while() loop which parses this sparse format This implementation, in aboot.c (also recommended by Colin Cross), is also available from Code Aurora -- but it has the same wording as the Linux Foundation file; I have not found it anywhere else. I cannot spend any more time on this license issue Please keep me informed of the outcome! ... and, this is how it ends. Again, legal crap proved to be a death sentence for a patch and carried with it an excessive amount of wasted effort. Best regards, Marek Vasut I certainly hope not 100% dead If U-Boot would accept (the currently one-off) BSD-3L-Clause, then this could live! Thanks, Steve Any progress on the license wording? (1) create BSD-3L-Clause or (2) leave the original text in place, and add the following: * NOTE: * Although it is very similar, this license text is not identical * to the BSD-3-Clause, therefore, DO NOT MODIFY THIS LICENSE TEXT! or (3) ??? Please let me know! Thanks, Steve ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/4] add code to handle Android sparse image format
On Tue, Sep 02, 2014 at 05:03:53PM -0700, Steve Rae wrote: On 14-08-29 04:13 PM, Steve Rae wrote: On 14-08-29 01:54 PM, Marek Vasut wrote: On Friday, August 29, 2014 at 07:38:39 PM, Steve Rae wrote: On 14-08-29 08:11 AM, Tom Rini wrote: On Thu, Aug 28, 2014 at 02:52:40PM -0700, Steve Rae wrote: On 14-08-28 02:31 PM, Steve Rae wrote: On 14-08-28 02:16 PM, Tom Rini wrote: On Thu, Aug 28, 2014 at 10:53:51AM -0700, Steve Rae wrote: Add original file (pristine) from : https://www.codeaurora.org/cgit/quic/la/kernel/lk/plain/app/aboot/abo ot.c?h=master [3b5092d20bd15a7a2879c13e9f64acc48d04af2d] Signed-off-by: Steve Rae s...@broadcom.com OK, let us back the truck up, so to speak. This particular version of the file has an odd license. Looking at https://android.googlesource.com/kernel/lk/+/master/app/aboot/aboot.c [54963a727d3e4ed1e945c7ec012b5cc5de168ac5] and it has the normal BSD-3-Clause text. Lets grab and adapt that so we can drop the license issue. OK -- v3 coming soon! OOPS! -- this aboot.c does not contain the support for the sparse image format -- I cannot use this file! Can you poke around more for a version of aboot.c that has sparse image support and comes more directly from google.com and thus hopefully someone caught the rather strange license text changes? I have previously spent hours looking for: (1) sparse_format.h -- which we now have (thanks to Colin Cross) (2) any implementation of the while() loop which parses this sparse format This implementation, in aboot.c (also recommended by Colin Cross), is also available from Code Aurora -- but it has the same wording as the Linux Foundation file; I have not found it anywhere else. I cannot spend any more time on this license issue Please keep me informed of the outcome! ... and, this is how it ends. Again, legal crap proved to be a death sentence for a patch and carried with it an excessive amount of wasted effort. Best regards, Marek Vasut I certainly hope not 100% dead If U-Boot would accept (the currently one-off) BSD-3L-Clause, then this could live! Thanks, Steve Any progress on the license wording? (1) create BSD-3L-Clause or (2) leave the original text in place, and add the following: * NOTE: * Although it is very similar, this license text is not identical * to the BSD-3-Clause, therefore, DO NOT MODIFY THIS LICENSE TEXT! #2 please, thanks. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] SPL broken on i.mx31 platforms
Hi Helmut, all, On Tue, Aug 19, 2014 at 10:55 PM, Benoît Thébaudeau benoit.thebaudeau@gmail.com wrote: On Fri, Aug 15, 2014 at 7:45 PM, Magnus Lilja lilja.mag...@gmail.com wrote: On 13 August 2014 14:01, Helmut Raiger helmut.rai...@hale.at wrote: On 08/05/2014 02:32 PM, Magnus Lilja wrote: I would expect Helmut to create a formal patch then I can test that and add a Tested-by. The problem is it does not work with only the 'b reset' change on my platform. Should I provide a patch with the nops and the question marks around them? It still could be a toolchain difference, mine is pretty old: $ arm-angstrom-linux-gnueabi-gcc --version arm-angstrom-linux-gnueabi-gcc (GCC) 4.7.2 Copyright (C) 2012 Free Software Foundation, Inc. When I objdump the elf file I can see the very same code in cpu_init_crit() as in start.S, whatever that might mean (objdump is from the same toolchain). I use an even older gcc so I don't think that's the problem. I use: arm-none-linux-gnueabi-gcc (Sourcery CodeBench Lite 2011.09-70) 4.6.1 Not sure how you should proceed with the path. IMHO, the 'b reset' and the 'nop nop nop' are two different issues, so Helmut should create a formal patch for the 'b reset' issue right now, which will fix mx31pdk (and maybe other boards) for the release. Then, once the 'nop nop nop' issue has been resolved for TT-01 (cache issue or something else), another formal patch should be created for this issue, unless it is purely out of tree. v2014.10 is getting closer with the release of -rc2. It would be much better to get mx31pdk fixed for this release. Helmut, can you send a patch for the 'b reset' issue? If not, do you agree that someone else (maybe the board maintainer: Magnus?) sends it with a 'Reported-by: Helmut Raiger helmut.rai...@hale.at'? Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] SPL broken on i.mx31 platforms
On Wed, Sep 03, 2014 at 02:53:17AM +0200, Benoît Thébaudeau wrote: Hi Helmut, all, On Tue, Aug 19, 2014 at 10:55 PM, Benoît Thébaudeau benoit.thebaudeau@gmail.com wrote: On Fri, Aug 15, 2014 at 7:45 PM, Magnus Lilja lilja.mag...@gmail.com wrote: On 13 August 2014 14:01, Helmut Raiger helmut.rai...@hale.at wrote: On 08/05/2014 02:32 PM, Magnus Lilja wrote: I would expect Helmut to create a formal patch then I can test that and add a Tested-by. The problem is it does not work with only the 'b reset' change on my platform. Should I provide a patch with the nops and the question marks around them? It still could be a toolchain difference, mine is pretty old: $ arm-angstrom-linux-gnueabi-gcc --version arm-angstrom-linux-gnueabi-gcc (GCC) 4.7.2 Copyright (C) 2012 Free Software Foundation, Inc. When I objdump the elf file I can see the very same code in cpu_init_crit() as in start.S, whatever that might mean (objdump is from the same toolchain). I use an even older gcc so I don't think that's the problem. I use: arm-none-linux-gnueabi-gcc (Sourcery CodeBench Lite 2011.09-70) 4.6.1 Not sure how you should proceed with the path. IMHO, the 'b reset' and the 'nop nop nop' are two different issues, so Helmut should create a formal patch for the 'b reset' issue right now, which will fix mx31pdk (and maybe other boards) for the release. Then, once the 'nop nop nop' issue has been resolved for TT-01 (cache issue or something else), another formal patch should be created for this issue, unless it is purely out of tree. v2014.10 is getting closer with the release of -rc2. It would be much better to get mx31pdk fixed for this release. Helmut, can you send a patch for the 'b reset' issue? If not, do you agree that someone else (maybe the board maintainer: Magnus?) sends it with a 'Reported-by: Helmut Raiger helmut.rai...@hale.at'? Yes, please, I'd like to see this fixed for the release proper. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] imx: Support i.MX6 High Assurance Boot authentication
When CONFIG_SECURE_BOOT is enabled, the signed images
like kernel and dtb can be authenticated using iMX6 CAAM.
The added command hab_auth_img can be used for HAB
authentication of images. The command takes the image
DDR location, IVT (Image Vector Table) offset inside
image as parameters. Detailed info about signing images
can be found in Freescale AppNote AN4581.
Signed-off-by: Nitin Garg nitin.g...@freescale.com
---
Changes in v2:
- Cleaned up clock code as per review comments
- Removed dead code as per review comments
- Re-written commit log as per review comments
arch/arm/cpu/armv7/mx6/clock.c| 32 +-
arch/arm/cpu/armv7/mx6/hab.c | 165 -
arch/arm/cpu/armv7/mx6/soc.c | 15 +++
arch/arm/include/asm/arch-mx6/clock.h |4 +
arch/arm/include/asm/arch-mx6/sys_proto.h |2 +-
5 files changed, 215 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 820b8d5..db6a8fc 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
+ * Copyright (C) 2010-2014 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier:GPL-2.0+
*/
@@ -543,6 +543,36 @@ int enable_pcie_clock(void)
BM_ANADIG_PLL_ENET_ENABLE_PCIE);
}
+#ifdef CONFIG_SECURE_BOOT
+void hab_caam_clock_enable(void)
+{
+ struct mxc_ccm_reg *const imx_ccm =
+ (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
+ /*CG4 ~ CG6, enable CAAM clocks*/
+ setbits_le32(imx_ccm-CCGR0, MXC_CCM_CCGR0_CAAM_WRAPPER_IPG_MASK |
+MXC_CCM_CCGR0_CAAM_WRAPPER_ACLK_MASK |
+MXC_CCM_CCGR0_CAAM_SECURE_MEM_MASK);
+
+ /* Enable EMI slow clk */
+ setbits_le32(imx_ccm-CCGR6, MXC_CCM_CCGR6_EMI_SLOW_MASK);
+}
+
+void hab_caam_clock_disable(void)
+{
+ struct mxc_ccm_reg *const imx_ccm =
+ (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
+ /*CG4 ~ CG6, disable CAAM clocks*/
+ clrbits_le32(imx_ccm-CCGR0, MXC_CCM_CCGR0_CAAM_WRAPPER_IPG_MASK |
+MXC_CCM_CCGR0_CAAM_WRAPPER_ACLK_MASK |
+MXC_CCM_CCGR0_CAAM_SECURE_MEM_MASK);
+
+ /* Disable EMI slow clk */
+ clrbits_le32(imx_ccm-CCGR6, MXC_CCM_CCGR6_EMI_SLOW_MASK);
+}
+#endif
+
unsigned int mxc_get_clock(enum mxc_clock clk)
{
switch (clk) {
diff --git a/arch/arm/cpu/armv7/mx6/hab.c b/arch/arm/cpu/armv7/mx6/hab.c
index f6810a6..61a94a1 100644
--- a/arch/arm/cpu/armv7/mx6/hab.c
+++ b/arch/arm/cpu/armv7/mx6/hab.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
+ * Copyright (C) 2010-2014 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier:GPL-2.0+
*/
@@ -7,8 +7,12 @@
#include common.h
#include asm/io.h
#include asm/arch/hab.h
+#include asm/arch/clock.h
#include asm/arch/sys_proto.h
+/* HAB (High Assurance Boot) debug */
+#undef DEBUG_AUTHENTICATE_IMAGE
+
/* start of HAB API updates */
#define hab_rvt_report_event_p \
@@ -71,6 +75,41 @@
((hab_rvt_exit_t *)HAB_RVT_EXIT)\
)
+#define IVT_SIZE 0x20
+#define ALIGN_SIZE 0x1000
+#define CSF_PAD_SIZE 0x2000
+
+/*
+ * ++ 0x0 (DDR_UIMAGE_START) -
+ * | Header | |
+ * ++ 0x40|
+ * || |
+ * || |
+ * || |
+ * || |
+ * | Image Data | |
+ * .| |
+ * .|Stuff to be authenticated +
+ * .| ||
+ * || ||
+ * || ||
+ * ++ ||
+ * || ||
+ * | Fill Data | ||
+ * || ||
+ * ++ Align to ALIGN_SIZE ||
+ * |IVT | ||
+ * ++ + IVT_SIZE - |
+ * || |
+ * | CSF DATA | -+
+ * ||
+ * ++
+ * ||
+ * | Fill Data |
+ * ||
+ * ++ + CSF_PAD_SIZE
+ */
+
bool is_hab_enabled(void)
{
Re: [U-Boot] [PATCH] Support i.MX6 High Assurance Boot (HAB) authentication of images
On 08/31/2014 08:09 PM, Otavio Salvador wrote: Hello Nitin, On Sun, Aug 31, 2014 at 5:16 PM, nitin.g...@freescale.com wrote: From: Nitin Garg nitin.g...@freescale.com Add hab_auth_img u-boot command which can be used for HAB authentication of images. Signed-off-by: Nitin Garg nitin.g...@freescale.com As the other patch I commented, this commit log also needs some rework to comply to the guidelines. I would also welcome a more detailed description about what this adds on top of previous HAB code. I will improve the commit log and add detailed description. ... diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index 306d699..2bbb86e 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h ... @@ -11,7 +13,7 @@ #include asm/imx-common/regs-common.h #include ../arch-imx/cpu.h -#define soc_rev() (get_cpu_rev() 0xFF) +#define soc_rev() ((int)(get_cpu_rev() 0xFF)) This seems unrelated change, isn't it? Since get_cpu_rev returns unsigned int, this was causing a mix of unsigned int and int across binary operators. e.g: if(soc_rev() = CHIP_REV_1_5) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Support i.MX6 High Assurance Boot (HAB) authentication of images
Hello Nitin, On Tue, Sep 2, 2014 at 10:36 PM, Nitin Garg nitin.g...@freescale.com wrote: On 08/31/2014 08:09 PM, Otavio Salvador wrote: diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index 306d699..2bbb86e 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h ... @@ -11,7 +13,7 @@ #include asm/imx-common/regs-common.h #include ../arch-imx/cpu.h -#define soc_rev() (get_cpu_rev() 0xFF) +#define soc_rev() ((int)(get_cpu_rev() 0xFF)) This seems unrelated change, isn't it? Since get_cpu_rev returns unsigned int, this was causing a mix of unsigned int and int across binary operators. e.g: if(soc_rev() = CHIP_REV_1_5) In this case, please split this change. Shouldn't this to be fixed in the get_cpu_rev? Cheers, -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] tools-only build broken
On Tue, Sep 2, 2014 at 8:14 PM, Simon Glass s...@chromium.org wrote: On 2 September 2014 15:44, Otavio Salvador ota...@ossystems.com.br wrote: On Tue, Sep 2, 2014 at 4:19 PM, Simon Glass s...@chromium.org wrote: ... We are using tools-only as part of the Debian packaging, what we are trying to build is a usable generic version of mkimage (and potentially other tools in the future) which can be placed in a generic u-boot-tools package which is separate from the u-boot package(s) which contain(s) u-boot binaries. mkimage has additional support for verified/secure boot, but only if enabled at build time. It is enabled for sandbox. So if you want full functionality you should use that build. However there are exceptions for it. For example MX28 has special mxsimage support when it is in use. Yes, I see the '#ifdef CONFIG_MXS' at the top of tools/mksimage.c. That seem wrong to me - do you know the reason for it? This is to avoid linking with SSL library[1]. 1. http://git.denx.de/u-boot.git/?p=u-boot.git;a=blob;f=tools/Makefile;h=90e966d893e64e0508718127766d76286c4b8c6e;hb=HEAD#l115 However now we have FIT signature I think we can enable it and drop the MXS special usage. Do you agree? -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] tools-only build broken
Hi Otvaio, On 2 September 2014 18:44, Otavio Salvador ota...@ossystems.com.br wrote: On Tue, Sep 2, 2014 at 8:14 PM, Simon Glass s...@chromium.org wrote: On 2 September 2014 15:44, Otavio Salvador ota...@ossystems.com.br wrote: On Tue, Sep 2, 2014 at 4:19 PM, Simon Glass s...@chromium.org wrote: ... We are using tools-only as part of the Debian packaging, what we are trying to build is a usable generic version of mkimage (and potentially other tools in the future) which can be placed in a generic u-boot-tools package which is separate from the u-boot package(s) which contain(s) u-boot binaries. mkimage has additional support for verified/secure boot, but only if enabled at build time. It is enabled for sandbox. So if you want full functionality you should use that build. However there are exceptions for it. For example MX28 has special mxsimage support when it is in use. Yes, I see the '#ifdef CONFIG_MXS' at the top of tools/mksimage.c. That seem wrong to me - do you know the reason for it? This is to avoid linking with SSL library[1]. 1. http://git.denx.de/u-boot.git/?p=u-boot.git;a=blob;f=tools/Makefile;h=90e966d893e64e0508718127766d76286c4b8c6e;hb=HEAD#l115 However now we have FIT signature I think we can enable it and drop the MXS special usage. Do you agree? I agree (not sure about others). For sandbox we have SSL anyway so it should be fine. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Support i.MX6 High Assurance Boot (HAB) authentication of images
On 09/02/2014 08:41 PM, Otavio Salvador wrote: Hello Nitin, On Tue, Sep 2, 2014 at 10:36 PM, Nitin Garg nitin.g...@freescale.com wrote: On 08/31/2014 08:09 PM, Otavio Salvador wrote: diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index 306d699..2bbb86e 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h ... @@ -11,7 +13,7 @@ #include asm/imx-common/regs-common.h #include ../arch-imx/cpu.h -#define soc_rev() (get_cpu_rev() 0xFF) +#define soc_rev() ((int)(get_cpu_rev() 0xFF)) This seems unrelated change, isn't it? Since get_cpu_rev returns unsigned int, this was causing a mix of unsigned int and int across binary operators. e.g: if(soc_rev() = CHIP_REV_1_5) In this case, please split this change. Shouldn't this to be fixed in the get_cpu_rev? Cheers, But get_cpu_rev is correct, it returns unsigned int. The problem happens in hab code where there are comparisons between int and unsigned int, hence I think it should not be split. Pls advice. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Support i.MX6 High Assurance Boot (HAB) authentication of images
On Tue, Sep 2, 2014 at 10:47 PM, Nitin Garg nitin.g...@freescale.com wrote: On 09/02/2014 08:41 PM, Otavio Salvador wrote: Hello Nitin, On Tue, Sep 2, 2014 at 10:36 PM, Nitin Garg nitin.g...@freescale.com wrote: On 08/31/2014 08:09 PM, Otavio Salvador wrote: diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index 306d699..2bbb86e 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h ... @@ -11,7 +13,7 @@ #include asm/imx-common/regs-common.h #include ../arch-imx/cpu.h -#define soc_rev() (get_cpu_rev() 0xFF) +#define soc_rev() ((int)(get_cpu_rev() 0xFF)) This seems unrelated change, isn't it? Since get_cpu_rev returns unsigned int, this was causing a mix of unsigned int and int across binary operators. e.g: if(soc_rev() = CHIP_REV_1_5) In this case, please split this change. Shouldn't this to be fixed in the get_cpu_rev? Cheers, But get_cpu_rev is correct, it returns unsigned int. The problem happens in hab code where there are comparisons between int and unsigned int, hence I think it should not be split. Pls advice. Well, this is not up to me however in this case wouldn't be better to fix the HAB code? -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Support i.MX6 High Assurance Boot (HAB) authentication of images
On Tue, Sep 2, 2014 at 10:47 PM, Nitin Garg nitin.g...@freescale.com wrote: But get_cpu_rev is correct, it returns unsigned int. The problem happens in hab code where there are comparisons between int and unsigned int, hence Where exactly in the hab code does the problem happen? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Support i.MX6 High Assurance Boot (HAB) authentication of images
On 09/02/2014 08:52 PM, Fabio Estevam wrote: On Tue, Sep 2, 2014 at 10:47 PM, Nitin Garg nitin.g...@freescale.com wrote: But get_cpu_rev is correct, it returns unsigned int. The problem happens in hab code where there are comparisons between int and unsigned int, hence Where exactly in the hab code does the problem happen? In the macros of HAB, like: hab_rvt_report_event_p The compiler generates bhi instead of bgt. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] nand/denali: Adding Denali NAND driver support
On Mon, 2014-09-01 at 12:54 +0900, Masahiro Yamada wrote: Hi Tom, On Sat, 30 Aug 2014 07:45:49 -0400 Tom Rini tr...@ti.com wrote: On Thu, Aug 28, 2014 at 11:13:40AM +0900, Masahiro Yamada wrote: Hi Scott, On Tue, 19 Aug 2014 04:47:40 -0500 Chin Liang See cl...@altera.com wrote: To add the Denali NAND driver support into U-Boot. This driver is leveraged from Linux. Signed-off-by: Chin Liang See cl...@altera.com Cc: Scott Wood scottw...@freescale.com Cc: Masahiro Yamada yamad...@jp.panasonic.com --- Changes for v9 - Updated the commit messageb - Removed macro kern_xx - Removed debug macro - Changed CONFIG_NAND_DENALI_64BIT to CONFIG_SYS_NAND_DENALI_64BIT Any comments? If nothing, please apply this patch. I don't see anything obviously wrong here, but since Scott has reviewed previous versions I want to give him a little more time to ack. I'm OK pulling this into master with Scott's ack or lets say Wednesday next week and we'll ask Chin Liang to address any late feedback. Thanks all! This driver cannot build since commit ff94bc40af3481d47546595ba73c136de6af6929 (mtd, ubi, ubifs: resync with Linux-3.14), I posted a question last week: http://article.gmane.org/gmane.comp.boot-loaders.u-boot/194367/match=nand_cmd_lock_tight No reply so far. The patch that broke things didn't go through me. As I noted in http://lists.denx.de/pipermail/u-boot/2014-May/180399.html I'm trying to get someone else to take over the NAND custodian role. Heiko, can you respond? It looks like your patch partially reverted commit 33b1d5cae3defdbeb30333ffac41bcbff85c5019 nand: consolidate duplicated constants. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] nand/denali: Adding Denali NAND driver support
On Sat, 2014-08-30 at 07:45 -0400, Tom Rini wrote: On Thu, Aug 28, 2014 at 11:13:40AM +0900, Masahiro Yamada wrote: Hi Scott, On Tue, 19 Aug 2014 04:47:40 -0500 Chin Liang See cl...@altera.com wrote: To add the Denali NAND driver support into U-Boot. This driver is leveraged from Linux. Signed-off-by: Chin Liang See cl...@altera.com Cc: Scott Wood scottw...@freescale.com Cc: Masahiro Yamada yamad...@jp.panasonic.com --- Changes for v9 - Updated the commit messageb - Removed macro kern_xx - Removed debug macro - Changed CONFIG_NAND_DENALI_64BIT to CONFIG_SYS_NAND_DENALI_64BIT Any comments? If nothing, please apply this patch. I don't see anything obviously wrong here, but since Scott has reviewed previous versions I want to give him a little more time to ack. I'm OK pulling this into master with Scott's ack or lets say Wednesday next week and we'll ask Chin Liang to address any late feedback. Thanks all! I still don't see a reference to the SHA of the corresponding Linux driver. #define MODE5_WORKAROUND 0 still exists even though it's never used. I still see (void *) casts in memcpy -- v8 comments said removed but not all instances were removed. It still introduces CONFIG_SYS_NAND_DENALI_64BIT without documenting it. -scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] tools-only build broken
On Tue, Sep 2, 2014 at 10:46 PM, Simon Glass s...@chromium.org wrote: On 2 September 2014 18:44, Otavio Salvador ota...@ossystems.com.br wrote: On Tue, Sep 2, 2014 at 8:14 PM, Simon Glass s...@chromium.org wrote: On 2 September 2014 15:44, Otavio Salvador ota...@ossystems.com.br wrote: On Tue, Sep 2, 2014 at 4:19 PM, Simon Glass s...@chromium.org wrote: ... We are using tools-only as part of the Debian packaging, what we are trying to build is a usable generic version of mkimage (and potentially other tools in the future) which can be placed in a generic u-boot-tools package which is separate from the u-boot package(s) which contain(s) u-boot binaries. mkimage has additional support for verified/secure boot, but only if enabled at build time. It is enabled for sandbox. So if you want full functionality you should use that build. However there are exceptions for it. For example MX28 has special mxsimage support when it is in use. Yes, I see the '#ifdef CONFIG_MXS' at the top of tools/mksimage.c. That seem wrong to me - do you know the reason for it? This is to avoid linking with SSL library[1]. 1. http://git.denx.de/u-boot.git/?p=u-boot.git;a=blob;f=tools/Makefile;h=90e966d893e64e0508718127766d76286c4b8c6e;hb=HEAD#l115 However now we have FIT signature I think we can enable it and drop the MXS special usage. Do you agree? I agree (not sure about others). For sandbox we have SSL anyway so it should be fine. I will wait Marek to comment here and if he agrees I prepare a patch for it. Marek? -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Support i.MX6 High Assurance Boot (HAB) authentication of images
On Tue, Sep 2, 2014 at 10:55 PM, Nitin Garg nitin.g...@freescale.com wrote: On 09/02/2014 08:52 PM, Fabio Estevam wrote: On Tue, Sep 2, 2014 at 10:47 PM, Nitin Garg nitin.g...@freescale.com wrote: But get_cpu_rev is correct, it returns unsigned int. The problem happens in hab code where there are comparisons between int and unsigned int, hence Where exactly in the hab code does the problem happen? In the macros of HAB, like: hab_rvt_report_event_p The compiler generates bhi instead of bgt. However looking at the code I didn't see any negative CHIP_REV: #define CHIP_REV_1_0 0x10 #define CHIP_REV_1_2 0x12 #define CHIP_REV_1_5 0x15 So I am not sure we have a failure case in the U-Boot code now. I think I am missing something though ... -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/5] iMX6DL:SABRESD: Add new DDR script
On 9/2/2014 8:13 PM, Fabio Estevam wrote: Hi Ye Li, On Tue, Sep 2, 2014 at 3:11 AM, Ye.Li b37...@freescale.com wrote: Add specified mx6dl_4x_mt41j128.cfg DDR script for iMX6DLSABRESD board. Not share from nitrogen6x. The default boot device also changes to SD card. Signed-off-by: Ye.Li b37...@freescale.com Thanks for the patch, but I have already sent this one: https://patchwork.ozlabs.org/patch/381961/ Regards, Fabio Estevam I did not notice your patch. Thanks for submit it. I will rework mine. Best regards, Ye Li ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
