This series rebases my exynos config_distro_*.h patches as requested.
Baseline is u-boot.git#master 11ada9225a16 (ahead of current
u-boot-samsung).
I also included Increase command line buffer size (CONFIG_SYS_CBSIZE)
which was previously posted separately.
Ian.
From: Ian Campbell ian.campb...@citrix.com
...and remove explicit setting of things which this implies. This is done for
all exynos platforms (4 5) so it is added to exynos-common.h
I'm mainly interested in CONFIG_CMD_BOOTZ and CONFIG_SUPPORT_RAW_INITRD
I have build tested on all exynos
From: Ian Campbell ian.campb...@citrix.com
This replaces the existing CONFIG_BOOTCOMMAND for exynos5250 and 5420.
exynos4 platforms seem to have existing complex extra env configuration for
booting and so are excluded here. Hence the bootcmd.h is added to
exynos5-common.h.
I have build tested
From: Ian Campbell ian.campb...@citrix.com
I was running into this limit with a not overly long PXE append line.
Since the PXE code wants to print the resulting command line increase
CONFIG_SYS_PBSIZE too.
Signed-off-by: Ian Campbell ian.campb...@citrix.com
---
v2: Apply to exynos generally
The CPU identification happens in x86_cpu_init_f() and corresponding
fields are saved in the global data for later use.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
Changes for v2:
- Update the patch per review comments from Simon Glass
- cpu_vendor_name() and fill_processor_name() are not
Return the saved TSC frequency in get_tbclk_mhz().
Signed-off-by: Bin Meng bmeng...@gmail.com
Acked-by: Simon Glass s...@chromium.org
Tested-by: Simon Glass s...@chromium.org
---
arch/x86/include/asm/global_data.h | 1 +
arch/x86/lib/tsc_timer.c | 4
2 files changed, 5
Using MSR_PLATFORM_INFO (0xCE) to calibrate TSR will cause #GP on
processors which do not have this MSR. Instead only doing the MSR
calibration for known/supported CPUs.
Signed-off-by: Bin Meng bmeng...@gmail.com
Acked-by: Simon Glass s...@chromium.org
Tested-by: Simon Glass s...@chromium.org
---
Use the same way that Linux does for quick TSC calibration via PIT
when calibration via MSR fails.
Signed-off-by: Bin Meng bmeng...@gmail.com
Acked-by: Simon Glass s...@chromium.org
---
arch/x86/include/asm/i8254.h | 3 +
arch/x86/lib/tsc_timer.c | 155
add a macro define inclusion to compile the function.
iMX6SL doesn't have an MMDC_P1_BASE_ADDR in the header.
It will break the build if the SPL features is enabled
for iMX6SL.
---
arch/arm/cpu/armv7/mx6/ddr.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/cpu/armv7/mx6/ddr.c
This patch is for SPL support for iMX6SL-evk. The said
patches has been tested to work on SD1, SD2 and SD3 ports of the
said board.
After applying the following patches, it will produces
SPL and u-boot.img binary images. You should run the
two commands below to store it in your SD or eMMC.
sudo
add spl on build configuration for iMX6SL
---
configs/mx6slevk_defconfig | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig
index fb8c4de..dfdf54f 100644
--- a/configs/mx6slevk_defconfig
+++ b/configs/mx6slevk_defconfig
Update the Device Configuration Data file for iMX6SL for SPL
support.
---
board/freescale/mx6slevk/imximage.cfg | 78 ++-
1 file changed, 4 insertions(+), 74 deletions(-)
diff --git a/board/freescale/mx6slevk/imximage.cfg
b/board/freescale/mx6slevk/imximage.cfg
This patch support the SPL features for iMX6SL.
It tested to boot on SD1, SD2 and SD3 mmc ports.
---
board/freescale/mx6slevk/mx6slevk.c | 168 +++-
1 file changed, 167 insertions(+), 1 deletion(-)
diff --git a/board/freescale/mx6slevk/mx6slevk.c
iMX6SL has a different address value for the following:
CONFIG_SPL_BSS_START_ADDR
CONFIG_SYS_SPL_MALLOC_START
---
include/configs/imx6_spl.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h
index 4ff37b3..61233c4 100644
---
enable SUPPORT_SPL by default for iMX6SL-evk
---
arch/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ab0d284..40a3604 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -614,6 +614,7 @@ config TARGET_MX6SABRESD
config
add the SPL macros in include header file for iMX6SL
---
include/configs/mx6slevk.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index 4fcaf51..afbb81d 100644
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
Hi John,
On 08/11/2014 22:27, John Tobias wrote:
This patch will enable the support for SPL on iMX6 SabreSD.
It tested on SD2 and SD3 mmc port.
---
board/freescale/mx6sabresd/mx6sabresd.c | 211
+++-
1 file changed, 209 insertions(+), 2 deletions(-)
diff
Hi John,
On 08/11/2014 22:27, John Tobias wrote:
This file is the default DCD configuration file for SPL
---
board/freescale/mx6sabresd/mx6sabresd_spl.cfg | 54
+++
1 file changed, 54 insertions(+)
create mode 100644 board/freescale/mx6sabresd/mx6sabresd_spl.cfg
On 08/11/2014 22:27, John Tobias wrote:
iMX6 SabreSD has different stack address compare
to the default stack address defined on the file.
The CONFIG_SYS_TEXT_BASE is defined in mx6sabre_common.h which is
same address defined on file. At the same time to avoid compilation
warnings.
---
Hi John,
On 09/11/2014 18:51, John Tobias wrote:
Update the Device Configuration Data file for iMX6SL for SPL
support.
---
board/freescale/mx6slevk/imximage.cfg | 78
++-
1 file changed, 4 insertions(+), 74 deletions(-)
diff --git
Hi,
Please drop *** from the cover letter template git-format-patch
generates. :)
Cheers,
Andreas
--
SUSE LINUX GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 21284 AG Nürnberg
___
U-Boot mailing
Thanks for the info.
Regards,
John
On Sunday, November 9, 2014, Andreas Färber afaer...@suse.de wrote:
Hi,
Please drop *** from the cover letter template git-format-patch
generates. :)
Cheers,
Andreas
--
SUSE LINUX GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer
Hi John,
On Sun, Nov 9, 2014 at 3:51 PM, John Tobias john.tobias...@gmail.com wrote:
add a macro define inclusion to compile the function.
iMX6SL doesn't have an MMDC_P1_BASE_ADDR in the header.
It will break the build if the SPL features is enabled
for iMX6SL.
---
You missed to add the
Hi Fabio,
I didn't notice that one... Thanks for the info.
Regards,
john
On Sun, Nov 9, 2014 at 3:26 PM, Fabio Estevam feste...@gmail.com wrote:
Hi John,
On Sun, Nov 9, 2014 at 3:51 PM, John Tobias john.tobias...@gmail.com wrote:
add a macro define inclusion to compile the function.
Hi Simon
From: s...@google.com s...@google.com on behalf of Simon Glass
s...@chromium.org
Sent: Friday, November 7, 2014 10:18 PM
To: Srinivasan S
Cc: Jagan Teki; U-Boot Mailing List
Subject: Re: [U-Boot] verified boot of beaglebone black
Hi,
On 4
2014-11-06 22:03 GMT+09:00 Wolfgang Denk w...@denx.de:
Fix error detected by cppcheck:
[board/renesas/ecovec/ecovec.c:66]: (error) Buffer is accessed out of
bounds.
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Nobuhiro Iwamatsu iwamatsu.nobuh...@renesas.com
---
Hi Stefano,
On Sun, Nov 9, 2014 at 1:24 PM, Stefano Babic sba...@denx.de wrote:
On 08/11/2014 22:27, John Tobias wrote:
iMX6 SabreSD has different stack address compare
to the default stack address defined on the file.
The CONFIG_SYS_TEXT_BASE is defined in mx6sabre_common.h which is
same
Thanks for the info. I'll double check it again.
Regards,
john
On Sun, Nov 9, 2014 at 1:22 PM, Stefano Babic sba...@denx.de wrote:
Hi John,
On 08/11/2014 22:27, John Tobias wrote:
This file is the default DCD configuration file for SPL
---
board/freescale/mx6sabresd/mx6sabresd_spl.cfg |
On Sat, Nov 8, 2014 at 4:22 PM, John Tobias john.tobias...@gmail.com wrote:
add the spl on build configuration of iMX6 SabreSD
---
include/configs/mx6sabresd.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index
Hi Simon,
Hi Simon,
As you suggested earlier am using u-boot-2014.07 Am using
~/ti-sdk-am335x-evm-07.00.00.00/bin/create-sdcard.sh for creating the
partitions,
After creating the partitions I tried implementing step 7. Put U-Boot and the
kernel onto the board step 8. Try it, by the
Alt board was connected Power IC to channel 1 of sh-i2c. Source code that
controls this is already included, but channel 1 of sh-i2c is not enabled.
This enables channel 1 of sh-i2c, and can use.
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
---
board/renesas/alt/alt.c | 7
The i2c_init function is no longer necessary.
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
---
board/renesas/alt/alt.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c
index 68ae937..039cb37 100644
---
PowerIC connected to channel 1 of sh-i2c, not channel 2.
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
---
board/renesas/alt/alt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c
index 083e007..68ae937
Hi Stefano,
On Sun, Nov 9, 2014 at 1:16 PM, Stefano Babic sba...@denx.de wrote:
Hi John,
On 08/11/2014 22:27, John Tobias wrote:
This patch will enable the support for SPL on iMX6 SabreSD.
It tested on SD2 and SD3 mmc port.
---
board/freescale/mx6sabresd/mx6sabresd.c | 211
'+S' is unnecessary because boards of rmobile do not use SPL.
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
CC: Masahiro Yamada yamad...@jp.panasonic.com
---
configs/alt_defconfig | 2 +-
configs/koelsch_defconfig | 2 +-
configs/lager_defconfig | 2 +-
3 files changed,
Change clock of SCIF for Alt board is used to external clock.
This changes to using external clock.
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
---
include/configs/alt.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/alt.h b/include/configs/alt.h
index
That's exactly that I am going to ask you. Because, some people in the
community doesn't need the SPL.
I think this will need a separate config files (e.g
mx6slevk_spl_defconfig, mx6qsabresd_spl_defconfig)
Regards,
john
On Sun, Nov 9, 2014 at 4:03 PM, Fabio Estevam feste...@gmail.com wrote:
On Sun, Nov 9, 2014 at 10:27 PM, John Tobias john.tobias...@gmail.com wrote:
That's exactly that I am going to ask you. Because, some people in the
community doesn't need the SPL.
I think this will need a separate config files (e.g
mx6slevk_spl_defconfig, mx6qsabresd_spl_defconfig)
Yes,
My mistake, I should use what's in the mx6q_4x_mt41j128.cfg.
Regards,
john
On Sun, Nov 9, 2014 at 1:31 PM, Stefano Babic sba...@denx.de wrote:
Hi John,
On 09/11/2014 18:51, John Tobias wrote:
Update the Device Configuration Data file for iMX6SL for SPL
support.
---
Oh okay, I'll do it again.
Regards,
John
On Sun, Nov 9, 2014 at 4:32 PM, Fabio Estevam feste...@gmail.com wrote:
On Sun, Nov 9, 2014 at 10:27 PM, John Tobias john.tobias...@gmail.com wrote:
That's exactly that I am going to ask you. Because, some people in the
community doesn't need the SPL.
Changes v4:
- Take Marek's suggestions, implement usb_phy_mode function and
introduce a weak function board_usb_phy_mode.
- change usb_phy_enable's return value with 0.
- reimplement board_usb_phy_mode in board code.
- add prototype type for board_usb_phy_mode and usb_phy_mode
Changes v3:
-
Add pinmux settings, implement board_ehci_hcd_init, board_usb_phy_mode
There are two usb port on mx6sxsabresd board:
1. otg port
2. host port
The following are the connection between usb controller and board usb
interface, host port has not ID pin set:
otg1 core --- board otg port
otg2 core ---
usb_phy_enable should return status bit, but not phy mode bit, thus
add a new function usb_phy_mode to query the PHY for it's mode and
make usb_phy_enable just return 0 but not 'phy_ctrl USBPHY_CTRL_OTG_ID'.
Include a new board weak function board_usb_phy_mode. If board code
does not reimplement
Add pinmux settings, implement board_ehci_hcd_init, board_usb_phy_mode
There are two usb port on mx6slevk board:
1. otg port
2. host port
The following are the connection between usb controller and board usb
interface, host port has not ID pin set:
otg1 core --- board otg port
otg2 core --- board
On 11/8/2014 7:33 PM, Marek Vasut wrote:
On Saturday, November 08, 2014 at 05:07:21 AM, Peng Fan wrote:
在 11/7/2014 8:17 PM, Marek Vasut 写道:
On Friday, November 07, 2014 at 12:45:51 PM, Peng Fan wrote:
在 11/7/2014 7:09 PM, Marek Vasut 写道:
On Friday, November 07, 2014 at 12:03:30 PM, Peng
This patch adds documentation for Odroid-XU3. This documentation is
based on that of Odroid (doc/README-odroid) made by Przemyslaw Marczak.
The documentation includes basic information about boot media layout,
environment, partition layout, and the instruction to burn the u-boot
image to boot
This is v6 of the patchset adding support Odroud XU3 board.
link to the previous version:
v2: https://www.mail-archive.com/u-boot@lists.denx.de/msg152275.html
v3: https://www.mail-archive.com/u-boot%40lists.denx.de/msg152677.html
v4: https://patchwork.ozlabs.org/patch/407411/
v5:
This patch fixes wrong GPIO information such as GPIO bank, table which
is used to convert GPIO name to index, bank base address, and etc.
Signed-off-by: Hyungwon Hwang human.hw...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
---
Changes for v4:
-
This patch adds support for Odroid-XU3.
Signed-off-by: Hyungwon Hwang human.hw...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
---
Changes for v3:
- Remove unnecessary node from DT file
- Remove unnecessary features from config file
- Remove
Hi Simon,
On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass s...@chromium.org wrote:
The built-in self test value should be checked before we continue booting.
Refuse to continue if there is something wrong.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/ivybridge/cpu.c | 16
Hi Simon,
On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass s...@chromium.org wrote:
Microcode updates are stored in the device tree. Work through these and
apply any that are needed.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/ivybridge/Makefile | 1 +
Hi Simon,
On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass s...@chromium.org wrote:
Add two microcode updates that are provided for this CPU. The updates
have been converted to a device tree form.
(The license needs to be converted to SPDX)
Signed-off-by: Simon Glass s...@chromium.org
---
Hi Tom,
Please pull the following patches for Blackfin from u-boot-blackfin
into your tree.
Thanks
Sonic Zhang
The following changes since commit 11ada9225a16ed2d8ddbf0715a2416245a777cbc:
Merge branch 'rmobile' of git://www.denx.de/git/u-boot-sh
(2014-11-05 13:11:18 -0500)
are available
Hi Simon,
On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass s...@chromium.org wrote:
Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in
the board directory and the SDRAM SPD information in the device tree. This
also needs the Intel Management Engine (me.bin) to work. Binary
Change clock of SCIF for Alt board is used to external clock.
This changes to using external clock.
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
---
V2: Change CONFIG_SH_SCIF_CLK_FREQ.
include/configs/alt.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
Add MAINTAINERS and doc/git-mailrc entry.
Signed-off-by: Heiko Schocher h...@denx.de
---
as discussed this step here and there first of all with Scott Wood
for example here:
http://lists.denx.de/pipermail/u-boot/2014-August/186005.html
I am now ready for taking over the ownership for MTD ...
Hello Simon,
Am 13.10.2014 07:39, schrieb Simon Glass:
The uclass implements the same operations as the current I2C framework but
makes some changes to make it fit driver model better:
- Remove the chip address from API calls
- Remove the address length from API calls
- Remove concept of
Hi Simon,
On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass s...@chromium.org wrote:
On x86 machines U-Boot needs to be added to a large ROM image which is
then flashed onto the target board. The ROM has a particular format so it
makes sense for U-Boot to build this image automatically.
On 10 November 2014 11:45, Heiko Schocher h...@denx.de wrote:
Add MAINTAINERS and doc/git-mailrc entry.
Signed-off-by: Heiko Schocher h...@denx.de
---
as discussed this step here and there first of all with Scott Wood
for example here:
Hi Simon,
On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass s...@chromium.org wrote:
Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in
the board directory and the SDRAM SPD information in the device tree. This
also needs the Intel Management Engine (me.bin) to work. Binary
Hello Simon,
Am 13.10.2014 07:39, schrieb Simon Glass:
The concept of a 'current bus' is now implemented in the command line
rather than in the uclass. Also the address length does not need to
be specified with each command - really we should consider dropping
this from most commands but it
Hello Simon,
sorry for the long delay...
Am 13.10.2014 07:39, schrieb Simon Glass:
(Note this is RFC since the uclass interface needs discussion and also
because only sandbox is implemented so far. But I thought it best to get
this out there as soon as I wrote it as it may influence the PMIC
This patch series add sama5d4ek board support which supports
following features:
- Boot media support: NAND flash/SD card/SPI flash
- Support LCD display
- Support ethernet
- Support USB mass storage
Changes in v4:
- rebase to the mainline master (11ada92)
- Select CPU_V7 in Kconfig.
The User Register in GMAC IP is used to select interface type.
When with GE feature, it is used to select interface between
RGMII and GMII. If without GE feature, it is used to select
interface between MII and RMII.
Signed-off-by: Bo Shen voice.s...@atmel.com
---
Changes in v4: None
Changes in
The code for this board supports following features:
- Boot media support: NAND flash/SD card/SPI flash
- Support LCD display
- Support ethernet
- Support USB mass storage
Signed-off-by: Bo Shen voice.s...@atmel.com
---
Changes in v4:
- rebase to the mainline master (11ada92)
-
From: Josh Wu josh...@atmel.com
As in SAMA5D4 SoC, the gf table in ROM code can not be seen.
So, when we try to use PMECC, we need to build it when do
initialization.
Add a macro NO_GALOIS_TABLE_IN_ROM in soc header file. If it
is defined we will build gf table runtime.
The PMECC use the BCH
Hello Jagan,
Am 10.11.2014 07:38, schrieb Jagan Teki:
On 10 November 2014 11:45, Heiko Schocher h...@denx.de wrote:
Add MAINTAINERS and doc/git-mailrc entry.
Signed-off-by: Heiko Schocher h...@denx.de
---
as discussed this step here and there first of all with Scott Wood
for example here:
Hello Tom,
please pull from u-boot-i2c.git
The following changes since commit 11ada9225a16ed2d8ddbf0715a2416245a777cbc:
Merge branch 'rmobile' of git://www.denx.de/git/u-boot-sh (2014-11-05
13:11:18 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-i2c.git master
The code for this board supports following features:
- Boot media support: NAND flash/SD card/SPI flash
- Support LCD display (optional, disabled by default)
- Support ethernet
- Support USB mass storage
Signed-off-by: Bo Shen voice.s...@atmel.com
---
This patch based on the patch to add
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