Re: [U-Boot] [PATCH] qemu-ppce500: Add support for 64bit CCSR map
On 03/06/2015 05:10 PM, Alexander Graf wrote: QEMU 2.3 changes the address layout of the CCSR map in the PV ppce500 machine to reside in higher address space. Unfortunately, this exposed a glitch in u-boot for ppce500: While providing a function to dynamically evaluate the CCSR region's position in physical address space, we never used it. Plus we forgot to support 64bit physical addresses. This patch fixes that mishap, making u-boot work fine with latest QEMU again. Signed-off-by: Alexander Graf ag...@suse.de --- Applied to mpc85xx master, awaiting upstream. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] MPC8541/MPC8555: Enable SS_EN in DDR_SDRAM_CLK_CNLT register
On 02/13/2015 10:57 AM, Curt Brune wrote: According to the MPC8555/MPC8541 reference manual the SS_EN (source synchronous enable) bit in the DDR_SDRAM_CLK_CNLT register must be set during initialization. From section 9.4.1.8 of that manual: Source synchronous enable. This bit field must be set during initialization. See Section 9.6.1, DDR SDRAM Initialization Sequence, details. 0 - Reserved 1 - The address and command are sent to the DDR SDRAMs source synchronously. In addition, Freescale application note AN2805 is also very clear that this bit must be set. This patch reverts a change introduced by commit 457caecdbca3df21a93abff19eab12dbc61b7897. Testing Done: Compiled targets CONFIG_TARGET_MPC8555CDS and CONFIG_TARGET_MPC8541CDS and inspected the generated assembly code to verify the SS_EN bit was being set. There is one extra instruction emitted: fff9b774: 65 29 80 00 orisr9,r9,32768 Compiled the CONFIG_TARGET_MPC8548CDS target and verified that no additional instructions were emitted related to this patch. Booted an image on a MPC8541 based board successfully. Signed-off-by: Curt Brune c...@cumulusnetworks.com --- Applied to mpc85xx master, awaiting upstream. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [patch] socfpga: move configuration options to config file
On Mon 2015-04-20 23:32:33, Marek Vasut wrote: On Monday, April 20, 2015 at 10:27:02 PM, Pavel Machek wrote: On Mon 2015-04-20 21:23:23, Marek Vasut wrote: On Monday, April 20, 2015 at 02:30:48 PM, Pavel Machek wrote: Setting configuration options in header file leads to incosistency between .config user sees, and .config he has. What is worse, a lot of compile warnings is presented for any such config option user sets in .config. Can you please elaborate on such warnings ? Lets remove CONFIG_CMD_RUN from .config, then select it: run (CMD_RUN) [N/y/?] (NEW) y Now you warning for most C files: CC arch/arm/lib/asm-offsets.s In file included from include/configs/socfpga_cyclone5.h:16:0, from include/config.h:5, from include/common.h:18, from arch/arm/lib/asm-offsets.c:15: include/config_cmd_default.h:38:0: warning: CONFIG_CMD_RUN redefined [enabled by default] #define CONFIG_CMD_RUN /* run command in env variable */ ^ In file included from ././include/linux/kconfig.h:4:0, from command-line:0: include/generated/autoconf.h:35:0: note: this is That meant CONFIG_CMD_RUN is defined by default, yes? In which case, this patch would just paper over some bug (?) instead of fixing the root cause ? The correct fix would probably be to zap those macros, which are defined by default from the socfpga_cyclone5.h file, no ? CONFIG_CMD_RUN is defined in socfpga_cyclone5.h, but it is set to N by .config. Take a look. If you set it to Y, you'll get the ugly warnings. Try that. Apply the patch. See that .config now corresponds to real configuration and warnings are gone. Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] powerpc/mpc85xx: Don't relocate exception vectors
On 04/07/2015 06:20 PM, Scott Wood wrote: Booke does not require exception vectors to be located at address zero. U-Boot was doing so anyway, simply because that's how it had been done on other PPC. The downside of this is that once the OS is loaded to address zero, the exception vectors have been overwritten -- which makes it difficult to diagnose a crash that happens after that point. The IVOR setup and trap entry code is simplified somewhat as a result. Also, there is no longer a need to align individual exceptions on 0x100 byte boundaries. Signed-off-by: Scott Wood scottw...@freescale.com --- Applied to mpc85xx master, awaiting upstream. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] powerpc/mpc85xx: Remove some dead code
On 04/07/2015 06:20 PM, Scott Wood wrote: U-Boot does not have system calls (the services it exposes to standalone commands use a different mechanism), so the syscall handler is dead code. It's also broken code, as it assumes it is located at 0xc00 -- while even before the patch to stop relocating exception vectors to 0, U-Boot had the syscall at 0x900. The critical and machine check return paths are never called -- the regular exception return path is used instead, which works because xSRR0/1 have already been saved and can be restored via the regular SRR0/1 (we don't care too much in U-Boot about taking a critical/mcheck inside another exception prolog/epilog). Also remove a few other small unused functions. Signed-off-by: Scott Wood scottw...@freescale.com --- Applied to mpc85xx master, awaiting upstream. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pull request: u-boot-net.git master
The following changes since commit 1733259d25015c28c47990ec11af99b3f62f811c: Merge branch 'master' of git://git.denx.de/u-boot-video (2015-04-20 09:13:52 -0400) are available in the git repository at: git://git.denx.de/u-boot-net.git master for you to fetch changes up to 523bb66f5a8e2cee22535e509c4e762bbc774406: net: pch_gbe: Fix pch_gbe device name (2015-04-20 17:57:13 -0500) Bin Meng (1): net: pch_gbe: Fix pch_gbe device name Codrin Ciubotariu (1): net: phy: realtek: Disable interrupt on Realtek Ethernet PHY drivers Joe Hershberger (1): Update MAINTAINERS and git-mailrc for net Luca Ellero (1): net: phy: micrel: add support for KSZ8081MNX Michal Simek (1): net: gem: Use correct type for casting Shengzhou Liu (1): net/phy: fixup for get_phy_id Thierry Reding (1): net: rtl8169: Build warning fixes for 64-bit Tim James (1): mii: add read-modify-write option to mii command MAINTAINERS | 3 ++- common/cmd_mii.c | 47 ++- doc/git-mailrc| 4 +++- drivers/net/pch_gbe.c | 2 +- drivers/net/phy/micrel.c | 11 +++ drivers/net/phy/phy.c | 2 +- drivers/net/phy/realtek.c | 18 +- drivers/net/rtl8169.c | 24 +--- drivers/net/zynq_gem.c| 3 ++- include/phy.h | 1 + 10 files changed, 89 insertions(+), 26 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] powerpc/t2080rdb: update ddr to support 1866MT/s
On 03/27/2015 12:53 AM, Shengzhou Liu wrote: Support SODIMM D3XP12081XL10AA 1866MT/s on T2080RDB. Enable CONFIG_CMD_MEMTEST as well. Signed-off-by: Shengzhou Liu shengzhou@freescale.com --- v2: refined commit description. Applied to mpc85xx master, awaiting upstream. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-mpc85xx master
Tom, The following changes since commit b8d7652c81689a69bc6eaa206cf875bbe632831c: Merge branch 'buildman' of git://git.denx.de/u-boot-x86 (2015-04-18 19:24:13 -0400) are available in the git repository at: git://git.denx.de/u-boot-mpc85xx.git master for you to fetch changes up to 221fbd229c0981feca0c6ca99fff3315197d0f86: powerpc/mpc8641hpcn: Move environment to avoid conflict (2015-04-20 10:15:30 -0700) Alexander Graf (1): qemu-ppce500: Add support for 64bit CCSR map Chunhe Lan (1): T4240RDB: Enable CONFIG_SYS_CORTINA_FW_IN_NOR config Curt Brune (1): MPC8541/MPC8555: Enable SS_EN in DDR_SDRAM_CLK_CNLT register Scott Wood (3): powerpc/mpc85xx: Don't relocate exception vectors powerpc/mpc85xx: Remove some dead code powerpc/mpc8641hpcn: Move environment to avoid conflict Shengzhou Liu (3): powerpc/t2080: enable erratum_a007186 for t2080 rev1.1 powerpc/t2080rdb: update ddr to support 1866MT/s board/t2080rdb: enable CONFIG_PHY_AQUANTIA Ying Zhang (1): board/t208xrdb: VID support arch/powerpc/cpu/mpc85xx/start.S | 316 ++--- arch/powerpc/include/asm/fsl_errata.h |2 +- board/freescale/t208xrdb/ddr.h|4 +- board/freescale/t208xrdb/t208xrdb.c |7 + drivers/ddr/fsl/ctrl_regs.c | 10 +- include/common.h |1 - include/configs/MPC8641HPCN.h |5 +- include/configs/T208xRDB.h| 18 +- include/configs/T4240RDB.h|1 + include/configs/qemu-ppce500.h|8 +- include/mpc85xx.h |4 - include/ppc_asm.tmpl | 42 + 12 files changed, 147 insertions(+), 271 deletions(-) Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [patch] socfpga: move configuration options to config file
On Monday, April 20, 2015 at 10:27:02 PM, Pavel Machek wrote: On Mon 2015-04-20 21:23:23, Marek Vasut wrote: On Monday, April 20, 2015 at 02:30:48 PM, Pavel Machek wrote: Setting configuration options in header file leads to incosistency between .config user sees, and .config he has. What is worse, a lot of compile warnings is presented for any such config option user sets in .config. Can you please elaborate on such warnings ? Lets remove CONFIG_CMD_RUN from .config, then select it: run (CMD_RUN) [N/y/?] (NEW) y Now you warning for most C files: CC arch/arm/lib/asm-offsets.s In file included from include/configs/socfpga_cyclone5.h:16:0, from include/config.h:5, from include/common.h:18, from arch/arm/lib/asm-offsets.c:15: include/config_cmd_default.h:38:0: warning: CONFIG_CMD_RUN redefined [enabled by default] #define CONFIG_CMD_RUN /* run command in env variable */ ^ In file included from ././include/linux/kconfig.h:4:0, from command-line:0: include/generated/autoconf.h:35:0: note: this is That meant CONFIG_CMD_RUN is defined by default, yes? In which case, this patch would just paper over some bug (?) instead of fixing the root cause ? The correct fix would probably be to zap those macros, which are defined by default from the socfpga_cyclone5.h file, no ? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] board/t2080rdb: enable CONFIG_PHY_AQUANTIA
On 04/07/2015 08:12 PM, Shengzhou Liu wrote: CONFIG_PHY_AQ1202 is no longer needed, use CONFIG_PHY_AQUANTIA. Signed-off-by: Shengzhou Liu shengzhou@freescale.com --- Applied to mpc85xx master, awaiting upstream. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/mpc8641hpcn: Move environment to avoid conflict
On 04/15/2015 02:13 PM, Scott Wood wrote: U-Boot on this board grew a long time ago past the 384 KiB that it reserves for the U-Boot image, before the environment. Thus, saveenv overwrites the U-Boot image and bricks the board. I tried to find out when U-Boot grew beyond this point, but there is a long stretch in the history where this board did not build -- and AFAICT when it did fit in 384 KiB, it was missing vital features such as fdt support. Turning off CONFIG_VIDEO was not enough to make it fit. Thus, I don't think we have any choice other than to move the environment. Signed-off-by: Scott Wood scottw...@freescale.com --- Applied to mpc85xx master, awaiting upstream. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V5 2/3] dm: test: Add tests for get/find uclass's device by name
On 20 April 2015 at 05:32, Przemyslaw Marczak p.marc...@samsung.com wrote:
This commit introduces simple tests for functions:
- uclass_find_device_by_name()
- uclass_get_device_by_name()
Tests added by this commit:
- Test: dm_test_uclass_devices_find_by_name: for uclass id: UCLASS_TEST_FDT
* get uclass's devices by uclass_find_first/next_device() each as 'testdev',
* for each returned device, call: uclass_find_device_by_name(),
with previously returned device's name as an argument ('testdev-name').
* for the found device ('founddev') check if:
* founddev != NULL
* testdev == founddev
* testdev-name == founddev-name (by strcmp)
- Test: dm_test_uclass_devices_get_by_name: for uclass id: UCLASS_TEST_FDT
* get uclass's devices by uclass_get_first/next_device() each as 'testdev',
* for each returned device, call: uclass_get_device_by_name(),
with previously returned device's name as an argument ('testdev-name').
* for the found device ('founddev') check if:
* founddev != NULL
* founddev is active
* testdev == founddev
* testdev-name == founddev-name (by strcmp)
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Simon Glass s...@chromium.org
---
Changes V4:
-new commit
Changes V5:
- code cleanup
---
test/dm/core.c | 81
++
1 file changed, 81 insertions(+)
Acked-by: Simon Glass s...@chromium.org
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Re: [U-Boot] [PATCH V5 3/3] dm: core: precise comments for get/find device by name
On 20 April 2015 at 05:32, Przemyslaw Marczak p.marc...@samsung.com wrote: The functions: - uclass_find_device_by_name() - uclass_get_device_by_name() searches the required device for the exactly given name. This patch, presice this fact for both function's comments. Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com Cc: Simon Glass s...@chromium.org --- Canges V5: -new patch --- include/dm/uclass-internal.h | 2 +- include/dm/uclass.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] T4240RDB: Enable CONFIG_SYS_CORTINA_FW_IN_NOR config
On 03/24/2015 12:10 AM, Chunhe Lan wrote: Now cortina driver uses macro CONFIG_SYS_CORTINA_FW_IN_NOR to define that firmware of cortina driver is stored in the nor flash. Signed-off-by: Chunhe Lan chunhe@freescale.com --- Applied to mpc85xx master, awaiting upstream. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] board/t208xrdb: VID support
On 03/09/2015 11:21 PM, ying.zh...@freescale.com wrote: From: Ying Zhang b40...@freescale.com The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. Signed-off-by: Ying Zhang b40...@freescale.com --- Applied to mpc85xx master, awaiting upstream. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/t2080: enable erratum_a007186 for t2080 rev1.1
On 03/09/2015 02:12 AM, Shengzhou Liu wrote: T2080 rev1.1 also needs erratum a007186. Signed-off-by: Shengzhou Liu shengzhou@freescale.com --- Applied to mpc85xx master, awaiting upstream. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V5 1/3] dm: core: remove type 'static' of function uclass_get_device_tail()
On 20 April 2015 at 05:32, Przemyslaw Marczak p.marc...@samsung.com wrote: Uclass API provides a few functions for get/find the device. To provide a complete function set of uclass-internal functions, for use by the drivers, the function uclass_get_device_tail() should be non-static. Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com Cc: Simon Glass s...@chromium.org --- Changes V4: - new commit Changes V5: - drivers/core/uclass.c - uclass_get_device_tail() - remove function comment --- drivers/core/uclass.c| 12 +--- include/dm/uclass-internal.h | 21 ++--- 2 files changed, 19 insertions(+), 14 deletions(-) Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net: pch_gbe: Fix pch_gbe device name
Hi Bin Meng, On Tue, Apr 14, 2015 at 9:02 PM, Bin Meng bmeng...@gmail.com wrote: The name pch_gbe.%x exceeds the limit of the name in the 'struct eth_device'. Rename it as just pch_gbe. Signed-off-by: Bin Meng bmeng...@gmail.com Applied to u-boot-net/next, thanks! -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 8/8] mtd: vf610_nfc: enable ONFI detection
On Wed, 2015-04-08 at 16:44 +0200, Stefan Agner wrote: + case ALT_BUF_ONFI: + /* Reverse byte since the controller uses big endianness */ + c = nfc-column % 4; + c = nfc-column - c + (3 - c); These two lines can be simplified to c = nfc-column ^ 3; Doesn't this driver run on some big-endian targets, in which case you wouldn't want to reverse? I think you should instead be using in_be32() and then extracting the byte within the word after it's been put into cpu byte order. + tmp = *((u8 *)(nfc-regs + NFC_MAIN_AREA(0) + c)); + break; + default: + tmp = *((u8 *)(nfc-regs + NFC_MAIN_AREA(0) + c)); + break; Why is the byte order different here? I guess you've been writing data backwards onto the NAND chip? Won't that mess up factory bad block markers? -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/6] ARM: socfpga: refactoring, move files to arch/arm/mach-socfpga
Masahiro Yamada (6):
ARM: socfpga: do not add board directory to header search path
ARM: socfpga: remove redundant config.mk
ARM: socfpga: move board select into mach-socfpga/Kconfig
ARM: socfpga: move SoC sources to mach-socfpga
ARM: socfpga: move SoC headers to mach-socfpga/include/mach
ARM: socfpga: abolish CONFIG_SOCFPGA
arch/arm/Kconfig | 15 +++
arch/arm/Makefile | 1 +
arch/arm/cpu/armv7/Makefile| 1 -
arch/arm/cpu/armv7/socfpga/config.mk | 11
arch/arm/dts/Makefile | 2 +-
arch/arm/mach-socfpga/Kconfig | 27 +++
.../{cpu/armv7/socfpga = mach-socfpga}/Makefile | 0
.../armv7/socfpga = mach-socfpga}/clock_manager.c | 0
.../armv7/socfpga = mach-socfpga}/fpga_manager.c | 0
.../socfpga = mach-socfpga}/freeze_controller.c | 0
.../include/mach}/clock_manager.h | 0
.../include/mach}/dwmmc.h | 0
.../include/mach}/fpga_manager.h | 0
.../include/mach}/freeze_controller.h | 0
.../include/mach}/gpio.h | 0
.../include/mach}/nic301.h | 0
.../include/mach}/reset_manager.h | 0
.../include/mach}/scan_manager.h | 0
.../include/mach}/scu.h| 0
.../include/mach}/socfpga_base_addrs.h | 0
.../include/mach}/system_manager.h | 0
.../include/mach}/timer.h | 0
.../armv7/socfpga = mach-socfpga}/lowlevel_init.S | 0
.../arm/{cpu/armv7/socfpga = mach-socfpga}/misc.c | 0
.../armv7/socfpga = mach-socfpga}/reset_manager.c | 0
.../armv7/socfpga = mach-socfpga}/scan_manager.c | 0
arch/arm/{cpu/armv7/socfpga = mach-socfpga}/spl.c | 0
.../socfpga = mach-socfpga}/system_manager.c | 0
.../{cpu/armv7/socfpga = mach-socfpga}/timer.c| 0
.../armv7/socfpga = mach-socfpga}/u-boot-spl.lds | 0
board/altera/socfpga/Kconfig | 31 --
board/altera/socfpga/iocsr_config.c| 2 +-
configs/socfpga_arria5_defconfig | 1 +
configs/socfpga_cyclone5_defconfig | 1 +
configs/socfpga_socrates_defconfig | 1 +
include/configs/socfpga_common.h | 4 +--
36 files changed, 38 insertions(+), 59 deletions(-)
delete mode 100644 arch/arm/cpu/armv7/socfpga/config.mk
create mode 100644 arch/arm/mach-socfpga/Kconfig
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/Makefile (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/clock_manager.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/fpga_manager.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/freeze_controller.c (100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/clock_manager.h (100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/dwmmc.h (100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/fpga_manager.h (100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/freeze_controller.h (100%)
rename arch/arm/{include/asm/arch-socfpga = mach-socfpga/include/mach}/gpio.h
(100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/nic301.h (100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/reset_manager.h (100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/scan_manager.h (100%)
rename arch/arm/{include/asm/arch-socfpga = mach-socfpga/include/mach}/scu.h
(100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/socfpga_base_addrs.h (100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/system_manager.h (100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/timer.h (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/lowlevel_init.S (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/misc.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/reset_manager.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/scan_manager.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/spl.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/system_manager.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/timer.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/u-boot-spl.lds (100%)
delete mode 100644 board/altera/socfpga/Kconfig
--
1.9.1
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[U-Boot] [PATCH] spl: descend into lib/ for all the SPL boards
Currently, CONFIG_SPL_LIBGENERIC_SUPPORT must be defined
to build under lib/ directory for SPL.
This directory contains very basic functions such as memcpy, memset
in lib/string.c, so it should be very useful for all the boards.
Because SPL always enables compiler's garbage collection, this change
should not give impact on its memory footprint.
Let's allow SPL to descend into lib/ all the time. As a result,
CONFIG_SPL_LIBGENERIC_SUPPORT is no longer necessary.
Four files must be adjusted to avoid multiple definition error.
- arch/powerpc/cpu/mpc85xx/spl_minimal.c
udelay() is not a weak function. __udelay() is overridable.
- arch/powerpc/lib/time.c
MPC85xx has its own udelay for CONFIG_SPL_INIT_MINIAL.
Enclose the definition with ifdefs.
- board/armadeus/apf27/apf27.c
- board/vpac270/onenand.c
Do not duplicate hang()
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
arch/powerpc/cpu/mpc85xx/spl_minimal.c | 2 +-
arch/powerpc/lib/time.c| 4
board/armadeus/apf27/apf27.c | 6 --
board/vpac270/onenand.c| 6 --
include/configs/B4860QDS.h | 1 -
include/configs/C29XPCIE.h | 1 -
include/configs/P1010RDB.h | 3 ---
include/configs/P1022DS.h | 3 ---
include/configs/T102xQDS.h | 1 -
include/configs/T102xRDB.h | 1 -
include/configs/T104xRDB.h | 1 -
include/configs/T208xQDS.h | 1 -
include/configs/T208xRDB.h | 1 -
include/configs/T4240QDS.h | 1 -
include/configs/a3m071.h | 1 -
include/configs/am3517_crane.h | 1 -
include/configs/am3517_evm.h | 1 -
include/configs/at91sam9m10g45ek.h | 1 -
include/configs/at91sam9n12ek.h| 1 -
include/configs/at91sam9x5ek.h | 1 -
include/configs/bur_am335x_common.h| 1 -
include/configs/cam_enc_4xx.h | 1 -
include/configs/cm_t35.h | 1 -
include/configs/corvus.h | 1 -
include/configs/da850evm.h | 1 -
include/configs/db-mv784mp-gp.h| 1 -
include/configs/edminiv2.h | 1 -
include/configs/imx6_spl.h | 1 -
include/configs/ipam390.h | 1 -
include/configs/ks2_evm.h | 1 -
include/configs/ls1021aqds.h | 2 --
include/configs/ls1021atwr.h | 1 -
include/configs/lwmon5.h | 1 -
include/configs/m53evk.h | 1 -
include/configs/maxbcm.h | 1 -
include/configs/mcx.h | 1 -
include/configs/microblaze-generic.h | 1 -
include/configs/mx31pdk.h | 1 -
include/configs/mxs.h | 1 -
include/configs/omap3_evm_common.h | 1 -
include/configs/p1_p2_rdb_pc.h | 3 ---
include/configs/palmtreo680.h | 1 -
include/configs/sama5d3_xplained.h | 1 -
include/configs/sama5d3xek.h | 1 -
include/configs/sama5d4_xplained.h | 1 -
include/configs/sama5d4ek.h| 1 -
include/configs/siemens-am33x-common.h | 1 -
include/configs/socfpga_common.h | 1 -
include/configs/sunxi-common.h | 1 -
include/configs/tam3517-common.h | 1 -
include/configs/tao3530.h | 1 -
include/configs/taurus.h | 1 -
include/configs/tegra-common.h | 1 -
include/configs/ti814x_evm.h | 1 -
include/configs/ti816x_evm.h | 1 -
include/configs/ti_armv7_common.h | 1 -
include/configs/tricorder.h| 1 -
include/configs/tx25.h | 1 -
include/configs/uniphier.h | 1 -
include/configs/woodburn_sd.h | 1 -
include/configs/work_92105.h | 1 -
include/configs/x600.h | 1 -
include/configs/zynq-common.h | 1 -
scripts/Makefile.spl | 2 +-
64 files changed, 6 insertions(+), 80 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/spl_minimal.c
b/arch/powerpc/cpu/mpc85xx/spl_minimal.c
index cc45f71..a9c3d9b 100644
--- a/arch/powerpc/cpu/mpc85xx/spl_minimal.c
+++ b/arch/powerpc/cpu/mpc85xx/spl_minimal.c
@@ -35,7 +35,7 @@ ulong cpu_init_f(void)
#define CONFIG_SYS_FSL_TBCLK_DIV 8
#endif
-void udelay(unsigned long usec)
+void __udelay(unsigned long usec)
{
u32 ticks_per_usec = gd-bus_clk / (CONFIG_SYS_FSL_TBCLK_DIV * 100);
u32 ticks = ticks_per_usec * usec;
diff --git a/arch/powerpc/lib/time.c b/arch/powerpc/lib/time.c
index 62b6c72..b552862 100644
--- a/arch/powerpc/lib/time.c
+++ b/arch/powerpc/lib/time.c
@@ -34,11 +34,15 @@ unsigned long usec2ticks(unsigned long usec)
* microseconds to wait) into a number of time base ticks; then we
* watch the time base until it has incremented by that amount.
*/
+#if !(defined(CONFIG_MPC85xx) defined(CONFIG_SPL_BUILD) \
+ defined(CONFIG_SPL_INIT_MINIMAL))
+/* MPC85xx has a dedicated __udelay() for SPL minimal components */
[U-Boot] [PATCH 2/2] x86: Install a default e820 table in the __weak install_e820_map()
Create a default e820 table with 3 entries which is enough to boot
a Linux kernel.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
arch/x86/lib/zimage.c | 29 ++---
1 file changed, 22 insertions(+), 7 deletions(-)
diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
index 566b048..c3f8a73 100644
--- a/arch/x86/lib/zimage.c
+++ b/arch/x86/lib/zimage.c
@@ -25,6 +25,8 @@
#endif
#include linux/compiler.h
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Memory lay-out:
*
@@ -40,16 +42,29 @@
#define COMMAND_LINE_SIZE 2048
-unsigned generic_install_e820_map(unsigned max_entries,
- struct e820entry *entries)
+/*
+ * Install a default e820 table with 3 entries as follows:
+ *
+ * 0x00-0x0a Useable RAM
+ * 0x0a-0x10 Reserved for ISA
+ * 0x10-gd-ram_size Useable RAM
+ */
+__weak unsigned install_e820_map(unsigned max_entries,
+struct e820entry *entries)
{
- return 0;
+ entries[0].addr = 0;
+ entries[0].size = ISA_START_ADDRESS;
+ entries[0].type = E820_RAM;
+ entries[1].addr = ISA_START_ADDRESS;
+ entries[1].size = ISA_END_ADDRESS - ISA_START_ADDRESS;
+ entries[1].type = E820_RESERVED;
+ entries[2].addr = ISA_END_ADDRESS;
+ entries[2].size = gd-ram_size - ISA_END_ADDRESS;
+ entries[2].type = E820_RAM;
+
+ return 3;
}
-unsigned install_e820_map(unsigned max_entries,
- struct e820entry *entries)
- __attribute__((weak, alias(generic_install_e820_map)));
-
static void build_command_line(char *command_line, int auto_boot)
{
char *env_command_line;
--
1.8.2.1
___
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[U-Boot] [PATCH 6/6] ARM: socfpga: abolish CONFIG_SOCFPGA
CONFIG_SOCFPGA is only referenced by arch/arm/dts/Makefile. Replace it with CONFIG_ARCH_SOCFPGA. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- arch/arm/dts/Makefile| 2 +- include/configs/socfpga_common.h | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 09708d9..8c421b1 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -49,7 +49,7 @@ dtb-$(CONFIG_ZYNQ) += zynq-zc702.dtb \ zynq-zc770-xm013.dtb dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb -dtb-$(CONFIG_SOCFPGA) += \ +dtb-$(CONFIG_ARCH_SOCFPGA) += \ socfpga_arria5_socdk.dtb\ socfpga_cyclone5_socdk.dtb \ socfpga_cyclone5_socrates.dtb diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 4872370..0e6232f 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_THUMB_BUILD -#define CONFIG_SOCFPGA - /* * High level configuration */ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] x86: Clean up arch/x86/include/asm/e820.h
There are lots of unused codes defined in e820.h, clean it up.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
arch/x86/include/asm/e820.h | 133 +---
1 file changed, 2 insertions(+), 131 deletions(-)
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index d155ce9..21bc633 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -1,43 +1,7 @@
#ifndef _ASM_X86_E820_H
#define _ASM_X86_E820_H
-#define E820MAP0x2d0 /* our map */
-#define E820MAX128 /* number of entries in E820MAP */
-/*
- * Legacy E820 BIOS limits us to 128 (E820MAX) nodes due to the
- * constrained space in the zeropage. If we have more nodes than
- * that, and if we've booted off EFI firmware, then the EFI tables
- * passed us from the EFI firmware can list more nodes. Size our
- * internal memory map tables to have room for these additional
- * nodes, based on up to three entries per node for which the
- * kernel was built: MAX_NUMNODES == (1 CONFIG_NODES_SHIFT),
- * plus E820MAX, allowing space for the possible duplicate E820
- * entries that might need room in the same arrays, prior to the
- * call to sanitize_e820_map() to remove duplicates. The allowance
- * of three memory map entries per node is enough entries for
- * the initial hardware platform motivating this mechanism to make
- * use of additional EFI map entries. Future platforms may want
- * to allow more than three entries per node or otherwise refine
- * this size.
- */
-
-/*
- * Odd: 'make headers_check' complains about numa.h if I try
- * to collapse the next two #ifdef lines to a single line:
- * #if defined(__KERNEL__) defined(CONFIG_EFI)
- */
-#ifdef __KERNEL__
-#ifdef CONFIG_EFI
-#include linux/numa.h
-#define E820_X_MAX (E820MAX + 3 * MAX_NUMNODES)
-#else /* ! CONFIG_EFI */
-#define E820_X_MAX E820MAX
-#endif
-#else /* ! __KERNEL__ */
-#define E820_X_MAX E820MAX
-#endif
-
-#define E820NR 0x1e8 /* # entries in E820MAP */
+#define E820MAX128 /* number of entries in E820MAP */
#define E820_RAM 1
#define E820_RESERVED 2
@@ -45,111 +9,18 @@
#define E820_NVS 4
#define E820_UNUSABLE 5
-/* reserved RAM used by kernel itself */
-#define E820_RESERVED_KERN128
-
#ifndef __ASSEMBLY__
#include linux/types.h
+
struct e820entry {
__u64 addr; /* start of memory segment */
__u64 size; /* size of memory segment */
__u32 type; /* type of memory segment */
} __attribute__((packed));
-struct e820map {
- __u32 nr_map;
- struct e820entry map[E820_X_MAX];
-};
-
#define ISA_START_ADDRESS 0xa
#define ISA_END_ADDRESS0x10
-#define BIOS_BEGIN 0x000a
-#define BIOS_END 0x0010
-
-#ifdef __KERNEL__
-/* see comment in arch/x86/kernel/e820.c */
-extern struct e820map e820;
-extern struct e820map e820_saved;
-
-extern unsigned long pci_mem_start;
-extern int e820_any_mapped(u64 start, u64 end, unsigned type);
-extern int e820_all_mapped(u64 start, u64 end, unsigned type);
-extern void e820_add_region(u64 start, u64 size, int type);
-extern void e820_print_map(char *who);
-extern int
-sanitize_e820_map(struct e820entry *biosmap, int max_nr_map, u32 *pnr_map);
-extern u64 e820_update_range(u64 start, u64 size, unsigned old_type,
- unsigned new_type);
-extern u64 e820_remove_range(u64 start, u64 size, unsigned old_type,
-int checktype);
-extern void update_e820(void);
-extern void e820_setup_gap(void);
-extern int e820_search_gap(unsigned long *gapstart, unsigned long *gapsize,
- unsigned long start_addr, unsigned long long end_addr);
-struct setup_data;
-extern void parse_e820_ext(struct setup_data *data, unsigned long pa_data);
-
-#if defined(CONFIG_X86_64) || \
- (defined(CONFIG_X86_32) defined(CONFIG_HIBERNATION))
-extern void e820_mark_nosave_regions(unsigned long limit_pfn);
-#else
-static inline void e820_mark_nosave_regions(unsigned long limit_pfn)
-{
-}
-#endif
-
-#ifdef CONFIG_MEMTEST
-extern void early_memtest(unsigned long start, unsigned long end);
-#else
-static inline void early_memtest(unsigned long start, unsigned long end)
-{
-}
-#endif
-
-extern unsigned long end_user_pfn;
-
-extern u64 find_e820_area(u64 start, u64 end, u64 size, u64 align);
-extern u64 find_e820_area_size(u64 start, u64 *sizep, u64 align);
-extern void reserve_early(u64 start, u64 end, char *name);
-extern void reserve_early_overlap_ok(u64 start, u64 end, char *name);
-extern void free_early(u64 start, u64 end);
-extern void early_res_to_bootmem(u64 start, u64 end);
-extern u64 early_reserve_e820(u64 startt, u64 sizet, u64 align);
-
-extern unsigned long e820_end_of_ram_pfn(void);
-extern unsigned long e820_end_of_low_ram_pfn(void);
-extern int e820_find_active_region(const struct e820entry *ei,
-
[U-Boot] Loopback mode on Xilinx zc702 evaluation board
Hi All, I want to test Ethernet loop back mode on the Xilinx Zc702 evaluation mode from u-boot. I search the u-boot for setting the control register to loopback mode but could not find one. Please let me know if any of you have tested the same and any pointers to do the same. Thanks in advance. Regards, Subash ::DISCLAIMER:: The contents of this e-mail and any attachment(s) are confidential and intended for the named recipient(s) only. E-mail transmission is not guaranteed to be secure or error-free as information could be intercepted, corrupted, lost, destroyed, arrive late or incomplete, or may contain viruses in transmission. The e mail and its contents (with or without referred errors) shall therefore not attach any liability on the originator or HCL or its affiliates. Views or opinions, if any, presented in this email are solely those of the author and may not necessarily reflect the views or opinions of HCL or its affiliates. Any form of reproduction, dissemination, copying, disclosure, modification, distribution and / or publication of this message without the prior written consent of authorized representative of HCL is strictly prohibited. If you have received this email in error please delete it and notify the sender immediately. Before opening any email and/or attachments, please check them for viruses and other defects. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 08/20] dm: rtc: Rename mktime() and reduce the number of parameters
Hello Simon,
Am 20.04.2015 20:37, schrieb Simon Glass:
Most callers unpack the structure and pass each member. It seems better to
pass the whole structure instead, as with the C library. Also add an rtc_
prefix.
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/rtc/at91sam9_rtt.c | 3 +--
drivers/rtc/bfin_rtc.c | 3 +--
drivers/rtc/date.c | 23 ---
drivers/rtc/ds1306.c | 3 +--
drivers/rtc/ds1374.c | 4 +---
drivers/rtc/ftrtc010.c | 3 +--
drivers/rtc/imxdi.c| 3 +--
drivers/rtc/mc13xxx-rtc.c | 3 +--
drivers/rtc/mpc8xx.c | 3 +--
drivers/rtc/mx27rtc.c | 3 +--
drivers/rtc/mxsrtc.c | 3 +--
drivers/rtc/pl031.c| 3 +--
include/rtc.h | 16 +---
post/drivers/rtc.c | 22 ++
14 files changed, 54 insertions(+), 41 deletions(-)
Acked-by: Heiko Schocher h...@denx.de
bye,
Heiko
diff --git a/drivers/rtc/at91sam9_rtt.c b/drivers/rtc/at91sam9_rtt.c
index d3cdee0..a684ad6 100644
--- a/drivers/rtc/at91sam9_rtt.c
+++ b/drivers/rtc/at91sam9_rtt.c
@@ -54,8 +54,7 @@ int rtc_set (struct rtc_time *tmp)
at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
ulong tim;
- tim = mktime (tmp-tm_year, tmp-tm_mon, tmp-tm_mday,
- tmp-tm_hour, tmp-tm_min, tmp-tm_sec);
+ tim = rtc_mktime(tmp);
/* clear alarm, set prescaler to 32768, clear counter */
writel(32768+AT91_RTT_RTTRST, rtt-mr);
diff --git a/drivers/rtc/bfin_rtc.c b/drivers/rtc/bfin_rtc.c
index 6cb1eba..a079a1d 100644
--- a/drivers/rtc/bfin_rtc.c
+++ b/drivers/rtc/bfin_rtc.c
@@ -67,8 +67,7 @@ int rtc_set(struct rtc_time *tmp)
wait_for_complete();
/* Calculate number of seconds this incoming time represents */
- remain = mktime(tmp-tm_year, tmp-tm_mon, tmp-tm_mday,
- tmp-tm_hour, tmp-tm_min, tmp-tm_sec);
+ remain = rtc_mktime(tmp);
/* Figure out how many days since epoch */
days = remain / NUM_SECS_IN_DAY;
diff --git a/drivers/rtc/date.c b/drivers/rtc/date.c
index 79beb94..8c643a0 100644
--- a/drivers/rtc/date.c
+++ b/drivers/rtc/date.c
@@ -128,22 +128,23 @@ int rtc_to_tm(int tim, struct rtc_time *tm)
* machines were long is 32-bit! (However, as time_t is signed, we
* will already get problems at other places on 2038-01-19 03:14:08)
*/
-unsigned long
-mktime (unsigned int year, unsigned int mon,
- unsigned int day, unsigned int hour,
- unsigned int min, unsigned int sec)
+unsigned long rtc_mktime(const struct rtc_time *tm)
{
- if (0 = (int) (mon -= 2)) { /* 1..12 - 11,12,1..10 */
+ int mon = tm-tm_mon;
+ int year = tm-tm_year;
+ int days, hours;
+
+ mon -= 2;
+ if (0 = (int)mon) { /* 1..12 - 11,12,1..10 */
mon += 12; /* Puts Feb last since it has leap day
*/
year -= 1;
}
- return (((
- (unsigned long) (year/4 - year/100 + year/400 + 367*mon/12 +
day) +
- year*365 - 719499
- )*24 + hour /* now have hours */
- )*60 + min /* now have minutes */
- )*60 + sec; /* finally seconds */
+ days = (unsigned long)(year / 4 - year / 100 + year / 400 +
+ 367 * mon / 12 + tm-tm_mday) +
+ year * 365 - 719499;
+ hours = days * 24 + tm-tm_hour;
+ return (hours * 60 + tm-tm_min) * 60 + tm-tm_sec;
}
#endif
diff --git a/drivers/rtc/ds1306.c b/drivers/rtc/ds1306.c
index 3fe6721..7dd3e19 100644
--- a/drivers/rtc/ds1306.c
+++ b/drivers/rtc/ds1306.c
@@ -180,8 +180,7 @@ int rtc_set (struct rtc_time *tmp)
{
ulong tim;
- tim = mktime (tmp-tm_year, tmp-tm_mon, tmp-tm_mday,
- tmp-tm_hour, tmp-tm_min, tmp-tm_sec);
+ tim = rtc_mktime(tmp);
immap-im_sitk.sitk_rtck = KAPWR_KEY;
immap-im_sit.sit_rtc = tim;
diff --git a/drivers/rtc/ds1374.c b/drivers/rtc/ds1374.c
index 04793b5..7847357 100644
--- a/drivers/rtc/ds1374.c
+++ b/drivers/rtc/ds1374.c
@@ -147,9 +147,7 @@ int rtc_set (struct rtc_time *tmp){
if (tmp-tm_year 1970 || tmp-tm_year 2069)
printf(WARNING: year should be between 1970 and 2069!\n);
- time = mktime(tmp-tm_year, tmp-tm_mon,
- tmp-tm_mday, tmp-tm_hour,
- tmp-tm_min, tmp-tm_sec);
+ time = rtc_mktime(tmp);
DEBUGR (Set RTC s since 1.1.1970: %ld (0x%02lx)\n, time, time);
diff --git a/drivers/rtc/ftrtc010.c b/drivers/rtc/ftrtc010.c
index 3c5d955..7d0cfb3 100644
--- a/drivers/rtc/ftrtc010.c
+++ b/drivers/rtc/ftrtc010.c
@@ -104,8 +104,7 @@ int rtc_set(struct rtc_time *tmp)
tmp-tm_year, tmp-tm_mon, tmp-tm_mday, tmp-tm_wday,
tmp-tm_hour, tmp-tm_min, tmp-tm_sec);
- new = mktime(tmp-tm_year, tmp-tm_mon, tmp-tm_mday,
[U-Boot] [PATCH] git-mailrc: add Marek as SOCFPGA maintainer
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- doc/git-mailrc | 1 + 1 file changed, 1 insertion(+) diff --git a/doc/git-mailrc b/doc/git-mailrc index 5f8438e..218349b 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -64,6 +64,7 @@ alias rmobileuboot, iwamatsu alias s3csamsung alias s5pc samsung alias samsunguboot, prom +alias socfpga uboot, marex alias sunxi uboot, ijc, jwrdegoede alias tegra uboot, sjg, Tom Warren twar...@nvidia.com, Stephen Warren swar...@nvidia.com alias tegra2 tegra -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 02/10] board_init_f_mem(): Don't require memset()
Hi Masahiro, On 20 April 2015 at 21:42, Masahiro Yamada yamada.masah...@socionext.com wrote: Hi Simon, 2015-04-16 10:14 GMT+09:00 Simon Glass s...@chromium.org: Unfortunately memset() is not always available, so provide a substitute when needed. Signed-off-by: Simon Glass s...@chromium.org --- common/init/global_data.c | 8 1 file changed, 8 insertions(+) diff --git a/common/init/global_data.c b/common/init/global_data.c index 2633f0d..ef055c4 100644 --- a/common/init/global_data.c +++ b/common/init/global_data.c @@ -21,7 +21,15 @@ ulong board_init_f_mem(ulong top) top -= sizeof(struct global_data); top = ALIGN(top, 16); gd = (struct global_data *)top; +#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBGENERIC_SUPPORT) memset((void *)gd, '\0', sizeof(*gd)); +#else + int *ptr = (int *)gd; + int *end = (int *)(gd + 1); + + while (ptr end) + *ptr++ = 0; +#endif #ifdef CONFIG_SYS_MALLOC_F_LEN top -= CONFIG_SYS_MALLOC_F_LEN; This patch implies that all the SPLs should have memset(). Is it better to build lib/ unconditionally? I posted a patch to do so. Please consider to use it as a prerequisite for cleaning up 01/10 and 02/10. That would be better I think - how did you manage it? I cannot see the patch you are referring to. Although what about if SPL is very close to the maximum size and adding memset() makes it too large? I suppose in that case we would get a build error and notice the problem? Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/4] ARM: zynq: move sources to mach-zynq
Hi Michal, 2015-03-16 16:43 GMT+09:00 Masahiro Yamada yamada.masah...@socionext.com: Masahiro Yamada (4): ARM: zynq: pass -mfpu=neon only to lowlevel_init.S ARM: zynq: move SoC sources to mach-zynq ARM: zynq: move SoC headers to mach-zynq/include/mach ARM: zynq: rename CONFIG_ZYNQ to CONFIG_ARCH_ZYNQ Is this series applicable? Thanks! -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 77/80] dm: usb: Add tests for the USB uclass
Hi Simon,
On Wed, Mar 25, 2015 at 1:23 PM, Simon Glass s...@chromium.org wrote:
This adds a simple test for probing and a functional test using the flash
stick emulator, which tests a large chunk of the USB stack.
Signed-off-by: Simon Glass s...@chromium.org
I'm seeing a seg fault when running the dm tests and bisected it to this patch.
I'm not sure why it's related, but it appears to seg fault on a GPIO test...
U-Boot 2015.04-00280-ge00cb22-dirty (Apr 21 2015 - 00:02:01)
DRAM: 128 MiB
Using default environment
In:serial
Out: lcd
Err: lcd
Net: eth0: eth@10002000, eth5: eth@10003000, eth1: eth@10004000
Running 53 driver model tests
Test: dm_test_autobind
Test: dm_test_autoprobe
Test: dm_test_bus_child_post_bind
Test: dm_test_bus_child_post_bind_uclass
Test: dm_test_bus_child_pre_probe_uclass
Test: dm_test_bus_children
Device 'c-test@0': seq 0 is in use by 'd-test'
Device 'c-test@1': seq 1 is in use by 'f-test'
Test: dm_test_bus_children_funcs
Test: dm_test_bus_children_iterators
Test: dm_test_bus_parent_data
Test: dm_test_bus_parent_data_uclass
Test: dm_test_bus_parent_ops
Test: dm_test_bus_parent_platdata
Test: dm_test_bus_parent_platdata_uclass
Test: dm_test_children
Test: dm_test_device_get_uclass_id
Test: dm_test_eth
Using eth@10002000 device
Using eth@10003000 device
Using eth@10004000 device
Test: dm_test_eth_alias
Using eth@10002000 device
Using eth@10004000 device
Using eth@10002000 device
Using eth@10003000 device
Test: dm_test_eth_prime
Using eth@10003000 device
Using eth@10002000 device
Test: dm_test_eth_rotate
Error: eth@10004000 address not set.
Error: eth@10004000 address not set.
Using eth@10002000 device
Error: eth@10004000 address not set.
Error: eth@10004000 address not set.
Using eth@10004000 device
Test: dm_test_fdt
Test: dm_test_fdt_offset
Test: dm_test_fdt_pre_reloc
Test: dm_test_fdt_uclass_seq
Test: dm_test_gpio
extra-gpios: get_value: error: gpio b5 not reserved
Test: dm_test_gpio_anon
Test: dm_test_gpio_copy
Test: dm_test_gpio_leak
extra-gpios: get_value: error: gpio b5 not reserved
Program received signal SIGSEGV, Segmentation fault.
0x09ec in ?? ()
(gdb) bt
#0 0x09ec in ?? ()
#1 0x0806a0aa in uclass_destroy (uc=0xb5abd228) at
/home/joe/u-boot/drivers/core/uclass.c:109
#2 0x080a29e1 in dm_leak_check_end (dms=0x8106870) at
/home/joe/u-boot/test/dm/core.c:89
#3 0x080a46a6 in dm_test_gpio_leak (dms=0x8106870) at
/home/joe/u-boot/test/dm/gpio.c:173
#4 0x080a0ed2 in dm_test_main (test_name=0x0) at
/home/joe/u-boot/test/dm/test-main.c:103
#5 0x0809e9fb in do_dm (cmdtp=0x80c0250, flag=0, argc=135022648,
argv=0xb5abbd40) at /home/joe/u-boot/test/dm/cmd_dm.c:150
#6 0x08065d6b in cmd_process (flag=0, argc=2, argv=0xb5abbd40,
repeatable=0x80c5fc4, ticks=0x0) at
/home/joe/u-boot/common/command.c:493
#7 0x0804d6fb in run_list_real (pi=0xb5abbc88) at
/home/joe/u-boot/common/cli_hush.c:1656
#8 0x0804dce4 in parse_stream_outer (inp=0xb0e8, flag=2) at
/home/joe/u-boot/common/cli_hush.c:2003
#9 0x0804df1d in parse_string_outer (s=0xb513 dm test, flag=2)
at /home/joe/u-boot/common/cli_hush.c:3248
#10 0x0804a855 in sandbox_main_loop_init () at
/home/joe/u-boot/arch/sandbox/cpu/start.c:85
#11 0x0804e65b in run_main_loop () at /home/joe/u-boot/common/board_r.c:682
#12 0x0808f082 in initcall_run_list (init_sequence=0x80c1f68) at
/home/joe/u-boot/lib/initcall.c:27
#13 0x0804e798 in board_init_r (new_gd=0xb5ab9f14, dest_addr=0) at
/home/joe/u-boot/common/board_r.c:916
#14 0x0804a810 in main (argc=Cannot access memory at address 0x0
) at /home/joe/u-boot/arch/sandbox/cpu/start.c:276
(gdb) f 1
#1 0x0806a0aa in uclass_destroy (uc=0xb5abd228) at
/home/joe/u-boot/drivers/core/uclass.c:109
109 ret = device_unbind(dev);
(gdb) l -
99 int uclass_destroy(struct uclass *uc)
100 {
101 struct uclass_driver *uc_drv;
102 struct udevice *dev, *tmp;
103 int ret;
104
105 list_for_each_entry_safe(dev, tmp, uc-dev_head, uclass_node) {
106 ret = device_remove(dev);
107 if (ret)
108 return ret;
(gdb) l
109 ret = device_unbind(dev);
110 if (ret)
111 return ret;
112 }
113
114 uc_drv = uc-uc_drv;
115 if (uc_drv-destroy)
116 uc_drv-destroy(uc);
117 list_del(uc-sibling_node);
118 if (uc_drv-priv_auto_alloc_size)
(gdb)
Thoughts?
-Joe
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[U-Boot] [PATCH 4/6] ARM: socfpga: move SoC sources to mach-socfpga
Our recent trend is to collect SoC files into arch/arm/mach-(SOC).
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
arch/arm/Makefile| 1 +
arch/arm/cpu/armv7/Makefile | 1 -
arch/arm/{cpu/armv7/socfpga = mach-socfpga}/Makefile| 0
arch/arm/{cpu/armv7/socfpga = mach-socfpga}/clock_manager.c | 0
arch/arm/{cpu/armv7/socfpga = mach-socfpga}/fpga_manager.c | 0
arch/arm/{cpu/armv7/socfpga = mach-socfpga}/freeze_controller.c | 0
arch/arm/{cpu/armv7/socfpga = mach-socfpga}/lowlevel_init.S | 0
arch/arm/{cpu/armv7/socfpga = mach-socfpga}/misc.c | 0
arch/arm/{cpu/armv7/socfpga = mach-socfpga}/reset_manager.c | 0
arch/arm/{cpu/armv7/socfpga = mach-socfpga}/scan_manager.c | 0
arch/arm/{cpu/armv7/socfpga = mach-socfpga}/spl.c | 0
arch/arm/{cpu/armv7/socfpga = mach-socfpga}/system_manager.c| 0
arch/arm/{cpu/armv7/socfpga = mach-socfpga}/timer.c | 0
arch/arm/{cpu/armv7/socfpga = mach-socfpga}/u-boot-spl.lds | 0
include/configs/socfpga_common.h | 2 +-
15 files changed, 2 insertions(+), 2 deletions(-)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/Makefile (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/clock_manager.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/fpga_manager.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/freeze_controller.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/lowlevel_init.S (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/misc.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/reset_manager.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/scan_manager.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/spl.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/system_manager.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/timer.c (100%)
rename arch/arm/{cpu/armv7/socfpga = mach-socfpga}/u-boot-spl.lds (100%)
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index bd4749c..cd71d46 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -52,6 +52,7 @@ machine-$(CONFIG_KIRKWOOD)+= kirkwood
machine-$(CONFIG_ARCH_NOMADIK) += nomadik
# TODO: rename CONFIG_ORION5X - CONFIG_ARCH_ORION5X
machine-$(CONFIG_ORION5X) += orion5x
+machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
machine-$(CONFIG_TEGRA)+= tegra
machine-$(CONFIG_ARCH_UNIPHIER)+= uniphier
machine-$(CONFIG_ARCH_VERSATILE) += versatile
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 21fc03b..3e50263 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -51,7 +51,6 @@ obj-$(CONFIG_OMAP44XX) += omap4/
obj-$(CONFIG_OMAP54XX) += omap5/
obj-$(CONFIG_RMOBILE) += rmobile/
obj-$(CONFIG_ARCH_S5PC1XX) += s5pc1xx/
-obj-$(CONFIG_SOCFPGA) += socfpga/
obj-$(if $(filter stv0991,$(SOC)),y) += stv0991/
obj-$(CONFIG_ARCH_SUNXI) += sunxi/
obj-$(CONFIG_U8500) += u8500/
diff --git a/arch/arm/cpu/armv7/socfpga/Makefile
b/arch/arm/mach-socfpga/Makefile
similarity index 100%
rename from arch/arm/cpu/armv7/socfpga/Makefile
rename to arch/arm/mach-socfpga/Makefile
diff --git a/arch/arm/cpu/armv7/socfpga/clock_manager.c
b/arch/arm/mach-socfpga/clock_manager.c
similarity index 100%
rename from arch/arm/cpu/armv7/socfpga/clock_manager.c
rename to arch/arm/mach-socfpga/clock_manager.c
diff --git a/arch/arm/cpu/armv7/socfpga/fpga_manager.c
b/arch/arm/mach-socfpga/fpga_manager.c
similarity index 100%
rename from arch/arm/cpu/armv7/socfpga/fpga_manager.c
rename to arch/arm/mach-socfpga/fpga_manager.c
diff --git a/arch/arm/cpu/armv7/socfpga/freeze_controller.c
b/arch/arm/mach-socfpga/freeze_controller.c
similarity index 100%
rename from arch/arm/cpu/armv7/socfpga/freeze_controller.c
rename to arch/arm/mach-socfpga/freeze_controller.c
diff --git a/arch/arm/cpu/armv7/socfpga/lowlevel_init.S
b/arch/arm/mach-socfpga/lowlevel_init.S
similarity index 100%
rename from arch/arm/cpu/armv7/socfpga/lowlevel_init.S
rename to arch/arm/mach-socfpga/lowlevel_init.S
diff --git a/arch/arm/cpu/armv7/socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
similarity index 100%
rename from arch/arm/cpu/armv7/socfpga/misc.c
rename to arch/arm/mach-socfpga/misc.c
diff --git a/arch/arm/cpu/armv7/socfpga/reset_manager.c
b/arch/arm/mach-socfpga/reset_manager.c
similarity index 100%
rename from arch/arm/cpu/armv7/socfpga/reset_manager.c
rename to arch/arm/mach-socfpga/reset_manager.c
diff --git a/arch/arm/cpu/armv7/socfpga/scan_manager.c
b/arch/arm/mach-socfpga/scan_manager.c
similarity index 100%
rename from arch/arm/cpu/armv7/socfpga/scan_manager.c
rename to arch/arm/mach-socfpga/scan_manager.c
diff --git a/arch/arm/cpu/armv7/socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
similarity index 100%
rename from
[U-Boot] [PATCH 1/6] ARM: socfpga: do not add board directory to header search path
The compiler option -Iboard/$(VENDOR)/$(BOARD) just exists here for iocsr_config.c to be able to include iocsr_config.h. Use ... instead of ... to include a header in the same directory. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- arch/arm/cpu/armv7/socfpga/config.mk | 3 --- board/altera/socfpga/iocsr_config.c | 2 +- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/arm/cpu/armv7/socfpga/config.mk b/arch/arm/cpu/armv7/socfpga/config.mk index 2a99c72..3d18491 100644 --- a/arch/arm/cpu/armv7/socfpga/config.mk +++ b/arch/arm/cpu/armv7/socfpga/config.mk @@ -6,6 +6,3 @@ ifndef CONFIG_SPL_BUILD ALL-y += u-boot.img endif - -# Added for handoff support -PLATFORM_RELFLAGS += -Iboard/$(VENDOR)/$(BOARD) diff --git a/board/altera/socfpga/iocsr_config.c b/board/altera/socfpga/iocsr_config.c index c79aa6d..3b202b5 100644 --- a/board/altera/socfpga/iocsr_config.c +++ b/board/altera/socfpga/iocsr_config.c @@ -6,7 +6,7 @@ /* This file is generated by Preloader Generator */ -#include iocsr_config.h +#include iocsr_config.h #ifdef CONFIG_TARGET_SOCFPGA_CYCLONE5 const unsigned long iocsr_scan_chain0_table[(( -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 5/6] ARM: socfpga: move SoC headers to mach-socfpga/include/mach
Move headers to mach-socfpga as well.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
.../asm/arch-socfpga = mach-socfpga/include/mach}/clock_manager.h| 0
arch/arm/{include/asm/arch-socfpga = mach-socfpga/include/mach}/dwmmc.h | 0
.../asm/arch-socfpga = mach-socfpga/include/mach}/fpga_manager.h | 0
.../asm/arch-socfpga = mach-socfpga/include/mach}/freeze_controller.h| 0
arch/arm/{include/asm/arch-socfpga = mach-socfpga/include/mach}/gpio.h | 0
arch/arm/{include/asm/arch-socfpga = mach-socfpga/include/mach}/nic301.h | 0
.../asm/arch-socfpga = mach-socfpga/include/mach}/reset_manager.h| 0
.../asm/arch-socfpga = mach-socfpga/include/mach}/scan_manager.h | 0
arch/arm/{include/asm/arch-socfpga = mach-socfpga/include/mach}/scu.h| 0
.../asm/arch-socfpga = mach-socfpga/include/mach}/socfpga_base_addrs.h | 0
.../asm/arch-socfpga = mach-socfpga/include/mach}/system_manager.h | 0
arch/arm/{include/asm/arch-socfpga = mach-socfpga/include/mach}/timer.h | 0
12 files changed, 0 insertions(+), 0 deletions(-)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/clock_manager.h (100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/dwmmc.h (100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/fpga_manager.h (100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/freeze_controller.h (100%)
rename arch/arm/{include/asm/arch-socfpga = mach-socfpga/include/mach}/gpio.h
(100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/nic301.h (100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/reset_manager.h (100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/scan_manager.h (100%)
rename arch/arm/{include/asm/arch-socfpga = mach-socfpga/include/mach}/scu.h
(100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/socfpga_base_addrs.h (100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/system_manager.h (100%)
rename arch/arm/{include/asm/arch-socfpga =
mach-socfpga/include/mach}/timer.h (100%)
diff --git a/arch/arm/include/asm/arch-socfpga/clock_manager.h
b/arch/arm/mach-socfpga/include/mach/clock_manager.h
similarity index 100%
rename from arch/arm/include/asm/arch-socfpga/clock_manager.h
rename to arch/arm/mach-socfpga/include/mach/clock_manager.h
diff --git a/arch/arm/include/asm/arch-socfpga/dwmmc.h
b/arch/arm/mach-socfpga/include/mach/dwmmc.h
similarity index 100%
rename from arch/arm/include/asm/arch-socfpga/dwmmc.h
rename to arch/arm/mach-socfpga/include/mach/dwmmc.h
diff --git a/arch/arm/include/asm/arch-socfpga/fpga_manager.h
b/arch/arm/mach-socfpga/include/mach/fpga_manager.h
similarity index 100%
rename from arch/arm/include/asm/arch-socfpga/fpga_manager.h
rename to arch/arm/mach-socfpga/include/mach/fpga_manager.h
diff --git a/arch/arm/include/asm/arch-socfpga/freeze_controller.h
b/arch/arm/mach-socfpga/include/mach/freeze_controller.h
similarity index 100%
rename from arch/arm/include/asm/arch-socfpga/freeze_controller.h
rename to arch/arm/mach-socfpga/include/mach/freeze_controller.h
diff --git a/arch/arm/include/asm/arch-socfpga/gpio.h
b/arch/arm/mach-socfpga/include/mach/gpio.h
similarity index 100%
rename from arch/arm/include/asm/arch-socfpga/gpio.h
rename to arch/arm/mach-socfpga/include/mach/gpio.h
diff --git a/arch/arm/include/asm/arch-socfpga/nic301.h
b/arch/arm/mach-socfpga/include/mach/nic301.h
similarity index 100%
rename from arch/arm/include/asm/arch-socfpga/nic301.h
rename to arch/arm/mach-socfpga/include/mach/nic301.h
diff --git a/arch/arm/include/asm/arch-socfpga/reset_manager.h
b/arch/arm/mach-socfpga/include/mach/reset_manager.h
similarity index 100%
rename from arch/arm/include/asm/arch-socfpga/reset_manager.h
rename to arch/arm/mach-socfpga/include/mach/reset_manager.h
diff --git a/arch/arm/include/asm/arch-socfpga/scan_manager.h
b/arch/arm/mach-socfpga/include/mach/scan_manager.h
similarity index 100%
rename from arch/arm/include/asm/arch-socfpga/scan_manager.h
rename to arch/arm/mach-socfpga/include/mach/scan_manager.h
diff --git a/arch/arm/include/asm/arch-socfpga/scu.h
b/arch/arm/mach-socfpga/include/mach/scu.h
similarity index 100%
rename from arch/arm/include/asm/arch-socfpga/scu.h
rename to arch/arm/mach-socfpga/include/mach/scu.h
diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
b/arch/arm/mach-socfpga/include/mach/socfpga_base_addrs.h
similarity index 100%
rename from arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
rename to arch/arm/mach-socfpga/include/mach/socfpga_base_addrs.h
diff --git a/arch/arm/include/asm/arch-socfpga/system_manager.h
b/arch/arm/mach-socfpga/include/mach/system_manager.h
similarity index 100%
rename from arch/arm/include/asm/arch-socfpga/system_manager.h
rename to arch/arm/mach-socfpga/include/mach/system_manager.h
diff
[U-Boot] [PATCH 2/6] ARM: socfpga: remove redundant config.mk
Because all the SOCFPGA boards define CONFIG_SPL_FRAMEWORK (see include/configs/socfpga_common.h), u-boot.img is automatically added to the target image list by the top Makefile. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- arch/arm/cpu/armv7/socfpga/config.mk | 8 1 file changed, 8 deletions(-) delete mode 100644 arch/arm/cpu/armv7/socfpga/config.mk diff --git a/arch/arm/cpu/armv7/socfpga/config.mk b/arch/arm/cpu/armv7/socfpga/config.mk deleted file mode 100644 index 3d18491..000 --- a/arch/arm/cpu/armv7/socfpga/config.mk +++ /dev/null @@ -1,8 +0,0 @@ -# -# Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ -# -# SPDX-License-Identifier: GPL-2.0+ -# -ifndef CONFIG_SPL_BUILD -ALL-y += u-boot.img -endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/6] ARM: socfpga: move board select into mach-socfpga/Kconfig
Switch to a more standard way of board select; put the SoC select into arch/arm/Kconfig and move the board select menu under arch/arm/mach-socfpga/Kconfig. Also, consolidate SYS_BOARD, SYS_VENDOR, SYS_SOC, SYS_CONFIG_NAME. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- arch/arm/Kconfig | 15 --- arch/arm/mach-socfpga/Kconfig | 27 +++ board/altera/socfpga/Kconfig | 31 --- configs/socfpga_arria5_defconfig | 1 + configs/socfpga_cyclone5_defconfig | 1 + configs/socfpga_socrates_defconfig | 1 + 6 files changed, 34 insertions(+), 42 deletions(-) create mode 100644 arch/arm/mach-socfpga/Kconfig delete mode 100644 board/altera/socfpga/Kconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3702bb0..ac7a11b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -634,16 +634,8 @@ config TARGET_CM_FX6 select DM_SERIAL select DM_GPIO -config TARGET_SOCFPGA_ARRIA5 - bool Support socfpga_arria5 - select CPU_V7 - select SUPPORT_SPL - select DM - select DM_SPI_FLASH - select DM_SPI - -config TARGET_SOCFPGA_CYCLONE5 - bool Support socfpga_cyclone5 +config ARCH_SOCFPGA + bool Altera SOCFPGA family select CPU_V7 select SUPPORT_SPL select DM @@ -819,6 +811,8 @@ source arch/arm/cpu/armv7/rmobile/Kconfig source arch/arm/cpu/armv7/s5pc1xx/Kconfig +source arch/arm/mach-socfpga/Kconfig + source arch/arm/mach-tegra/Kconfig source arch/arm/mach-uniphier/Kconfig @@ -840,7 +834,6 @@ source board/CarMediaLab/flea3/Kconfig source board/Marvell/aspenite/Kconfig source board/Marvell/db-mv784mp-gp/Kconfig source board/Marvell/gplugd/Kconfig -source board/altera/socfpga/Kconfig source board/armadeus/apf27/Kconfig source board/armltd/integrator/Kconfig source board/armltd/vexpress/Kconfig diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig new file mode 100644 index 000..204efca --- /dev/null +++ b/arch/arm/mach-socfpga/Kconfig @@ -0,0 +1,27 @@ +if ARCH_SOCFPGA + +choice + prompt Altera SOCFPGA board select + +config TARGET_SOCFPGA_ARRIA5 + bool Altera SOCFPGA Arria V + +config TARGET_SOCFPGA_CYCLONE5 + bool Altera SOCFPGA Cyclone V + +endchoice + +config SYS_BOARD + default socfpga + +config SYS_VENDOR + default altera + +config SYS_SOC + default socfpga + +config SYS_CONFIG_NAME + default socfpga_arria5 if TARGET_SOCFPGA_ARRIA5 + default socfpga_cyclone5 if TARGET_SOCFPGA_CYCLONE5 + +endif diff --git a/board/altera/socfpga/Kconfig b/board/altera/socfpga/Kconfig deleted file mode 100644 index cbed8d6..000 --- a/board/altera/socfpga/Kconfig +++ /dev/null @@ -1,31 +0,0 @@ -if TARGET_SOCFPGA_CYCLONE5 - -config SYS_BOARD - default socfpga - -config SYS_VENDOR - default altera - -config SYS_SOC - default socfpga - -config SYS_CONFIG_NAME - default socfpga_cyclone5 - -endif - -if TARGET_SOCFPGA_ARRIA5 - -config SYS_BOARD - default socfpga - -config SYS_VENDOR - default altera - -config SYS_SOC - default socfpga - -config SYS_CONFIG_NAME - default socfpga_arria5 - -endif diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 52032e5..d658a50 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -1,5 +1,6 @@ CONFIG_SPL=y CONFIG_ARM=y +CONFIG_ARCH_SOCFPGA=y CONFIG_TARGET_SOCFPGA_ARRIA5=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE=socfpga_arria5_socdk diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 6c982ab..a67b0c1 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -1,5 +1,6 @@ CONFIG_SPL=y CONFIG_ARM=y +CONFIG_ARCH_SOCFPGA=y CONFIG_TARGET_SOCFPGA_CYCLONE5=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE=socfpga_cyclone5_socdk diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index c81ab0f..1aa3ee5 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -1,5 +1,6 @@ CONFIG_SPL=y CONFIG_ARM=y +CONFIG_ARCH_SOCFPGA=y CONFIG_TARGET_SOCFPGA_CYCLONE5=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE=socfpga_cyclone5_socrates -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/5] ARM: integrator: abolish CONFIG_INTEGRATOR
Switch to CONFIG_ARCH_INTEGRATOR defined by Kconfig.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
Cc: Linus Walleij linus.wall...@linaro.org
---
arch/arm/cpu/arm946es/cpu.c | 4 ++--
include/configs/integrator-common.h | 2 --
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/arm946es/cpu.c b/arch/arm/cpu/arm946es/cpu.c
index e20e5a8..5d864b9 100644
--- a/arch/arm/cpu/arm946es/cpu.c
+++ b/arch/arm/cpu/arm946es/cpu.c
@@ -53,7 +53,7 @@ static void cache_flush (void)
asm (mcr p15, 0, %0, c7, c6, 0: :r (i));
}
-#ifndef CONFIG_INTEGRATOR
+#ifndef CONFIG_ARCH_INTEGRATOR
__attribute__((noreturn)) void reset_cpu(ulong addr __attribute__((unused)))
{
@@ -63,4 +63,4 @@ __attribute__((noreturn)) void reset_cpu(ulong addr
__attribute__((unused)))
;
}
-#endif /* #ifdef CONFIG_INTEGRATOR */
+#endif /* #ifdef CONFIG_ARCH_INTEGRATOR */
diff --git a/include/configs/integrator-common.h
b/include/configs/integrator-common.h
index 4362925..12c7382 100644
--- a/include/configs/integrator-common.h
+++ b/include/configs/integrator-common.h
@@ -7,8 +7,6 @@
* SPDX-License-Identifier:GPL-2.0+
*/
-#define CONFIG_INTEGRATOR
-
#define CONFIG_SYS_TEXT_BASE 0x0100
#define CONFIG_SYS_MEMTEST_START 0x10
#define CONFIG_SYS_MEMTEST_END 0x1000
--
1.9.1
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[U-Boot] [PATCH 0/5] ARM: integrator: Kconfig Clean up
Masahiro Yamada (5): ARM: ARM720t: remove empty asm/arch/hardware.h ARM: integrator: move board select into mach-integrator/Kconfig ARM: integrator: split board select into AP/CP select and CM select ARM: integrator: abolish CONFIG_INTEGRATOR ARM: integrator: remove CONFIG_ARCH_CINTEGRATOR arch/arm/Kconfig | 38 ++ arch/arm/cpu/arm720t/start.S | 1 - arch/arm/cpu/arm946es/cpu.c | 4 +- arch/arm/include/asm/arch-arm720t/hardware.h | 17 - arch/arm/include/asm/arch-tegra114/hardware.h | 22 -- arch/arm/include/asm/arch-tegra124/hardware.h | 16 arch/arm/include/asm/arch-tegra20/hardware.h | 13 arch/arm/include/asm/arch-tegra30/hardware.h | 22 -- arch/arm/mach-integrator/Kconfig | 50 + board/armltd/integrator/Kconfig | 103 -- configs/integratorap_cm720t_defconfig | 5 +- configs/integratorap_cm920t_defconfig | 5 +- configs/integratorap_cm926ejs_defconfig | 5 +- configs/integratorap_cm946es_defconfig| 5 +- configs/integratorcp_cm1136_defconfig | 5 +- configs/integratorcp_cm920t_defconfig | 5 +- configs/integratorcp_cm926ejs_defconfig | 5 +- configs/integratorcp_cm946es_defconfig| 5 +- include/configs/integrator-common.h | 2 - include/configs/integratorap.h| 1 - include/configs/integratorcp.h| 1 - 21 files changed, 81 insertions(+), 249 deletions(-) delete mode 100644 arch/arm/include/asm/arch-arm720t/hardware.h delete mode 100644 arch/arm/include/asm/arch-tegra114/hardware.h delete mode 100644 arch/arm/include/asm/arch-tegra124/hardware.h delete mode 100644 arch/arm/include/asm/arch-tegra20/hardware.h delete mode 100644 arch/arm/include/asm/arch-tegra30/hardware.h create mode 100644 arch/arm/mach-integrator/Kconfig delete mode 100644 board/armltd/integrator/Kconfig -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/5] ARM: ARM720t: remove empty asm/arch/hardware.h
arch/arm/cpu/arm720t/start.S includes asm/arch/hardware.h, but the hardware.h headers of ARM720T boards are all empty. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Cc: Linus Walleij linus.wall...@linaro.org Cc: Stephen Warren swar...@nvidia.com Cc: Tom Warren twar...@nvidia.com --- arch/arm/cpu/arm720t/start.S | 1 - arch/arm/include/asm/arch-arm720t/hardware.h | 17 - arch/arm/include/asm/arch-tegra114/hardware.h | 22 -- arch/arm/include/asm/arch-tegra124/hardware.h | 16 arch/arm/include/asm/arch-tegra20/hardware.h | 13 - arch/arm/include/asm/arch-tegra30/hardware.h | 22 -- 6 files changed, 91 deletions(-) delete mode 100644 arch/arm/include/asm/arch-arm720t/hardware.h delete mode 100644 arch/arm/include/asm/arch-tegra114/hardware.h delete mode 100644 arch/arm/include/asm/arch-tegra124/hardware.h delete mode 100644 arch/arm/include/asm/arch-tegra20/hardware.h delete mode 100644 arch/arm/include/asm/arch-tegra30/hardware.h diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index ec8e88d..0bb3441 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -9,7 +9,6 @@ #include asm-offsets.h #include config.h -#include asm/hardware.h /* * diff --git a/arch/arm/include/asm/arch-arm720t/hardware.h b/arch/arm/include/asm/arch-arm720t/hardware.h deleted file mode 100644 index 8ca42d9..000 --- a/arch/arm/include/asm/arch-arm720t/hardware.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef __ARM7_HW_H -#define __ARM7_HW_H - -/* - * Copyright (c) 2004 Cucy Systems (http://www.cucy.com) - * Curt Brune c...@cucy.com - * - * SPDX-License-Identifier:GPL-2.0+ - */ - -#if defined(CONFIG_INTEGRATOR) defined(CONFIG_ARCH_INTEGRATOR) -/* include IntegratorCP/CM720T specific hardware file if there was one */ -#else -#error No hardware file defined for this configuration -#endif - -#endif /* __ARM7_HW_H */ diff --git a/arch/arm/include/asm/arch-tegra114/hardware.h b/arch/arm/include/asm/arch-tegra114/hardware.h deleted file mode 100644 index c21fbb6..000 --- a/arch/arm/include/asm/arch-tegra114/hardware.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see http://www.gnu.org/licenses/. - */ - -#ifndef _TEGRA114_HARDWARE_H_ -#define _TEGRA114_HARDWARE_H_ - -/* include tegra specific hardware definitions */ - -#endif /* _TEGRA114_HARDWARE_H_ */ diff --git a/arch/arm/include/asm/arch-tegra124/hardware.h b/arch/arm/include/asm/arch-tegra124/hardware.h deleted file mode 100644 index 114fce8..000 --- a/arch/arm/include/asm/arch-tegra124/hardware.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * (C) Copyright 2013 - * NVIDIA Corporation www.nvidia.com - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _TEGRA124_HARDWARE_H_ -#define _TEGRA124_HARDWARE_H_ - -/* - * Include Tegra-specific hardware definitions - * Nothing needed currently for Tegra124 - */ - -#endif /* _TEGRA124_HARDWARE_H_ */ diff --git a/arch/arm/include/asm/arch-tegra20/hardware.h b/arch/arm/include/asm/arch-tegra20/hardware.h deleted file mode 100644 index a295894..000 --- a/arch/arm/include/asm/arch-tegra20/hardware.h +++ /dev/null @@ -1,13 +0,0 @@ -/* -* (C) Copyright 2010-2011 -* NVIDIA Corporation www.nvidia.com -* - * SPDX-License-Identifier:GPL-2.0+ -*/ - -#ifndef __TEGRA2_HW_H -#define __TEGRA2_HW_H - -/* include tegra specific hardware definitions */ - -#endif /* __TEGRA2_HW_H */ diff --git a/arch/arm/include/asm/arch-tegra30/hardware.h b/arch/arm/include/asm/arch-tegra30/hardware.h deleted file mode 100644 index b1a5aa9..000 --- a/arch/arm/include/asm/arch-tegra30/hardware.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have
[U-Boot] [PATCH 3/5] ARM: integrator: split board select into AP/CP select and CM select
Select integrator boards by the combination of platform select (AP/CP) and core module select (CM720T, CM920T, ...). This allows us to remove CONFIG_SYS_EXTRA_OPTIONS and make Kconfig much cleaner. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Cc: Linus Walleij linus.wall...@linaro.org --- arch/arm/mach-integrator/Kconfig| 57 +++-- configs/integratorap_cm720t_defconfig | 4 +-- configs/integratorap_cm920t_defconfig | 4 +-- configs/integratorap_cm926ejs_defconfig | 4 +-- configs/integratorap_cm946es_defconfig | 4 +-- configs/integratorcp_cm1136_defconfig | 4 +-- configs/integratorcp_cm920t_defconfig | 4 +-- configs/integratorcp_cm926ejs_defconfig | 4 +-- configs/integratorcp_cm946es_defconfig | 4 +-- 9 files changed, 41 insertions(+), 48 deletions(-) diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig index 4406399..6794660 100644 --- a/arch/arm/mach-integrator/Kconfig +++ b/arch/arm/mach-integrator/Kconfig @@ -2,40 +2,39 @@ menu Integrator Options depends on ARCH_INTEGRATOR choice - prompt ARM Ltd. Integrator board select + prompt Integrator platform select -config TARGET_INTEGRATORAP_CM720T - bool Support integratorap_cm720t - select CPU_ARM720T +config ARCH_INTEGRATOR_AP + bool Support Integrator/AP platform -config TARGET_INTEGRATORAP_CM920T - bool Support integratorap_cm920t - select CPU_ARM920T +config ARCH_INTEGRATOR_CP + bool Support Integrator/CP platform -config TARGET_INTEGRATORCP_CM920T - bool Support integratorcp_cm920t - select CPU_ARM920T +endchoice -config TARGET_INTEGRATORAP_CM926EJS - bool Support integratorap_cm926ejs - select CPU_ARM926EJS +choice + prompt Integrator core module select -config TARGET_INTEGRATORCP_CM926EJS - bool Support integratorcp_cm926ejs - select CPU_ARM926EJS +config CM720T + bool Core Module for ARM720T + select CPU_ARM720T -config TARGET_INTEGRATORCP_CM1136 - bool Support integratorcp_cm1136 - select CPU_ARM1136 +config CM920T + bool Core Module for ARM920T + select CPU_ARM920T -config TARGET_INTEGRATORAP_CM946ES - bool Support integratorap_cm946es - select CPU_ARM946ES +config CM926EJ_S + bool Core Module for ARM926EJ-STM + select CPU_ARM926EJS -config TARGET_INTEGRATORCP_CM946ES - bool Support integratorcp_cm946es +config CM946ES + bool Core Module for ARM946E-STM select CPU_ARM946ES +config CM1136 + bool Core Module for ARM1136JF-STM + select CPU_ARM1136 + endchoice config SYS_BOARD @@ -45,13 +44,7 @@ config SYS_VENDOR default armltd config SYS_CONFIG_NAME - default integratorap if TARGET_INTEGRATORAP_CM720T || \ - TARGET_INTEGRATORAP_CM920T || \ - TARGET_INTEGRATORAP_CM926EJS || \ - TARGET_INTEGRATORAP_CM946ES - default integratorcp if TARGET_INTEGRATORCP_CM920T || \ - TARGET_INTEGRATORCP_CM926EJS || \ - TARGET_INTEGRATORCP_CM946ES || \ - TARGET_INTEGRATORCP_CM1136 + default integratorap if ARCH_INTEGRATOR_AP + default integratorcp if ARCH_INTEGRATOR_CP endmenu diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig index 5c15d57..fc0dc67 100644 --- a/configs/integratorap_cm720t_defconfig +++ b/configs/integratorap_cm720t_defconfig @@ -1,4 +1,4 @@ -CONFIG_SYS_EXTRA_OPTIONS=CM720T CONFIG_ARM=y CONFIG_ARCH_INTEGRATOR=y -CONFIG_TARGET_INTEGRATORAP_CM720T=y +CONFIG_ARCH_INTEGRATOR_AP=y +CONFIG_CM720T=y diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig index d2a9a71..eb6afb9 100644 --- a/configs/integratorap_cm920t_defconfig +++ b/configs/integratorap_cm920t_defconfig @@ -1,4 +1,4 @@ -CONFIG_SYS_EXTRA_OPTIONS=CM920T CONFIG_ARM=y CONFIG_ARCH_INTEGRATOR=y -CONFIG_TARGET_INTEGRATORAP_CM920T=y +CONFIG_ARCH_INTEGRATOR_AP=y +CONFIG_CM920T=y diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig index af4cfa5..8667fcb 100644 --- a/configs/integratorap_cm926ejs_defconfig +++ b/configs/integratorap_cm926ejs_defconfig @@ -1,4 +1,4 @@ -CONFIG_SYS_EXTRA_OPTIONS=CM926EJ_S CONFIG_ARM=y CONFIG_ARCH_INTEGRATOR=y -CONFIG_TARGET_INTEGRATORAP_CM926EJS=y +CONFIG_ARCH_INTEGRATOR_AP=y +CONFIG_CM926EJ_S=y diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig index ee07206..1e8c157 100644 --- a/configs/integratorap_cm946es_defconfig +++ b/configs/integratorap_cm946es_defconfig @@ -1,4 +1,4 @@ -CONFIG_SYS_EXTRA_OPTIONS=CM946ES CONFIG_ARM=y CONFIG_ARCH_INTEGRATOR=y -CONFIG_TARGET_INTEGRATORAP_CM946ES=y +CONFIG_ARCH_INTEGRATOR_AP=y +CONFIG_CM946ES=y diff --git
[U-Boot] [PATCH 2/5] ARM: integrator: move board select into mach-integrator/Kconfig
The board/SoC select menu in arch/arm/Kconfig is still cluttered. Add ARCH_INTEGRATOR into arch/arm/Kconfig and move the board select under arch/arm/mach-integrator. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Cc: Linus Walleij linus.wall...@linaro.org --- arch/arm/Kconfig| 38 ++-- arch/arm/mach-integrator/Kconfig| 57 ++ board/armltd/integrator/Kconfig | 103 configs/integratorap_cm720t_defconfig | 1 + configs/integratorap_cm920t_defconfig | 1 + configs/integratorap_cm926ejs_defconfig | 1 + configs/integratorap_cm946es_defconfig | 1 + configs/integratorcp_cm1136_defconfig | 1 + configs/integratorcp_cm920t_defconfig | 1 + configs/integratorcp_cm926ejs_defconfig | 1 + configs/integratorcp_cm946es_defconfig | 1 + include/configs/integratorap.h | 1 - 12 files changed, 70 insertions(+), 137 deletions(-) create mode 100644 arch/arm/mach-integrator/Kconfig delete mode 100644 board/armltd/integrator/Kconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ac7a11b..8046d3e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -61,18 +61,6 @@ config SEMIHOSTING choice prompt Target select -config TARGET_INTEGRATORAP_CM720T - bool Support integratorap_cm720t - select CPU_ARM720T - -config TARGET_INTEGRATORAP_CM920T - bool Support integratorap_cm920t - select CPU_ARM920T - -config TARGET_INTEGRATORCP_CM920T - bool Support integratorcp_cm920t - select CPU_ARM920T - config ARCH_AT91 bool Atmel AT91 @@ -92,14 +80,6 @@ config TARGET_SMDK2410 bool Support smdk2410 select CPU_ARM920T -config TARGET_INTEGRATORAP_CM926EJS - bool Support integratorap_cm926ejs - select CPU_ARM926EJS - -config TARGET_INTEGRATORCP_CM926EJS - bool Support integratorcp_cm926ejs - select CPU_ARM926EJS - config TARGET_ASPENITE bool Support aspenite select CPU_ARM926EJS @@ -247,10 +227,6 @@ config ARCH_VERSATILE bool ARM Ltd. Versatile family select CPU_ARM926EJS -config TARGET_INTEGRATORCP_CM1136 - bool Support integratorcp_cm1136 - select CPU_ARM1136 - config TARGET_IMX31_PHYCORE bool Support imx31_phycore select CPU_ARM1136 @@ -299,14 +275,6 @@ config ARCH_BCM283X select DM_SERIAL select DM_GPIO -config TARGET_INTEGRATORAP_CM946ES - bool Support integratorap_cm946es - select CPU_ARM946ES - -config TARGET_INTEGRATORCP_CM946ES - bool Support integratorcp_cm946es - select CPU_ARM946ES - config TARGET_VEXPRESS_CA15_TC2 bool Support vexpress_ca15_tc2 select CPU_V7 @@ -461,6 +429,9 @@ config ARCH_HIGHBANK bool Calxeda Highbank select CPU_V7 +config ARCH_INTEGRATOR + bool ARM Ltd. Integrator family + config ARCH_KEYSTONE bool TI Keystone select CPU_V7 @@ -789,6 +760,8 @@ source arch/arm/cpu/armv7/exynos/Kconfig source arch/arm/mach-highbank/Kconfig +source arch/arm/mach-integrator/Kconfig + source arch/arm/mach-keystone/Kconfig source arch/arm/mach-kirkwood/Kconfig @@ -835,7 +808,6 @@ source board/Marvell/aspenite/Kconfig source board/Marvell/db-mv784mp-gp/Kconfig source board/Marvell/gplugd/Kconfig source board/armadeus/apf27/Kconfig -source board/armltd/integrator/Kconfig source board/armltd/vexpress/Kconfig source board/armltd/vexpress64/Kconfig source board/bachmann/ot1200/Kconfig diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig new file mode 100644 index 000..4406399 --- /dev/null +++ b/arch/arm/mach-integrator/Kconfig @@ -0,0 +1,57 @@ +menu Integrator Options + depends on ARCH_INTEGRATOR + +choice + prompt ARM Ltd. Integrator board select + +config TARGET_INTEGRATORAP_CM720T + bool Support integratorap_cm720t + select CPU_ARM720T + +config TARGET_INTEGRATORAP_CM920T + bool Support integratorap_cm920t + select CPU_ARM920T + +config TARGET_INTEGRATORCP_CM920T + bool Support integratorcp_cm920t + select CPU_ARM920T + +config TARGET_INTEGRATORAP_CM926EJS + bool Support integratorap_cm926ejs + select CPU_ARM926EJS + +config TARGET_INTEGRATORCP_CM926EJS + bool Support integratorcp_cm926ejs + select CPU_ARM926EJS + +config TARGET_INTEGRATORCP_CM1136 + bool Support integratorcp_cm1136 + select CPU_ARM1136 + +config TARGET_INTEGRATORAP_CM946ES + bool Support integratorap_cm946es + select CPU_ARM946ES + +config TARGET_INTEGRATORCP_CM946ES + bool Support integratorcp_cm946es + select CPU_ARM946ES + +endchoice + +config SYS_BOARD + default integrator + +config SYS_VENDOR + default armltd + +config SYS_CONFIG_NAME + default integratorap if TARGET_INTEGRATORAP_CM720T || \ + TARGET_INTEGRATORAP_CM920T || \ +
[U-Boot] [PATCH 5/5] ARM: integrator: remove CONFIG_ARCH_CINTEGRATOR
This macro is not referenced at all. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Cc: Linus Walleij linus.wall...@linaro.org --- include/configs/integratorcp.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index 7c1ef24..7518b60 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -18,7 +18,6 @@ #include integrator-common.h /* Integrator CP-specific configuration */ -#define CONFIG_ARCH_CINTEGRATOR #define CONFIG_SYS_HZ_CLOCK100 /* Timer 1 is clocked at 1Mhz */ /* -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v7 02/17] sun7i: Remove duplicate call to psci_arch_init
This is already invoked a few cycles later in monitor mode by _secure_monitor (_sunxi_cpu_entry calls _do_nonsec_entry which triggers _secure_monitor via smc #0). Drop it here, it serves no purpose. CC: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Jan Kiszka jan.kis...@siemens.com Reviewed-by: Tom Rini tr...@konsulko.com Reviewed-by: Thierry Reding tred...@nvidia.com Tested-by: Thierry Reding tred...@nvidia.com Tested-by: Ian Campbell i...@hellion.org.uk Tested-by: Hans de Goede hdego...@redhat.com --- arch/arm/cpu/armv7/sunxi/psci.S | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/cpu/armv7/sunxi/psci.S b/arch/arm/cpu/armv7/sunxi/psci.S index e0a524e..07b2d76 100644 --- a/arch/arm/cpu/armv7/sunxi/psci.S +++ b/arch/arm/cpu/armv7/sunxi/psci.S @@ -254,7 +254,6 @@ _sunxi_cpu_entry: isb bl _nonsec_init - bl psci_arch_init adr r0, _target_pc ldr r0, [r0] -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v7 08/17] tegra124: Add more registers to struct mc_ctlr
From: Ian Campbell i...@hellion.org.uk
I will need mc_security_cfg0/1 in a future patch and I added the rest while
debugging, so thought I might as well commit them.
Signed-off-by: Ian Campbell i...@hellion.org.uk
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
Reviewed-by: Tom Rini tr...@konsulko.com
Reviewed-by: Thierry Reding tred...@nvidia.com
Tested-by: Thierry Reding tred...@nvidia.com
Tested-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/include/asm/arch-tegra124/mc.h | 35 +++--
1 file changed, 33 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-tegra124/mc.h
b/arch/arm/include/asm/arch-tegra124/mc.h
index d526dfe..5557732 100644
--- a/arch/arm/include/asm/arch-tegra124/mc.h
+++ b/arch/arm/include/asm/arch-tegra124/mc.h
@@ -35,9 +35,40 @@ struct mc_ctlr {
u32 mc_emem_adr_cfg;/* offset 0x54 */
u32 mc_emem_adr_cfg_dev0; /* offset 0x58 */
u32 mc_emem_adr_cfg_dev1; /* offset 0x5C */
- u32 reserved3[12]; /* offset 0x60 - 0x8C */
+ u32 reserved3[4]; /* offset 0x60 - 0x6C */
+ u32 mc_security_cfg0; /* offset 0x70 */
+ u32 mc_security_cfg1; /* offset 0x74 */
+ u32 reserved4[6]; /* offset 0x7C - 0x8C */
u32 mc_emem_arb_reserved[28]; /* offset 0x90 - 0xFC */
- u32 reserved4[338]; /* offset 0x100 - 0x644 */
+ u32 reserved5[74]; /* offset 0x100 - 0x224 */
+ u32 mc_smmu_translation_enable_0; /* offset 0x228 */
+ u32 mc_smmu_translation_enable_1; /* offset 0x22C */
+ u32 mc_smmu_translation_enable_2; /* offset 0x230 */
+ u32 mc_smmu_translation_enable_3; /* offset 0x234 */
+ u32 mc_smmu_afi_asid; /* offset 0x238 */
+ u32 mc_smmu_avpc_asid; /* offset 0x23C */
+ u32 mc_smmu_dc_asid;/* offset 0x240 */
+ u32 mc_smmu_dcb_asid; /* offset 0x244 */
+ u32 reserved6[2]; /* offset 0x248 - 0x24C */
+ u32 mc_smmu_hc_asid;/* offset 0x250 */
+ u32 mc_smmu_hda_asid; /* offset 0x254 */
+ u32 mc_smmu_isp2_asid; /* offset 0x258 */
+ u32 reserved7[2]; /* offset 0x25C - 0x260 */
+ u32 mc_smmu_msenc_asid; /* offset 0x264 */
+ u32 mc_smmu_nv_asid;/* offset 0x268 */
+ u32 mc_smmu_nv2_asid; /* offset 0x26C */
+ u32 mc_smmu_ppcs_asid; /* offset 0x270 */
+ u32 mc_smmu_sata_asid; /* offset 0x274 */
+ u32 reserved8[1]; /* offset 0x278 */
+ u32 mc_smmu_vde_asid; /* offset 0x27C */
+ u32 mc_smmu_vi_asid;/* offset 0x280 */
+ u32 mc_smmu_vic_asid; /* offset 0x284 */
+ u32 mc_smmu_xusb_host_asid; /* offset 0x288 */
+ u32 mc_smmu_xusb_dev_asid; /* offset 0x28C */
+ u32 reserved9[1]; /* offset 0x290 */
+ u32 mc_smmu_tsec_asid; /* offset 0x294 */
+ u32 mc_smmu_ppcs1_asid; /* offset 0x298 */
+ u32 reserved10[235];/* offset 0x29C - 0x644 */
u32 mc_video_protect_bom; /* offset 0x648 */
u32 mc_video_protect_size_mb; /* offset 0x64c */
u32 mc_video_protect_reg_ctrl; /* offset 0x650 */
--
2.1.4
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[U-Boot] [PATCH v7 04/17] ARM: Factor out reusable psci_cpu_off_common
Move parts of sunxi's psci_cpu_off into psci_cpu_off_common, namely
cache disabling and flushing, clrex and the disabling of SMP for the
dying CPU. These steps are apparently generic for ARMv7 and will be
reused for Tegra124 support.
As the way of disabled SMP is not architectural, though commonly done
via ACLTR, the related function can be overloaded.
CC: Marc Zyngier marc.zyng...@arm.com
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
Reviewed-by: Tom Rini tr...@konsulko.com
Reviewed-by: Thierry Reding tred...@nvidia.com
Tested-by: Thierry Reding tred...@nvidia.com
Tested-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/psci.S | 77 +
arch/arm/cpu/armv7/sunxi/psci.S | 63 +
2 files changed, 78 insertions(+), 62 deletions(-)
diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
index 12ad09b..cdcdccd 100644
--- a/arch/arm/cpu/armv7/psci.S
+++ b/arch/arm/cpu/armv7/psci.S
@@ -107,4 +107,81 @@ ENTRY(psci_get_cpu_id)
ENDPROC(psci_get_cpu_id)
.weak psci_get_cpu_id
+/* Imported from Linux kernel */
+LENTRY(v7_flush_dcache_all)
+ dmb @ ensure ordering with previous
memory accesses
+ mrc p15, 1, r0, c0, c0, 1 @ read clidr
+ andsr3, r0, #0x700 @ extract loc from clidr
+ mov r3, r3, lsr #23 @ left align loc bit field
+ beq finished@ if loc is 0, then no need to
clean
+ mov r10, #0 @ start clean at cache level 0
+flush_levels:
+ add r2, r10, r10, lsr #1@ work out 3x current cache
level
+ mov r1, r0, lsr r2 @ extract cache type bits from
clidr
+ and r1, r1, #7 @ mask of the bits for current
cache only
+ cmp r1, #2 @ see what cache we have at
this level
+ blt skip@ skip if no cache, or just
i-cache
+ mrs r9, cpsr@ make cssrcsidr read atomic
+ mcr p15, 2, r10, c0, c0, 0 @ select current cache level in
cssr
+ isb @ isb to sych the new cssrcsidr
+ mrc p15, 1, r1, c0, c0, 0 @ read the new csidr
+ msr cpsr_c, r9
+ and r2, r1, #7 @ extract the length of the
cache lines
+ add r2, r2, #4 @ add 4 (line length offset)
+ ldr r4, =0x3ff
+ andsr4, r4, r1, lsr #3 @ find maximum number on the
way size
+ clz r5, r4 @ find bit position of way size
increment
+ ldr r7, =0x7fff
+ andsr7, r7, r1, lsr #13 @ extract max number of the
index size
+loop1:
+ mov r9, r7 @ create working copy of max
index
+loop2:
+ orr r11, r10, r4, lsl r5@ factor way and cache number
into r11
+ orr r11, r11, r9, lsl r2@ factor index number into r11
+ mcr p15, 0, r11, c7, c14, 2 @ clean invalidate by set/way
+ subsr9, r9, #1 @ decrement the index
+ bge loop2
+ subsr4, r4, #1 @ decrement the way
+ bge loop1
+skip:
+ add r10, r10, #2@ increment cache number
+ cmp r3, r10
+ bgt flush_levels
+finished:
+ mov r10, #0 @ swith back to cache level 0
+ mcr p15, 2, r10, c0, c0, 0 @ select current cache level in
cssr
+ dsb st
+ isb
+ bx lr
+ENDPROC(v7_flush_dcache_all)
+
+ENTRY(psci_disable_smp)
+ mrc p15, 0, r0, c1, c0, 1 @ ACTLR
+ bic r0, r0, #(1 6) @ Clear SMP bit
+ mcr p15, 0, r0, c1, c0, 1 @ ACTLR
+ isb
+ dsb
+ bx lr
+ENDPROC(psci_disable_smp)
+.weak psci_disable_smp
+
+ENTRY(psci_cpu_off_common)
+ push{lr}
+
+ mrc p15, 0, r0, c1, c0, 0 @ SCTLR
+ bic r0, r0, #(1 2) @ Clear C bit
+ mcr p15, 0, r0, c1, c0, 0 @ SCTLR
+ isb
+ dsb
+
+ bl v7_flush_dcache_all
+
+ clrex @ Why???
+
+ bl psci_disable_smp
+
+ pop {lr}
+ bx lr
+ENDPROC(psci_cpu_off_common)
+
.popsection
diff --git a/arch/arm/cpu/armv7/sunxi/psci.S b/arch/arm/cpu/armv7/sunxi/psci.S
index bcc419d..05d047b 100644
--- a/arch/arm/cpu/armv7/sunxi/psci.S
+++ b/arch/arm/cpu/armv7/sunxi/psci.S
@@ -200,53 +200,6 @@ psci_cpu_on:
_target_pc:
.word 0
-/* Imported from Linux kernel */
-v7_flush_dcache_all:
- dmb @ ensure ordering with previous
memory accesses
- mrc
[U-Boot] [PATCH v7 09/17] virt-dt: Allow reservation of secure region when in a RAM carveout
In this case the secure code lives in RAM, and hence the memory node in
the device tree needs to be adjusted. This avoids that the OS will map
and possibly access the reservation.
Add support for setting CONFIG_ARMV7_SECURE_RESERVE_SIZE to carve out
such a region. We only support cutting off memory from the beginning or
the end of a RAM bank as we do not want to increase their number (which
would happen if punching a hole) for simplicity reasons
This will be used in a subsequent patch for Jetson-TK1.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/arm/cpu/armv7/virt-dt.c | 29 +
arch/arm/include/asm/armv7.h | 1 +
arch/arm/lib/bootm-fdt.c | 6 ++
3 files changed, 36 insertions(+)
diff --git a/arch/arm/cpu/armv7/virt-dt.c b/arch/arm/cpu/armv7/virt-dt.c
index cab..32c368f 100644
--- a/arch/arm/cpu/armv7/virt-dt.c
+++ b/arch/arm/cpu/armv7/virt-dt.c
@@ -16,6 +16,7 @@
*/
#include common.h
+#include errno.h
#include stdio_dev.h
#include linux/ctype.h
#include linux/types.h
@@ -88,6 +89,34 @@ static int fdt_psci(void *fdt)
return 0;
}
+int armv7_apply_memory_carveout(u64 *start, u64 *size)
+{
+#ifdef CONFIG_ARMV7_SECURE_RESERVE_SIZE
+ if (*start + *size CONFIG_ARMV7_SECURE_BASE ||
+ *start = (u64)CONFIG_ARMV7_SECURE_BASE +
+ CONFIG_ARMV7_SECURE_RESERVE_SIZE)
+ return 0;
+
+ /* carveout must be at the beginning or the end of the bank */
+ if (*start == CONFIG_ARMV7_SECURE_BASE ||
+ *start + *size == (u64)CONFIG_ARMV7_SECURE_BASE +
+ CONFIG_ARMV7_SECURE_RESERVE_SIZE) {
+ if (*size CONFIG_ARMV7_SECURE_RESERVE_SIZE) {
+ debug(Secure monitor larger than RAM bank!?\n);
+ return -EINVAL;
+ }
+ *size -= CONFIG_ARMV7_SECURE_RESERVE_SIZE;
+ if (*start == CONFIG_ARMV7_SECURE_BASE)
+ *start += CONFIG_ARMV7_SECURE_RESERVE_SIZE;
+ return 0;
+ }
+ debug(Secure monitor not located at beginning or end of RAM bank\n);
+ return -EINVAL;
+#else /* !CONFIG_ARMV7_SECURE_RESERVE_SIZE */
+ return 0;
+#endif
+}
+
int psci_update_dt(void *fdt)
{
#ifdef CONFIG_ARMV7_NONSEC
diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
index 2bb1253..33357db 100644
--- a/arch/arm/include/asm/armv7.h
+++ b/arch/arm/include/asm/armv7.h
@@ -124,6 +124,7 @@ void v7_outer_cache_inval_range(u32 start, u32 end);
#ifdef CONFIG_ARMV7_NONSEC
int armv7_init_nonsec(void);
+int armv7_apply_memory_carveout(u64 *start, u64 *size);
bool armv7_boot_nonsec(void);
/* defined in assembly file */
diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index 49ba691..0eb10a8 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -17,6 +17,7 @@
#include common.h
#include fdt_support.h
+#include asm/armv7.h
#include asm/psci.h
DECLARE_GLOBAL_DATA_PTR;
@@ -31,6 +32,11 @@ int arch_fixup_fdt(void *blob)
for (bank = 0; bank CONFIG_NR_DRAM_BANKS; bank++) {
start[bank] = bd-bi_dram[bank].start;
size[bank] = bd-bi_dram[bank].size;
+#ifdef CONFIG_ARMV7_NONSEC
+ ret = armv7_apply_memory_carveout(start[bank], size[bank]);
+ if (ret)
+ return ret;
+#endif
}
ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
--
2.1.4
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[U-Boot] [PATCH v7 10/17] tegra: Make tegra_powergate_power_on public
Will be used for unpowergating CPUs.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
Reviewed-by: Tom Rini tr...@konsulko.com
Reviewed-by: Thierry Reding tred...@nvidia.com
Tested-by: Thierry Reding tred...@nvidia.com
Tested-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/include/asm/arch-tegra/powergate.h | 1 +
arch/arm/mach-tegra/powergate.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-tegra/powergate.h
b/arch/arm/include/asm/arch-tegra/powergate.h
index 130b58b..2e491f1 100644
--- a/arch/arm/include/asm/arch-tegra/powergate.h
+++ b/arch/arm/include/asm/arch-tegra/powergate.h
@@ -33,6 +33,7 @@ enum tegra_powergate {
int tegra_powergate_sequence_power_up(enum tegra_powergate id,
enum periph_id periph);
+int tegra_powergate_power_on(enum tegra_powergate id);
int tegra_powergate_power_off(enum tegra_powergate id);
#endif
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index 439cff3..6331cd4 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -44,7 +44,7 @@ static int tegra_powergate_set(enum tegra_powergate id, bool
state)
return -ETIMEDOUT;
}
-static int tegra_powergate_power_on(enum tegra_powergate id)
+int tegra_powergate_power_on(enum tegra_powergate id)
{
return tegra_powergate_set(id, true);
}
--
2.1.4
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[U-Boot] [PATCH v7 06/17] ARM: Factor out reusable psci_get_cpu_stack_top
This algorithm will be useful on Tegra as well, plus we will need it for making _psci_target_pc per-CPU. CC: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Jan Kiszka jan.kis...@siemens.com Reviewed-by: Tom Rini tr...@konsulko.com Reviewed-by: Thierry Reding tred...@nvidia.com Tested-by: Thierry Reding tred...@nvidia.com Tested-by: Ian Campbell i...@hellion.org.uk --- arch/arm/cpu/armv7/psci.S | 14 ++ arch/arm/cpu/armv7/sunxi/psci.S | 15 +-- 2 files changed, 19 insertions(+), 10 deletions(-) diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S index 7d89b43..18d85c4 100644 --- a/arch/arm/cpu/armv7/psci.S +++ b/arch/arm/cpu/armv7/psci.S @@ -193,6 +193,20 @@ ENTRY(psci_cpu_off_common) bx lr ENDPROC(psci_cpu_off_common) +@ expects CPU ID in r0 and returns stack top in r0 +ENTRY(psci_get_cpu_stack_top) + mov r5, #0x400 @ 1kB of stack per CPU + mul r0, r0, r5 + + ldr r5, =psci_text_end @ end of monitor text + add r5, r5, #0x2000 @ Skip two pages + lsr r5, r5, #12 @ Align to start of page + lsl r5, r5, #12 + sub r0, r5, r0 @ here's our stack! + + bx lr +ENDPROC(psci_get_cpu_stack_top) + ENTRY(psci_cpu_entry) bl psci_enable_smp diff --git a/arch/arm/cpu/armv7/sunxi/psci.S b/arch/arm/cpu/armv7/sunxi/psci.S index 90dcff1..dd583b2 100644 --- a/arch/arm/cpu/armv7/sunxi/psci.S +++ b/arch/arm/cpu/armv7/sunxi/psci.S @@ -241,17 +241,12 @@ psci_arch_init: mcr p15, 0, r5, c1, c1, 0 @ Write SCR isb - bl psci_get_cpu_id - mov r5, #0x400 @ 1kB of stack per CPU - mul r0, r0, r5 - - adr r5, text_end@ end of text - add r5, r5, #0x2000 @ Skip two pages - lsr r5, r5, #12 @ Align to start of page - lsl r5, r5, #12 - sub sp, r5, r0 @ here's our stack! + bl psci_get_cpu_id @ CPU ID = r0 + bl psci_get_cpu_stack_top @ stack top = r0 + mov sp, r0 bx r6 -text_end: + .globl psci_text_end +psci_text_end: .popsection -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 02/10] board_init_f_mem(): Don't require memset()
Hi Simon, 2015-04-16 10:14 GMT+09:00 Simon Glass s...@chromium.org: Unfortunately memset() is not always available, so provide a substitute when needed. Signed-off-by: Simon Glass s...@chromium.org --- common/init/global_data.c | 8 1 file changed, 8 insertions(+) diff --git a/common/init/global_data.c b/common/init/global_data.c index 2633f0d..ef055c4 100644 --- a/common/init/global_data.c +++ b/common/init/global_data.c @@ -21,7 +21,15 @@ ulong board_init_f_mem(ulong top) top -= sizeof(struct global_data); top = ALIGN(top, 16); gd = (struct global_data *)top; +#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBGENERIC_SUPPORT) memset((void *)gd, '\0', sizeof(*gd)); +#else + int *ptr = (int *)gd; + int *end = (int *)(gd + 1); + + while (ptr end) + *ptr++ = 0; +#endif #ifdef CONFIG_SYS_MALLOC_F_LEN top -= CONFIG_SYS_MALLOC_F_LEN; This patch implies that all the SPLs should have memset(). Is it better to build lib/ unconditionally? I posted a patch to do so. Please consider to use it as a prerequisite for cleaning up 01/10 and 02/10. -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mpc85xx/T1042D4RDB: Select DIU in cpld mux for T1042D4RDB
From: Wang Dongsheng dongsheng.w...@freescale.com Base on CPLD changes, so DIU switch channel also need to fix. Signed-off-by: Wang Dongsheng dongsheng.w...@freescale.com --- This patch depends on T1042D4RDB platform code patches. Priyanka Jain has send T1042D4RDB patches to upstrem, but I cannot found them in U-boot patchworks. So just comments in this patch. diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index f4006ee..baccbb5 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -288,8 +288,11 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CPLD_LBMAP_DFLTBANK0x40 /* BANK OR | BANK0 */ #define CPLD_LBMAP_RESET 0xFF #define CPLD_LBMAP_SHIFT 0x03 -#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB) + +#if defined(CONFIG_T1042RDB_PI) #define CPLD_DIU_SEL_DFP 0x80 +#elif defined(CONFIG_T1042D4RDB) +#define CPLD_DIU_SEL_DFP 0xc0 #endif #define CONFIG_SYS_CPLD_BASE 0xffdf @@ -458,7 +461,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 -#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB) +#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T1042D4RDB) /* Video */ #define CONFIG_FSL_DIU_FB -- 2.1.0.27.g96db324 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mpc85xx/T1042D4RDB: Select DIU in cpld mux for T1042D4RDB
Hi all, Sorry, please ignore this patch. The description of my patch is incorrect. I will change patchworks status. Sorry again. Regards, -Dongsheng -Original Message- From: Dongsheng Wang [mailto:dongsheng.w...@freescale.com] Sent: Tuesday, April 21, 2015 12:09 PM To: Sun York-R58495; Kushwaha Prabhakar-B32579; Jain Priyanka-B32167 Cc: Jin Zhengxiong-R64188; u-boot@lists.denx.de; Wang Dongsheng-B40534 Subject: [PATCH] mpc85xx/T1042D4RDB: Select DIU in cpld mux for T1042D4RDB From: Wang Dongsheng dongsheng.w...@freescale.com Base on CPLD changes, so DIU switch channel also need to fix. Signed-off-by: Wang Dongsheng dongsheng.w...@freescale.com --- This patch depends on T1042D4RDB platform code patches. Priyanka Jain has send T1042D4RDB patches to upstrem, but I cannot found them in U-boot patchworks. So just comments in this patch. diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index f4006ee..baccbb5 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -288,8 +288,11 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CPLD_LBMAP_DFLTBANK 0x40 /* BANK OR | BANK0 */ #define CPLD_LBMAP_RESET 0xFF #define CPLD_LBMAP_SHIFT 0x03 -#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB) + +#if defined(CONFIG_T1042RDB_PI) #define CPLD_DIU_SEL_DFP 0x80 +#elif defined(CONFIG_T1042D4RDB) +#define CPLD_DIU_SEL_DFP 0xc0 #endif #define CONFIG_SYS_CPLD_BASE 0xffdf @@ -458,7 +461,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 -#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB) +#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T1042D4RDB) /* Video */ #define CONFIG_FSL_DIU_FB -- 2.1.0.27.g96db324 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] arm: mx6: Clamp MMDC and DDR3 clocks for timing calculations
On Thu, Apr 16, 2015 at 3:36 PM, Nikolay Dimitrov picmas...@mail.bg wrote: This is proposal for clamping the MMDC/DDR3 clocks to the maximum supported frequencies as per imx6 SOC models, and for dynamically calculating valid clock value based on mem_speed. Currently the code uses impossible values for mem_speed (1333, 1600 MT/s) for calculating the DDR timings, and uses fixed clock (528 or 400 MHz) which doesn't take into account DDR3 memory limitations. Signed-off-by: Nikolay Dimitrov picmas...@mail.bg Cc: Fabio Estevam feste...@gmail.com Cc: Stefano Babic sba...@denx.de Cc: Tim Harvey thar...@gateworks.com Cc: Eric Nelson eric.nel...@boundarydevices.com Nikolay, Makes sense to me. Acked-by: Tim Harvey thar...@gateworks.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 9/9] sandbox: add config_distro_defaults and config_distro_bootcmd
Hi Sjoerd, On Mon, Apr 13, 2015 at 3:54 PM, Sjoerd Simons sjoerd.sim...@collabora.co.uk wrote: Make the sandbox setup more generic/examplary by including config_distro_defaults.h and config_distro_bootcmd.h. Among other things this makes it easy to test whether images will boot though with the standard distro bootcmds by running e.g: u-boot -c 'host bind 0 myimage.img ; boot' By default there are 2 target host devices to emulate device with multiple storage devices (e.g. internal (host 0) and external (host 1) and verify that the prioritization and fallbacks do work correctly. Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk Reviewed by: Simon Glass s...@chromium.org Acked-by: Simon Glass s...@chromium.org For me this has broken the build of the env target. I get this following error: In file included from /home/joe/u-boot/tools/env/fw_env.c:117: /usr/include/search.h:173: error: expected } before BOOT_TARGET_DEVICES_references_HOST_without_CONFIG_SANDBOX make[2]: *** [tools/env/fw_env.o] Error 1 make[1]: *** [env] Error 2 make: *** [sub-make] Error 2 I haven't looked closely at the header you've added. Any quick thoughts about what's going on? Thanks, -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 02/10] board_init_f_mem(): Don't require memset()
2015-04-21 12:47 GMT+09:00 Simon Glass s...@chromium.org: Hi Masahiro, On 20 April 2015 at 21:42, Masahiro Yamada yamada.masah...@socionext.com wrote: Hi Simon, 2015-04-16 10:14 GMT+09:00 Simon Glass s...@chromium.org: Unfortunately memset() is not always available, so provide a substitute when needed. Signed-off-by: Simon Glass s...@chromium.org --- common/init/global_data.c | 8 1 file changed, 8 insertions(+) diff --git a/common/init/global_data.c b/common/init/global_data.c index 2633f0d..ef055c4 100644 --- a/common/init/global_data.c +++ b/common/init/global_data.c @@ -21,7 +21,15 @@ ulong board_init_f_mem(ulong top) top -= sizeof(struct global_data); top = ALIGN(top, 16); gd = (struct global_data *)top; +#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBGENERIC_SUPPORT) memset((void *)gd, '\0', sizeof(*gd)); +#else + int *ptr = (int *)gd; + int *end = (int *)(gd + 1); + + while (ptr end) + *ptr++ = 0; +#endif #ifdef CONFIG_SYS_MALLOC_F_LEN top -= CONFIG_SYS_MALLOC_F_LEN; This patch implies that all the SPLs should have memset(). Is it better to build lib/ unconditionally? I posted a patch to do so. Please consider to use it as a prerequisite for cleaning up 01/10 and 02/10. That would be better I think - how did you manage it? I cannot see the patch you are referring to. It is under moderation because of too many recipients. (I think you have already received it because you were listed in CC.) Please wait until it is approved. Although what about if SPL is very close to the maximum size and adding memset() makes it too large? I suppose in that case we would get a build error and notice the problem? Buildman-test passed, but I am not sure about run-test. For those boards that define CONFIG_SPL_MAX_SIZE, CONFIG_SPL_MAX_FOOTPRINT etc., we should notice the problem at the build time. (and it did not occur.) I'd like to encourage the board maintainers to do run-test just in case. (and also to support such CONFIG options for boards with the limited memory footprint) -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] fdt: add new fdt_fixup_display function to configure display
On Thu, Apr 9, 2015 at 10:56 AM, Simon Glass s...@chromium.org wrote: Hi Tim, On 8 April 2015 at 12:45, Tim Harvey thar...@gateworks.com wrote: Add 'fdt_fixup_display' function to fixup device-tree native-mode property of display-timings node to select timings for a specific display. This is useful if a device-tree has configurations for multiple display timings for undetectable displays. see kernel Documentation/devicetree/bindings/video/display-timing.txt Signed-off-by: Tim Harvey thar...@gateworks.com --- v2: - use explicit error code - return fdt_setprop_u32 to all error checking by caller - add comments to function prototype - added more verbosity to commit log --- common/fdt_support.c | 29 + include/fdt_support.h | 13 + 2 files changed, 42 insertions(+) Acked-by: Simon Glass s...@chromium.org Simon, I thought you were the maintainer for common/fdt_support.c. Can you commit this or do I need anyone else's ack? It's a dependency of a set of IMX patches that Stefano is waiting on. Regards, Tim ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] SPDX: add X11 SPDX-License-Identifier
These is a growing trend to license DT files dual GPL and X11 especially in the Linux community. It allows easier reuse of device trees for other software projects. This commit prepares for doing so in U-Boot too, since DT files are often copied from the kernel to U-Boot. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- Licenses/README | 1 + Licenses/x11.txt | 25 + 2 files changed, 26 insertions(+) create mode 100644 Licenses/x11.txt diff --git a/Licenses/README b/Licenses/README index fe6dadc..1b43cee 100644 --- a/Licenses/README +++ b/Licenses/README @@ -67,3 +67,4 @@ BSD 3-clause New or Revised License BSD-3-ClauseY bsd-3-clause.txthttp:/ IBM PIBS (PowerPC Initialization and IBM-pibs ibm-pibs.txt Boot Software) license ISC LicenseISC Y isc.txt https://spdx.org/licenses/ISC +X11 LicenseX11 x11.txt https://spdx.org/licenses/X11.html diff --git a/Licenses/x11.txt b/Licenses/x11.txt new file mode 100644 index 000..23a3c63 --- /dev/null +++ b/Licenses/x11.txt @@ -0,0 +1,25 @@ +X11 License +Copyright (C) 1996 X Consortium + +Permission is hereby granted, free of charge, to any person obtaining a copy of +this software and associated documentation files (the Software), to deal in +the Software without restriction, including without limitation the rights to +use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies +of the Software, and to permit persons to whom the Software is furnished to do +so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE X +CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN +ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +Except as contained in this notice, the name of the X Consortium shall not be +used in advertising or otherwise to promote the sale, use or other dealings in +this Software without prior written authorization from the X Consortium. + +X Window System is a trademark of X Consortium, Inc. -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 06/20] dm: rtc: Rename gregorian day function
Hello Simon,
Am 20.04.2015 20:37, schrieb Simon Glass:
Change this function name to something more descriptive. Also return a
failure code if it cannot calculate a correct value.
Signed-off-by: Simon Glass s...@chromium.org
---
common/cmd_date.c| 2 +-
drivers/rtc/date.c | 9 +++--
drivers/rtc/ds1306.c | 2 +-
include/rtc.h| 12 +++-
4 files changed, 20 insertions(+), 5 deletions(-)
Acked-by: Heiko Schocher h...@denx.de
bye,
Heiko
diff --git a/common/cmd_date.c b/common/cmd_date.c
index e349166..3b7ac3e 100644
--- a/common/cmd_date.c
+++ b/common/cmd_date.c
@@ -196,7 +196,7 @@ int mk_date (const char *datestr, struct rtc_time *tmp)
tmp-tm_min = val;
/* calculate day of week */
- GregorianDay (tmp);
+ rtc_calc_weekday(tmp);
return (0);
default:
diff --git a/drivers/rtc/date.c b/drivers/rtc/date.c
index 15e6db0..2000565 100644
--- a/drivers/rtc/date.c
+++ b/drivers/rtc/date.c
@@ -11,6 +11,7 @@
#include common.h
#include command.h
+#include errno.h
#include rtc.h
#if defined(CONFIG_CMD_DATE) || defined(CONFIG_TIMESTAMP)
@@ -30,13 +31,15 @@ static int month_days[12] = {
/*
* This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
*/
-void GregorianDay(struct rtc_time * tm)
+int rtc_calc_weekday(struct rtc_time *tm)
{
int leapsToDate;
int lastYear;
int day;
int MonthOffset[] = { 0,31,59,90,120,151,181,212,243,273,304,334 };
+ if (tm-tm_year 1753)
+ return -EINVAL;
lastYear=tm-tm_year-1;
/*
@@ -64,6 +67,8 @@ void GregorianDay(struct rtc_time * tm)
day += lastYear*365 + leapsToDate + MonthOffset[tm-tm_mon-1] +
tm-tm_mday;
tm-tm_wday=day%7;
+
+ return 0;
}
void to_tm(int tim, struct rtc_time * tm)
@@ -101,7 +106,7 @@ void to_tm(int tim, struct rtc_time * tm)
/*
* Determine the day of week
*/
- GregorianDay(tm);
+ rtc_calc_weekday(tm);
}
/* Converts Gregorian date to seconds since 1970-01-01 00:00:00.
diff --git a/drivers/rtc/ds1306.c b/drivers/rtc/ds1306.c
index 1ec1837..3fe6721 100644
--- a/drivers/rtc/ds1306.c
+++ b/drivers/rtc/ds1306.c
@@ -110,7 +110,7 @@ int rtc_get (struct rtc_time *tmp)
immap-im_cpm.cp_pbdat = ~PB_SPI_CE;/* Disable DS1306 Chip */
udelay (10);
- GregorianDay (tmp); /* Determine the day of week */
+ rtc_calc_weekday(tmp); /* Determine the day of week */
debug (Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n,
tmp-tm_year, tmp-tm_mon, tmp-tm_mday, tmp-tm_wday,
diff --git a/include/rtc.h b/include/rtc.h
index 54e361e..96c696a 100644
--- a/include/rtc.h
+++ b/include/rtc.h
@@ -45,7 +45,6 @@ int rtc_get (struct rtc_time *);
int rtc_set (struct rtc_time *);
void rtc_reset (void);
-void GregorianDay (struct rtc_time *);
void to_tm (int, struct rtc_time *);
unsigned long mktime (unsigned int, unsigned int, unsigned int,
unsigned int, unsigned int, unsigned int);
@@ -87,4 +86,15 @@ void rtc_write32(int reg, u32 value);
*/
void rtc_init(void);
+/**
+ * rtc_calc_weekday() - Work out the weekday from a time
+ *
+ * This only works for the Gregorian calendar - i.e. after 1752 (in the UK).
+ * It sets time-tm_wdaay to the correct day of the week.
+ *
+ * @time: Time to inspect. tm_wday is updated
+ * @return 0 if OK, -EINVAL if the weekday could not be determined
+ */
+int rtc_calc_weekday(struct rtc_time *time);
+
#endif/* _RTC_H_ */
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
___
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[U-Boot] [PATCH v7 01/17] ARM: Clean up CONFIG_ARMV7_NONSEC/VIRT/PSCI conditions
CONFIG_ARMV7_VIRT depends on CONFIG_ARMV7_NONSEC, thus doesn't need to
be taken into account additionally. CONFIG_ARMV7_PSCI is only set on
boards that support CONFIG_ARMV7_NONSEC, and it only works on those.
CC: Tang Yuantian yuantian.t...@freescale.com
CC: York Sun york...@freescale.com
CC: Steve Rae s...@broadcom.com
CC: Andre Przywara andre.przyw...@linaro.org
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/arm/cpu/armv7/Makefile | 2 +-
arch/arm/cpu/armv7/ls102xa/cpu.c| 2 +-
arch/arm/cpu/armv7/virt-dt.c| 2 +-
arch/arm/cpu/u-boot.lds | 2 +-
arch/arm/include/asm/armv7.h| 4 ++--
arch/arm/lib/bootm-fdt.c| 2 +-
arch/arm/lib/bootm.c| 6 +++---
board/armltd/vexpress/vexpress_common.c | 2 +-
board/broadcom/bcm_ep/board.c | 2 +-
board/freescale/common/arm_sleep.c | 2 +-
10 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 21fc03b..fbd0bf3 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -18,7 +18,7 @@ obj-y += lowlevel_init.o
endif
endif
-ifneq ($(CONFIG_ARMV7_NONSEC)$(CONFIG_ARMV7_VIRT),)
+ifneq ($(CONFIG_ARMV7_NONSEC),)
obj-y += nonsec_virt.o
obj-y += virt-v7.o
obj-y += virt-dt.o
diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c
index 1a640bb..75f0d8c 100644
--- a/arch/arm/cpu/armv7/ls102xa/cpu.c
+++ b/arch/arm/cpu/armv7/ls102xa/cpu.c
@@ -329,7 +329,7 @@ int arch_cpu_init(void)
return 0;
}
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
/* Set the address at which the secondary core starts from.*/
void smp_set_core_boot_addr(unsigned long addr, int corenr)
{
diff --git a/arch/arm/cpu/armv7/virt-dt.c b/arch/arm/cpu/armv7/virt-dt.c
index 9408e33..cab 100644
--- a/arch/arm/cpu/armv7/virt-dt.c
+++ b/arch/arm/cpu/armv7/virt-dt.c
@@ -90,7 +90,7 @@ static int fdt_psci(void *fdt)
int psci_update_dt(void *fdt)
{
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
if (!armv7_boot_nonsec())
return 0;
#endif
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index 7336162..03cd9f6 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -25,7 +25,7 @@ SECTIONS
*(.text*)
}
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) ||
defined(CONFIG_ARMV7_PSCI)
+#ifdef CONFIG_ARMV7_NONSEC
#ifndef CONFIG_ARMV7_SECURE_BASE
#define CONFIG_ARMV7_SECURE_BASE
diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
index 58d8b16..2bb1253 100644
--- a/arch/arm/include/asm/armv7.h
+++ b/arch/arm/include/asm/armv7.h
@@ -121,7 +121,7 @@ void v7_outer_cache_inval_all(void);
void v7_outer_cache_flush_range(u32 start, u32 end);
void v7_outer_cache_inval_range(u32 start, u32 end);
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
int armv7_init_nonsec(void);
bool armv7_boot_nonsec(void);
@@ -135,7 +135,7 @@ void _smp_pen(void);
extern char __secure_start[];
extern char __secure_end[];
-#endif /* CONFIG_ARMV7_NONSEC || CONFIG_ARMV7_VIRT */
+#endif /* CONFIG_ARMV7_NONSEC */
void v7_arch_cp15_set_l2aux_ctrl(u32 l2auxctrl, u32 cpu_midr,
u32 cpu_rev_comb, u32 cpu_variant,
diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index 665a3bc..49ba691 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -34,7 +34,7 @@ int arch_fixup_fdt(void *blob)
}
ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
if (ret)
return ret;
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index b1bff8c..ee56d74 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -26,7 +26,7 @@
#include bootm.h
#include vxworks.h
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
#include asm/armv7.h
#endif
@@ -238,7 +238,7 @@ static void boot_prep_linux(bootm_headers_t *images)
}
}
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
bool armv7_boot_nonsec(void)
{
char *s = getenv(bootm_boot_mode);
@@ -305,7 +305,7 @@ static void boot_jump_linux(bootm_headers_t *images, int
flag)
r2 = gd-bd-bi_boot_params;
if (!fake) {
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
if (armv7_boot_nonsec()) {
armv7_init_nonsec();
secure_ram_addr(_do_nonsec_entry)(kernel_entry,
diff --git a/board/armltd/vexpress/vexpress_common.c
b/board/armltd/vexpress/vexpress_common.c
index
[U-Boot] [PATCH v7 17/17] jetson-tk1: Add PSCI configuration options and reserve secure code
From: Ian Campbell i...@hellion.org.uk The secure world code is relocated to the MB just below the top of 4G, we reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE) but it is not protected in h/w. See next patch. Signed-off-by: Ian Campbell i...@hellion.org.uk Signed-off-by: Jan Kiszka jan.kis...@siemens.com Reviewed-by: Tom Rini tr...@konsulko.com Reviewed-by: Thierry Reding tred...@nvidia.com Tested-by: Thierry Reding tred...@nvidia.com Tested-by: Ian Campbell i...@hellion.org.uk --- arch/arm/mach-tegra/tegra124/Kconfig | 2 ++ include/configs/jetson-tk1.h | 5 + 2 files changed, 7 insertions(+) diff --git a/arch/arm/mach-tegra/tegra124/Kconfig b/arch/arm/mach-tegra/tegra124/Kconfig index 88f627c..5114299 100644 --- a/arch/arm/mach-tegra/tegra124/Kconfig +++ b/arch/arm/mach-tegra/tegra124/Kconfig @@ -5,6 +5,8 @@ choice config TARGET_JETSON_TK1 bool NVIDIA Tegra124 Jetson TK1 board + select CPU_V7_HAS_NONSEC if !SPL_BUILD + select CPU_V7_HAS_VIRT if !SPL_BUILD config TARGET_NYAN_BIG bool Google/NVIDIA Nyan-big Chrombook diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 8c016b7..aeafbd5 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -79,4 +79,9 @@ #include tegra-common-usb-gadget.h #include tegra-common-post.h +#define CONFIG_ARMV7_PSCI 1 +/* Reserve top 1M for secure RAM */ +#define CONFIG_ARMV7_SECURE_BASE 0xfff0 +#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x0010 + #endif /* __CONFIG_H */ -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v7 11/17] ARM: Add board-specific initialization hook for PSCI
Tegra boards will have to initialize power management for the PSCI
support this way.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/arm/cpu/armv7/virt-v7.c | 6 ++
arch/arm/include/asm/psci.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/arch/arm/cpu/armv7/virt-v7.c b/arch/arm/cpu/armv7/virt-v7.c
index 4cb8806..db4f6ad 100644
--- a/arch/arm/cpu/armv7/virt-v7.c
+++ b/arch/arm/cpu/armv7/virt-v7.c
@@ -75,6 +75,10 @@ void __weak smp_kick_all_cpus(void)
kick_secondary_cpus_gic(gic_dist_addr);
}
+__weak void psci_board_init(void)
+{
+}
+
int armv7_init_nonsec(void)
{
unsigned int reg;
@@ -112,6 +116,8 @@ int armv7_init_nonsec(void)
for (i = 1; i = itlinesnr; i++)
writel((unsigned)-1, gic_dist_addr + GICD_IGROUPRn + 4 * i);
+ psci_board_init();
+
/*
* Relocate secure section before any cpu runs in secure ram.
* smp_kick_all_cpus may enable other cores and runs into secure
diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h
index 50a3ca4..128a606 100644
--- a/arch/arm/include/asm/psci.h
+++ b/arch/arm/include/asm/psci.h
@@ -34,6 +34,7 @@
#ifndef __ASSEMBLY__
int psci_update_dt(void *fdt);
+void psci_board_init(void);
#endif /* ! __ASSEMBLY__ */
#endif /* __ARM_PSCI_H__ */
--
2.1.4
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[U-Boot] [PATCH v7 00/17] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix
Changes in v7:
- rebased over master
- fixed issue that prevented secure boot with all cores
= replace ap_pm_init with psci_board_init hook
- enable CONFIG_ARMV7_BOOT_SEC_DEFAULT for tegra to avoid problems with
default config of current Linux
- add cleanup patch for CONFIG_ARMV7_NONSEC/VIRT/PSCI
Note that I've removed reviewed and tested tags from modified patches.
Jan
CC: Andre Przywara andre.przyw...@linaro.org
CC: Ian Campbell i...@hellion.org.uk
CC: Marc Zyngier marc.zyng...@arm.com
CC: Steve Rae s...@broadcom.com
CC: Tang Yuantian yuantian.t...@freescale.com
CC: Thierry Reding tred...@nvidia.com
CC: York Sun york...@freescale.com
Ian Campbell (3):
tegra124: Add more registers to struct mc_ctlr
tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0
jetson-tk1: Add PSCI configuration options and reserve secure code
Jan Kiszka (13):
ARM: Clean up CONFIG_ARMV7_NONSEC/VIRT/PSCI conditions
sun7i: Remove duplicate call to psci_arch_init
ARM: Factor out common psci_get_cpu_id
ARM: Factor out reusable psci_cpu_off_common
ARM: Factor out reusable psci_cpu_entry
ARM: Factor out reusable psci_get_cpu_stack_top
ARM: Put target PC for PSCI CPU_ON on per-CPU stack
virt-dt: Allow reservation of secure region when in a RAM carveout
tegra: Make tegra_powergate_power_on public
ARM: Add board-specific initialization hook for PSCI
tegra124: Add PSCI support for Tegra124
tegra: Set CNTFRQ for secondary CPUs
tegra: Boot in non-secure mode by default
Thierry Reding (1):
ARM: tegra: Enable SMMU when going non-secure
arch/arm/cpu/armv7/Kconfig | 2 +-
arch/arm/cpu/armv7/Makefile | 2 +-
arch/arm/cpu/armv7/ls102xa/cpu.c| 2 +-
arch/arm/cpu/armv7/psci.S | 121
arch/arm/cpu/armv7/sunxi/psci.S | 112 -
arch/arm/cpu/armv7/virt-dt.c| 31 ++-
arch/arm/cpu/armv7/virt-v7.c| 11 +++
arch/arm/cpu/u-boot.lds | 2 +-
arch/arm/include/asm/arch-tegra/powergate.h | 1 +
arch/arm/include/asm/arch-tegra124/flow.h | 6 ++
arch/arm/include/asm/arch-tegra124/mc.h | 37 -
arch/arm/include/asm/armv7.h| 5 +-
arch/arm/include/asm/psci.h | 1 +
arch/arm/include/asm/system.h | 1 +
arch/arm/lib/bootm-fdt.c| 8 +-
arch/arm/lib/bootm.c| 6 +-
arch/arm/mach-tegra/Makefile| 4 +
arch/arm/mach-tegra/ap.c| 55 +
arch/arm/mach-tegra/powergate.c | 2 +-
arch/arm/mach-tegra/psci.S | 114 ++
arch/arm/mach-tegra/tegra124/Kconfig| 2 +
arch/arm/mach-tegra/tegra124/Makefile | 4 +
arch/arm/mach-tegra/tegra124/psci.c | 59 ++
board/armltd/vexpress/vexpress_common.c | 2 +-
board/broadcom/bcm_ep/board.c | 2 +-
board/freescale/common/arm_sleep.c | 2 +-
include/configs/jetson-tk1.h| 5 ++
27 files changed, 487 insertions(+), 112 deletions(-)
create mode 100644 arch/arm/mach-tegra/psci.S
create mode 100644 arch/arm/mach-tegra/tegra124/psci.c
--
2.1.4
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[U-Boot] [PATCH] mpc85xx/T1042D4RDB: Select DIU in cpld mux for T1042D4RDB
From: Wang Dongsheng dongsheng.w...@freescale.com T1042D4RDB CPLD SFPCSR register defined has changed to 0:1 QE_MUX. There have two bits to control DVI, DFP, PROFIBUS, TMD MUX select. So we need to update a macro define value to switch to DIU channel. Signed-off-by: Wang Dongsheng dongsheng.w...@freescale.com --- This patch depends on T1042D4RDB platform code patches. Priyanka Jain has send T1042D4RDB patches to upstrem, but I cannot found them in U-boot patchworks. So just comments in this patch. diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index f4006ee..baccbb5 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -288,8 +288,11 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CPLD_LBMAP_DFLTBANK0x40 /* BANK OR | BANK0 */ #define CPLD_LBMAP_RESET 0xFF #define CPLD_LBMAP_SHIFT 0x03 -#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB) + +#if defined(CONFIG_T1042RDB_PI) #define CPLD_DIU_SEL_DFP 0x80 +#elif defined(CONFIG_T1042D4RDB) +#define CPLD_DIU_SEL_DFP 0xc0 #endif #define CONFIG_SYS_CPLD_BASE 0xffdf @@ -458,7 +461,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 -#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB) +#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T1042D4RDB) /* Video */ #define CONFIG_FSL_DIU_FB -- 2.1.0.27.g96db324 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 02/20] dm: i2c: sandbox: Add debugging to the speed limit
Hello Simon,
Am 20.04.2015 20:37, schrieb Simon Glass:
Print a debug() message with the I2C speed is exceeded.
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/i2c/sandbox_i2c.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/sandbox_i2c.c b/drivers/i2c/sandbox_i2c.c
index d6adc0f..621caec 100644
--- a/drivers/i2c/sandbox_i2c.c
+++ b/drivers/i2c/sandbox_i2c.c
@@ -73,8 +73,10 @@ static int sandbox_i2c_xfer(struct udevice *bus, struct
i2c_msg *msg,
* 400KHz for reads
*/
is_read = nmsgs 1;
- if (i2c-speed_hz (is_read ? 40 : 10))
+ if (i2c-speed_hz (is_read ? 40 : 10)) {
+ debug(%s: Max speed exceeded\n, __func__);
return -EINVAL;
+ }
Why different speeds for reading/writing?
bye,
Heiko
return ops-xfer(emul, msg, nmsgs);
}
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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[U-Boot] [PATCH] x86: galileo: Define mac addresses for the on-chip ethernet ports
Not like other x86 chipset, there is no EEPROM for the ethernet controller on the Intel Quark SoC to retreive the mac address after power up. With pre-defined mac addresses, U-Boot boots up and will not show Error: dwmac.90006000 address not set message. Signed-off-by: Bin Meng bmeng...@gmail.com --- include/configs/galileo.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/galileo.h b/include/configs/galileo.h index d4d0eb3..961d087 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -62,6 +62,8 @@ #define CONFIG_DESIGNWARE_ETH #define CONFIG_DW_ALTDESCRIPTOR #define CONFIG_PHYLIB +#define CONFIG_ETHADDR 00:02:b3:00:00:00 +#define CONFIG_ETH1ADDR00:02:b3:00:00:01 /* Environment configuration */ #define CONFIG_ENV_SECT_SIZE 0x1000 -- 1.8.2.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 03/20] dm: i2c: Add functions to read and write a register
Hello Simon,
Am 20.04.2015 20:37, schrieb Simon Glass:
Add driver model versions of the legacy functions to read and write a
single byte register. These are a useful shortcut in many cases.
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/i2c/i2c-uclass.c | 19 +++
include/i2c.h| 21 +
2 files changed, 40 insertions(+)
Acked-by: Heiko Schocher h...@denx.de
bye,
Heiko
diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index f2e95c0..b8eb2d6 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -186,6 +186,25 @@ int dm_i2c_write(struct udevice *dev, uint offset, const
uint8_t *buffer,
}
}
+int dm_i2c_reg_read(struct udevice *dev, uint offset)
+{
+ uint8_t val;
+ int ret;
+
+ ret = dm_i2c_read(dev, offset, val, 1);
+ if (ret 0)
+ return ret;
+
+ return val;
+}
+
+int dm_i2c_reg_write(struct udevice *dev, uint offset, uint value)
+{
+ uint8_t val = value;
+
+ return dm_i2c_write(dev, offset, val, 1);
+}
+
/**
* i2c_probe_chip() - probe for a chip on a bus
*
diff --git a/include/i2c.h b/include/i2c.h
index 6fd73fa..d794057 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -124,6 +124,27 @@ int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint
chip_flags,
struct udevice **devp);
/**
+ * dm_i2c_reg_read() - Read a value from an I2C register
+ *
+ * This reads a single value from the given address in an I2C chip
+ *
+ * @addr: Address to read from
+ * @return value read, or -ve on error
+ */
+int dm_i2c_reg_read(struct udevice *dev, uint offset);
+
+/**
+ * dm_i2c_reg_write() - Write a value to an I2C register
+ *
+ * This writes a single value to the given address in an I2C chip
+ *
+ * @addr: Address to write to
+ * @val: Value to write (normally a byte)
+ * @return 0 on success, -ve on error
+ */
+int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
+
+/**
* dm_i2c_set_bus_speed() - set the speed of a bus
*
* @bus: Bus to adjust
--
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[U-Boot] [PATCH v7 13/17] tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0
From: Ian Campbell i...@hellion.org.uk
These registers can be used to prevent non-secure world from accessing a
megabyte aligned region of RAM, use them to protect the u-boot secure monitor
code.
At first I tried to do this from s_init(), however this inexplicably causes
u-boot's networking (e.g. DHCP) to fail, while networking under Linux was fine.
So instead I have added a new weak arch function protect_secure_section()
called from relocate_secure_section() and reserved the region there. This is
better overall since it defers the reservation until after the sec vs. non-sec
decision (which can be influenced by an envvar) has been made when booting the
os.
Signed-off-by: Ian Campbell i...@hellion.org.uk
[Jan: tiny style adjustment]
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
Reviewed-by: Tom Rini tr...@konsulko.com
Reviewed-by: Thierry Reding tred...@nvidia.com
Tested-by: Thierry Reding tred...@nvidia.com
Tested-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/virt-v7.c | 5 +
arch/arm/include/asm/system.h | 1 +
arch/arm/mach-tegra/ap.c | 15 +++
3 files changed, 21 insertions(+)
diff --git a/arch/arm/cpu/armv7/virt-v7.c b/arch/arm/cpu/armv7/virt-v7.c
index db4f6ad..9c53306 100644
--- a/arch/arm/cpu/armv7/virt-v7.c
+++ b/arch/arm/cpu/armv7/virt-v7.c
@@ -46,6 +46,10 @@ static unsigned long get_gicd_base_address(void)
#endif
}
+/* Define a specific version of this function to enable any available
+ * hardware protections for the reserved region */
+void __weak protect_secure_section(void) {}
+
static void relocate_secure_section(void)
{
#ifdef CONFIG_ARMV7_SECURE_BASE
@@ -54,6 +58,7 @@ static void relocate_secure_section(void)
memcpy((void *)CONFIG_ARMV7_SECURE_BASE, __secure_start, sz);
flush_dcache_range(CONFIG_ARMV7_SECURE_BASE,
CONFIG_ARMV7_SECURE_BASE + sz + 1);
+ protect_secure_section();
invalidate_icache_all();
#endif
}
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 2a5bed2..d6dfddd 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -77,6 +77,7 @@ void armv8_switch_to_el1(void);
void gic_init(void);
void gic_send_sgi(unsigned long sgino);
void wait_for_wakeup(void);
+void protect_secure_region(void);
void smp_kick_all_cpus(void);
void flush_l3_cache(void);
diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c
index a17dfd1..869a2ed 100644
--- a/arch/arm/mach-tegra/ap.c
+++ b/arch/arm/mach-tegra/ap.c
@@ -10,6 +10,7 @@
#include common.h
#include asm/io.h
#include asm/arch/gp_padctrl.h
+#include asm/arch/mc.h
#include asm/arch-tegra/ap.h
#include asm/arch-tegra/clock.h
#include asm/arch-tegra/fuse.h
@@ -154,6 +155,20 @@ static void init_pmc_scratch(void)
writel(odmdata, pmc-pmc_scratch20);
}
+#ifdef CONFIG_ARMV7_SECURE_RESERVE_SIZE
+void protect_secure_section(void)
+{
+ struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
+
+ /* Must be MB aligned */
+ BUILD_BUG_ON(CONFIG_ARMV7_SECURE_BASE 0xF);
+ BUILD_BUG_ON(CONFIG_ARMV7_SECURE_RESERVE_SIZE 0xF);
+
+ writel(CONFIG_ARMV7_SECURE_BASE, mc-mc_security_cfg0);
+ writel(CONFIG_ARMV7_SECURE_RESERVE_SIZE 20, mc-mc_security_cfg1);
+}
+#endif
+
void s_init(void)
{
/* Init PMC scratch memory */
--
2.1.4
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[U-Boot] [PATCH v7 15/17] ARM: tegra: Enable SMMU when going non-secure
From: Thierry Reding tred...@nvidia.com
Make sure to enable the SMMU when booting the kernel in non-secure mode.
This is necessary because some of the SMMU registers are restricted to
TrustZone-secured requestors, hence the kernel wouldn't be able to turn
the SMMU on. At the same time, enable translation for all memory clients
for the same reasons. The kernel will still be able to control SMMU IOVA
translation using the per-SWGROUP enable bits.
Signed-off-by: Thierry Reding tred...@nvidia.com
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/arm/include/asm/arch-tegra124/mc.h | 2 ++
arch/arm/mach-tegra/ap.c| 40 +
2 files changed, 42 insertions(+)
diff --git a/arch/arm/include/asm/arch-tegra124/mc.h
b/arch/arm/include/asm/arch-tegra124/mc.h
index 5557732..37998a4 100644
--- a/arch/arm/include/asm/arch-tegra124/mc.h
+++ b/arch/arm/include/asm/arch-tegra124/mc.h
@@ -74,6 +74,8 @@ struct mc_ctlr {
u32 mc_video_protect_reg_ctrl; /* offset 0x650 */
};
+#define TEGRA_MC_SMMU_CONFIG_ENABLE (1 0)
+
#define TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_ENABLED(0 0)
#define TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED (1 0)
diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c
index 869a2ed..0b94e8a 100644
--- a/arch/arm/mach-tegra/ap.c
+++ b/arch/arm/mach-tegra/ap.c
@@ -169,6 +169,43 @@ void protect_secure_section(void)
}
#endif
+#if defined(CONFIG_ARMV7_NONSEC)
+static void smmu_flush(struct mc_ctlr *mc)
+{
+ (void)readl(mc-mc_smmu_config);
+}
+
+static void smmu_enable(void)
+{
+ struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
+ u32 value;
+
+ /*
+* Enable translation for all clients since access to this register
+* is restricted to TrustZone-secured requestors. The kernel will use
+* the per-SWGROUP enable bits to enable or disable translations.
+*/
+ writel(0x, mc-mc_smmu_translation_enable_0);
+ writel(0x, mc-mc_smmu_translation_enable_1);
+ writel(0x, mc-mc_smmu_translation_enable_2);
+ writel(0x, mc-mc_smmu_translation_enable_3);
+
+ /*
+* Enable SMMU globally since access to this register is restricted
+* to TrustZone-secured requestors.
+*/
+ value = readl(mc-mc_smmu_config);
+ value |= TEGRA_MC_SMMU_CONFIG_ENABLE;
+ writel(value, mc-mc_smmu_config);
+
+ smmu_flush(mc);
+}
+#else
+static void smmu_enable(void)
+{
+}
+#endif
+
void s_init(void)
{
/* Init PMC scratch memory */
@@ -179,6 +216,9 @@ void s_init(void)
/* init the cache */
config_cache();
+ /* enable SMMU */
+ smmu_enable();
+
/* init vpr */
config_vpr();
}
--
2.1.4
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[U-Boot] [PATCH v7 16/17] tegra: Boot in non-secure mode by default
Upstream Linux is broken with default configs when PSCI, thus non-secure mode is enabled. So the user should explicitly enable this mode, e.g. when she disabled CONFIG_CPU_IDLE in Linux (in which case it's safe to use). We can revert this workaround once Linux got fixed. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- arch/arm/cpu/armv7/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig index 61e7c82..6c5d5dd 100644 --- a/arch/arm/cpu/armv7/Kconfig +++ b/arch/arm/cpu/armv7/Kconfig @@ -16,7 +16,7 @@ config ARMV7_NONSEC config ARMV7_BOOT_SEC_DEFAULT boolean Boot in secure mode by default if EXPERT depends on ARMV7_NONSEC - default n + default y if TEGRA ---help--- Say Y here to boot in secure mode by default even if non-secure mode is supported. This option is useful to boot kernels which do not -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v7 07/17] ARM: Put target PC for PSCI CPU_ON on per-CPU stack
Use a per-CPU variable for saving the target PC during CPU_ON
operations. This allows us to run this service independently on targets
that have more than 2 cores and also core-local power control.
CC: Marc Zyngier marc.zyng...@arm.com
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
Reviewed-by: Tom Rini tr...@konsulko.com
Reviewed-by: Thierry Reding tred...@nvidia.com
Tested-by: Thierry Reding tred...@nvidia.com
Tested-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/psci.S | 11 +--
arch/arm/cpu/armv7/sunxi/psci.S | 9 ++---
2 files changed, 11 insertions(+), 9 deletions(-)
diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
index 18d85c4..87c0c0b 100644
--- a/arch/arm/cpu/armv7/psci.S
+++ b/arch/arm/cpu/armv7/psci.S
@@ -17,6 +17,7 @@
#include config.h
#include linux/linkage.h
+#include asm/macro.h
#include asm/psci.h
.pushsection ._secure.text, ax
@@ -202,6 +203,7 @@ ENTRY(psci_get_cpu_stack_top)
add r5, r5, #0x2000 @ Skip two pages
lsr r5, r5, #12 @ Align to start of page
lsl r5, r5, #12
+ sub r5, r5, #4 @ reserve 1 word for target PC
sub r0, r5, r0 @ here's our stack!
bx lr
@@ -212,13 +214,10 @@ ENTRY(psci_cpu_entry)
bl _nonsec_init
- adr r0, _psci_target_pc
- ldr r0, [r0]
+ bl psci_get_cpu_id @ CPU ID = r0
+ bl psci_get_cpu_stack_top @ stack top = r0
+ ldr r0, [r0]@ target PC at stack top
b _do_nonsec_entry
ENDPROC(psci_cpu_entry)
-.globl _psci_target_pc
-_psci_target_pc:
- .word 0
-
.popsection
diff --git a/arch/arm/cpu/armv7/sunxi/psci.S b/arch/arm/cpu/armv7/sunxi/psci.S
index dd583b2..7ec0500 100644
--- a/arch/arm/cpu/armv7/sunxi/psci.S
+++ b/arch/arm/cpu/armv7/sunxi/psci.S
@@ -139,8 +139,11 @@ out: mcr p15, 0, r7, c1, c1, 0
@ r2 = target PC
.globl psci_cpu_on
psci_cpu_on:
- ldr r0, =_psci_target_pc
- str r2, [r0]
+ push{lr}
+
+ mov r0, r1
+ bl psci_get_cpu_stack_top @ get stack top of target CPU
+ str r2, [r0]@ store target PC at stack top
dsb
movwr0, #(SUN7I_CPUCFG_BASE 0x)
@@ -195,7 +198,7 @@ psci_cpu_on:
str r6, [r0, #0x1e4]
mov r0, #ARM_PSCI_RET_SUCCESS @ Return PSCI_RET_SUCCESS
- mov pc, lr
+ pop {pc}
.globl psci_cpu_off
psci_cpu_off:
--
2.1.4
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[U-Boot] [PATCH v7 12/17] tegra124: Add PSCI support for Tegra124
This is based on Thierry Reding's work and uses Ian Campell's
preparatory patches. It comes with full support for CPU_ON/OFF PSCI
services. The algorithm used in this version for turning CPUs on and
off was proposed by Peter De Schrijver and Thierry Reding in
http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/210881. It
consists of first enabling CPU1..3 via the PMC, just to powergate them
again with the help of the Flow Controller. Once the Flow Controller is
in place, we can leave the PMC alone while processing CPU_ON and CPU_OFF
PSCI requests.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/arm/include/asm/arch-tegra124/flow.h | 6 ++
arch/arm/mach-tegra/Makefile | 4 ++
arch/arm/mach-tegra/psci.S| 101 ++
arch/arm/mach-tegra/tegra124/Makefile | 4 ++
arch/arm/mach-tegra/tegra124/psci.c | 59 +
5 files changed, 174 insertions(+)
create mode 100644 arch/arm/mach-tegra/psci.S
create mode 100644 arch/arm/mach-tegra/tegra124/psci.c
diff --git a/arch/arm/include/asm/arch-tegra124/flow.h
b/arch/arm/include/asm/arch-tegra124/flow.h
index 0db1881..d6f515f 100644
--- a/arch/arm/include/asm/arch-tegra124/flow.h
+++ b/arch/arm/include/asm/arch-tegra124/flow.h
@@ -37,4 +37,10 @@ struct flow_ctlr {
/* FLOW_CTLR_CLUSTER_CONTROL_0 0x2c */
#define ACTIVE_LP (1 0)
+/* CPUn_CSR_0 */
+#define CSR_ENABLE (1 0)
+#define CSR_IMMEDIATE_WAKE (1 3)
+#define CSR_WAIT_WFI_SHIFT 8
+#define CSR_PWR_OFF_STS(1 16)
+
#endif /* _TEGRA124_FLOW_H_ */
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 04cef0a..0779086 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -25,6 +25,10 @@ obj-y += xusb-padctl.o
obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o
obj-$(CONFIG_TEGRA124) += vpr.o
+ifndef CONFIG_SPL_BUILD
+obj-$(CONFIG_ARMV7_PSCI) += psci.o
+endif
+
obj-$(CONFIG_TEGRA20) += tegra20/
obj-$(CONFIG_TEGRA30) += tegra30/
obj-$(CONFIG_TEGRA114) += tegra114/
diff --git a/arch/arm/mach-tegra/psci.S b/arch/arm/mach-tegra/psci.S
new file mode 100644
index 000..e4733e6
--- /dev/null
+++ b/arch/arm/mach-tegra/psci.S
@@ -0,0 +1,101 @@
+/*
+ * Copyright (C) 2014, NVIDIA
+ * Copyright (C) 2015, Siemens AG
+ *
+ * Authors:
+ * Thierry Reding tred...@nvidia.com
+ * Jan Kiszka jan.kis...@siemens.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include linux/linkage.h
+#include asm/macro.h
+#include asm/psci.h
+
+ .pushsection ._secure.text, ax
+ .arch_extension sec
+
+#define TEGRA_SB_CSR_0 0x6000c200
+#define NS_RST_VEC_WR_DIS (1 1)
+
+#define TEGRA_RESET_EXCEPTION_VECTOR 0x6000f100
+
+#define TEGRA_FLOW_CTRL_BASE 0x60007000
+#define FLOW_CTRL_CPU_CSR 0x08
+#define CSR_ENABLE (1 0)
+#define CSR_IMMEDIATE_WAKE (1 3)
+#define CSR_WAIT_WFI_SHIFT 8
+#define FLOW_CTRL_CPU1_CSR 0x18
+
+@ converts CPU ID into FLOW_CTRL_CPUn_CSR offset
+.macro get_csr_reg cpu, ofs, tmp
+ cmp \cpu, #0@ CPU0?
+ lsl \tmp, \cpu, #3 @ multiple by 8 (register offset CPU1-3)
+ moveq \ofs, #FLOW_CTRL_CPU_CSR
+ addne \ofs, \tmp, #FLOW_CTRL_CPU1_CSR - 8
+.endm
+
+ENTRY(psci_arch_init)
+ mov r6, lr
+
+ mrc p15, 0, r5, c1, c1, 0 @ Read SCR
+ bic r5, r5, #1 @ Secure mode
+ mcr p15, 0, r5, c1, c1, 0 @ Write SCR
+ isb
+
+ @ lock reset vector for non-secure
+ ldr r4, =TEGRA_SB_CSR_0
+ ldr r5, [r4]
+ orr r5, r5, #NS_RST_VEC_WR_DIS
+ str r5, [r4]
+
+ bl psci_get_cpu_id @ CPU ID = r0
+ bl psci_get_cpu_stack_top @ stack top = r0
+ mov sp, r0
+
+ bx r6
+ENDPROC(psci_arch_init)
+
+ENTRY(psci_cpu_off)
+ bl psci_cpu_off_common
+
+ bl psci_get_cpu_id @ CPU ID = r0
+
+ get_csr_reg r0, r2, r3
+
+ ldr r6, =TEGRA_FLOW_CTRL_BASE
+ mov r5, #(CSR_ENABLE)
+ mov r4, #(1 CSR_WAIT_WFI_SHIFT)
+ add r5, r4, lsl r0
+ str r5, [r6, r2]
+
+_loop: wfi
+ b _loop
+ENDPROC(psci_cpu_off)
+
+ENTRY(psci_cpu_on)
+ push{lr}
+
+ mov r0, r1
+ bl psci_get_cpu_stack_top @ get stack top of target CPU
+ str r2, [r0]@ store target PC at stack top
+ dsb
+
+ ldr r6, =TEGRA_RESET_EXCEPTION_VECTOR
+ ldr r5, =psci_cpu_entry
+ str r5, [r6]
+
+ get_csr_reg r1, r2, r3
+
+ ldr r6, =TEGRA_FLOW_CTRL_BASE
+ mov r5, #(CSR_IMMEDIATE_WAKE | CSR_ENABLE)
+ str r5, [r6, r2]
+
+ mov r0, #ARM_PSCI_RET_SUCCESS @ Return PSCI_RET_SUCCESS
+ pop {pc}
+ENDPROC(psci_cpu_on)
+
+ .globl psci_text_end
+psci_text_end:
+
[U-Boot] [PATCH v7 14/17] tegra: Set CNTFRQ for secondary CPUs
We only set CNTFRQ in arch_timer_init for the boot CPU. But this has to happen for all cores. Fixing this resolves problems of KVM with emulating the generic timer/counter. Signed-off-by: Jan Kiszka jan.kis...@siemens.com Reviewed-by: Tom Rini tr...@konsulko.com Reviewed-by: Thierry Reding tred...@nvidia.com Tested-by: Thierry Reding tred...@nvidia.com Tested-by: Ian Campbell i...@hellion.org.uk --- arch/arm/mach-tegra/psci.S | 13 + 1 file changed, 13 insertions(+) diff --git a/arch/arm/mach-tegra/psci.S b/arch/arm/mach-tegra/psci.S index e4733e6..b836da1 100644 --- a/arch/arm/mach-tegra/psci.S +++ b/arch/arm/mach-tegra/psci.S @@ -51,12 +51,25 @@ ENTRY(psci_arch_init) str r5, [r4] bl psci_get_cpu_id @ CPU ID = r0 + + adr r5, _sys_clock_freq + cmp r0, #0 + + mrceq p15, 0, r7, c14, c0, 0 @ read CNTFRQ from CPU0 + streq r7, [r5] + + ldrne r7, [r5] + mcrne p15, 0, r7, c14, c0, 0 @ write CNTFRQ to CPU1..3 + bl psci_get_cpu_stack_top @ stack top = r0 mov sp, r0 bx r6 ENDPROC(psci_arch_init) +_sys_clock_freq: + .word 0 + ENTRY(psci_cpu_off) bl psci_cpu_off_common -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v7 03/17] ARM: Factor out common psci_get_cpu_id
Will be required for obtaining the ID of the current CPU in shared PSCI
functions. The default implementation requires a dense ID space and only
supports a single cluster. Therefore, the functions can be overloaded in
cases where these assumptions do not hold.
CC: Marc Zyngier marc.zyng...@arm.com
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
Reviewed-by: Tom Rini tr...@konsulko.com
Reviewed-by: Thierry Reding tred...@nvidia.com
Tested-by: Thierry Reding tred...@nvidia.com
Tested-by: Ian Campbell i...@hellion.org.uk
Acked-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/psci.S | 8
arch/arm/cpu/armv7/sunxi/psci.S | 12 +++-
2 files changed, 15 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
index bf11a34..12ad09b 100644
--- a/arch/arm/cpu/armv7/psci.S
+++ b/arch/arm/cpu/armv7/psci.S
@@ -99,4 +99,12 @@ _smc_psci:
pop {r4-r7, lr}
movspc, lr @ Return to the kernel
+@ Requires dense and single-cluster CPU ID space
+ENTRY(psci_get_cpu_id)
+ mrc p15, 0, r0, c0, c0, 5 /* read MPIDR */
+ and r0, r0, #0xff /* return CPU ID in cluster */
+ bx lr
+ENDPROC(psci_get_cpu_id)
+.weak psci_get_cpu_id
+
.popsection
diff --git a/arch/arm/cpu/armv7/sunxi/psci.S b/arch/arm/cpu/armv7/sunxi/psci.S
index 07b2d76..bcc419d 100644
--- a/arch/arm/cpu/armv7/sunxi/psci.S
+++ b/arch/arm/cpu/armv7/sunxi/psci.S
@@ -19,6 +19,7 @@
#include config.h
#include asm/gic.h
+#include asm/macro.h
#include asm/psci.h
#include asm/arch/cpu.h
@@ -290,6 +291,8 @@ psci_cpu_off:
.globl psci_arch_init
psci_arch_init:
+ mov r6, lr
+
movwr4, #(GICD_BASE 0x)
movtr4, #(GICD_BASE 16)
@@ -315,18 +318,17 @@ psci_arch_init:
mcr p15, 0, r5, c1, c1, 0 @ Write SCR
isb
- mrc p15, 0, r4, c0, c0, 5 @ MPIDR
- and r4, r4, #3 @ cpu number in cluster
+ bl psci_get_cpu_id
mov r5, #0x400 @ 1kB of stack per CPU
- mul r4, r4, r5
+ mul r0, r0, r5
adr r5, text_end@ end of text
add r5, r5, #0x2000 @ Skip two pages
lsr r5, r5, #12 @ Align to start of page
lsl r5, r5, #12
- sub sp, r5, r4 @ here's our stack!
+ sub sp, r5, r0 @ here's our stack!
- bx lr
+ bx r6
text_end:
.popsection
--
2.1.4
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[U-Boot] [PATCH v7 05/17] ARM: Factor out reusable psci_cpu_entry
_sunxi_cpu_entry can be converted completely into a reusable
psci_cpu_entry. Tegra124 will use it as well.
As with psci_disable_smp, also the enabling is designed to be overloaded
in cased SMP is not controlled via ACTLR.
CC: Marc Zyngier marc.zyng...@arm.com
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
Reviewed-by: Tom Rini tr...@konsulko.com
Reviewed-by: Thierry Reding tred...@nvidia.com
Tested-by: Thierry Reding tred...@nvidia.com
Tested-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/psci.S | 23 +++
arch/arm/cpu/armv7/sunxi/psci.S | 20 ++--
2 files changed, 25 insertions(+), 18 deletions(-)
diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
index cdcdccd..7d89b43 100644
--- a/arch/arm/cpu/armv7/psci.S
+++ b/arch/arm/cpu/armv7/psci.S
@@ -165,6 +165,15 @@ ENTRY(psci_disable_smp)
ENDPROC(psci_disable_smp)
.weak psci_disable_smp
+ENTRY(psci_enable_smp)
+ mrc p15, 0, r0, c1, c0, 1 @ ACTLR
+ orr r0, r0, #(1 6) @ Set SMP bit
+ mcr p15, 0, r0, c1, c0, 1 @ ACTLR
+ isb
+ bx lr
+ENDPROC(psci_enable_smp)
+.weak psci_enable_smp
+
ENTRY(psci_cpu_off_common)
push{lr}
@@ -184,4 +193,18 @@ ENTRY(psci_cpu_off_common)
bx lr
ENDPROC(psci_cpu_off_common)
+ENTRY(psci_cpu_entry)
+ bl psci_enable_smp
+
+ bl _nonsec_init
+
+ adr r0, _psci_target_pc
+ ldr r0, [r0]
+ b _do_nonsec_entry
+ENDPROC(psci_cpu_entry)
+
+.globl _psci_target_pc
+_psci_target_pc:
+ .word 0
+
.popsection
diff --git a/arch/arm/cpu/armv7/sunxi/psci.S b/arch/arm/cpu/armv7/sunxi/psci.S
index 05d047b..90dcff1 100644
--- a/arch/arm/cpu/armv7/sunxi/psci.S
+++ b/arch/arm/cpu/armv7/sunxi/psci.S
@@ -139,7 +139,7 @@ out:mcr p15, 0, r7, c1, c1, 0
@ r2 = target PC
.globl psci_cpu_on
psci_cpu_on:
- adr r0, _target_pc
+ ldr r0, =_psci_target_pc
str r2, [r0]
dsb
@@ -151,7 +151,7 @@ psci_cpu_on:
mov r4, #1
lsl r4, r4, r1
- adr r6, _sunxi_cpu_entry
+ ldr r6, =psci_cpu_entry
str r6, [r0, #0x1a4] @ PRIVATE_REG (boot vector)
@ Assert reset on target CPU
@@ -197,22 +197,6 @@ psci_cpu_on:
mov r0, #ARM_PSCI_RET_SUCCESS @ Return PSCI_RET_SUCCESS
mov pc, lr
-_target_pc:
- .word 0
-
-_sunxi_cpu_entry:
- @ Set SMP bit
- mrc p15, 0, r0, c1, c0, 1
- orr r0, r0, #0x40
- mcr p15, 0, r0, c1, c0, 1
- isb
-
- bl _nonsec_init
-
- adr r0, _target_pc
- ldr r0, [r0]
- b _do_nonsec_entry
-
.globl psci_cpu_off
psci_cpu_off:
bl psci_cpu_off_common
--
2.1.4
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[U-Boot] [PATCH] Fix mxc_hab documenation
From: Ulises Cardenas ulises.carde...@freescale.com It is necessary to modify the configuration file for the target board. It wasn't well documented that to enable any of the secure boot modes, it is required to add CONFIG_SECURE_BOOT to the board configuration file. Also, fixed a typo in the encrypted boot section. Signed-off-by: Ulises Cardenas ulises.carde...@freescale.com --- doc/README.mxc_hab | 12 +--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/doc/README.mxc_hab b/doc/README.mxc_hab index a1b1d34..b688580 100644 --- a/doc/README.mxc_hab +++ b/doc/README.mxc_hab @@ -1,7 +1,13 @@ High Assurance Boot (HAB) for i.MX6 CPUs -To authenticate U-Boot only by the CPU there is no code required in -U-Boot itself. However, the U-Boot image to be programmed into the +To enable the authenticated or encrypted boot mode of U-Boot, it is +required to set the proper configuration for the target board. This +is done by adding the following configuration in in the proper config +file (e.g. include/configs/mx6qarm2.h) + +#define CONFIG_SECURE_BOOT + +In addition, the U-Boot image to be programmed into the boot media needs to be properly constructed, i.e. it must contain a proper Command Sequence File (CSF). @@ -69,7 +75,7 @@ CONFIG_SECURE_BOOT CONFIG_SYS_FSL_SEC_COMPAT4 /* HAB version */ CONFIG_FSL_CAAM CONFIG_CMD_DEKBLOB -CONFIG_SYS_FSL_LE +CONFIG_SYS_FSL_SEC_LE Note: The encrypted boot feature is only supported by HABv4 or greater. -- 2.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [patch] socfpga: move configuration options to config file
On Mon 2015-04-20 21:23:23, Marek Vasut wrote: On Monday, April 20, 2015 at 02:30:48 PM, Pavel Machek wrote: Setting configuration options in header file leads to incosistency between .config user sees, and .config he has. What is worse, a lot of compile warnings is presented for any such config option user sets in .config. Can you please elaborate on such warnings ? Lets remove CONFIG_CMD_RUN from .config, then select it: run (CMD_RUN) [N/y/?] (NEW) y Now you warning for most C files: CC arch/arm/lib/asm-offsets.s In file included from include/configs/socfpga_cyclone5.h:16:0, from include/config.h:5, from include/common.h:18, from arch/arm/lib/asm-offsets.c:15: include/config_cmd_default.h:38:0: warning: CONFIG_CMD_RUN redefined [enabled by default] #define CONFIG_CMD_RUN /* run command in env variable */ ^ In file included from ././include/linux/kconfig.h:4:0, from command-line:0: include/generated/autoconf.h:35:0: note: this is the location of the previous definition #define CONFIG_CMD_RUN 1 ^ In file included from include/configs/socfpga_cyclone5.h:16:0, from include/config.h:5, from include/common.h:18, from lib/asm-offsets.c:15: include/config_cmd_default.h:38:0: warning: CONFIG_CMD_RUN redefined [enabled by default] #define CONFIG_CMD_RUN /* run command in env variable */ ^ In file included from ././include/linux/kconfig.h:4:0, from command-line:0: include/generated/autoconf.h:35:0: note: this is the location of the previous definition #define CONFIG_CMD_RUN 1 ^ CHK include/generated/asm-offsets.h CHK include/generated/generic-asm-offsets.h LDS u-boot.lds In file included from include/configs/socfpga_cyclone5.h:16:0, from include/config.h:5, from arch/arm/cpu/u-boot.lds:10: include/config_cmd_default.h:38:0: warning: CONFIG_CMD_RUN redefined [enabled by default] #define CONFIG_CMD_RUN /* run command in env variable */ ^ In file included from ././include/linux/kconfig.h:4:0, from command-line:0: include/generated/autoconf.h:35:0: note: this is the location of the previous definition #define CONFIG_CMD_RUN 1 ^ HOSTCC tools/mkenvimage.o Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 04/10] board_init_f_mem(): Don't create an unused early malloc() area
2015-04-16 10:14 GMT+09:00 Simon Glass s...@chromium.org: Change the #ifdef so that the early malloc() area is not set up in SPL if CONFIG_SYS_SPL_MALLOC_START is defined. In that case it would never actually be used, and just chews up stack space. Signed-off-by: Simon Glass s...@chromium.org --- common/init/global_data.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/common/init/global_data.c b/common/init/global_data.c index d2d7baa..dd91e98 100644 --- a/common/init/global_data.c +++ b/common/init/global_data.c @@ -31,7 +31,8 @@ ulong board_init_f_mem(ulong top) *ptr++ = 0; #endif -#ifdef CONFIG_SYS_MALLOC_F_LEN +#if defined(CONFIG_SYS_MALLOC_F_LEN) \ + (!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SYS_SPL_MALLOC_START)) top -= CONFIG_SYS_MALLOC_F_LEN; gd-malloc_base = top; #endif This is a critical one to fix the bug on Zynq. Tested-by: Masahiro Yamada yamada.masah...@socionext.com BTW, we should do something with defined(CONFIG_SYS_MALLOC_F_LEN) later. Note CONFIG_SYS_MALLOC_F_LEN is a hex type config. -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/6] zynqmp: Add SPI driver support for ZynqMP
On 20 April 2015 at 13:06, Michal Simek michal.si...@xilinx.com wrote: From: Siva Durga Prasad Paladugu siva.durga.palad...@xilinx.com Added the SPI driver support for ZynqMP The controller is same as zynq SPI controller Signed-off-by: Siva Durga Prasad Paladugu siva...@xilinx.com Signed-off-by: Michal Simek michal.si...@xilinx.com --- Changes in v2: - Remove CMD_SPI from header based on Jagan's comment arch/arm/include/asm/arch-zynqmp/hardware.h | 3 +++ include/configs/xilinx_zynqmp.h | 7 +++ 2 files changed, 10 insertions(+) diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index 1fedb1bb4b94..c9dc49d78317 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -11,6 +11,9 @@ #define ZYNQ_SERIAL_BASEADDR0 0xFF00 #define ZYNQ_SERIAL_BASEADDR1 0xFF001000 +#define ZYNQ_SPI_BASEADDR0 0xFF04 +#define ZYNQ_SPI_BASEADDR1 0xFF05 + #define ZYNQ_I2C_BASEADDR0 0xFF02 #define ZYNQ_I2C_BASEADDR1 0xFF03 diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 54bca6d47b72..1d8eaa76dfe7 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -71,6 +71,13 @@ #define CONFIG_CMD_ELF #define CONFIG_MP +/* SPI */ +#ifdef CONFIG_ZYNQ_SPI +# define CONFIG_SPI_FLASH +# define CONFIG_SPI_FLASH_SST +# define CONFIG_CMD_SF +#endif + #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) # define CONFIG_MMC # define CONFIG_GENERIC_MMC -- 2.3.5 Applied u-boot-spi/master thanks! -- Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] SPI flash only works after sspi command (was Re: SPI flash on Altera socfpga)
Hi!
IIRC, then the aliases in the dts are very important for this:
aliases {
spi0 = /spi@ff705000; /* QSPI */
...
Did you add those to your dts as well?
I was using socrates dts for the moment, to keep diffs small. Suddenly
it started working.. and stopped working after reset. Now I realized
what is going on:
= sf probe
Invalid chip select 0:0 (err=-19)
SF: Failed to set up slave
Failed to initialize SPI flash at 0:0
= sf probe 0 0 0
Invalid chip select 0:0 (err=-19)
SF: Failed to set up slave
Failed to initialize SPI flash at 0:0
= sspi
QSPI: Error, command is empty.
Error -1 during SPI transaction
= sf probe 0 0 0
raise: Signal # 8 caught
raise: Signal # 8 caught
raise: Signal # 8 caught
SF: Detected N25Q512 with page size 256 Bytes, erase size 4 KiB, total
64 MiB
SF: Warning - Only lower 16MiB accessible, Full access #define
CONFIG_SPI_FLASH_BAR
=
(u-boot 2015.04 final)
Is there missing initialization somewhere...?
Best regards,
Pavel
--
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(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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Re: [U-Boot] [PATCH 10/10] Revert ARM: zynq: disable CONFIG_SYS_MALLOC_F to fix MMC boot
Hi Simon, 2015-04-16 10:14 GMT+09:00 Simon Glass s...@chromium.org: This reverts commit 321f86e18d6aae9f7b7ba3ef1eb0cec769481874. The original bug has been fixed. Signed-off-by: Simon Glass s...@chromium.org I confirmed this on Zedboard and ZC706 board. Thanks! Tested-by: Masahiro Yamada yamada.masah...@socionext.com BTW, please insert a blank line between git-description and Signed-off-by. -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V5 2/3] dm: test: Add tests for get/find uclass's device by name
This commit introduces simple tests for functions:
- uclass_find_device_by_name()
- uclass_get_device_by_name()
Tests added by this commit:
- Test: dm_test_uclass_devices_find_by_name: for uclass id: UCLASS_TEST_FDT
* get uclass's devices by uclass_find_first/next_device() each as 'testdev',
* for each returned device, call: uclass_find_device_by_name(),
with previously returned device's name as an argument ('testdev-name').
* for the found device ('founddev') check if:
* founddev != NULL
* testdev == founddev
* testdev-name == founddev-name (by strcmp)
- Test: dm_test_uclass_devices_get_by_name: for uclass id: UCLASS_TEST_FDT
* get uclass's devices by uclass_get_first/next_device() each as 'testdev',
* for each returned device, call: uclass_get_device_by_name(),
with previously returned device's name as an argument ('testdev-name').
* for the found device ('founddev') check if:
* founddev != NULL
* founddev is active
* testdev == founddev
* testdev-name == founddev-name (by strcmp)
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Simon Glass s...@chromium.org
---
Changes V4:
-new commit
Changes V5:
- code cleanup
---
test/dm/core.c | 81 ++
1 file changed, 81 insertions(+)
diff --git a/test/dm/core.c b/test/dm/core.c
index 3a8dd1d..7f7b977 100644
--- a/test/dm/core.c
+++ b/test/dm/core.c
@@ -674,6 +674,43 @@ static int dm_test_uclass_devices_find(struct
dm_test_state *dms)
}
DM_TEST(dm_test_uclass_devices_find, DM_TESTF_SCAN_PDATA);
+static int dm_test_uclass_devices_find_by_name(struct dm_test_state *dms)
+{
+ struct udevice *finddev;
+ struct udevice *testdev;
+ int findret, ret;
+
+ /*
+* For each test device found in fdt like: a-test, b-test, etc.,
+* use its name and try to find it by uclass_find_device_by_name().
+* Then, on success check if:
+* - current 'testdev' name is equal to the returned 'finddev' name
+* - current 'testdev' pointer is equal to the returned 'finddev'
+*
+* We assume that, each uclass's device name is unique, so if not, then
+* this will fail on checking condition: testdev == finddev, since the
+* uclass_find_device_by_name(), returns the first device by given name.
+ */
+ for (ret = uclass_find_first_device(UCLASS_TEST_FDT, testdev);
+testdev;
+ret = uclass_find_next_device(testdev)) {
+ ut_assertok(ret);
+ ut_assert(testdev);
+
+ findret = uclass_find_device_by_name(UCLASS_TEST_FDT,
+testdev-name,
+finddev);
+
+ ut_assertok(findret);
+ ut_assert(testdev);
+ ut_asserteq_str(testdev-name, finddev-name);
+ ut_asserteq_ptr(testdev, finddev);
+ }
+
+ return 0;
+}
+DM_TEST(dm_test_uclass_devices_find_by_name, DM_TESTF_SCAN_FDT);
+
static int dm_test_uclass_devices_get(struct dm_test_state *dms)
{
struct udevice *dev;
@@ -691,6 +728,50 @@ static int dm_test_uclass_devices_get(struct dm_test_state
*dms)
}
DM_TEST(dm_test_uclass_devices_get, DM_TESTF_SCAN_PDATA);
+static int dm_test_uclass_devices_get_by_name(struct dm_test_state *dms)
+{
+ struct udevice *finddev;
+ struct udevice *testdev;
+ int ret, findret;
+
+ /*
+* For each test device found in fdt like: a-test, b-test, etc.,
+* use its name and try to get it by uclass_get_device_by_name().
+* On success check if:
+* - returned finddev' is active
+* - current 'testdev' name is equal to the returned 'finddev' name
+* - current 'testdev' pointer is equal to the returned 'finddev'
+*
+* We asserts that the 'testdev' is active on each loop entry, so we
+* could be sure that the 'finddev' is activated too, but for sure
+* we check it again.
+*
+* We assume that, each uclass's device name is unique, so if not, then
+* this will fail on checking condition: testdev == finddev, since the
+* uclass_get_device_by_name(), returns the first device by given name.
+ */
+ for (ret = uclass_first_device(UCLASS_TEST_FDT, testdev);
+testdev;
+ret = uclass_next_device(testdev)) {
+ ut_assertok(ret);
+ ut_assert(testdev);
+ ut_assert(device_active(testdev));
+
+ findret = uclass_get_device_by_name(UCLASS_TEST_FDT,
+ testdev-name,
+ finddev);
+
+ ut_assertok(findret);
+ ut_assert(finddev);
+ ut_assert(device_active(finddev));
+ ut_asserteq_str(testdev-name, finddev-name);
+
[U-Boot] [PATCH V5 3/3] dm: core: precise comments for get/find device by name
The functions: - uclass_find_device_by_name() - uclass_get_device_by_name() searches the required device for the exactly given name. This patch, presice this fact for both function's comments. Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com Cc: Simon Glass s...@chromium.org --- Canges V5: -new patch --- include/dm/uclass-internal.h | 2 +- include/dm/uclass.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/dm/uclass-internal.h b/include/dm/uclass-internal.h index 153f2a7..a9b2fbe 100644 --- a/include/dm/uclass-internal.h +++ b/include/dm/uclass-internal.h @@ -63,7 +63,7 @@ int uclass_find_next_device(struct udevice **devp); /** * uclass_find_device_by_name() - Find uclass device based on ID and name * - * This searches for a device with the given name. + * This searches for a device with the exactly given name. * * The device is NOT probed, it is merely returned. * diff --git a/include/dm/uclass.h b/include/dm/uclass.h index 66e0ea5..4cfc0df 100644 --- a/include/dm/uclass.h +++ b/include/dm/uclass.h @@ -132,7 +132,7 @@ int uclass_get_device(enum uclass_id id, int index, struct udevice **devp); /** * uclass_get_device_by_name() - Get a uclass device by it's name * - * This searches the devices in the uclass for one with the given name. + * This searches the devices in the uclass for one with the exactly given name. * * The device is probed to activate it ready for use. * -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V5 1/3] dm: core: remove type 'static' of function uclass_get_device_tail()
Uclass API provides a few functions for get/find the device.
To provide a complete function set of uclass-internal functions,
for use by the drivers, the function uclass_get_device_tail()
should be non-static.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Simon Glass s...@chromium.org
---
Changes V4:
- new commit
Changes V5:
- drivers/core/uclass.c - uclass_get_device_tail() - remove function comment
---
drivers/core/uclass.c| 12 +---
include/dm/uclass-internal.h | 21 ++---
2 files changed, 19 insertions(+), 14 deletions(-)
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index c1ebee7..7627ad1 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -263,17 +263,7 @@ static int uclass_find_device_by_of_offset(enum uclass_id
id, int node,
return -ENODEV;
}
-/**
- * uclass_get_device_tail() - handle the end of a get_device call
- *
- * This handles returning an error or probing a device as needed.
- *
- * @dev: Device that needs to be probed
- * @ret: Error to return. If non-zero then the device is not probed
- * @devp: Returns the value of 'dev' if there is no error
- * @return ret, if non-zero, else the result of the device_probe() call
- */
-static int uclass_get_device_tail(struct udevice *dev, int ret,
+int uclass_get_device_tail(struct udevice *dev, int ret,
struct udevice **devp)
{
if (ret)
diff --git a/include/dm/uclass-internal.h b/include/dm/uclass-internal.h
index d0f1e22..153f2a7 100644
--- a/include/dm/uclass-internal.h
+++ b/include/dm/uclass-internal.h
@@ -11,12 +11,25 @@
#define _DM_UCLASS_INTERNAL_H
/**
+ * uclass_get_device_tail() - handle the end of a get_device call
+ *
+ * This handles returning an error or probing a device as needed.
+ *
+ * @dev: Device that needs to be probed
+ * @ret: Error to return. If non-zero then the device is not probed
+ * @devp: Returns the value of 'dev' if there is no error
+ * @return ret, if non-zero, else the result of the device_probe() call
+ */
+int uclass_get_device_tail(struct udevice *dev, int ret, struct udevice
**devp);
+
+/**
* uclass_find_device() - Return n-th child of uclass
* @id:Id number of the uclass
* @index: Position of the child in uclass's list
* #devp: Returns pointer to device, or NULL on error
*
- * The device is not prepared for use - this is an internal function
+ * The device is not prepared for use - this is an internal function.
+ * The function uclass_get_device_tail() can be used to probe the device.
*
* @return the uclass pointer of a child at the given index or
* return NULL on error.
@@ -28,7 +41,8 @@ int uclass_find_device(enum uclass_id id, int index, struct
udevice **devp);
* @id:Id number of the uclass
* #devp: Returns pointer to device, or NULL on error
*
- * The device is not prepared for use - this is an internal function
+ * The device is not prepared for use - this is an internal function.
+ * The function uclass_get_device_tail() can be used to probe the device.
*
* @return 0 if OK (found or not found), -1 on error
*/
@@ -39,7 +53,8 @@ int uclass_find_first_device(enum uclass_id id, struct
udevice **devp);
* @devp: On entry, pointer to device to lookup. On exit, returns pointer
* to the next device in the same uclass, or NULL if none
*
- * The device is not prepared for use - this is an internal function
+ * The device is not prepared for use - this is an internal function.
+ * The function uclass_get_device_tail() can be used to probe the device.
*
* @return 0 if OK (found or not found), -1 on error
*/
--
1.9.1
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[U-Boot] [patch] socfpga: move configuration options to config file
Setting configuration options in header file leads to incosistency between .config user sees, and .config he has. What is worse, a lot of compile warnings is presented for any such config option user sets in .config. Signed-off-by: Pavel Machek pa...@denx.de diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 0ebfbfc..762b937 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -6,3 +6,19 @@ CONFIG_DEFAULT_DEVICE_TREE=socfpga_cyclone5_socdk CONFIG_DM=y CONFIG_DM_SPI=y CONFIG_DM_SPI_FLASH=y +CONFIG_CMD_ASKENV=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_DFU=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_MII=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PING=y +CONFIG_CMD_SETEXPR=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index 2e3a8b6..171ddf4 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -18,24 +18,6 @@ #define CONFIG_FAT_WRITE #define CONFIG_HW_WATCHDOG -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_BOOTZ -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_DFU -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_EXT4 -#define CONFIG_CMD_EXT4_WRITE -#define CONFIG_CMD_FAT -#define CONFIG_CMD_FPGA -#define CONFIG_CMD_FS_GENERIC -#define CONFIG_CMD_GREPENV -#define CONFIG_CMD_MII -#define CONFIG_CMD_MMC -#define CONFIG_CMD_NET -#define CONFIG_CMD_PING -#define CONFIG_CMD_SETEXPR -#define CONFIG_CMD_USB -#define CONFIG_CMD_USB_MASS_STORAGE #define CONFIG_REGEX /* Enable regular expression support */ -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] socfpga: socdk and socrates share SPI flash config, move it to shared place
On Monday, April 20, 2015 at 02:16:02 PM, Pavel Machek wrote: Both Socrates and SocDK share same QSPI and SPI flash configuration. Move the common configuration into common place. Signed-off-by: Pavel Machek pa...@denx.de Is my understanding correct that now all SoCFPGA CV boards will be forced to have this SPI flash ? I believe this is incorrect. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/6] zynqmp: Add SPI driver support for ZynqMP
On 20 April 2015 at 18:15, Jagan Teki jagannadh.t...@gmail.com wrote: On 20 April 2015 at 13:06, Michal Simek michal.si...@xilinx.com wrote: From: Siva Durga Prasad Paladugu siva.durga.palad...@xilinx.com Added the SPI driver support for ZynqMP The controller is same as zynq SPI controller Signed-off-by: Siva Durga Prasad Paladugu siva...@xilinx.com Signed-off-by: Michal Simek michal.si...@xilinx.com --- Changes in v2: - Remove CMD_SPI from header based on Jagan's comment arch/arm/include/asm/arch-zynqmp/hardware.h | 3 +++ include/configs/xilinx_zynqmp.h | 7 +++ 2 files changed, 10 insertions(+) diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index 1fedb1bb4b94..c9dc49d78317 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -11,6 +11,9 @@ #define ZYNQ_SERIAL_BASEADDR0 0xFF00 #define ZYNQ_SERIAL_BASEADDR1 0xFF001000 +#define ZYNQ_SPI_BASEADDR0 0xFF04 +#define ZYNQ_SPI_BASEADDR1 0xFF05 + #define ZYNQ_I2C_BASEADDR0 0xFF02 #define ZYNQ_I2C_BASEADDR1 0xFF03 diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 54bca6d47b72..1d8eaa76dfe7 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -71,6 +71,13 @@ #define CONFIG_CMD_ELF #define CONFIG_MP +/* SPI */ +#ifdef CONFIG_ZYNQ_SPI +# define CONFIG_SPI_FLASH +# define CONFIG_SPI_FLASH_SST +# define CONFIG_CMD_SF +#endif + #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) # define CONFIG_MMC # define CONFIG_GENERIC_MMC -- 2.3.5 Applied u-boot-spi/master Unable to apply, have dependency with series. Reviewed-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com Push this along with the series. thanks! -- Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] socfpga: socdk and socrates share SPI flash config, move it to shared place
On 20.04.2015 14:39, Marek Vasut wrote: On Monday, April 20, 2015 at 02:16:02 PM, Pavel Machek wrote: Both Socrates and SocDK share same QSPI and SPI flash configuration. Move the common configuration into common place. Signed-off-by: Pavel Machek pa...@denx.de Is my understanding correct that now all SoCFPGA CV boards will be forced to have this SPI flash ? I believe this is incorrect. Yes. Defining such a SPI flash is board specific and shouldn't be moved to the common dtsi file. Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] video, ipu: make ldb_clock configurable
On Mon, 20 Apr 2015 07:52:21 +0200 Heiko Schocher h...@denx.de wrote: make the ldb_clock configurable through the new define CONFIG_SYS_LDB_CLOCK. This is needed as the ldb clock is not always 65000, for example on the aristainetos2 board, where the ldb clock derives from PLL5 clock. Signed-off-by: Heiko Schocher h...@denx.de Tested-by: Eric Nelson eric.nel...@boundarydevices.com applied to u-boot-video/master. Thanks! -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/4] mmc: fsl_esdhc: Add adapter card type identification support
RDB boards do not support installing adapter card.
So we would not enable CONFIG_FSL_ESDHC_ADAPTER_IDENT for RDB boards.
There is Linux patches about this sent to upstream.
https://patchwork.kernel.org/patch/6214631/
Linux will decide card transfer mode according 'adapter-type' property of node
u-boot passing.
Thanks.
-Original Message-
From: Sun York-R58495
Sent: Saturday, April 18, 2015 12:08 AM
To: Lu Yangbo-B47093; u-boot@lists.denx.de; Pantelis Antoniou
Subject: Re: [PATCH v2 1/4] mmc: fsl_esdhc: Add adapter card type
identification support
+Pantelis
On 04/16/2015 09:51 PM, Yangbo Lu wrote:
Add adapter card type identification support by reading FPGA
STAT_PRES1 register SDHC Card ID[0:2] bits. To use this function,
define CONFIG_FSL_ESDHC_ADAPTER_IDENT.
Signed-off-by: Yangbo Lu yangbo...@freescale.com
Cc: York Sun york...@freescale.com
---
Changes for v2:
- Document CONFIG_FSL_ESDHC_ADAPTER_IDENT
---
arch/powerpc/include/asm/global_data.h | 3 +++
board/freescale/common/qixis.h | 14 +
doc/README.fsl-esdhc | 25 ++
drivers/mmc/fsl_esdhc.c| 38
+-
drivers/mmc/mmc.c | 6 ++
drivers/mmc/mmc_private.h | 3 +++
include/fsl_esdhc.h| 4
7 files changed, 88 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index c57d9c0..4090975 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -15,6 +15,9 @@
struct arch_global_data {
#if defined(CONFIG_FSL_ESDHC)
u32 sdhc_clk;
+#if defined(CONFIG_FSL_ESDHC_ADAPTER_IDENT)
+ u8 sdhc_adapter;
+#endif
#endif
#if defined(CONFIG_8xx)
unsigned long brg_clk;
diff --git a/board/freescale/common/qixis.h
b/board/freescale/common/qixis.h index 52d2021..51ce9c3 100644
--- a/board/freescale/common/qixis.h
+++ b/board/freescale/common/qixis.h
@@ -115,4 +115,18 @@ void qixis_write_i2c(unsigned int reg, u8 value);
qixis_write_i2c(offsetof(struct qixis, reg), value)
#endif
+/* Use for SDHC adapter card type identification and operation */
+#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
+#define QIXIS_SDID_MASK 0x07
+#define QIXIS_ESDHC_ADAPTER_TYPE_EMMC45 0x1 /* eMMC Card Rev4.5 */
+#define QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY 0x2 /* SD/MMC Legacy Card */
+#define QIXIS_ESDHC_ADAPTER_TYPE_EMMC44 0x3 /* eMMC Card Rev4.4 */
+#define QIXIS_ESDHC_ADAPTER_TYPE_RSV0x4 /* Reserved */
+#define QIXIS_ESDHC_ADAPTER_TYPE_MMC0x5 /* MMC Card */
+#define QIXIS_ESDHC_ADAPTER_TYPE_SD 0x6 /* SD Card Rev2.0 3.0 */
+#define QIXIS_ESDHC_NO_ADAPTER 0x7 /* No Card is Present*/
+#define QIXIS_SDCLKIN0x08
+#define QIXIS_SDCLKOUT 0x02
+#endif
+
#endif
diff --git a/doc/README.fsl-esdhc b/doc/README.fsl-esdhc index
b70f271..29cc661 100644
--- a/doc/README.fsl-esdhc
+++ b/doc/README.fsl-esdhc
@@ -1,5 +1,22 @@
-CONFIG_SYS_FSL_ESDHC_LE means ESDHC IP is in little-endian mode.
-CONFIG_SYS_FSL_ESDHC_BE means ESDHC IP is in big-endian mode.
+Freescale esdhc-specific options
-Accessing ESDHC registers can be determined by ESDHC IP's endian
-mode or processor's endian mode.
+ - CONFIG_FSL_ESDHC_ADAPTER_IDENT
+ Support Freescale adapter card type identification. This is
implemented by
+ operating Qixis FPGA relevant registers. The STAT_PRES1
register has SDHC
+ Card ID[0:2] bits showing the type of card installed in the
SDHC Adapter Slot.
+
+ SDHC Card ID[0:2] Adapter Card Type
+ 0b000 reserved
+ 0b001 eMMC Card Rev4.5
+ 0b010 SD/MMC Legacy Card
+ 0b011 eMMC Card Rev4.4
+ 0b100 reserved
+ 0b101 MMC Card
+ 0b110 SD Card Rev2.0/3.0
+ 0b111 No card is present
+ - CONFIG_SYS_FSL_ESDHC_LE
+ ESDHC IP is in little-endian mode. Accessing ESDHC registers
can be
+ determined by ESDHC IP's endian mode or processor's endian mode.
+ - CONFIG_SYS_FSL_ESDHC_BE
+ ESDHC IP is in big-endian mode. Accessing ESDHC registers can
be determined
+ by ESDHC IP's endian mode or processor's endian mode.
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index
f5d2ccb..355cada 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -643,6 +643,39 @@ int fsl_esdhc_mmc_init(bd_t *bis)
return fsl_esdhc_initialize(bis, cfg); }
+#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT void
Re: [U-Boot] SPI flash on Altera socfpga
Hi Pavel, On 20.04.2015 10:36, Pavel Machek wrote: I see that u-boot 2015.04 has SPI flash configured in the socfpga_cyclone5_socrates.dts. But as far as I know, socdk should have same SPI flash, right? Should similar dts part be enabled there, too? SPI NOR flash is working for me on SoCrates and another similar custom SOCFPGA based board just fine. I tried to get the support to work on custom board, but was not successful so far. Does it work for you, or are still some parts missing? Not that I know of. What are the problems that you experience? Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] SPI flash on Altera socfpga
On Monday, April 20, 2015 at 10:36:09 AM, Pavel Machek wrote: Hi! I see that u-boot 2015.04 has SPI flash configured in the socfpga_cyclone5_socrates.dts. But as far as I know, socdk should have same SPI flash, right? Should similar dts part be enabled there, too? I tried to get the support to work on custom board, but was not successful so far. Does it work for you, or are still some parts missing? Which SPI flash are you talking about -- QSPI one or EPCS/EPCQ one ? I think Stefan got the QSPI one working. EPCQ is a bit trickier. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] socfpga: socdk and socrates share SPI flash config, move it to shared place
Both Socrates and SocDK share same QSPI and SPI flash
configuration. Move the common configuration into common place.
Signed-off-by: Pavel Machek pa...@denx.de
diff --git a/arch/arm/dts/socfpga_cyclone5.dtsi
b/arch/arm/dts/socfpga_cyclone5.dtsi
index 234a901..c40ade5 100644
--- a/arch/arm/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/dts/socfpga_cyclone5.dtsi
@@ -37,4 +37,30 @@
cpu1-start-addr = 0xffd080c4;
};
};
+
+ aliases {
+ spi0 = /spi@ff705000; /* QSPI */
+ spi1 = /spi@fff0;
+ spi2 = /spi@fff01000;
+ };
+};
+
+qspi {
+ status = okay;
+
+ flash0: n25q00@0 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = n25q00;
+ reg = 0; /* chip select */
+ spi-max-frequency = 5000;
+ m25p,fast-read;
+ page-size = 256;
+ block-size = 16; /* 2^16, 64KB */
+ read-delay = 4; /* delay value in read data capture register
*/
+ tshsl-ns = 50;
+ tsd2d-ns = 50;
+ tchsh-ns = 4;
+ tslch-ns = 4;
+ };
};
diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts
b/arch/arm/dts/socfpga_cyclone5_socrates.dts
index ea30483..2a64b3c 100644
--- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
@@ -14,12 +14,6 @@
bootargs = console=ttyS0,115200;
};
- aliases {
- spi0 = /spi@ff705000; /* QSPI */
- spi1 = /spi@fff0;
- spi2 = /spi@fff01000;
- };
-
memory {
name = memory;
device_type = memory;
@@ -44,22 +38,3 @@
status = okay;
};
-qspi {
- status = okay;
-
- flash0: n25q00@0 {
- #address-cells = 1;
- #size-cells = 1;
- compatible = n25q00;
- reg = 0; /* chip select */
- spi-max-frequency = 5000;
- m25p,fast-read;
- page-size = 256;
- block-size = 16; /* 2^16, 64KB */
- read-delay = 4; /* delay value in read data capture register
*/
- tshsl-ns = 50;
- tsd2d-ns = 50;
- tchsh-ns = 4;
- tslch-ns = 4;
- };
-};
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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Re: [U-Boot] [PATCH 09/10] zynq: Move SPL console init out of board_init_f()
2015-04-16 10:14 GMT+09:00 Simon Glass s...@chromium.org: We should not init the console this early and there is no need to. If we want to do early init it can be done in spl_board_init(). Move the preloader_console_init() call from board_init_f() to board_init_r(). Signed-off-by: Simon Glass s...@chromium.org --- I think this is unrelated to 10/10, but anyway looks good. Tested-by: Masahiro Yamada yamada.masah...@socionext.com -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] x86: link: Add PCH driver to support SPI Flash
U-Boot on coreboot does not have a driver for the PCH so cannot see the
SPI peripheral now that it has moved inside the PCH. Add a simple driver so
that SPI flash works again.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/coreboot/pci.c | 11 +++
arch/x86/dts/chromebook_link.dts | 2 +-
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/x86/cpu/coreboot/pci.c b/arch/x86/cpu/coreboot/pci.c
index fa415dd..67eb14c 100644
--- a/arch/x86/cpu/coreboot/pci.c
+++ b/arch/x86/cpu/coreboot/pci.c
@@ -34,3 +34,14 @@ U_BOOT_DRIVER(pci_x86_drv) = {
.of_match = pci_x86_ids,
.ops= pci_x86_ops,
};
+
+static const struct udevice_id generic_pch_ids[] = {
+ { .compatible = intel,pch },
+ { }
+};
+
+U_BOOT_DRIVER(generic_pch_drv) = {
+ .name = pch,
+ .id = UCLASS_PCH,
+ .of_match = generic_pch_ids,
+};
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index b450c3c..7c7034c 100644
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -181,7 +181,7 @@
pch {
reg = 0xf800 0 0 0 0;
- compatible = intel,bd82x6x;
+ compatible = intel,bd82x6x, intel,pch;
u-boot,dm-pre-reloc;
#address-cells = 1;
#size-cells = 1;
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] Pull request: u-boot-video/master
Hey Tom, The following changes since commit 4564faeafbf11feb839e2e3f927be2f1a919ba96: ti: dwc3: Enable clocks in enable_basic_clocks() in hw_data.c (2015-04-16 15:08:36 -0400) are available in the git repository at: git://git.denx.de/u-boot-video.git master for you to fetch changes up to fc1a79d95e9038e9cf53f99c1825005b4dfaf7f4: video, lg4573: add support for the lg4573 display (2015-04-20 09:47:28 +0200) Hannes Petermaier (4): common/lcd_console: cleanup lcd_drawchars/lcd_putc_xy common/lcd_console: ask only one-time for bg/fg-color per call common/lcd_console: move single static variables into common (static) structure common/lcd_console: introduce display/framebuffer rotation Heiko Schocher (3): video, ipu: make ldb_clock configurable video, ipu: make ldb clock frequency overwritable through board code video, lg4573: add support for the lg4573 display README | 20 +++ arch/arm/include/asm/imx-common/video.h |1 + common/Makefile |1 + common/lcd.c| 18 ++- common/lcd_console.c| 203 ++- common/lcd_console_rotation.c | 195 ++ drivers/video/Makefile |1 + drivers/video/ipu.h |1 - drivers/video/ipu_common.c | 14 +- drivers/video/lg4573.c | 231 +++ include/atmel_lcd.h |3 +- include/exynos_lcd.h|1 + include/lcd.h |9 ++ include/lcd_console.h | 28 +++- include/mpc823_lcd.h|1 + include/pxa_lcd.h |1 + include/video.h |4 + 17 files changed, 618 insertions(+), 114 deletions(-) create mode 100644 common/lcd_console_rotation.c create mode 100644 drivers/video/lg4573.c Please pull. Thanks! Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] SPI flash on Altera socfpga
Hi! I see that u-boot 2015.04 has SPI flash configured in the socfpga_cyclone5_socrates.dts. But as far as I know, socdk should have same SPI flash, right? Should similar dts part be enabled there, too? I tried to get the support to work on custom board, but was not successful so far. Does it work for you, or are still some parts missing? Best regards, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 3/6] zynqmp: i2c: Enable i2c driver for zynqMP
From: Siva Durga Prasad Paladugu siva.durga.palad...@xilinx.com
Enable the i2c driver for ZynqMP
Also enable the eeprom for read and writes
to eeprom on ZynqMP
ZynqMP uses the same i2c controller as in Zynq
Signed-off-by: Siva Durga Prasad Paladugu siva...@xilinx.com
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2: None
arch/arm/include/asm/arch-zynqmp/hardware.h | 3 +++
include/configs/xilinx_zynqmp.h | 23 +++
2 files changed, 26 insertions(+)
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h
b/arch/arm/include/asm/arch-zynqmp/hardware.h
index 87792c21a5d0..1fedb1bb4b94 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -11,6 +11,9 @@
#define ZYNQ_SERIAL_BASEADDR0 0xFF00
#define ZYNQ_SERIAL_BASEADDR1 0xFF001000
+#define ZYNQ_I2C_BASEADDR0 0xFF02
+#define ZYNQ_I2C_BASEADDR1 0xFF03
+
#define ZYNQ_SDHCI_BASEADDR0 0xFF16
#define ZYNQ_SDHCI_BASEADDR1 0xFF17
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index d0ec3c066f33..54bca6d47b72 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -119,6 +119,29 @@
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_MAXARGS 64
+#define CONFIG_ZYNQ_I2C0
+#define CONFIG_SYS_I2C_ZYNQ
+
+/* I2C */
+#if defined(CONFIG_SYS_I2C_ZYNQ)
+# define CONFIG_CMD_I2C
+# define CONFIG_SYS_I2C
+# define CONFIG_SYS_I2C_ZYNQ_SPEED 10
+# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
+#endif
+
+#define CONFIG_ZYNQMP_EEPROM
+
+/* EEPROM */
+#ifdef CONFIG_ZYNQMP_EEPROM
+# define CONFIG_CMD_EEPROM
+# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN2
+# define CONFIG_SYS_I2C_EEPROM_ADDR0x54
+# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
+# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
+# define CONFIG_SYS_EEPROM_SIZE(64 * 1024)
+#endif
+
#define CONFIG_FIT
#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
--
2.3.5
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[U-Boot] [PATCH v2 2/6] zynqmp: Add support for EMMC bootmode
Add support for EMMC bootmode.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2: None
arch/arm/include/asm/arch-zynqmp/hardware.h | 3 ++-
board/xilinx/zynqmp/zynqmp.c| 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h
b/arch/arm/include/asm/arch-zynqmp/hardware.h
index 188b5c2144af..87792c21a5d0 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -45,7 +45,8 @@ struct iou_scntr {
/* Bootmode setting values */
#define BOOT_MODES_MASK0x000F
-#define SD_MODE0x0005
+#define SD_MODE0x0003
+#define EMMC_MODE 0x0006
#define JTAG_MODE 0x
#define ZYNQMP_RPU_BASEADDR0xFF9A
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index e38948426d70..f5ff64d988e5 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -83,6 +83,7 @@ int board_late_init(void)
switch (bootmode) {
case SD_MODE:
+ case EMMC_MODE:
setenv(modeboot, sdboot);
break;
default:
--
2.3.5
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[U-Boot] [PATCH v2 6/6] zynqmp: Enable SDHCI0 options
Enable SDHCI0 for zynqmp.
Add empty gpio.h because of sdhci requirement.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2: None
There will be gpio driver anyway that's why it should be fine to add
empty file.
---
arch/arm/include/asm/arch-zynqmp/gpio.h | 12
include/configs/xilinx_zynqmp.h | 2 ++
2 files changed, 14 insertions(+)
create mode 100644 arch/arm/include/asm/arch-zynqmp/gpio.h
diff --git a/arch/arm/include/asm/arch-zynqmp/gpio.h
b/arch/arm/include/asm/arch-zynqmp/gpio.h
new file mode 100644
index ..098bbde06f30
--- /dev/null
+++ b/arch/arm/include/asm/arch-zynqmp/gpio.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright 2015 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ARCH_ZYNQMP_GPIO_H
+#define __ARCH_ZYNQMP_GPIO_H
+
+/* Empty file - sdhci requires this. */
+
+#endif
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 45282ed445e5..880d29ca7157 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -61,6 +61,8 @@
#define CONFIG_SYS_BAUDRATE_TABLE \
{ 4800, 9600, 19200, 38400, 57600, 115200 }
+#define CONFIG_ZYNQ_SDHCI0
+
/* Command line configuration */
#define CONFIG_CMD_ENV
#define CONFIG_CMD_EXT2
--
2.3.5
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[U-Boot] [PATCH v2 1/6] zynqmp: Add support for emulation platform - Veloce
Add support for Veloce - zynqmp emulation platform.
Platform doesn't support SDHCI.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2: None
arch/arm/cpu/armv8/zynqmp/clk.c | 3 +++
arch/arm/cpu/armv8/zynqmp/cpu.c | 2 ++
arch/arm/include/asm/arch-zynqmp/hardware.h | 1 +
board/xilinx/zynqmp/zynqmp.c| 8 ++--
4 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv8/zynqmp/clk.c b/arch/arm/cpu/armv8/zynqmp/clk.c
index 0af619d92fde..9147fa749507 100644
--- a/arch/arm/cpu/armv8/zynqmp/clk.c
+++ b/arch/arm/cpu/armv8/zynqmp/clk.c
@@ -6,6 +6,7 @@
*/
#include common.h
+#include asm/arch/clk.h
#include asm/arch/hardware.h
#include asm/arch/sys_proto.h
@@ -16,6 +17,8 @@ unsigned long get_uart_clk(int dev_id)
u32 ver = zynqmp_get_silicon_version();
switch (ver) {
+ case ZYNQMP_CSU_VERSION_VELOCE:
+ return 96000;
case ZYNQMP_CSU_VERSION_EP108:
return 2500;
}
diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c
index 11958fea6f11..60d7d20e17c8 100644
--- a/arch/arm/cpu/armv8/zynqmp/cpu.c
+++ b/arch/arm/cpu/armv8/zynqmp/cpu.c
@@ -20,6 +20,8 @@ unsigned int zynqmp_get_silicon_version(void)
gd-cpu_clk = get_tbclk();
switch (gd-cpu_clk) {
+ case 0 ... 100:
+ return ZYNQMP_CSU_VERSION_VELOCE;
case 5000:
return ZYNQMP_CSU_VERSION_QEMU;
}
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h
b/arch/arm/include/asm/arch-zynqmp/hardware.h
index 3df3147fc4c3..188b5c2144af 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -84,6 +84,7 @@ struct apu_regs {
/* Board version value */
#define ZYNQMP_CSU_VERSION_SILICON 0x0
#define ZYNQMP_CSU_VERSION_EP108 0x1
+#define ZYNQMP_CSU_VERSION_VELOCE 0x2
#define ZYNQMP_CSU_VERSION_QEMU0x3
#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 1325bca5e552..e38948426d70 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -56,14 +56,18 @@ int board_mmc_init(bd_t *bd)
{
int ret = 0;
+ u32 ver = zynqmp_get_silicon_version();
+
+ if (ver != ZYNQMP_CSU_VERSION_VELOCE) {
#if defined(CONFIG_ZYNQ_SDHCI)
# if defined(CONFIG_ZYNQ_SDHCI0)
- ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0);
+ ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0);
# endif
# if defined(CONFIG_ZYNQ_SDHCI1)
- ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1);
+ ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1);
# endif
#endif
+ }
return ret;
}
--
2.3.5
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[U-Boot] [PATCH v2 4/6] zynqmp: Add SPI driver support for ZynqMP
From: Siva Durga Prasad Paladugu siva.durga.palad...@xilinx.com Added the SPI driver support for ZynqMP The controller is same as zynq SPI controller Signed-off-by: Siva Durga Prasad Paladugu siva...@xilinx.com Signed-off-by: Michal Simek michal.si...@xilinx.com --- Changes in v2: - Remove CMD_SPI from header based on Jagan's comment arch/arm/include/asm/arch-zynqmp/hardware.h | 3 +++ include/configs/xilinx_zynqmp.h | 7 +++ 2 files changed, 10 insertions(+) diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index 1fedb1bb4b94..c9dc49d78317 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -11,6 +11,9 @@ #define ZYNQ_SERIAL_BASEADDR0 0xFF00 #define ZYNQ_SERIAL_BASEADDR1 0xFF001000 +#define ZYNQ_SPI_BASEADDR0 0xFF04 +#define ZYNQ_SPI_BASEADDR1 0xFF05 + #define ZYNQ_I2C_BASEADDR0 0xFF02 #define ZYNQ_I2C_BASEADDR1 0xFF03 diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 54bca6d47b72..1d8eaa76dfe7 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -71,6 +71,13 @@ #define CONFIG_CMD_ELF #define CONFIG_MP +/* SPI */ +#ifdef CONFIG_ZYNQ_SPI +# define CONFIG_SPI_FLASH +# define CONFIG_SPI_FLASH_SST +# define CONFIG_CMD_SF +#endif + #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) # define CONFIG_MMC # define CONFIG_GENERIC_MMC -- 2.3.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 5/6] zynqmp: Enable FS_GENERIC option
From: Siva Durga Prasad Paladugu siva.durga.palad...@xilinx.com
Provide an option to write filesystem independend commands.
Signed-off-by: Siva Durga Prasad Paladugu siva...@xilinx.com
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2: None
include/configs/xilinx_zynqmp.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 1d8eaa76dfe7..45282ed445e5 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -66,6 +66,7 @@
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_FAT
+#define CONFIG_CMD_FS_GENERIC
#define CONFIG_CMD_MEMORY
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_ELF
@@ -99,8 +100,8 @@
kernel_addr=0x8\0 \
fdt_addr=0x700\0 \
fdt_high=0x1000\0 \
- sdboot=mmcinfo fatload mmc 0:0 $fdt_addr system.dtb \
- fatload mmc 0:0 $kernel_addr Image booti $kernel_addr -
$fdt_addr\0
+ sdboot=mmcinfo load mmc 0:0 $fdt_addr system.dtb \
+ load mmc 0:0 $kernel_addr Image booti $kernel_addr -
$fdt_addr\0
#define CONFIG_BOOTARGSsetenv bootargs
console=ttyPS0,${baudrate} \
earlycon=cdns,mmio,0xff00,${baudrate}n8
--
2.3.5
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