Hi,
On 21-06-15 10:01, Ian Campbell wrote:
On Sat, 2015-06-20 at 17:35 +0200, Hans de Goede wrote:
Now that the device-model port of the musb mode makes it possible, enable
both the ehci and oth in host mode on boards where the otg is wired up in
otg?
Replaced with musb in my personal
On Mon, 2015-06-22 at 17:39 +0200, Hans de Goede wrote:
How about the following:
Subject: [PATCH 1/3] sunxi: musb: Improve output during probing
When we return an error the usb core will log a message, so in this case
do not print anything.
Signed-off-by: Hans de Goede
Hi,
On 21-06-15 10:00, Ian Campbell wrote:
On Sat, 2015-06-20 at 17:35 +0200, Hans de Goede wrote:
When we return an error the usb core will log a message, so in this case
do not print a newline, instead print : after our identifier as a
seperator between our identifier and the error message
Hi joe,
you did introduce callbacks on setting up ip,dns, ... in net.c
Why it did become necessary to do following ?
if (flags H_PROGRAMMATIC)
return 0;
I have actually trouble with this, because my code in
board/BuR/kwb/board.c doesn't work anymore as expected.
This command needs to exist in the Kconfig so that it can be moved from
the config_cmd_default.h.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
common/Kconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/common/Kconfig b/common/Kconfig
index 0ccdf62..cb14592 100644
---
This series addresses a few build failures and minor tweaks needed to
move the default commands to Kconfig. It then moves defaults out of
arch Kconfig files and updates the defaults in common/Kconfig to enable
the default commands from include/config_cmd_default.h.
This was requested by Tom here:
The help for this was simply copied from another command.
Update it to reflect the command.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
common/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/common/Kconfig b/common/Kconfig
index f6478fa..0ccdf62
Boards using link-local need lib rand.
When link-local is moved to Kconfig, this dependency will be described
there.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
configs/a3m071_defconfig | 3 ++-
configs/a4m2k_defconfig | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
This config defined a CONS_INDEX as a config but did not define it in
any Kconfig, so savedefconfig will delete that entry. Use
CONFIG_SYS_EXTRA_OPTIONS for now until that is added to Kconfig.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
configs/am335x_baltos_defconfig | 3 +--
1
This config needs to be available in the Kconfig to allow it to be
removed from arch defaults.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
drivers/mtd/spi/Kconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index
Hi Tom,
On Fri, Jun 12, 2015 at 7:08 AM, Tom Rini tr...@konsulko.com wrote:
On Thu, Jun 11, 2015 at 11:12:43AM -0500, Joe Hershberger wrote:
Hi Tom,
On Thu, Jun 11, 2015 at 10:12 AM, Tom Rini tr...@konsulko.com wrote:
On Thu, Jun 11, 2015 at 09:14:33AM -0500, Joe Hershberger wrote:
Hi
Thanks Stefan,
-Original Message-
From: Stefan Roese [mailto:s...@denx.de]
Sent: Monday, June 22, 2015 1:35 AM
To: Vikas MANOCHA
Cc: u-boot@lists.denx.de; grmo...@opensource.altera.com;
dingu...@opensource.altera.com; jt...@openedev.com
Subject: Re: [PATCH RESEND 0/7] spi:
Hi Hannes,
On Mon, Jun 22, 2015 at 7:23 AM, Hannes Schmelzer
han...@schmelzer.or.at wrote:
Hi joe,
you did introduce callbacks on setting up ip,dns, ... in net.c
Why it did become necessary to do following ?
if (flags H_PROGRAMMATIC)
return 0;
Because the
Instead of selecting REGEX when NET is enabled, make it the default, but
allow boards that are tiny to disable it and lose functionality on all
but the first Ethernet adapter.
cm-bf548, bf538f-ezkit, and bf533-stamp need this. None appear to have
more than one Ethernet interface.
Signed-off-by:
bf533-stamp, bf538f-ezkit, and cm-bf548 are very space limited.
This was introduced by:
6e0d26c0502e (net: Handle ethaddr changes as an env callback)
by enabling CONFIG_REGEX, which is too big for these boards.
This patch disables CONFIG_REGEX at the expense of working with more
than the first
Hi Tom,
On Mon, Jun 22, 2015 at 2:16 AM, Tom Rini tr...@konsulko.com wrote:
On Sun, Jun 21, 2015 at 03:21:49PM +0800, Bin Meng wrote:
+Tom since I see this patch was assigned to Tom in the patchwork.
Hi Matt,
On Sat, Jun 20, 2015 at 1:40 AM, Matt Porter mpor...@konsulko.com wrote:
On Fri,
On 16 June 2015 at 15:36, Daniel Schwierzeck
daniel.schwierz...@gmail.com wrote:
2015-06-16 11:36 GMT+02:00 Jagan Teki jt...@openedev.com:
On 16 June 2015 at 14:48, Heiko Schocher denx h...@denx.de wrote:
Hello Jagan,
Am 16.06.2015 um 10:52 schrieb Jagan Teki:
Hi Heiko,
On 16 June 2015
On 22 June 2015 at 03:10, Angelo Dureghello ang...@sysam.it wrote:
Fix compilation warnings for redefined 'clamp' macro and non-uniform
clamp macro types.
Signed-off-by: Angelo Dureghello ang...@sysam.it
---
drivers/spi/cf_qspi.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
Hi!
Comment what kind of errata this is working around?
I'll have to ask around.
It is to workaround the computational of SDRAM rows. The info is then
used to calculate the SDRAM size. By doing this, we can remove from
hardcoding the SDRAM size into the code. More info at
2015-06-22 8:43 GMT+02:00 Jagan Teki jt...@openedev.com:
On 16 June 2015 at 15:36, Daniel Schwierzeck
daniel.schwierz...@gmail.com wrote:
2015-06-16 11:36 GMT+02:00 Jagan Teki jt...@openedev.com:
On 16 June 2015 at 14:48, Heiko Schocher denx h...@denx.de wrote:
Hello Jagan,
Am 16.06.2015
Dear Paul,
In message 1434889782.11829.5.ca...@u129.fr you wrote:
Now I only have :
IP-Config: eth0 hardware address 02:c4:06:82:13:47 mtu 1500 DHCP
...
IP-Config: no response after 2 secs - giving up
IP-Config: eth0 hardware address 02:c4:06:82:13:47 mtu 1500 DHCP
IP-Config: no
On 22/06/2015 08:44, Jagan Teki wrote:
On 22 June 2015 at 03:10, Angelo Dureghello ang...@sysam.it wrote:
Fix compilation warnings for redefined 'clamp' macro and non-uniform
clamp macro types.
Signed-off-by: Angelo Dureghello ang...@sysam.it
---
drivers/spi/cf_qspi.c | 3 +--
1 file
we currently use in-development IODelay values for DRA72x which are
proposed in the data sheet, however, DRA72x EVM uses DP83865 ethernet
Phy over RGMII. The PHY characteristics and routing choices made on
the EVM, make the current iodelay values fail ethernet communication.
Instead, we need to
On Monday, June 22, 2015 at 11:13:59 AM, Ramneek Mehresh wrote:
Hi Marek,
Hello,
Below patches are applied on usb-next branch since 7-Jun-2015. When are you
planning for these patches to be in u-boot main? We have to send some
LS2085A based patches in upstream(which are all dependent on
Hi Vikas,
On 19.06.2015 23:38, Vikas MANOCHA wrote:
- git bisect or cherry-pick to find out which patch is breaking the
read functionality.
This one is the first introducing this breakage:
spi: cadence_qspi: fix base trigger address transfer start address
Ok, can you confirm applying
Use one command for showing overall CPU status than several without
knowing how many cpus is available in the system.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
common/cmd_mp.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/common/cmd_mp.c
Hi,
On Tue, 2015-06-09 at 10:51 -0500, Dinh Nguyen wrote:
On 6/9/15 6:55 AM, Pavel Machek wrote:
Hi!
+struct sdram_prot_rule {
+ uint64_tsdram_start; /* SDRAM start address */
+ uint64_tsdram_end; /* SDRAM end address */
+ uint32_trule; /* SDRAM
From: Daniel Schwierzeck daniel.schwierz...@gmail.com
Add MTD layer driver for spi, original patch from:
http://git.denx.de/?p=u-boot/u-boot-mips.git;a=commitdiff;h=bb246819cdc90493dd7089eaa51b9e639765cced
Changes from Heiko Schocher against this patch:
- Remove compile error if not defining
From: Heiko Schocher h...@denx.de
Move common functions from cmd_nand.c (for calculating offset
and size from cmdline paramter) to common place, so they could
used from other commands which use mtd partitions.
For onenand the arg_off_size() is left in common/cmd_onenand.c.
It should use now the
From: Heiko Schocher h...@denx.de
If flash pointer is used free it, before probing a new
flash and storing it in flash.
Signed-off-by: Heiko Schocher h...@denx.de
Tested-by: Jagannadh Teki jt...@openedev.com
Reviewed-by: Jagannadh Teki jt...@openedev.com
---
Changes in v7: none
Changes in v6:
-
Just resend the whole series with below changes,
Changes for v7:
- Add more notes on commit message
- Update the info for CONFIG_SPI_FLASH_MTD in README
- Remove ^ character in sf erase line sf help text
- Update starting character in commit message heads with
On 22 June 2015 at 17:23, Daniel Schwierzeck
daniel.schwierz...@gmail.com wrote:
2015-06-22 8:43 GMT+02:00 Jagan Teki jt...@openedev.com:
On 16 June 2015 at 15:36, Daniel Schwierzeck
daniel.schwierz...@gmail.com wrote:
2015-06-16 11:36 GMT+02:00 Jagan Teki jt...@openedev.com:
On 16 June 2015
From: Heiko Schocher h...@denx.de
With this patch, it is possible to get the offset and size information
from the mtdpartiton setting in mtdparts, similiar to the
nand commandos.
= sf
sf - SPI flash sub-system
Usage:
sf probe [[bus:]cs] [hz] [mode] - init flash device on given SPI bus
+ Heiko
+ Daniel
-- Forwarded message --
From: Jagan Teki jt...@openedev.com
Date: 23 June 2015 at 01:30
Subject: [U-Boot] [PATCH v7 0/4] sf: Add MTD layer support
To: u-boot@lists.denx.de
Cc: Jagan Teki jt...@openedev.com
Just resend the whole series with below changes,
Map USB XHCI controller base addresses for LS2085A SOC
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
include/linux/usb/xhci-fsl.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h
index b07bf19..602a413 100644
---
Hi Andreas,
I thought of it too. I thought it was dtb all along. But all changed was
below line, without even touching the dtb. I just replaced the uboot and I
started to see 1G SDRAM. Thats why I got confused.
From: Andreas Färber afaer...@suse.de
To: Naitik Amin
We should not leave the expansion ROM address window open when there
is not a valid ROM.
Suggested-by: Matt Porter mpor...@konsulko.com
Signed-off-by: Bin Meng bmeng...@gmail.com
---
I did not update pci_rom_probe() to handle the header type1 ROM address,
as I think pci_rom_probe() is a static
Currently PCI expansion ROM address is assigned by a call to
pciauto_setup_rom() outside of the pci auto config process.
This does not work when expansion ROM is on a device behind
PCI bridge where bridge's memory limit register was already
programmed to a value that does not cover the newly
Hello Jagan,
Am 22.06.2015 um 22:00 schrieb Jagan Teki:
Just resend the whole series with below changes,
Changes for v7:
- Add more notes on commit message
- Update the info for CONFIG_SPI_FLASH_MTD in README
- Remove ^ character in sf erase line sf help text
-
Enable writing MP table for Intel Crown Bay board.
Signed-off-by: Bin Meng bmeng...@gmail.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in v2: None
configs/crownbay_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig
So far interrupt routing works pretty well for any on-chip devices
on Intel Crown Bay. When inserting any PCIe card to any PCIe slot,
Linux kernel is smart enough to do interrupt swizzling and figure
out device's irq using its parent bridge's interrupt routing info
all the way up to its root port.
The MP table provides a way for the operating system to support
for symmetric multiprocessing as well as symmetric I/O interrupt
handling with the local APIC and I/O APIC. We provide a bunch of
APIs for U-Boot to write the floating table, configuration table
header as well as base and extended
Implement write_mp_table() to create a minimal working MP table.
This includes an MP floating table, a configuration table header
and all of the 5 base configuration table entries. The I/O interrupt
assignment table entry is created based on the same information used
in the creation of PIRQ
Document U-Boot multi-processor support as well as configuration
tables like SFI and MP tables for SMP OS kernel.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
Changes in v2:
- New patch to update README.x86 for SMP support
doc/README.x86 | 13 +
1 file changed, 13 insertions(+)
This adjusts (micro)frame length to appropriate value thus
avoiding USB devices to time out over a longer run
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
drivers/usb/host/xhci-dwc3.c | 6 ++
drivers/usb/host/xhci-fsl.c | 3 +++
include/linux/usb/dwc3.h | 22
Replace uint32_t with uintptr_t to remove compilation
warnings for 64-bit architectures.
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
Depends on commit ec3faf7e2c0671b906018b3c481be2a490bf2bb3
in u-boot-usb/next
drivers/usb/host/xhci-fsl.c | 8
1 file changed, 4
Add USB XHCI support for ls2085qds platform
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
include/configs/ls2085aqds.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/include/configs/ls2085aqds.h b/include/configs/ls2085aqds.h
index 731eca2..7b77fb4 100644
---
Add USB XHCI support for ls2085rdb platform
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
include/configs/ls2085ardb.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/include/configs/ls2085ardb.h b/include/configs/ls2085ardb.h
index a0f0f6c..a81653c 100644
---
Define base address of usb xhci controllers for LS2085A SOC
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
arch/arm/include/asm/arch-fsl-lsch3/config.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h
Add driver model support to the mc146818 rtc driver. Also clean up
the driver a little bit for coding convention issues.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
Changes in v2:
- New patch to support mc146818 driver in driver model
drivers/rtc/mc146818.c | 312
Add a RTC node in the device tree to enable DM RTC support.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
Changes in v2:
- New patch to enable DM RTC support for Crown Bay
arch/x86/dts/crownbay.dts | 1 +
arch/x86/dts/rtc.dtsi | 6 ++
configs/crownbay_defconfig | 1 +
3 files
Currently CONFIG_DM_I2C is used in cmd_date.c for driver model,
but it should be actually CONFIG_DM_RTC.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
Changes in v2:
- New patch to change to use CONFIG_DM_RTC instead of CONFIG_DM_I2C
common/cmd_date.c | 12 ++--
1 file changed, 6
Move USB controller Base address mapping from ls102xa immap
to fsl xhci header. This is required to remove any warnings when
controller base addresses are mapped for multiple platforms
in their respective files.
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
Define CONFIG_SYS_CACHELINE_SIZE for LS2085A which is required by
USB XHCI stack for alignment
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
This patchset depends on a patchset sent to u-boot-usb/next
http://patchwork.ozlabs.org/patch/487462/
There are 4 usb ports on the Intel Crown Bay board, 2 of which are
connected to Topcliff usb host 0 and the other 2 connected to usb
host 1. USB devices inserted in the ports connected to usb host 1
cannot get detected due to wrong IRQ assigned to the controller.
Actually we need apply the PCI
I/O APIC registers are addressed indirectly. Add io_apic_read() and
io_apic_write() routines to help register access. Two macros for I/O
APIC ID and version register offset are also added.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
Changes in v2:
- Do not use inline for register access
There is no need to populate multiple irq info entries with the same
bus number and device number, but with different interrupt pin. We
can use the same entry to store all the 4 interrupt pin (INT A/B/C/D)
routing information to reduce the whole PIRQ routing table size.
Signed-off-by: Bin Meng
Remove inline for lapic access routines and expose lapic_read()
lapic_write() as APIs to read/write lapic registers. Also move
stop_this_cpu() to mp_init.c as it has nothing to do with lapic.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
Changes in v2:
- New patch to remove inline for lapic
In fill_irq_info() pci device's function number is written into
the table, however this is not really necessary. The function
number can be anything as OS doesn't care about this field,
neither does the PIRQ routing specification. Change to always
writing 0 as the function number.
Signed-off-by:
Remove all the dead/unused macros from asm/ioapic.h.
Signed-off-by: Bin Meng bmeng...@gmail.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in v2: None
arch/x86/include/asm/ioapic.h | 26 +++---
1 file changed, 3 insertions(+), 23 deletions(-)
diff --git
We should write correct bus number to the PIRQ routing table for the
irq router from device tree, instead of hard-coded zero.
Signed-off-by: Bin Meng bmeng...@gmail.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in v2: None
arch/x86/cpu/irq.c | 2 +-
1 file changed, 1 insertion(+), 1
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