Hello Simon,
Am 03.07.2015 um 02:15 schrieb Simon Glass:
When driver model is not used the current code does not correctly select
the pinmux for the I2C bus. This bug was introduced by this commit:
8dfcbaa dm: i2c: s3c24x0: adjust to dm-i2c api
Signed-off-by: Simon Glass s...@chromium.org
---
Hello Simon,
Am 03.07.2015 um 02:15 schrieb Simon Glass:
While I2C supports multi-master buses this is difficult to get right. This
What do you mean here? Where are the problems? You have an i2c mux, or?
driver provides a scheme based on two 'claim' GPIOs, one driven by the AP
and one
Hello Simon,
Am 03.07.2015 um 02:15 schrieb Simon Glass:
This function should not use mixed case, and it is simpler to use
clrbits_le32() when clearing bits. Fix it.
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/i2c/s3c24x0_i2c.c | 14 +++---
1 file changed, 7
Hello Simon,
Am 03.07.2015 um 02:15 schrieb Simon Glass:
Add a new I2C_MUX uclass. Devices in this class can multiplex between
several I2C buses, selecting them one at a time for use by the system.
The multiplexing mechanism is left to the driver to decide - it may be
controlled by GPIOs, for
Hi,
On 01-07-15 21:47, Simon Glass wrote:
Hi Hans,
On 1 July 2015 at 12:52, Hans de Goede hdego...@redhat.com wrote:
Hi Simon, Marek,
Here is a series with just the patches which needed work after my v1
posting of this series.
I've a rebased version of the entire series (some patches
Hi Tom,
Here is a rebased / fixed version of my previous pull-req for
two bug-fixes, and one new board.
Since the first one was no good I've done a forced push with
the new one to u-boot-sunxi/master .
The following changes since commit 891b487098ee2169a16b1bbb354aaef28aa90630:
Merge branch
Mainline kernel will be using this device name as well.
Signed-off-by: Kamil Lulko re...@wp.pl
---
include/configs/stm32f429-discovery.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/stm32f429-discovery.h
b/include/configs/stm32f429-discovery.h
index
Hi Tom,
On 29-06-15 23:03, Karsten Merker wrote:
Commit 487b3277d4f70bcb2e4a1930beb6438565f25910
(sunxi: GPIO pin mux hardware-feature-specific function index defines)
has removed and/or changed the names of various pinmux definitions,
but has missed two instances in
Hello Tom,
On Thu, 2 Jul 2015 18:55:04 -0400, Tom Rini tr...@konsulko.com wrote:
On Thu, Jul 02, 2015 at 11:27:20PM +0200, Albert ARIBAUD wrote:
Hello Tom,
The following changes since commit 9c6b05cb724e18d1db3f9e1a75b2272572f06fbd:
Prepare v2015.07-rc3 (2015-06-29 17:22:01
Hello Lokesh,
On Thu, 2 Jul 2015 09:48:31 +0530, Lokesh Vutla lokeshvu...@ti.com
wrote:
Hi Albert,
On Wednesday 01 July 2015 06:43 PM, Albert ARIBAUD wrote:
Hello all,
I get the following when building current u-boot-arm/master with
current u-boot/master:
* WARNING: no status info
On Sun, 5 Jul 2015 17:13:44 +0200, Albert ARIBAUD
albert.u.b...@aribaud.net wrote:
This target is ARMv7
Argh! This target is *ARMv7-R* -- will fix when applying.
Amicalement,
--
Albert.
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On Wed, 1 Jul 2015 15:28:39 +0200, Albert ARIBAUD (3ADEV)
albert.arib...@3adev.fr wrote:
This removes the following two warnings from buildman:
WARNING: no status info for 'cairo'
WARNING: no maintainers for 'cairo'
Signed-off-by: Albert ARIBAUD (3ADEV)
This target is ARMv7 therefore can only build for Thumb,
but it did not #define CONFIG_SYS_THUMB_BUILD, so the U-Boot
code did not know it had to build for Thumb(2), not ARM.
This patch is binary-invariant: builds of stm32f429-discovery
with and without this patch were compared and found to
Kirkwood files cpu.c and cache.c cannot build in Thumb state;
force them in ARM state even under CONFIG_SYS_THUMB_BUILD.
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
Changes in v4: None
New in v3
arch/arm/mach-kirkwood/Makefile | 6 ++
1 file changed, 6 insertions(+)
diff
Now that kirkwood supports CONFIG_SYS_THUMB_BUILD, switch to it
for openrd. This brings U-Boot back to an acceptable size.
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
Changes in v4: None
New in v3
include/configs/openrd.h | 1 +
1 file changed, 1 insertion(+)
diff --git
When building a Thumb-1-only target with CONFIG_SYS_THUMB_BUILD,
some files fail to build, most of the time because they include
mcr instructions, which only exist for Thumb-2.
Thos patch introduces a Kconfig option CONFIG_THUMB2 and uses
it to select between Thumb-2 and ARM mode for the
This series implements essential changes for thumb-1 support and
activates thumb-1 build for openrd as a proof of concept as well as
a fix to bring the size of openrd targets back under an acceptable
limit.
For other targets, some additional files might need to be forced to
ARM building, notably
From: Tom Rini tr...@konsulko.com
With certain features being convert to DM now we want sunxi to default
to having DM enabled for ETH/SERIAL and USB in some cases.
Cc: Hans de Goede hdego...@redhat.com
Cc: Ian Campbell i...@hellion.org.uk
Signed-off-by: Tom Rini tr...@konsulko.com
Some boards simply do not have any serial ports. Also no one will see the
panic message as there is no where to print it if no serial port is found
(and other stdout options are not yet set up at this point).
Signed-off-by: Hans de Goede hdego...@redhat.com
---
drivers/serial/serial-uclass.c | 8
Hi,
On 29-06-15 11:48, ?? wrote:
From 94a30632fb9db555b8dbfac4e46c922c73371960 Mon Sep 17 00:00:00 2001
From: Zhi Yuan Wan dv...@qq.com
Date: Thu, 25 Jun 2015 20:03:58 +0800
Subject: [PATCH 3/3] sunxi:Added difference MMC SLOT for booting
Signed-off-by: Zhi Yuan Wan dv...@qq.com
Hi,
On 29-06-15 11:47, ?? wrote:
From 83aa308eb836b0a63f0e30bd10d72040151a1e98 Mon Sep 17 00:00:00 2001
From: Zhi Yuan Wan dv...@qq.com
Date: Thu, 25 Jun 2015 20:00:46 +0800
Subject: [PATCH 2/3] sunxi:Added Mele i7 eMMC MOD DTS
Signed-off-by: Zhi Yuan Wan dv...@qq.com
---
Hello Masahiro,
On Fri, 3 Jul 2015 16:13:09 +0900, Masahiro Yamada
yamada.masah...@socionext.com wrote:
We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
Hi All,
Here is a patch-set to cleanup the CONFIG_foo=y options which are present
in practically all sunxi defconfigs since Joe's latest patches.
Simon, the first patch in this patchset is necessary to be able to
use DM_SERIAL=y on all sunxi boards, without this things do not work
as some sunxi
Start using the new Kconfig options which are available for these now,
and simply always enable them by selecting them as sunxi builds always
include USB support.
Signed-off-by: Hans de Goede hdego...@redhat.com
Acked-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/Kconfig | 2 ++
Hi,
First of all thanks for the patches.
I've a question about this series in general, this series is
for the Mele i7 board, correct?
AFAIK that board has regular NAND, not an eMMC.
It seems your version has an eMMC though, so it seems that
there are 2 versions of the board. Are you sure you
On Sun, Jul 5, 2015 at 7:34 PM, Albert ARIBAUD
albert.u.b...@aribaud.net wrote:
Hello Lokesh,
On Thu, 2 Jul 2015 09:48:31 +0530, Lokesh Vutla lokeshvu...@ti.com
wrote:
Hi Albert,
On Wednesday 01 July 2015 06:43 PM, Albert ARIBAUD wrote:
Hello all,
I get the following when building
Hello Yegor,
On Wed, 1 Jul 2015 22:17:34 +0200, Yegor Yefremov yegorsli...@googlemail.com
wrote:
Signed-off-by: Yegor Yefremov yegorsli...@googlemail.com
---
board/vscom/baltos/MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
create mode 100644 board/vscom/baltos/MAINTAINERS
On Saturday 04 July 2015 06:23 PM, R, Vignesh wrote:
On 7/3/2015 5:12 PM, Tom Rini wrote:
On Fri, Jul 03, 2015 at 04:46:10PM +0530, Vignesh R wrote:
ti_qspi uses memory map mode for faster read. Enabling DMA will increase
read speed by 3x @48MHz on DRA74 EVM.
Signed-off-by: Vignesh R
Hello Simon,
Am 03.07.2015 um 02:15 schrieb Simon Glass:
The existing driver model implementation uses the old non-driver-model code
to operate, but has become impossibly tangled as a result. The actual
algorithm is quite simple.
Also the normal-speed and high-speed buses are quite different
This change rearranges general MAC configuration and PHY specific
configuration of MAC registers (duplex mode and speed), before this
change set bits related to PHY configuration in MAC2 and COMMAND
registers are rewritten by the following writing to the registers.
Without the change auto
This is an update to LPC32xx MAC driver, which needs to have small
quirks in order to properly work with an external phy connected by
RMII interface.
RMII mode of MAC operation is selected, if CONFIG_RMII is defined,
this option is aligned with a number of boards, which already have
the same
LPC32xx MAC and clock control configuration requires some minor quirks
to deal with a phy connected by RMII.
It's worth to mention that the kernel and legacy BSP from NXP sets
SUPP_RESET_RMII == (1 11) bit, however the description of this bit is
missing in shared LPC32x0 User Manual UM10326 Rev.
On Sat, Jul 4, 2015 at 8:28 AM, Simon Glass s...@chromium.org wrote:
The logic is incorrect and currently has no effect. Fix it so that we can
write to SPI flash, since by default it is write-protected.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Correct parameter
On Sat, Jul 4, 2015 at 8:28 AM, Simon Glass s...@chromium.org wrote:
This driver should use the x86 PCI configuration functions. Also adjust its
compatible string to something generic (i.e. without a vendor name).
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Drop the
On Sat, Jul 4, 2015 at 8:28 AM, Simon Glass s...@chromium.org wrote:
To try to reduce the pain of confusion of binary blobs, add MD5 checksums
for the current versions. This may worsen the situation as new versions
appear, but it should still be possible to obtain these versions, and thus
get
On Sat, Jul 4, 2015 at 8:28 AM, Simon Glass s...@chromium.org wrote:
Commit afbbd413a fixed this for non-driver-model. Make sure that the driver
model code handles this also.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Drop the patch to board_f.c as it is not needed,
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