On Fri, Nov 6, 2015 at 8:04 PM, Michael Welling wrote:
> So I added the following lines to my board_phy_config function and the problem
> seems to be fixed:
> .
> .
> ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
> if (ctl & BMCR_PDOWN) {
>
On 6 November 2015 at 02:04, Bin Meng wrote:
> Move to driver model for ETH (e1000) on QEMU.
>
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v2:
> - Rebase on top of u-boot/master
> - New patch to convert to use driver model eth
>
>
On Fri, Nov 06, 2015 at 08:43:37PM -0200, Fabio Estevam wrote:
> On Fri, Nov 6, 2015 at 8:04 PM, Michael Welling wrote:
> > So I added the following lines to my board_phy_config function and the
> > problem
> > seems to be fixed:
It appears that I spoke to soon. Occassionally
On 5 November 2015 at 20:08, Thomas Chou wrote:
> Hi Simon,
>
>
> On 2015年11月06日 11:15, Simon Glass wrote:
>>
>> On 30 October 2015 at 01:35, Thomas Chou wrote:
>>>
>>> As mark_bootstage() uses timer, it should go after driver model
>>> is initialized.
On 6 November 2015 at 06:28, Bin Meng wrote:
> Hi Simon,
>
> On Fri, Nov 6, 2015 at 8:08 PM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 5 November 2015 at 06:02, Bin Meng wrote:
>>> Convert all x86 boards to use driver model tsc timer.
>>>
Hi,
On 6 November 2015 at 10:23, Nishanth Menon <n...@ti.com> wrote:
> On 11:10-20151106, Nishanth Menon wrote:
>> On 11/05/2015 10:50 PM, Masahiro Yamada wrote:
>> > 2015-11-06 12:30 GMT+09:00 Nishanth Menon <n...@ti.com>:
>> >> On Thu, Nov 5, 2015
On 6 November 2015 at 05:15, Daniel Schwierzeck
wrote:
> Building with gcc-5.2 raises this warning:
>
> drivers/misc/cros_ec_sandbox.c: In function cros_ec_sandbox_packet:
> drivers/misc/cros_ec_sandbox.c:483:5: warning: len may be used uninitialized
> in this
Hi Thomas,
On 5 November 2015 at 20:34, Thomas Chou wrote:
> Hi Simon,
>
> On 2015年11月06日 11:15, Simon Glass wrote:
>>>
>>> +config CFI_FLASH
>>> + bool "Enable Driver Model for CFI Flash driver"
>>> + depends on MTD
>>> + help
>>> + The Common
On 6 November 2015 at 02:04, Bin Meng wrote:
> CONFIG_SYS_EARLY_PCI_INIT is not needed any more since with driver
> model, PCI enumeration is automatically triggered.
>
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v2: None
>
>
On 6 November 2015 at 02:04, Bin Meng wrote:
> Move to driver model for USB on QEMU.
>
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v2: None
>
> configs/qemu-x86_defconfig | 2 ++
> 1 file changed, 2 insertions(+)
Acked-by: Simon Glass
On 6 November 2015 at 02:04, Bin Meng wrote:
> These are leftover when converted to use driver model pci.
>
> Signed-off-by: Bin Meng
> ---
>
> Changes in v2: None
>
> include/configs/crownbay.h | 12
> 1 file changed, 12 deletions(-)
On 6 November 2015 at 02:04, Bin Meng wrote:
> Move chipset-specific codes such as PAM init, PCIe ECAM and MP table
> from pci.c to qemu.c, to prepare for DM PCI conversion.
>
> Signed-off-by: Bin Meng
> ---
>
> Changes in v2: None
>
>
On 6 November 2015 at 02:04, Bin Meng wrote:
> Move to driver model for pci on QEMU.
>
> Signed-off-by: Bin Meng
> ---
>
> Changes in v2: None
>
> arch/x86/cpu/qemu/Makefile | 1 -
> arch/x86/cpu/qemu/pci.c| 49
>
On 6 November 2015 at 02:04, Bin Meng wrote:
> Now that we have converted all x86 boards to use driver model pci,
> remove these legacy pci codes.
>
> Signed-off-by: Bin Meng
> ---
>
> Changes in v2: None
>
> arch/x86/cpu/pci.c| 45
>
Hi Bin,
On 2015年11月06日 22:35, Bin Meng wrote:
Hi Thomas,
On Fri, Nov 6, 2015 at 3:14 PM, Thomas Chou wrote:
Hi Bin,
On 2015年11月05日 22:02, Bin Meng wrote:
There are timers with a 64-bit counter value but current timer
uclass driver assumes a 32-bit one. Introduce a
On 30 October 2015 at 00:35, Thomas Chou wrote:
> Add a sandbox timer which get time from host os and a basic
> test.
>
> Signed-off-by: Thomas Chou
> Reviewed-by: Simon Glass
> ---
> v2
> split board_f.c to another patch as
Hi Lin,
On 6 November 2015 at 01:53, Lin Huang wrote:
> add rk3036 sdram driver so we can set up sdram in SPL
>
> Signed-off-by: Lin Huang
> ---
> Changes in v1: None
> Changes in v2: None
> Changes in v3: fix some code style error
>
>
Hi Thomas,
On 6 November 2015 at 05:25, Thomas Chou wrote:
> Hi Simon,
>
> On 2015年11月06日 20:06, Simon Glass wrote:
>>>
>>> diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
>>> index e3d3fc7..0ab6128 100644
>>> --- a/include/linux/mtd/mtd.h
>>> +++
Hi,
On 6 November 2015 at 08:40, 蔡枫(Eddie) wrote:
>
>
> Eddie
> 2015年11月6日 下午8:08于 Simon Glass 写道:
>>
>> Hi Lin,
>>
>> On 6 November 2015 at 01:53, Lin Huang wrote:
>> > show how to packet rk3036 uboot image and boot from SD
>> >
Convert cfi flash to driver model.
Signed-off-by: Thomas Chou
---
v2
add dts binding.
add more help to Kconfig.
move struct platdata to top of file as Simon suggested.
v3
change to MTD uclass.
v4
fix fdt addr and size cells in cfi_flash_probe().
move probe
Use cfi flash driver model.
Signed-off-by: Thomas Chou
---
configs/nios2-generic_defconfig | 2 ++
include/configs/nios2-generic.h | 3 +--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/configs/nios2-generic_defconfig b/configs/nios2-generic_defconfig
Implement a Memory Technology Device (MTD) uclass. It should
include most flash drivers in the future. Though no uclass ops
are defined yet, the MTD ops could be used.
The NAND flash driver is based on MTD. The CFI flash and SPI
flash support MTD, too. It should make sense to convert them
to MTD
Hi Thomas,
On 6 November 2015 at 05:48, Thomas Chou wrote:
> Hi Jagan,
>
> On 2015年11月05日 22:57, Jagan Teki wrote:
>>
>> The altera quad spi core is very special that the hardware handle the
>>>
>>> spi-nor protocol. The core is designed to replace the CFI flash
>>>
Hi Marek,
On 5 November 2015 at 21:21, Marek Vasut wrote:
> On Thursday, November 05, 2015 at 03:57:01 PM, Jagan Teki wrote:
>> Hi Thomas,
>>
>> On 5 November 2015 at 20:15, Thomas Chou wrote:
>> > Hi Jagan,
>> >
>> > On 2015年11月05日 22:25, Jagan Teki wrote:
Since rk3036 device tree file still in reviewing, bring it from
https://patchwork.kernel.org/patch/7203371/ and add some aliases
we need in uboot
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2: None
Changes in v3: None
rk3036 mmc driver is similar to dw_mmc, but use external dma,
this patch implment fifo mode, need to do dma mode in future.
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- modify code suggest by Simon:
- use get_time() to do
Add a driver which support pin multiplexing setup for rk3036
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2: None
Changes in v3:
- fix some coding style error
drivers/pinctrl/Kconfig | 18 ++
Add a driver that provides access to system controllers
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- only build syscon_rk3036.c on NON-SPL stage
Changes in v3: None
arch/arm/mach-rockchip/rk3036/Makefile| 2 +-
We can reset the Soc using some CRU (clock/reset unit) register.
Add support for this.
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- only build reset_rk3036.c in NON-SPL stage
Changes in v3: None
rk3036 only 4K size SRAM for SPL, so only support
timer, uart, sdram driver in SPL stage, when finish
initial sdram, back to bootrom.And in rk3036 sdmmc and
debug uart use same iomux, so if you want to boot from
sdmmc, you must disable debug uart.
Signed-off-by: Lin Huang
This add some basic files required to allow the board to dispaly
serial message and can run command(mmc info etc)
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- get sdram info from evb_rk3036.c
Changes in v3:
- delete some config
add rk3036 sdram driver so we can set up sdram in SPL
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: fix some code style error
arch/arm/include/asm/arch-rockchip/sdram_rk3036.h | 336 ++
arch/arm/mach-rockchip/rk3036/Makefile
add early uart driver so we can print debug message in
SPL stage
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- pass uart base address to rk_uart_init() function
arch/arm/include/asm/arch-rockchip/uart.h | 44
From: Jeffy Chen
Our chips may have different sram size limits and chip tag, so
we need to add configs for that.
Signed-off-by: Jeffy Chen
---
include/configs/rk3288_common.h | 3 +++
tools/Makefile | 6 ++
show how to packet rk3036 uboot image and boot from SD
Signed-off-by: Lin Huang
---
doc/README.rockchip | 7 +++
1 file changed, 7 insertions(+)
diff --git a/doc/README.rockchip b/doc/README.rockchip
index 87ce9d2..893f256 100644
--- a/doc/README.rockchip
+++
From: Jeffy Chen
The Rockchip boot ROM could load & run an initial spl loader,
and continue to load a second level boot-loader(which stored
right after the initial loader) when it returns.
Modify idblock generation code to support it.
Signed-off-by: Jeffy Chen
Hi
On 06/11/15 17:11, Sjoerd Simons wrote:
On Wed, 2015-11-04 at 20:53 +0800, Lin Huang wrote:
rk3036 only 4K size SRAM for SPL, so only support
timer, uart, sdram driver in SPL stage, when finish
initial sdram, back to bootrom.
Signed-off-by: Lin Huang
diff --git
Move chipset-specific codes such as PAM init, PCIe ECAM and MP table
from pci.c to qemu.c, to prepare for DM PCI conversion.
Signed-off-by: Bin Meng
---
Changes in v2: None
arch/x86/cpu/qemu/pci.c| 72
arch/x86/cpu/qemu/qemu.c
Move to driver model for pci on QEMU.
Signed-off-by: Bin Meng
---
Changes in v2: None
arch/x86/cpu/qemu/Makefile | 1 -
arch/x86/cpu/qemu/pci.c| 49 --
configs/qemu-x86_defconfig | 1 +
include/configs/qemu-x86.h | 12
The call to pci_run_vga_bios() is not needed as this is handled
in the vesa_fb driver.
Signed-off-by: Bin Meng
---
Changes in v2: None
arch/x86/cpu/qemu/pci.c | 19 +--
1 file changed, 1 insertion(+), 18 deletions(-)
diff --git a/arch/x86/cpu/qemu/pci.c
Now that we have converted all x86 boards to use driver model pci,
remove these legacy pci codes.
Signed-off-by: Bin Meng
---
Changes in v2: None
arch/x86/cpu/pci.c| 45 ---
arch/x86/include/asm/pci.h| 21
Move to driver model for ETH (e1000) on QEMU.
Signed-off-by: Bin Meng
---
Changes in v2:
- Rebase on top of u-boot/master
- New patch to convert to use driver model eth
board/emulation/qemu-x86/Makefile | 2 +-
board/emulation/qemu-x86/qemu-x86.c | 13 -
Move to driver model for USB on QEMU.
Signed-off-by: Bin Meng
---
Changes in v2: None
configs/qemu-x86_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig
index 62ac76e..7d814d8 100644
---
These are leftover when converted to use driver model pci.
Signed-off-by: Bin Meng
---
Changes in v2: None
include/configs/crownbay.h | 12
1 file changed, 12 deletions(-)
diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
index
CONFIG_SYS_EARLY_PCI_INIT is not needed any more since with driver
model, PCI enumeration is automatically triggered.
Signed-off-by: Bin Meng
---
Changes in v2: None
include/configs/bayleybay.h | 1 -
include/configs/crownbay.h | 1 -
include/configs/galileo.h
> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, November 05, 2015 7:51 AM
> To: Gong Qianyu-B52263
> Cc: u-boot@lists.denx.de; Hu Mingkai-B21284; Sun York-R58495; Hou
> Zhiqiang-B48286; Xie Shaohui-B21989; Song Wenbin-B53747; Wood Scott-
> B07421; Kushwaha
Users migrating Freescale's PowerPC SoC U-Boot code to their custom
board, often overlook the need to execute set_liodns() and
setup_portals() being called by platform files.
So Move set_liodns() and setup_portals() to common u-boot boot
sequence
Signed-off-by: Prabhakar Kushwaha
On Wed, 2015-11-04 at 20:53 +0800, Lin Huang wrote:
> rk3036 only 4K size SRAM for SPL, so only support
> timer, uart, sdram driver in SPL stage, when finish
> initial sdram, back to bootrom.
>
> Signed-off-by: Lin Huang
>
>
> diff --git
On 11/06/15 02:39, Steve Kipisz wrote:
> From: Lokesh Vutla
>
> Several TI EVMs have EEPROM that can contain board description information
> such as revision, DDR definition, serial number, etc. In just about all
> cases, these EEPROM are on the I2C bus and provides us the
Hi Marek,
On jeu., nov. 05 2015, Marek Vasut wrote:
> On Thursday, November 05, 2015 at 08:58:30 PM, Gregory CLEMENT wrote:
>> Timing issue occurs on eMMC not only when modifying the frequency but
>> also for all the switch command(CMD6). According to the MMC spec waiting
>> 8
Hi Jagan,
On 2015年11月06日 16:07, Jagan Teki wrote:
I appreciate your hardware expertise and am not questioning about that
as well. I do agree with the hw logic about altera qspi controller and
I don't have any questions with hw either.
But my main intention here was about the software support
Add a driver which support pin multiplexing setup for rk3036
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2: None
Changes in v3:
- fix some coding style error
drivers/pinctrl/Kconfig | 18 ++
We can reset the Soc using some CRU (clock/reset unit) register.
Add support for this.
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- only build reset_rk3036.c in NON-SPL stage
Changes in v3: None
Add a driver that provides access to system controllers
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- only build syscon_rk3036.c on NON-SPL stage
Changes in v3: None
arch/arm/mach-rockchip/rk3036/Makefile| 2 +-
On 11/06/15 02:39, Steve Kipisz wrote:
> Current AM57xx evm supports both BeagleBoard-X15
> (http://beagleboard.org/x15) and AM57xx EVM
> (http://www.ti.com/tool/tmdxevm5728).
>
> The AM572x EValuation Module(EVM) provides an affordable platform to
> quickly start evaluation of Sitara. ARM
Hello Simon,
On 11/06/2015 04:15 AM, Simon Glass wrote:
Hi Przemyslaw,
On 29 October 2015 at 07:58, Przemyslaw Marczak wrote:
Hi Simon,
On 10/28/2015 07:50 PM, Simon Glass wrote:
On 27 October 2015 at 06:08, Przemyslaw Marczak
wrote:
This
since different rockchip soc need different spl file,
so rename board-spl.c.
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
arch/arm/mach-rockchip/Makefile | 2 +-
arch/arm/mach-rockchip/board-spl.c| 277
This series patch bring up rk3036 uboot, since rk3036 only 4K size
SRAM for SPL, so in SPL stage only support timer, uart, sdram driver,
and back to bootrom when finish ddr initial, and boot up second stage
from bootrom.
Jeffy Chen (2):
rockchip: Add max init size & chip tag configs
rockchip:
some rockchip soc will not include lib/timer.c in SPL stage,
so implement timer driver for some soc can use us delay function in SPL.
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2:
- add udelay function
Changes in v3:
- fix some coding style
since different rockchip SOC have different size of SRAM,
So the size SYS_MALLOC_F_LEN may different, so move this
config to rk3288 own Kconfig
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
arch/arm/mach-rockchip/Kconfig|
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2:
- modify code suggest by Simon
Changes in v3: None
drivers/serial/serial_rockchip.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/serial/serial_rockchip.c b/drivers/serial/serial_rockchip.c
index
some rockchips soc will not use uclass in SPL stage,
so define config to decide whether to build common.c
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
arch/arm/mach-rockchip/Makefile | 2 +-
include/configs/rk3288_common.h | 3
Add a driver for setting up and modifying the various PLLs, peripheral
clocks and mmc clocks on RK3036
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- move some macro to cru_rk3036.h
Changes in v3: None
GRF is the gereral register file. Add header files with register definitions.
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- move some macro to grf_rk3036.h
Changes in v3: None
arch/arm/include/asm/arch-rockchip/grf_rk3036.h |
Since rk3036 device tree file still in reviewing, bring it from
https://patchwork.kernel.org/patch/7203371/ and add some aliases
we need in uboot
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2: None
Changes in v3: None
Add SPL Kconfig for REGMAP and SYSCON, so REGMAP and SYSCON can
remove from SPL stage.
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- fix compile error
configs/chromebook_jerry_defconfig | 2 ++
configs/firefly-rk3288_defconfig |
add early uart driver so we can print debug message in
SPL stage
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- pass uart base address to rk_uart_init() function
arch/arm/include/asm/arch-rockchip/uart.h | 44
rk3036 mmc driver is similar to dw_mmc, but use external dma,
this patch implment fifo mode, need to do dma mode in future.
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- modify code suggest by Simon:
- use get_time() to do
Hi Thomas,
On 6 November 2015 at 14:58, Thomas Chou wrote:
> Hi Jagan,
>
> On 2015年11月06日 16:07, Jagan Teki wrote:
>>
>> I appreciate your hardware expertise and am not questioning about that
>> as well. I do agree with the hw logic about altera qspi controller and
>> I
Add a driver for setting up and modifying the various PLLs, peripheral
clocks and mmc clocks on RK3036
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- move some macro to cru_rk3036.h
Changes in v3: None
Add SPL Kconfig for REGMAP and SYSCON, so REGMAP and SYSCON can
remove from SPL stage.
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- fix compile error
configs/chromebook_jerry_defconfig | 2 ++
configs/firefly-rk3288_defconfig |
This series patch bring up rk3036 uboot, since rk3036 only 4K size
SRAM for SPL, so in SPL stage only support timer, uart, sdram driver,
and back to bootrom when finish ddr initial, and boot up second stage
from bootrom.
Jeffy Chen (2):
rockchip: Add max init size & chip tag configs
rockchip:
since different rockchip SOC have different size of SRAM,
So the size SYS_MALLOC_F_LEN may different, so move this
config to rk3288 own Kconfig
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
arch/arm/mach-rockchip/Kconfig|
some rockchips soc will not use uclass in SPL stage,
so define config to decide whether to build common.c
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
arch/arm/mach-rockchip/Makefile | 2 +-
include/configs/rk3288_common.h | 3
some rockchip soc will not include lib/timer.c in SPL stage,
so implement timer driver for some soc can use us delay function in SPL.
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2:
- add udelay function
Changes in v3:
- fix some coding style
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2:
- modify code suggest by Simon
Changes in v3: None
drivers/serial/serial_rockchip.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/serial/serial_rockchip.c b/drivers/serial/serial_rockchip.c
index
GRF is the gereral register file. Add header files with register definitions.
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- move some macro to grf_rk3036.h
Changes in v3: None
arch/arm/include/asm/arch-rockchip/grf_rk3036.h |
since different rockchip soc need different spl file,
so rename board-spl.c.
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
arch/arm/mach-rockchip/Makefile | 2 +-
arch/arm/mach-rockchip/board-spl.c| 277
On Thu, Nov 5, 2015 at 11:40 PM, Tom Rini wrote:
> OK, we're good. I'll queue up and push things for real in the morning.
Excellent! Thanks, Tom!
___
U-Boot mailing list
U-Boot@lists.denx.de
On Fri, 2015-11-06 at 02:24 +, Yuantian Tang wrote:
>
> > -Original Message-
> > From: York Sun [mailto:york...@freescale.com]
> > Sent: Friday, November 06, 2015 1:42 AM
> > To: Joakim Tjernlund ; Tang Yuantian-
> > B29983 ;
From: Mingkai Hu
The endian and base address of PEX LUT register region is different
between Chassis 2 and Chassis 3, so move the base address definition
to chassis specific header file and add pex_lut_* functions to access
LUT register.
Signed-off-by: Mingkai Hu
The global_data pointer (gd) has been set earlier in crt0_64.S.
So there's no need to assign it again. Remove gdata since it is going
away in U-Boot.
Signed-off-by: Gong Qianyu
---
V3:
- New Patch.
- Fix dead code.
arch/arm/cpu/armv8/fsl-layerscape/spl.c | 2 --
1
Signed-off-by: Gong Qianyu
---
V3:
- New Patch.
board/freescale/ls1043ardb/MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/freescale/ls1043ardb/MAINTAINERS
b/board/freescale/ls1043ardb/MAINTAINERS
index b8f6be2..efca5bf 100644
---
Hi all,
Here are the main changes for the version 3 patchset. Mainly deal with
the upstream comments for V2 and add some new patches. Please help to
review them. Thanks in advance.
- Fix LS1043ARDB MAINTAINERS.
- Update the dts files according to the upstreaming LS1043A linux kernel dts.
-
Hi Bin,
On 18 October 2015 at 20:31, Bin Meng wrote:
> Hi Simon,
>
> On Mon, Oct 19, 2015 at 10:24 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 18 October 2015 at 20:01, Bin Meng wrote:
>>> Hi Simon,
>>>
>>> On Mon, Oct 19, 2015 at 4:27
On 4 November 2015 at 05:50, Bin Meng wrote:
> Move chipset-specific codes such as PAM init, PCIe ECAM and MP table
> from pci.c to qemu.c, to prepare for DM PCI conversion.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/cpu/qemu/pci.c| 72
Hi Mugunthan,
On 4 November 2015 at 01:16, Mugunthan V N wrote:
> Add compatible for Macronix 64MiB spi flash mx66l51235l.
>
> Signed-off-by: Mugunthan V N
> ---
> drivers/mtd/spi/sf_probe.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
On 4 November 2015 at 02:52, Przemyslaw Marczak wrote:
> This should be squashed to commit:
>
> sandbox: add ADC driver
>
> This commit adds implementation of Sandbox ADC device emulation.
> The device provides:
> - single and multi-channel conversion
> - 4 channels with
On 4 November 2015 at 05:50, Bin Meng wrote:
> Move to driver model for USB on QEMU.
>
> Signed-off-by: Bin Meng
>
> ---
>
> configs/qemu-x86_defconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/configs/qemu-x86_defconfig
On 4 November 2015 at 05:50, Bin Meng wrote:
> Move to driver model for pci on QEMU.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/cpu/qemu/Makefile | 1 -
> arch/x86/cpu/qemu/pci.c| 49
> --
>
On 4 November 2015 at 05:50, Bin Meng wrote:
> The call to pci_run_vga_bios() is not needed as this is handled
> in the vesa_fb driver.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/cpu/qemu/pci.c | 19 +--
> 1 file changed, 1
On 5 November 2015 at 06:02, Bin Meng wrote:
> Now that we have converted all x86 boards to use driver model timer,
> remove these legacy timer codes in the tsc driver.
>
> Note this also removes the TSC_CALIBRATION_BYPASS Kconfig option,
> as it is not needed with driver
On 5 November 2015 at 06:02, Bin Meng wrote:
> To group all dm timer drivers together, move tsc timer to
> drivers/timer directory.
>
> Signed-off-by: Bin Meng
>
> ---
>
> arch/x86/lib/Makefile | 1 -
> drivers/timer/Kconfig
Hi,
On 6 November 2015 at 01:33, Lin Huang wrote:
> since different rockchip SOC have different size of SRAM,
> So the size SYS_MALLOC_F_LEN may different, so move this
> config to rk3288 own Kconfig
>
> Signed-off-by: Lin Huang
> ---
> Changes in v1:
Hi Lin,
On 6 November 2015 at 01:53, Lin Huang wrote:
> add rk3036 sdram driver so we can set up sdram in SPL
>
> Signed-off-by: Lin Huang
> ---
> Changes in v1: None
> Changes in v2: None
> Changes in v3: fix some code style error
>
>
On 6 November 2015 at 01:53, Lin Huang wrote:
> some rockchip soc will not include lib/timer.c in SPL stage,
> so implement timer driver for some soc can use us delay function in SPL.
>
> Signed-off-by: Lin Huang
> ---
> Changes in v1: None
> Changes in
On Thu, Nov 05, 2015 at 12:43:31PM -0200, Fabio Estevam wrote:
> The generic bitops headers are required when calling logarithmic
> functions, such as ilog2().
>
> Signed-off-by: Fabio Estevam
> Reviewed-by: Jagan Teki
Applied to u-boot/master,
On Thu, Nov 05, 2015 at 12:43:30PM -0200, Fabio Estevam wrote:
> The generic bitops headers are required when calling logarithmic
> functions, such as ilog2().
>
> Signed-off-by: Fabio Estevam
> Reviewed-by: Tom Rini
> Reviewed-by: Heiko
On Thu, Nov 05, 2015 at 12:43:32PM -0200, Fabio Estevam wrote:
> The generic bitops headers are required when calling logarithmic
> functions, such as ilog2().
>
> Signed-off-by: Fabio Estevam
> Reviewed-by: Jagan Teki
Applied to u-boot/master,
On Thu, Nov 05, 2015 at 12:43:33PM -0200, Fabio Estevam wrote:
> The generic bitops headers are required when calling logarithmic
> functions, such as ilog2().
>
> Signed-off-by: Fabio Estevam
> Reviewed-by: Jagan Teki
Applied to u-boot/master,
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