[U-Boot] [PATCH v1] armv8: fsl-layerscape: Fix "cpu release" command

[York Sun]

When one core is released, other cores may not have valid entry
address. Those cores are trapped by "wfe" and wait for further
instruction. When their address is set, they need to be kicked
off by "sev".

Signed-off-by: York Sun 

---

 arch/arm/cpu/armv8/fsl-layerscape/mp.c |6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/mp.c 
b/arch/arm/cpu/armv8/fsl-layerscape/mp.c
index 0d600db..df7ffb8 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/mp.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/mp.c
@@ -192,6 +192,12 @@ int cpu_release(int nr, int argc, char * const argv[])
   (unsigned long)table + SPIN_TABLE_ELEM_SIZE);
asm volatile("dsb st");
smp_kick_all_cpus();/* only those with entry addr set will run */
+   /*
+* When the first release command runs, all cores are set to go. Those
+* without a valid entry address will be trapped by "wfe". "sev" kicks
+* them off to check the address again. When set, they continue to run.
+*/
+   asm volatile("sev");
 
return 0;
 }
-- 
1.7.9.5

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[U-Boot] [PATCH 13/14] dm: pci: Convert 'pci' command to driver model

[Simon Glass]

Adjust this command to use the correct PCI functions, instead of the
compatibility layer.

Signed-off-by: Simon Glass 
---

 common/cmd_pci.c | 126 ---
 include/common.h |   1 -
 2 files changed, 121 insertions(+), 6 deletions(-)

diff --git a/common/cmd_pci.c b/common/cmd_pci.c
index 6303bed..4f71e57 100644
--- a/common/cmd_pci.c
+++ b/common/cmd_pci.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -40,6 +41,19 @@ static int pci_field_width(enum pci_size_t size)
}
 }
 
+#ifdef CONFIG_DM_PCI
+static void pci_show_regs(struct udevice *dev, struct pci_reg_info *regs)
+{
+   for (; regs->name; regs++) {
+   unsigned long val;
+
+   dm_pci_read_config(dev, regs->offset, , regs->size);
+   printf("  %s =%*s%#.*lx\n", regs->name,
+  (int)(28 - strlen(regs->name)), "",
+  pci_field_width(regs->size), val);
+   }
+}
+#else
 static unsigned long pci_read_config(pci_dev_t dev, int offset,
 enum pci_size_t size)
 {
@@ -70,6 +84,7 @@ static void pci_show_regs(pci_dev_t dev, struct pci_reg_info 
*regs)
   pci_read_config(dev, regs->offset, regs->size));
}
 }
+#endif
 
 static struct pci_reg_info regs_start[] = {
{ "vendor ID", PCI_SIZE_16, PCI_VENDOR_ID },
@@ -170,15 +185,25 @@ static struct pci_reg_info regs_cardbus[] = {
  * Return:  None
  *
  */
+#ifdef CONFIG_DM_PCI
+void pci_header_show(struct udevice *dev)
+#else
 void pci_header_show(pci_dev_t dev)
+#endif
 {
+#ifdef CONFIG_DM_PCI
+   unsigned long _byte, header_type;
+
+   dm_pci_read_config(dev, PCI_CLASS_CODE, &_byte, PCI_SIZE_8);
+   dm_pci_read_config(dev, PCI_HEADER_TYPE, _type, PCI_SIZE_8);
+#else
u8 _byte, header_type;
 
pci_read_config_byte(dev, PCI_CLASS_CODE, &_byte);
pci_read_config_byte(dev, PCI_HEADER_TYPE, _type);
+#endif
pci_show_regs(dev, regs_start);
-
-   printf("  class code =  0x%.2x (%s)\n", _byte,
+   printf("  class code =  0x%.2x (%s)\n", (int)_byte,
   pci_class_str(_byte));
pci_show_regs(dev, regs_rest);
 
@@ -209,6 +234,48 @@ void pciinfo_header(int busnum, bool short_listing)
}
 }
 
+#ifdef CONFIG_DM_PCI
+static void pci_header_show_brief(struct udevice *dev)
+{
+   ulong vendor, device;
+   ulong class, subclass;
+
+   dm_pci_read_config(dev, PCI_VENDOR_ID, , PCI_SIZE_16);
+   dm_pci_read_config(dev, PCI_DEVICE_ID, , PCI_SIZE_16);
+   dm_pci_read_config(dev, PCI_CLASS_CODE, , PCI_SIZE_8);
+   dm_pci_read_config(dev, PCI_CLASS_SUB_CODE, , PCI_SIZE_8);
+
+   printf("0x%.4lx 0x%.4lx %-23s 0x%.2lx\n",
+  vendor, device,
+  pci_class_str(class), subclass);
+}
+
+void pciinfo(struct udevice *bus, bool short_listing)
+{
+   struct udevice *dev;
+
+   pciinfo_header(bus->seq, short_listing);
+
+   for (device_find_first_child(bus, );
+dev;
+device_find_next_child()) {
+   struct pci_child_platdata *pplat;
+
+   pplat = dev_get_parent_platdata(dev);
+   if (short_listing) {
+   printf("%02x.%02x.%02x   ", bus->seq,
+  PCI_DEV(pplat->devfn), PCI_FUNC(pplat->devfn));
+   pci_header_show_brief(dev);
+   } else {
+   printf("\nFound PCI device %02x.%02x.%02x:\n", bus->seq,
+  PCI_DEV(pplat->devfn), PCI_FUNC(pplat->devfn));
+   pci_header_show(dev);
+   }
+   }
+}
+
+#else
+
 /*
  * Subroutine:  pci_header_show_brief
  *
@@ -307,7 +374,7 @@ void pciinfo(int bus_num, int short_pci_listing)
 error:
printf("Cannot read bus configuration: %d\n", ret);
 }
-
+#endif
 
 /* Convert the "bus.device.function" identifier into a number.
  */
@@ -335,8 +402,13 @@ static pci_dev_t get_pci_dev(char* name)
return PCI_BDF(bdfs[0], bdfs[1], bdfs[2]);
 }
 
+#ifdef CONFIG_DM_PCI
+static int pci_cfg_display(struct udevice *dev, ulong addr,
+  enum pci_size_t size, ulong length)
+#else
 static int pci_cfg_display(pci_dev_t bdf, ulong addr, enum pci_size_t size,
   ulong length)
+#endif
 {
 #define DISP_LINE_LEN  16
ulong i, nbytes, linebytes;
@@ -355,7 +427,11 @@ static int pci_cfg_display(pci_dev_t bdf, ulong addr, enum 
pci_size_t size,
for (i=0; i

[U-Boot] [PATCH 07/14] dm: pci: Move common auto-config functions to a common file

[Simon Glass]

Some functions will be used by driver model and legacy PCI code. To avoid
duplication, put these in a separate, shared file.

Signed-off-by: Simon Glass 
---

 drivers/pci/Makefile  |   2 +-
 drivers/pci/pci_auto_common.c | 128 ++
 drivers/pci/pci_auto_old.c| 122 
 3 files changed, 129 insertions(+), 123 deletions(-)
 create mode 100644 drivers/pci/pci_auto_common.c

diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index dee844f..1f8f86f 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -13,7 +13,7 @@ obj-$(CONFIG_X86) += pci_x86.o
 else
 obj-$(CONFIG_PCI) += pci.o
 endif
-obj-$(CONFIG_PCI) += pci_common.o pci_auto_old.o pci_rom.o
+obj-$(CONFIG_PCI) +=  pci_auto_common.o pci_auto_old.o pci_common.o pci_rom.o
 
 obj-$(CONFIG_FSL_PCI_INIT) += fsl_pci_init.o
 obj-$(CONFIG_PCI_INDIRECT_BRIDGE) += pci_indirect.o
diff --git a/drivers/pci/pci_auto_common.c b/drivers/pci/pci_auto_common.c
new file mode 100644
index 000..faf904e
--- /dev/null
+++ b/drivers/pci/pci_auto_common.c
@@ -0,0 +1,128 @@
+/*
+ * PCI autoconfiguration library
+ *
+ * Author: Matt Porter 
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ *
+ * Modifications for driver model:
+ * Copyright 2015 Google, Inc
+ * Written by Simon Glass 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+void pciauto_region_init(struct pci_region *res)
+{
+   /*
+* Avoid allocating PCI resources from address 0 -- this is illegal
+* according to PCI 2.1 and moreover, this is known to cause Linux IDE
+* drivers to fail. Use a reasonable starting value of 0x1000 instead.
+*/
+   res->bus_lower = res->bus_start ? res->bus_start : 0x1000;
+}
+
+void pciauto_region_align(struct pci_region *res, pci_size_t size)
+{
+   res->bus_lower = ((res->bus_lower - 1) | (size - 1)) + 1;
+}
+
+int pciauto_region_allocate(struct pci_region *res, pci_size_t size,
+   pci_addr_t *bar)
+{
+   pci_addr_t addr;
+
+   if (!res) {
+   debug("No resource");
+   goto error;
+   }
+
+   addr = ((res->bus_lower - 1) | (size - 1)) + 1;
+
+   if (addr - res->bus_start + size > res->size) {
+   debug("No room in resource");
+   goto error;
+   }
+
+   res->bus_lower = addr + size;
+
+   debug("address=0x%llx bus_lower=0x%llx", (unsigned long long)addr,
+ (unsigned long long)res->bus_lower);
+
+   *bar = addr;
+   return 0;
+
+ error:
+   *bar = (pci_addr_t)-1;
+   return -1;
+}
+
+void pciauto_config_init(struct pci_controller *hose)
+{
+   int i;
+
+   hose->pci_io = NULL;
+   hose->pci_mem = NULL;
+   hose->pci_prefetch = NULL;
+
+   for (i = 0; i < hose->region_count; i++) {
+   switch (hose->regions[i].flags) {
+   case PCI_REGION_IO:
+   if (!hose->pci_io ||
+   hose->pci_io->size < hose->regions[i].size)
+   hose->pci_io = hose->regions + i;
+   break;
+   case PCI_REGION_MEM:
+   if (!hose->pci_mem ||
+   hose->pci_mem->size < hose->regions[i].size)
+   hose->pci_mem = hose->regions + i;
+   break;
+   case (PCI_REGION_MEM | PCI_REGION_PREFETCH):
+   if (!hose->pci_prefetch ||
+   hose->pci_prefetch->size < hose->regions[i].size)
+   hose->pci_prefetch = hose->regions + i;
+   break;
+   }
+   }
+
+
+   if (hose->pci_mem) {
+   pciauto_region_init(hose->pci_mem);
+
+   debug("PCI Autoconfig: Bus Memory region: [0x%llx-0x%llx],\n"
+  "\t\tPhysical Memory [%llx-%llxx]\n",
+   (u64)hose->pci_mem->bus_start,
+   (u64)(hose->pci_mem->bus_start + hose->pci_mem->size - 1),
+   (u64)hose->pci_mem->phys_start,
+   (u64)(hose->pci_mem->phys_start + hose->pci_mem->size - 1));
+   }
+
+   if (hose->pci_prefetch) {
+   pciauto_region_init(hose->pci_prefetch);
+
+   debug("PCI Autoconfig: Bus Prefetchable Mem: [0x%llx-0x%llx],\n"
+  "\t\tPhysical Memory [%llx-%llx]\n",
+   (u64)hose->pci_prefetch->bus_start,
+   (u64)(hose->pci_prefetch->bus_start +
+   hose->pci_prefetch->size - 1),
+   (u64)hose->pci_prefetch->phys_start,
+   (u64)(hose->pci_prefetch->phys_start +
+   hose->pci_prefetch->size - 1));
+   }
+
+   if (hose->pci_io) {
+   pciauto_region_init(hose->pci_io);
+
+  

[U-Boot] [PATCH 12/14] pci: Move PCI header output code into its own function

[Simon Glass]

We want to share this code with the driver model version, so put it in a
separate function.

Signed-off-by: Simon Glass 
---

 common/cmd_pci.c | 17 +++--
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/common/cmd_pci.c b/common/cmd_pci.c
index 3d09beb..6303bed 100644
--- a/common/cmd_pci.c
+++ b/common/cmd_pci.c
@@ -199,6 +199,16 @@ void pci_header_show(pci_dev_t dev)
 }
 }
 
+void pciinfo_header(int busnum, bool short_listing)
+{
+   printf("Scanning PCI devices on bus %d\n", busnum);
+
+   if (short_listing) {
+   printf("BusDevFun  VendorId   DeviceId   Device Class   
Sub-Class\n");
+   
printf("_\n");
+   }
+}
+
 /*
  * Subroutine:  pci_header_show_brief
  *
@@ -250,12 +260,7 @@ void pciinfo(int bus_num, int short_pci_listing)
if (!hose)
return;
 
-   printf("Scanning PCI devices on bus %d\n", bus_num);
-
-   if (short_pci_listing) {
-   printf("BusDevFun  VendorId   DeviceId   Device Class   
Sub-Class\n");
-   
printf("_\n");
-   }
+   pciinfo_header(bus_num, short_pci_listing);
 
for (Device = 0; Device < PCI_MAX_PCI_DEVICES; Device++) {
HeaderType = 0;
-- 
2.6.0.rc2.230.g3dd15c0

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[U-Boot] [PATCH 08/14] dm: pci: Reorder functions in cmd_pci.c

[Simon Glass]

Before converting this to driver model, reorder the code to avoid forward
function declarations.

Signed-off-by: Simon Glass 
---

 common/cmd_pci.c | 216 +++
 1 file changed, 106 insertions(+), 110 deletions(-)

diff --git a/common/cmd_pci.c b/common/cmd_pci.c
index debcd1c..53b0f42 100644
--- a/common/cmd_pci.c
+++ b/common/cmd_pci.c
@@ -21,115 +21,6 @@
 #include 
 #include 
 
-/*
- * Follows routines for the output of infos about devices on PCI bus.
- */
-
-void pci_header_show(pci_dev_t dev);
-void pci_header_show_brief(pci_dev_t dev);
-
-/*
- * Subroutine:  pciinfo
- *
- * Description: Show information about devices on PCI bus.
- * Depending on the define 
CONFIG_SYS_SHORT_PCI_LISTING
- * the output will be more or less exhaustive.
- *
- * Inputs: bus_no  the number of the bus to be scanned.
- *
- * Return:  None
- *
- */
-void pciinfo(int BusNum, int ShortPCIListing)
-{
-   struct pci_controller *hose = pci_bus_to_hose(BusNum);
-   int Device;
-   int Function;
-   unsigned char HeaderType;
-   unsigned short VendorID;
-   pci_dev_t dev;
-   int ret;
-
-   if (!hose)
-   return;
-
-   printf("Scanning PCI devices on bus %d\n", BusNum);
-
-   if (ShortPCIListing) {
-   printf("BusDevFun  VendorId   DeviceId   Device Class   
Sub-Class\n");
-   
printf("_\n");
-   }
-
-   for (Device = 0; Device < PCI_MAX_PCI_DEVICES; Device++) {
-   HeaderType = 0;
-   VendorID = 0;
-   for (Function = 0; Function < PCI_MAX_PCI_FUNCTIONS; 
Function++) {
-   /*
-* If this is not a multi-function device, we skip the 
rest.
-*/
-   if (Function && !(HeaderType & 0x80))
-   break;
-
-   dev = PCI_BDF(BusNum, Device, Function);
-
-   if (pci_skip_dev(hose, dev))
-   continue;
-
-   ret = pci_read_config_word(dev, PCI_VENDOR_ID,
-  );
-   if (ret)
-   goto error;
-   if ((VendorID == 0x) || (VendorID == 0x))
-   continue;
-
-   if (!Function) pci_read_config_byte(dev, 
PCI_HEADER_TYPE, );
-
-   if (ShortPCIListing)
-   {
-   printf("%02x.%02x.%02x   ", BusNum, Device, 
Function);
-   pci_header_show_brief(dev);
-   }
-   else
-   {
-   printf("\nFound PCI device %02x.%02x.%02x:\n",
-  BusNum, Device, Function);
-   pci_header_show(dev);
-   }
-   }
-   }
-
-   return;
-error:
-   printf("Cannot read bus configuration: %d\n", ret);
-}
-
-
-/*
- * Subroutine:  pci_header_show_brief
- *
- * Description: Reads and prints the header of the
- * specified PCI device in short form.
- *
- * Inputs: dev  Bus+Device+Function number
- *
- * Return:  None
- *
- */
-void pci_header_show_brief(pci_dev_t dev)
-{
-   u16 vendor, device;
-   u8 class, subclass;
-
-   pci_read_config_word(dev, PCI_VENDOR_ID, );
-   pci_read_config_word(dev, PCI_DEVICE_ID, );
-   pci_read_config_byte(dev, PCI_CLASS_CODE, );
-   pci_read_config_byte(dev, PCI_CLASS_SUB_CODE, );
-
-   printf("0x%.4x 0x%.4x %-23s 0x%.2x\n",
-  vendor, device,
-  pci_class_str(class), subclass);
-}
-
 struct pci_reg_info {
const char *name;
enum pci_size_t size;
@@ -283,10 +174,10 @@ void pci_header_show(pci_dev_t dev)
 {
u8 _byte, header_type;
 
+   pci_read_config_byte(dev, PCI_CLASS_CODE, &_byte);
pci_read_config_byte(dev, PCI_HEADER_TYPE, _type);
pci_show_regs(dev, regs_start);
 
-   pci_read_config_byte(dev, PCI_CLASS_CODE, &_byte);
printf("  class code =  0x%.2x (%s)\n", _byte,
   pci_class_str(_byte));
pci_show_regs(dev, regs_rest);
@@ -308,6 +199,111 @@ void pci_header_show(pci_dev_t dev)
 }
 }
 
+/*
+ * Subroutine:  pci_header_show_brief
+ *
+ * Description: Reads and prints the header of the
+ * specified PCI device in short form.
+ *
+ * Inputs: dev  Bus+Device+Function number
+ *
+ * Return:  None
+ *
+ */
+void pci_header_show_brief(pci_dev_t dev)
+{
+   u16 vendor, device;
+   u8 class, subclass;
+
+   pci_read_config_word(dev, PCI_VENDOR_ID, );
+   pci_read_config_word(dev, 

[U-Boot] [PATCH 11/14] pci: Use a separate 'dev' variable for the PCI device

[Simon Glass]

In the 'pci' command, add a separate variable to hold the PCI device. When
this code is converted to driver model, this variable will be used to hold a
struct udevice instead.

Signed-off-by: Simon Glass 
---

 common/cmd_pci.c | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/common/cmd_pci.c b/common/cmd_pci.c
index 747d6b9..3d09beb 100644
--- a/common/cmd_pci.c
+++ b/common/cmd_pci.c
@@ -442,6 +442,7 @@ static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
 {
ulong addr = 0, value = 0, cmd_size = 0;
enum pci_size_t size;
+   pci_dev_t dev;
int busnum = 0;
pci_dev_t bdf = 0;
char cmd = 's';
@@ -482,16 +483,18 @@ static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
if (argc > 1)
busnum = simple_strtoul(argv[1], NULL, 16);
}
-   cmd = 's';
+   pciinfo(busnum, value);
break;
}
 
+   dev = bdf;
+
switch (cmd) {
case 'h':   /* header */
-   pci_header_show(bdf);
+   pci_header_show(dev);
break;
case 'd':   /* display */
-   return pci_cfg_display(bdf, addr, size, value);
+   return pci_cfg_display(dev, addr, size, value);
 #ifdef CONFIG_CMD_PCI_ENUM
case 'e':
 # ifdef CONFIG_DM_PCI
@@ -504,20 +507,17 @@ static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
case 'n':   /* next */
if (argc < 4)
goto usage;
-   ret = pci_cfg_modify(bdf, addr, size, value, 0);
+   ret = pci_cfg_modify(dev, addr, size, value, 0);
break;
case 'm':   /* modify */
if (argc < 4)
goto usage;
-   ret = pci_cfg_modify(bdf, addr, size, value, 1);
-   break;
-   case 's':
-   pciinfo(busnum, value);
+   ret = pci_cfg_modify(dev, addr, size, value, 1);
break;
case 'w':   /* write */
if (argc < 5)
goto usage;
-   ret = pci_cfg_write(bdf, addr, size, value);
+   ret = pci_cfg_write(dev, addr, size, value);
break;
default:
ret = CMD_RET_USAGE;
-- 
2.6.0.rc2.230.g3dd15c0

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[U-Boot] [PATCH 14/14] dm: pci: Disable PCI compatibility functions by default

[Simon Glass]

We eventually need to drop the compatibility functions for driver model. As
a first step, create a configuration option to enable them and hide them
when the option is disabled.

Signed-off-by: Simon Glass 
---

 arch/arm/mach-tegra/Kconfig |  2 ++
 arch/x86/Kconfig|  3 +++
 configs/sandbox_defconfig   | 10 +-
 drivers/pci/Kconfig |  9 +
 drivers/pci/Makefile|  3 ++-
 include/pci.h   | 21 +
 6 files changed, 38 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index e5215ab..3906fc1 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -13,6 +13,7 @@ config TEGRA_ARMV7_COMMON
select DM_SPI
select DM_GPIO
select DM_PCI
+   select DM_PCI_COMPAT
 
 choice
prompt "Tegra SoC select"
@@ -45,6 +46,7 @@ config TEGRA210
select DM_SPI
select DM_GPIO
select DM_PCI
+   select DM_PCI_COMPAT
 
 endchoice
 
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index f92082d..e972973 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -93,6 +93,9 @@ config SYS_X86_START16
depends on X86_RESET_VECTOR
default 0xf800
 
+config DM_PCI_COMPAT
+   default y   # Until we finish moving over to the new API
+
 config BOARD_ROMSIZE_KB_512
bool
 config BOARD_ROMSIZE_KB_1024
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 94c8e68..92725d8 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_SIGNATURE=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_REMOTEPROC=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_SOUND=y
 CONFIG_BOOTSTAGE=y
@@ -19,6 +20,8 @@ CONFIG_OF_HOSTFILE=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_DEVRES=y
+CONFIG_ADC=y
+CONFIG_ADC_SANDBOX=y
 CONFIG_CLK=y
 CONFIG_SANDBOX_GPIO=y
 CONFIG_SYS_I2C_SANDBOX=y
@@ -34,6 +37,7 @@ CONFIG_SPI_FLASH_SANDBOX=y
 CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCI_SANDBOX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
@@ -43,12 +47,12 @@ CONFIG_DM_PMIC_SANDBOX=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_SANDBOX=y
 CONFIG_RAM=y
+CONFIG_REMOTEPROC_SANDBOX=y
 CONFIG_DM_RTC=y
 CONFIG_SANDBOX_SERIAL=y
 CONFIG_SOUND=y
 CONFIG_SOUND_SANDBOX=y
 CONFIG_SANDBOX_SPI=y
-CONFIG_DM_TPM=y
 CONFIG_TPM_TIS_SANDBOX=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
@@ -63,7 +67,3 @@ CONFIG_UNIT_TEST=y
 CONFIG_UT_TIME=y
 CONFIG_UT_DM=y
 CONFIG_UT_ENV=y
-CONFIG_REMOTEPROC_SANDBOX=y
-CONFIG_CMD_REMOTEPROC=y
-CONFIG_ADC=y
-CONFIG_ADC_SANDBOX=y
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index c219c19..26aa2b0 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -9,6 +9,15 @@ config DM_PCI
  available PCI devices, allows scanning of PCI buses and provides
  device configuration support.
 
+config DM_PCI_COMPAT
+   bool "Enable compatible functions for PCI"
+   depends on DM_PCI
+   help
+ Enable compatibility functions for PCI so that old code can be used
+ with CONFIG_DM_PCI enabled. This should be used as an interim
+ measure when porting a board to use driver model for PCI. Once the
+ board is fully supported, this option should be disabled.
+
 config PCI_SANDBOX
bool "Sandbox PCI support"
depends on SANDBOX && DM_PCI
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 1f8f86f..6b761b4 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -6,7 +6,8 @@
 #
 
 ifneq ($(CONFIG_DM_PCI),)
-obj-$(CONFIG_PCI) += pci-uclass.o pci_compat.o
+obj-$(CONFIG_PCI) += pci-uclass.o
+obj-$(CONFIG_DM_PCI_COMPAT) += pci_compat.o
 obj-$(CONFIG_PCI_SANDBOX) += pci_sandbox.o
 obj-$(CONFIG_SANDBOX) += pci-emul-uclass.o
 obj-$(CONFIG_X86) += pci_x86.o
diff --git a/include/pci.h b/include/pci.h
index c4f6577..fc7d494 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -656,6 +656,7 @@ extern pci_addr_t pci_hose_phys_to_bus(struct 
pci_controller* hose,
pci_bus_to_virt((dev), (addr), PCI_REGION_IO, (len), (map_flags))
 
 /* For driver model these are defined in macros in pci_compat.c */
+#if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT)
 extern int pci_hose_read_config_byte(struct pci_controller *hose,
 pci_dev_t dev, int where, u8 *val);
 extern int pci_hose_read_config_word(struct pci_controller *hose,
@@ -668,6 +669,7 @@ extern int pci_hose_write_config_word(struct pci_controller 
*hose,
  pci_dev_t dev, int where, u16 val);
 extern int pci_hose_write_config_dword(struct pci_controller *hose,
   pci_dev_t dev, int where, u32 val);
+#endif
 
 #ifndef CONFIG_DM_PCI
 extern int pci_read_config_byte(pci_dev_t dev, int where, u8 *val);
@@ -678,6 +680,13 @@ extern int 

Re: [U-Boot] mmc erase fails from U-Boot command line

[Fabio Estevam]

Hi Hector and Cliff,

On Mon, Oct 19, 2015 at 9:06 AM, Hector Palacios
 wrote:

> This issue is reproducible on Freescale's SABRESD on both SD card and eMMC 
> with
> v2015.04. The issue has been there always, I believe.
> Apparently the command erases the first block, but the operation returns an 
> error, so
> it aborts and it doesn't continue erasing futher blocks.
>
> I opened a similar thread a while ago:
> http://lists.denx.de/pipermail/u-boot/2015-June/215912.html


I am running mainline U-boot on a mx6qsabresd and it works fine here:

=> mmc dev 2
switch to partitions #0, OK
mmc2(part 0) is current device
=> mmc erase 4000 1000

MMC erase: dev # 2, block # 16384, count 4096 ... 4096 blocks erased: OK
=>

Regards,

Fabio Estevam
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Re: [U-Boot] [U-Boot, v2] vexpress64: use 2nd DRAM bank only on juno

[Tom Rini]

On Mon, Oct 26, 2015 at 11:00:22AM +, Ryan Harkin wrote:

> This patch makes the 2nd DRAM bank available on Juno only and not on
> other vexpress64 targets, eg. the FVP models.
> 
> The commit below added a 2nd bank of NOR flash for Juno, but also for
> all vexpress64 targets:
> 
> commit 2d0cee1ca2b9d977fa3214896bb2e30cfec77059
> Author: Liviu Dudau 
> Date:   Mon Oct 19 11:08:31 2015 +0100
> 
> vexpress64: Juno: Declare all 8GB of RAM and make them visible to the 
> kernel.
> 
> Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel.
> Declare a secondary memory bank and set the sizes correctly.
> 
> Signed-off-by: Liviu Dudau 
> Reviewed-by: Linus Walleij 
> Reviewed-by: Ryan Harkin 
> Tested-by: Ryan Harkin 
> 
> Unfortunately, I only fully tested on Juno R0, R1 and the FVP Foundation
> model.  Whilst FVP Base AEMV8 models run U-Boot OK, they fail to boot
> the kernel.
> 
> Signed-off-by: Ryan Harkin 
> Acked-by: Liviu Dudau 
> Reviewed-by: Linus Walleij 

This breaks building of vexpress_aemv8a_semi :(

-- 
Tom


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[U-Boot] [PATCH] arc: add empty asm/processor.h to satisfy compilation of USB code

[Alexey Brodkin]

common/usb.c unconditionally includes 
And now to allow USB support on ARC boards we have to have that header.

Signed-off-by: Alexey Brodkin 
---
 arch/arc/include/asm/processor.h | 12 
 1 file changed, 12 insertions(+)
 create mode 100644 arch/arc/include/asm/processor.h

diff --git a/arch/arc/include/asm/processor.h b/arch/arc/include/asm/processor.h
new file mode 100644
index 000..6355423
--- /dev/null
+++ b/arch/arc/include/asm/processor.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright (C) 2015 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _ASM_ARC_PROCESSOR_H
+#define _ASM_ARC_PROCESSOR_H
+
+/* This file is required by some generic code like USB etc */
+
+#endif /* _ASM_ARC_PROCESSOR_H */
-- 
2.4.3

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[U-Boot] [PATCH 04/14] pci: Refactor the pciinfo() function

[Simon Glass]

This function uses macros to output data. It seems better to use a table of
registers rather than macro-based code generation. It also reduces the
code/data size by 2KB on ARM.

Signed-off-by: Simon Glass 
---

 common/cmd_pci.c | 235 ++-
 1 file changed, 147 insertions(+), 88 deletions(-)

diff --git a/common/cmd_pci.c b/common/cmd_pci.c
index 6e28b70..debcd1c 100644
--- a/common/cmd_pci.c
+++ b/common/cmd_pci.c
@@ -130,6 +130,145 @@ void pci_header_show_brief(pci_dev_t dev)
   pci_class_str(class), subclass);
 }
 
+struct pci_reg_info {
+   const char *name;
+   enum pci_size_t size;
+   u8 offset;
+};
+
+static int pci_field_width(enum pci_size_t size)
+{
+   switch (size) {
+   case PCI_SIZE_8:
+   return 2;
+   case PCI_SIZE_16:
+   return 4;
+   case PCI_SIZE_32:
+   default:
+   return 32;
+   }
+}
+
+static unsigned long pci_read_config(pci_dev_t dev, int offset,
+enum pci_size_t size)
+{
+   u32 val32;
+   u16 val16;
+   u8 val8;
+
+   switch (size) {
+   case PCI_SIZE_8:
+   pci_read_config_byte(dev, offset, );
+   return val8;
+   case PCI_SIZE_16:
+   pci_read_config_word(dev, offset, );
+   return val16;
+   case PCI_SIZE_32:
+   default:
+   pci_read_config_dword(dev, offset, );
+   return val32;
+   }
+}
+
+static void pci_show_regs(pci_dev_t dev, struct pci_reg_info *regs)
+{
+   for (; regs->name; regs++) {
+   printf("  %s =%*s%#.*lx\n", regs->name,
+  (int)(28 - strlen(regs->name)), "",
+  pci_field_width(regs->size),
+  pci_read_config(dev, regs->offset, regs->size));
+   }
+}
+
+static struct pci_reg_info regs_start[] = {
+   { "vendor ID", PCI_SIZE_16, PCI_VENDOR_ID },
+   { "device ID", PCI_SIZE_16, PCI_DEVICE_ID },
+   { "command register ID", PCI_SIZE_16, PCI_COMMAND },
+   { "status register", PCI_SIZE_16, PCI_STATUS },
+   { "revision ID", PCI_SIZE_8, PCI_REVISION_ID },
+   {},
+};
+
+static struct pci_reg_info regs_rest[] = {
+   { "sub class code", PCI_SIZE_8, PCI_CLASS_SUB_CODE },
+   { "programming interface", PCI_SIZE_8, PCI_CLASS_PROG },
+   { "cache line", PCI_SIZE_8, PCI_CACHE_LINE_SIZE },
+   { "latency time", PCI_SIZE_8, PCI_LATENCY_TIMER },
+   { "header type", PCI_SIZE_8, PCI_HEADER_TYPE },
+   { "BIST", PCI_SIZE_8, PCI_BIST },
+   { "base address 0", PCI_SIZE_32, PCI_BASE_ADDRESS_0 },
+   {},
+};
+
+static struct pci_reg_info regs_normal[] = {
+   { "base address 1", PCI_SIZE_32, PCI_BASE_ADDRESS_1 },
+   { "base address 2", PCI_SIZE_32, PCI_BASE_ADDRESS_2 },
+   { "base address 3", PCI_SIZE_32, PCI_BASE_ADDRESS_3 },
+   { "base address 4", PCI_SIZE_32, PCI_BASE_ADDRESS_4 },
+   { "base address 5", PCI_SIZE_32, PCI_BASE_ADDRESS_5 },
+   { "cardBus CIS pointer", PCI_SIZE_32, PCI_CARDBUS_CIS },
+   { "sub system vendor ID", PCI_SIZE_16, PCI_SUBSYSTEM_VENDOR_ID },
+   { "sub system ID", PCI_SIZE_16, PCI_SUBSYSTEM_ID },
+   { "expansion ROM base address", PCI_SIZE_32, PCI_ROM_ADDRESS },
+   { "interrupt line", PCI_SIZE_8, PCI_INTERRUPT_LINE },
+   { "interrupt pin", PCI_SIZE_8, PCI_INTERRUPT_PIN },
+   { "min Grant", PCI_SIZE_8, PCI_MIN_GNT },
+   { "max Latency", PCI_SIZE_8, PCI_MAX_LAT },
+   {},
+};
+
+static struct pci_reg_info regs_bridge[] = {
+   { "base address 1", PCI_SIZE_32, PCI_BASE_ADDRESS_1 },
+   { "primary bus number", PCI_SIZE_8, PCI_PRIMARY_BUS },
+   { "secondary bus number", PCI_SIZE_8, PCI_SECONDARY_BUS },
+   { "subordinate bus number", PCI_SIZE_8, PCI_SUBORDINATE_BUS },
+   { "secondary latency timer", PCI_SIZE_8, PCI_SEC_LATENCY_TIMER },
+   { "IO base", PCI_SIZE_8, PCI_IO_BASE },
+   { "IO limit", PCI_SIZE_8, PCI_IO_LIMIT },
+   { "secondary status", PCI_SIZE_16, PCI_SEC_STATUS },
+   { "memory base", PCI_SIZE_16, PCI_MEMORY_BASE },
+   { "memory limit", PCI_SIZE_16, PCI_MEMORY_LIMIT },
+   { "prefetch memory base", PCI_SIZE_16, PCI_PREF_MEMORY_BASE },
+   { "prefetch memory limit", PCI_SIZE_16, PCI_PREF_MEMORY_LIMIT },
+   { "prefetch memory base upper", PCI_SIZE_32, PCI_PREF_BASE_UPPER32 },
+   { "prefetch memory limit upper", PCI_SIZE_32, PCI_PREF_LIMIT_UPPER32 },
+   { "IO base upper 16 bits", PCI_SIZE_16, PCI_IO_BASE_UPPER16 },
+   { "IO limit upper 16 bits", PCI_SIZE_16, PCI_IO_LIMIT_UPPER16 },
+   { "expansion ROM base address", PCI_SIZE_32, PCI_ROM_ADDRESS1 },
+   { "interrupt line", PCI_SIZE_8, PCI_INTERRUPT_LINE },
+   { "interrupt pin", PCI_SIZE_8, PCI_INTERRUPT_PIN },
+   { "bridge control", PCI_SIZE_16, PCI_BRIDGE_CONTROL },
+   {},
+};
+
+static struct pci_reg_info 

[U-Boot] [PATCH 06/14] dm: pci: Rename pci_auto.c to pci_auto_old.c

[Simon Glass]

This file should not be used with driver model as it has lots of legacy/
compatibility functions. Rename it to make this clear.

Signed-off-by: Simon Glass 
---

 drivers/pci/Makefile   | 2 +-
 drivers/pci/{pci_auto.c => pci_auto_old.c} | 0
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename drivers/pci/{pci_auto.c => pci_auto_old.c} (100%)

diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index bcf8127..dee844f 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -13,7 +13,7 @@ obj-$(CONFIG_X86) += pci_x86.o
 else
 obj-$(CONFIG_PCI) += pci.o
 endif
-obj-$(CONFIG_PCI) += pci_common.o pci_auto.o pci_rom.o
+obj-$(CONFIG_PCI) += pci_common.o pci_auto_old.o pci_rom.o
 
 obj-$(CONFIG_FSL_PCI_INIT) += fsl_pci_init.o
 obj-$(CONFIG_PCI_INDIRECT_BRIDGE) += pci_indirect.o
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto_old.c
similarity index 100%
rename from drivers/pci/pci_auto.c
rename to drivers/pci/pci_auto_old.c
-- 
2.6.0.rc2.230.g3dd15c0

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[U-Boot] [PATCH 09/14] pci: Use common functions to read/write config

[Simon Glass]

Currently we using switch() and access PCI configuration via several
functions, one for each data size. Adjust the code to use generic functions,
where the data size is a parameter.

Signed-off-by: Simon Glass 
---

 common/cmd_pci.c | 49 +++--
 1 file changed, 15 insertions(+), 34 deletions(-)

diff --git a/common/cmd_pci.c b/common/cmd_pci.c
index 53b0f42..306e734 100644
--- a/common/cmd_pci.c
+++ b/common/cmd_pci.c
@@ -330,7 +330,8 @@ static pci_dev_t get_pci_dev(char* name)
return PCI_BDF(bdfs[0], bdfs[1], bdfs[2]);
 }
 
-static int pci_cfg_display(pci_dev_t bdf, ulong addr, ulong size, ulong length)
+static int pci_cfg_display(pci_dev_t bdf, ulong addr, enum pci_size_t size,
+  ulong length)
 {
 #define DISP_LINE_LEN  16
ulong i, nbytes, linebytes;
@@ -344,23 +345,13 @@ static int pci_cfg_display(pci_dev_t bdf, ulong addr, 
ulong size, ulong length)
 */
nbytes = length * size;
do {
-   uintval4;
-   ushort  val2;
-   u_char  val1;
-
printf("%08lx:", addr);
linebytes = (nbytes>DISP_LINE_LEN)?DISP_LINE_LEN:nbytes;
for (i=0; i 3)
addr = simple_strtoul(argv[3], NULL, 16);
if (argc > 4)
-- 
2.6.0.rc2.230.g3dd15c0

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[U-Boot] [PATCH 10/14] pci: Fix pci_field_width() for 32-bit values

[Simon Glass]

This should return 8, not 32. Fix it.

Signed-off-by: Simon Glass 
---

 common/cmd_pci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/cmd_pci.c b/common/cmd_pci.c
index 306e734..747d6b9 100644
--- a/common/cmd_pci.c
+++ b/common/cmd_pci.c
@@ -36,7 +36,7 @@ static int pci_field_width(enum pci_size_t size)
return 4;
case PCI_SIZE_32:
default:
-   return 32;
+   return 8;
}
 }
 
-- 
2.6.0.rc2.230.g3dd15c0

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[U-Boot] [PATCH 03/14] pci: Use a separate variable for the bus number

[Simon Glass]

At present in do_pci(), bdf can either mean a bus number or a PCI bus number.
Use separate variables instead to reduce confusion.

Signed-off-by: Simon Glass 
---

 common/cmd_pci.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/common/cmd_pci.c b/common/cmd_pci.c
index 5762769..6e28b70 100644
--- a/common/cmd_pci.c
+++ b/common/cmd_pci.c
@@ -407,6 +407,7 @@ pci_cfg_modify (pci_dev_t bdf, ulong addr, ulong size, 
ulong value, int incrflag
 static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
ulong addr = 0, value = 0, size = 0;
+   int busnum = 0;
pci_dev_t bdf = 0;
char cmd = 's';
int ret = 0;
@@ -437,14 +438,13 @@ static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
 #endif
default:/* scan bus */
value = 1; /* short listing */
-   bdf = 0;   /* bus number  */
if (argc > 1) {
if (argv[argc-1][0] == 'l') {
value = 0;
argc--;
}
if (argc > 1)
-   bdf = simple_strtoul(argv[1], NULL, 16);
+   busnum = simple_strtoul(argv[1], NULL, 16);
}
cmd = 's';
break;
@@ -476,7 +476,7 @@ static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
ret = pci_cfg_modify(bdf, addr, size, value, 1);
break;
case 's':
-   pciinfo(bdf, value);
+   pciinfo(busnum, value);
break;
case 'w':   /* write */
if (argc < 5)
-- 
2.6.0.rc2.230.g3dd15c0

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[U-Boot] [PATCH 02/14] pci: Use a common return in command processing

[Simon Glass]

Adjust the commands to return from the same place.

Signed-off-by: Simon Glass 
---

 common/cmd_pci.c | 21 ++---
 1 file changed, 14 insertions(+), 7 deletions(-)

diff --git a/common/cmd_pci.c b/common/cmd_pci.c
index 4f4c341..5762769 100644
--- a/common/cmd_pci.c
+++ b/common/cmd_pci.c
@@ -409,6 +409,7 @@ static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
ulong addr = 0, value = 0, size = 0;
pci_dev_t bdf = 0;
char cmd = 's';
+   int ret = 0;
 
if (argc > 1)
cmd = argv[1][0];
@@ -452,7 +453,7 @@ static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
switch (cmd) {
case 'h':   /* header */
pci_header_show(bdf);
-   return 0;
+   break;
case 'd':   /* display */
return pci_cfg_display(bdf, addr, size, value);
 #ifdef CONFIG_CMD_PCI_ENUM
@@ -462,26 +463,32 @@ static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
 # else
pci_init();
 # endif
-   return 0;
+   break;
 #endif
case 'n':   /* next */
if (argc < 4)
goto usage;
-   return pci_cfg_modify(bdf, addr, size, value, 0);
+   ret = pci_cfg_modify(bdf, addr, size, value, 0);
+   break;
case 'm':   /* modify */
if (argc < 4)
goto usage;
-   return pci_cfg_modify(bdf, addr, size, value, 1);
+   ret = pci_cfg_modify(bdf, addr, size, value, 1);
+   break;
case 's':
pciinfo(bdf, value);
-   return 0;
+   break;
case 'w':   /* write */
if (argc < 5)
goto usage;
-   return pci_cfg_write(bdf, addr, size, value);
+   ret = pci_cfg_write(bdf, addr, size, value);
+   break;
+   default:
+   ret = CMD_RET_USAGE;
+   break;
}
 
-   return 1;
+   return ret;
  usage:
return CMD_RET_USAGE;
 }
-- 
2.6.0.rc2.230.g3dd15c0

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Re: [U-Boot] [PATCH] rockchip: Turn on CONFIG_DEBUG_LL for firefly

[Ezequiel Garcia]

On 12 November 2015 at 18:42, Ariel D'Alessandro
 wrote:
> CONFIG_DEBUG_UART is enabled in defconfig, but there's no Low-level
> debugging functions implemented, so build fails because of undefined
> references to `printch' in common/console.c.
> In order to fix this, enable CONFIG_DEBUG_LL.
>

I think you are fixing this the wrong way. This patch
solves the problem as well, and I think it's the right way:

[patch format is probably wasted]
@@ -34,6 +34,7 @@ CONFIG_REGULATOR_ACT8846=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_NS16550=y
 CONFIG_DEBUG_UART_BASE=0xff69
 CONFIG_DEBUG_UART_CLOCK=2400
 CONFIG_DEBUG_UART_SHIFT=2

Without this fix, Altera JTAG UART is selected instead of NS16550.
I expect other defconfigs (e.g. chromebook_jerry_defconfig) to suffer
from this as well.

That said, I still haven't looked at the differences between
DEBUG_LL and DEBUG_UART.
-- 
Ezequiel García, VanguardiaSur
www.vanguardiasur.com.ar
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[U-Boot] [PATCH 01/14] pci: Move 'pci scan' code in with other commands

[Simon Glass]

At present the 'pci scan' code has its own code path. Adjust it so that it
can be placed with the rest of the command processing code. This will allow
us to use common set code for all commands.

Signed-off-by: Simon Glass 
---

 common/cmd_pci.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/common/cmd_pci.c b/common/cmd_pci.c
index 69c5332..4f4c341 100644
--- a/common/cmd_pci.c
+++ b/common/cmd_pci.c
@@ -445,11 +445,11 @@ static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
if (argc > 1)
bdf = simple_strtoul(argv[1], NULL, 16);
}
-   pciinfo(bdf, value);
-   return 0;
+   cmd = 's';
+   break;
}
 
-   switch (argv[1][0]) {
+   switch (cmd) {
case 'h':   /* header */
pci_header_show(bdf);
return 0;
@@ -472,6 +472,9 @@ static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
if (argc < 4)
goto usage;
return pci_cfg_modify(bdf, addr, size, value, 1);
+   case 's':
+   pciinfo(bdf, value);
+   return 0;
case 'w':   /* write */
if (argc < 5)
goto usage;
-- 
2.6.0.rc2.230.g3dd15c0

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[U-Boot] [PATCH 00/14] dm: pci: Support native driver model calls

[Simon Glass]

At present driver model supports PCI, but most of the code in U-Boot still
uses the old API.

This series changes the 'pci' command so that the new API is used. The old
API is placed behind a 'compatibility' option. The overall goal is to
deprecate the old API and remove all use of it. The auto-config and device
finding will be the subject of future patches.


Simon Glass (14):
  pci: Move 'pci scan' code in with other commands
  pci: Use a common return in command processing
  pci: Use a separate variable for the bus number
  pci: Refactor the pciinfo() function
  dm: pci: Add a comment about how to find struct pci_controller
  dm: pci: Rename pci_auto.c to pci_auto_old.c
  dm: pci: Move common auto-config functions to a common file
  dm: pci: Reorder functions in cmd_pci.c
  pci: Use common functions to read/write config
  pci: Fix pci_field_width() for 32-bit values
  pci: Use a separate 'dev' variable for the PCI device
  pci: Move PCI header output code into its own function
  dm: pci: Convert 'pci' command to driver model
  dm: pci: Disable PCI compatibility functions by default

 arch/arm/mach-tegra/Kconfig|   2 +
 arch/x86/Kconfig   |   3 +
 common/cmd_pci.c   | 579 +++--
 configs/sandbox_defconfig  |  10 +-
 drivers/pci/Kconfig|   9 +
 drivers/pci/Makefile   |   5 +-
 drivers/pci/pci_auto_common.c  | 128 +++
 drivers/pci/{pci_auto.c => pci_auto_old.c} | 122 --
 include/common.h   |   1 -
 include/pci.h  |  23 +-
 10 files changed, 542 insertions(+), 340 deletions(-)
 create mode 100644 drivers/pci/pci_auto_common.c
 rename drivers/pci/{pci_auto.c => pci_auto_old.c} (79%)

-- 
2.6.0.rc2.230.g3dd15c0

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Re: [U-Boot] [PATCH] arm: socfpga: reset: FIX address of tstscratch register

[Marek Vasut]

On Thursday, November 12, 2015 at 06:23:10 PM, Philipp Rosenberger wrote:
> The Cyclone V Hard Processor System Technical Reference Manual in the
> chapter about the Reset Manager Module Address Map stats that the offset
> of the tstscratch register ist 0x54 not 0x24.
> 
> Cyclone V Hard Processor System Technical Reference Manual cv_5v4
> 2015.11.02 page 3-17 Reset Manager Module Address Map
> 
> Signed-off-by: Philipp Rosenberger 

Applied, thanks!

Best regards,
Marek Vasut
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[U-Boot] Pull request, u-boot-tegra/master

[Tom Warren]

Tom,

Please pull u-boot-tegra/master into U-Boot/master. Thanks!

All tegra builds are OK (32-bit and 64-bit), and P2571 T210 64-bit boots to
cmd prompt OK.

The following changes since commit 038be18fd95aa6283eafb85ceabc0b880976424b:

  nios2: add 3c120 and 10m50 devboards MAINTAINERS (2015-11-12 08:26:59
+0800)

are available in the git repository at:

  git://git.denx.de/u-boot-tegra.git master

for you to fetch changes up to e1cf5278024eb5c72abd69d6bda266ffc5832941:

  ARM: tegra: note that p2371-2180 is Jetson TX1 (2015-11-12 09:27:16 -0700)


Alexandre Courbot (3):
  ARM: tegra: remove vpr_configured() function
  ARM: tegra: simplify GPU setup
  ARM: tegra: rename GPU functions

Stephen Warren (16):
  ARM: tegra210: implement PLLE init procedure from TRM
  pci: tegra: clip RAM size to 32-bits
  pci: tegra: use #address-/size-cells from DT
  pci: tegra: implement PCA enable workaround
  pci: tegra: call tegra_pcie_board_init() earlier
  pci: tegra: add/enable support for Tegra210
  ARM: tegra: add PCI to Tegra210 SoC DT
  ARM: tegra: enable PCI support of p2371-2180
  ARM: tegra: rename dummy XUSB padctl implementation
  ARM: tegra: clean up XUSB padctl error() calls
  ARM: tegra: create common XUSB padctl driver file
  ARM: tegra: parameterize common XUSB code
  ARM: tegra: switch Tegra210 to common XUSB padctl
  ARM: tegra: add lane tables to Tegra210 XUSB padctl
  ARM: tegra: error check Tegra210 XUSB padctl waits
  ARM: tegra: note that p2371-2180 is Jetson TX1

Tom Warren (1):
  Tegra: T210: Add QSPI driver

 arch/arm/dts/tegra210-p2371-2180.dts   |  50 +++
 arch/arm/dts/tegra210.dtsi |  66 
 arch/arm/include/asm/arch-tegra/gpu.h  |  14 +-
 arch/arm/mach-tegra/Makefile   |   2 +-
 arch/arm/mach-tegra/board2.c   |  22 +-
 arch/arm/mach-tegra/gpu.c  |  11 +-
 arch/arm/mach-tegra/tegra124/Makefile  |   1 +
 arch/arm/mach-tegra/tegra124/xusb-padctl.c | 431
++---
 arch/arm/mach-tegra/tegra210/Kconfig   |  10 +-
 arch/arm/mach-tegra/tegra210/Makefile  |   1 +
 arch/arm/mach-tegra/tegra210/clock.c   | 179 ++---
 arch/arm/mach-tegra/tegra210/xusb-padctl.c | 248 +---
 arch/arm/mach-tegra/xusb-padctl-common.c   | 305 +++
 arch/arm/mach-tegra/xusb-padctl-common.h   | 101 +
 .../{xusb-padctl.c => xusb-padctl-dummy.c} |   0
 board/nvidia/jetson-tk1/jetson-tk1.c   |   8 -
 board/nvidia/p2371-2180/p2371-2180.c   |  30 ++
 board/nvidia/p2571/p2571.c |   7 -
 board/nvidia/venice2/venice2.c |   8 -
 drivers/pci/pci_tegra.c|  83 +++-
 drivers/spi/Kconfig|   7 +
 drivers/spi/Makefile   |   1 +
 drivers/spi/tegra210_qspi.c| 417

 include/configs/jetson-tk1.h   |   2 -
 include/configs/p2371-2180.h   |  10 +
 include/configs/p2571.h|   2 -
 include/configs/tegra-common.h |   2 +
 include/configs/venice2.h  |   2 -
 include/fdtdec.h   |   1 +
 lib/fdtdec.c   |   1 +
 30 files changed, 1353 insertions(+), 669 deletions(-)
 create mode 100644 arch/arm/mach-tegra/xusb-padctl-common.c
 create mode 100644 arch/arm/mach-tegra/xusb-padctl-common.h
 rename arch/arm/mach-tegra/{xusb-padctl.c => xusb-padctl-dummy.c} (100%)
 create mode 100644 drivers/spi/tegra210_qspi.c
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[U-Boot] [PATCH 05/14] dm: pci: Add a comment about how to find struct pci_controller

[Simon Glass]

With driver mode, struct pci_controller is stored as uclass-private data.
Add a comment to that effect.

Signed-off-by: Simon Glass 
---

 include/pci.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/pci.h b/include/pci.h
index 9c19482..c4f6577 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -537,6 +537,8 @@ extern void pci_cfgfunc_config_device(struct 
pci_controller* hose, pci_dev_t dev
 
 /*
  * Structure of a PCI controller (host bridge)
+ *
+ * With driver model this is dev_get_uclass_priv(bus)
  */
 struct pci_controller {
 #ifdef CONFIG_DM_PCI
-- 
2.6.0.rc2.230.g3dd15c0

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Re: [U-Boot] [PATCH 2/6] input: Call keyboard's update_leds() method when the LEDs change

[Simon Glass]

On 12 November 2015 at 06:33, Bin Meng  wrote:
> We should request keyboard to turn on/off its LED when detecting
> any changes on the LEDs.
>
> Signed-off-by: Bin Meng 
> ---
>
>  drivers/input/input.c | 9 +
>  1 file changed, 9 insertions(+)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH 4/6] input: Ban digit numbers if 'Num Lock' is not on

[Simon Glass]

On 12 November 2015 at 06:33, Bin Meng  wrote:
> When 'Num Lock' is not on, we should not send these digit numbers
> (0-9 and dot) to the output buffer.
>
> Signed-off-by: Bin Meng 
> ---
>
>  drivers/input/input.c | 6 ++
>  1 file changed, 6 insertions(+)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH 3/6] input: Change LED state bits to conform i8042 compatible keyboard

[Simon Glass]

On 12 November 2015 at 06:33, Bin Meng  wrote:
> When sending LED update command to an i8042 compatible keyboard,
> bit1 is 'Num Lock' and bit2 is 'Caps Lock' in the data byte. But
> input library defines bit1 as 'Caps Lock' and bit2 as 'Num Lock'.
> This causes a wrong LED to be set on an i8042 compatible keyboard.
> Change the LED state bits to be i8042 compatible, and change the
> keyboard flags as well.
>
> Signed-off-by: Bin Meng 
> ---
>
>  drivers/input/input.c | 6 +++---
>  include/input.h   | 4 ++--
>  2 files changed, 5 insertions(+), 5 deletions(-)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 15/16] arm: dts: am4372: add qspi register maps for memory map

[Mugunthan V N]

On Sunday 08 November 2015 07:02 PM, Tom Rini wrote:
> On Wed, Nov 04, 2015 at 01:46:23PM +0530, Mugunthan V N wrote:
>> Add qspi memory map address to device tree.
>>
>> Signed-off-by: Mugunthan V N 
>> Reviewed-by: Simon Glass 
>> ---
>>  arch/arm/dts/am4372.dtsi | 4 +++-
>>  1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/dts/am4372.dtsi b/arch/arm/dts/am4372.dtsi
>> index ade28c7..1b30d53 100644
>> --- a/arch/arm/dts/am4372.dtsi
>> +++ b/arch/arm/dts/am4372.dtsi
>> @@ -25,6 +25,7 @@
>>  serial0 = 
>>  ethernet0 = _emac0;
>>  ethernet1 = _emac1;
>> +spi0 = 
>>  };
>>  
>>  cpus {
>> @@ -902,7 +903,8 @@
>>  
>>  qspi: qspi@4790 {
>>  compatible = "ti,am4372-qspi";
>> -reg = <0x4790 0x100>;
>> +reg = <0x4790 0x100>, <0x3000 0x400>;
>> +reg-names = "qspi_base", "qspi_mmap";
>>  #address-cells = <1>;
>>  #size-cells = <0>;
>>  ti,hwmods = "qspi";
> 
> Is this upstream already?
> 

The documentation part is already upstreamed. Driver in kernel doesn't
support mmap mode yet, so dt changes are not present. Vignesh has
submitted the mmap patches [1] and is under review.

[1]: https://lkml.org/lkml/2015/11/10/14

Regards
Mugunthan V N
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Re: [U-Boot] [PATCH] dm: core: Kconfig: set OF_TRANSLATE default value to n

[Mugunthan V N]

On Friday 06 November 2015 09:11 PM, Stephen Warren wrote:
> On 11/06/2015 05:19 AM, Stefan Roese wrote:
>> +Stephan Warren & Thomas Chou
>>
>> On 06.11.2015 13:08, Simon Glass wrote:
>>> +Stefan
>>>
>>> Hi Mugunthan,
>>>
>>> On 4 November 2015 at 07:25, Mugunthan V N  wrote:
 Based on the OF_TRANSLATE Kconfig description, this is required
 only on platforms with complex "ranges" in the DT nodes. For
 simpler platforms using SIMPLE_BUS should be sufficient. Since
 this a set to default y, simple bus is never used in any
 platform. So make the default value as "n" and enable
 OF_TRANSLATE only on required platform.
>>>
>>> How do you know it is not used? This is surprising because Stefan
>>> presumably added it to fix something.
>>
>> I assume Mugunthan meant, that simple bus is never used. This
>> is not quite correct, as its at least used per default in the
>> SPL (because of size reasons).
>>
>> And yes, this translation via fdt_translate_address() is needed.
>> At least for some platforms, like mvebu & nios2 (IIRC). Stephen
>> also made some quite striking comments about this a few weeks
>> ago. And I really think that we should make use of this function
>> per default. Platforms that know for sure that they don't need
>> this functionality can always disable it selectively.
>>
>> Mugunthan, why do you want to disable this functionality? Does
>> it cause problems on your platform? If yes, which ones?
> 
> Processing of ranges is a fundamental part of handling DT in general. It
> should be enabled by default. If there are well-researched cases where
> (a) including the code is problematic (e.g. due to code size
> restrictions) and (b) someone is watching the DTs processed on those
> platforms like a hawk to ensure no ranges properties are introduced into
> the DT, *then* we could make a special-case exception to disable the
> feature in those specific cases. As such, I think enable-by-default,
> disable-when-chosen is the appropriate default.

In the Kconfig help it is mentioned that this is needed only on some
platforms which uses complex ranges, so when I tried disabling
OF_TRANSLATE on omap platform it still works.

Since OF_TRANSLATE is defined as 'y' as default, SIMPLE_BUS is never
used until OF_TRANSLATE is set to 'n' in defconfig. So I thought of
making the default kconfig option as 'n' and select this which ever
platform needs it like mvebu and nios2.

But if community wants OF_TRANSLATE to be used by default, I am okay to
drop this patch.

Regards
Mugunthan V N
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Re: [U-Boot] [PATCH 2/2] ARM: am43xx: Enable QUAD read and EDMA support for ti_qspi

[Mugunthan V N]

On Tuesday 10 November 2015 11:52 AM, Vignesh R wrote:
> Enable TI_EDMA3 and QUAD read support for ti_qspi on am43xx, this
> increases read performance to 4 MB/s.
> 
> Signed-off-by: Vignesh R 
> ---

Reviewed-by: Mugunthan V N 

Regards
Mugunthan V N
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Re: [U-Boot] [PATCH v2 10/16] drivers: mtd: spi: sf_probe: add compatible for spansion spi flash

[Mugunthan V N]

On Friday 06 November 2015 05:37 PM, Simon Glass wrote:
> Hi Mugunthan,
> 
> On 4 November 2015 at 01:16, Mugunthan V N  wrote:
>> Add compatible for spansion 32MiB spi flash s25fl256s1.
>>
>> Signed-off-by: Mugunthan V N 
>> ---
>>  drivers/mtd/spi/sf_probe.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
>> index c000c53..9cfa9b6 100644
>> --- a/drivers/mtd/spi/sf_probe.c
>> +++ b/drivers/mtd/spi/sf_probe.c
>> @@ -502,6 +502,7 @@ static const struct dm_spi_flash_ops spi_flash_std_ops = 
>> {
>>
>>  static const struct udevice_id spi_flash_std_ids[] = {
>> { .compatible = "spi-flash" },
>> +   { .compatible = "s25fl256s1" },
> 
> Instead, is it possible to add "spi-flash" to the list of compatible
> strings in your device tree?
> 

The compatible "spi-flash" is not defined/documented in kernel and
compatible "s25fl256s1" is already documented and present in dt files.
So it will be good to follow the same dt compatibles in U-Boot so that
future merge/sync will be easier.

Regards
Mugunthan V N

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Re: [U-Boot] aarch64-linux-gnu-objdump gives all zeros in init_sequence_f[]

[Shawn Guo]

Hi Albert,

On Thu, Nov 12, 2015 at 08:20:18AM +0100, Albert ARIBAUD wrote:
> Can you provide the target name and commit ID that you are building,
> s well as the version of the toolchain that you are building with?
> Without being able to reproduce your issue, it's kind of hard to
> diagnose it.

With the explanation from Ard, I understand the thing now.  But thanks
for the reply anyway.

Shawn
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Re: [U-Boot] [PATCH v2 14/16] am43xx_evm: qspi: do not define DM_SPI and DM_SPI_FLASH for spl

[Mugunthan V N]

On Friday 06 November 2015 05:37 PM, Simon Glass wrote:
> Hi Mugunthan,
> 
> On 4 November 2015 at 01:16, Mugunthan V N  wrote:
>> > Since spl doesn't support DM currently, do not define DM_SPI and
>> > DM_SPI_FLASH for spl build.
> Since spl doesn't support DM currently on OMAP?
> 
> It is supported in general, right?
> 

Right, it is supported in general only for OMAP it is not supported.
Will fix it in next version.

Regards
Mugunthan V N
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Re: [U-Boot] [PATCH v2 06/16] dra7xx_evm: qspi: do not define DM_SPI and DM_SPI_FLASH for spl

[Mugunthan V N]

On Friday 06 November 2015 05:37 PM, Simon Glass wrote:
> Hi Mugunthan,
> 
> On 4 November 2015 at 01:16, Mugunthan V N  wrote:
>> > Since spl doesn't support DM currently, do not define DM_SPI and
>> > DM_SPI_FLASH for spl build.
> Do you mean 'Since OMAP's SPL doesn't support...'?
> 

Right, for OMAP it is not supported. Will fix it in next version.

Regards
Mugunthan V N
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Re: [U-Boot] [PATCH 1/2] spi: ti_qspi: Add dummy readl for bus sync

[Mugunthan V N]

On Tuesday 10 November 2015 11:52 AM, Vignesh R wrote:
> Add dummy readl after invalidating cmd field of QSPI_CMD_REG to ensure
> bus sync. Without this device's CS is not deactivated reliably leading
> to failure to enumerate flash or failure to set quad enable bit on
> Macronix flash present on am437x-sk and am437x-idk evms.
> 
> Signed-off-by: Vignesh R 
> ---

Reviewed-by: Mugunthan V N 

Regards
Mugunthan V N

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Re: [U-Boot] aarch64-linux-gnu-objdump gives all zeros in init_sequence_f[]

[Shawn Guo]

On Thu, Nov 12, 2015 at 07:36:02AM +0100, Ard Biesheuvel wrote:
> On 12 November 2015 at 06:43, Shawn Guo  wrote:
> > Here are my questions:
> >
> > - Is this only because that ARM 64-bit toolchain doesn't show the real
> >   value of the pointers, or there are some linking or run-time magics to
> >   get these pointers correct when the binary is actually running?
> >
> 
> AArch64 uses the ELF RELA relocation format, where the target location
> of the relocation is not used to hold the addend. In contrast, ARM
> uses the REL format, where the addend is stored in the same place
> where the result of the relocation computation needs to be stored.
> 
> Since U-Boot is a PIE executable, it makes heavy use of
> R_ARM_RELATIVE/R_AARCH64_RELATIVE relocations, which are not symbol
> based, but simply point to places in the binary such as your init
> array) where the offset between the link time and load time addresses
> needs to be taken into account. For this type of relocation (and since
> the u-boot link time base address is 0x0), the addends happen to
> coincide with the actual addresses of the functions. These relocations
> are applied at runtime by u-boot itself, since it moves itself to the
> top of DRAM right after boot.
> 
> In the AArch64 case, these addends are stored in the relocation
> entries themselves. If you dump the relocations form the u-boot binary
> using readelf, you will probably find the values you are looking for.

Thanks a lot for the pointer, Ard.  With your hints, I'm looking at
U-Boot commit 8137af19e75a (arm64: Add tool to statically apply RELA
relocations) and getting the idea how this thing works on arm64.

Thanks again.

Shawn
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Re: [U-Boot] [PATCH v2] Fix board init code to use a valid C runtime environment

[Thomas Chou]

Hi Albert,

On 2015年11月12日 15:17, Albert ARIBAUD wrote:


diff --git a/common/init/board_init.c b/common/init/board_init.c
index 8839a4a..703e6d8 100644
--- a/common/init/board_init.c
+++ b/common/init/board_init.c
@@ -46,6 +46,7 @@ void board_init_f_gd(struct global_data *gd_ptr)
for (ptr = (int *)gd_ptr; ptr < (int *)(gd_ptr + 1); )
*ptr++ = 0;
   #endif
+   arch_setup_gd(gd_ptr);


Correct -- in ARM (Thumb-1 at least) we cannot use arch_setup_gd() so
we set GD (in r9) from within arch/arm/lib/crt0.S, but for NIOS2 it
might (and apparently does) work. Where is GD stored in NIOS2?



It is a register, r26 "gp".

I have another question. Will it be simpler to have two calls instead of 
four?


1. get size of gd plus malloc.

2. init gd and malloc.

Best regards,
Thomas
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Re: [U-Boot] [PATCH v2 09/16] arm: dts: dra7: add qspi register maps for memory map and control module

[Mugunthan V N]

On Sunday 08 November 2015 07:01 PM, Tom Rini wrote:
> On Wed, Nov 04, 2015 at 01:46:17PM +0530, Mugunthan V N wrote:
> 
>> Add qspi memory map and control module register maps to device tree.
>>
>> Signed-off-by: Mugunthan V N 
>> Reviewed-by: Simon Glass 
>> ---
>>  arch/arm/dts/dra7.dtsi | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/dts/dra7.dtsi b/arch/arm/dts/dra7.dtsi
>> index 3060e9a..7045c0f 100644
>> --- a/arch/arm/dts/dra7.dtsi
>> +++ b/arch/arm/dts/dra7.dtsi
>> @@ -1104,8 +1104,8 @@
>>  
>>  qspi: qspi@4b30 {
>>  compatible = "ti,dra7xxx-qspi";
>> -reg = <0x4b30 0x100>;
>> -reg-names = "qspi_base";
>> +reg = <0x4b30 0x100>, <0x5c00 0x400>, 
>> <0x4a002558 0x4>;
>> +reg-names = "qspi_base", "qspi_mmap", "qspi_ctrlmod";
>>  #address-cells = <1>;
>>  #size-cells = <0>;
>>  ti,hwmods = "qspi";
> 
> Is this already upstream?
> 

The documentation part is already upstreamed. Driver in kernel doesn't
support mmap mode yet so dt changes are not present. Vignesh has
submitted the mmap patches [1] and is under review.

[1]: https://lkml.org/lkml/2015/11/10/14

Regards
Mugunthan V N

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Re: [U-Boot] [PATCH v5 16/21] rockchip: add rk3036 sdram driver

[Ben Chan]

On Tue, Nov 10, 2015 at 2:24 AM, Lin Huang  wrote:
> add rk3036 sdram driver so we can set up sdram in SPL
>
> Signed-off-by: Lin Huang 
> ---
> Changes in v1: None
> Changes in v2: None
> Changes in v3:
> - fix some code style error
> Changes in v4:
> - modify code advice by Simon Glass
> Changes in v5:
> - Advice by Simon:
> - move some global variables to local variables
> - delete __weak get_ddr_config() function
>
>  arch/arm/include/asm/arch-rockchip/sdram_rk3036.h | 341 ++
>  arch/arm/mach-rockchip/rk3036/Makefile|   2 +
>  arch/arm/mach-rockchip/rk3036/sdram_rk3036.c  | 766 
> ++
>  3 files changed, 1109 insertions(+)
>  create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_rk3036.h
>  create mode 100644 arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
>
> diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3036.h 
> b/arch/arm/include/asm/arch-rockchip/sdram_rk3036.h
> new file mode 100644
> index 000..4ce2ba5
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3036.h
> @@ -0,0 +1,341 @@
> +/*
> + * (C) Copyright 2015 Rockchip Electronics Co., Ltd
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +#ifndef _ASM_ARCH_SDRAM_RK3036_H
> +#define _ASM_ARCH_SDRAM_RK3036_H
> +
> +#include 
> +
> +struct rk3036_ddr_pctl {
> +   u32 scfg;
> +   u32 sctl;
> +   u32 stat;
> +   u32 intrstat;
> +   u32 reserved0[12];
> +   u32 mcmd;
> +   u32 powctl;
> +   u32 powstat;
> +   u32 cmdtstat;
> +   u32 cmdtstaten;
> +   u32 reserved1[3];
> +   u32 mrrcfg0;
> +   u32 mrrstat0;
> +   u32 mrrstat1;
> +   u32 reserved2[4];
> +   u32 mcfg1;
> +   u32 mcfg;
> +   u32 ppcfg;
> +   u32 mstat;
> +   u32 lpddr2zqcfg;
> +   u32 reserved3;
> +   u32 dtupdes;
> +   u32 dtuna;
> +   u32 dtune;
> +   u32 dtuprd0;
> +   u32 dtuprd1;
> +   u32 dtuprd2;
> +   u32 dtuprd3;
> +   u32 dtuawdt;
> +   u32 reserved4[3];
> +   u32 togcnt1u;
> +   u32 tinit;
> +   u32 trsth;
> +   u32 togcnt100n;
> +   u32 trefi;
> +   u32 tmrd;
> +   u32 trfc;
> +   u32 trp;
> +   u32 trtw;
> +   u32 tal;
> +   u32 tcl;
> +   u32 tcwl;
> +   u32 tras;
> +   u32 trc;
> +   u32 trcd;
> +   u32 trrd;
> +   u32 trtp;
> +   u32 twr;
> +   u32 twtr;
> +   u32 texsr;
> +   u32 txp;
> +   u32 txpdll;
> +   u32 tzqcs;
> +   u32 tzqcsi;
> +   u32 tdqs;
> +   u32 tcksre;
> +   u32 tcksrx;
> +   u32 tcke;
> +   u32 tmod;
> +   u32 trstl;
> +   u32 tzqcl;
> +   u32 tmrr;
> +   u32 tckesr;
> +   u32 reserved5[47];
> +   u32 dtuwactl;
> +   u32 dturactl;
> +   u32 dtucfg;
> +   u32 dtuectl;
> +   u32 dtuwd0;
> +   u32 dtuwd1;
> +   u32 dtuwd2;
> +   u32 dtuwd3;
> +   u32 dtuwdm;
> +   u32 dturd0;
> +   u32 dturd1;
> +   u32 dturd2;
> +   u32 dturd3;
> +   u32 dtulfsrwd;
> +   u32 dtulfsrrd;
> +   u32 dtueaf;
> +   u32 dfitctrldelay;
> +   u32 dfiodtcfg;
> +   u32 dfiodtcfg1;
> +   u32 dfiodtrankmap;
> +   u32 dfitphywrdata;
> +   u32 dfitphywrlat;
> +   u32 reserved7[2];
> +   u32 dfitrddataen;
> +   u32 dfitphyrdlat;
> +   u32 reserved8[2];
> +   u32 dfitphyupdtype0;
> +   u32 dfitphyupdtype1;
> +   u32 dfitphyupdtype2;
> +   u32 dfitphyupdtype3;
> +   u32 dfitctrlupdmin;
> +   u32 dfitctrlupdmax;
> +   u32 dfitctrlupddly;
> +   u32 reserved9;
> +   u32 dfiupdcfg;
> +   u32 dfitrefmski;
> +   u32 dfitctrlupdi;
> +   u32 reserved10[4];
> +   u32 dfitrcfg0;
> +   u32 dfitrstat0;
> +   u32 dfitrwrlvlen;
> +   u32 dfitrrdlvlen;
> +   u32 dfitrrdlvlgateen;
> +   u32 dfiststat0;
> +   u32 dfistcfg0;
> +   u32 dfistcfg1;
> +   u32 reserved11;
> +   u32 dfitdramclken;
> +   u32 dfitdramclkdis;
> +   u32 dfistcfg2;
> +   u32 dfistparclr;
> +   u32 dfistparlog;
> +   u32 reserved12[3];
> +   u32 dfilpcfg0;
> +   u32 reserved13[3];
> +   u32 dfitrwrlvlresp0;
> +   u32 dfitrwrlvlresp1;
> +   u32 dfitrwrlvlresp2;
> +   u32 dfitrrdlvlresp0;
> +   u32 dfitrrdlvlresp1;
> +   u32 dfitrrdlvlresp2;
> +   u32 dfitrwrlvldelay0;
> +   u32 dfitrwrlvldelay1;
> +   u32 dfitrwrlvldelay2;
> +   u32 dfitrrdlvldelay0;
> +   u32 dfitrrdlvldelay1;
> +   u32 dfitrrdlvldelay2;
> +   u32 dfitrrdlvlgatedelay0;
> +   u32 dfitrrdlvlgatedelay1;
> +   u32 dfitrrdlvlgatedelay2;
> +   u32 dfitrcmd;
> +   u32 reserved14[46];
> +   u32 ipvr;
> +   u32 iptr;
> +};
> +check_member(rk3036_ddr_pctl, iptr, 0x03fc);
> +
> +struct rk3036_ddr_phy {
> +   u32 ddrphy_reg1;
> +   u32 ddrphy_reg3;
> +   u32 ddrphy_reg2;
> +   u32 reserve[11];
> +  

Re: [U-Boot] [U-Boot, v2, 13/14] sunxi: A13-Olinuxino: Enable the USB OTG controller

[Tom Rini]

On Thu, Oct 15, 2015 at 02:34:21PM +0200, Maxime Ripard wrote:

> The A13-Olinuxino has a mini-USB connector that can be used to power up
> the board and as an OTG connector.
> 
> Since we have already some USB host-only ports right beside this one,
> enable it in gadget mode
> 
> Signed-off-by: Maxime Ripard 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v2, 14/14] sunxi: cubietruck: Enable the USB OTG controller

[Tom Rini]

On Thu, Oct 15, 2015 at 02:34:22PM +0200, Maxime Ripard wrote:

> The Cubietruck has a mini-USB connector that can be used to power up the
> board and as an OTG connector.
> 
> Since we have already some USB host-only ports right beside this one,
> enable it in gadget mode
> 
> Signed-off-by: Maxime Ripard 

Applied to u-boot/master, thanks!

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Re: [U-Boot] include/linux/mtd: Update copyright notices

[Tom Rini]

On Fri, Oct 23, 2015 at 09:37:47AM -0400, Tom Rini wrote:

> Condense these updates down to SPDX tags too while doing this.  This is
> a port of a1452a3771c4eb85bd779790b040efdc36f4274e from the Linux
> Kernel.
> 
> Signed-off-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 1/5] driver: gpio: hikey: Fix pointer conversion warnings for hikey

[Tom Rini]

On Sun, Oct 25, 2015 at 01:18:12PM +0530, Prabhakar Kushwaha wrote:

> Fix below compilation warnings-
> drivers/gpio/hi6220_gpio.c: In function ‘hi6220_gpio_probe’:
> drivers/gpio/hi6220_gpio.c:82:15: warning: cast to pointer from integer
> of different size [-Wint-to-pointer-cast]
>   bank->base = (u8 *)plat->base;
> 
> Signed-off-by: Prabhakar Kushwaha 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 2/5] driver: dwmmc: Fix pointer conversion warnings for hikey

[Tom Rini]

On Sun, Oct 25, 2015 at 01:18:25PM +0530, Prabhakar Kushwaha wrote:

> Fix below compilation warings happening for hikey_defconfig
> 
> drivers/mmc/dw_mmc.c: In function ‘dwmci_set_idma_desc’:
> drivers/mmc/dw_mmc.c:43:20: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>   desc->next_addr = (unsigned int)desc + sizeof(struct dwmci_idmac);
> ^
> drivers/mmc/dw_mmc.c: In function ‘dwmci_prepare_data’:
> drivers/mmc/dw_mmc.c:61:35: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>   dwmci_writel(host, DWMCI_DBADDR, (unsigned int)cur_idmac);
>^
> drivers/mmc/dw_mmc.c:73:9: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>  (u32)bounce_buffer + (i * PAGE_SIZE));
>  ^
>   CC  drivers/mmc/hi6220_dw_mmc.o
> drivers/mmc/hi6220_dw_mmc.c: In function ‘hi6220_dwmci_add_port’:
> drivers/mmc/hi6220_dw_mmc.c:51:17: warning: cast to pointer from integer
> of different size [-Wint-to-pointer-cast]
>   host->ioaddr = (void *)regbase;
> 
> Signed-off-by: Prabhakar Kushwaha 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v3, 3/3] uuid: add selection by string for known partition type GUID

[Tom Rini]

On Tue, Oct 27, 2015 at 11:00:28AM +0100, Patrick Delaunay wrote:

> short strings can be used in type parameter of gpt command
> to replace the guid string for the types known by u-boot
> 
>   partitions = name=boot,size=0x6bc00,type=data; \
>name=root,size=0x7538ba00,type=linux;
>   gpt write mmc 0 $partitions
> 
> and they are also used to display the type of partition
> in "part list" command
> 
>   Partition Map for MMC device 0  --   Partition Type: EFI
> 
>   PartStart LBA   End LBA Name
>   Attributes
>   Type GUID
>   Partition GUID
> 1 0x0022  0x037f  "boot"
>   attrs:  0x
>   type:   ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
>   type:   data
>   guid:   d117f98e-6f2c-d04b-a5b2-331a19f91cb2
> 2 0x0380  0x003a9fdc  "root"
>   attrs:  0x
>   type:   0fc63daf-8483-4772-8e79-3d69d8477de4
>   type:   linux
>   guid:   25718777-d0ad-7443-9e60-02cb591c9737
> 
> Signed-off-by: Patrick Delaunay 

Applied to u-boot/master, thanks!

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Re: [U-Boot] pci: fix checking PCI_REGION_MEM in pci_hose_phys_to_bus()

[Tom Rini]

On Fri, Oct 23, 2015 at 09:48:01PM +, Cheng Gu wrote:

> When converting between PCI bus and phys addresses, a two pass search
> was introduced with preference to non-PCI_REGION_SYS_MEMORY regions.
> See commit 2d43e873a29ca4959ba6a30fc7fb396d3fd0dccf.
> 
> However, since PCI_REGION_MEM is defined as 0, the if statement was
> always asserted true: ((flags & PCI_REGION_MEM) == PCI_REGION_MEM)
> 
> This patch uses PCI_REGION_TYPE bit to check if the region is
> PCI_REGION_MEM: ((flags & PCI_REGION_TYPE) == PCI_REGION_MEM)
> 
> Signed-off-by: Cheng Gu 
> Reviewed-by: Bin Meng 

Applied to u-boot/master, thanks!

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Re: [U-Boot] board/ti/am335x: beaglebone stop muxing i2c1_pin_mux

[Tom Rini]

On Wed, Oct 21, 2015 at 09:25:55AM -0500, robertcnel...@gmail.com wrote:

> On the BeagleBone these i2c1 pins are routed to the expanasion header, where
> they can be defined as either pr1_usart0_Xxd/pwm0/spi0/i2c1, dont assume i2c1
> 
> Fixes: https://e2e.ti.com/support/arm/sitara_arm/f/791/p/313894/1387696
> 
> Signed-off-by: Robert Nelson 
> Reported-by: Matthijs van Duin 
> CC: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] mmc: Use lldiv() for 64-bit division in write_raw_image()

[Tom Rini]

On Wed, Oct 28, 2015 at 06:24:16AM +0200, Siarhei Siamashka wrote:

> This fixes compilation problems when using a hardfloat toolchain on
> ARM, which manifest themselves as "libgcc.a(_udivmoddi4.o) uses
> VFP register arguments, u-boot does not".
> 
> These problems have been reported in the U-Boot mailing list:
> http://lists.denx.de/pipermail/u-boot/2015-October/230314.html
> http://lists.denx.de/pipermail/u-boot/2015-October/231908.html
> 
> Signed-off-by: Siarhei Siamashka 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v3, 2/3] gpt: add optional parameter type in gpt command

[Tom Rini]

On Tue, Oct 27, 2015 at 11:00:27AM +0100, Patrick Delaunay wrote:

> code under flag CONFIG_PARTITION_TYPE_GUID
> add parameter "type" to select partition type guid
> 
> example of use with gpt command :
> 
>   partitions = uuid_disk=${uuid_gpt_disk}; \
>   name=boot,size=0x6bc00,uuid=${uuid_gpt_boot}; \
>   name=root,size=0x7538ba00,uuid=${uuid_gpt_root}, \
>  type=0fc63daf-8483-4772-8e79-3d69d8477de4;
> 
>   gpt write mmc 0 $partitions
> 
> Signed-off-by: Patrick Delaunay 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v3, 1/3] part:efi: add GUID for linux file system data

[Tom Rini]

On Tue, Oct 27, 2015 at 11:00:26AM +0100, Patrick Delaunay wrote:

> Previously, Linux used the same GUID for the data partitions as Windows
> (Basic data partition: EBD0A0A2-B9E5-4433-87C0-68B6B72699C7).
> This created problems when dual-booting Linux and Windows in UEFI-GPT
> Setup, so a new GUID (Linux filesystem data:
> 0FC63DAF-8483-4772-8E79-3D69D8477DE4) was defined jointly by GPT fdisk
> and GNU Parted developers.
> 
> Signed-off-by: Patrick Delaunay 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 5/6] x86: crownbay: Convert to use driver model keyboard

[Simon Glass]

On 12 November 2015 at 06:33, Bin Meng  wrote:
> Convert to use driver model keyboard on Intel Crown Bay.
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/dts/crownbay.dts  | 1 +
>  include/configs/crownbay.h | 2 +-
>  2 files changed, 2 insertions(+), 1 deletion(-)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH v3] board_init: Change the logic to setup malloc_base

[Simon Glass]

On 12 November 2015 at 07:30, Fabio Estevam  wrote:
> Prior to commit 5ba534d247d418 ("arm: Switch 32-bit ARM to using generic
> global_data setup") we used to have assembly code that configured the
> malloc_base address.
>
> Since this commit we use the board_init_f_mem() function in C to setup
> malloc_base address.
>
> In board_init_f_mem() there was a deliberate choice to support only
> early malloc() or full malloc() in SPL, but not both.
>
> Adapt this logic to allow both to be used, one after the other, in SPL.
>
> This issue has been observed in a Congatec board, where we need to
> retrieve the manufacturing information from the SPI NOR (the SPI API
> calls malloc) prior to configuring the DRAM. In this case as malloc_base
> was not configured we always see malloc to fail.
>
> With this change we are able to use malloc in SPL prior to DRAM gets
> initialized.
>
> Also update the CONFIG_SYS_SPL_MALLOC_START entry in the README file.
>
> Signed-off-by: Fabio Estevam 
> ---
> Changes since v2:
> - Combine two patches into one (Albert)
>
>  README   | 3 +++
>  common/init/board_init.c | 3 +--
>  2 files changed, 4 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass 

Thanks!

- Simon
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Re: [U-Boot] [PATCH 1/6] input: Save keyboard's LED state to correct place

[Simon Glass]

On 12 November 2015 at 06:33, Bin Meng  wrote:
> Currently keyboard's LED state is wrongly saved to config->leds in
> process_modifier(). It should really be config->flags.
>
> Signed-off-by: Bin Meng 
> ---
>
>  drivers/input/input.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH v3 00/12] dm: input: Move keyboard drivers to driver model

[Simon Glass]

Hi Bin,

On 12 November 2015 at 06:33, Bin Meng  wrote:
> Hi Simon,
>
> On Thu, Nov 12, 2015 at 11:56 AM, Bin Meng  wrote:
>> Hi Simon,
>>
>> On Thu, Nov 12, 2015 at 5:56 AM, Simon Glass  wrote:
>>> Hi Bin,
>>>
>>> On 11 November 2015 at 10:05, Simon Glass  wrote:
 This series adds a new uclass for keyboards and converts some drivers
 over to use it.

 This series includes some work to remove code duplication in the keyboard
 drivers by updating them to use the input library (input.c). This unifies
 the keycode decoding logic in one place. In order to do this some
 enhancements are needed to the input library and these are also included.

 The cros_ec and tegra_kbc drivers are converted to use driver model.

 The i8042 driver is converted also, after various tidy-ups. The driver has
 some strange interactions with the cfb_console driver. This is removed in
 this series which is possible because the only user is x86. Some i8042
 features have been dropped (the only deliberate one is the flashing cursor
 which does not seem to be used by any board).

 Also the i8042 driver currently has its own keycode-decoding logic. This
 series removes it in favour of the input library. Therefore testing of this
 new driver would be appreciated. So far I have only been able to test on
 link, which does not have a full keyboard. Also, while German keyboard
 support is implemented, I am unable to test that either.

 These changes can be considered the first step towards moving stdio to
 driver model. For that to be useful we need to convert LCD and video also.

 Note: This series is missing the code to call the update_leds() method when
 the LEDs change. This needs to be added to keyboard_tstc() and
 keyboard_getc(). If someone is able to test this I can send a patch for 
 that
 also.

 This series is available at u-boot-dm branch input-working.
>>>
>>> Can you please try testing this for your crash when pressing 'caps
>>> lock'? I'm not sure what is going on there and I don't have hardware
>>> to test with.
>>
>> I've tested the v3 patch. Looks the behavior is the same as v2. Note
>> the crash when pressing 'caps lock' only happens in v1. Starting from
>> v2, pressing 'caps lock' does not light the LED, and the characters
>> typed is still lower case. This is the same as the 'num lock' as I
>> reported before.
>>
>
> I've spent some time to debug this today, and have fixed all of these
> issues I reported so far. Please check my patch series @
> http://patchwork.ozlabs.org/patch/543339/

That's great! Thanks for all the testing and patches. It's really hard
to refactor code without hardware to test - lucky that you have it.

Regards,
Simon
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Re: [U-Boot] [PATCH 6/6] x86: qemu: Convert to use driver model keyboard

[Simon Glass]

On 12 November 2015 at 06:33, Bin Meng  wrote:
> Convert to use driver model keyboard on QEMU.
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/dts/qemu-x86_i440fx.dts | 1 +
>  arch/x86/dts/qemu-x86_q35.dts| 1 +
>  include/configs/qemu-x86.h   | 2 +-
>  3 files changed, 3 insertions(+), 1 deletion(-)

Acked-by: Simon Glass 
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[U-Boot] [PATCH] arc: add stubs for map_physmem() and unmap_physmem()

[Alexey Brodkin]

Up until now there was no need in those stubs.

But since following commit compilation of U-Boot on ARC is broken:
>8--
commit 7861204c9af7fec1ea9b41541c272516235a6c93
Author: Stephen Warren 
Date:   Sat Oct 3 13:56:46 2015 -0600

itest: make memory access work under sandbox

itest accesses memory, and hence must map/unmap it. Without doing so, it
accesses invalid addresses and crashes.

Signed-off-by: Stephen Warren 
Reviewed-by: Simon Glass 
>8--

That's because CMD_ITEST is enabled by default in common/Kconfig and now
map_physmem()/unmap_physmem() is used there.

So this patch adds missing stubs for ARC.

Signed-off-by: Alexey Brodkin 
Cc: Stephen Warren 
Cc: Simon Glass 
---
 arch/arc/include/asm/io.h | 24 
 1 file changed, 24 insertions(+)

diff --git a/arch/arc/include/asm/io.h b/arch/arc/include/asm/io.h
index 24b7337..281682c 100644
--- a/arch/arc/include/asm/io.h
+++ b/arch/arc/include/asm/io.h
@@ -10,6 +10,30 @@
 #include 
 #include 
 
+/*
+ * Given a physical address and a length, return a virtual address
+ * that can be used to access the memory range with the caching
+ * properties specified by "flags".
+ */
+#define MAP_NOCACHE(0)
+#define MAP_WRCOMBINE  (0)
+#define MAP_WRBACK (0)
+#define MAP_WRTHROUGH  (0)
+
+static inline void *
+map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
+{
+   return (void *)((unsigned long)paddr);
+}
+
+/*
+ * Take down a mapping set up by map_physmem().
+ */
+static inline void unmap_physmem(void *vaddr, unsigned long flags)
+{
+
+}
+
 static inline void sync(void)
 {
/* Not yet implemented */
-- 
2.4.3

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Re: [U-Boot] [PATCH] arc: add stubs for map_physmem() and unmap_physmem()

[Stephen Warren]

On 11/12/2015 02:56 PM, Alexey Brodkin wrote:

Up until now there was no need in those stubs.

But since following commit compilation of U-Boot on ARC is broken:
commit 7861204c9af7fec1ea9b41541c272516235a6c93
 itest: make memory access work under sandbox


...

That's because CMD_ITEST is enabled by default in common/Kconfig and now
map_physmem()/unmap_physmem() is used there.

So this patch adds missing stubs for ARC.


This looks OK, but rather than cut/pasting this exact same code yet 
another time, why not create e.g. include/io-base.h that contains this, 
and share it amongst all architectures?

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Re: [U-Boot] [U-Boot,v1,18/18] i2c: soft_i2c: Fix bus indizes

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:39AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> Since busses are sorted in alphabetical order, introducing more
> than nine busses led to unexpected behaviour.
> 
> Signed-off-by: Dirk Eibach 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,v1,11/18] mpc83xx: Add strider board

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:32AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> The gdsys strider board is based on a Freescale MPC8308 SOC.
> It boots from NOR-Flash, kernel and rootfs are stored on
> SD-Card.
> 
> On board peripherals include:
> - 1x 10/100 Mbit/s Ethernet (optional)
> - Lattice ECP3 FPGA connected via eLBC
> 
> Signed-off-by: Dirk Eibach 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v1, 09/18] iocon: reset FPGAs in last_stage_init()

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:30AM +0100, Dirk Eibach wrote:

> From: Reinhard Pfau 
> 
> - Reset FPGAs in last_stage_init()
> 
> Signed-off-by: Reinhard Pfau 
> Signed-off-by: Dirk Eibach 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,v1,10/18] hrcon: Remove CH7301 configuration

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:31AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> hrcon has no CH7301 DVI-transmitter.
> Probably not removed when copying from iocon.
> 
> Signed-off-by: Dirk Eibach 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v1, 12/18] hrcon: Use generic ioep-fpga support

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:33AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> The strider platform moved some generic code into ioep-fpga.c.
> Make use of that on hrcon platform.
> 
> Signed-off-by: Dirk Eibach 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,v1,16/18] board: gdsys: Add osdsize command

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:37AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> osdsize adjusts the gdsys IHS osd dimensions in characters.
> 
> Signed-off-by: Dirk Eibach 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,v1,15/18] hrcon: Add fan controllers

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:36AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> Signed-off-by: Dirk Eibach 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,v1,13/18] hrcon: Fix videoboard i2c setup

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:34AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> - i2c addresses for the videoboard port expanders were
>   wrong.
> - the fpga reset signal was not initialized.
> 
> Signed-off-by: Dirk Eibach 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v1, 14/18] hrcon: Add support for the DH variant

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:35AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> hrcon DH(dual head) has two video outputs per FPGA.
> 
> Signed-off-by: Dirk Eibach 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v1, 17/18] board: gdsys: Enable osd on output only

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:38AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> Signed-off-by: Dirk Eibach 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v1, 09/18] iocon: reset FPGAs in last_stage_init()

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:30AM +0100, Dirk Eibach wrote:

> From: Reinhard Pfau 
> 
> - Reset FPGAs in last_stage_init()
> 
> Signed-off-by: Reinhard Pfau 
> Signed-off-by: Dirk Eibach 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,v1,03/18] i2c: ihs_i2c: Fix hold_bus control

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:24AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> Bus has to be held for repeated start regardless of
> read/write access.
> 
> Signed-off-by: Dirk Eibach 
> Acked-by: Heiko Schocher 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,v1,01/18] i2c: ihs_i2c: Dual channel support

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:22AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> Support two i2c masters per FPGA.
> 
> Signed-off-by: Dirk Eibach 
> Acked-by: Heiko Schocher 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 3/5] driver: usb: Fix pointer conversion warnings for hikey

[Tom Rini]

On Sun, Oct 25, 2015 at 01:18:41PM +0530, Prabhakar Kushwaha wrote:

> Fix below compilation warings happening for hikey_defconfig
> 
> drivers/usb/eth/smsc95xx.c:698:56: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>   debug("** %s(), len %d, buf %#x\n", __func__, length, (int)msg);
> ^
> include/common.h:109:26: note: in definition of macro ‘debug_cond’
> printf(pr_fmt(fmt), ##args); \
>   ^
> drivers/usb/eth/smsc95xx.c:698:2: note: in expansion of macro ‘debug’
>   debug("** %s(), len %d, buf %#x\n", __func__, length, (int)msg);
>   ^
> drivers/usb/eth/smsc95xx.c:718:2: warning: format ‘%u’ expects argument of
> type ‘unsigned int’, but argument 2 has type ‘long unsigned int’ [-Wformat=]
>   debug("Tx: len = %u, actual = %u, err = %d\n",
>   ^
> drivers/usb/eth/smsc95xx.c: In function ‘smsc95xx_recv’:
> drivers/usb/eth/smsc95xx.c:802:19: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>cur_buf_align = (int)buf_ptr - (int)recv_buf;
>^
> drivers/usb/eth/smsc95xx.c:802:34: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>cur_buf_align = (int)buf_ptr - (int)recv_buf;
> 
> Signed-off-by: Prabhakar Kushwaha 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 4/5] driver: net: Fix pointer conversion warnings for xilinx_zynqmp_ep

[Tom Rini]

On Sun, Oct 25, 2015 at 01:18:54PM +0530, Prabhakar Kushwaha wrote:

> Fix below warnings happening for xilinx_zynqmp_ep_defconfig
> 
> drivers/net/zynq_gem.c: In function ‘zynq_gem_init’:
> drivers/net/zynq_gem.c:330:7: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>   ((u32)(priv->rxbuffers) +
>^
> In file included from drivers/net/zynq_gem.c:19:0:
> drivers/net/zynq_gem.c:336:10: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>writel((u32)priv->rx_bd, >rxqbase);
>   ^
> ./arch/arm/include/asm/io.h:146:34: note: in definition of macro ‘writel’
>  #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
>   ^
> drivers/net/zynq_gem.c: In function ‘zynq_gem_send’:
> drivers/net/zynq_gem.c:399:9: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>   writel((u32)priv->tx_bd, >txqbase);
>  ^
> ./arch/arm/include/asm/io.h:146:34: note: in definition of macro ‘writel’
>  #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
>   ^
> drivers/net/zynq_gem.c:404:22: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>   priv->tx_bd->addr = (u32)ptr;
>   ^
> drivers/net/zynq_gem.c:409:9: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>   addr = (u32) ptr;
>  ^
> drivers/net/zynq_gem.c:414:9: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>   addr = (u32)priv->rxbuffers;
>  ^
> drivers/net/zynq_gem.c: In function ‘zynq_gem_recv’:
> drivers/net/zynq_gem.c:454:31: warning: cast to pointer from integer
> of different size [-Wint-to-pointer-cast]
>net_process_received_packet((u8 *)addr, frame_len);
>^
> drivers/net/zynq_gem.c: In function ‘zynq_gem_initialize’:
> drivers/net/zynq_gem.c:533:35: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>   priv->rx_bd = (struct emac_bd *)((u32)bd_space + BD_SEPRN_SPACE);
>^
> drivers/net/zynq_gem.c:533:16: warning: cast to pointer from integer
> of different size [-Wint-to-pointer-cast]
>   priv->rx_bd = (struct emac_bd *)((u32)bd_space + BD_SEPRN_SPACE);
> 
> Signed-off-by: Prabhakar Kushwaha 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v1, 02/18] i2c: ihs_i2c: Use macro bestpractices

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:23AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> Reinhard Pfau complained that macros in ihs_i2c do not follow best practices.
> 
> Signed-off-by: Dirk Eibach 
> Acked-by: Heiko Schocher 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v1, 06/18] board: gdsys: Consider DP501 limits on link training

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:27AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> DP501 only supports DP 1.1a.
> Limit settings for link bandwidth and lane count to
> values allowed by DP 1.1a.
> 
> Signed-off-by: Dirk Eibach 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,v1,07/18] dlvision-10g: Support displayport

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:28AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> Support dlvision-10g hardware with displayport output.
> 
> Signed-off-by: Dirk Eibach 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v1, 04/18] board: gdsys: Configure DP501 SPDIF input

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:25AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> Signed-off-by: Dirk Eibach 
> Reviewed-by: Heiko Schocher 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v1, 08/18] controlcenterd: Disable sideband clocks

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:29AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> Signed-off-by: Dirk Eibach 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v1, 05/18] board: gdsys: Increase DP501 I2C retry interval

[Tom Rini]

On Wed, Oct 28, 2015 at 11:46:26AM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> With Club 3D dual link adapter there are AUX-channel timeouts
> when EDID is read. Increasing retry interval time to max (400us)
> fixes this.
> 
> Signed-off-by: Dirk Eibach 
> Reviewed-by: Heiko Schocher 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH v1] armv8: fsl-layerscale: Rewrite reserving memory for MC and debug server

[York Sun]

Yes, pram is used to reserve small memory from the top of u-boot memory, not 
necessarily the top of total memory. For example, a 32-bit u-boot with large 
memory.

York


Sent on a Sprint Samsung Galaxy Note® II


 Original message 
From: Joakim Tjernlund
Date:11/12/2015 2:55 PM (GMT-08:00)
To: Sun York-R58495 , u-boot@lists.denx.de
Cc: Wood Scott-B07421 , Yoder Stuart-B08248 , tred...@nvidia.com, 
swar...@nvidia.com, tr...@konsulko.com, abrod...@synopsys.com, Gong 
Qianyu-B52263 , Rivera Jose-B46482 , joe.hershber...@ni.com, Hou 
Zhiqiang-B48286 , ang...@sysam.it
Subject: Re: [U-Boot] [PATCH v1] armv8: fsl-layerscale: Rewrite reserving 
memory for MC and debug server

On Thu, 2015-11-12 at 14:20 -0800, York Sun wrote:
> Introduce a new function to calculate reserved memory to replace macro
> CONFIG_SYS_MEM_TOP_HIDE for more flexibility. Legacy use of this macro is
> still supported. MC and debug server are not board-specific. Move the
> reservation function to SoC file. Reduce debug server memory by 2MB to
> make room for secure memory.

I would make sure "pram" is first to reserve memory, is it?

 Jocke

>
> Signed-off-by: York Sun 
>
> ---
>
>  README  |6 +++---
>  arch/arm/cpu/armv8/fsl-layerscape/cpu.c |   18 ++
>  board/freescale/ls2085a/ls2085a.c   |   17 -
>  board/freescale/ls2085aqds/ls2085aqds.c |   17 -
>  board/freescale/ls2085ardb/ls2085ardb.c |   17 -
>  common/board_f.c|   14 +++---
>  include/configs/ls2085a_common.h|5 ++---
>  7 files changed, 34 insertions(+), 60 deletions(-)
>
> diff --git a/README b/README
> index 61cbc82..390ee10 100644
> --- a/README
> +++ b/README
> @@ -3889,7 +3889,7 @@ Configuration Settings:
>   the RAM base is not zero, or RAM is divided into banks,
>   this variable needs to be recalcuated to get the address.
>
> -- CONFIG_SYS_MEM_TOP_HIDE (PPC only):
> +- CONFIG_SYS_MEM_TOP_HIDE:
>   If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config 
> header,
>   this specified memory area will get subtracted from the top
>   (end) of RAM and won't get "touched" at all by U-Boot. By
> @@ -5068,8 +5068,8 @@ This firmware often needs to be loaded during U-Boot 
> booting.
>  - CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE
>   Define minimum DDR size required for debug server image
>
> -- CONFIG_SYS_MEM_TOP_HIDE_MIN
> - Define minimum DDR size to be hided from top of the DDR memory
> +- CONFIG_SYS_MC_RESERV_MEM_ALIGN
> + Define alignment of reserved memory MC requires
>
>  Reproducible builds
>  ---
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
> b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> index cda8d9b..72cb9d9 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> @@ -663,3 +663,21 @@ void reset_cpu(ulong addr)
>   val |= 0x02;
>   scfg_out32(rstcr, val);
>  }
> +
> +unsigned long board_reserve_ram_top(unsigned long ram_size)
> +{
> + unsigned long ram_top = ram_size;
> +
> +/* Carve the Debug Server private DRAM block from the end of DRAM */
> +#ifdef CONFIG_FSL_DEBUG_SERVER
> + ram_top -= debug_server_get_dram_block_size();
> +#endif
> +
> +/* Carve the MC private DRAM block from the end of DRAM */
> +#ifdef CONFIG_FSL_MC_ENET
> + ram_top -= mc_get_dram_block_size();
> + ram_top &= ~(CONFIG_SYS_MC_RESERV_MEM_ALIGN - 1);
> +#endif
> +
> + return ram_size - ram_top;
> +}
> diff --git a/board/freescale/ls2085a/ls2085a.c 
> b/board/freescale/ls2085a/ls2085a.c
> index 27481e2..6f4c3d4 100644
> --- a/board/freescale/ls2085a/ls2085a.c
> +++ b/board/freescale/ls2085a/ls2085a.c
> @@ -66,23 +66,6 @@ int arch_misc_init(void)
>  }
>  #endif
>
> -unsigned long get_dram_size_to_hide(void)
> -{
> - unsigned long dram_to_hide = 0;
> -
> -/* Carve the Debug Server private DRAM block from the end of DRAM */
> -#ifdef CONFIG_FSL_DEBUG_SERVER
> - dram_to_hide += debug_server_get_dram_block_size();
> -#endif
> -
> -/* Carve the MC private DRAM block from the end of DRAM */
> -#ifdef CONFIG_FSL_MC_ENET
> - dram_to_hide += mc_get_dram_block_size();
> -#endif
> -
> - return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN);
> -}
> -
>  int board_eth_init(bd_t *bis)
>  {
>   int error = 0;
> diff --git a/board/freescale/ls2085aqds/ls2085aqds.c 
> b/board/freescale/ls2085aqds/ls2085aqds.c
> index b02d6e8..8898cc3 100644
> --- a/board/freescale/ls2085aqds/ls2085aqds.c
> +++ b/board/freescale/ls2085aqds/ls2085aqds.c
> @@ -251,23 +251,6 @@ int arch_misc_init(void)
>  }
>  #endif
>
> -unsigned long get_dram_size_to_hide(void)
> -{
> - unsigned long dram_to_hide = 0;
> -
> -/* Carve the Debug Server private DRAM block from the end of DRAM */
> -#ifdef CONFIG_FSL_DEBUG_SERVER
> - dram_to_hide += 

Re: [U-Boot] [U-Boot,v2,04/14] sparse: Simplify multiple logic

[Tom Rini]

On Thu, Oct 15, 2015 at 02:34:12PM +0200, Maxime Ripard wrote:

> To check the alignment of the image blocks to the storage blocks, the
> current code uses a convoluted syntax, while a simple mod also does the
> work.
> 
> Signed-off-by: Maxime Ripard 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,v2,09/14] fastboot: Implement NAND backend

[Tom Rini]

On Thu, Oct 15, 2015 at 02:34:17PM +0200, Maxime Ripard wrote:

> So far the fastboot code was only supporting MMC-backed devices for its
> flashing operations (flash and erase).
> 
> Add a storage backend for NAND-backed devices.
> 
> Signed-off-by: Maxime Ripard 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v2, 08/14] sparse: Implement several chunks flashing

[Tom Rini]

On Thu, Oct 15, 2015 at 02:34:16PM +0200, Maxime Ripard wrote:

> The fastboot client will split the sparse images into several chunks if the
> image that it tries to flash is bigger than what the device can handle.
> 
> In such a case, the bootloader is supposed to retain the last offset to
> which it wrote to, so that it can resume the writes at the right offset
> when flashing the next chunk.
> 
> Retain the last offset we used, and use the session ID to know if we need
> it or not.
> 
> Signed-off-by: Maxime Ripard 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v2, 10/14] fastboot: nand: Add pre erase and write hooks

[Tom Rini]

On Thu, Oct 15, 2015 at 02:34:18PM +0200, Maxime Ripard wrote:

> Some devices might need to do some per-partition initialization
> (ECC/Randomizer settings change for example) before actually accessing it.
> 
> Add some hooks before the write and erase operations to let the boards
> define what they need to do if needed.
> 
> Signed-off-by: Maxime Ripard 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v2, 05/14] fastboot: Move fastboot response functions to fastboot core

[Tom Rini]

On Thu, Oct 15, 2015 at 02:34:13PM +0200, Maxime Ripard wrote:

> The functions and a few define to generate a fastboot message to be sent
> back to the host were so far duplicated among the users.
> 
> Move them all to a common place.
> 
> Signed-off-by: Maxime Ripard 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v2, 03/14] sparse: Refactor chunk parsing function

[Tom Rini]

On Thu, Oct 15, 2015 at 02:34:11PM +0200, Maxime Ripard wrote:

> The chunk parsing code was duplicating a lot of code among the various
> chunk types, while all of them could be covered by generic and simple
> functions.
> 
> Refactor the current code to reuse as much code as possible and hopefully
> make the chunk parsing loop more readable and concise.
> 
> Signed-off-by: Maxime Ripard 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v2, 06/14] sparse: Implement storage abstraction

[Tom Rini]

On Thu, Oct 15, 2015 at 02:34:14PM +0200, Maxime Ripard wrote:

> The current sparse image parser relies heavily on the MMC layer, and
> doesn't allow any other kind of storage medium to be used.
> 
> Rework the parser to support any kind of storage medium, as long as there
> is an implementation for it.
> 
> Signed-off-by: Maxime Ripard 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v2, 07/14] fastboot: Implement flashing session counter

[Tom Rini]

On Thu, Oct 15, 2015 at 02:34:15PM +0200, Maxime Ripard wrote:

> The fastboot flash command that writes an image to a partition works in
> several steps:
> 
> 1 - Retrieve the maximum size the device can download through the
> "max-download-size" variable
> 
> 2 - Retrieve the partition type through the "partition-type:%s" variable,
> that indicates whether or not the partition needs to be erased (even
> though the fastboot client has minimal support for that)
> 
> 3a - If the image is smaller than what the device can handle, send the image
>  and flash it.
> 
> 3b - If the image is larger than what the device can handle, create a
>  sparse image, and split it in several chunks that would fit. Send the
>  chunk, flash it, repeat until we have no more data to send.
> 
> However, in the 3b case, the subsequent transfers have no particular
> identifiers, the protocol just assumes that you would resume the writes
> where you left it.
> 
> While doing so works well, it also means that flashing two subsequent
> images on the same partition (for example because the user made a mistake)
> would not work withouth flashing another partition or rebooting the board,
> which is not really intuitive.
> 
> Since we have always the same pattern, we can however maintain a counter
> that will be reset every time the client will retrieve max-download-size,
> and incremented after each buffer will be flashed, that will allow us to
> tell whether we should simply resume the flashing where we were, or start
> back at the beginning of the partition.
> 
> Signed-off-by: Maxime Ripard 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,v2,11/14] sparse: Rename the file and header

[Tom Rini]

On Thu, Oct 15, 2015 at 02:34:19PM +0200, Maxime Ripard wrote:

> The Android sparse image format is currently supported through a file
> called aboot, which isn't really such a great name, since the sparse image
> format is only used for transferring data with fastboot.
> 
> Rename the file and header to a file called "sparse", which also makes it
> consistent with the header defining the image structures.
> 
> Signed-off-by: Maxime Ripard 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v2] am43xx_evm: Add DFU support for qspi flash

[Tom Rini]

On Thu, Oct 22, 2015 at 11:30:53AM +0530, Vignesh R wrote:

> This adds support to update firmware on qspi flash present on
> am437x-sk-evm and am43xx-epos-evm via DFU.
> 
> On device:
> => setenv dfu_alt_info ${dfu_alt_info_qspi}
> => dfu 0 sf 0:0
> 
> On host:
> $ sudo dfu-util -l
> $ sudo dfu-util -D u-boot.bin -a u-boot.bin
> 
> Signed-off-by: Vignesh R 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v2] fdt_support: Check for bank size before updating memory node

[Tom Rini]

On Sat, Oct 24, 2015 at 04:52:24PM +0530, Lokesh Vutla wrote:

> In case if one of the bank that is passed is of size zero, then u-boot
> will be updating memory node with a bank of size zero. There is no need
> to update memory node if size is zero, so check for bank size before
> updating.
> 
> Reviewed-by: Tom Rini 
> Signed-off-by: Lokesh Vutla 
> Acked-by: Simon Glass 

So, I thought about this more, and looked at device trees, more, and
concluded, we're stuck with the interface we have.  Today there's still
many boards (such as the whole Beaglebone family!) that are setting
incorrect sizes in the DTS but being correctly fixed up.  We'll need to
continue with the other tricks that can be done to pass in more memory
in the memory node.

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Re: [U-Boot] block: ahci: Remove dead code

[Tom Rini]

On Sun, Nov 01, 2015 at 01:18:27PM -0200, Fabio Estevam wrote:

> From: Fabio Estevam 
> 
> CONFIG_AHCI_SETFEATURES_XFER is not selected by any user, so delete
> the dead code.
> 
> Signed-off-by: Fabio Estevam 
> Reviewed-by: Bin Meng 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,V2] common: Simplify get_clocks() #ifdef

[Tom Rini]

On Fri, Oct 30, 2015 at 05:30:02PM +0800, Peng Fan wrote:

> get_clocks is wrapped by CONFIG_FSL_CLK and CONFIG_M68K in seperate
> piece code. They can be merged into one snippet.
> 
> Signed-off-by: Peng Fan 
> Cc: Tom Rini 
> Cc: Simon Glass 
> Cc: Bin Meng 
> Cc: Alexey Brodkin 
> Cc: "ang...@sysam.it" 
> Cc: Daniel Schwierzeck 
> Cc: Stephen Warren 
> Cc: "Andreas Bießmann" 
> Reviewed-by: Simon Glass 
> Acked-by: Angelo Dureghello 

Applied to u-boot/master, thanks!

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Re: [U-Boot] i2c: Fix pca953x endianess issue

[Tom Rini]

On Thu, Oct 29, 2015 at 01:51:27PM +0100, Dirk Eibach wrote:

> From: Dirk Eibach 
> 
> By reading 2 consecutive bytes from i2c to an u16 value
> we have an endianess issue.
> 
> Signed-off-by: Dirk Eibach 

Applied to u-boot/master, thanks!

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Re: [U-Boot] configs: Use config_distro_defaults.h in ti_armv7_common.h

[Tom Rini]

On Thu, Oct 29, 2015 at 09:54:15PM +0300, matwey.korni...@gmail.com wrote:

> CONFIG_BOOTDELAY is defined in config_distro_defaults.h
> 
> Signed-off-by: Matwey V. Kornilov 

Applied to u-boot/master, thanks!

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Re: [U-Boot] pengwyn: nand and ethernet fixes

[Tom Rini]

On Mon, Nov 02, 2015 at 06:50:23PM +0100, Vincent BENOIT wrote:

> -> Add National instrument ethernet transceiver configuration used (DP83848)
> -> Change cpsw slave phy address
> -> modify nand configuration to use the correct ECC and correct nand features

Applied to u-boot/master, thanks!

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Re: [U-Boot] Fix trini email in the get_maintainer.pl script

[Tom Rini]

On Wed, Nov 04, 2015 at 03:55:27PM -0600, Andy Fleming wrote:

> Looks like one spot got missed. Probably due to the backslash.
> 
> Signed-off-by: Andy Fleming 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v3] board_init: Change the logic to setup malloc_base

[Tom Rini]

On Thu, Nov 12, 2015 at 12:30:19PM -0200, Fabio Estevam wrote:

> Prior to commit 5ba534d247d418 ("arm: Switch 32-bit ARM to using generic
> global_data setup") we used to have assembly code that configured the
> malloc_base address.
> 
> Since this commit we use the board_init_f_mem() function in C to setup
> malloc_base address.
> 
> In board_init_f_mem() there was a deliberate choice to support only 
> early malloc() or full malloc() in SPL, but not both. 
> 
> Adapt this logic to allow both to be used, one after the other, in SPL.
> 
> This issue has been observed in a Congatec board, where we need to
> retrieve the manufacturing information from the SPI NOR (the SPI API 
> calls malloc) prior to configuring the DRAM. In this case as malloc_base
> was not configured we always see malloc to fail.
> 
> With this change we are able to use malloc in SPL prior to DRAM gets 
> initialized.
> 
> Also update the CONFIG_SYS_SPL_MALLOC_START entry in the README file.
> 
> Signed-off-by: Fabio Estevam 
> Reviewed-by: Simon Glass 

Applied to u-boot/master, thanks!

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Re: [U-Boot] spl: Add support for CONFIG_OF_EMBED=y

[Tom Rini]

On Mon, Nov 09, 2015 at 10:45:07AM +0100, Michal Simek wrote:

> CONFIG_OF_EMBED=y is the option which is here only for testing purpose
> and shouldn't be enabled by default as is describe at:
> "dts: Add a comment about CONFIG_OF_EMBED being for local use"
> (sha1: 3d3f60cb7a6bb6c338e00a9769fa918a8536096c)
> 
> But still enabling this option locally shouldn't end up with compilation
> error when you build SPL. This patch fix it.
> 
> Compilation error:
> lib/built-in.o: In function `fdtdec_setup':
> /mnt/disk/u-boot/lib/fdtdec.c:1246: undefined reference to
> `__dtb_dt_begin'
> 
> Signed-off-by: Michal Simek 
> Reported-by: Tom Rini 
> Reviewed-by: Tom Rini 
> Reviewed-by: Simon Glass 

Applied to u-boot/master, thanks!

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Re: [U-Boot] openrisc: updating build tools naming convention

[Tom Rini]

On Sun, Nov 08, 2015 at 02:37:15PM +, Guillaume REMBERT wrote:

> Dear u-boot community,
> 
> I just made a small change on the openrisc-generic platform
> configuration to take in account the new naming convention (or1k instead
> of or32, so the build process gets fine).
> 
> Could you take care to review and approve the following patch, please?
> 
> Kind regards,
> 
> diff --git a/arch/openrisc/config.mk b/arch/openrisc/config.mk
> index cd95f24..bfdb71f 100644

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH v2 09/16] arm: dts: dra7: add qspi register maps for memory map and control module

[Tom Rini]

On Thu, Nov 12, 2015 at 02:33:48PM +0530, Mugunthan V N wrote:
> On Sunday 08 November 2015 07:01 PM, Tom Rini wrote:
> > On Wed, Nov 04, 2015 at 01:46:17PM +0530, Mugunthan V N wrote:
> > 
> >> Add qspi memory map and control module register maps to device tree.
> >>
> >> Signed-off-by: Mugunthan V N 
> >> Reviewed-by: Simon Glass 
> >> ---
> >>  arch/arm/dts/dra7.dtsi | 4 ++--
> >>  1 file changed, 2 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/arch/arm/dts/dra7.dtsi b/arch/arm/dts/dra7.dtsi
> >> index 3060e9a..7045c0f 100644
> >> --- a/arch/arm/dts/dra7.dtsi
> >> +++ b/arch/arm/dts/dra7.dtsi
> >> @@ -1104,8 +1104,8 @@
> >>  
> >>qspi: qspi@4b30 {
> >>compatible = "ti,dra7xxx-qspi";
> >> -  reg = <0x4b30 0x100>;
> >> -  reg-names = "qspi_base";
> >> +  reg = <0x4b30 0x100>, <0x5c00 0x400>, 
> >> <0x4a002558 0x4>;
> >> +  reg-names = "qspi_base", "qspi_mmap", "qspi_ctrlmod";
> >>#address-cells = <1>;
> >>#size-cells = <0>;
> >>ti,hwmods = "qspi";
> > 
> > Is this already upstream?
> > 
> 
> The documentation part is already upstreamed. Driver in kernel doesn't
> support mmap mode yet so dt changes are not present. Vignesh has
> submitted the mmap patches [1] and is under review.
> 
> [1]: https://lkml.org/lkml/2015/11/10/14

OK, and we can't even get the reg names part in the DT upstream until
then?

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Re: [U-Boot] [PATCH v2 10/16] drivers: mtd: spi: sf_probe: add compatible for spansion spi flash

[Tom Rini]

On Thu, Nov 12, 2015 at 02:42:41PM +0530, Mugunthan V N wrote:
> On Friday 06 November 2015 05:37 PM, Simon Glass wrote:
> > Hi Mugunthan,
> > 
> > On 4 November 2015 at 01:16, Mugunthan V N  wrote:
> >> Add compatible for spansion 32MiB spi flash s25fl256s1.
> >>
> >> Signed-off-by: Mugunthan V N 
> >> ---
> >>  drivers/mtd/spi/sf_probe.c | 1 +
> >>  1 file changed, 1 insertion(+)
> >>
> >> diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
> >> index c000c53..9cfa9b6 100644
> >> --- a/drivers/mtd/spi/sf_probe.c
> >> +++ b/drivers/mtd/spi/sf_probe.c
> >> @@ -502,6 +502,7 @@ static const struct dm_spi_flash_ops spi_flash_std_ops 
> >> = {
> >>
> >>  static const struct udevice_id spi_flash_std_ids[] = {
> >> { .compatible = "spi-flash" },
> >> +   { .compatible = "s25fl256s1" },
> > 
> > Instead, is it possible to add "spi-flash" to the list of compatible
> > strings in your device tree?
> > 
> 
> The compatible "spi-flash" is not defined/documented in kernel and
> compatible "s25fl256s1" is already documented and present in dt files.
> So it will be good to follow the same dt compatibles in U-Boot so that
> future merge/sync will be easier.

Agreed.

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Re: [U-Boot] [PATCH v2] Fix board init code to use a valid C runtime environment

[Albert ARIBAUD]

Hello Thomas,

On Thu, 12 Nov 2015 16:28:38 +0800, Thomas Chou 
wrote:
> Hi Albert,
> 
> On 2015年11月12日 15:17, Albert ARIBAUD wrote:
> >> 
> >> diff --git a/common/init/board_init.c b/common/init/board_init.c
> >> index 8839a4a..703e6d8 100644
> >> --- a/common/init/board_init.c
> >> +++ b/common/init/board_init.c
> >> @@ -46,6 +46,7 @@ void board_init_f_gd(struct global_data *gd_ptr)
> >>for (ptr = (int *)gd_ptr; ptr < (int *)(gd_ptr + 1); )
> >>*ptr++ = 0;
> >>#endif
> >> +  arch_setup_gd(gd_ptr);
> >
> > Correct -- in ARM (Thumb-1 at least) we cannot use arch_setup_gd() so
> > we set GD (in r9) from within arch/arm/lib/crt0.S, but for NIOS2 it
> > might (and apparently does) work. Where is GD stored in NIOS2?
> >
> 
> It is a register, r26 "gp".

Ok. In ARM it is r9, and gcc is prevented from ever using r9 by adding
the compiler option -ffixed-r9 to the compiler command lines. I guess
the same goes for NIOS2 -- maybe the NIOS2 gcc does not even need an
option, and always leaves gp/r26 alone.

> I have another question. Will it be simpler to have two calls instead of 
> four?
> 
> 1. get size of gd plus malloc.
> 
> 2. init gd and malloc.

I'd hinted at reducing the number of functions, but not the number of
calls, in my reply to Simon Glass in this thread, see here:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/240520

Your proposal might indeed help reducing the number of calls as well.

The first function would receive the current top of the stack and would
subtract the (aligned) gd then the (aligned) malloc arena size, and
return the new top-of-stack, which the C runtime code would enforce
in sp (or whatever the equivalent is in each arch) -- BUT it would not
write anything in that space as it would not be reserved at that point.

The second function would receive this new top-of-stack again, this
time as a base of the reserved space (or it could receive the old
top-of-stack and work its way downward) and would be able to safely
write whatever it wants inside this space.

The only caveat is, we need to be sure that the second function can
reconstruct the base addresses of all allocated chunks (gd, malloc,
whatever they'll be wanting to add later) just like the first function 
computed them (it could still be a single function called twice as I'd
suggested, BTW).

Thanks for the suggestion! I'll consider it for v3.

> Best regards,
> Thomas

Amicalement,
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Albert.
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