Re: [U-Boot] [PATCH 3/5] fsl: usb: make errata function common for PPC and ARM

>-Original Message- >From: Marek Vasut [mailto:ma...@denx.de] >Sent: Thursday, May 26, 2016 5:51 PM >To: Sriram Dash ; u-boot@lists.denx.de >Cc: york sun ; albert.u.b...@aribaud.net; Rajesh Bhagat > >Subject: Re: [PATCH 3/5]

Re: [U-Boot] [PATCH v2 03/11] ARM: PSCI: export common PSCI function declarations for C code

On Fri, May 27, 2016 at 12:49 AM, Marc Zyngier wrote: > On 26/05/16 15:01, Chen-Yu Tsai wrote: >> Some common PSCI functions are written in assembly, but it should be >> possible to use them from C code. >> >> Add function declarations for C code to consume. >> >>

Re: [U-Boot] [PATCH v2 11/11] sunxi: Add PSCI implementation in C

On Fri, May 27, 2016 at 1:19 AM, Marc Zyngier wrote: > On 26/05/16 15:01, Chen-Yu Tsai wrote: >> To make the PSCI backend more maintainable and easier to port to newer >> SoCs, rewrite the current PSCI implementation in C. >> >> Some inline assembly bits are required to

Re: [U-Boot] [PATCH v2 6/8] x86: quark: Generate ACPI FADT/MADT tables

On Thu, May 26, 2016 at 10:19 AM, Bin Meng wrote: > Generate quark platform-specific FADT/MADT tables. > > Signed-off-by: Bin Meng > Reviewed-by: Simon Glass > --- > > Changes in v2: None > > arch/x86/cpu/quark/Makefile | 1 + >

Re: [U-Boot] [PATCH v2 7/8] x86: galileo: Enable ACPI table generation

On Thu, May 26, 2016 at 10:19 AM, Bin Meng wrote: > Enable ACPI table generation by creating a DSDT table. > > Signed-off-by: Bin Meng > Reviewed-by: Simon Glass > --- > > Changes in v2: None > > board/intel/galileo/.gitignore

Re: [U-Boot] [PATCH v2 8/8] x86: baytrail: acpi: Fix I/O APIC ID in the MADT table

On Thu, May 26, 2016 at 10:19 AM, Bin Meng wrote: > So far this is hardcoded to 2, but it should really be read > from the I/O APIC register. > > Signed-off-by: Bin Meng > Reviewed-by: Simon Glass > > --- > > Changes in v2: None > >

Re: [U-Boot] [PATCH v2 5/8] x86: quark: Add platform ASL files

On Thu, May 26, 2016 at 10:19 AM, Bin Meng wrote: > This adds basic quark platform ASL files. They are intended to be > included in dsdt.asl of any board that is based on this platform. > > Signed-off-by: Bin Meng > Reviewed-by: Simon Glass

Re: [U-Boot] [PATCH v2 4/8] x86: quark: Prepare device.h for inclusion by ASL

On Thu, May 26, 2016 at 10:19 AM, Bin Meng wrote: > There is a device.h for quark on-chip devices, mainly for definitions > of internal PCI device numbers, but it's not ready to be included by > ASL files. Update to use hex numbers for PCI dev and __ASSEMBLY__. > >

Re: [U-Boot] [PATCH v2 2/8] x86: acpi: Make irqroute.asl common

On Thu, May 26, 2016 at 10:19 AM, Bin Meng wrote: > The irqroute.asl file is already common enough to all x86 platforms. > Platform ASL files need only provide a irqroute.h to describe how > internal PCI devices and PCIe downstream port devices' INTx pins are > routed to which

Re: [U-Boot] [PATCH v2 1/8] x86: acpi: Create a common irqlinks ASL file

On Thu, May 26, 2016 at 10:19 AM, Bin Meng wrote: > Move the irqlinks.asl file currently in the BayTrail directory to > a common place to be shared among all x86 platforms. As the PIRQ > routing control programming interface is common to Intel chipsets, > leave the common part

Re: [U-Boot] [PATCH v2 3/8] acpi: Pass -D__ASSEMBLY__ when compiling ASL files

On Thu, May 26, 2016 at 10:19 AM, Bin Meng wrote: > ASL files may include various U-Boot header files, but IASL compiler > does not understand any C language embedded in these header files. > To reuse those header files for ASL compiling, use __ASSEMBLY__ in > the header files

Re: [U-Boot] [PATCH v2 1/2] powerpc/mpc85xx: SECURE BOOT- Enable chain of trust in SPL

The build/config changes to common/drivers/lib are more general than the powerpc/mpc85xx board support and IMO should be represented in a separate patch. Check out: https://www.mail-archive.com/u-boot@lists.denx.de/msg211374.html for an example set of needed changes. I mentioned before that I'm

Re: [U-Boot] [PATCH] Lower USB_MAX_XFER_BLK to 32767 by default for trimslice

On 05/26/2016 10:55 PM, Nicolas Chauvet wrote: > I'm experiencing an issue when loading a generic distro initramfs > on trimslice-pro (with ssd using ehci) with the default value of > 65535 for USB_MAX_XFER_BLK > EHCI timed out on TD - token=0x80008d80 > > As adviced by Marek on IRC, using a

[U-Boot] [PATCH] board: ls2080ardb: qds: Fix compiling issue when FSL_MC_ENET not defined

U-Boot should continue to work without management complex (MC). Fix compiling errors and warnings. Signed-off-by: York Sun --- board/freescale/ls2080aqds/ls2080aqds.c |2 ++ board/freescale/ls2080ardb/ls2080ardb.c |6 ++ 2 files changed, 8 insertions(+) diff

[U-Boot] [PATCH] Lower USB_MAX_XFER_BLK to 32767 by default for trimslice

I'm experiencing an issue when loading a generic distro initramfs on trimslice-pro (with ssd using ehci) with the default value of 65535 for USB_MAX_XFER_BLK EHCI timed out on TD - token=0x80008d80 As adviced by Marek on IRC, using a lower value for USB_MAX_XFER_BLK allows to load the file

[U-Boot] [PATCH] drivers/ddr/fsl: Disabling data init if ECC is not enabled

If ECC is not enabled, data init can be disabled to speed up booting. Signed-off-by: York Sun --- drivers/ddr/fsl/options.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c index d0075ff..793d12a

[U-Boot] [PATCH] mips: jz47xx: Add Creator CI20 platform

From: Paul Burton Add support for the Creator CI20 platform based on the JZ4780 SoC. The DTS file comes from Linux 4.6 as of revision 78800558d104e003f9ae92e0107f1de39cf9de9f So far, there are still a few details which will have to be fixed once they are fleshed out in

[U-Boot] [PATCH 1/2] mips: jz47xx: Add JZ4780 SoC support

From: Paul Burton Add initial support for the Ingenic JZ47xx MIPS SoC. The DTSI file comes from Linux 4.6 as of revision 78800558d104e003f9ae92e0107f1de39cf9de9f Signed-off-by: Marek Vasut Cc: Daniel Schwierzeck Cc: Paul

[U-Boot] [PATCH 2/2] mips: jz47xx: Add minimal JZ MMC node

Add minimal JZ MMC node into the JZ4780 device tree. This piece is picked from the CI20 Linux repository. Signed-off-by: Marek Vasut Cc: Daniel Schwierzeck Cc: Paul Burton --- arch/mips/dts/jz4780.dtsi | 20

[U-Boot] [PATCH] mips: Add SPL header

From: Paul Burton Add header with SPL boot mode and type definitions. Signed-off-by: Marek Vasut Cc: Daniel Schwierzeck Cc: Paul Burton --- arch/mips/include/asm/spl.h | 35

[U-Boot] [PATCH] misc: Add JZ47xx efuse driver

From: Paul Burton Add driver for the efuse block in the JZ47xx SOC. Signed-off-by: Marek Vasut Cc: Daniel Schwierzeck Cc: Paul Burton --- drivers/misc/Kconfig| 6 +++ drivers/misc/Makefile

[U-Boot] [PATCH] gpio: Add JZ47xx GPIO driver

From: Paul Burton Add primitive GPIO controller driver for the JZ47xx SoC. Signed-off-by: Marek Vasut Cc: Daniel Schwierzeck Cc: Paul Burton --- drivers/gpio/Kconfig | 8 +

[U-Boot] [PATCH] mmc: Add JZ47xx SD/MMC controller driver

From: Paul Burton Add driver for the JZ47xx MSC controller. Signed-off-by: Marek Vasut Cc: Daniel Schwierzeck Cc: Paul Burton --- drivers/mmc/Kconfig | 6 + drivers/mmc/Makefile | 1 +

[U-Boot] [PATCH] mmc: Tinification of the mmc code

Add new configuration option CONFIG_MMC_TINY which strips away all memory allocation within the MMC code and code for handling multiple cards. This allows extremely space-constrained SPL code use the MMC framework. Signed-off-by: Marek Vasut Cc: Tom Rini Cc:

[U-Boot] [PATCH 3/3] serial: 16550: Add Ingenic JZ4780 support

Add compatibility string for the Ingenic JZ4780 SoC, the necessary UART enable bit into FCR and register shift. Neither are encoded in the DTS coming from Linux, so we need to support it this way. Signed-off-by: Marek Vasut Cc: Tom Rini Cc: Simon Glass

[U-Boot] [PATCH 2/3] serial: 16550: Add port type as driver data

Add driver data to each compatible string to identify the type of the port. Since all the ports in the driver are entirely compatible with 16550 for now, all are marked with PORT_NS16550. But, there are ports which have specific quirks, like the JZ4780 UART, which do not have any DT property to

[U-Boot] [PATCH 1/3] serial: 16550: Add getfcr accessor

Add function which allows fetching the default FCR register setting from platform data for DM , while retaining old behavior for non-DM by returning UART_FCRVAL. Signed-off-by: Marek Vasut Cc: Tom Rini Cc: Simon Glass ---

Re: [U-Boot] [PATCH] serial: 16550: Add JZ47xx support

On 05/26/2016 03:55 PM, Paul Burton wrote: > On Thu, May 26, 2016 at 02:05:07PM +0200, Marek Vasut wrote: >>> Interesting :) May I ask which platform/SoC you're working with? Have >>> you seen the (unfortunately currently out of tree) port we did for the >>> JZ4780-based Ci20? I recall the pain of

Re: [U-Boot] [PATCH v3 1/2] armv8: Support loading 32-bit OS in AArch32 execution state

On 26.05.16 10:41, Alison Wang wrote: > To support loading a 32-bit OS, the execution state will change from > AArch64 to AArch32 when jumping to kernel. > > The architecture information will be got through checking FIT > image, then U-Boot will load 32-bit OS or 64-bit OS automatically. > >

Re: [U-Boot] [PATCH] serial: 16550: Add JZ47xx support

Hi Marek, On 26 May 2016 at 11:35, Marek Vasut wrote: > On 05/26/2016 07:07 PM, Simon Glass wrote: >> Hi Marek, >> >> On 26 May 2016 at 10:53, Marek Vasut wrote: >>> On 05/26/2016 06:48 PM, Simon Glass wrote: Hi Marek, On 26 May 2016 at 10:47, Marek

Re: [U-Boot] [PATCH] serial: 16550: Add JZ47xx support

On 05/26/2016 07:07 PM, Simon Glass wrote: > Hi Marek, > > On 26 May 2016 at 10:53, Marek Vasut wrote: >> On 05/26/2016 06:48 PM, Simon Glass wrote: >>> Hi Marek, >>> >>> On 26 May 2016 at 10:47, Marek Vasut wrote: On 05/26/2016 06:44 PM, Simon Glass wrote:

Re: [U-Boot] [PATCH v2 11/11] sunxi: Add PSCI implementation in C

On 26/05/16 15:01, Chen-Yu Tsai wrote: > To make the PSCI backend more maintainable and easier to port to newer > SoCs, rewrite the current PSCI implementation in C. > > Some inline assembly bits are required to access coprocessor registers. > PSCI stack setup is the only part left completely in

Re: [U-Boot] [PATCH v3 1/2] armv8: Support loading 32-bit OS in AArch32 execution state

On 05/26/2016 01:51 AM, Alison Wang wrote: > To support loading a 32-bit OS, the execution state will change from > AArch64 to AArch32 when jumping to kernel. > > The architecture information will be got through checking FIT > image, then U-Boot will load 32-bit OS or 64-bit OS automatically. >

Re: [U-Boot] [PATCH] serial: 16550: Add JZ47xx support

Hi Marek, On 26 May 2016 at 10:53, Marek Vasut wrote: > On 05/26/2016 06:48 PM, Simon Glass wrote: >> Hi Marek, >> >> On 26 May 2016 at 10:47, Marek Vasut wrote: >>> On 05/26/2016 06:44 PM, Simon Glass wrote: Hi Marek, On 26 May 2016 at 10:34, Marek

Re: [U-Boot] [PATCH] serial: 16550: Add JZ47xx support

On 05/26/2016 06:48 PM, Simon Glass wrote: > Hi Marek, > > On 26 May 2016 at 10:47, Marek Vasut wrote: >> On 05/26/2016 06:44 PM, Simon Glass wrote: >>> Hi Marek, >>> >>> On 26 May 2016 at 10:34, Marek Vasut wrote: On 05/26/2016 03:29 PM, Simon Glass wrote:

Re: [U-Boot] [PATCH] serial: 16550: Add JZ47xx support

On 05/26/2016 06:48 PM, Simon Glass wrote: > Hi Marek, > > On 26 May 2016 at 10:47, Marek Vasut wrote: >> On 05/26/2016 06:44 PM, Simon Glass wrote: >>> Hi Marek, >>> >>> On 26 May 2016 at 10:34, Marek Vasut wrote: On 05/26/2016 03:29 PM, Simon Glass wrote:

Re: [U-Boot] [PATCH v2 04/11] ARM: allocate extra space for PSCI stack in secure section during link phase

On 26/05/16 15:01, Chen-Yu Tsai wrote: > The PSCI implementation expects at most 2 pages worth of space reserved > at the end of the secure section for its stacks. If PSCI is relocated to > secure SRAM, then everything is fine. If no secure SRAM is available, > and PSCI remains in main memory, the

Re: [U-Boot] [PATCH v2 03/11] ARM: PSCI: export common PSCI function declarations for C code

On 26/05/16 15:01, Chen-Yu Tsai wrote: > Some common PSCI functions are written in assembly, but it should be > possible to use them from C code. > > Add function declarations for C code to consume. > > Signed-off-by: Chen-Yu Tsai > --- > arch/arm/include/asm/psci.h | 8

Re: [U-Boot] [PATCH] serial: 16550: Add JZ47xx support

Hi Marek, On 26 May 2016 at 10:47, Marek Vasut wrote: > On 05/26/2016 06:44 PM, Simon Glass wrote: >> Hi Marek, >> >> On 26 May 2016 at 10:34, Marek Vasut wrote: >>> On 05/26/2016 03:29 PM, Simon Glass wrote: Hi Marek, On 25 May 2016 at 16:35, Marek

Re: [U-Boot] [PATCH 3/3] MIPS: Abstract cache op loops with a macro

On 05/26/2016 05:58 PM, Paul Burton wrote: > The various cache maintenance routines perform a number of loops over > cache lines. Rather than duplicate the code for performing such loops, > abstract it out into a new cache_loop macro which performs an arbitrary > number of cache ops on a range of

Re: [U-Boot] [PATCH 2/3] MIPS: Split I & D cache line size config

On 05/26/2016 05:58 PM, Paul Burton wrote: > Allow L1 Icache & L1 Dcache line size to be specified separately, since > there's no architectural mandate that they be the same. The > [id]cache_line_size functions are tidied up to take advantage of the > fact that the Kconfig entries are always

Re: [U-Boot] [PATCH] serial: 16550: Add JZ47xx support

On 05/26/2016 06:44 PM, Simon Glass wrote: > Hi Marek, > > On 26 May 2016 at 10:34, Marek Vasut wrote: >> On 05/26/2016 03:29 PM, Simon Glass wrote: >>> Hi Marek, >>> >>> On 25 May 2016 at 16:35, Marek Vasut wrote: On 05/26/2016 12:31 AM, Daniel Schwierzeck

Re: [U-Boot] [PATCH 1/3] MIPS: Move cache sizes to Kconfig

On 05/26/2016 05:58 PM, Paul Burton wrote: > Move details of the L1 cache line sizes & total sizes into Kconfig, > defaulting to 0 & using 0 to indicate that the value should be > autodetected. > > Signed-off-by: Paul Burton > --- > > arch/mips/Kconfig|

Re: [U-Boot] [PATCH] serial: 16550: Add JZ47xx support

Hi Marek, On 26 May 2016 at 10:34, Marek Vasut wrote: > On 05/26/2016 03:29 PM, Simon Glass wrote: >> Hi Marek, >> >> On 25 May 2016 at 16:35, Marek Vasut wrote: >>> On 05/26/2016 12:31 AM, Daniel Schwierzeck wrote: Am 26.05.2016 um 00:21 schrieb

Re: [U-Boot] [PATCH] serial: 16550: Add JZ47xx support

On 05/26/2016 03:29 PM, Simon Glass wrote: > Hi Marek, > > On 25 May 2016 at 16:35, Marek Vasut wrote: >> On 05/26/2016 12:31 AM, Daniel Schwierzeck wrote: >>> >>> >>> Am 26.05.2016 um 00:21 schrieb Marek Vasut: On 05/26/2016 12:17 AM, Daniel Schwierzeck wrote: > >

[U-Boot] [PATCH v2] net: pcnet: Fix init on big endian 64 bit

If dev->iobase is 64 bits wide then writing the value of the BAR into a pointer to iobase will not work on big endian systems, where the BAR value will incorrectly get written to the upper 32 bits of the 64 bit variable. Fix this by reading the BAR into a u32, matching the type expected by

[U-Boot] [PATCH RESEND] phy: atheros: add support for RGMII_ID, RGMII_TXID and RGMII_RXID

This adds support for internal delay on RX and TX on RGMII interface for the AR8035 phy. This is basically the same Linux driver do. Tested on a Zynq Zturn board (for which u-boot support in is my tree; first patch waiting ML approval) Signed-off-by: Andrea Merello

[U-Boot] [PATCH] net: pcnet: Fix init on big endian 64 bit

If dev->iobase is 64 bits wide then writing the value of the BAR into a pointer to iobase will not work on big endian systems, where the BAR value will incorrectly get written to the upper 32 bits of the 64 bit variable. Fix this by reading the BAR into a u32, matching the type expected by

[U-Boot] [PATCH 06/12] arm: lib: Fix uldivmod.S build on Thumb2

This assembler source won't build in Thumb2 mode, so fix it adding the necessary Thumb2 conditional macros from unified.h . This patch also defines CONFIG_THUMB2_KERNEL and CONFIG_ARM_ASM_UNIFIED which is necessary for correct build of these files both in ARM and Thumb mode, just like Linux does.

[U-Boot] [PATCH 05/12] arm: lib: Sync libgcc 32b division/modulo operations

Sync the libgcc 32bit division and modulo operations with Linux 4.4.6 , commit 0d1912303e54ed1b2a371be0bba51c384dd57326 . The functions in these four files are present in lib1funcs.S in Linux, so replace these files with lib1funcs.S from Linux. Since we do not support stack unwinding, instead of

[U-Boot] [PATCH 12/12] lib: Enable private libgcc by default

This patch decouples U-Boot binary from the toolchain on systems where private libgcc is available. Instead of pulling in functions provided by the libgcc from the toolchain, U-Boot will use it's own set of libgcc functions. These functions are usually imported from Linux kernel, which also uses

[U-Boot] [PATCH 10/12] arm: lib: Import Thumb1 functions

Import functions into lib1funcs.S which are required for Thumb1 build. These functions come from gcc 5.3.1 release. Signed-off-by: Marek Vasut Cc: Albert Aribaud Cc: Masahiro Yamada Cc: Simon Glass Cc:

[U-Boot] [PATCH 11/12] arm: lib: Split asm symbols into different .text subsections

Split each symbol in lib1funcs into different .text.foo section instead of placing all of them into plain .text . This allows the linker to collect and discard unused assembler symbols. Signed-off-by: Marek Vasut Cc: Albert Aribaud Cc: Masahiro Yamada

[U-Boot] [PATCH 09/12] arm: lib: import muldi3.S from Linux

Import muldi3.S from Linux 4.4.6 , commit 0d1912303e54ed1b2a371be0bba51c384dd57326 on arm32. This file implements __aeabi_lmul and it's alias __muldi3, which is needed when doing Thumb1 builds. This patch also defines CONFIG_THUMB2_KERNEL and CONFIG_ARM_ASM_UNIFIED which is necessary for correct

[U-Boot] [PATCH 08/12] arm: lib: Repair Warning: conditional infixes are deprecated in unified syntax

Fix the following warning when building for thumb2 target by tweaking the instruction syntax: Warning: conditional infixes are deprecated in unified syntax Signed-off-by: Marek Vasut Cc: Albert Aribaud Cc: Masahiro Yamada

[U-Boot] [PATCH 03/12] arm: lib: Drop underscore from private libgcc filenames

Drop the underscore from the filenames of files implementing libgcc routines. There is no functional change. This change is done to make sync with Linux kernel easier. Signed-off-by: Marek Vasut Cc: Albert Aribaud Cc: Masahiro Yamada

[U-Boot] [PATCH 04/12] arm: lib: Sync libgcc shift operations

Sync the libgcc shift operations with Linux kernel 4.4.6 , commit 0d1912303e54ed1b2a371be0bba51c384dd57326 . Syncing these three files is easy, as there is almost no change in them, except the addition of Thumb support. This patch also defines CONFIG_THUMB2_KERNEL and CONFIG_ARM_ASM_UNIFIED which

[U-Boot] [PATCH 02/12] arm: include: Import unified.h from Linux kernel

Import unified.h from Linux kernel 4.4.6 , commit 0d1912303e54ed1b2a371be0bba51c384dd57326 . This header file contains macros used in libgcc functions in Linux kernel on ARM and will be needed for the libgcc sync. Since unified.h defines the W(instr) macro, we must drop this from the macro from

[U-Boot] [PATCH 01/12] arm: config: Introduce CONFIG_SYS_ARM_ARCH

Introduce new helper Kconfig option, which is automatically set to the version of ARM architecture for which the U-Boot is built. This is useful when selecting tuning options in the libgcc imported from Linux kernel. Signed-off-by: Marek Vasut Cc: Albert Aribaud

[U-Boot] [PATCH 07/12] arm: lib: Import __do_div64 from Linux

Import __do_div64 from Linux 4.4.6 , commit 0d1912303e54ed1b2a371be0bba51c384dd57326 on arm32. This function is for some toolchains, which generate _udivmoddi4() for 64 bit division. Since we do not support stack unwinding, instead of importing the whole asm/unwind.h and all the baggage, this

[U-Boot] [PATCH 2/2] [RFC] ARM: omap: Enable tiny printf/sprintf on omap3_logic

Enable support for tiny printf and tiny sprintf on the omap3_logic board to trim down the SPL size. This makes the SPL actually build again and fit into the SRAM. Signed-off-by: Marek Vasut Cc: Simon Glass Cc: Tom Rini ---

[U-Boot] [PATCH 1/2] [RFC] lib: Implement support for tiny sprintf()

Tweak the tiny printf code to also provide similarly tiny sprintf() implementation. This is not comformant with POSIX for sure, but it keeps the size down while still behaving rather reasonably. Signed-off-by: Marek Vasut Cc: Simon Glass Cc: Tom Rini

[U-Boot] [PATCH 3/3] MIPS: Abstract cache op loops with a macro

The various cache maintenance routines perform a number of loops over cache lines. Rather than duplicate the code for performing such loops, abstract it out into a new cache_loop macro which performs an arbitrary number of cache ops on a range of addresses. This reduces duplication in the existing

[U-Boot] [PATCH 2/3] MIPS: Split I & D cache line size config

Allow L1 Icache & L1 Dcache line size to be specified separately, since there's no architectural mandate that they be the same. The [id]cache_line_size functions are tidied up to take advantage of the fact that the Kconfig entries are always present to simply check them for zero rather than

[U-Boot] [PATCH 0/3] MIPS cache cleanups

This short series cleans up the MIPS cache code in preparation for introducing support for L2 cache support. It's hopefully a useful standalone cleanup as-is, so I'll submit it now. Paul Burton (3): MIPS: Move cache sizes to Kconfig MIPS: Split I & D cache line size config MIPS: Abstract

[U-Boot] [PATCH 1/3] MIPS: Move cache sizes to Kconfig

Move details of the L1 cache line sizes & total sizes into Kconfig, defaulting to 0 & using 0 to indicate that the value should be autodetected. Signed-off-by: Paul Burton --- arch/mips/Kconfig| 12 arch/mips/lib/cache.c| 2 +-

Re: [U-Boot] [PATCH v2] MIPS: provide a default u-boot-spl.lds

On 05/26/2016 03:28 PM, Daniel Schwierzeck wrote: > Provide a default linker script for SPL binaries. Start address > and size of text section and BSS section are configurable. All > sections are arranged in a way that only relevant sections are > kept in the code section for maximum size

Re: [U-Boot] [GIT PULL] u-boot-mips/master

On Thu, May 26, 2016 at 02:13:38AM +0200, Daniel Schwierzeck wrote: > Hi Tom, > > here is another batch of MIPS updates. > > The following changes since commit fc15b9beed05dec6cc092c265042381a0eadb0e9: > > Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq (2016-05-24 > 13:42:03

Re: [U-Boot] arm64: fix arm64 Linux boot image header field sizes

On Wed, May 25, 2016 at 09:48:14AM +0100, Andre Przywara wrote: > The arm64 Linux boot protocol [1] describes the fields in the Image > header as being 64-bit little endian values. > So fix the endianess conversion to use 64-bit sized operations, for > both image_size and text_offset. > Also we

Re: [U-Boot] Please pull u-boot-mpc85xx master

On Tue, May 24, 2016 at 08:37:01PM -0700, York Sun wrote: > Tom, > > The following changes since commit aeaec0e682f45b9e0c62c522fafea353931f73ed: > > Prepare v2016.05 (2016-05-16 10:40:32 -0400) > > are available in the git repository at: > > git://git.denx.de/u-boot-mpc85xx.git master >

Re: [U-Boot] Please pull u-boot-sunxi master

On Wed, May 25, 2016 at 06:15:39PM +0200, Hans de Goede wrote: > Hi Tom, > > Here is the first sunxi pull-req for v2016.07, it > contains a few improvements and fixes, nothing special. > > Note the big diffstat is due to cleaning up defconfig's > be enabling various CMD options by default on

Re: [U-Boot] [PATCH] ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz

On Wed, May 25, 2016 at 01:18:43PM +0530, Vignesh R wrote: > > > On 05/20/2016 06:32 PM, Tom Rini wrote: > > On Fri, May 20, 2016 at 04:11:22PM +0530, Vignesh R wrote: > > > >> According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on > >> DRA74(rev 1.1+)/DRA72 EVM can support up to

Re: [U-Boot] pull request: u-boot-uniphier/master

On Thu, May 26, 2016 at 12:52:04AM +0900, Masahiro Yamada wrote: > Hi Tom, > > Here are some UniPhier SoC updates for v2016.07-rc1: > - Support the second ARMv8 SoC from Socionext Inc. > - Misc cleanups and fixes > > > The following changes since commit

Re: [U-Boot] [PATCH] ARM: k2g: Configure reset mux to device reset

On 05/26/2016 08:35 AM, Lokesh Vutla wrote: > BOOTCFG_RSTMUX8 register controls the reset mux associated with the ARM. > Timer5(dedicated to ARM) when used as WatchDog timer, the events it > generates are routed to the above mux. > > Following are the 3 events that can controlled bt the reset

Re: [U-Boot] [PATCH] serial: 16550: Drop OMAP1510 support

On 05/24/2016 07:13 PM, Marek Vasut wrote: > The CONFIG_OMAP1510 is no longer defined, so remove this dead code. > > Signed-off-by: Marek Vasut > Cc: Tom Rini > Cc: Simon Glass Acked-by: Nishanth Menon -- Regards, Nishanth

Re: [U-Boot] please pull u-boot-samsung master

On Thu, May 26, 2016 at 02:03:08PM +0900, Minkyu Kang wrote: > Dear Tom, > > The following changes since commit fc15b9beed05dec6cc092c265042381a0eadb0e9: > > Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq (2016-05-24 > 13:42:03 -0400) > > are available in the git repository at:

Re: [U-Boot] [PATCH 2/4] MIPS: Fix _ACAST32_ for pointers on MIPS64

Am 26.05.2016 um 15:51 schrieb Paul Burton: > > Hi Daniel, > > I've submitted an alternate fix in v2 of the series just now. It still > requires a change to MIPS code but it mirrors one I have submitted to > Linux, and hopefully one you'll find acceptable. It makes MIPS32 & > MIPS64 more

[U-Boot] [PATCH] net: phy: micrel: add support for KSZ886x switches in MIIM mode

This patch adds a phy driver for the Micrel KSZ886x switches. Similarly to the KSZ8895, SoC MAC is directly connected to the switch MAC on the switch CPU port, so the link to the switch is always up. KSZ886x switches can be used in the following configuration modes: - Unmanaged mode with config

Re: [U-Boot] Unaligned flush_dcache_range in axs101.c

On Thursday 26 May 2016 05:09 PM, Alexey Brodkin wrote: > In the code you were referring what I wanted to modify reset vector of the > slave core. > And while we were living without IOC it was all OK. My code above wrote-back > (or as we used to call it within ARC "flushed") L1 data cache with

[U-Boot] [PATCH v2 04/11] ARM: allocate extra space for PSCI stack in secure section during link phase

The PSCI implementation expects at most 2 pages worth of space reserved at the end of the secure section for its stacks. If PSCI is relocated to secure SRAM, then everything is fine. If no secure SRAM is available, and PSCI remains in main memory, the reserved memory space doesn't cover the space

[U-Boot] [PATCH v2 03/11] ARM: PSCI: export common PSCI function declarations for C code

Some common PSCI functions are written in assembly, but it should be possible to use them from C code. Add function declarations for C code to consume. Signed-off-by: Chen-Yu Tsai --- arch/arm/include/asm/psci.h | 8 1 file changed, 8 insertions(+) diff --git

[U-Boot] [PATCH v2 05/11] sunxi: Make CPUCFG_BASE macro names the same across families

Use SUNXI_CPUCFG_BASE across all families. This makes writing common PSCI code easier. Signed-off-by: Chen-Yu Tsai --- arch/arm/cpu/armv7/sunxi/psci_sun6i.S | 16 arch/arm/cpu/armv7/sunxi/psci_sun7i.S | 8

[U-Boot] [PATCH v2 10/11] sunxi: Add base address for GIC

Instead of hardcoding the GIC addresses in the PSCI implementation, provide a base address in the cpu header. Signed-off-by: Chen-Yu Tsai --- arch/arm/cpu/armv7/sunxi/psci_sun6i.S | 4 ++-- arch/arm/cpu/armv7/sunxi/psci_sun7i.S | 4 ++--

[U-Boot] [PATCH v2 07/11] sunxi: Add missing linux/types.h header for cpucfg_sun6i.h

cpucfg_sun6i.h includes a register definition for the CPUCFG register block. The types used are u32 and u8, which are defined in linux/types.h. Signed-off-by: Chen-Yu Tsai --- arch/arm/include/asm/arch-sunxi/cpucfg_sun6i.h | 2 ++ 1 file changed, 2 insertions(+) diff --git

[U-Boot] [PATCH v2 11/11] sunxi: Add PSCI implementation in C

To make the PSCI backend more maintainable and easier to port to newer SoCs, rewrite the current PSCI implementation in C. Some inline assembly bits are required to access coprocessor registers. PSCI stack setup is the only part left completely in assembly. In theory this part could be split out

[U-Boot] [PATCH v2 08/11] sunxi: Group cpu core related controls together

Instead of listing individual registers for controls to each processor core, list them as an array of registers. This makes accessing controls by core index easier. Also rename "cpucfg_sun6i.h" (which was unused anyway) to the more generic "cpucfg.h", and add packed attribute to struct

[U-Boot] [PATCH v2 09/11] sunxi: Add CPUCFG debug lock and sun7i cpu power controls

CPUCFG has an unlisted debug control register, which is used to disable external debug access. Also, sun7i secondary core power controls are in CPUCFG, as there's no separate PRCM block. Signed-off-by: Chen-Yu Tsai --- arch/arm/include/asm/arch-sunxi/cpucfg.h | 7 ++- 1 file

[U-Boot] [PATCH v2 06/11] sunxi: Add packed attribute to struct sunxi_prcm_reg

struct sunxi_prcm_reg is a representation of the PRCM registers. Add the packed attribute to prevent the compiler from doing funny things. Signed-off-by: Chen-Yu Tsai --- arch/arm/include/asm/arch-sunxi/prcm.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git

[U-Boot] [PATCH v2 00/11] sunxi: PSCI implementation rewrite in C

Hi everyone, This series rewrites the Allwinner/sunxi PSCI implementation in C, to make it easier to maintain and extend for the currently unsupported multi-cluster SoCs. The SMP code in the BSP kernels are in C. Having the PSCI code in C as well will make it easier to work on. To be able to

[U-Boot] [PATCH v2 01/11] ARM: PSCI: use only r0 and r3 in psci_get_cpu_stack_top()

For psci_get_cpu_stack_top() to be usable in C code, it must adhere to the ARM calling conventions. Since it could be called when the stack is still unavailable, and the entry code to linux also expects r1 and r2 to remain unchanged, stick to r0 and r3. Signed-off-by: Chen-Yu Tsai

[U-Boot] [PATCH v2 02/11] ARM: PSCI: save and restore clobbered registers in v7_flush_dcache_all

Signed-off-by: Chen-Yu Tsai --- arch/arm/cpu/armv7/psci.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S index cdd001fe3fb0..ab408378fcae 100644 --- a/arch/arm/cpu/armv7/psci.S +++ b/arch/arm/cpu/armv7/psci.S @@ -110,6

Re: [U-Boot] [PATCH] serial: 16550: Add JZ47xx support

On Thu, May 26, 2016 at 02:05:07PM +0200, Marek Vasut wrote: > > Interesting :) May I ask which platform/SoC you're working with? Have > > you seen the (unfortunately currently out of tree) port we did for the > > JZ4780-based Ci20? I recall the pain of squeezing SPL down to a small > > enough

Re: [U-Boot] [PATCH 2/4] MIPS: Fix _ACAST32_ for pointers on MIPS64

On Thu, May 26, 2016 at 01:18:21AM +0200, Daniel Schwierzeck wrote: > > > Am 17.05.2016 um 12:56 schrieb Paul Burton: > > When building for MIPS64 and providing a pointer to _ACAST32_, > > optionally via CPHYSADDR or one of the CKSEGxADDR macros, the cast > > directly to a 32 bit int leads to

[U-Boot] [PATCH v2 4/4] malta: Allow MIPS64 builds

Both real Malta boards & emulators that mimic Malta (eg. QEMU) can support MIPS64 CPUs. Allow MIPS64 builds of U-Boot for such boards, which enables the user to make use of the whole 64 bit address space. Signed-off-by: Paul Burton --- Changes in v2: None

[U-Boot] [PATCH v2 3/4] net: pcnet: Make 64 bit safe

Fix the pcnet driver to build safely on 64 bit platforms, in preparation for allowing MIPS64 builds for Malta boards. Signed-off-by: Paul Burton --- Changes in v2: None drivers/net/pcnet.c | 18 ++ 1 file changed, 10 insertions(+), 8 deletions(-) diff

[U-Boot] [PATCH v2 2/4] net: pcnet: Stop converting kseg1->kseg0 addresses

Now that MIPS virt_to_phys can handle kseg1 addresses on MIPS32, stop manually converting addresses to their kseg0 equivalents in the pcnet driver. Signed-off-by: Paul Burton --- Changes in v2: - New patch. drivers/net/pcnet.c | 15 ++- 1 file changed, 6

[U-Boot] [PATCH v2 1/4] MIPS: Use CPHYSADDR to implement mips32 virt_to_phys

Use CPHYSADDR to implement the virt_to_phys function for converting from a virtual to a physical address for MIPS32, much as is already done for MIPS64. This allows for virt_to_phys to work regardless of whether the address being translated is in kseg0 or kseg1, unlike the previous subtraction

[U-Boot] [PATCH v2 0/4] Malta MIPS64 support

This series allows MIPS64 builds for Malta boards, which can be used either on real Malta boards with a MIPS64 CPU or in QEMU. It prepares by fixing some 64 bit safety issues that affect the ethernet driver, then allows the builds for the Malta board. This series applies atop u-boot-mips/next as

[U-Boot] [PATCH] ARM: k2g: Configure reset mux to device reset

BOOTCFG_RSTMUX8 register controls the reset mux associated with the ARM. Timer5(dedicated to ARM) when used as WatchDog timer, the events it generates are routed to the above mux. Following are the 3 events that can controlled bt the reset mux: - Device Reset - An interrupt to the ARM_GIC - An

Re: [U-Boot] [PATCH] serial: 16550: Add JZ47xx support

Hi Marek, On 25 May 2016 at 16:35, Marek Vasut wrote: > On 05/26/2016 12:31 AM, Daniel Schwierzeck wrote: >> >> >> Am 26.05.2016 um 00:21 schrieb Marek Vasut: >>> On 05/26/2016 12:17 AM, Daniel Schwierzeck wrote: Am 25.05.2016 um 02:19 schrieb Marek Vasut: > The

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