Re: [U-Boot] [PATCH] spi: cadence_qspi_apb: Add trigger-base DT bindings from Linux

[R, Vignesh]

On 2/25/2017 1:25 AM, Rush, Jason A. wrote:
> R, Vignesh wrote:
>> On 2/24/2017 12:55 AM, Marek Vasut wrote:
>>> On 02/23/2017 08:22 PM, Rush, Jason A. wrote:
 Marek Vasut wrote:
> On 02/22/2017 06:37 PM, Rush, Jason A. wrote:
>> Marek Vasut wrote:
>>> On 02/21/2017 05:50 PM, Rush, Jason A. wrote:
>> [...]

>>
>> You could try reverting my commits:
>> commit 57897c13de03ac0136d64641a3eab526c6810387 spi: cadence_qspi_apb:
>> Use 32 bit indirect write transaction when possible
>> commit b63b46313ed29e9b0c36b3d6b9407f6eade40c8f spi: cadence_qspi_apb:
>> Use 32 bit indirect read transaction when possible
>>
> 
> When I reverted these two commits and added my patch for the indirect
> trigger_address, it works correctly.
>

Oops, these patches are required as Cadence QSPI controller(I am not
sure if all versions of IP are newer versions only) has a limitation
that the external master is only permitted to issue 32-bit data
interface reads until the last word of an indirect transfer.


> Also, when I disabled the dcache (dcache off) as Marek suggested, it works
> correctly when running from the master branch (again with my indirect
> trigger_address patch).
> 

Just that I understand correctly, with latest master(with no patches
reverted) + your patch for indirect trigger_address + dcache off, you
don't see any problem?

>>
>> But there were other patches by others in v2017.01-rc1, like
>> spi: cadence_qspi: Fix CS timings which may have impact.
>>
> 
> I left all other commits in except the two Vignesh suggested to revert, so
> it seems to be related to those two commits and caching.  As another data
> point, I can load and boot linux with caching on from another source (MMC).
> So I don't think it's a problem with memory/caching in general.
> 
> Any suggestions on how to proceed from here?
> 

My patches use common bounce_buffer implementation which does dcache
flush/invalidate and if dcache has issues then I guess those operations
may be causing data corruption. Could you do a bit more research for me?

1. As a hack, could you just disable dcache operations in bounce_buffer
implementation? Here is the diff for the same:


diff --git a/common/bouncebuf.c b/common/bouncebuf.c
index 054d9e0302cc..2878b9eed1ae 100644
--- a/common/bouncebuf.c
+++ b/common/bouncebuf.c
@@ -55,21 +55,21 @@ int bounce_buffer_start(struct bounce_buffer *state, void 
*data,
 * Flush data to RAM so DMA reads can pick it up,
 * and any CPU writebacks don't race with DMA writes
 */
-   flush_dcache_range((unsigned long)state->bounce_buffer,
-   (unsigned long)(state->bounce_buffer) +
-   state->len_aligned);
+// flush_dcache_range((unsigned long)state->bounce_buffer,
+// (unsigned long)(state->bounce_buffer) +
+// state->len_aligned);

return 0;
 }

 int bounce_buffer_stop(struct bounce_buffer *state)
 {
-   if (state->flags & GEN_BB_WRITE) {
-   /* Invalidate cache so that CPU can see any newly DMA'd data */
-   invalidate_dcache_range((unsigned long)state->bounce_buffer,
-   (unsigned long)(state->bounce_buffer) +
-   state->len_aligned);
-   }
+// if (state->flags & GEN_BB_WRITE) {
+// /* Invalidate cache so that CPU can see any newly DMA'd data */
+// invalidate_dcache_range((unsigned long)state->bounce_buffer,
+// (unsigned long)(state->bounce_buffer) +
+// state->len_aligned);
+// }

if (state->bounce_buffer == state->user_buffer)
return 0;
>
>
>

2. If that works, I guess there is some issue wrt CQSPI and dcache on your 
platform,
I suggest you to revert my above two patches and try non bounce buffer version 
of 
my changes here: https://patchwork.ozlabs.org/patch/693069/.
This patch takes care of indirect write. I don't have similar patch for
indirect read but that wasn't required.

-- 
Regards
Vignesh
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Re: [U-Boot] [PATCH v3 4/8] armv8: Add workaround for USB erratum A-009007

[york sun]

On 02/23/2017 11:19 PM, Suresh Gupta wrote:
> Hi York,
>
> It is not good idea to change the values of all macro at this time as the 
> code tested on different platforms.

I am not talking about any value change. You are using writew. Why not 
using out_be16 as you thought?

York
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Re: [U-Boot] [PATCH 0/3] ARM: sun9i: Device tree and defconfig for Sunchip CX-A99

[Rask Ingemann Lambertsen]

On Fri, Feb 24, 2017 at 07:07:52AM +0100, Rask Ingemann Lambertsen wrote:
[...]
>  arch/arm/dts/Makefile |   3 +-
>  arch/arm/dts/sun9i-a80-cx-a99.dts | 380 
> ++
>  arch/arm/dts/sun9i-a80.dtsi   |   8 +
>  configs/Sunchip_CX-A99_defconfig  |  22 +++
>  4 files changed, 412 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/dts/sun9i-a80-cx-a99.dts
>  create mode 100644 configs/Sunchip_CX-A99_defconfig

A patch to add an entry to board/sunxi/MAINTAINERS is missing.

(I'll wait around 13-14 hours from now for more comments before sending out
version 2 of the patch series.)

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Re: [U-Boot] [PATCH v2 04/10] efi: Add a hook to allow adding memory mapping

[Alexander Graf]

On 15/02/2017 15:17, York Sun wrote:

Instead of adding all memory banks, add a hook so individual SoC/board
can has its own implementation.


Looks like a clean enough approach to the problem to me.

Reviewed-by: Alexander Graf 


Alex
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Re: [U-Boot] [PATCH] arm: am57xx: Update bootloader partition size

[Tom Rini]

On Tue, Feb 21, 2017 at 09:00:04PM -0600, Bajjuri, Praneeth wrote:
> 
> 
> On 2/21/2017 3:48 PM, Felipe Balbi wrote:
> >Hi,
> >
> >Sam Protsenko  writes:
> >>On Tue, Feb 21, 2017 at 10:35 PM, Felipe Balbi
> >> wrote:
> >>>Hi,
> >>>
> >>>Sam Protsenko  writes:
> From: Praneeth Bajjuri 
> 
> The current size of u-boot is already ~840 KiB.
> 
> This patch is to increase bootloader partition size up to 1 MiB
> and thereby fix flashing error like below:
> 
>  sending 'bootloader' (840 KB)...
>  OKAY [  0.048s]
>  writing 'bootloader'...
>  FAILED (remote: too large for partition)
> 
> Signed-off-by: Sam Protsenko 
> >>>Missing Praneeth's Signed-off-by?
> >>>
> >>Yes. But not sure If I should resend.
> >>
> >>Tom, will you please add Praneeth's Signed-off-by line when applying patch?
> >Only if Praneeth agrees, right ? ;-)
> agreed and ok with me
> thanks felipe , sam

You can reply with a Signed-off-by line and patchwork will collect it,
in general.

-- 
Tom


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[U-Boot] DT warnings and travis-ci problems

[Tom Rini]

Hey guys,

It seems as if perhaps travis-ci has recently implemented a limit on log
file size as the failure I see here:
https://travis-ci.org/trini/u-boot/jobs/204620482
is unrelated, entirely, to the changes I'm testing.  As my general hope
here is that we'll fix these issues by re-syncing with the kernel, has
progress been made on these currently, upstream?  Thanks!

-- 
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Re: [U-Boot] [PATCH] spi: cadence_qspi_apb: Add trigger-base DT bindings from Linux

[Rush, Jason A.]

R, Vignesh wrote:
> On 2/24/2017 12:55 AM, Marek Vasut wrote:
>> On 02/23/2017 08:22 PM, Rush, Jason A. wrote:
>>> Marek Vasut wrote:
 On 02/22/2017 06:37 PM, Rush, Jason A. wrote:
> Marek Vasut wrote:
>> On 02/21/2017 05:50 PM, Rush, Jason A. wrote:
> [...]
>>>
>>> While I was debugging some of my changes, I noticed that the data being 
>>> read from the
>>> QSPI flash device appears to be random.  The CPU no longer resets while 
>>> performing a
>>> read when the indirect trigger address is setup correctly for the Altrera 
>>> SoC, but there
>>> appears to be a larger problem with reading data in general.
>>>
>
> How random is it? Is the problem seen only when unaligned read/write are
> done or when length of transfer is not a multiple of word(4 byte)?
> If the data is really random in all cases, then I suspect timing issues.

I've been doing reads starting at NOR flash address 0x0, with a size of
0x4, reading into memory address 0x200.  So I don't think it's an
alignment issue.  The NOR flash is erased, so it should be all 0xFF, but
here's a memory dump of what I get running the latest from the master branch
(with my patch for indirect trigger_address):

=> sf probe
SF: Detected n25q1024 with page size 256 Bytes, erase size 64 KiB, total 128 MiB
=> sf read 0x200 0x0 0x4
device 0 offset 0x0, size 0x4
SF: 262144 bytes @ 0x0 Read: OK
=> md.b 0x200 0x40
0200: fe 1f 6e dc dd fb 7b 44 ff dd 49 fe f8 5b ab 1b..n...{D..I..[..
0210: 2f df 38 36 8f b6 47 eb 56 73 9c f9 05 ed 5c e7/.86..G.Vs\.
0220: c2 ef ad fe da 6d a8 78 49 fd df 5e 77 f9 66 37.m.xI..^w.f7
0230: cd 7f 7f eb 8d be 73 bf de c8 35 d5 10 bf a5 f6..s...5.

When I run from the v2016.11 tag, I get the following (expected results):

=> sf probe
SF: Detected n25q1024 with page size 256 Bytes, erase size 64 KiB, total 128 MiB
=> sf read 0x200 0x0 0x4
device 0 offset 0x0, size 0x4
SF: 262144 bytes @ 0x0 Read: OK
=> md.b 0x200 0x40
0200: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
0210: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
0220: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
0230: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff

> Please see if delay values are populated correctly in DT.

All the delay values, as well as all other CQSPI properties, in the DT match
the values at runtime.

>
>>> When I apply my patch to the v2016.11 release, reads appear correct.  
>>> However, when I
>>> apply my patch to the v2017.01 release, the data read from the QSPI device 
>>> appear to be
>>> random/corrupt.  I noticed the cadence_spi_apb.c file changed significantly 
>>> between
>>> v2016.11 and v2017.01, possibly a change in this file is causing the 
>>> problem on the Altera
>>> SoC.
>>>
>>> I'm not really that familiar with the cadence device, so this issue is 
>>> getting a little beyond a
>>> simple patch to setup the indirect trigger address correctly for the 
>>> Altrera SoC.  Is there
>>> anyone more familiar with the cadence device on the Altera SoC that could 
>>> take a look
>>> into this?
>>
>> Vignesh did those changes, so I think he can assist you. In the
>> meantime, you can try git bisect . Another thing you can try is
>> disabling the dcache and see if that fixes things (dcache off),
>> I recall seeing some caching issues with CQSPI.
>>
>
> You could try reverting my commits:
> commit 57897c13de03ac0136d64641a3eab526c6810387 spi: cadence_qspi_apb:
> Use 32 bit indirect write transaction when possible
> commit b63b46313ed29e9b0c36b3d6b9407f6eade40c8f spi: cadence_qspi_apb:
> Use 32 bit indirect read transaction when possible
>

When I reverted these two commits and added my patch for the indirect
trigger_address, it works correctly.

Also, when I disabled the dcache (dcache off) as Marek suggested, it works
correctly when running from the master branch (again with my indirect
trigger_address patch).

>
> But there were other patches by others in v2017.01-rc1, like
> spi: cadence_qspi: Fix CS timings which may have impact.
>

I left all other commits in except the two Vignesh suggested to revert, so
it seems to be related to those two commits and caching.  As another data
point, I can load and boot linux with caching on from another source (MMC).
So I don't think it's a problem with memory/caching in general.

Any suggestions on how to proceed from here?

---
Regards,
Jason
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Re: [U-Boot] [PATCH] ARM: ti: Update layout for MMC and eMMC (env and dfu)

[Sam Protsenko]

On Fri, Feb 24, 2017 at 3:06 PM, Jean-Jacques Hiblot  wrote:
>
>
> On 24/02/2017 13:59, Sam Protsenko wrote:
>>
>> On Fri, Feb 24, 2017 at 10:53 AM, Jean-Jacques Hiblot 
>> wrote:
>>>
>>>
>>> On 23/02/2017 20:28, Sam Protsenko wrote:

 On Thu, Feb 23, 2017 at 5:14 PM, Jean-Jacques Hiblot 
 wrote:
>
>
> On 23/02/2017 14:46, Sam Protsenko wrote:
>>
>> On Wed, Feb 22, 2017 at 10:27 AM, Jean-Jacques Hiblot
>> 
>> wrote:
>>>
>>> The problems with the current DFU layout are:
>>> MMC: The space allocated for u-boot is too small for the latest
>>> u-boot
>>> (>750KB). We need to increase it. eMMC uses a much bigger
>>> area
>>> (2MB).
>>> eMMC: region "u-boot.img.raw" overlaps the environment area and the
>>> region
>>>  "spl-os-image.raw".
>>> both: region "spl-os-image.raw" is quite small and can't handle
>>> android
>>>  kernels
>>>
>>> Fixing this requires growing some regions and moving others.
>>> Care has been taken to leave some room for further growth of
>>> "spl-os-args.raw".
>>> Also the "env" now appears in the dfu so that it's apparent that the
>>> region is not free space that can be used to grow "u-boot.img.raw".
>>> The total space allocated for those raw binaries is 16MB, of which
>>> 13+MB
>>> are reserved for the kernel image.
>>>
>>> Signed-off-by: Jean-Jacques Hiblot 
>>> ---
>>>
>>> Sam,
>>>
>>> This patch goes a bit further in changing the layout of the MMC than
>>> yours. However
>>> it doesn't update the GPT partitioning. This would still be needed.
>>>
>> Hi Jean-Jacques,
>>
>> Got a couple of questions about this change and my patch (changing
>> eMMC partitions table), about how to make them play nice together.
>>
>> 1. How DFU table is connected to eMMC partition table? And why my
>> patch was interfering with DFU table?
>
> AFAIK DFU is not related to GPT. I never used the GPT so I can't for
> sure
> how it fits together.
> My guess is that env_mmc.c has no idea that GPT even exists and uses
> raw
> access to the eMMC. In this case CONFIG_ENV_OFFSET must be defined to
> point
> at the beginning of your env partition and must be adapted when the GPT
> is
> updated. The same goes for the DFU. Ideally GPT and DFU should use the
> same
> layout (at least for MLO, u-boot, kernel and args).
>
>> 2. Can I change CONFIG_ENV_OFFSET? Because my changes is going to move
>> "reserved" partition on eMMC, where U-Boot environment is stored. Or
>> it should be in sync with DFU table somehow? If yes -- we should work
>> together to find solution that works best for both cases.
>
> CONFIG_ENV_OFFSET is loosely related to DFU: we don't update the
> environment
> through DFU. However we must make sure that the area used to store the
> env
> doesn't overlap a another region (MLO, u-boot, kernel, args). The dfu
> doesn't define those regions, it's done with #defines like
> CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR. But DFU exposes them for
> "remote"
> upgrade.
>
 So if I change eMMC GPT partition table, it's ok for me to update
 CONFIG_ENV_OFFSET as well, right?
>>>
>>> Yes you need to change it

Because in my case CONFIG_ENV_OFFSET
 is going to be different from the value your patch sets. In case of
 eMMC table, we're using "reserved" partition to store U-Boot
 environment, and I want it to be at 1664 KiB, which gives us
 CONFIG_ENV_OFFSET=0x1A. Is it ok if I change it to that value? Or
 something else must be changed along with it? If yes, then what
 exactly?
>>>
>>> You need to adapt DFU if you plan to use it. Maybe you can define a new
>>> layout for DFU, something like dfu_alt_info_emmc_gpt that will reflect
>>> your
>>> GPT layout
>>>
>>> Anyway IMO it would be good to use the same offset/size for GPT and
>>> non-GPT
>>> case for the following regions:
>>> - MLO
>>> - u-boot
>>> - env
>>>
>>> For MLO we already use the same: offset 128kB / size 256kB
>>> For u-boot, you increased the size to 1MB, I suggest that we increase it
>>> a
>>> bit more (1.5MB or 2MB) just to make sure that we don't have to increase
>>> its
>>> size again next year.
>>> For the env, I suggest that the size is increased to 256kB to take care
>>> of
>>> redundant env.
>>>
>> Thank you for detailed explanation. I'm gonna get back to that task in
>> a few weeks, don't have enough time right now. Once I come up with
>> some particular patch, I will add you to reviewers, to be sure that
>> DFU part is correct.
>
> Before you switch to another task maybe we can agree on the offset and sizes
> for MLO, u-boot and env so that I can do the necessary changes on my side
> (dfu, 

Re: [U-Boot] [PATCH 1/3] ARM: dts: sun9i: Add mmc1 pinmux setting

[Rask Ingemann Lambertsen]

On Fri, Feb 24, 2017 at 03:27:11PM +0800, Chen-Yu Tsai wrote:
> On Fri, Feb 24, 2017 at 2:08 PM, Chen-Yu Tsai  wrote:
> > commit 56b0730157f70dc23d6caff9e7ceb8b377b96b9f upstream.
> >
> > On the A80, mmc1 is available on pingroup G. Designs mostly use this
> > to connect to an SDIO WiFi chip.
> >
> > Signed-off-by: Chen-Yu Tsai 
> 
> I did not send this.
> 
> Rask, something is wrong with your setup. You should send patches from
> your own email address, while keeping the author. You should also add
> your SoB.

I'm terribly sorry about that. I am the one who sent that patch.

To prevent `git format-patch' from copying the commit author's address into
the From: field in the e-mail header again, I have now run

$ git config --global format.from true

so `git format-patch' will do the right thing. I wish that variable would be
more prominently documented, perhaps in git-format-patch(1).

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Re: [U-Boot] [PATCH v3 1/2] common: image: update boot_get_fpga to support arbitrary fpga image

[Dalon Westergreen]

On Tue, 2017-02-21 at 21:00 -0700, Simon Glass wrote:
> Hi Dalon,
> 
> On 20 February 2017 at 07:56, Dalon Westergreen  wrote:
> > 
> > The implementation of boot_get_fpga only supported one fpga family.
> > This modification allows for any of the fpga devices supported by
> > fpga_load to be used.
> 
[snip ...]
> > 
> >  /* configuration node */
> >  #define FIT_KERNEL_PROP"kernel"
> > @@ -955,6 +957,9 @@ int fit_image_hash_get_value(const void *fit, int
> > noffset, uint8_t **value,
> > 
> >  int fit_set_timestamp(void *fit, int noffset, time_t timestamp);
> > 
> > +int fit_image_fpga_get_devnum(const void *fit, int noffset, int *devnum);
> > +int fit_image_fpga_is_partial(const void *fit, int noffset);
> 
> Can you put the function comments here instead of in the C file?

Doing this would be counter to every other function in the c file these
are added to, so i think it best to leave as is.

--dalon

> > 
> > +
> >  /**
> >   * fit_add_verification_data() - add verification data to FIT image nodes
> >   *
> > --
> > 2.7.4
> > 
> > ___
> > U-Boot mailing list
> > U-Boot@lists.denx.de
> > http://lists.denx.de/mailman/listinfo/u-boot
> 
> Regards,
> Simon
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Re: [U-Boot] [PATCH] ARM: ti: Update layout for MMC and eMMC (env and dfu)

[Jean-Jacques Hiblot]

On 24/02/2017 13:59, Sam Protsenko wrote:

On Fri, Feb 24, 2017 at 10:53 AM, Jean-Jacques Hiblot  wrote:


On 23/02/2017 20:28, Sam Protsenko wrote:

On Thu, Feb 23, 2017 at 5:14 PM, Jean-Jacques Hiblot 
wrote:


On 23/02/2017 14:46, Sam Protsenko wrote:

On Wed, Feb 22, 2017 at 10:27 AM, Jean-Jacques Hiblot 
wrote:

The problems with the current DFU layout are:
MMC: The space allocated for u-boot is too small for the latest u-boot
(>750KB). We need to increase it. eMMC uses a much bigger area
(2MB).
eMMC: region "u-boot.img.raw" overlaps the environment area and the
region
 "spl-os-image.raw".
both: region "spl-os-image.raw" is quite small and can't handle android
 kernels

Fixing this requires growing some regions and moving others.
Care has been taken to leave some room for further growth of
"spl-os-args.raw".
Also the "env" now appears in the dfu so that it's apparent that the
region is not free space that can be used to grow "u-boot.img.raw".
The total space allocated for those raw binaries is 16MB, of which
13+MB
are reserved for the kernel image.

Signed-off-by: Jean-Jacques Hiblot 
---

Sam,

This patch goes a bit further in changing the layout of the MMC than
yours. However
it doesn't update the GPT partitioning. This would still be needed.


Hi Jean-Jacques,

Got a couple of questions about this change and my patch (changing
eMMC partitions table), about how to make them play nice together.

1. How DFU table is connected to eMMC partition table? And why my
patch was interfering with DFU table?

AFAIK DFU is not related to GPT. I never used the GPT so I can't for sure
how it fits together.
My guess is that env_mmc.c has no idea that GPT even exists and uses raw
access to the eMMC. In this case CONFIG_ENV_OFFSET must be defined to
point
at the beginning of your env partition and must be adapted when the GPT
is
updated. The same goes for the DFU. Ideally GPT and DFU should use the
same
layout (at least for MLO, u-boot, kernel and args).


2. Can I change CONFIG_ENV_OFFSET? Because my changes is going to move
"reserved" partition on eMMC, where U-Boot environment is stored. Or
it should be in sync with DFU table somehow? If yes -- we should work
together to find solution that works best for both cases.

CONFIG_ENV_OFFSET is loosely related to DFU: we don't update the
environment
through DFU. However we must make sure that the area used to store the
env
doesn't overlap a another region (MLO, u-boot, kernel, args). The dfu
doesn't define those regions, it's done with #defines like
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR. But DFU exposes them for
"remote"
upgrade.


So if I change eMMC GPT partition table, it's ok for me to update
CONFIG_ENV_OFFSET as well, right?

Yes you need to change it

   Because in my case CONFIG_ENV_OFFSET
is going to be different from the value your patch sets. In case of
eMMC table, we're using "reserved" partition to store U-Boot
environment, and I want it to be at 1664 KiB, which gives us
CONFIG_ENV_OFFSET=0x1A. Is it ok if I change it to that value? Or
something else must be changed along with it? If yes, then what
exactly?

You need to adapt DFU if you plan to use it. Maybe you can define a new
layout for DFU, something like dfu_alt_info_emmc_gpt that will reflect your
GPT layout

Anyway IMO it would be good to use the same offset/size for GPT and non-GPT
case for the following regions:
- MLO
- u-boot
- env

For MLO we already use the same: offset 128kB / size 256kB
For u-boot, you increased the size to 1MB, I suggest that we increase it a
bit more (1.5MB or 2MB) just to make sure that we don't have to increase its
size again next year.
For the env, I suggest that the size is increased to 256kB to take care of
redundant env.


Thank you for detailed explanation. I'm gonna get back to that task in
a few weeks, don't have enough time right now. Once I come up with
some particular patch, I will add you to reviewers, to be sure that
DFU part is correct.
Before you switch to another task maybe we can agree on the offset and 
sizes for MLO, u-boot and env so that I can do the necessary changes on 
my side (dfu, #defines).







Thanks.


3. What about my similar patch for AM57x EVM (see [1])? Is it fine, or
it affects DFU table as well?

I guess it's OK because the env is stored in a FAT partition:
CONFIG_ENV_OFFSET is not used



Thanks.

[1] https://patchwork.ozlabs.org/patch/730736/


tested on DRA7. DFU updates ok for MMC and eMMC

Jean-Jacques

include/configs/dra7xx_evm.h  |  2 +-
include/configs/omap5_uevm.h  |  2 +-
include/configs/ti_armv7_common.h |  7 ---
include/environment/ti/dfu.h  | 14 --
4 files changed, 14 insertions(+), 11 deletions(-)

diff --git a/include/configs/dra7xx_evm.h
b/include/configs/dra7xx_evm.h
index bce2816..a56c224 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -28,7 

Re: [U-Boot] [PATCH] ARM: ti: Update layout for MMC and eMMC (env and dfu)

[Sam Protsenko]

On Fri, Feb 24, 2017 at 10:53 AM, Jean-Jacques Hiblot  wrote:
>
>
> On 23/02/2017 20:28, Sam Protsenko wrote:
>>
>> On Thu, Feb 23, 2017 at 5:14 PM, Jean-Jacques Hiblot 
>> wrote:
>>>
>>>
>>> On 23/02/2017 14:46, Sam Protsenko wrote:

 On Wed, Feb 22, 2017 at 10:27 AM, Jean-Jacques Hiblot 
 wrote:
>
> The problems with the current DFU layout are:
> MMC: The space allocated for u-boot is too small for the latest u-boot
>(>750KB). We need to increase it. eMMC uses a much bigger area
> (2MB).
> eMMC: region "u-boot.img.raw" overlaps the environment area and the
> region
> "spl-os-image.raw".
> both: region "spl-os-image.raw" is quite small and can't handle android
> kernels
>
> Fixing this requires growing some regions and moving others.
> Care has been taken to leave some room for further growth of
> "spl-os-args.raw".
> Also the "env" now appears in the dfu so that it's apparent that the
> region is not free space that can be used to grow "u-boot.img.raw".
> The total space allocated for those raw binaries is 16MB, of which
> 13+MB
> are reserved for the kernel image.
>
> Signed-off-by: Jean-Jacques Hiblot 
> ---
>
> Sam,
>
> This patch goes a bit further in changing the layout of the MMC than
> yours. However
> it doesn't update the GPT partitioning. This would still be needed.
>
 Hi Jean-Jacques,

 Got a couple of questions about this change and my patch (changing
 eMMC partitions table), about how to make them play nice together.

 1. How DFU table is connected to eMMC partition table? And why my
 patch was interfering with DFU table?
>>>
>>> AFAIK DFU is not related to GPT. I never used the GPT so I can't for sure
>>> how it fits together.
>>> My guess is that env_mmc.c has no idea that GPT even exists and uses raw
>>> access to the eMMC. In this case CONFIG_ENV_OFFSET must be defined to
>>> point
>>> at the beginning of your env partition and must be adapted when the GPT
>>> is
>>> updated. The same goes for the DFU. Ideally GPT and DFU should use the
>>> same
>>> layout (at least for MLO, u-boot, kernel and args).
>>>
 2. Can I change CONFIG_ENV_OFFSET? Because my changes is going to move
 "reserved" partition on eMMC, where U-Boot environment is stored. Or
 it should be in sync with DFU table somehow? If yes -- we should work
 together to find solution that works best for both cases.
>>>
>>> CONFIG_ENV_OFFSET is loosely related to DFU: we don't update the
>>> environment
>>> through DFU. However we must make sure that the area used to store the
>>> env
>>> doesn't overlap a another region (MLO, u-boot, kernel, args). The dfu
>>> doesn't define those regions, it's done with #defines like
>>> CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR. But DFU exposes them for
>>> "remote"
>>> upgrade.
>>>
>> So if I change eMMC GPT partition table, it's ok for me to update
>> CONFIG_ENV_OFFSET as well, right?
>
> Yes you need to change it
>>
>>   Because in my case CONFIG_ENV_OFFSET
>> is going to be different from the value your patch sets. In case of
>> eMMC table, we're using "reserved" partition to store U-Boot
>> environment, and I want it to be at 1664 KiB, which gives us
>> CONFIG_ENV_OFFSET=0x1A. Is it ok if I change it to that value? Or
>> something else must be changed along with it? If yes, then what
>> exactly?
>
> You need to adapt DFU if you plan to use it. Maybe you can define a new
> layout for DFU, something like dfu_alt_info_emmc_gpt that will reflect your
> GPT layout
>
> Anyway IMO it would be good to use the same offset/size for GPT and non-GPT
> case for the following regions:
> - MLO
> - u-boot
> - env
>
> For MLO we already use the same: offset 128kB / size 256kB
> For u-boot, you increased the size to 1MB, I suggest that we increase it a
> bit more (1.5MB or 2MB) just to make sure that we don't have to increase its
> size again next year.
> For the env, I suggest that the size is increased to 256kB to take care of
> redundant env.
>

Thank you for detailed explanation. I'm gonna get back to that task in
a few weeks, don't have enough time right now. Once I come up with
some particular patch, I will add you to reviewers, to be sure that
DFU part is correct.

>
>
>>
>> Thanks.
>>
 3. What about my similar patch for AM57x EVM (see [1])? Is it fine, or
 it affects DFU table as well?
>>>
>>> I guess it's OK because the env is stored in a FAT partition:
>>> CONFIG_ENV_OFFSET is not used
>>>
>>>
 Thanks.

 [1] https://patchwork.ozlabs.org/patch/730736/

> tested on DRA7. DFU updates ok for MMC and eMMC
>
> Jean-Jacques
>
>include/configs/dra7xx_evm.h  |  2 +-
>include/configs/omap5_uevm.h  |  2 +-
>include/configs/ti_armv7_common.h |  7 ---
>

[U-Boot] [RESEND PATCH 7/9] Kconfig: Adds SYS_TEXT_BASE config option for Keystone2

[Andrew F. Davis]

From: Madan Srinivas 

This patch makes SYS_TEXT_BASE a config option for Keystone2
so that it can be used to load u-boot at different addresses
on secure and non-secure Keystone2 devices.

Signed-off-by: Madan Srinivas 
Signed-off-by: Andrew F. Davis 
---
 Kconfig| 2 +-
 configs/k2e_evm_defconfig  | 1 +
 configs/k2g_evm_defconfig  | 1 +
 configs/k2hk_evm_defconfig | 1 +
 configs/k2l_evm_defconfig  | 1 +
 5 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/Kconfig b/Kconfig
index 81b4226463..1a5b105daa 100644
--- a/Kconfig
+++ b/Kconfig
@@ -285,7 +285,7 @@ config SYS_EXTRA_OPTIONS
 config SYS_TEXT_BASE
depends on SPARC || ARC || X86 || ARCH_UNIPHIER || ARCH_ZYNQMP || \
(M68K && !TARGET_ASTRO_MCF5373L) || MICROBLAZE || MIPS || \
-   ARCH_ZYNQ
+   ARCH_ZYNQ || ARCH_KEYSTONE
depends on !EFI_APP
hex "Text Base"
help
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index a42a485e2b..95259661c9 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -8,6 +8,7 @@ CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SYS_TEXT_BASE=0x0c00
 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index f3ee01afb1..84b5152e80 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -8,6 +8,7 @@ CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SYS_TEXT_BASE=0x0c00
 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index d924796627..87fe2f437a 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -8,6 +8,7 @@ CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SYS_TEXT_BASE=0x0c00
 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index c81758571c..9226488409 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -8,6 +8,7 @@ CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SYS_TEXT_BASE=0x0c00
 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
-- 
2.11.0

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[U-Boot] [RESEND PATCH 9/9] defconfig: k2hk_hs_evm: Add k2hk_hs_evm_defconfig

[Andrew F. Davis]

TI K2HK secure devices have to be built with TI_SECURE_DEVICE, FIT, and
FIT_IMAGE_POST_PROCESS enabled. Add a dedicated defconfig for this.

Signed-off-by: Andrew F. Davis 
---
 configs/k2hk_hs_evm_defconfig | 51 +++
 1 file changed, 51 insertions(+)
 create mode 100644 configs/k2hk_hs_evm_defconfig

diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig
new file mode 100644
index 00..9fe91ea19c
--- /dev/null
+++ b/configs/k2hk_hs_evm_defconfig
@@ -0,0 +1,51 @@
+CONFIG_ARM=y
+CONFIG_ARCH_KEYSTONE=y
+CONFIG_SYS_TEXT_BASE=0x0c60
+CONFIG_TARGET_K2HK_EVM=y
+CONFIG_TI_SECURE_DEVICE=y
+CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm"
+CONFIG_FIT=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="K2HK EVM # "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
+CONFIG_ISO_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_TI_AEMIF=y
+# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
-- 
2.11.0

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[U-Boot] [RESEND PATCH 4/9] arm: mach-omap2: Add secure image name common to OMAP and keystone

[Andrew F. Davis]

From: Madan Srinivas 

As K2 can directly boot U-Boot, add u-boot_HS_MLO as the secure image
name for secure K2 devices, for all boot modes other than SPI flash.

Signed-off-by: Madan Srinivas 
Signed-off-by: Andrew F. Davis 
---
 arch/arm/mach-omap2/config_secure.mk | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/mach-omap2/config_secure.mk 
b/arch/arm/mach-omap2/config_secure.mk
index 0c843338d7..0346cb93ab 100644
--- a/arch/arm/mach-omap2/config_secure.mk
+++ b/arch/arm/mach-omap2/config_secure.mk
@@ -77,6 +77,12 @@ u-boot-spl_HS_ISSW: $(obj)/u-boot-spl.bin FORCE
 u-boot-spl_HS_SPI_X-LOADER: $(obj)/u-boot-spl.bin FORCE
$(call if_changed,mkomapsecimg)
 
+# For supporting single stage boot on keystone, the image is a full u-boot
+# file, not an SPL. This will work for all boot devices, other than SPI
+# flash
+u-boot_HS_MLO: $(obj)/u-boot.bin
+   $(call if_changed,mkomapsecimg)
+
 # For supporting single stage XiP QSPI on AM43xx, the image is a full u-boot
 # file, not an SPL. In this case the mkomapsecimg command looks for a
 # u-boot-HS_* prefix
-- 
2.11.0

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[U-Boot] [RESEND PATCH 1/9] image: Fixes build warning with CONFIG_FIT_IMAGE_POST_PROCESS

[Andrew F. Davis]

From: Madan Srinivas 

The function 'board_fit_image_post_process' is defined only when the
config option CONFIG_FIT_IMAGE_POST_PROCESS is enabled. For secure
systems that do not use SPL but do use FIT kernel images, only
CONFIG_FIT_IMAGE_POST_PROCESS will be defined, which will result in an
implicit declaration of function 'board_fit_image_post_process' warning
while building u-boot. Fix this warning.

Signed-off-by: Madan Srinivas 
Signed-off-by: Andrew F. Davis 
Reviewed-by: Tom Rini 
---
 include/image.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/image.h b/include/image.h
index 1e686b76d3..24cdd8cd14 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1257,7 +1257,8 @@ void android_print_contents(const struct andr_img_hdr 
*hdr);
  */
 int board_fit_config_name_match(const char *name);
 
-#ifdef CONFIG_SPL_FIT_IMAGE_POST_PROCESS
+#if defined(CONFIG_SPL_FIT_IMAGE_POST_PROCESS) || \
+   defined(CONFIG_FIT_IMAGE_POST_PROCESS)
 /**
  * board_fit_image_post_process() - Do any post-process on FIT binary data
  *
-- 
2.11.0

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[U-Boot] [RESEND PATCH 8/9] defconfig: k2e_hs_evm: Add k2e_hs_evm_defconfig

[Andrew F. Davis]

From: Vitaly Andrianov 

TI K2E secure devices have to be built with TI_SECURE_DEVICE, FIT, and
FIT_IMAGE_POST_PROCESS enabled. Add a dedicated defconfig for this.

Signed-off-by: Vitaly Andrianov 
Signed-off-by: Madan Srinivas 
Signed-off-by: Andrew F. Davis 
---
 configs/k2e_hs_evm_defconfig | 51 
 1 file changed, 51 insertions(+)
 create mode 100644 configs/k2e_hs_evm_defconfig

diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig
new file mode 100644
index 00..d515cedaca
--- /dev/null
+++ b/configs/k2e_hs_evm_defconfig
@@ -0,0 +1,51 @@
+CONFIG_ARM=y
+CONFIG_ARCH_KEYSTONE=y
+CONFIG_SYS_TEXT_BASE=0x0c60
+CONFIG_TARGET_K2E_EVM=y
+CONFIG_TI_SECURE_DEVICE=y
+CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm"
+CONFIG_FIT=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="K2E HS EVM # "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
+CONFIG_ISO_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_TI_AEMIF=y
+# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
-- 
2.11.0

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[U-Boot] [RESEND PATCH 2/9] arm: mach-keystone: Implements FIT post-processing call for keystone SoCs

[Andrew F. Davis]

From: Vitaly Andrianov 

This commit implements the board_fit_image_post_process() function for
the keystone architecture. This function calls into the secure boot
monitor for secure authentication/decryption of the image. All needed
work is handled by the boot monitor and, depending on the keystone
platform, the security functions may be offloaded to other secure
processing elements in the SoC.

The boot monitor acts as the gateway to these secure functions and the
boot monitor for secure devices is available as part of the SECDEV
package for KS2. For more details refer doc/README.ti-secure

Signed-off-by: Vitaly Andrianov 
Signed-off-by: Madan Srinivas 
Signed-off-by: Andrew F. Davis 
---
 arch/arm/mach-keystone/mon.c | 73 
 1 file changed, 73 insertions(+)

diff --git a/arch/arm/mach-keystone/mon.c b/arch/arm/mach-keystone/mon.c
index 256f6300ed..81009848d0 100644
--- a/arch/arm/mach-keystone/mon.c
+++ b/arch/arm/mach-keystone/mon.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 asm(".arch_extension sec\n\t");
 
 int mon_install(u32 addr, u32 dpsc, u32 freq)
@@ -61,3 +62,75 @@ int mon_power_off(int core_id)
: "cc", "r0", "r1", "memory");
return  result;
 }
+
+#ifdef CONFIG_TI_SECURE_DEVICE
+#define KS2_HS_SEC_HEADER_LEN  0x60
+#define KS2_HS_SEC_TAG_OFFSET  0x34
+#define KS2_AUTH_CMD   130
+
+/**
+ * k2_hs_bm_auth() - Invokes security functions using a
+ * proprietary TI interface. This binary and source for
+ * this is available in the secure development package or
+ * SECDEV. For details on how to access this please refer
+ * doc/README.ti-secure
+ *
+ * @cmd: Secure monitor command
+ * @arg1: Argument for command
+ *
+ * returns non-zero value on success, zero on error
+ */
+static int k2_hs_bm_auth(int cmd, void *arg1)
+{
+   int result;
+
+   asm volatile (
+   "stmfd  r13!, {r4-r12, lr}\n"
+   "mov r0, %1\n"
+   "mov r1, %2\n"
+   "smc #2\n"
+   "ldmfd r13!, {r4-r12, lr}\n"
+   : "=" (result)
+   : "r" (cmd), "r" (arg1)
+   : "cc", "r0", "r1", "memory");
+
+   return  result;
+}
+
+void board_fit_image_post_process(void **p_image, size_t *p_size)
+{
+   int result = 0;
+   void *image = *p_image;
+
+   if (strncmp(image + KS2_HS_SEC_TAG_OFFSET, "KEYS", 4)) {
+   printf("No signature found in image!\n");
+   hang();
+   }
+
+   result = k2_hs_bm_auth(KS2_AUTH_CMD, image);
+   if (result == 0) {
+   printf("Authentication failed!\n");
+   hang();
+   }
+
+   /*
+   * Overwrite the image headers after authentication
+   * and decryption. Update size to reflect removal
+   * of header.
+   */
+   memcpy(image, image + KS2_HS_SEC_HEADER_LEN, *p_size);
+   *p_size -= KS2_HS_SEC_HEADER_LEN;
+
+   /*
+* Output notification of successful authentication to re-assure the
+* user that the secure code is being processed as expected. However
+* suppress any such log output in case of building for SPL and booting
+* via YMODEM. This is done to avoid disturbing the YMODEM serial
+* protocol transactions.
+*/
+   if (!(IS_ENABLED(CONFIG_SPL_BUILD) &&
+ IS_ENABLED(CONFIG_SPL_YMODEM_SUPPORT) &&
+ spl_boot_device() == BOOT_DEVICE_UART))
+   printf("Authentication passed\n");
+}
+#endif
-- 
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[U-Boot] [RESEND PATCH 6/9] doc: Updates info on using Keystone2 secure devices

[Andrew F. Davis]

From: Madan Srinivas 

Add a section describing the secure boot image used on
Keystone2 secure devices.

Signed-off-by: Madan Srinivas 
Signed-off-by: Andrew F. Davis 
---
 doc/README.ti-secure | 20 
 1 file changed, 20 insertions(+)

diff --git a/doc/README.ti-secure b/doc/README.ti-secure
index 9b0fbf9732..4b5380c0f3 100644
--- a/doc/README.ti-secure
+++ b/doc/README.ti-secure
@@ -133,6 +133,26 @@ Booting of U-Boot SPL
u-boot-spl_HS_X-LOADER - boot image for all other flash memories
including QSPI and NOR flash
 
+   Invoking the script for Keystone2 Secure Devices
+   =
+
+   create-boot-image.sh \
+  
+
+is currently ignored and reserved for future use.
+
+is the full path and filename of the public world boot
+   loader binary file (only u-boot.bin is currently supported on
+   Keystone2 devices, u-boot-spl.bin is not currently supported).
+
+is the full path and filename of the final secure image.
+   The output binary images should be used in place of the standard
+   non-secure binary images (see the platform-specific user's guides
+   and releases notes for how the non-secure images are typically used)
+   u-boot_HS_MLO - signed and encrypted boot image that can be used to
+   boot from all media. Secure boot from SPI NOR flash is not
+   currently supported.
+
 Booting of Primary U-Boot (u-boot.img)
 ==
 
-- 
2.11.0

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[U-Boot] [RESEND PATCH 3/9] arm: mach-omap2: Enable Kconfig support for K2 HS devices

[Andrew F. Davis]

From: Vitaly Andrianov 

Like the OMAP54xx, AM43xx, & AM33xx family SoCs, the keystone family
of SoCs also have high security enabled models. Allow K2E devices to
be built with HS Device Type Support.

Signed-off-by: Vitaly Andrianov 
Signed-off-by: Madan Srinivas 
Signed-off-by: Andrew F. Davis 
---
 arch/arm/mach-omap2/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 24bc485195..d74b068abc 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -1,6 +1,6 @@
 config TI_SECURE_DEVICE
bool "HS Device Type Support"
-   depends on OMAP54XX || AM43XX || AM33XX
+   depends on OMAP54XX || AM43XX || AM33XX || ARCH_KEYSTONE
help
  If a high secure (HS) device type is being used, this config
  must be set. This option impacts various aspects of the
-- 
2.11.0

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[U-Boot] [RESEND PATCH 5/9] ARM: Keystone2: Build secure images for K2

[Andrew F. Davis]

From: Madan Srinivas 

Adds an additional image type needed for supporting secure keystone
devices. The build generates u-boot_HS_MLO which can be used to boot
from all media on secure keystone devices.

Signed-off-by: Madan Srinivas 
Signed-off-by: Andrew F. Davis 
---
 arch/arm/mach-keystone/config.mk | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/mach-keystone/config.mk b/arch/arm/mach-keystone/config.mk
index 9ae1e9ac91..db556ea0a8 100644
--- a/arch/arm/mach-keystone/config.mk
+++ b/arch/arm/mach-keystone/config.mk
@@ -5,9 +5,15 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
+include  $(srctree)/arch/arm/mach-omap2/config_secure.mk
+
 ifndef CONFIG_SPL_BUILD
+ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
+ALL-y += u-boot_HS_MLO
+else
 ALL-y += MLO
 endif
+endif
 
 MKIMAGEFLAGS_u-boot-spl.gph = -A $(ARCH) -T gpimage -C none \
-a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE) -n SPL
-- 
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[U-Boot] [RESEND PATCH 0/9] Add support for secure boot on Keystone2 SoCs

[Andrew F. Davis]

Hello all,

This series adds support for secure Keystone2 K2E and K2HK devices,
much of the work is borrowed from the OMAP style devices as the
secure workings are very similar, allowing minimal changes for
this support addition.

Thanks,
Andrew

Changes for resend:
 - Fixup patch authorship

Andrew F. Davis (1):
  defconfig: k2hk_hs_evm: Add k2hk_hs_evm_defconfig

Madan Srinivas (5):
  image: Fixes build warning with CONFIG_FIT_IMAGE_POST_PROCESS
  arm: mach-omap2: Add secure image name common to OMAP and keystone
  ARM: Keystone2: Build secure images for K2
  doc: Updates info on using Keystone2 secure devices
  Kconfig: Adds SYS_TEXT_BASE config option for Keystone2

Vitaly Andrianov (3):
  arm: mach-keystone: Implements FIT post-processing call for keystone
SoCs
  arm: mach-omap2: Enable Kconfig support for K2 HS devices
  defconfig: k2e_hs_evm: Add k2e_hs_evm_defconfig

 Kconfig|  2 +-
 arch/arm/mach-keystone/config.mk   |  6 ++
 arch/arm/mach-keystone/mon.c   | 73 ++
 arch/arm/mach-omap2/Kconfig|  2 +-
 arch/arm/mach-omap2/config_secure.mk   |  6 ++
 configs/k2e_evm_defconfig  |  1 +
 .../{k2e_evm_defconfig => k2e_hs_evm_defconfig}| 15 ++---
 configs/k2g_evm_defconfig  |  1 +
 configs/k2hk_evm_defconfig |  1 +
 .../{k2hk_evm_defconfig => k2hk_hs_evm_defconfig}  | 13 ++--
 configs/k2l_evm_defconfig  |  1 +
 doc/README.ti-secure   | 20 ++
 include/image.h|  3 +-
 13 files changed, 122 insertions(+), 22 deletions(-)
 copy configs/{k2e_evm_defconfig => k2e_hs_evm_defconfig} (78%)
 copy configs/{k2hk_evm_defconfig => k2hk_hs_evm_defconfig} (80%)

-- 
2.11.0

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Re: [U-Boot] [PATCH] spi: cadence_qspi_apb: Add trigger-base DT bindings from Linux

[R, Vignesh]

On 2/24/2017 12:55 AM, Marek Vasut wrote:
> On 02/23/2017 08:22 PM, Rush, Jason A. wrote:
>> Marek Vasut wrote:
>>> On 02/22/2017 06:37 PM, Rush, Jason A. wrote:
 Marek Vasut wrote:
> On 02/21/2017 05:50 PM, Rush, Jason A. wrote:
[...]
>>
>> While I was debugging some of my changes, I noticed that the data being read 
>> from the
>> QSPI flash device appears to be random.  The CPU no longer resets while 
>> performing a
>> read when the indirect trigger address is setup correctly for the Altrera 
>> SoC, but there
>> appears to be a larger problem with reading data in general.
>>

How random is it? Is the problem seen only when unaligned read/write are
done or when length of transfer is not a multiple of word(4 byte)?
If the data is really random in all cases, then I suspect timing issues.
Please see if delay values are populated correctly in DT.

>> When I apply my patch to the v2016.11 release, reads appear correct.  
>> However, when I
>> apply my patch to the v2017.01 release, the data read from the QSPI device 
>> appear to be
>> random/corrupt.  I noticed the cadence_spi_apb.c file changed significantly 
>> between
>> v2016.11 and v2017.01, possibly a change in this file is causing the problem 
>> on the Altera
>> SoC.
>>
>> I'm not really that familiar with the cadence device, so this issue is 
>> getting a little beyond a
>> simple patch to setup the indirect trigger address correctly for the Altrera 
>> SoC.  Is there
>> anyone more familiar with the cadence device on the Altera SoC that could 
>> take a look
>> into this?
> 
> Vignesh did those changes, so I think he can assist you. In the
> meantime, you can try git bisect . Another thing you can try is
> disabling the dcache and see if that fixes things (dcache off),
> I recall seeing some caching issues with CQSPI.
> 

You could try reverting my commits:
commit 57897c13de03ac0136d64641a3eab526c6810387 spi: cadence_qspi_apb:
Use 32 bit indirect write transaction when possible
commit b63b46313ed29e9b0c36b3d6b9407f6eade40c8f spi: cadence_qspi_apb:
Use 32 bit indirect read transaction when possible

But there were other patches by others in v2017.01-rc1, like
spi: cadence_qspi: Fix CS timings which may have impact.


-- 
Regards
Vignesh
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[U-Boot] [PATCH v4 14/15] i.MX6Q: icorem6_rqs: Add mmc_late_init

[Jagan Teki]

From: Jagan Teki 

Let the runtime code can set the mmcdev and mmcroot based
on the devno using mmc_get_env_dev instead of defining
separately in build-time configs using mmc_late_init func.

Cc: Stefano Babic 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 board/engicam/icorem6_rqs/icorem6_rqs.c | 22 ++
 include/configs/imx6qdl_icore_rqs.h |  2 --
 2 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c 
b/board/engicam/icorem6_rqs/icorem6_rqs.c
index cc7f897..04fb0c2 100644
--- a/board/engicam/icorem6_rqs/icorem6_rqs.c
+++ b/board/engicam/icorem6_rqs/icorem6_rqs.c
@@ -7,6 +7,7 @@
  */
 
 #include 
+#include 
 
 #include 
 #include 
@@ -45,6 +46,24 @@ int board_init(void)
return 0;
 }
 
+#ifdef CONFIG_ENV_IS_IN_MMC
+static void mmc_late_init(void)
+{
+   char cmd[32];
+   char mmcblk[32];
+   u32 dev_no = mmc_get_env_dev();
+
+   setenv_ulong("mmcdev", dev_no);
+
+   /* Set mmcblk env */
+   sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", dev_no);
+   setenv("mmcroot", mmcblk);
+
+   sprintf(cmd, "mmc dev %d", dev_no);
+   run_command(cmd, 0);
+}
+#endif
+
 int board_late_init(void)
 {
switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >>
@@ -53,6 +72,9 @@ int board_late_init(void)
case IMX6_BMODE_ESD:
case IMX6_BMODE_MMC:
case IMX6_BMODE_EMMC:
+#ifdef CONFIG_ENV_IS_IN_MMC
+   mmc_late_init();
+#endif
setenv("modeboot", "mmcboot");
break;
default:
diff --git a/include/configs/imx6qdl_icore_rqs.h 
b/include/configs/imx6qdl_icore_rqs.h
index c62c1d4..3358320 100644
--- a/include/configs/imx6qdl_icore_rqs.h
+++ b/include/configs/imx6qdl_icore_rqs.h
@@ -40,9 +40,7 @@
"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
"fdt_addr=0x1800\0" \
"boot_fdt=try\0" \
-   "mmcdev=0\0" \
"mmcpart=1\0" \
-   "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
"mmcautodetect=yes\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"root=${mmcroot}\0" \
-- 
1.9.1

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[U-Boot] [PATCH v4 15/15] i.MX6Q: isiot: Switch the mmc env based on devno

[Jagan Teki]

From: Jagan Teki 

Add board_mmc_get_env_dev

Switch the mmc env based on the mmc devno, instead of separately
defining a config item in include/configs using board_mmc_get_env_dev
- devno 0: sd/esd
- devno 1: mmc/emmc

Cc: Stefano Babic 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 board/engicam/icorem6_rqs/icorem6_rqs.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c 
b/board/engicam/icorem6_rqs/icorem6_rqs.c
index 04fb0c2..01380f1 100644
--- a/board/engicam/icorem6_rqs/icorem6_rqs.c
+++ b/board/engicam/icorem6_rqs/icorem6_rqs.c
@@ -47,6 +47,12 @@ int board_init(void)
 }
 
 #ifdef CONFIG_ENV_IS_IN_MMC
+int board_mmc_get_env_dev(int devno)
+{
+   /* dev 0 for SD/eSD, dev 1 for MMC/eMMC */
+   return (devno == 3) ? 1 : 0;
+}
+
 static void mmc_late_init(void)
 {
char cmd[32];
-- 
1.9.1

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[U-Boot] [PATCH v2 3/3] board: at91sam9260ek: clean up code

[Wenyou Yang]

Since the introduction of the pinctrl and clk drivers and the
device tree files, remove unneeded hard coded related code from
the board file.

Signed-off-by: Wenyou Yang 
---

Changes in v2: None

 board/atmel/at91sam9260ek/at91sam9260ek.c | 73 ---
 1 file changed, 73 deletions(-)

diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c 
b/board/atmel/at91sam9260ek/at91sam9260ek.c
index 98193bfdc6..e1bbc93924 100644
--- a/board/atmel/at91sam9260ek/at91sam9260ek.c
+++ b/board/atmel/at91sam9260ek/at91sam9260ek.c
@@ -13,12 +13,6 @@
 #include 
 #include 
 #include 
-#include 
-
-#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
-# include 
-#endif
-#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -67,63 +61,8 @@ static void at91sam9260ek_nand_hw_init(void)
 }
 #endif
 
-#ifdef CONFIG_MACB
-static void at91sam9260ek_macb_hw_init(void)
-{
-   struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
-
-   at91_periph_clk_enable(ATMEL_ID_EMAC0);
-
-   /*
-* Disable pull-up on:
-*  RXDV (PA17) => PHY normal mode (not Test mode)
-*  ERX0 (PA14) => PHY ADDR0
-*  ERX1 (PA15) => PHY ADDR1
-*  ERX2 (PA25) => PHY ADDR2
-*  ERX3 (PA26) => PHY ADDR3
-*  ECRS (PA28) => PHY ADDR4  => PHYADDR = 0x0
-*
-* PHY has internal pull-down
-*/
-   writel(pin_to_mask(AT91_PIN_PA14) |
-   pin_to_mask(AT91_PIN_PA15) |
-   pin_to_mask(AT91_PIN_PA17) |
-   pin_to_mask(AT91_PIN_PA25) |
-   pin_to_mask(AT91_PIN_PA26) |
-   pin_to_mask(AT91_PIN_PA28),
-   >pudr);
-
-   at91_phy_reset();
-
-   /* Re-enable pull-up */
-   writel(pin_to_mask(AT91_PIN_PA14) |
-   pin_to_mask(AT91_PIN_PA15) |
-   pin_to_mask(AT91_PIN_PA17) |
-   pin_to_mask(AT91_PIN_PA25) |
-   pin_to_mask(AT91_PIN_PA26) |
-   pin_to_mask(AT91_PIN_PA28),
-   >puer);
-
-   /* Initialize EMAC=MACB hardware */
-   at91_macb_hw_init();
-}
-#endif
-
-#ifdef CONFIG_GENERIC_ATMEL_MCI
-int board_mmc_init(bd_t *bd)
-{
-   at91_mci_hw_init();
-
-   return atmel_mci_init((void *)ATMEL_BASE_MCI);
-}
-#endif
-
 int board_early_init_f(void)
 {
-   at91_periph_clk_enable(ATMEL_ID_PIOA);
-   at91_periph_clk_enable(ATMEL_ID_PIOB);
-   at91_periph_clk_enable(ATMEL_ID_PIOC);
-
return 0;
 }
 
@@ -139,9 +78,6 @@ int board_init(void)
 #ifdef CONFIG_HAS_DATAFLASH
at91_spi0_hw_init((1 << 0) | (1 << 1));
 #endif
-#ifdef CONFIG_MACB
-   at91sam9260ek_macb_hw_init();
-#endif
 
return 0;
 }
@@ -159,12 +95,3 @@ void reset_phy(void)
 {
 }
 #endif
-
-int board_eth_init(bd_t *bis)
-{
-   int rc = 0;
-#ifdef CONFIG_MACB
-   rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
-#endif
-   return rc;
-}
-- 
2.11.0

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[U-Boot] [PATCH v4 08/15] i.MX6UL: isiot: Add mmc_late_init

[Jagan Teki]

From: Jagan Teki 

Let the runtime code can set the mmcdev and mmcroot based
on the devno using mmc_get_env_dev instead of defining
separately in build-time configs using mmc_late_init func.

Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Reviewed by: Stefano Babic 
Signed-off-by: Jagan Teki 
---
 board/engicam/isiotmx6ul/isiotmx6ul.c | 22 ++
 include/configs/imx6ul_isiot.h|  2 --
 2 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c 
b/board/engicam/isiotmx6ul/isiotmx6ul.c
index 0e607e0..b96e4ce 100644
--- a/board/engicam/isiotmx6ul/isiotmx6ul.c
+++ b/board/engicam/isiotmx6ul/isiotmx6ul.c
@@ -7,6 +7,7 @@
  */
 
 #include 
+#include 
 
 #include 
 #include 
@@ -103,6 +104,24 @@ static void setup_gpmi_nand(void)
 }
 #endif /* CONFIG_NAND_MXS */
 
+#ifdef CONFIG_ENV_IS_IN_MMC
+static void mmc_late_init(void)
+{
+   char cmd[32];
+   char mmcblk[32];
+   u32 dev_no = mmc_get_env_dev();
+
+   setenv_ulong("mmcdev", dev_no);
+
+   /* Set mmcblk env */
+   sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", dev_no);
+   setenv("mmcroot", mmcblk);
+
+   sprintf(cmd, "mmc dev %d", dev_no);
+   run_command(cmd, 0);
+}
+#endif
+
 int board_late_init(void)
 {
switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >>
@@ -111,6 +130,9 @@ int board_late_init(void)
case IMX6_BMODE_ESD:
case IMX6_BMODE_MMC:
case IMX6_BMODE_EMMC:
+#ifdef CONFIG_ENV_IS_IN_MMC
+   mmc_late_init();
+#endif
setenv("modeboot", "mmcboot");
break;
case IMX6_BMODE_NAND:
diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h
index 7258fed..4009648 100644
--- a/include/configs/imx6ul_isiot.h
+++ b/include/configs/imx6ul_isiot.h
@@ -45,9 +45,7 @@
"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
"fdt_addr=0x8780\0" \
"boot_fdt=try\0" \
-   "mmcdev=0\0" \
"mmcpart=1\0" \
-   "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
"nandroot=ubi0:rootfs rootfstype=ubifs\0" \
"mmcautodetect=yes\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
-- 
1.9.1

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[U-Boot] [PATCH v2 0/3] board: at91sam9260: convert the boards to support DM and DT

[Wenyou Yang]

The purpose of the patch set is to convert the boards to support
the Driver Model and the Device Tree.

Changes in v2:
 - Add missing conversion default config files for at91sam9xeek.
 - Improve the commit log.

Wenyou Yang (3):
  ARM: dts: at91: add dts file for at91sam9g20/at91sam9260
  configs: at91sam9260: update for DT and DM support
  board: at91sam9260ek: clean up code

 arch/arm/dts/Makefile  |   5 +
 arch/arm/dts/at91sam9260.dtsi  | 136 +++
 arch/arm/dts/at91sam9260ek.dts | 211 +++
 arch/arm/dts/at91sam9g20.dtsi  |   4 +-
 arch/arm/dts/at91sam9g20ek.dts |  29 
 arch/arm/dts/at91sam9g20ek_2mmc.dts|  56 +++
 arch/arm/dts/at91sam9g20ek_common.dtsi | 223 +
 board/atmel/at91sam9260ek/at91sam9260ek.c  |  73 
 configs/at91sam9260ek_dataflash_cs0_defconfig  |  15 +-
 configs/at91sam9260ek_dataflash_cs1_defconfig  |  15 +-
 configs/at91sam9260ek_nandflash_defconfig  |  15 +-
 configs/at91sam9g20ek_2mmc_defconfig   |  16 +-
 configs/at91sam9g20ek_2mmc_nandflash_defconfig |  16 +-
 configs/at91sam9g20ek_dataflash_cs0_defconfig  |  15 +-
 configs/at91sam9g20ek_dataflash_cs1_defconfig  |  15 +-
 configs/at91sam9g20ek_nandflash_defconfig  |  16 +-
 configs/at91sam9xeek_dataflash_cs0_defconfig   |  15 +-
 configs/at91sam9xeek_dataflash_cs1_defconfig   |  15 +-
 configs/at91sam9xeek_nandflash_defconfig   |  15 +-
 include/configs/at91sam9260ek.h|   9 -
 20 files changed, 744 insertions(+), 170 deletions(-)
 create mode 100644 arch/arm/dts/at91sam9260ek.dts
 create mode 100644 arch/arm/dts/at91sam9g20ek.dts
 create mode 100644 arch/arm/dts/at91sam9g20ek_2mmc.dts
 create mode 100644 arch/arm/dts/at91sam9g20ek_common.dtsi

-- 
2.11.0

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[U-Boot] [PATCH v4 05/15] imx6: isiotmx6ul: Update SPL board boot order for eMMC

[Jagan Teki]

From: Jagan Teki 

SPL mmc device index is get based on the boot device, like
- BOOT_DEVICE_MMC1 for mmc device 0
- BOOT_DEVICE_MMC2 for mmc device 1

Currently BOOT_DEVICE_MMC1 is setting both SD/eSD and MMC/eMMC
boot devices in i.MX, So u-boot is loading from mmc device 0 even
"if the board booting from SD/eSD or MMC/eMMC"

So, this patch set BOOT_DEVICE_MMC2 for MMC/eMMC so for MMC/eMMC
the u-boot is loading from mmc device 1 and the board file need to
take care if the board have different mmc device order intialization.

Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Reviewed by: Stefano Babic 
Signed-off-by: Jagan Teki 
---
 board/engicam/isiotmx6ul/isiotmx6ul.c | 26 ++
 1 file changed, 26 insertions(+)

diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c 
b/board/engicam/isiotmx6ul/isiotmx6ul.c
index 20c8aa7..07dd501 100644
--- a/board/engicam/isiotmx6ul/isiotmx6ul.c
+++ b/board/engicam/isiotmx6ul/isiotmx6ul.c
@@ -205,6 +205,32 @@ int board_mmc_init(bd_t *bis)
 
return 0;
 }
+
+#ifdef CONFIG_ENV_IS_IN_MMC
+void board_boot_order(u32 *spl_boot_list)
+{
+   u32 bmode = imx6_src_get_boot_mode();
+   u8 boot_dev = BOOT_DEVICE_MMC1;
+
+   switch ((bmode & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
+   case IMX6_BMODE_SD:
+   case IMX6_BMODE_ESD:
+   /* SD/eSD - BOOT_DEVICE_MMC1 */
+   break;
+   case IMX6_BMODE_MMC:
+   case IMX6_BMODE_EMMC:
+   /* MMC/eMMC */
+   boot_dev = BOOT_DEVICE_MMC2;
+   break;
+   default:
+   /* Default - BOOT_DEVICE_MMC1 */
+   printf("Wrong board boot order\n");
+   break;
+   }
+
+   spl_boot_list[0] = boot_dev;
+}
+#endif
 #endif /* CONFIG_FSL_ESDHC */
 
 static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {
-- 
1.9.1

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[U-Boot] [PATCH v4 01/15] imx6: Add imx6_src_get_boot_mode

[Jagan Teki]

For i.MX6, the bootmode determine code is part of spl_boot_device,
but there is might be a possibility for other part the code need to
check the desired boot mode for adding new functionalities like
modeboot env variable, or changing boot order etc.

So introduced imx6_src_get_boot_mode which actually reading the
boot mode register for desired modes.

More cleanup will be add in future patches.

Cc: Stefano Babic 
Cc: Tim Harvey 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/imx-common/init.c  | 12 
 arch/arm/imx-common/spl.c   |  4 ++--
 arch/arm/include/asm/imx-common/sys_proto.h | 14 ++
 3 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/arch/arm/imx-common/init.c b/arch/arm/imx-common/init.c
index e5dbd93..036ebb2 100644
--- a/arch/arm/imx-common/init.c
+++ b/arch/arm/imx-common/init.c
@@ -115,3 +115,15 @@ void boot_mode_apply(unsigned cfg_val)
writel(reg, >gpr10);
 }
 #endif
+
+#if defined(CONFIG_MX6)
+u32 imx6_src_get_boot_mode(void)
+{
+   struct src *psrc = (struct src *)SRC_BASE_ADDR;
+
+   if (imx6_is_bmode_from_gpr9())
+   return readl(>gpr9);
+   else
+   return readl(>sbmr1);
+}
+#endif
diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c
index 46325ec..6c20f28 100644
--- a/arch/arm/imx-common/spl.c
+++ b/arch/arm/imx-common/spl.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -19,9 +20,8 @@
 u32 spl_boot_device(void)
 {
struct src *psrc = (struct src *)SRC_BASE_ADDR;
-   unsigned int gpr10_boot = readl(>gpr10) & (1 << 28);
-   unsigned reg = gpr10_boot ? readl(>gpr9) : readl(>sbmr1);
unsigned int bmode = readl(>sbmr2);
+   u32 reg = imx6_src_get_boot_mode();
 
/*
 * Check for BMODE if serial downloader is enabled
diff --git a/arch/arm/include/asm/imx-common/sys_proto.h 
b/arch/arm/include/asm/imx-common/sys_proto.h
index 539d34b..99e3869 100644
--- a/arch/arm/include/asm/imx-common/sys_proto.h
+++ b/arch/arm/include/asm/imx-common/sys_proto.h
@@ -8,6 +8,7 @@
 #ifndef _SYS_PROTO_H_
 #define _SYS_PROTO_H_
 
+#include 
 #include 
 #include 
 #include "../arch-imx/cpu.h"
@@ -38,6 +39,19 @@
 #define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL))
 #define is_mx6sll() (is_cpu_type(MXC_CPU_MX6SLL))
 
+#ifdef CONFIG_MX6
+#define IMX6_SRC_GPR10_BMODE   BIT(28)
+
+static inline u8 imx6_is_bmode_from_gpr9(void)
+{
+   struct src *psrc = (struct src *)SRC_BASE_ADDR;
+
+   return readl(>gpr10) & IMX6_SRC_GPR10_BMODE;
+}
+
+u32 imx6_src_get_boot_mode(void);
+#endif /* CONFIG_MX6 */
+
 u32 get_nr_cpus(void);
 u32 get_cpu_rev(void);
 u32 get_cpu_speed_grade_hz(void);
-- 
1.9.1

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[U-Boot] [PATCH v4 02/15] imx: spl: Update NAND bootmode detection bit

[Jagan Teki]

BOOT_CFG1[7:4] the NAND boot mode selection is done
only when BOOT_CFG1[7] is 1 hence update the NAND
boot mode detection bit case. This information available
on Table 8-11. NAND Boot eFUSE Descriptions, from IMX6DQRM.

Cc: Tim Harvey 
Reviewed by: Stefano Babic 
Signed-off-by: Jagan Teki 
---
 arch/arm/imx-common/spl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c
index 6c20f28..81fc0ca 100644
--- a/arch/arm/imx-common/spl.c
+++ b/arch/arm/imx-common/spl.c
@@ -63,8 +63,8 @@ u32 spl_boot_device(void)
case 0x6:
case 0x7:
return BOOT_DEVICE_MMC1;
-   /* NAND Flash: 8.5.2 */
-   case 0x8 ... 0xf:
+   /* NAND Flash: 8.5.2, Table 8-10 */
+   case 0x8:
return BOOT_DEVICE_NAND;
}
return BOOT_DEVICE_NONE;
-- 
1.9.1

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[U-Boot] [PATCH v2 1/3] ARM: dts: at91: add dts file for at91sam9g20/at91sam9260

[Wenyou Yang]

The device tree source files of at91sam9g20ek and at91sam9260ek
boards are copied from the Linux v4.10, do the changes below.
 - Fix the build error for the usb0 node.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the clk pinctrl of the mmc0 node.
 - Fix the compile warnings.

Signed-off-by: Wenyou Yang 
---

Changes in v2: None

 arch/arm/dts/Makefile  |   5 +
 arch/arm/dts/at91sam9260.dtsi  | 136 ++--
 arch/arm/dts/at91sam9260ek.dts | 211 +++
 arch/arm/dts/at91sam9g20.dtsi  |   4 +-
 arch/arm/dts/at91sam9g20ek.dts |  29 +
 arch/arm/dts/at91sam9g20ek_2mmc.dts|  56 +
 arch/arm/dts/at91sam9g20ek_common.dtsi | 223 +
 7 files changed, 596 insertions(+), 68 deletions(-)
 create mode 100644 arch/arm/dts/at91sam9260ek.dts
 create mode 100644 arch/arm/dts/at91sam9g20ek.dts
 create mode 100644 arch/arm/dts/at91sam9g20ek_2mmc.dts
 create mode 100644 arch/arm/dts/at91sam9g20ek_common.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index fce84b4e12..76dc6562ed 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -325,6 +325,11 @@ dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
k2e-evm.dtb \
k2g-evm.dtb
 
+dtb-$(CONFIG_TARGET_AT91SAM9260EK) += \
+   at91sam9260ek.dtb   \
+   at91sam9g20ek.dtb   \
+   at91sam9g20ek_2mmc.dtb
+
 dtb-$(CONFIG_TARGET_AT91SAM9X5EK) += \
at91sam9g15ek.dtb   \
at91sam9g25ek.dtb   \
diff --git a/arch/arm/dts/at91sam9260.dtsi b/arch/arm/dts/at91sam9260.dtsi
index d4884dd1c2..39205e9df1 100644
--- a/arch/arm/dts/at91sam9260.dtsi
+++ b/arch/arm/dts/at91sam9260.dtsi
@@ -134,7 +134,7 @@
clocks = <_rc_osc>, <_xtal>;
};
 
-   plla: pllack {
+   plla: pllack@0 {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = < 
AT91_PMC_LOCKA>;
@@ -146,7 +146,7 @@
<15000 
24000 2 1>;
};
 
-   pllb: pllbck {
+   pllb: pllbck@1 {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = < 
AT91_PMC_LOCKB>;
@@ -180,13 +180,13 @@
interrupt-parent = <>;
clocks = <>, <>, <>, 
<>;
 
-   prog0: prog0 {
+   prog0: prog@0 {
#clock-cells = <0>;
reg = <0>;
interrupts = 
;
};
 
-   prog1: prog1 {
+   prog1: prog@1 {
#clock-cells = <0>;
reg = <1>;
interrupts = 
;
@@ -198,25 +198,25 @@
#address-cells = <1>;
#size-cells = <0>;
 
-   uhpck: uhpck {
+   uhpck: uhpck@6 {
#clock-cells = <0>;
reg = <6>;
clocks = <>;
};
 
-   udpck: udpck {
+   udpck: udpck@7 {
#clock-cells = <0>;
reg = <7>;
clocks = <>;
};
 
-   pck0: pck0 {
+   pck0: pck0@8 {
#clock-cells = <0>;
reg = <8>;
clocks = <>;
};
 
-   pck1: pck1 {
+   pck1: pck1@9 {
#clock-cells = <0>;
 

[U-Boot] [PATCH v4 03/15] imx: Use IMX6_BMODE_* macros instead of numericals

[Jagan Teki]

Use meaningful macros IMX6_BMODE_*, instead of numerical
number in boot mode detection code.

Cc: Tim Harvey 
Acked-by: Stefano Babic 
Signed-off-by: Jagan Teki 
---
Changes for v4:
- Add IMX6_BMODE_UART macro for uart bootmode
- Remove value assignment in enum, since all enum list is order
Changes for v3:
- Update IMX6_BMODE_* shift macros with real number instead of bitops
- %s/IMX6_BMODE_SERIAL/IMX6_BMODE_SERIAL_ROM
- Assign enums with numbers so-that it can easy to see same in RM

 arch/arm/imx-common/spl.c   | 40 ++---
 arch/arm/include/asm/imx-common/sys_proto.h | 35 +
 2 files changed, 60 insertions(+), 15 deletions(-)

diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c
index 81fc0ca..614e05c 100644
--- a/arch/arm/imx-common/spl.c
+++ b/arch/arm/imx-common/spl.c
@@ -29,42 +29,52 @@ u32 spl_boot_device(void)
 */
if (((bmode >> 24) & 0x03) == 0x01) /* Serial Downloader */
return BOOT_DEVICE_UART;
+
/* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
-   switch ((reg & 0x00FF) >> 4) {
+   switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
 /* EIM: See 8.5.1, Table 8-9 */
-   case 0x0:
+   case IMX6_BMODE_EMI:
/* BOOT_CFG1[3]: NOR/OneNAND Selection */
-   if ((reg & 0x0008) >> 3)
+   switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) {
+   case IMX6_BMODE_ONENAND:
return BOOT_DEVICE_ONENAND;
-   else
+   case IMX6_BMODE_NOR:
return BOOT_DEVICE_NOR;
break;
+   }
/* Reserved: Used to force Serial Downloader */
-   case 0x1:
+   case IMX6_BMODE_UART:
return BOOT_DEVICE_UART;
/* SATA: See 8.5.4, Table 8-20 */
-   case 0x2:
+   case IMX6_BMODE_SATA:
return BOOT_DEVICE_SATA;
/* Serial ROM: See 8.5.5.1, Table 8-22 */
-   case 0x3:
+   case IMX6_BMODE_SERIAL_ROM:
/* BOOT_CFG4[2:0] */
-   switch ((reg & 0x0700) >> 24) {
-   case 0x0 ... 0x4:
+   switch ((reg & IMX6_BMODE_SERIAL_ROM_MASK) >>
+   IMX6_BMODE_SERIAL_ROM_SHIFT) {
+   case IMX6_BMODE_ECSPI1:
+   case IMX6_BMODE_ECSPI2:
+   case IMX6_BMODE_ECSPI3:
+   case IMX6_BMODE_ECSPI4:
+   case IMX6_BMODE_ECSPI5:
return BOOT_DEVICE_SPI;
-   case 0x5 ... 0x7:
+   case IMX6_BMODE_I2C1:
+   case IMX6_BMODE_I2C2:
+   case IMX6_BMODE_I2C3:
return BOOT_DEVICE_I2C;
}
break;
/* SD/eSD: 8.5.3, Table 8-15  */
-   case 0x4:
-   case 0x5:
+   case IMX6_BMODE_SD:
+   case IMX6_BMODE_ESD:
return BOOT_DEVICE_MMC1;
/* MMC/eMMC: 8.5.3 */
-   case 0x6:
-   case 0x7:
+   case IMX6_BMODE_MMC:
+   case IMX6_BMODE_EMMC:
return BOOT_DEVICE_MMC1;
/* NAND Flash: 8.5.2, Table 8-10 */
-   case 0x8:
+   case IMX6_BMODE_NAND:
return BOOT_DEVICE_NAND;
}
return BOOT_DEVICE_NONE;
diff --git a/arch/arm/include/asm/imx-common/sys_proto.h 
b/arch/arm/include/asm/imx-common/sys_proto.h
index 99e3869..e09caeb 100644
--- a/arch/arm/include/asm/imx-common/sys_proto.h
+++ b/arch/arm/include/asm/imx-common/sys_proto.h
@@ -42,6 +42,41 @@
 #ifdef CONFIG_MX6
 #define IMX6_SRC_GPR10_BMODE   BIT(28)
 
+#define IMX6_BMODE_MASKGENMASK(7, 0)
+#defineIMX6_BMODE_SHIFT4
+#define IMX6_BMODE_EMI_MASKBIT(3)
+#define IMX6_BMODE_EMI_SHIFT   3
+#define IMX6_BMODE_SERIAL_ROM_MASK GENMASK(26, 24)
+#define IMX6_BMODE_SERIAL_ROM_SHIFT24
+
+enum imx6_bmode_serial_rom {
+   IMX6_BMODE_ECSPI1,
+   IMX6_BMODE_ECSPI2,
+   IMX6_BMODE_ECSPI3,
+   IMX6_BMODE_ECSPI4,
+   IMX6_BMODE_ECSPI5,
+   IMX6_BMODE_I2C1,
+   IMX6_BMODE_I2C2,
+   IMX6_BMODE_I2C3,
+};
+
+enum imx6_bmode_emi {
+   IMX6_BMODE_ONENAND,
+   IMX6_BMODE_NOR,
+};
+
+enum imx6_bmode {
+   IMX6_BMODE_EMI,
+   IMX6_BMODE_UART,
+   IMX6_BMODE_SATA,
+   IMX6_BMODE_SERIAL_ROM,
+   IMX6_BMODE_SD,
+   IMX6_BMODE_ESD,
+   IMX6_BMODE_MMC,
+   IMX6_BMODE_EMMC,
+   IMX6_BMODE_NAND,
+};
+
 static inline u8 imx6_is_bmode_from_gpr9(void)
 {
struct src *psrc = (struct src *)SRC_BASE_ADDR;
-- 
1.9.1

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[U-Boot] [PATCH v4 13/15] i.MX6Q: icorem6_rqs: Add modeboot env via board_late_init

[Jagan Teki]

From: Jagan Teki 

Add runtime, modeboot env which is setting mmcboot based
on the bootdevice so-that conditional macros for MMC via
CONFIG_BOOTCOMMAND should be avoided in config files.

Cc: Stefano Babic 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 board/engicam/icorem6_rqs/icorem6_rqs.c | 18 ++
 configs/imx6dl_icore_rqs_mmc_defconfig  |  1 +
 configs/imx6q_icore_rqs_mmc_defconfig   |  1 +
 include/configs/imx6qdl_icore_rqs.h | 32 
 4 files changed, 36 insertions(+), 16 deletions(-)

diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c 
b/board/engicam/icorem6_rqs/icorem6_rqs.c
index 175bda5..cc7f897 100644
--- a/board/engicam/icorem6_rqs/icorem6_rqs.c
+++ b/board/engicam/icorem6_rqs/icorem6_rqs.c
@@ -45,6 +45,24 @@ int board_init(void)
return 0;
 }
 
+int board_late_init(void)
+{
+   switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >>
+   IMX6_BMODE_SHIFT) {
+   case IMX6_BMODE_SD:
+   case IMX6_BMODE_ESD:
+   case IMX6_BMODE_MMC:
+   case IMX6_BMODE_EMMC:
+   setenv("modeboot", "mmcboot");
+   break;
+   default:
+   setenv("modeboot", "");
+   break;
+   }
+
+   return 0;
+}
+
 int dram_init(void)
 {
gd->ram_size = imx_ddr_size();
diff --git a/configs/imx6dl_icore_rqs_mmc_defconfig 
b/configs/imx6dl_icore_rqs_mmc_defconfig
index 3b10e99..b15fcb2 100644
--- a/configs/imx6dl_icore_rqs_mmc_defconfig
+++ b/configs/imx6dl_icore_rqs_mmc_defconfig
@@ -38,3 +38,4 @@ CONFIG_FEC_MXC=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_MXC_UART=y
+CONFIG_BOARD_LATE_INIT=y
diff --git a/configs/imx6q_icore_rqs_mmc_defconfig 
b/configs/imx6q_icore_rqs_mmc_defconfig
index 8df4ef0..987fdf7 100644
--- a/configs/imx6q_icore_rqs_mmc_defconfig
+++ b/configs/imx6q_icore_rqs_mmc_defconfig
@@ -38,3 +38,4 @@ CONFIG_FEC_MXC=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_MXC_UART=y
+CONFIG_BOARD_LATE_INIT=y
diff --git a/include/configs/imx6qdl_icore_rqs.h 
b/include/configs/imx6qdl_icore_rqs.h
index cd94c5f..c62c1d4 100644
--- a/include/configs/imx6qdl_icore_rqs.h
+++ b/include/configs/imx6qdl_icore_rqs.h
@@ -56,8 +56,7 @@
"fitboot=echo Booting FIT image from mmc ...; " \
"run mmcargs; " \
"bootm ${loadaddr}\0" \
-   "mmcboot=echo Booting from mmc ...; " \
-   "run mmcargs; " \
+   "_mmcboot=run mmcargs; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if run loadfdt; then " \
"bootm ${loadaddr} - ${fdt_addr}; " \
@@ -70,23 +69,24 @@
"fi; " \
"else " \
"bootm; " \
-   "fi\0"
-
-#define CONFIG_BOOTCOMMAND \
-   "mmc dev ${mmcdev};" \
-   "if mmc rescan; then " \
-   "if run loadbootscript; then " \
-   "run bootscript; " \
-   "else " \
-   "if run loadfit; then " \
-   "run fitboot; " \
+   "fi\0" \
+   "mmcboot=echo Booting from mmc ...; " \
+   "mmc dev ${mmcdev};" \
+   "if mmc rescan; then " \
+   "if run loadbootscript; then " \
+   "run bootscript; " \
"else " \
-   "if run loadimage; then " \
-   "run mmcboot; " \
+   "if run loadfit; then " \
+   "run fitboot; " \
+   "else " \
+   "if run loadimage; then " \
+   "run _mmcboot; " \
+   "fi; " \
"fi; " \
"fi; " \
-   "fi; " \
-   "fi"
+   "fi\0"
+
+#define CONFIG_BOOTCOMMAND "run $modeboot"
 
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_MEMTEST_START   0x8000
-- 
1.9.1

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[U-Boot] [PATCH v4 12/15] imx6: icorem6_rqs: Add eMMC boot support

[Jagan Teki]

From: Jagan Teki 

Boot from eMMC:
--
U-Boot SPL 2017.01-00318-g8e243f8 (Jan 26 2017 - 11:53:21)
Trying to boot from MMC2

U-Boot 2017.01-00318-g8e243f8 (Jan 26 2017 - 11:53:21 +0100)

CPU:   Freescale i.MX6D rev1.2 at 792 MHz
Reset cause: POR
Model: Engicam i.CoreM6 Quad/Dual RQS Starter Kit
DRAM:  512 MiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
*** Warning - bad CRC, using default environment

In:serial
Out:   serial
Err:   serial
switch to partitions #0, OK
mmc1(part 0) is current device
Net:   No ethernet found.
Hit any key to stop autoboot:  0
Booting from mmc ...
switch to partitions #0, OK
mmc1(part 0) is current device

Cc: Stefano Babic 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 board/engicam/icorem6_rqs/icorem6_rqs.c | 24 ++--
 include/configs/imx6qdl_icore_rqs.h |  2 +-
 2 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c 
b/board/engicam/icorem6_rqs/icorem6_rqs.c
index e3c520f..175bda5 100644
--- a/board/engicam/icorem6_rqs/icorem6_rqs.c
+++ b/board/engicam/icorem6_rqs/icorem6_rqs.c
@@ -77,8 +77,22 @@ static iomux_v3_cfg_t const usdhc3_pads[] = {
IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 };
 
-struct fsl_esdhc_cfg usdhc_cfg[1] = {
+static iomux_v3_cfg_t const usdhc4_pads[] = {
+   IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+   IOMUX_PADS(PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+};
+
+struct fsl_esdhc_cfg usdhc_cfg[2] = {
{USDHC3_BASE_ADDR, 1, 4},
+   {USDHC4_BASE_ADDR, 1, 8},
 };
 
 int board_mmc_getcd(struct mmc *mmc)
@@ -88,6 +102,7 @@ int board_mmc_getcd(struct mmc *mmc)
 
switch (cfg->esdhc_base) {
case USDHC3_BASE_ADDR:
+   case USDHC4_BASE_ADDR:
ret = 1;
break;
}
@@ -102,7 +117,8 @@ int board_mmc_init(bd_t *bis)
/*
* According to the board_mmc_init() the following map is done:
* (U-boot device node)(Physical Port)
-   * mmc0  USDHC3
+   * mmc0  USDHC3
+   * mmc1  USDHC4
*/
for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
switch (i) {
@@ -110,6 +126,10 @@ int board_mmc_init(bd_t *bis)
SETUP_IOMUX_PADS(usdhc3_pads);
usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
break;
+   case 1:
+   SETUP_IOMUX_PADS(usdhc4_pads);
+   usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+   break;
default:
printf("Warning - USDHC%d controller not supporting\n",
   i + 1);
diff --git a/include/configs/imx6qdl_icore_rqs.h 
b/include/configs/imx6qdl_icore_rqs.h
index 6f7195d..cd94c5f 100644
--- a/include/configs/imx6qdl_icore_rqs.h
+++ b/include/configs/imx6qdl_icore_rqs.h
@@ -124,7 +124,7 @@
 /* MMC */
 #ifdef CONFIG_FSL_USDHC
 # define CONFIG_SYS_MMC_ENV_DEV0
-# define CONFIG_SYS_FSL_USDHC_NUM  1
+# define CONFIG_SYS_FSL_USDHC_NUM  2
 # define CONFIG_SYS_FSL_ESDHC_ADDR 0
 #endif
 
-- 
1.9.1

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[U-Boot] [PATCH v4 09/15] i.MX6UL: isiot: Switch the mmc env based on devno

[Jagan Teki]

From: Jagan Teki 

Add board_mmc_get_env_dev

Switch the mmc env based on the mmc devno, instead of separately
defining a config item in include/configs using board_mmc_get_env_dev
- devno 0: sd/esd
- devno 1: mmc/emmc

Cc: Stefano Babic 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 board/engicam/isiotmx6ul/isiotmx6ul.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c 
b/board/engicam/isiotmx6ul/isiotmx6ul.c
index b96e4ce..29a137d 100644
--- a/board/engicam/isiotmx6ul/isiotmx6ul.c
+++ b/board/engicam/isiotmx6ul/isiotmx6ul.c
@@ -105,6 +105,12 @@ static void setup_gpmi_nand(void)
 #endif /* CONFIG_NAND_MXS */
 
 #ifdef CONFIG_ENV_IS_IN_MMC
+int board_mmc_get_env_dev(int devno)
+{
+   /* dev 0 for SD/eSD, dev 1 for MMC/eMMC */
+   return (devno == 0) ? 0 : 1;
+}
+
 static void mmc_late_init(void)
 {
char cmd[32];
-- 
1.9.1

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[U-Boot] [PATCH v4 10/15] arm: dts: imx6qdl-icore-rqs: Add eMMC node

[Jagan Teki]

Add usdhc4 node, which is eMMC for Engicam i.CoreM6 RQS modules.

eMMC Log:

icorem6qdl-rqs> mmc dev 1
switch to partitions #0, OK
mmc1(part 0) is current device
icorem6qdl-rqs> mmcinfo
Device: FSL_SDHC
Manufacturer ID: fe
OEM: 14e
Name: MMC04
Tran Speed: 5200
Rd Block Len: 512
MMC version 4.4.1
High Capacity: Yes
Capacity: 3.5 GiB
Bus Width: 4-bit
Erase Group Size: 512 KiB
HC WP Group Size: 4 MiB
User Capacity: 3.5 GiB
Boot Capacity: 16 MiB ENH
RPMB Capacity: 128 KiB ENH

Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Reviewed by: Stefano Babic 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/imx6qdl-icore-rqs.dtsi | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/dts/imx6qdl-icore-rqs.dtsi 
b/arch/arm/dts/imx6qdl-icore-rqs.dtsi
index 750229b..8b9d5b4 100644
--- a/arch/arm/dts/imx6qdl-icore-rqs.dtsi
+++ b/arch/arm/dts/imx6qdl-icore-rqs.dtsi
@@ -107,6 +107,13 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_usdhc4>;
+   no-1-8-v;
+   status = "okay";
+};
+
  {
pinctrl_enet: enetgrp {
fsl,pins = <
@@ -167,4 +174,19 @@
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
>;
};
+
+   pinctrl_usdhc4: usdhc4grp {
+   fsl,pins = <
+   MX6QDL_PAD_SD4_CMD__SD4_CMD0x17070
+   MX6QDL_PAD_SD4_CLK__SD4_CLK0x10070
+   MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+   MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+   MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+   MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+   MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+   MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+   MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+   MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+   >;
+   };
 };
-- 
1.9.1

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[U-Boot] [PATCH v4 11/15] imx6: icorem6_rqs: Update SPL board boot order for eMMC

[Jagan Teki]

SPL mmc device index is get based on the boot device, like
- BOOT_DEVICE_MMC1 for mmc device 0
- BOOT_DEVICE_MMC2 for mmc device 1

Currently BOOT_DEVICE_MMC1 is setting both SD/eSD and MMC/eMMC
boot devices in i.MX, So u-boot is loading from mmc device 0 even
"if the board booting from SD/eSD or MMC/eMMC"

So, this patch set BOOT_DEVICE_MMC2 for MMC/eMMC so for MMC/eMMC
the u-boot is loading from mmc device 1 and the board file need to
take care if the board have different mmc device order intialization.

Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Reviewed by: Stefano Babic 
Signed-off-by: Jagan Teki 
---
 board/engicam/icorem6_rqs/icorem6_rqs.c | 26 ++
 1 file changed, 26 insertions(+)

diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c 
b/board/engicam/icorem6_rqs/icorem6_rqs.c
index 2769177..e3c520f 100644
--- a/board/engicam/icorem6_rqs/icorem6_rqs.c
+++ b/board/engicam/icorem6_rqs/icorem6_rqs.c
@@ -125,6 +125,32 @@ int board_mmc_init(bd_t *bis)
 
return 0;
 }
+
+#ifdef CONFIG_ENV_IS_IN_MMC
+void board_boot_order(u32 *spl_boot_list)
+{
+   u32 bmode = imx6_src_get_boot_mode();
+   u8 boot_dev = BOOT_DEVICE_MMC1;
+
+   switch ((bmode & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
+   case IMX6_BMODE_SD:
+   case IMX6_BMODE_ESD:
+   /* SD/eSD - BOOT_DEVICE_MMC1 */
+   break;
+   case IMX6_BMODE_MMC:
+   case IMX6_BMODE_EMMC:
+   /* MMC/eMMC */
+   boot_dev = BOOT_DEVICE_MMC2;
+   break;
+   default:
+   /* Default - BOOT_DEVICE_MMC1 */
+   printf("Wrong board boot order\n");
+   break;
+   }
+
+   spl_boot_list[0] = boot_dev;
+}
+#endif
 #endif
 
 /*
-- 
1.9.1

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[U-Boot] [PATCH v2 2/3] configs: at91sam9260: update for DT and DM support

[Wenyou Yang]

Support the device tree and enable CONFIG_CLK and CONFIG_PINCTRL
options to support at91 clock driver and at91 pinctrl driver.

Enable DM_GPIO, DM_MMC and DM_ETH support, move CONFIG_AT91_GPIO,
CONFIG_GENERIC_ATMEL_MCI and CONFIG_MACB config option to
the default config files.

Signed-off-by: Wenyou Yang 
---

Changes in v2:
 - Add missing conversion default config files for at91sam9xeek.
 - Improve the commit log.

 configs/at91sam9260ek_dataflash_cs0_defconfig  | 15 +--
 configs/at91sam9260ek_dataflash_cs1_defconfig  | 15 +--
 configs/at91sam9260ek_nandflash_defconfig  | 15 +--
 configs/at91sam9g20ek_2mmc_defconfig   | 16 +++-
 configs/at91sam9g20ek_2mmc_nandflash_defconfig | 16 +++-
 configs/at91sam9g20ek_dataflash_cs0_defconfig  | 15 +--
 configs/at91sam9g20ek_dataflash_cs1_defconfig  | 15 +--
 configs/at91sam9g20ek_nandflash_defconfig  | 16 ++--
 configs/at91sam9xeek_dataflash_cs0_defconfig   | 15 +--
 configs/at91sam9xeek_dataflash_cs1_defconfig   | 15 +--
 configs/at91sam9xeek_nandflash_defconfig   | 15 +--
 include/configs/at91sam9260ek.h|  9 -
 12 files changed, 148 insertions(+), 29 deletions(-)

diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig 
b/configs/at91sam9260ek_dataflash_cs0_defconfig
index 36423b2c73..2fe2a3908e 100644
--- a/configs/at91sam9260ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs0_defconfig
@@ -1,7 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9260EK=y
-# CONFIG_MMC is not set
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
+# CONFIG_SYS_MALLOC_F is not set
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS0"
 CONFIG_BOOTDELAY=3
 # CONFIG_DISPLAY_BOARDINFO is not set
@@ -18,6 +19,16 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
+# CONFIG_MMC is not set
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig 
b/configs/at91sam9260ek_dataflash_cs1_defconfig
index 3b2817205e..cfbc87970c 100644
--- a/configs/at91sam9260ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs1_defconfig
@@ -1,7 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9260EK=y
-# CONFIG_MMC is not set
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
+# CONFIG_SYS_MALLOC_F is not set
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS1"
 CONFIG_BOOTDELAY=3
 # CONFIG_DISPLAY_BOARDINFO is not set
@@ -18,6 +19,16 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
+# CONFIG_MMC is not set
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/at91sam9260ek_nandflash_defconfig 
b/configs/at91sam9260ek_nandflash_defconfig
index 4f88507b35..e38e9cb5a3 100644
--- a/configs/at91sam9260ek_nandflash_defconfig
+++ b/configs/at91sam9260ek_nandflash_defconfig
@@ -1,7 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9260EK=y
-# CONFIG_MMC is not set
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
+# CONFIG_SYS_MALLOC_F is not set
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH"
 CONFIG_BOOTDELAY=3
 # CONFIG_DISPLAY_BOARDINFO is not set
@@ -18,6 +19,16 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
+# CONFIG_MMC is not set
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/at91sam9g20ek_2mmc_defconfig 
b/configs/at91sam9g20ek_2mmc_defconfig
index 67c82326a4..4d49983dbc 100644
--- a/configs/at91sam9g20ek_2mmc_defconfig
+++ b/configs/at91sam9g20ek_2mmc_defconfig
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9260EK=y
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc"
+# CONFIG_SYS_MALLOC_F is not set
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC"
 CONFIG_BOOTDELAY=3
 # CONFIG_DISPLAY_BOARDINFO is not set
@@ -18,6 +20,18 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig 

[U-Boot] [PATCH v4 00/15] i.MX6: Engicam i.CoreM6/Is.IoT eMMC boot support

[Jagan Teki]

From: Jagan Teki 

Changes for v3:
- Rebase on master
- Fix checkpatch.pl Warnings
- Add IMX6_BMODE_UART macro for uart bootmode
- Remove value assignment in enum, since all enum list is order

Changes for v3:
- Update IMX6_BMODE_* shift macros with real number instead of bitops
- %s/IMX6_BMODE_SERIAL/IMX6_BMODE_SERIAL_ROM
- Assign enums with numbers so-that it can easy to see same in RM
- Update board MAINTAINERS file with imx6ul-isiot-emmc.dts file

Changes for v2:
- Rebase on master
- Add Is.IoT eMMC boot patches
- Add few mmc env patches on board

Jagan Teki (15):
  imx6: Add imx6_src_get_boot_mode
  imx: spl: Update NAND bootmode detection bit
  imx: Use IMX6_BMODE_* macros instead of numericals
  imx6: Add src_base structure define macro
  imx6: isiotmx6ul: Update SPL board boot order for eMMC
  i.MX6UL: isiot: Add eMMC boot support
  i.MX6UL: isiot: Add modeboot env via board_late_init
  i.MX6UL: isiot: Add mmc_late_init
  i.MX6UL: isiot: Switch the mmc env based on devno
  arm: dts: imx6qdl-icore-rqs: Add eMMC node
  imx6: icorem6_rqs: Update SPL board boot order for eMMC
  imx6: icorem6_rqs: Add eMMC boot support
  i.MX6Q: icorem6_rqs: Add modeboot env via board_late_init
  i.MX6Q: icorem6_rqs: Add mmc_late_init
  i.MX6Q: isiot: Switch the mmc env based on devno

 arch/arm/dts/Makefile   |   1 +
 arch/arm/dts/imx6qdl-icore-rqs.dtsi |  22 ++
 arch/arm/dts/imx6ul-isiot-emmc.dts  |  77 +
 arch/arm/imx-common/init.c  |  10 +++
 arch/arm/imx-common/spl.c   |  49 --
 arch/arm/include/asm/arch-mx6/imx-regs.h|   2 +
 arch/arm/include/asm/imx-common/sys_proto.h |  47 +
 board/engicam/icorem6_rqs/icorem6_rqs.c |  96 +-
 board/engicam/isiotmx6ul/MAINTAINERS|   2 +
 board/engicam/isiotmx6ul/isiotmx6ul.c   | 101 +++-
 configs/imx6dl_icore_rqs_mmc_defconfig  |   1 +
 configs/imx6q_icore_rqs_mmc_defconfig   |   1 +
 configs/imx6ul_isiot_emmc_defconfig |  40 +++
 configs/imx6ul_isiot_mmc_defconfig  |   1 +
 configs/imx6ul_isiot_nand_defconfig |   1 +
 include/configs/imx6qdl_icore_rqs.h |  36 +-
 include/configs/imx6ul_isiot.h  |  40 +--
 17 files changed, 462 insertions(+), 65 deletions(-)
 create mode 100644 arch/arm/dts/imx6ul-isiot-emmc.dts
 create mode 100644 configs/imx6ul_isiot_emmc_defconfig

-- 
1.9.1

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[U-Boot] [PATCH v4 04/15] imx6: Add src_base structure define macro

[Jagan Teki]

Instead of initializing 'struct src' to SRC_BASE_ADDR on
every function better to have global define macro.

Reviewed by: Stefano Babic 
Signed-off-by: Jagan Teki 
---
 arch/arm/imx-common/init.c  | 6 ++
 arch/arm/imx-common/spl.c   | 3 +--
 arch/arm/include/asm/arch-mx6/imx-regs.h| 2 ++
 arch/arm/include/asm/imx-common/sys_proto.h | 4 +---
 4 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/arch/arm/imx-common/init.c b/arch/arm/imx-common/init.c
index 036ebb2..5b4f828 100644
--- a/arch/arm/imx-common/init.c
+++ b/arch/arm/imx-common/init.c
@@ -119,11 +119,9 @@ void boot_mode_apply(unsigned cfg_val)
 #if defined(CONFIG_MX6)
 u32 imx6_src_get_boot_mode(void)
 {
-   struct src *psrc = (struct src *)SRC_BASE_ADDR;
-
if (imx6_is_bmode_from_gpr9())
-   return readl(>gpr9);
+   return readl(_base->gpr9);
else
-   return readl(>sbmr1);
+   return readl(_base->sbmr1);
 }
 #endif
diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c
index 614e05c..f392941 100644
--- a/arch/arm/imx-common/spl.c
+++ b/arch/arm/imx-common/spl.c
@@ -19,8 +19,7 @@
 /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */
 u32 spl_boot_device(void)
 {
-   struct src *psrc = (struct src *)SRC_BASE_ADDR;
-   unsigned int bmode = readl(>sbmr2);
+   unsigned int bmode = readl(_base->sbmr2);
u32 reg = imx6_src_get_boot_mode();
 
/*
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h 
b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 6727c56..646013d 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -473,6 +473,8 @@ struct src {
u32 gpr10;
 };
 
+#define src_base ((struct src *)SRC_BASE_ADDR)
+
 #define SRC_SCR_M4_ENABLE_OFFSET22
 #define SRC_SCR_M4_ENABLE_MASK  (1 << 22)
 #define SRC_SCR_M4C_NON_SCLR_RST_OFFSET 4
diff --git a/arch/arm/include/asm/imx-common/sys_proto.h 
b/arch/arm/include/asm/imx-common/sys_proto.h
index e09caeb..2c13ced 100644
--- a/arch/arm/include/asm/imx-common/sys_proto.h
+++ b/arch/arm/include/asm/imx-common/sys_proto.h
@@ -79,9 +79,7 @@ enum imx6_bmode {
 
 static inline u8 imx6_is_bmode_from_gpr9(void)
 {
-   struct src *psrc = (struct src *)SRC_BASE_ADDR;
-
-   return readl(>gpr10) & IMX6_SRC_GPR10_BMODE;
+   return readl(_base->gpr10) & IMX6_SRC_GPR10_BMODE;
 }
 
 u32 imx6_src_get_boot_mode(void);
-- 
1.9.1

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[U-Boot] [PATCH v4 07/15] i.MX6UL: isiot: Add modeboot env via board_late_init

[Jagan Teki]

From: Jagan Teki 

Add runtime, modeboot env which is setting mmcboot, or
nandboot based on the bootdevice so-that conditional
macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should
be avoided in config files.

Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Reviewed by: Stefano Babic 
Signed-off-by: Jagan Teki 
---
 board/engicam/isiotmx6ul/isiotmx6ul.c | 21 
 configs/imx6ul_isiot_emmc_defconfig   |  1 +
 configs/imx6ul_isiot_mmc_defconfig|  1 +
 configs/imx6ul_isiot_nand_defconfig   |  1 +
 include/configs/imx6ul_isiot.h| 36 ---
 5 files changed, 40 insertions(+), 20 deletions(-)

diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c 
b/board/engicam/isiotmx6ul/isiotmx6ul.c
index 9cde4fc..0e607e0 100644
--- a/board/engicam/isiotmx6ul/isiotmx6ul.c
+++ b/board/engicam/isiotmx6ul/isiotmx6ul.c
@@ -103,6 +103,27 @@ static void setup_gpmi_nand(void)
 }
 #endif /* CONFIG_NAND_MXS */
 
+int board_late_init(void)
+{
+   switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >>
+   IMX6_BMODE_SHIFT) {
+   case IMX6_BMODE_SD:
+   case IMX6_BMODE_ESD:
+   case IMX6_BMODE_MMC:
+   case IMX6_BMODE_EMMC:
+   setenv("modeboot", "mmcboot");
+   break;
+   case IMX6_BMODE_NAND:
+   setenv("modeboot", "nandboot");
+   break;
+   default:
+   setenv("modeboot", "");
+   break;
+   }
+
+   return 0;
+}
+
 int board_init(void)
 {
/* Address of boot parameters */
diff --git a/configs/imx6ul_isiot_emmc_defconfig 
b/configs/imx6ul_isiot_emmc_defconfig
index 94fe808..4c3664f 100644
--- a/configs/imx6ul_isiot_emmc_defconfig
+++ b/configs/imx6ul_isiot_emmc_defconfig
@@ -37,3 +37,4 @@ CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_MXC_UART=y
 CONFIG_IMX_THERMAL=y
+CONFIG_BOARD_LATE_INIT=y
diff --git a/configs/imx6ul_isiot_mmc_defconfig 
b/configs/imx6ul_isiot_mmc_defconfig
index 8ecdd8e..ea2d378 100644
--- a/configs/imx6ul_isiot_mmc_defconfig
+++ b/configs/imx6ul_isiot_mmc_defconfig
@@ -39,3 +39,4 @@ CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_MXC_UART=y
 CONFIG_IMX_THERMAL=y
+CONFIG_BOARD_LATE_INIT=y
diff --git a/configs/imx6ul_isiot_nand_defconfig 
b/configs/imx6ul_isiot_nand_defconfig
index 6f1a054..f02a2ac 100644
--- a/configs/imx6ul_isiot_nand_defconfig
+++ b/configs/imx6ul_isiot_nand_defconfig
@@ -40,3 +40,4 @@ CONFIG_PINCTRL_IMX6=y
 CONFIG_SYS_I2C_MXC=y
 CONFIG_MXC_UART=y
 CONFIG_IMX_THERMAL=y
+CONFIG_BOARD_LATE_INIT=y
diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h
index 1b0e436..7258fed 100644
--- a/include/configs/imx6ul_isiot.h
+++ b/include/configs/imx6ul_isiot.h
@@ -64,8 +64,7 @@
"fitboot=echo Booting FIT image from mmc ...; " \
"run mmcargs; " \
"bootm ${loadaddr}\0" \
-   "mmcboot=echo Booting from mmc ...; " \
-   "run mmcargs; " \
+   "_mmcboot=run mmcargs; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if run loadfdt; then " \
"bootm ${loadaddr} - ${fdt_addr}; " \
@@ -79,6 +78,20 @@
"else " \
"bootm; " \
"fi\0" \
+   "mmcboot=echo Booting from mmc ...; " \
+   "if mmc rescan; then " \
+   "if run loadbootscript; then " \
+   "run bootscript; " \
+   "else " \
+   "if run loadfit; then " \
+   "run fitboot; " \
+   "else " \
+   "if run loadimage; then " \
+   "run _mmcboot; " \
+   "fi; " \
+   "fi; " \
+   "fi; " \
+   "fi\0" \
"nandboot=echo Booting from nand ...; " \
"if mtdparts; then " \
"echo Starting nand boot ...; " \
@@ -90,24 +103,7 @@
"nand read ${fdt_addr} dtb 0x10; " \
"bootm ${loadaddr} - ${fdt_addr}\0"
 
-#ifdef CONFIG_NAND_MXS
-# define CONFIG_BOOTCOMMAND"run nandboot"
-#else
-# define CONFIG_BOOTCOMMAND \
-   "if mmc rescan; then " \
-   "if run loadbootscript; then " \
-   "run bootscript; " \
-   "else " \
-   "if run loadfit; then " \
-   "run fitboot; " \
-   "else " \
-   "if run loadimage; then " \
-   "run mmcboot; " \
-   "fi; " \
-   "fi; " \
-   "fi; " \
-   "fi"

[U-Boot] [PATCH v4 06/15] i.MX6UL: isiot: Add eMMC boot support

[Jagan Teki]

From: Jagan Teki 

Boot from eMMC:
--
U-Boot SPL 2017.01-00314-gd0cd9cd-dirty (Jan 25 2017 - 13:25:27)
Trying to boot from MMC2

U-Boot 2017.01-00314-gd0cd9cd-dirty (Jan 25 2017 - 13:25:27 +0100)

CPU:   Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 36C
Reset cause: POR
Model: Engicam Is.IoT MX6UL eMMC Starterkit
DRAM:  512 MiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
*** Warning - bad CRC, using default environment

In:serial
Out:   serial
Err:   serial
switch to partitions #0, OK
mmc1(part 0) is current device

Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Reviewed by: Stefano Babic 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/Makefile |  1 +
 arch/arm/dts/imx6ul-isiot-emmc.dts| 77 +++
 board/engicam/isiotmx6ul/MAINTAINERS  |  2 +
 board/engicam/isiotmx6ul/isiotmx6ul.c | 26 +++-
 configs/imx6ul_isiot_emmc_defconfig   | 39 ++
 include/configs/imx6ul_isiot.h|  2 +-
 6 files changed, 145 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/dts/imx6ul-isiot-emmc.dts
 create mode 100644 configs/imx6ul_isiot_emmc_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c5c8487..47389b1 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -317,6 +317,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
imx6q-icore-rqs.dtb \
imx6sx-sabreauto.dtb \
imx6ul-geam-kit.dtb \
+   imx6ul-isiot-emmc.dtb \
imx6ul-isiot-mmc.dtb \
imx6ul-isiot-nand.dtb
 
diff --git a/arch/arm/dts/imx6ul-isiot-emmc.dts 
b/arch/arm/dts/imx6ul-isiot-emmc.dts
new file mode 100644
index 000..677de96
--- /dev/null
+++ b/arch/arm/dts/imx6ul-isiot-emmc.dts
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6ul-isiot.dtsi"
+
+/ {
+   model = "Engicam Is.IoT MX6UL eMMC Starterkit";
+   compatible = "engicam,imx6ul-isiot", "fsl,imx6ul";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_usdhc2>;
+   cd-gpios = < 5 GPIO_ACTIVE_LOW>;
+   bus-width = <8>;
+   no-1-8-v;
+   status = "okay";
+};
+
+ {
+   pinctrl_usdhc2: usdhc2grp {
+   fsl,pins = <
+   MX6UL_PAD_NAND_RE_B__USDHC2_CLK  0x17070
+   MX6UL_PAD_NAND_WE_B__USDHC2_CMD  0x10070
+   MX6UL_PAD_NAND_DATA00__USDHC2_DATA0  0x17070
+   MX6UL_PAD_NAND_DATA01__USDHC2_DATA1  0x17070
+   MX6UL_PAD_NAND_DATA02__USDHC2_DATA2  0x17070
+   MX6UL_PAD_NAND_DATA03__USDHC2_DATA3  0x17070
+   MX6UL_PAD_NAND_DATA04__USDHC2_DATA4  0x17070
+   MX6UL_PAD_NAND_DATA05__USDHC2_DATA5  0x17070
+   MX6UL_PAD_NAND_DATA06__USDHC2_DATA6  0x17070
+   

[U-Boot] [PATCH v6 10/10] i.MX6: engicam: Include dts files under MAINTAINERS

[Jagan Teki]

From: Jagan Teki 

dts files related to i.MX6 engicam boards are maintined
under board, so include them under board/engicam/*/MAINTAINERS

Cc: Stefano Babic 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 board/engicam/geam6ul/MAINTAINERS | 1 +
 board/engicam/icorem6/MAINTAINERS | 3 +++
 board/engicam/icorem6_rqs/MAINTAINERS | 3 +++
 3 files changed, 7 insertions(+)

diff --git a/board/engicam/geam6ul/MAINTAINERS 
b/board/engicam/geam6ul/MAINTAINERS
index 079370c..1c31375 100644
--- a/board/engicam/geam6ul/MAINTAINERS
+++ b/board/engicam/geam6ul/MAINTAINERS
@@ -5,3 +5,4 @@ F:  board/engicam/geam6ul
 F: include/configs/imx6ul_geam.h
 F: configs/imx6ul_geam_mmc_defconfig
 F: configs/imx6ul_geam_nand_defconfig
+F: arch/arm/dts/imx6ul-geam-kit.dts
diff --git a/board/engicam/icorem6/MAINTAINERS 
b/board/engicam/icorem6/MAINTAINERS
index 0ef3a2c..6116648 100644
--- a/board/engicam/icorem6/MAINTAINERS
+++ b/board/engicam/icorem6/MAINTAINERS
@@ -7,3 +7,6 @@ F:  configs/imx6q_icore_mmc_defconfig
 F: configs/imx6q_icore_nand_defconfig
 F: configs/imx6dl_icore_mmc_defconfig
 F: configs/imx6dl_icore_nand_defconfig
+F: arch/arm/dts/imx6qdl-icore.dtsi
+F: arch/arm/dts/imx6q-icore.dts
+F: arch/arm/dts/imx6dl-icore.dts
diff --git a/board/engicam/icorem6_rqs/MAINTAINERS 
b/board/engicam/icorem6_rqs/MAINTAINERS
index 0556211..2d2295c 100644
--- a/board/engicam/icorem6_rqs/MAINTAINERS
+++ b/board/engicam/icorem6_rqs/MAINTAINERS
@@ -5,3 +5,6 @@ F:  board/engicam/icorem6_rqs
 F: include/configs/imx6qdl_icore_rqs.h
 F: configs/imx6q_icore_rqs_mmc_defconfig
 F: configs/imx6dl_icore_rqs_mmc_defconfig
+F: arch/arm/dts/imx6qdl-icore-rqs.dtsi
+F: arch/arm/dts/imx6q-icore-rqs.dts
+F: arch/arm/dts/imx6dl-icore-rqs.dts
-- 
1.9.1

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[U-Boot] [PATCH v6 08/10] imx6: isiotmx6ul: Add nandboot env support

[Jagan Teki]

From: Jagan Teki 

Add config options for booting Linux from NAND in UBI format.

Cc: Stefano Babic 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 configs/imx6ul_isiot_nand_defconfig |  1 +
 include/configs/imx6ul_isiot.h  | 32 +++-
 2 files changed, 32 insertions(+), 1 deletion(-)

diff --git a/configs/imx6ul_isiot_nand_defconfig 
b/configs/imx6ul_isiot_nand_defconfig
index 2af146f..d1a9fad 100644
--- a/configs/imx6ul_isiot_nand_defconfig
+++ b/configs/imx6ul_isiot_nand_defconfig
@@ -21,6 +21,7 @@ CONFIG_SYS_PROMPT="isiotmx6ul> "
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
+CONFIG_CMD_UBI=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h
index b137848..10311d0 100644
--- a/include/configs/imx6ul_isiot.h
+++ b/include/configs/imx6ul_isiot.h
@@ -48,9 +48,12 @@
"mmcdev=0\0" \
"mmcpart=1\0" \
"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
+   "nandroot=ubi0:rootfs rootfstype=ubifs\0" \
"mmcautodetect=yes\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"root=${mmcroot}\0" \
+   "ubiargs=setenv bootargs console=${console},${baudrate} " \
+   "ubi.mtd=5 root=${nandroot} ${mtdparts}\0" \
"loadbootscript=" \
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
"bootscript=echo Running bootscript from mmc ...; " \
@@ -75,8 +78,21 @@
"fi; " \
"else " \
"bootm; " \
-   "fi\0"
+   "fi\0" \
+   "nandboot=echo Booting from nand ...; " \
+   "if mtdparts; then " \
+   "echo Starting nand boot ...; " \
+   "else " \
+   "mtdparts default; " \
+   "fi; " \
+   "run ubiargs; " \
+   "nand read ${loadaddr} kernel 0x80; " \
+   "nand read ${fdt_addr} dtb 0x10; " \
+   "bootm ${loadaddr} - ${fdt_addr}\0"
 
+#ifdef CONFIG_NAND_MXS
+# define CONFIG_BOOTCOMMAND"run nandboot"
+#else
 # define CONFIG_BOOTCOMMAND \
"if mmc rescan; then " \
"if run loadbootscript; then " \
@@ -91,6 +107,7 @@
"fi; " \
"fi; " \
"fi"
+#endif
 
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_MEMTEST_START   0x8000
@@ -141,6 +158,19 @@
 # define CONFIG_SYS_NAND_U_BOOT_START  CONFIG_SYS_TEXT_BASE
 # define CONFIG_SYS_NAND_U_BOOT_OFFS   0x20
 
+/* MTD device */
+# define CONFIG_MTD_DEVICE
+# define CONFIG_CMD_MTDPARTS
+# define CONFIG_MTD_PARTITIONS
+# define MTDIDS_DEFAULT"nand0=gpmi-nand"
+# define MTDPARTS_DEFAULT  "mtdparts=gpmi-nand:2m(spl),2m(uboot)," 
\
+   "1m(env),8m(kernel),1m(dtb),-(rootfs)"
+
+/* UBI */
+# define CONFIG_CMD_UBIFS
+# define CONFIG_RBTREE
+# define CONFIG_LZO
+
 /* APBH DMA */
 # define CONFIG_APBH_DMA
 # define CONFIG_APBH_DMA_BURST
-- 
1.9.1

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[U-Boot] [PATCH v6 09/10] imx6ul: isiotmx6ul: Enable I2C support

[Jagan Teki]

From: Jagan Teki 

Enable I2C support for Engicam Is.IoT NAND module.

Cc: Stefano Babic 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 configs/imx6ul_isiot_nand_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/imx6ul_isiot_nand_defconfig 
b/configs/imx6ul_isiot_nand_defconfig
index d1a9fad..6f1a054 100644
--- a/configs/imx6ul_isiot_nand_defconfig
+++ b/configs/imx6ul_isiot_nand_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
@@ -36,5 +37,6 @@ CONFIG_NAND_MXS=y
 CONFIG_FEC_MXC=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
+CONFIG_SYS_I2C_MXC=y
 CONFIG_MXC_UART=y
 CONFIG_IMX_THERMAL=y
-- 
1.9.1

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[U-Boot] [PATCH v6 07/10] imx6: isiotmx6ul: Add NAND support

[Jagan Teki]

From: Jagan Teki 

Add NAND support for Engicam Is.IoT MX6UL board.

Cc: Stefano Babic 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/Makefile |  3 +-
 arch/arm/dts/imx6ul-isiot-nand.dts| 50 +
 board/engicam/isiotmx6ul/MAINTAINERS  |  2 +
 board/engicam/isiotmx6ul/isiotmx6ul.c | 69 +++
 configs/imx6ul_isiot_nand_defconfig   | 39 
 include/configs/imx6ul_isiot.h| 25 -
 6 files changed, 186 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/dts/imx6ul-isiot-nand.dts
 create mode 100644 configs/imx6ul_isiot_nand_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index fc30ac3..c5c8487 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -317,7 +317,8 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
imx6q-icore-rqs.dtb \
imx6sx-sabreauto.dtb \
imx6ul-geam-kit.dtb \
-   imx6ul-isiot-mmc.dtb
+   imx6ul-isiot-mmc.dtb \
+   imx6ul-isiot-nand.dtb
 
 dtb-$(CONFIG_MX7) += imx7-colibri.dtb
 
diff --git a/arch/arm/dts/imx6ul-isiot-nand.dts 
b/arch/arm/dts/imx6ul-isiot-nand.dts
new file mode 100644
index 000..12a3528
--- /dev/null
+++ b/arch/arm/dts/imx6ul-isiot-nand.dts
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6ul-isiot.dtsi"
+
+/ {
+   model = "Engicam Is.IoT MX6UL NAND Starterkit";
+   compatible = "engicam,imx6ul-isiot", "fsl,imx6ul";
+};
diff --git a/board/engicam/isiotmx6ul/MAINTAINERS 
b/board/engicam/isiotmx6ul/MAINTAINERS
index 558e516..f4dcfbd 100644
--- a/board/engicam/isiotmx6ul/MAINTAINERS
+++ b/board/engicam/isiotmx6ul/MAINTAINERS
@@ -4,5 +4,7 @@ S:  Maintained
 F: board/engicam/isiotmx6ul
 F: include/configs/imx6ul_isiot.h
 F: configs/imx6ul_isiot_mmc_defconfig
+F: configs/imx6ul_isiot_nand_defconfig
 F: arch/arm/dts/imx6ul-isiot.dtsi
 F: arch/arm/dts/imx6ul-isiot-mmc.dts
+F: arch/arm/dts/imx6ul-isiot-nand.dts
diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c 
b/board/engicam/isiotmx6ul/isiotmx6ul.c
index b1372d0..20c8aa7 100644
--- a/board/engicam/isiotmx6ul/isiotmx6ul.c
+++ b/board/engicam/isiotmx6ul/isiotmx6ul.c
@@ -37,11 +37,80 @@ int board_early_init_f(void)
return 0;
 }
 
+#ifdef CONFIG_NAND_MXS
+
+#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | 
PAD_CTL_PUS_100K_UP)
+#define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \
+   PAD_CTL_SRE_FAST)
+#define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1)
+
+static iomux_v3_cfg_t const nand_pads[] = {
+   MX6_PAD_NAND_DATA00__RAWNAND_DATA00 | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
+   MX6_PAD_NAND_DATA01__RAWNAND_DATA01 | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
+   MX6_PAD_NAND_DATA02__RAWNAND_DATA02 | MUX_PAD_CTRL(GPMI_PAD_CTRL2),
+   

[U-Boot] [PATCH v6 06/10] imx6: isiotmx6ul: Add FEC support

[Jagan Teki]

From: Jagan Teki 

Add FEC support for Engicam Is.IoT MX6UL module.

Cc: Stefano Babic 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/cpu/armv7/mx6/Kconfig |  1 +
 configs/imx6ul_isiot_mmc_defconfig |  3 +++
 include/configs/imx6ul_isiot.h | 10 ++
 3 files changed, 14 insertions(+)

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index e9f86e8..714fa35 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -242,6 +242,7 @@ config TARGET_MX6UL_ISIOT
select MX6UL
select OF_CONTROL
select DM
+   select DM_ETH
select DM_GPIO
select DM_I2C
select DM_MMC
diff --git a/configs/imx6ul_isiot_mmc_defconfig 
b/configs/imx6ul_isiot_mmc_defconfig
index 7a7be23..8ecdd8e 100644
--- a/configs/imx6ul_isiot_mmc_defconfig
+++ b/configs/imx6ul_isiot_mmc_defconfig
@@ -23,6 +23,8 @@ CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
@@ -32,6 +34,7 @@ CONFIG_CMD_FS_GENERIC=y
 # CONFIG_BLK is not set
 CONFIG_SYS_I2C_MXC=y
 # CONFIG_DM_MMC_OPS is not set
+CONFIG_FEC_MXC=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_MXC_UART=y
diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h
index aba43fc..5a3e05a 100644
--- a/include/configs/imx6ul_isiot.h
+++ b/include/configs/imx6ul_isiot.h
@@ -128,6 +128,16 @@
 # define CONFIG_SYS_FSL_ESDHC_ADDR 0
 #endif
 
+/* Ethernet */
+#ifdef CONFIG_FEC_MXC
+# define CONFIG_FEC_MXC_PHYADDR0
+# define CONFIG_FEC_XCV_TYPE   RMII
+
+# define CONFIG_MII
+# define CONFIG_PHYLIB
+# define CONFIG_PHY_SMSC
+#endif
+
 /* SPL */
 #ifdef CONFIG_SPL
 # define CONFIG_SPL_MMC_SUPPORT
-- 
1.9.1

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[U-Boot] [PATCH v6 05/10] arm: dts: imx6ul-isiot: Add FEC node

[Jagan Teki]

From: Jagan Teki 

Add FEC node for Engicam Is.IoT MX6UL module.

Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Reviewed-by: Stefano Babic 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/imx6ul-isiot.dtsi | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/dts/imx6ul-isiot.dtsi b/arch/arm/dts/imx6ul-isiot.dtsi
index 1a474ca..346079a 100644
--- a/arch/arm/dts/imx6ul-isiot.dtsi
+++ b/arch/arm/dts/imx6ul-isiot.dtsi
@@ -56,6 +56,13 @@
};
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_enet1>;
+   phy-mode = "rmii";
+   status = "okay";
+};
+
  {
clock-frequency = <10>;
pinctrl-names = "default";
@@ -86,6 +93,21 @@
 };
 
  {
+   pinctrl_enet1: enet1grp {
+   fsl,pins = <
+   MX6UL_PAD_ENET2_RX_DATA0__ENET1_MDIO0x1b0b0
+   MX6UL_PAD_ENET2_RX_DATA1__ENET1_MDC 0x1b0b0
+   MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN  0x1b0b0
+   MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+   MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+   MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN  0x1b0b0
+   MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+   MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+   MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1  0x4001b031
+   MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10   0x1b0b0
+   >;
+   };
+
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
-- 
1.9.1

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[U-Boot] [PATCH v6 04/10] imx6: isiotmx6ul: Add I2C support

[Jagan Teki]

From: Jagan Teki 

Add I2C support for Engicam Is.IoT MX6UL module.

isiotmx6ul> i2c bus
Bus 0:  i2c@021a
Bus 1:  i2c@021a4000
isiotmx6ul> i2c dev 0
Setting bus to 0
isiotmx6ul> i2c dev
Current bus is 0
isiotmx6ul> i2c speed 10
Setting bus speed to 10 Hz
isiotmx6ul> i2c probe
Valid chip addresses: 00 2C 44 78
isiotmx6ul> i2c md 2C 0xff
00ff: 00 00 00 00 0f f0 01 64 ff ff 00 00 00 00 00 00...d

Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Reviewed-by: Stefano Babic 
Signed-off-by: Jagan Teki 
---
 arch/arm/cpu/armv7/mx6/Kconfig | 1 +
 configs/imx6ul_isiot_mmc_defconfig | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 08cd2d9..e9f86e8 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -243,6 +243,7 @@ config TARGET_MX6UL_ISIOT
select OF_CONTROL
select DM
select DM_GPIO
+   select DM_I2C
select DM_MMC
select DM_THERMAL
select SUPPORT_SPL
diff --git a/configs/imx6ul_isiot_mmc_defconfig 
b/configs/imx6ul_isiot_mmc_defconfig
index 66eb59f..7a7be23 100644
--- a/configs/imx6ul_isiot_mmc_defconfig
+++ b/configs/imx6ul_isiot_mmc_defconfig
@@ -21,6 +21,7 @@ CONFIG_SYS_PROMPT="isiotmx6ul> "
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
@@ -29,6 +30,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 # CONFIG_BLK is not set
+CONFIG_SYS_I2C_MXC=y
 # CONFIG_DM_MMC_OPS is not set
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
-- 
1.9.1

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[U-Boot] [PATCH v6 02/10] arm: imx6ul: Add Engicam Is.IoT MX6UL Starter Kit initial support

[Jagan Teki]

From: Jagan Teki 

Boot from MMC:
-
U-Boot SPL 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33)
Trying to boot from MMC1

U-Boot 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33 +0100)

CPU:   Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 33C
Reset cause: POR
Model: Engicam Is.IoT MX6UL Starterkit
DRAM:  512 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
isiotmx6ul>

Cc: Stefano Babic 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/cpu/armv7/mx6/Kconfig|  10 ++
 arch/arm/dts/Makefile |   3 +-
 arch/arm/dts/imx6ul-isiot-mmc.dts |  50 +++
 arch/arm/dts/imx6ul-isiot.dtsi|  92 +
 board/engicam/isiotmx6ul/Kconfig  |  12 ++
 board/engicam/isiotmx6ul/MAINTAINERS  |   8 ++
 board/engicam/isiotmx6ul/Makefile |   6 +
 board/engicam/isiotmx6ul/README   |  28 
 board/engicam/isiotmx6ul/isiotmx6ul.c | 246 ++
 configs/imx6ul_isiot_mmc_defconfig|  36 +
 include/configs/imx6ul_isiot.h| 142 
 11 files changed, 632 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/imx6ul-isiot-mmc.dts
 create mode 100644 arch/arm/dts/imx6ul-isiot.dtsi
 create mode 100644 board/engicam/isiotmx6ul/Kconfig
 create mode 100644 board/engicam/isiotmx6ul/MAINTAINERS
 create mode 100644 board/engicam/isiotmx6ul/Makefile
 create mode 100644 board/engicam/isiotmx6ul/README
 create mode 100644 board/engicam/isiotmx6ul/isiotmx6ul.c
 create mode 100644 configs/imx6ul_isiot_mmc_defconfig
 create mode 100644 include/configs/imx6ul_isiot.h

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 19cc1f6..08cd2d9 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -237,6 +237,15 @@ config TARGET_MX6UL_GEAM
select DM_MMC
select DM_THERMAL
select SUPPORT_SPL
+config TARGET_MX6UL_ISIOT
+   bool "Support Engicam Is.IoT MX6UL"
+   select MX6UL
+   select OF_CONTROL
+   select DM
+   select DM_GPIO
+   select DM_MMC
+   select DM_THERMAL
+   select SUPPORT_SPL
 
 config TARGET_MX6ULL_14X14_EVK
bool "Support mx6ull_14x14_evk"
@@ -358,6 +367,7 @@ source "board/embest/mx6boards/Kconfig"
 source "board/engicam/geam6ul/Kconfig"
 source "board/engicam/icorem6/Kconfig"
 source "board/engicam/icorem6_rqs/Kconfig"
+source "board/engicam/isiotmx6ul/Kconfig"
 source "board/freescale/mx6qarm2/Kconfig"
 source "board/freescale/mx6qsabreauto/Kconfig"
 source "board/freescale/mx6sabresd/Kconfig"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index eb68c20..fc30ac3 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -316,7 +316,8 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
imx6q-icore.dtb \
imx6q-icore-rqs.dtb \
imx6sx-sabreauto.dtb \
-   imx6ul-geam-kit.dtb
+   imx6ul-geam-kit.dtb \
+   imx6ul-isiot-mmc.dtb
 
 dtb-$(CONFIG_MX7) += imx7-colibri.dtb
 
diff --git a/arch/arm/dts/imx6ul-isiot-mmc.dts 
b/arch/arm/dts/imx6ul-isiot-mmc.dts
new file mode 100644
index 000..bb5086a
--- /dev/null
+++ b/arch/arm/dts/imx6ul-isiot-mmc.dts
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of 

[U-Boot] [PATCH v6 03/10] arm: dts: imx6ul-isiot: Add I2C nodes

[Jagan Teki]

From: Jagan Teki 

Add I2C nodes for Engicam Is.IoT MX6UL module.

Cc: Stefano Babic 
Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/imx6ul-isiot.dtsi | 28 
 1 file changed, 28 insertions(+)

diff --git a/arch/arm/dts/imx6ul-isiot.dtsi b/arch/arm/dts/imx6ul-isiot.dtsi
index 6108a1a..1a474ca 100644
--- a/arch/arm/dts/imx6ul-isiot.dtsi
+++ b/arch/arm/dts/imx6ul-isiot.dtsi
@@ -56,6 +56,20 @@
};
 };
 
+ {
+   clock-frequency = <10>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_i2c1>;
+   status = "okay";
+};
+
+ {
+   clock_frequency = <10>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_i2c2>;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_uart1>;
@@ -72,6 +86,20 @@
 };
 
  {
+   pinctrl_i2c1: i2c1grp {
+   fsl,pins = <
+   MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
+   MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
+   >;
+   };
+
+   pinctrl_i2c2: i2c2grp {
+   fsl,pins = <
+   MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
+   MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
+   >;
+   };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
-- 
1.9.1

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[U-Boot] [PATCH v6 01/10] configs: imx6: Don't define USDHC2_BASE_ADDR

[Jagan Teki]

From: Jagan Teki 

USDHC base address will assigned by SPL using fsl_esdhc_initialize
and u-boot with devicetree, hence no remove base address assignment
in config files.

Cc: Matteo Lisi 
Cc: Michael Trimarchi 
Reviewed-by: Stefano Babic 
Signed-off-by: Jagan Teki 
---
 include/configs/imx6qdl_icore.h | 2 +-
 include/configs/imx6ul_geam.h   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h
index eb83d23..5a28b15 100644
--- a/include/configs/imx6qdl_icore.h
+++ b/include/configs/imx6qdl_icore.h
@@ -147,7 +147,7 @@
 #ifdef CONFIG_FSL_USDHC
 # define CONFIG_SYS_MMC_ENV_DEV0
 # define CONFIG_SYS_FSL_USDHC_NUM  1
-# define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
+# define CONFIG_SYS_FSL_ESDHC_ADDR 0
 #endif
 
 /* NAND */
diff --git a/include/configs/imx6ul_geam.h b/include/configs/imx6ul_geam.h
index 23fa3ee..8bffacd 100644
--- a/include/configs/imx6ul_geam.h
+++ b/include/configs/imx6ul_geam.h
@@ -145,7 +145,7 @@
 #ifdef CONFIG_FSL_USDHC
 # define CONFIG_SYS_MMC_ENV_DEV0
 # define CONFIG_SYS_FSL_USDHC_NUM  1
-# define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
+# define CONFIG_SYS_FSL_ESDHC_ADDR 0
 #endif
 
 /* NAND */
-- 
1.9.1

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[U-Boot] [PATCH v6 00/10] imx6ul: Add Engicam Is.IoT MX6UL support

[Jagan Teki]

From: Jagan Teki 

This patch set support Engicam Is.IoT MX6UL board support.

Changes for v6:
- Remove 'arm: dts: Add MAINTAINERS file' patch
- Rebase to master

Changes for v5:
- Update ccgr_init so-that it can enable required clocks
- Add new patch for dts files include under board MAINTAINERS
- Add new patch for arch/arm/dts/MAINTAINERS file
- Update 'Reviewed-by: Stefano Babic ' tag

Changes for v4:
- Rebase to master

Changes for v3:
- Rebase to master

Changes for v2:
- Skiped eMMC node patch
- Rebase to master

Jagan Teki (10):
  configs: imx6: Don't define USDHC2_BASE_ADDR
  arm: imx6ul: Add Engicam Is.IoT MX6UL Starter Kit initial support
  arm: dts: imx6ul-isiot: Add I2C nodes
  imx6: isiotmx6ul: Add I2C support
  arm: dts: imx6ul-isiot: Add FEC node
  imx6: isiotmx6ul: Add FEC support
  imx6: isiotmx6ul: Add NAND support
  imx6: isiotmx6ul: Add nandboot env support
  imx6ul: isiotmx6ul: Enable I2C support
  i.MX6: engicam: Include dts files under MAINTAINERS

 arch/arm/cpu/armv7/mx6/Kconfig|  12 ++
 arch/arm/dts/Makefile |   4 +-
 arch/arm/dts/imx6ul-isiot-mmc.dts |  50 ++
 arch/arm/dts/imx6ul-isiot-nand.dts|  50 ++
 arch/arm/dts/imx6ul-isiot.dtsi| 142 +++
 board/engicam/geam6ul/MAINTAINERS |   1 +
 board/engicam/icorem6/MAINTAINERS |   3 +
 board/engicam/icorem6_rqs/MAINTAINERS |   3 +
 board/engicam/isiotmx6ul/Kconfig  |  12 ++
 board/engicam/isiotmx6ul/MAINTAINERS  |  10 ++
 board/engicam/isiotmx6ul/Makefile |   6 +
 board/engicam/isiotmx6ul/README   |  28 +++
 board/engicam/isiotmx6ul/isiotmx6ul.c | 315 ++
 configs/imx6ul_isiot_mmc_defconfig|  41 +
 configs/imx6ul_isiot_nand_defconfig   |  42 +
 include/configs/imx6qdl_icore.h   |   2 +-
 include/configs/imx6ul_geam.h |   2 +-
 include/configs/imx6ul_isiot.h| 205 ++
 18 files changed, 925 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/dts/imx6ul-isiot-mmc.dts
 create mode 100644 arch/arm/dts/imx6ul-isiot-nand.dts
 create mode 100644 arch/arm/dts/imx6ul-isiot.dtsi
 create mode 100644 board/engicam/isiotmx6ul/Kconfig
 create mode 100644 board/engicam/isiotmx6ul/MAINTAINERS
 create mode 100644 board/engicam/isiotmx6ul/Makefile
 create mode 100644 board/engicam/isiotmx6ul/README
 create mode 100644 board/engicam/isiotmx6ul/isiotmx6ul.c
 create mode 100644 configs/imx6ul_isiot_mmc_defconfig
 create mode 100644 configs/imx6ul_isiot_nand_defconfig
 create mode 100644 include/configs/imx6ul_isiot.h

-- 
1.9.1

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Re: [U-Boot] [PATCH] ARM: ti: Update layout for MMC and eMMC (env and dfu)

[Jean-Jacques Hiblot]

On 23/02/2017 20:28, Sam Protsenko wrote:

On Thu, Feb 23, 2017 at 5:14 PM, Jean-Jacques Hiblot  wrote:


On 23/02/2017 14:46, Sam Protsenko wrote:

On Wed, Feb 22, 2017 at 10:27 AM, Jean-Jacques Hiblot 
wrote:

The problems with the current DFU layout are:
MMC: The space allocated for u-boot is too small for the latest u-boot
   (>750KB). We need to increase it. eMMC uses a much bigger area
(2MB).
eMMC: region "u-boot.img.raw" overlaps the environment area and the
region
"spl-os-image.raw".
both: region "spl-os-image.raw" is quite small and can't handle android
kernels

Fixing this requires growing some regions and moving others.
Care has been taken to leave some room for further growth of
"spl-os-args.raw".
Also the "env" now appears in the dfu so that it's apparent that the
region is not free space that can be used to grow "u-boot.img.raw".
The total space allocated for those raw binaries is 16MB, of which 13+MB
are reserved for the kernel image.

Signed-off-by: Jean-Jacques Hiblot 
---

Sam,

This patch goes a bit further in changing the layout of the MMC than
yours. However
it doesn't update the GPT partitioning. This would still be needed.


Hi Jean-Jacques,

Got a couple of questions about this change and my patch (changing
eMMC partitions table), about how to make them play nice together.

1. How DFU table is connected to eMMC partition table? And why my
patch was interfering with DFU table?

AFAIK DFU is not related to GPT. I never used the GPT so I can't for sure
how it fits together.
My guess is that env_mmc.c has no idea that GPT even exists and uses raw
access to the eMMC. In this case CONFIG_ENV_OFFSET must be defined to point
at the beginning of your env partition and must be adapted when the GPT is
updated. The same goes for the DFU. Ideally GPT and DFU should use the same
layout (at least for MLO, u-boot, kernel and args).


2. Can I change CONFIG_ENV_OFFSET? Because my changes is going to move
"reserved" partition on eMMC, where U-Boot environment is stored. Or
it should be in sync with DFU table somehow? If yes -- we should work
together to find solution that works best for both cases.

CONFIG_ENV_OFFSET is loosely related to DFU: we don't update the environment
through DFU. However we must make sure that the area used to store the env
doesn't overlap a another region (MLO, u-boot, kernel, args). The dfu
doesn't define those regions, it's done with #defines like
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR. But DFU exposes them for "remote"
upgrade.


So if I change eMMC GPT partition table, it's ok for me to update
CONFIG_ENV_OFFSET as well, right?

Yes you need to change it

  Because in my case CONFIG_ENV_OFFSET
is going to be different from the value your patch sets. In case of
eMMC table, we're using "reserved" partition to store U-Boot
environment, and I want it to be at 1664 KiB, which gives us
CONFIG_ENV_OFFSET=0x1A. Is it ok if I change it to that value? Or
something else must be changed along with it? If yes, then what
exactly?
You need to adapt DFU if you plan to use it. Maybe you can define a new 
layout for DFU, something like dfu_alt_info_emmc_gpt that will reflect 
your GPT layout


Anyway IMO it would be good to use the same offset/size for GPT and 
non-GPT case for the following regions:

- MLO
- u-boot
- env

For MLO we already use the same: offset 128kB / size 256kB
For u-boot, you increased the size to 1MB, I suggest that we increase it 
a bit more (1.5MB or 2MB) just to make sure that we don't have to 
increase its size again next year.
For the env, I suggest that the size is increased to 256kB to take care 
of redundant env.





Thanks.


3. What about my similar patch for AM57x EVM (see [1])? Is it fine, or
it affects DFU table as well?

I guess it's OK because the env is stored in a FAT partition:
CONFIG_ENV_OFFSET is not used



Thanks.

[1] https://patchwork.ozlabs.org/patch/730736/


tested on DRA7. DFU updates ok for MMC and eMMC

Jean-Jacques

   include/configs/dra7xx_evm.h  |  2 +-
   include/configs/omap5_uevm.h  |  2 +-
   include/configs/ti_armv7_common.h |  7 ---
   include/environment/ti/dfu.h  | 14 --
   4 files changed, 14 insertions(+), 11 deletions(-)

diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index bce2816..a56c224 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -28,7 +28,7 @@
   #define CONFIG_ENV_IS_IN_MMC
   #define CONFIG_SYS_MMC_ENV_DEV 1   /* SLOT2: eMMC(1) */
   #define CONFIG_ENV_SIZE(128 << 10)
-#define CONFIG_ENV_OFFSET  0xE
+#define CONFIG_ENV_OFFSET  0x22
   #define CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET +
CONFIG_ENV_SIZE)
   #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
   #endif
diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h
index 736d804..127776e 100644
--- 

Re: [U-Boot] [PATCH 1/3] ARM: dts: sun9i: Add mmc1 pinmux setting

[Chen-Yu Tsai]

On Fri, Feb 24, 2017 at 2:08 PM, Chen-Yu Tsai  wrote:
> commit 56b0730157f70dc23d6caff9e7ceb8b377b96b9f upstream.
>
> On the A80, mmc1 is available on pingroup G. Designs mostly use this
> to connect to an SDIO WiFi chip.
>
> Signed-off-by: Chen-Yu Tsai 

I did not send this.

Rask, something is wrong with your setup. You should send patches from
your own email address, while keeping the author. You should also add
your SoB.

ChenYu

> ---
>  arch/arm/dts/sun9i-a80.dtsi | 8 
>  1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm/dts/sun9i-a80.dtsi b/arch/arm/dts/sun9i-a80.dtsi
> index f68b324..92412b2 100644
> --- a/arch/arm/dts/sun9i-a80.dtsi
> +++ b/arch/arm/dts/sun9i-a80.dtsi
> @@ -701,6 +701,14 @@
> allwinner,pull = ;
> };
>
> +   mmc1_pins: mmc1 {
> +   allwinner,pins = "PG0", "PG1" ,"PG2", "PG3",
> +"PG4", "PG5";
> +   allwinner,function = "mmc1";
> +   allwinner,drive = ;
> +   allwinner,pull = ;
> +   };
> +
> mmc2_8bit_pins: mmc2_8bit {
> allwinner,pins = "PC6", "PC7", "PC8", "PC9",
>  "PC10", "PC11", "PC12",
> --
> 2.10.2
>
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[U-Boot] [PATCH 4/6] fsl-lsch2: Use Chassis-2 streamid definition for ls1046a

[Bharat Bhushan]

As ls1046a is Chassis-2 type SOC and shares same streamid
definition, this patch adds using streamids for ls1046

Signed-off-by: Bharat Bhushan 
---
 include/configs/ls1046a_common.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index be65e4f..b4b198b 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -13,6 +13,7 @@
 #define CONFIG_GICV2
 
 #include 
+#include 
 
 /* Link Definitions */
 #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_FSL_OCRAM_BASE + 
0xfff0)
-- 
1.9.3

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[U-Boot] [PATCH] pcie-layerscape: Fixup iommu-map property of pci node

[Bharat Bhushan]

This patch fixup iommu-map property on pci node to have
a valid mapping of requester-id to stream-id.
The requester-id to stream-id mapping is based on
PCI-LUT table initialization.

Signed-off-by: Bharat Bhushan 
---
 drivers/pci/pcie_layerscape_fixup.c | 53 +
 1 file changed, 53 insertions(+)

diff --git a/drivers/pci/pcie_layerscape_fixup.c 
b/drivers/pci/pcie_layerscape_fixup.c
index 8f8f6b6..301afee 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -103,6 +103,56 @@ static void fdt_pcie_set_msi_map_entry(void *blob, struct 
ls_pcie *pcie,
fdt_appendprop_u32(blob, nodeoffset, "msi-map", 1);
 }
 
+/*
+ * An iommu-map is a property to be added to the pci controller
+ * node.  It is a table, where each entry consists of 4 fields
+ * e.g.:
+ *
+ *  iommu-map = <[devid] [phandle-to-iommu-ctrl] [stream-id] [count]
+ * [devid] [phandle-to-iommu-ctrl] [stream-id] [count]>;
+ */
+static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie *pcie,
+  u32 devid, u32 streamid)
+{
+   u32 *prop;
+   u32 iommu_map[4];
+   int nodeoffset;
+   int lenp;
+
+   /* find pci controller node */
+   nodeoffset = fdt_node_offset_by_compat_reg(blob, "fsl,ls-pcie",
+  pcie->dbi_res.start);
+   if (nodeoffset < 0) {
+#ifdef CONFIG_FSL_PCIE_COMPAT /* Compatible with older version of dts node */
+   nodeoffset = fdt_node_offset_by_compat_reg(blob,
+   CONFIG_FSL_PCIE_COMPAT, pcie->dbi_res.start);
+   if (nodeoffset < 0)
+   return;
+#else
+   return;
+#endif
+   }
+
+   /* get phandle to MSI controller */
+   prop = fdt_getprop_w(blob, nodeoffset, "iommu-map", );
+   if (prop == NULL) {
+   debug("\n%s: ERROR: missing iommu-map: PCIe%d\n",
+ __func__, pcie->idx);
+   return;
+   }
+
+   /* set iommu-map row */
+   iommu_map[0] = cpu_to_fdt32(devid);
+   iommu_map[1] = *++prop;
+   iommu_map[2] = cpu_to_fdt32(streamid);
+   iommu_map[3] = cpu_to_fdt32(1);
+
+   if (devid == 0)
+   fdt_setprop_inplace(blob, nodeoffset, "iommu-map", iommu_map, 
16);
+   else
+   fdt_appendprop(blob, nodeoffset, "iommu-map", iommu_map, 16);
+}
+
 static void fdt_fixup_pcie(void *blob)
 {
struct udevice *dev, *bus;
@@ -139,6 +189,9 @@ static void fdt_fixup_pcie(void *blob)
/* update msi-map in device tree */
fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8,
   streamid);
+   /* update iommu-map in device tree */
+   fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8,
+  streamid);
}
 }
 #endif
-- 
1.9.3

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[U-Boot] [PATCH 5/6] fsl-lsch2: Use Chassis-2 streamid definition for ls1012a

[Bharat Bhushan]

As ls1012a is Chassis-2 type SOC and shares same streamid
definition, this patch adds using streamids for ls1012a

Signed-off-by: Bharat Bhushan 
---
 include/configs/ls1012a_common.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index e556c92..5765181 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -11,6 +11,7 @@
 #define CONFIG_GICV2
 
 #include 
+#include 
 
 #define CONFIG_SUPPORT_RAW_INITRD
 
-- 
1.9.3

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[U-Boot] [PATCH 3/6] pcie-layerscape: Define stream-ids for Layerscape Chassis-2

[Bharat Bhushan]

Layerscape Chassis-2 have PCIe device, some platform devices and
DPAA1 devices which will use stream-ids for iommu level isolation as
they lies behind SMMU.

This patch defines the stream-ids for Chassis-2 devices.
stream-ids for DPAA1 are reserved for future use.

Signed-off-by: Bharat Bhushan 
---
 .../asm/arch-fsl-layerscape/stream_id_lsch2.h  | 60 ++
 include/configs/ls1043a_common.h   |  1 +
 2 files changed, 61 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h 
b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h
new file mode 100644
index 000..d41dd2e
--- /dev/null
+++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright 2017 NXP Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ */
+#ifndef __FSL_STREAM_ID_H
+#define __FSL_STREAM_ID_H
+
+/*
+ * Stream IDs on Chassis-2 (for example ls1043a, ls1046a, ls1012) devices
+ * are not hardwired and are programmed by sw.  There are a limited number
+ * of stream IDs available, and the partitioning of them is scenario
+ * dependent. This header defines the partitioning between legacy, PCI,
+ * and DPAA1 devices.
+ *
+ * This partitioning can be customized in this file depending
+ * on the specific hardware config:
+ *
+ *  -non-PCI legacy, platform devices (USB, SDHC, SATA, DMA, QE etc)
+ * -all legacy devices get a unique stream ID assigned and programmed in
+ *  their AMQR registers by u-boot
+ *
+ *  -PCIe
+ * -there is a range of stream IDs set aside for PCI in this
+ *  file.  U-boot will scan the PCI bus and for each device discovered:
+ * -allocate a streamID
+ * -set a PEXn LUT table entry mapping 'requester ID' to 'stream ID'
+ * -set a msi-map entry in the PEXn controller node in the
+ *  device tree (see Documentation/devicetree/bindings/pci/pci-msi.txt
+ *  for more info on the msi-map definition)
+ *
+ *  -DPAA1
+ * - Stream ids for DPAA1 use are reserved for future usecase.
+ *
+ */
+
+
+#define FSL_INVALID_STREAM_ID  0
+
+/* legacy devices */
+#define FSL_USB1_STREAM_ID 1
+#define FSL_USB2_STREAM_ID 2
+#define FSL_USB3_STREAM_ID 3
+#define FSL_SDHC_STREAM_ID 4
+#define FSL_SATA_STREAM_ID 5
+#define FSL_QE_STREAM_ID   6
+#define FSL_QDMA_STREAM_ID 7
+#define FSL_EDMA_STREAM_ID 8
+#define FSL_ETR_STREAM_ID  9
+
+/* PCI - programmed in PEXn_LUT */
+#define FSL_PEX_STREAM_ID_START11
+#define FSL_PEX_STREAM_ID_END  26
+
+/* DPAA1 - Stream-ID that can be programmed in DPAA1 h/w */
+#define FSL_DPAA1_STREAM_ID_START  27
+#define FSL_DPAA1_STREAM_ID_END63
+
+#endif
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index c4b05e0..5f84497 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -13,6 +13,7 @@
 #define CONFIG_MP
 #define CONFIG_GICV2
 
+#include 
 #include 
 
 /* Link Definitions */
-- 
1.9.3

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[U-Boot] [PATCH 1/6] fsl-lsch3: rename ls2080a_stream_id.h to stream_id_lsch3.h

[Bharat Bhushan]

The stream ID allocation for Chasis3.0 devices,
LS1088, LS2088 and LS2080, can be shared.

This patch renames this accordingly.

Signed-off-by: Bharat Bhushan 
---
 .../asm/arch-fsl-layerscape/{ls2080a_stream_id.h => stream_id_lsch3.h}  | 0
 include/configs/ls2080a_common.h| 2 +-
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename arch/arm/include/asm/arch-fsl-layerscape/{ls2080a_stream_id.h => 
stream_id_lsch3.h} (100%)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h 
b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
similarity index 100%
rename from arch/arm/include/asm/arch-fsl-layerscape/ls2080a_stream_id.h
rename to arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 4bfd0ac..ee432ae 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -13,7 +13,7 @@
 #define CONFIG_GICV3
 #define CONFIG_FSL_TZPC_BP147
 
-#include 
+#include 
 #include 
 
 /* Link Definitions */
-- 
1.9.3

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[U-Boot] [PATCH 0/6] pcie-layerscape: Enable PCI-LUT initialization for NXP-Chasis-2

[Bharat Bhushan]

This patch series enables PCI-LUT table initialization
for NXP Chassis-2 (for example ls1043, ls1046 and LS1012) devices.
As part of this, stream-ids allocation is added which is similar 
to Chassis-3 (ls2080a)

Also this series have a minor cleanup, as stream-id definition file
is given generic name for chassis-3 devices. This allows new SOCs,
ls2088, ls1088 etc to use same allocation mechanism.

Bharat Bhushan (6):
  fsl-lsch3: rename ls2080a_stream_id.h to stream_id_lsch3.h
  fsl-lsch3: Rewording to support other Chassis-3 Socs
  pcie-layerscape: Define stream-ids for Layerscape Chassis-2
  fsl-lsch2: Use Chassis-2 streamid definition for ls1046a
  fsl-lsch2: Use Chassis-2 streamid definition for ls1012a
  pcie-layerscape: Initialize pci-lut for NXP chasis-2 socs

 .../asm/arch-fsl-layerscape/stream_id_lsch2.h  | 60 ++
 .../{ls2080a_stream_id.h => stream_id_lsch3.h} | 12 ++---
 drivers/pci/pcie_layerscape_fixup.c|  4 +-
 include/configs/ls1012a_common.h   |  1 +
 include/configs/ls1043a_common.h   |  1 +
 include/configs/ls1046a_common.h   |  1 +
 include/configs/ls2080a_common.h   |  2 +-
 7 files changed, 72 insertions(+), 9 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h
 rename arch/arm/include/asm/arch-fsl-layerscape/{ls2080a_stream_id.h => 
stream_id_lsch3.h} (86%)

-- 
1.9.3

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[U-Boot] [PATCH 2/6] fsl-lsch3: Rewording to support other Chassis-3 Socs

[Bharat Bhushan]

LS2080a, LS1088a and LS2088a SOCs are based on Chassis-3
and shared same stream-id partitioning. This patch
rewords the definition to support all these SOCs.

Signed-off-by: Bharat Bhushan 
---
 arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h 
b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
index ee28323..6e97909 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
@@ -8,11 +8,11 @@
 #define __FSL_STREAM_ID_H
 
 /*
- * Stream IDs on ls2080a devices are not hardwired and are
- * programmed by sw.  There are a limited number of stream IDs
- * available, and the partitioning of them is scenario dependent.
- * This header defines the partitioning between legacy, PCI,
- * and DPAA2 devices.
+ * Stream IDs on NXP Chassis-3 (for example ls2080a, ls1088a, ls2088a)
+ * devices are not hardwired and are programmed by sw. There are a limited
+ * number of stream IDs available, and the partitioning of them is scenario
+ * dependent. This header defines the partitioning between legacy,
+ * PCI, and DPAA2 devices.
  *
  * This partitioning can be customized in this file depending
  * on the specific hardware config:
@@ -36,7 +36,7 @@
  * -the MC is responsible for allocating and setting up 'isolation context
  *  IDs (ICIDs) based on the allocated stream IDs for all DPAA2 devices.
  *
- * On ls2080a SoCs stream IDs are programmed in AMQ registers (32-bits) for
+ * On Chasis-3 SoCs stream IDs are programmed in AMQ registers (32-bits) for
  * each of the different bus masters.  The relationship between
  * the AMQ registers and stream IDs is defined in the table below:
  *  AMQ bitstreamID bit
-- 
1.9.3

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[U-Boot] [PATCH 6/6] pcie-layerscape: Initialize pci-lut for NXP chasis-2 socs

[Bharat Bhushan]

From: Bharat Bhushan 

Layerscape Chasis-2 also uses same PCIe controller
as used in Chasis-3 and have similar PCI-Lut.

We need to initialize the pcie-lut for Chasis-2 also
as in Chasis-3.

Signed-off-by: Bharat Bhushan 
---
 drivers/pci/pcie_layerscape_fixup.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/pcie_layerscape_fixup.c 
b/drivers/pci/pcie_layerscape_fixup.c
index 19ede2f..8f8f6b6 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -15,7 +15,7 @@
 #include 
 #include "pcie_layerscape.h"
 
-#ifdef CONFIG_FSL_LSCH3
+#if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
 /*
  * Return next available LUT index.
  */
@@ -175,7 +175,7 @@ void ft_pci_setup(void *blob, bd_t *bd)
list_for_each_entry(pcie, _pcie_list, list)
ft_pcie_ls_setup(blob, pcie);
 
-#ifdef CONFIG_FSL_LSCH3
+#if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
fdt_fixup_pcie(blob);
 #endif
 }
-- 
1.9.3

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