On 03/16/2017 06:05 PM, Wenbin Song wrote:
> Hi york,
>
> Do you mean it is not necessary to supply so much partitions for user, just
> supplying two partitions, one is reserved for firmware(including RCW, U-boot,
> Env, PPA, kernel.itb and so on), the other is the rest of flashes, if not,
> C
On 03/16/2017 08:14 PM, Simon Glass wrote:
> Hi York,
>
> On 16 March 2017 at 16:47, Simon Glass wrote:
>> On 9 February 2017 at 11:35, York Sun wrote:
>>> When adding local memory to PCI region, gd->ram_size is correct only
>>> if the memory is in one continuous block. In case memory is split
>>
On 16 March 2017 at 08:26, Bin Meng wrote:
> This adds APIs for determining previous sleep state from ACPI I/O
> registers, as well as clearing sleep state on BayTrail SoC.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/cpu/baytrail/acpi.c | 47
> ++
>
On 16 March 2017 at 08:26, Bin Meng wrote:
> At present there are only 8-bit and 32-bit read/write routines in
> the rtc uclass driver. This adds the 16-bit support.
>
> Signed-off-by: Bin Meng
> ---
>
> drivers/rtc/rtc-uclass.c | 30 ++
> include/rtc.h| 2
On 16 March 2017 at 08:26, Bin Meng wrote:
> This adds OS_RESUME (0x40) and RESUME_FAILURE (0xed) post codes.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/include/asm/post.h | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Simon Glass
___
U-B
Hi Bin,
On 16 March 2017 at 08:26, Bin Meng wrote:
> This introduces a Kconfig option for ACPI S3 resume, as well as a
> header file to include anything related to ACPI S3 resume.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/Kconfig | 12 +
> arch/x86/include/asm/acpi_s3
Hi Bin,
On 16 March 2017 at 08:26, Bin Meng wrote:
> This adds ACPI S3 (suspend to ram) resume capability in U-Boot.
> With S3 support within U-Boot, the board wakes up and resumes to
> OS very quickly.
>
> This so far is enabled and tested on Intel MinnowMax board. Please
> check README.x86 for
Hi York,
On 16 March 2017 at 16:47, Simon Glass wrote:
> On 9 February 2017 at 11:35, York Sun wrote:
>> When adding local memory to PCI region, gd->ram_size is correct only
>> if the memory is in one continuous block. In case memory is split
>> into several banks, each bank should be added sepa
Hi Simon,
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2017年3月13日 21:24
> To: Masahiro Yamada
> Cc: Wenyou Yang - A41535 ; U-Boot Mailing
> List ; Stephen Warren
> Subject: Re: [U-Boot] [PATCH] ARM: dts: skeleton: fix unit name wa
Hi york,
Do you mean it is not necessary to supply so much partitions for user, just
supplying two partitions, one is reserved for firmware(including RCW, U-boot,
Env, PPA, kernel.itb and so on), the other is the rest of flashes, if not,
Could you give me more details?
Best Regards
Wenbin So
Hi Simon,
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2017年3月13日 21:24
> To: Wenyou Yang - A41535
> Cc: U-Boot Mailing List ; Stephen Warren
> ; Andreas Bießmann ; Albert
> Aribaud ; Wenyou Yang - A41535
>
> Subject: Re: [PATCH v
Hi Tom,
This is an updated version of the previous pull request, includes
support for rk3188 from Heiko Stübner and and rk3328 from Kever Yang.
Also included is SPL support for rk3399 and a fix for rk3288 to get it
booting again (spl_early_init()).
The following changes since commit 2808576491ae
On Thu, Mar 16, 2017 at 04:06:40PM -0600, Simon Glass wrote:
> Hi Tom,
>
> On 9 March 2017 at 11:44, Tom Rini wrote:
> > On Tue, Mar 07, 2017 at 11:20:08AM -0500, Tom Rini wrote:
> >> Commit 94e3c8c4fd7b ("crypto/fsl - Add progressive hashing support
> >> using hardware acceleration.") created en
Hi,
On 11 March 2017 at 04:52, James wrote:
> Hi Felix,
>
> Not 'hijacking' a patch, just following Linux Developer's Certificate of
> Origin 1.1 guidelines.
>
> As you know, I contacted you directly with this patch suggestion prior to
> posting to the mailing list (keeping strictly to rule c). I
On 9 February 2017 at 11:35, York Sun wrote:
> When adding local memory to PCI region, gd->ram_size is correct only
> if the memory is in one continuous block. In case memory is split
> into several banks, each bank should be added separately.
>
> Signed-off-by: York Sun
> CC: Simon Glass
> ---
On 03/16/2017 11:39 PM, Simon Glass wrote:
> Hi Marek,
>
> On 16 March 2017 at 16:37, Marek Vasut wrote:
>> On 03/16/2017 11:28 PM, Simon Glass wrote:
>>> Hi Marek,
>>>
>>> On 16 March 2017 at 16:24, Marek Vasut wrote:
On 03/16/2017 11:21 PM, Simon Glass wrote:
> Hi Marek,
>
> O
Hi Marek,
On 16 March 2017 at 16:37, Marek Vasut wrote:
> On 03/16/2017 11:28 PM, Simon Glass wrote:
>> Hi Marek,
>>
>> On 16 March 2017 at 16:24, Marek Vasut wrote:
>>> On 03/16/2017 11:21 PM, Simon Glass wrote:
Hi Marek,
On 16 March 2017 at 16:17, Marek Vasut wrote:
> On 03
On 03/13/2017 11:30 AM, Nicolas le bayon wrote:
> From: Nicolas Le Bayon
>
> Instead of using a fixed-size array to store variable name, preferring a
> dynamic allocation treats correctly all variable name lengths.
> Variable names are growing through releases and features. By this way, name
> cl
On 03/16/2017 11:28 PM, Simon Glass wrote:
> Hi Marek,
>
> On 16 March 2017 at 16:24, Marek Vasut wrote:
>> On 03/16/2017 11:21 PM, Simon Glass wrote:
>>> Hi Marek,
>>>
>>> On 16 March 2017 at 16:17, Marek Vasut wrote:
On 03/15/2017 01:06 AM, Simon Glass wrote:
> From: Eddie Cai
>
Hi Marek,
On 16 March 2017 at 16:24, Marek Vasut wrote:
> On 03/16/2017 11:21 PM, Simon Glass wrote:
>> Hi Marek,
>>
>> On 16 March 2017 at 16:17, Marek Vasut wrote:
>>> On 03/15/2017 01:06 AM, Simon Glass wrote:
From: Eddie Cai
At present malloc_base/_limit/_ptr are not initiali
On 03/16/2017 11:21 PM, Simon Glass wrote:
> Hi Marek,
>
> On 16 March 2017 at 16:17, Marek Vasut wrote:
>> On 03/15/2017 01:06 AM, Simon Glass wrote:
>>> From: Eddie Cai
>>>
>>> At present malloc_base/_limit/_ptr are not initialised in spl_init() when
>>> we call spl_init() in board_init_f().
>
When building u-boot tools in cross-build environment CFLAGS environment
variable set up for target is taken into an account when building code
for host. Make it empty on invocation of python.
This fixes the following build errors when cross-compiling for xtensa:
cc1: error: unrecognized comman
Hi Kever,
On 16 March 2017 at 01:08, Kever Yang wrote:
> Hi Eddie, Simon,
>
> Could you help to correct rk3188, rk3399 spl at the same time?
I don't have boards to test with for these, sorry.
Regards,
Simon
___
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U-Boot@lists.denx.de
On 16 March 2017 at 09:04, Eddie Cai wrote:
>
>
> 2017-03-15 22:43 GMT+08:00 Simon Glass :
>>
>> From: Eddie Cai
>>
>> Use spl_early_init() to make sure that early malloc() is initialised. This
>> fixes booting on firefly-rk3288, for example.
>>
>> Signed-off-by: Eddie Cai
>> Signed-off-by: Simo
On 16 March 2017 at 09:02, Eddie Cai wrote:
>
>
> 2017-03-15 22:43 GMT+08:00 Simon Glass :
>>
>> From: Eddie Cai
>>
>> At present malloc_base/_limit/_ptr are not initialised in spl_init() when
>> we call spl_init() in board_init_f(). This is due to a recent change aimed
>> at avoiding overwriting
Hi Marek,
On 16 March 2017 at 16:17, Marek Vasut wrote:
> On 03/15/2017 01:06 AM, Simon Glass wrote:
>> From: Eddie Cai
>>
>> At present malloc_base/_limit/_ptr are not initialised in spl_init() when
>> we call spl_init() in board_init_f().
>
> Are you even supposed to call spl_init() from board
On 03/15/2017 01:06 AM, Simon Glass wrote:
> From: Eddie Cai
>
> At present malloc_base/_limit/_ptr are not initialised in spl_init() when
> we call spl_init() in board_init_f().
Are you even supposed to call spl_init() from board_init_f() ?
I was under the impression that's supposed to be calle
On 03/16/2017 11:11 PM, Rush, Jason A. wrote:
> Marek Vasut wrote:
>> On 03/14/2017 03:23 PM, Rush, Jason A. wrote:
>>> Marek Vasut wrote:
On 03/07/2017 04:18 PM, Rush, Jason A. wrote:
> Marek Vasut wrote:
>> On 03/03/2017 04:17 PM, Rush, Jason A. wrote:
>>> Marek Vasut wrote:
Marek Vasut wrote:
> On 03/14/2017 03:23 PM, Rush, Jason A. wrote:
>> Marek Vasut wrote:
>>> On 03/07/2017 04:18 PM, Rush, Jason A. wrote:
Marek Vasut wrote:
> On 03/03/2017 04:17 PM, Rush, Jason A. wrote:
>> Marek Vasut wrote:
>>> On 03/01/2017 05:36 PM, Rush, Jason A. wrote:
On 03/09/2017 01:26 AM, Ley Foon Tan wrote:
> This is the 2nd version of patchset to adds support for Intel Arria 10 SoC.
> This version mainly resolved comments from Marek in [v1].
>
> This is initial patchset enables the basic support for Arria 10 and other
> features will come after this.
>
>
Hi Vikas,
On 14 March 2017 at 11:27, Vikas Manocha wrote:
> This patch adds armv7m instruction & data cache support.
>
> Signed-off-by: Vikas Manocha
> cc: Christophe KERELLO
> ---
>
> Changed in v3:
> - uint32 replcaed with u32.
> - multiple read of hardware register replaced with single.
> -
On 14 March 2017 at 19:19, Andre Przywara wrote:
> So far CONFIG_MD5SUM would need to be set by a board's include file.
> Since the command is really generic, move it over to Kconfig to allow
> it to be defined by either a board's defconfig, menuconfig or some
> config snippet merged via mergeconf
Hi Max,
On 16 March 2017 at 12:38, Max Filippov wrote:
>
> When building u-boot tools in cross-build environment CFLAGS environment
> variable set up for target is taken into an account when building code
> for host. Set it to empty on invocation of python.
>
> This fixes the following build erro
On 14 March 2017 at 19:19, Andre Przywara wrote:
> Commit 19a5944fcd62 ("mvgbe: remove setting of ethaddr within the
> driver") removed the usage of get_random_hex() from the mvgbe driver
> about six years ago. However the prototype of that function survived
> till today in some kirkwood header fi
Hi Tom,
On 9 March 2017 at 11:44, Tom Rini wrote:
> On Tue, Mar 07, 2017 at 11:20:08AM -0500, Tom Rini wrote:
>> Commit 94e3c8c4fd7b ("crypto/fsl - Add progressive hashing support
>> using hardware acceleration.") created entries for CONFIG_SHA1,
>> CONFIG_SHA256, CONFIG_SHA_HW_ACCEL, and CONFIG_
On 14 March 2017 at 19:19, Andre Przywara wrote:
> FIT images require MD5 support to verify image checksums. So far this
> was expressed by defining a CPP symbol in image.h. Since MD5 is now a
> first class Kconfig citizen, express that in Kconfig instead.
>
> Signed-off-by: Andre Przywara
> ---
Hi Andre,
On 14 March 2017 at 19:19, Andre Przywara wrote:
> Boards with an apparent need for the md5sum command had the connected
> config symbol defined in their board header file.
> Move this over to the respective defconfig files now that md5sum is
> configured via Kconfig.
> (This is a manua
On 03/16/2017 10:39 PM, vikas wrote:
> Thanks Marek,
>
> On 03/16/2017 02:40 PM, Marek Vasut wrote:
>> On 03/13/2017 10:45 PM, vikas wrote:
>>> Thanks Marek,
>>>
>>> On 03/11/2017 10:02 PM, Marek Vasut wrote:
On 03/12/2017 01:13 AM, Vikas Manocha wrote:
> This patch adds armv7m instructio
Thanks Marek,
On 03/16/2017 02:40 PM, Marek Vasut wrote:
> On 03/13/2017 10:45 PM, vikas wrote:
>> Thanks Marek,
>>
>> On 03/11/2017 10:02 PM, Marek Vasut wrote:
>>> On 03/12/2017 01:13 AM, Vikas Manocha wrote:
This patch adds armv7m instruction & data cache support.
Signed-off-by:
On 03/09/2017 07:09 AM, Tom Rini wrote:
> On Thu, Mar 02, 2017 at 01:04:33PM -0600, Franklin S Cooper Jr wrote:
>
>> Add basic DT support for K2G ICE evm. Only minimal peripherals are
>> supported to allow console output and MMC boot.
>>
>> Signed-off-by: Franklin S Cooper Jr
>> ---
>> arch/ar
On 03/09/2017 07:09 AM, Tom Rini wrote:
> On Thu, Mar 02, 2017 at 01:04:32PM -0600, Franklin S Cooper Jr wrote:
>
>> Disable netcp by default like all other peripherals in the dtsi file.
>> Enable the peripheral explicitly in the board specific dts file.
>>
>> Signed-off-by: Franklin S Cooper Jr
On Thu, Mar 16, 2017 at 2:11 PM, Tom Rini wrote:
> On Thu, Mar 16, 2017 at 11:38:00AM -0700, Max Filippov wrote:
>
>> When building u-boot tools in cross-build environment CFLAGS environment
>> variable set up for target is taken into an account when building code
>> for host. Set it to empty on i
Enable Network Driver along with network related commands -- ping, dhcp,
mii -- in ast2500 Eval Board's defconfig.
Add MAC devices' configuration to Eval Board Device Tree.
Signed-off-by: Maxim Sloyko
---
---
arch/arm/dts/ast2500-evb.dts | 14 ++
configs/evb-ast2500_defconfig |
On 03/09/2017 07:08 AM, Tom Rini wrote:
> On Thu, Mar 02, 2017 at 01:04:22PM -0600, Franklin S Cooper Jr wrote:
>
>> Enable various config options to allow U-boot at runtime to select the
>> proper dtb to use from the list of dtb's within the FIT image.
>>
>> Signed-off-by: Franklin S Cooper Jr
On 03/15/2017 08:56 AM, Eddie Cai wrote:
> rockusb is a protocol run between host pc and device. it help people get
> device
> info, flash image to device. this patch implement rockusb on device side.
What is the benefit of this yet-another NIH protocol compared to ie.
DFU/UMS/Thor/Fastboot ?
>
On 03/14/2017 03:23 PM, Rush, Jason A. wrote:
> Marek Vasut wrote:
>> On 03/07/2017 04:18 PM, Rush, Jason A. wrote:
>>> Marek Vasut wrote:
On 03/03/2017 04:17 PM, Rush, Jason A. wrote:
> Marek Vasut wrote:
>> On 03/01/2017 05:36 PM, Rush, Jason A. wrote:
>>> This reverts commit b63
Refactor SCU header to use consistent Mask & Shift values.
Now, consistently, to read value from SCU register, mask needs
to be applied before shift.
Signed-off-by: Maxim Sloyko
---
arch/arm/include/asm/arch-aspeed/scu_ast2500.h | 12
arch/arm/mach-aspeed/ast2500/sdram_ast2500.c | 5
Remove unnecessary apb and ahb nodes and just override necessary
nodes/values.
Signed-off-by: Maxim Sloyko
---
arch/arm/dts/ast2500-u-boot.dtsi | 41
1 file changed, 21 insertions(+), 20 deletions(-)
diff --git a/arch/arm/dts/ast2500-u-boot.dtsi b/arch/
The device that Aspeed uses is basically Faraday FTGMAC100, but with
some differences here and there. Since I don't have access to a properly
implemented FTGMAC100 though, I can't really test it and so I don't
feel comfortable claiming compatibility, even though I reused a lot of
FTGMAC100 driver c
On 03/13/2017 10:45 PM, vikas wrote:
> Thanks Marek,
>
> On 03/11/2017 10:02 PM, Marek Vasut wrote:
>> On 03/12/2017 01:13 AM, Vikas Manocha wrote:
>>> This patch adds armv7m instruction & data cache support.
>>>
>>> Signed-off-by: Vikas Manocha
>>> ---
>>>
>>> Changed in v2:
>>> - changed strucu
Enable I2C driver in ast2500 Eval Board defconfig.
Also enable i2c command.
Signed-off-by: Maxim Sloyko
---
configs/evb-ast2500_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
index f8ef9b779c..08b5f85a34 100644
---
Add Device Model based I2C driver for ast2500/ast2400 SoCs.
The driver is very limited, it only supports master mode and
synchronous byte-by-byte reads/writes, no DMA or Pool Buffers.
Signed-off-by: Maxim Sloyko
---
drivers/i2c/Kconfig | 9 ++
drivers/i2c/Makefile | 1 +
drivers/i2c/ast_
On 03/14/2017 06:27 PM, Vikas Manocha wrote:
> This patch adds armv7m instruction & data cache support.
>
> Signed-off-by: Vikas Manocha
> cc: Christophe KERELLO
> ---
>
> Changed in v3:
> - uint32 replcaed with u32.
> - multiple read of hardware register replaced with single.
> - pointers repl
This driver uses Generic Pinctrl framework and is compatible with
the Linux driver for ast2500: it uses the same device tree
configuration.
Not all pins are supported by the driver at the moment, so it actually
compatible with ast2400. In general, however, there are differences that
in the future
This change switches all existing users of ast2500 Watchdog to Driver
Model based Watchdog driver.
To perform system reset Sysreset Driver uses first Watchdog device found
via uclass_first_device call. Since the system is going to be reset
anyway it does not make much difference which watchdog is
Add support for clocks needed by MACs to ast2500 clock driver.
The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
PCLK_MAC2 for MAC1 and MAC2 respectively.
The rate of D2-PLL is hardcoded to 250MHz -- the value used in Aspeed
SDK. It is not entirely clear from the datasheet how th
This driver supports ast2500 and ast2400 SoCs.
Only ast2500 supports reset_mask and thus the option of resettting
individual peripherals using WDT.
Signed-off-by: Maxim Sloyko
---
arch/arm/include/asm/arch-aspeed/wdt.h | 53 --
arch/arm/mach-aspeed/ast_wdt.c | 40 -
Add P-Bus Clock support to ast2500 clock driver.
This is the clock used by I2C devices.
Signed-off-by: Maxim Sloyko
---
arch/arm/include/asm/arch-aspeed/scu_ast2500.h | 3 ++-
drivers/clk/aspeed/clk_ast2500.c | 11 +++
2 files changed, 13 insertions(+), 1 deletion(-)
dif
Enable Pinctrl Driver in AST2500 Eval Board's defconfig
Signed-off-by: Maxim Sloyko
---
configs/evb-ast2500_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
index 74808a71ee..f8ef9b779c 100644
--- a/configs/evb-ast2500_d
Make functions for locking and unlocking SCU part of SCU API.
Many drivers need to modify settings in SCU and thus need to unlock it
first. This change makes it possible.
Signed-off-by: Maxim Sloyko
---
arch/arm/include/asm/arch-aspeed/scu_ast2500.h | 14 ++
arch/arm/mach-aspeed/ast
Add Reset Driver configuration to ast2500 SoC Device Tree and bindings
for various reset signals
Signed-off-by: Maxim Sloyko
---
arch/arm/dts/ast2500-evb.dts | 15 +++
arch/arm/dts/ast2500-u-boot.dtsi | 10 +++
include/dt-bindings/reset/ast2500-reset.h | 45 +++
Add Reset Driver for ast2500 SoC. This driver uses Watchdog Timer to
perform resets and thus depends on it. The actual Watchdog device used
needs to be configured in Device Tree using "aspeed,wdt" property, which
must be WDT phandle, for example:
rst: reset-controller {
compatible = "aspeed,as
This is a simple uclass for Watchdog Timers. It has four operations:
start, restart, reset, stop. Drivers must implement start, restart and
stop operations, while implementing reset is optional: It's default
implementation expires watchdog timer in one clock tick.
Signed-off-by: Maxim Sloyko
---
Pull in the Device Tree for ast2500 from the mainline Linux kernel
Signed-off-by: Maxim Sloyko
---
arch/arm/dts/ast2500.dtsi | 881 +-
1 file changed, 880 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/ast2500.dtsi b/arch/arm/dts/ast2500.dtsi
This series expands support for Aspeed AST2500 SoC, commonly used as
Board Management Controller in many servers, to the point where it can
actually be useful.
The main goal of this series is I2C and Network drivers, the rest are
either cleanups or supporting patches. Most notable among them is
ad
The CAAM in IMX parts doesn't support public key hardware acceleration
(PKHA), so don't use RSA_FREESCALE_EXP. If you try to use it on IMX
(assuming you have the clocks enabled first) you will get back an
"Invalid KEY Command" error since PKHA isn't a valid key destination for
these parts.
Signed-
On Fri, Mar 10, 2017 at 06:38:10PM +, yuiko.osh...@microchip.com wrote:
> From: Yuiko Oshino
>
> Add support for Microchip LAN7800 and 7850, USB to 10/100/1000 Ethernet
> Controllers
>
> Signed-off-by: Yuiko Oshino
> Cc: Marek Vasut
> ---
> Changes for v2:
>- lan78xx.c header comment
On Thu, Mar 16, 2017 at 11:38:00AM -0700, Max Filippov wrote:
> When building u-boot tools in cross-build environment CFLAGS environment
> variable set up for target is taken into an account when building code
> for host. Set it to empty on invocation of python.
>
> This fixes the following build
Currently, AM43xx just re-uses the version strings from AM33xx which is
wrong; the actual values for AM43xx are different. Fix this by adding
a separate version string array for AM43xx and use this instead.
Signed-off-by: Tero Kristo
Reported-by: Sekhar Nori
---
arch/arm/mach-omap2/am33xx/sys_i
I'm trying to use the ns16550 DM driver in a platform where havind a dtb
in SPL is not plausible, so we're using platdata.
Now for ns16550 The U_BOOT_DRIVER is guarded by !OF_PLATDATA, so the
driver is not compiled in SPL. This seems inconsistent with other
U_BOOT_DRIVERs. This was introduced
USB requires 100MHz clock. On ls1012, sysclk(125MHz) is not for USB.
Another 100MHz clock is for USB. So For USB, check if sysclk is 100MHz
is failed on ls1012, sysclk is not for USB. Don't check sysclk for
USB on ls1012.
Signed-off-by: Yingxi Yu
---
arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 3 +
I have a board that is running u-boot based on "U-Boot 2009.08". I am in
the process of developing another board that is very similar but want to
upgrade the u-boot to "U-Boot 2013.06".
The boards are NXP iMX6DL CPU (ARM) based with 32 bit DDR3 and console via
UART1. These designs are based on the
On Tue, Feb 21, 2017 at 01:37:11PM +0100, Patrice Chotard wrote:
> From: Patrice Chotard
>
> This device tree has been extracted from v4.9 kernel
>
> Signed-off-by: Patrice Chotard
> Reviewed-by: Tom Rini
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
On Tue, Feb 21, 2017 at 01:37:06PM +0100, Patrice Chotard wrote:
> From: Patrice Chotard
>
> Signed-off-by: Patrice Chotard
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
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___
U-Bo
On Tue, Feb 21, 2017 at 01:37:10PM +0100, Patrice Chotard wrote:
> From: Patrice Chotard
>
> Add STMicroelectronics STiH410 pinctrl driver
>
> Signed-off-by: Patrice Chotard
> Reviewed-by: Tom Rini
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
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Descrip
On Mon, Mar 13, 2017 at 05:43:16PM +0900, Masahiro Yamada wrote:
> Richard reported U-Boot tools issues in OpenEmbedded/Yocto project.
>
> OE needs to be able to change the default compiler. If we pass in
> HOSTCC through the make command, it overwrites all HOSTCC instances,
> including ones in t
On Tue, Feb 21, 2017 at 01:37:08PM +0100, Patrice Chotard wrote:
> From: Patrice Chotard
>
> As no gpio.h is defined in arch/arm/include/asm/arch-stih410,
> to avoid compilation failure, do not include asm/arch/gpio.h.
>
> This is needed for example when including sdhci.h, which include
> asm/g
On Tue, Feb 21, 2017 at 01:37:12PM +0100, Patrice Chotard wrote:
> From: Patrice Chotard
>
> This is a 96Board compliant board based on STiH410 SoC:
> - 1GB DDR
> - On-Board USB combo WiFi/Bluetooth RTL8723BU
> with PCB soldered antenna
> - Ethernet 1000-BaseT
> - SATA
> - HDMI
>
On Tue, Feb 21, 2017 at 01:37:05PM +0100, Patrice Chotard wrote:
> From: Patrice Chotard
>
> Add ARM global timer based timer
>
> Signed-off-by: Patrice Chotard
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
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On Thu, Mar 09, 2017 at 04:28:25PM +0900, Masahiro Yamada wrote:
> At first, the ARM64 Linux booting requirement recommended that the
> kernel image be placed text_offset bytes from 2MB aligned base near
> the start of usable system RAM because memory below that base address
> was unusable at that
On Tue, Feb 21, 2017 at 01:37:07PM +0100, Patrice Chotard wrote:
> From: Patrice Chotard
>
> This patch adds support to ASC (asynchronous serial controller)
> driver, which is basically a standard serial driver. This IP
> is common across other STMicroelectronics SoCs
>
> Signed-off-by: Patrice
On Tue, Feb 21, 2017 at 01:37:09PM +0100, Patrice Chotard wrote:
> From: Patrice Chotard
>
> Add SDHCI host controller found on STMicroelectronics SoCs
>
> On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
> inside a dedicated flashSS sub-system that provides an extend subset
> of
On Sun, Feb 19, 2017 at 12:23:39AM +0100, Ladislav Michl wrote:
> ISEE's U-Boot and Linux are using 1bit ECC scheme, while we
> switched to 8bit ECC to fullfill flash specification requirements.
> However when trying to run U-Boot on board with 1bit ECC'd data
> on flash, UBI code takes several mi
On Tue, Feb 21, 2017 at 01:37:04PM +0100, Patrice Chotard wrote:
> From: Patrice Chotard
>
> The STiH410 is an advanced multi-HD AVC processor with 3D
> graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU
> part of the STiH407 family.
>
> It has wide connectivity including USB 3.0, PCI-e, S
On Fri, Feb 17, 2017 at 08:22:17AM +, Phil Edworthy wrote:
> The SysTick is a 24-bit down counter that is found on all ARM Cortex
> M3, M4, M7 devices and is always located at a fixed address.
>
> The number of reference clock ticks that correspond to 10ms is normally
> defined in the SysTick
On Sun, Feb 19, 2017 at 12:24:49AM +0100, Ladislav Michl wrote:
> Leave only detected flash type enabled in FTD as otherwise GPMC CS is
> claimed (and never freed) by Linux, causing 'concurent' flash type
> not to be probed.
>
> Signed-off-by: Ladislav Michl
Applied to u-boot/master, thanks!
-
On Sun, Feb 12, 2017 at 06:08:43PM +0900, Masahiro Yamada wrote:
> These two functions are only used in lib/tiny-printf.c .
>
> Signed-off-by: Masahiro Yamada
> Tested-by: Andreas Färber
> Reviewed-by: Stefan Roese
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Feb 15, 2017 at 06:42:54PM +0530, Lokesh Vutla wrote:
> The size field in GP header that is expected by ROM is size of the
> image + size of the header. But omapimage generates a gp header
> only with size of the image as size field. Fix it
>
> Signed-off-by: Lokesh Vutla
Applied to u-b
On Tue, Mar 14, 2017 at 05:57:31AM +0900, Masahiro Yamada wrote:
> Hi Tom,
>
> Please pull my first round of UniPhier changes for v2017.05:
>
> - Fix regression of DRAM settings
> - DT updates (fix W=1 warnings, re-sync with Linux)
>
>
> (For Linux, I had already sent equivalent patches
> to
Tom,
The following changes since commit 8537ddd769f460d7fb7a62a3dcc9669049702e51:
Prepare v2017.03 (2017-03-13 13:54:16 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-fsl-qoriq.git
for you to fetch changes up to 9b6639fa85bddd90df4c371f25a89c791a6ee6ef:
LS102
When building u-boot tools in cross-build environment CFLAGS environment
variable set up for target is taken into an account when building code
for host. Set it to empty on invocation of python.
This fixes the following build errors when cross-compiling for xtensa:
cc1: error: unrecognized comm
2017-03-15 22:43 GMT+08:00 Simon Glass :
> From: Eddie Cai
>
> Use spl_early_init() to make sure that early malloc() is initialised. This
> fixes booting on firefly-rk3288, for example.
>
> Signed-off-by: Eddie Cai
> Signed-off-by: Simon Glass
>
Reviewed-by: Eddie Cai
> ---
>
> Changes in v4:
2017-03-15 22:43 GMT+08:00 Simon Glass :
> From: Eddie Cai
>
> At present malloc_base/_limit/_ptr are not initialised in spl_init() when
> we call spl_init() in board_init_f(). This is due to a recent change aimed
> at avoiding overwriting the malloc area set up on some boards by
> spl_relocate_s
2017-03-16 9:39 GMT+08:00 Simon Glass :
> Hi Eddie,
>
> On 6 March 2017 at 00:03, Eddie Cai wrote:
> > Hi Simon
> > I guess you may lost this patch. So a friendly ping.
>
> I did not lose it, but I thought I commented on it, that we needed to
> remove the duplicate code. Perhaps I imagined it sor
At the end of pre-relocation phase, save the new stack address
to CMOS and use it as the stack on next S3 boot for fsp_init()
continuation function.
Signed-off-by: Bin Meng
---
arch/x86/cpu/cpu.c | 8
arch/x86/include/asm/cmos_layout.h | 31
This introduces a Kconfig option for ACPI S3 resume, as well as a
header file to include anything related to ACPI S3 resume.
Signed-off-by: Bin Meng
---
arch/x86/Kconfig | 12 +
arch/x86/include/asm/acpi_s3.h | 58 ++
2 files changed
This adds a library that provides CMOS (inside RTC SRAM) access
at a very early stage when driver model is not available yet.
Signed-off-by: Bin Meng
---
arch/x86/include/asm/early_cmos.h | 43 +
arch/x86/lib/Makefile | 1 +
arch/x86/lib/early_cmos.c
In enter_acpi_mode() PM1_CNT register is changed to PM1_CNT_SCI_EN
directly without preserving its previous value. Update to change
the register access to read-modify-write (RMW).
Signed-off-by: Bin Meng
---
arch/x86/lib/acpi_table.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
dif
Before jumping to OS waking up vector, we need turn on ACPI mode
for S3, just like what we do for a normal boot.
Signed-off-by: Bin Meng
---
arch/x86/lib/acpi_s3.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/lib/acpi_s3.c b/arch/x86/lib/acpi_s3.c
index e5cc3b0..0b62b75 10064
To do something more in acpi_resume() like turning on ACPI mode,
we need locate ACPI FADT table pointer first. But currently this
is done in acpi_find_wakeup_vector().
This changes acpi_resume() signature to accept ACPI FADT pointer
as the parameter. A new API acpi_find_fadt() is introduced, and
a
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