Re: [U-Boot] [PATCH 00/18] Introduce SPI TPM v2.0 support

[Miquel Raynal]

Hi Tom,

On Thu, 8 Mar 2018 12:20:30 -0500, Tom Rini  wrote:

> On Thu, Mar 08, 2018 at 04:40:03PM +0100, Miquel Raynal wrote:
> 
> > Current U-Boot supports TPM v1.2 specification. The new specification
> > (v2.0) is not backward compatible and renames/introduces several
> > functions.
> > 
> > This series introduces a new SPI driver following the TPM v2.0
> > specification. It has been tested on a ST TPM but should be usable with
> > others v2.0 compliant chips.
> > 
> > Then, basic functionalities are introduced one by one for the v2.0
> > specification. The INIT command now can receive a parameter to
> > distinguish further TPMv1/TPMv2 commands. After that, the library itself
> > will know which one is pertinent and will return a special error if the
> > desired command is not supported for the selected specification.  
> 
> Thanks for doing all of this.  Can you please enable this feature on
> sandbox and/or an x86 QEMU variant where I assume we could also then
> setup automated testing?
> 

Not sure I understand your request correctly: the TPM commands are
already available in the sandbox (I don't see what I could add), I just
extended the current set of commands.

However, even with these commands, we won't be able to test them in a
sandbox unless with an actual device.

I probably miss something, can you explain a bit more what you would
like?

Thank you,
Miquèl

-- 
Miquel Raynal, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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Re: [U-Boot] [PATCH] arm: Disable the strict alignment of data on armv7

[Michal Simek]

Hi Wolfgang,

On 8.3.2018 23:52, Wolfgang Denk wrote:
> Dear Michal,
> 
> In message 
> <029f7f8f6d89cc77c92e04223a7402376e050f56.1520433579.git.michal.si...@xilinx.com>
>  you wrote:
>> From: Nitin Jain 
>>
>> This patch is used for disable the strict alignment of data
>> to avoid the memory alignment issues.
> 
> Can you please add some comments what the consequences of this
> change are?  I guess there are advantages, but I also guess these
> come at a price?

That's something what I am expecting from this discussion if there are
any corner cases which we are not aware of.

We found this setting based on randomized testing where simply non
aligned access for memory read was causing exception.
The same tests were running fine on arm64 where non aligned accesses are
permitted.
It is hard to compare performance impact on u-boot but from
functionality point of view we are not able to see difference.
If there is any performance impact that it is quite low.

Thanks,
Michal
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[U-Boot] [PATCH 3/3] ARM: dts: stratix10: Add base dtsi and devkit dts

[Dinh Nguyen]

From the Linux v4.16-rc4, add the base dtsi and devkit dts files for
the Stratix10 SoCFPGA platform.

Signed-off-by: Dinh Nguyen 
---
 arch/arm/dts/Makefile|   1 +
 arch/arm/dts/socfpga_stratix10.dtsi  | 381 +++
 arch/arm/dts/socfpga_stratix10_socdk.dts |  92 
 3 files changed, 474 insertions(+)
 create mode 100644 arch/arm/dts/socfpga_stratix10.dtsi
 create mode 100644 arch/arm/dts/socfpga_stratix10_socdk.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 20a4c37..5170487 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -184,6 +184,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) +=   
\
socfpga_cyclone5_sockit.dtb \
socfpga_cyclone5_socrates.dtb   \
socfpga_cyclone5_sr1500.dtb \
+   socfpga_stratix10_socdk.dtb \
socfpga_cyclone5_vining_fpga.dtb
 
 dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb  \
diff --git a/arch/arm/dts/socfpga_stratix10.dtsi 
b/arch/arm/dts/socfpga_stratix10.dtsi
new file mode 100644
index 000..ddf8032
--- /dev/null
+++ b/arch/arm/dts/socfpga_stratix10.dtsi
@@ -0,0 +1,381 @@
+/*
+ * Copyright (C) 2018 Intel Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+/dts-v1/;
+#include 
+#include 
+
+/ {
+   compatible = "altr,socfpga-stratix10";
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   compatible = "arm,cortex-a53", "arm,armv8";
+   device_type = "cpu";
+   enable-method = "psci";
+   reg = <0x0>;
+   };
+
+   cpu1: cpu@1 {
+   compatible = "arm,cortex-a53", "arm,armv8";
+   device_type = "cpu";
+   enable-method = "psci";
+   reg = <0x1>;
+   };
+
+   cpu2: cpu@2 {
+   compatible = "arm,cortex-a53", "arm,armv8";
+   device_type = "cpu";
+   enable-method = "psci";
+   reg = <0x2>;
+   };
+
+   cpu3: cpu@3 {
+   compatible = "arm,cortex-a53", "arm,armv8";
+   device_type = "cpu";
+   enable-method = "psci";
+   reg = <0x3>;
+   };
+   };
+
+   pmu {
+   compatible = "arm,armv8-pmuv3";
+   interrupts = <0 120 8>,
+<0 121 8>,
+<0 122 8>,
+<0 123 8>;
+   interrupt-affinity = <>,
+<>,
+<>,
+<>;
+   interrupt-parent = <>;
+   };
+
+   psci {
+   compatible = "arm,psci-0.2";
+   method = "smc";
+   };
+
+   intc: intc@fffc1000 {
+   compatible = "arm,gic-400", "arm,cortex-a15-gic";
+   #interrupt-cells = <3>;
+   interrupt-controller;
+   reg = <0x0 0xfffc1000 0x0 0x1000>,
+ <0x0 0xfffc2000 0x0 0x2000>,
+ <0x0 0xfffc4000 0x0 0x2000>,
+ <0x0 0xfffc6000 0x0 0x2000>;
+   };
+
+   soc {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "simple-bus";
+   device_type = "soc";
+   interrupt-parent = <>;
+   ranges = <0 0 0 0x>;
+
+   clkmgr@ffd1000 {
+   compatible = "altr,clk-mgr";
+   reg = <0xffd1 0x1000>;
+   };
+
+   gmac0: ethernet@ff80 {
+   compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", 
"snps,dwmac";
+   reg = <0xff80 0x2000>;
+   interrupts = <0 90 4>;
+   interrupt-names = "macirq";
+   mac-address = [00 00 00 00 00 00];
+   resets = < EMAC0_RESET>;
+   reset-names = "stmmaceth";
+   status = "disabled";
+   };
+
+   gmac1: ethernet@ff802000 {
+   compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", 
"snps,dwmac";
+   reg = <0xff802000 0x2000>;
+   interrupts = <0 91 4>;
+   interrupt-names = "macirq";
+   mac-address = [00 00 00 00 00 00];
+   resets = < EMAC1_RESET>;
+   reset-names = "stmmaceth";
+   status = "disabled";
+   };
+
+   

[U-Boot] [PATCH 2/3] ARM64: stratix10: add reset manager includes

[Dinh Nguyen]

Pulled from linux v4.16-rc4.

Signed-off-by: Dinh Nguyen 
---
 include/dt-bindings/reset/altr,rst-mgr-s10.h | 97 
 1 file changed, 97 insertions(+)
 create mode 100644 include/dt-bindings/reset/altr,rst-mgr-s10.h

diff --git a/include/dt-bindings/reset/altr,rst-mgr-s10.h 
b/include/dt-bindings/reset/altr,rst-mgr-s10.h
new file mode 100644
index 000..e3cae08
--- /dev/null
+++ b/include/dt-bindings/reset/altr,rst-mgr-s10.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright (C) 2016-2018 Intel Corporation. All rights reserved
+ * Copyright (C) 2016 Altera Corporation. All rights reserved
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ * derived from Steffen Trumtrar's "altr,rst-mgr-a10.h"
+ */
+
+#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_S10_H
+#define _DT_BINDINGS_RESET_ALTR_RST_MGR_S10_H
+
+/* MPUMODRST */
+#define CPU0_RESET 0
+#define CPU1_RESET 1
+#define CPU2_RESET 2
+#define CPU3_RESET 3
+
+/* PER0MODRST */
+#define EMAC0_RESET32
+#define EMAC1_RESET33
+#define EMAC2_RESET34
+#define USB0_RESET 35
+#define USB1_RESET 36
+#define NAND_RESET 37
+/* 38 is empty */
+#define SDMMC_RESET39
+#define EMAC0_OCP_RESET40
+#define EMAC1_OCP_RESET41
+#define EMAC2_OCP_RESET42
+#define USB0_OCP_RESET 43
+#define USB1_OCP_RESET 44
+#define NAND_OCP_RESET 45
+/* 46 is empty */
+#define SDMMC_OCP_RESET47
+#define DMA_RESET  48
+#define SPIM0_RESET49
+#define SPIM1_RESET50
+#define SPIS0_RESET51
+#define SPIS1_RESET52
+#define DMA_OCP_RESET  53
+#define EMAC_PTP_RESET 54
+/* 55 is empty*/
+#define DMAIF0_RESET   56
+#define DMAIF1_RESET   57
+#define DMAIF2_RESET   58
+#define DMAIF3_RESET   59
+#define DMAIF4_RESET   60
+#define DMAIF5_RESET   61
+#define DMAIF6_RESET   62
+#define DMAIF7_RESET   63
+
+/* PER1MODRST */
+#define WATCHDOG0_RESET64
+#define WATCHDOG1_RESET65
+#define WATCHDOG2_RESET66
+#define WATCHDOG3_RESET67
+#define L4SYSTIMER0_RESET  68
+#define L4SYSTIMER1_RESET  69
+#define SPTIMER0_RESET 70
+#define SPTIMER1_RESET 71
+#define I2C0_RESET 72
+#define I2C1_RESET 73
+#define I2C2_RESET 74
+#define I2C3_RESET 75
+#define I2C4_RESET 76
+/* 77-79 is empty */
+#define UART0_RESET80
+#define UART1_RESET81
+/* 82-87 is empty */
+#define GPIO0_RESET88
+#define GPIO1_RESET89
+
+/* BRGMODRST */
+#define SOC2FPGA_RESET 96
+#define LWHPS2FPGA_RESET   97
+#define FPGA2SOC_RESET 98
+#define F2SSDRAM0_RESET99
+#define F2SSDRAM1_RESET100
+#define F2SSDRAM2_RESET101
+#define DDRSCH_RESET   102
+
+/* COLDMODRST */
+#define CPUPO0_RESET   160
+#define CPUPO1_RESET   161
+#define CPUPO2_RESET   162
+#define CPUPO3_RESET   163
+/* 164-167 is empty */
+#define L2_RESET   168
+
+/* DBGMODRST */
+#define DBG_RESET  224
+#define CSDAP_RESET225
+
+/* TAPMODRST */
+#define TAP_RESET  256
+
+#endif
-- 
2.7.4

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[U-Boot] [PATCH 1/3] arm: socfpga: stratix10: Add base address map for Statix10 SoC

[Dinh Nguyen]

From: Chin Liang See 

Add the base address map for Statix10 SoC

Signed-off-by: Chin Liang See 
Signed-off-by: Dinh Nguyen 
---
v2: removed addresses that can be part of the fdt
---
 arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 33 ++
 1 file changed, 33 insertions(+)
 create mode 100644 arch/arm/mach-socfpga/include/mach/base_addr_s10.h

diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h 
b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
new file mode 100644
index 000..7052804
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2016-2017 Intel Corporation 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#ifndef _SOCFPGA_S10_BASE_HARDWARE_H_
+#define _SOCFPGA_S10_BASE_HARDWARE_H_
+
+#define SOCFPGA_SDR_SCHEDULER_ADDRESS  0xf8000400
+#define SOCFPGA_HMC_MMR_IO48_ADDRESS   0xf801
+#define SOCFPGA_SDR_ADDRESS0xf8011000
+#define SOCFPGA_SMMU_ADDRESS   0xfa00
+#define SOCFPGA_MAILBOX_ADDRESS0xffa3
+#define SOCFPGA_UART0_ADDRESS  0xffc02000
+#define SOCFPGA_UART1_ADDRESS  0xffc02100
+#define SOCFPGA_SPTIMER0_ADDRESS   0xffc03000
+#define SOCFPGA_SPTIMER1_ADDRESS   0xffc03100
+#define SOCFPGA_SYSTIMER0_ADDRESS  0xffd0
+#define SOCFPGA_SYSTIMER1_ADDRESS  0xffd00100
+#define SOCFPGA_GTIMER_SEC_ADDRESS 0xffd01000
+#define SOCFPGA_GTIMER_NSEC_ADDRESS0xffd02000
+#define SOCFPGA_CLKMGR_ADDRESS 0xffd1
+#define SOCFPGA_RSTMGR_ADDRESS 0xffd11000
+#define SOCFPGA_SYSMGR_ADDRESS 0xffd12000
+#define SOCFPGA_PINMUX_DEDICATED_IO_ADDRESS0xffd13000
+#define SOCFPGA_DMANONSECURE_ADDRESS   0xffda
+#define SOCFPGA_DMASECURE_ADDRESS  0xffda1000
+#define SOCFPGA_OCRAM_ADDRESS  0xffe0
+#define GICD_BASE  0xfffc1000
+#define GICC_BASE  0xfffc2000
+
+#endif /* _SOCFPGA_S10_BASE_HARDWARE_H_ */
-- 
2.7.4

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[U-Boot] [PATCH 0/3] ARM: stratix10: initial small patchset

[Dinh Nguyen]

Hi,

This is a very small initial patchset for the SoCFPGA Stratix10 platform.
This patchset adds a few core address defines that are not obtainable from
DT, pulls in from Linux the base DTS files, and the reset manager bindings.
The DTB is able to compile with this patchset.

Instead of dropping a larger patchset with for SPL and U-Boot, I figure
we start out small first, and allow for a couple of medium size patchset
later for further support.

Thanks,
Dinh

Chin Liang See (1):
  arm: socfpga: stratix10: Add base address map for Statix10 SoC

Dinh Nguyen (2):
  ARM64: stratix10: add reset manager includes
  ARM: dts: stratix10: Add base dtsi and devkit dts

 arch/arm/dts/Makefile  |   1 +
 arch/arm/dts/socfpga_stratix10.dtsi| 381 +
 arch/arm/dts/socfpga_stratix10_socdk.dts   |  92 +
 arch/arm/mach-socfpga/include/mach/base_addr_s10.h |  33 ++
 include/dt-bindings/reset/altr,rst-mgr-s10.h   |  97 ++
 5 files changed, 604 insertions(+)
 create mode 100644 arch/arm/dts/socfpga_stratix10.dtsi
 create mode 100644 arch/arm/dts/socfpga_stratix10_socdk.dts
 create mode 100644 arch/arm/mach-socfpga/include/mach/base_addr_s10.h
 create mode 100644 include/dt-bindings/reset/altr,rst-mgr-s10.h

-- 
2.7.4

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Re: [U-Boot] [PATCH] armv8: ls1043ardb_sdcard: delete CONFIG_SPL_FSL_LS_PPA

[York Sun]

On 03/08/2018 06:30 PM, ying.zhang22...@nxp.com wrote:
> From: Zhang Ying-22455 
> 
> Signed-off-by: Zhang Ying-22455 
> ---

I know why you do this. But not everyone knows. If you don't add commit
message, I will add whatever I see it fit.

York
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Re: [U-Boot] [PATCH 1/1] wandboard: remove superfluous include

[Fabio Estevam]

On Thu, Mar 8, 2018 at 7:00 PM, Heinrich Schuchardt  wrote:
> No definition provided by input.h is used in the board file.
>
> Signed-off-by: Heinrich Schuchardt 

Reviewed-by: Fabio Estevam 
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Re: [U-Boot] [PATCH] imximage: Check the IVT offset in the correct location

[Fabio Estevam]

On Thu, Mar 8, 2018 at 7:24 PM, Fabio Estevam  wrote:
> Hi Troy,
>
> On Thu, Mar 8, 2018 at 7:03 PM, Troy Kisky
>  wrote:
>
>> Did you test that an image without BOOT_FROM still gets an error message ?
>
> Good point! It is not properly detecting such case.
>
> Will need to rework the patch, thanks.

I am back to the original mainline code plus this debug line:

--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -778,6 +778,7 @@ static uint32_t parse_cfg_file(struct imx_header
*imxhdr, char *name)
fclose(fd);

/* Exit if there is no BOOT_FROM field specifying the flash_offset */
+   fprintf(stderr, "*** offset is 0x%x\n", imximage_ivt_offset);
if (imximage_ivt_offset == FLASH_OFFSET_UNDEFINED) {
fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name);
exit(EXIT_FAILURE);

This is what I get after a 'make mrproper; make vf610twr_defconfig; make -j4'

  SHIPPED dts/dt.dtb
  FDTGREP dts/dt-spl.dtb
  CAT u-boot-dtb.bin
  COPYu-boot.dtb
  COPYu-boot.bin
  CFGSboard/freescale/vf610twr/imximage.cfg.cfgtmp
  CFGSboard/freescale/vf610twr/imximage.cfg.cfgtmp
  MKIMAGE u-boot-dtb.imx
*** offset is 0x
Error: No BOOT_FROM tag in board/freescale/vf610twr/imximage.cfg.cfgtmp
arch/arm/mach-imx/Makefile:100: recipe for target 'u-boot-dtb.imx' failed
make[1]: *** [u-boot-dtb.imx] Error 1
Makefile:911: recipe for target 'u-boot-dtb.imx' failed
make: *** [u-boot-dtb.imx] Error 2
make: *** Waiting for unfinished jobs
  MKIMAGE u-boot.imx
*** offset is 0x400
*** offset is 0x400
rm u-boot.imx

If I run with -j1 I see:

  OBJCOPY u-boot-nodtb.bin
  DTC arch/arm/dts/vf500-colibri.dtb
  DTC arch/arm/dts/vf610-colibri.dtb
  DTC arch/arm/dts/vf610-twr.dtb
  DTC arch/arm/dts/pcm052.dtb
  DTC arch/arm/dts/bk4r1.dtb
make[2]: 'arch/arm/dts/vf610-twr.dtb' is up to date.
  SHIPPED dts/dt.dtb
  FDTGREP dts/dt-spl.dtb
  CAT u-boot-dtb.bin
  CFGSboard/freescale/vf610twr/imximage.cfg.cfgtmp
  MKIMAGE u-boot-dtb.imx
*** offset is 0x400
*** offset is 0x400
  COPYu-boot.bin
  MKIMAGE u-boot.imx
*** offset is 0x400
*** offset is 0x400
  MKIMAGE u-boot.vyb
  OBJCOPY u-boot.srec
  SYM u-boot.sym
  COPYu-boot.dtb
  CHK include/config.h
  CFG u-boot.cfg
  CFGCHK  u-boot.cfg
rm u-boot.imx

It seems we need to rework the logic in arch/arm/mach-imx/Makefile to
not call the cfg parser twice one (one for u-boot-dtb.imx and another
one for u-boot.imx).

Any ideas?
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Re: [U-Boot] [PATCH v5 02/15] dma: add channels support

[Grygorii Strashko]

Hi Álvaro,

On 03/05/2018 02:05 PM, Álvaro Fernández Rojas wrote:
> This adds channels support for dma controllers that have multiple channels
> which can transfer data to/from different devices (enet, usb...).
> 
> Signed-off-by: Álvaro Fernández Rojas 
> Reviewed-by: Simon Glass 
> ---
>   v5: remove unneeded dma.h include
>   v4: no changes
>   v3: Introduce changes reported by Simon Glass:
>- Improve dma-uclass.h documentation.
>- Switch to live tree API.
> 
>   drivers/dma/Kconfig  |   7 ++
>   drivers/dma/dma-uclass.c | 188 
> +--
>   include/dma-uclass.h |  78 
>   include/dma.h| 174 ++-
>   4 files changed, 439 insertions(+), 8 deletions(-)

Small note first. I don't know if this is common practice for u-boot -
but Isn't it preferable to send new version of the series *not as reply* to the 
old one?

I've tried this and, in general, it works for me (unfortunately I can't post 
code yet).
Thanks a lot for you work.

But... (it's always but ;)
[...]
> + /**
> +  * receive() - Receive a DMA transfer.
> +  *
> +  * @dma: The DMA Channel to manipulate.
> +  * @dst: The destination pointer.
> +  * @return zero on success, or -ve error code.
> +  */
> + int (*receive)(struct dma *dma, void **dst);
> + /**
> +  * send() - Send a DMA transfer.
> +  *
> +  * @dma: The DMA Channel to manipulate.
> +  * @src: The source pointer.
> +  * @len: Length of the data to be sent (number of bytes).
> +  * @return zero on success, or -ve error code.
> +  */
> + int (*send)(struct dma *dma, void *src, size_t len);

Can we have additional *optional* parameter in above two callbacks and in 
dma_receive/dma_send() API?
Like:
 int (*send)(struct dma *dma, void *src, size_t len, void *metadata)
 int (*receive)(struct dma *dma, void **dst, void **metadata);

Reason:
It's not a common practice to implement Networking DMA using generic DMA 
frameworks, simply 
because Networking DMA HW is terribly different between different SoCs :(, so 
it's mostly impossible
to fit all of them in any generic DMA framework (at least this has never ever 
worked for Linux kernel):
- totally different HW rings/queues impl, multi-queues & multi DMA channels
- special requirements for IRQ handling
- necessity to pass additional information within each Net DMA descriptor
- availability and support of different Net traffic HW acceleration features

But in case of u-boot, it, theoretically, might work because most of Net
drivers have much more simplified implementation comparing to Linux kernel
- UP, polling, one RX/TX channel and disabled Net traffic HW acceleration 
features.

As result, Proposed here interface can be used with much more different HW and
drivers (and especially Net drivers), but only if it will be possible to pass
additional DMA driver's specific information from DMA user to DMA driver
per each send/rsv request.
For example, two TI driver cpsw.c and keystone_net.c required to pass
minimum one additional parameter with each sending packet - Destination Port 
number,
which must be passed to DMA in DMA descriptor. And Source Port number
has to be passed back with each received packet.

! I'm not insisting here ! and be happy to hear third opinion.

(if proposition will not be accepted - .. :( I'll just need to do the same 
later,
 but there might be hight number of active users of this interface in u-boot 
already)

> +#endif /* CONFIG_DMA_CHANNELS */
>   /**
>* transfer() - Issue a DMA transfer. The implementation must
>*   wait until the transfer is done.
> diff --git a/include/dma.h b/include/dma.h
> index 89320f10d9..bf8123fa9e 100644
> --- a/include/dma.h
> +++ b/include/dma.h
> @@ -1,6 +1,7 @@
>   /*
> - * (C) Copyright 2015
> - * Texas Instruments Incorporated, 
> + * Copyright (C) 2018 Álvaro Fernández Rojas 
> + * Copyright (C) 2015 Texas Instruments Incorporated 
> + * Written by Mugunthan V N 
>*
>* SPDX-License-Identifier: GPL-2.0+
>*/
> @@ -8,6 +9,9 @@
>   #ifndef _DMA_H_
>   #define _DMA_H_
>   
> +#include 
> +#include 
> +
>   /*
>* enum dma_direction - dma transfer direction indicator
>* @DMA_MEM_TO_MEM: Memcpy mode
> @@ -37,6 +41,172 @@ struct dma_dev_priv {
>   u32 supported;
>   };
>   
> +#ifdef CONFIG_DMA_CHANNELS
> +/**
> + * A DMA is a feature of computer systems that allows certain hardware
> + * subsystems to access main system memory, independent of the CPU.
> + * DMA channels are typically generated externally to the HW module
> + * consuming them, by an entity this API calls a DMA provider. This API
> + * provides a standard means for drivers to enable and disable DMAs, and to
> + * copy, send and receive data using DMA.
> + *
> + * A driver that implements UCLASS_DMA is a DMA 

Re: [U-Boot] [PATCH v10 4/4] common: Generic firmware loader for file system

[Wolfgang Denk]

Dear Tien Fong,

In message <1520485397.10181.12.ca...@intel.com> you wrote:
>
> > This looks fine as a concept but I am not keen on the implementation.
> > 
> This patchset has been going through many rounds and a lot of time
> spending in review, and it is already working and being tested. I still

That's life

> have a lot subsequent patches pending on this patchset. I would suggest
> to accept this patchset, then we can enhance it to driver model in
> later.

No.  The usual approach is to _first_ clean up the code, _before_ it
gets added.  there have been just too many cases that interest in
cleaning up disappeared quickly once the unclean version was pulled
into mainline.

> > 1. It should use driver model (only) in U-Boot proper. If there is
> > some SPL problem then add a specific function or feature for SPL.
> We can doing this in later since it is require sometime to figure out
> and testing.

We can also do it now, and that is better.

> > 2. It should not be necessary ti manually init subsystems - driver
> > model does this for you
> This is for initializing storage driver in very early SPL, where
> loading from storage to configure some critical HW need to done first.

The key problem is that your approach does not scale.  We had the
same discussion elsewhere.

> > 3. You can use the uclass name to find things
> Yeah, once it is converted to driver model, we can use the uclass for
> searching HW info in DTS.

Then please convert it.

Thanks.

Best regards,

Wolfgang Denk

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I read part of it all the way through.
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Re: [U-Boot] [PATCH] arm: Disable the strict alignment of data on armv7

[Wolfgang Denk]

Dear Michal,

In message 
<029f7f8f6d89cc77c92e04223a7402376e050f56.1520433579.git.michal.si...@xilinx.com>
 you wrote:
> From: Nitin Jain 
> 
> This patch is used for disable the strict alignment of data
> to avoid the memory alignment issues.

Can you please add some comments what the consequences of this
change are?  I guess there are advantages, but I also guess these
come at a price?

Best regards,

Wolfgang Denk

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Quote from the Boss after overriding the decision of a task force  he
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outcome of this project!"
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Re: [U-Boot] [PATCH] imximage: Check the IVT offset in the correct location

[Fabio Estevam]

Hi Troy,

On Thu, Mar 8, 2018 at 7:03 PM, Troy Kisky
 wrote:

> Did you test that an image without BOOT_FROM still gets an error message ?

Good point! It is not properly detecting such case.

Will need to rework the patch, thanks.
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Re: [U-Boot] [PATCH 2/2] usb: kbd: implement special keys

[Heinrich Schuchardt]

On 03/08/2018 09:30 PM, Simon Glass wrote:
> Hi Heinrich,
>
> input.c uses PS/2 scan codes at present. However these are somewhat
> internal. You should see docs in input.h
>
> I am not sure of the best approach, but one would be to convert USB
> scan codes to PS/2 codes.
>
> Regards,
> Simon
>

Hello Simon, hello Marek,

thanks for the clarification.

Between input.c and usb_kbd.c we have the following differences:

- Most keycodes are different.
- The way ALT, CTRL, SHIFT, META are transferred differ.
- Input.c has implemented support for different keyboard layouts
  (EN, DE) which is not easily expandable to other layouts.

So if we wanted to have a common layer this would require a complete 
rewrite of both input.c and usb_kbd.c.


I do not have access to any device using input.c. So I am unable to test 
any of it.


So I would prefer if we could just patch usb_kbd.c to provide the 
missing special keys and keep the code separate.


Having usb_kbd.c in directory common/ looks like a misplacement.
It could be put under drivers/input/ or under drivers/usb/hid/.
I think in future we should have also mouse and touchscreen as hid 
drivers. Otherwise using an EFI menu on a tablet will not be possible.

So I would prefer moving usb_kbd to drivers/usb/hid/.

Best regards

Heinrich
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Re: [U-Boot] [PATCH] imximage: Check the IVT offset in the correct location

[Troy Kisky]

On 3/8/2018 12:53 PM, Breno Matheus Lima wrote:
> Hi Fabio,
> 
> 2018-03-08 17:40 GMT-03:00 Fabio Estevam :
>> From: Fabio Estevam 
>>
>> Sometimes imximage throws the following error:
>>
>>   CFGSboard/freescale/vf610twr/imximage.cfg.cfgtmp
>>   CFGSboard/freescale/vf610twr/imximage.cfg.cfgtmp
>>   MKIMAGE u-boot-dtb.imx
>> Error: No BOOT_FROM tag in board/freescale/vf610twr/imximage.cfg.cfgtmp
>> arch/arm/mach-imx/Makefile:100: recipe for target 'u-boot-dtb.imx' failed
>>
>> This problem happens because imximage_ivt_offset is being checked
>> at un unsafe point, and in some cases it can be checked prior to
>> its assignment.
>>
>> Fix this issue by only checking imximage_ivt_offset after its
>> assignment has really occurred.
>>
>> Introduce a check_ivt_offset() function to help on this task.
>>
>> Reported-by: Breno Lima 
>> Reported-by: Thomas Petazzoni 
>> Signed-off-by: Fabio Estevam 
> 
> Tested-by: Breno Lima 
> 
> Thanks,
> Breno Lima
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> 


Did you test that an image without BOOT_FROM still gets an error message ?


BR
Troy


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[U-Boot] [PATCH 1/1] wandboard: remove superfluous include

[Heinrich Schuchardt]

No definition provided by input.h is used in the board file.

Signed-off-by: Heinrich Schuchardt 
---
 board/wandboard/wandboard.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c
index 1e7c11e670..b7c6c6cb18 100644
--- a/board/wandboard/wandboard.c
+++ b/board/wandboard/wandboard.c
@@ -28,7 +28,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
-- 
2.11.0

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[U-Boot] [PATCH 1/1] yaffs2: iterator variable cannot be NULL

[Heinrich Schuchardt]

The iterator of list_for_each() is never NULL.

Identified with coccinelle.

Signed-off-by: Heinrich Schuchardt 
---
 fs/yaffs2/yaffs_guts.c | 4 ++--
 fs/yaffs2/yaffsfs.c| 9 +++--
 2 files changed, 5 insertions(+), 8 deletions(-)

diff --git a/fs/yaffs2/yaffs_guts.c b/fs/yaffs2/yaffs_guts.c
index bbe0d700fb..c8b27adda9 100644
--- a/fs/yaffs2/yaffs_guts.c
+++ b/fs/yaffs2/yaffs_guts.c
@@ -1872,8 +1872,8 @@ static int yaffs_new_obj_id(struct yaffs_dev *dev)
n += YAFFS_NOBJECT_BUCKETS;
list_for_each(i, >obj_bucket[bucket].list) {
/* If there is already one in the list */
-   if (i && list_entry(i, struct yaffs_obj,
-   hash_link)->obj_id == n) {
+   if (list_entry(i, struct yaffs_obj,
+  hash_link)->obj_id == n) {
found = 0;
break;
}
diff --git a/fs/yaffs2/yaffsfs.c b/fs/yaffs2/yaffsfs.c
index ba76a5ccdb..47abc6beda 100644
--- a/fs/yaffs2/yaffsfs.c
+++ b/fs/yaffs2/yaffsfs.c
@@ -2847,12 +2847,9 @@ static void yaffsfs_RemoveObjectCallback(struct 
yaffs_obj *obj)
 * the next one to prevent a hanging ptr.
 */
list_for_each(i, _contexts) {
-   if (i) {
-   dsc = list_entry(i, struct yaffsfs_DirSearchContxt,
-others);
-   if (dsc->nextReturn == obj)
-   yaffsfs_DirAdvance(dsc);
-   }
+   dsc = list_entry(i, struct yaffsfs_DirSearchContxt, others);
+   if (dsc->nextReturn == obj)
+   yaffsfs_DirAdvance(dsc);
}
 
 }
-- 
2.14.2

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Re: [U-Boot] [PATCH] arm: socfpga: gen5: Enabling cache and TLB maintenance broadcast

[Dinh Nguyen]

On 03/08/2018 08:01 AM, See, Chin Liang wrote:
> On Thu, 2018-03-01 at 17:17 +0100, Marek Vasut wrote:
>> On 02/28/2018 06:12 AM, chin.liang@intel.com wrote:
>>>
>>> From: Chin Liang See 
>>>
>>> Enabling cache and TLB maintenance broadcast through ACTLR as
>>> required
>>> by Linux.
>> This needs far more clarification. What is the problem you're fixing
>> here ? How does it fix the problem ?
> 
> Sure. When the 2 processors is enabled with SMP, popen operation would
> fail as content are different after the copy. This issue goes away when
> we force Linux to run with 1 core only. Checked with ARM, this bit is
> required by Linux when running SMP.
> 

What's a "popen" operation? Shouldn't you also set the SMP along with
the FW bit?

Dinh
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Re: [U-Boot] [PATCH] imximage: Check the IVT offset in the correct location

[Stefano Babic]

On 08/03/2018 21:53, Breno Matheus Lima wrote:
> Hi Fabio,
> 
> 2018-03-08 17:40 GMT-03:00 Fabio Estevam :
>> From: Fabio Estevam 
>>
>> Sometimes imximage throws the following error:
>>
>>   CFGSboard/freescale/vf610twr/imximage.cfg.cfgtmp
>>   CFGSboard/freescale/vf610twr/imximage.cfg.cfgtmp
>>   MKIMAGE u-boot-dtb.imx
>> Error: No BOOT_FROM tag in board/freescale/vf610twr/imximage.cfg.cfgtmp
>> arch/arm/mach-imx/Makefile:100: recipe for target 'u-boot-dtb.imx' failed
>>
>> This problem happens because imximage_ivt_offset is being checked
>> at un unsafe point, and in some cases it can be checked prior to
>> its assignment.
>>
>> Fix this issue by only checking imximage_ivt_offset after its
>> assignment has really occurred.
>>
>> Introduce a check_ivt_offset() function to help on this task.
>>
>> Reported-by: Breno Lima 
>> Reported-by: Thomas Petazzoni 
>> Signed-off-by: Fabio Estevam 
> 
> Tested-by: Breno Lima 


Thanks both - I apply it.

Best regards,
Stefano

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Re: [U-Boot] [PATCH v10 4/4] common: Generic firmware loader for file system

[Simon Glass]

Hi,

On 7 March 2018 at 22:03, Chee, Tien Fong  wrote:
> On Tue, 2018-03-06 at 10:51 -0700, Simon Glass wrote:
>> Hi,
>>
>> On 5 March 2018 at 02:43,   wrote:
>> >
>> > From: Tien Fong Chee 
>> >
>> > This is file system generic loader which can be used to load
>> > the file image from the storage into target such as memory.
>> > The consumer driver would then use this loader to program whatever,
>> > ie. the FPGA device.
>> >
>> > Signed-off-by: Tien Fong Chee 
>> > Reviewed-by: Lothar Waßmann 
>> > ---
>> >  common/Kconfig |  10 ++
>> >  common/Makefile|   1 +
>> >  common/fs_loader.c | 353
>> > +
>> >  doc/README.firmware_loader |  86 +++
>> >  include/fs_loader.h|  28 
>> >  5 files changed, 478 insertions(+)
>> >  create mode 100644 common/fs_loader.c
>> >  create mode 100644 doc/README.firmware_loader
>> >  create mode 100644 include/fs_loader.h
>> This looks fine as a concept but I am not keen on the implementation.
>>
> This patchset has been going through many rounds and a lot of time
> spending in review, and it is already working and being tested. I still
> have a lot subsequent patches pending on this patchset. I would suggest
> to accept this patchset, then we can enhance it to driver model in
> later.
>
>> 1. It should use driver model (only) in U-Boot proper. If there is
>> some SPL problem then add a specific function or feature for SPL.
> We can doing this in later since it is require sometime to figure out
> and testing.
>
>> 2. It should not be necessary ti manually init subsystems - driver
>> model does this for you
> This is for initializing storage driver in very early SPL, where
> loading from storage to configure some critical HW need to done first.
>
>> 3. You can use the uclass name to find things
> Yeah, once it is converted to driver model, we can use the uclass for
> searching HW info in DTS.
>>
>> Please let me know if you need more info.

Well I'm still not keen on this. Are you planning to do the
conversion? It seems like a lot of work for someone else to do.

Regards,
Simon
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Re: [U-Boot] [PATCH] dm: core: make fixed-clock dt scan live dt compatible

[Simon Glass]

Hi Andy.

On 28 February 2018 at 23:08, Andy Yan  wrote:
> dm_scan_fdt_node can't work when live dt is active,
> we should use dm_scan_fdt_live instead.
>
> Signed-off-by: Andy Yan 
> ---
>
>  drivers/core/root.c | 16 +++-
>  1 file changed, 11 insertions(+), 5 deletions(-)
>

Reviewed-by: Simon Glass 

with change below

> diff --git a/drivers/core/root.c b/drivers/core/root.c
> index 36336b6..b437892 100644
> --- a/drivers/core/root.c
> +++ b/drivers/core/root.c
> @@ -333,7 +333,8 @@ static int dm_scan_fdt_node(struct udevice *parent, const 
> void *blob,
>
>  int dm_extended_scan_fdt(const void *blob, bool pre_reloc_only)
>  {
> -   int node, ret;
> +   int ret;
> +   ofnode node;
>
> ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only);
> if (ret) {
> @@ -342,13 +343,18 @@ int dm_extended_scan_fdt(const void *blob, bool 
> pre_reloc_only)
> }
>
> /* bind fixed-clock */
> -   node = ofnode_to_offset(ofnode_path("/clocks"));
> +   node = ofnode_path("/clocks");
> /* if no DT "clocks" node, no need to go further */
> -   if (node < 0)
> +   if (!ofnode_valid(node))
> return ret;
>
> -   ret = dm_scan_fdt_node(gd->dm_root, gd->fdt_blob, node,
> -  pre_reloc_only);
> +#if CONFIG_IS_ENABLED(OF_LIVE)

You should be able to drop this #if since of_live_active() takes care of it.

> +   if (of_live_active())
> +   ret = dm_scan_fdt_live(gd->dm_root, node.np, pre_reloc_only);
> +   else
> +#endif
> +   ret = dm_scan_fdt_node(gd->dm_root, gd->fdt_blob, 
> node.of_offset,
> +  pre_reloc_only);
> if (ret)
> debug("dm_scan_fdt_node() failed: %d\n", ret);
>
> --
> 2.7.4
>
>

Regards,
Simon
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[U-Boot] [PATCH v4 1/1] efi: Correct header order in efi_memory

[Heinrich Schuchardt]

From: Simon Glass 

The headers are not in the correct order. Fix this. Also drop libfdt_env.h
since it is not needed.

Signed-off-by: Simon Glass 
Rebased
Reviewed-by: Heinrich Schuchardt 
---
v4
rebased (linux/libfdt_env.h instead of libfdt_env.h)
v3
no change
v2
update commit message to dropping libfdt_env.h
---
 lib/efi_loader/efi_memory.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index d980e730ffa..95f9ff0a140 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -8,12 +8,11 @@
 
 #include 
 #include 
+#include 
 #include 
+#include 
 #include 
-#include 
 #include 
-#include 
-#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
-- 
2.15.1

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Re: [U-Boot] [PATCH] imximage: Check the IVT offset in the correct location

[Breno Matheus Lima]

Hi Fabio,

2018-03-08 17:40 GMT-03:00 Fabio Estevam :
> From: Fabio Estevam 
>
> Sometimes imximage throws the following error:
>
>   CFGSboard/freescale/vf610twr/imximage.cfg.cfgtmp
>   CFGSboard/freescale/vf610twr/imximage.cfg.cfgtmp
>   MKIMAGE u-boot-dtb.imx
> Error: No BOOT_FROM tag in board/freescale/vf610twr/imximage.cfg.cfgtmp
> arch/arm/mach-imx/Makefile:100: recipe for target 'u-boot-dtb.imx' failed
>
> This problem happens because imximage_ivt_offset is being checked
> at un unsafe point, and in some cases it can be checked prior to
> its assignment.
>
> Fix this issue by only checking imximage_ivt_offset after its
> assignment has really occurred.
>
> Introduce a check_ivt_offset() function to help on this task.
>
> Reported-by: Breno Lima 
> Reported-by: Thomas Petazzoni 
> Signed-off-by: Fabio Estevam 

Tested-by: Breno Lima 

Thanks,
Breno Lima
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[U-Boot] [PATCH] imximage: Check the IVT offset in the correct location

[Fabio Estevam]

From: Fabio Estevam 

Sometimes imximage throws the following error:

  CFGSboard/freescale/vf610twr/imximage.cfg.cfgtmp
  CFGSboard/freescale/vf610twr/imximage.cfg.cfgtmp
  MKIMAGE u-boot-dtb.imx
Error: No BOOT_FROM tag in board/freescale/vf610twr/imximage.cfg.cfgtmp
arch/arm/mach-imx/Makefile:100: recipe for target 'u-boot-dtb.imx' failed

This problem happens because imximage_ivt_offset is being checked
at un unsafe point, and in some cases it can be checked prior to
its assignment.

Fix this issue by only checking imximage_ivt_offset after its
assignment has really occurred.

Introduce a check_ivt_offset() function to help on this task.

Reported-by: Breno Lima 
Reported-by: Thomas Petazzoni 
Signed-off-by: Fabio Estevam 
---
 tools/imximage.c | 16 +++-
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/tools/imximage.c b/tools/imximage.c
index eb7e682..26339ee 100644
--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -592,6 +592,15 @@ static void copy_plugin_code(struct imx_header *imxhdr, 
char *plugin_file)
imxhdr->header.hdr_v2.boot_data.plugin = 1;
 }
 
+static void check_ivt_offset(uint32_t offset)
+{
+   /* Exit if there is no field specifying the flash_offset */
+   if (offset == FLASH_OFFSET_UNDEFINED) {
+   fprintf(stderr, "Error: No boot offset specified");
+   exit(EXIT_FAILURE);
+   }
+}
+
 static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token,
char *name, int lineno, int fld, int dcd_len)
 {
@@ -613,6 +622,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, 
int32_t cmd, char *token,
case CMD_BOOT_FROM:
imximage_ivt_offset = get_table_entry_id(imximage_boot_offset,
"imximage boot option", token);
+   check_ivt_offset(imximage_ivt_offset);
if (imximage_ivt_offset == -1) {
fprintf(stderr, "Error: %s[%d] -Invalid boot device"
"(%s)\n", name, lineno, token);
@@ -641,6 +651,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, 
int32_t cmd, char *token,
break;
case CMD_BOOT_OFFSET:
imximage_ivt_offset = get_cfg_value(token, name, lineno);
+   check_ivt_offset(imximage_ivt_offset);
if (unlikely(cmd_ver_first != 1))
cmd_ver_first = 0;
break;
@@ -777,11 +788,6 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, 
char *name)
(*set_dcd_rst)(imxhdr, dcd_len, name, lineno);
fclose(fd);
 
-   /* Exit if there is no BOOT_FROM field specifying the flash_offset */
-   if (imximage_ivt_offset == FLASH_OFFSET_UNDEFINED) {
-   fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name);
-   exit(EXIT_FAILURE);
-   }
return dcd_len;
 }
 
-- 
2.7.4

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Re: [U-Boot] [RFC] ns16550: Add support for AUX regs usage on some ARC SoCs

[Simon Glass]

Hi Alexey.

On 2 March 2018 at 14:51, Alexey Brodkin  wrote:
>
> Hi Simon,
>
> On Thu, 2018-02-22 at 10:29 -0700, Simon Glass wrote:
> > Hi Alexey,
> >
> > On 22 February 2018 at 09:23, Alexey Brodkin
> >  wrote:
> > > Hi Simon,
> > >
> > > On Thu, 2018-02-22 at 09:17 -0700, Simon Glass wrote:
>
> [snip]
>
> > > > I think a separate driver might be better, unless we want to make the
> > > > read/write interface go through regmap or similar?
> > >
> > > But in case of ARC's AUX regs portmap won't help because those AUX regs 
> > > are
> > > couldn't be mapped - that a completely different address space and we may
> > > only access them via dedicated instructions (LR vs LD and SR vs ST).
> >
> > Well...
> >
> > 1. With a separate driver, you can do whatever you want :-) I know it
> > introduces code duplication though...
>
> Exactly I hate to introduce another driver which will be 99,9% the same
> as an existing one and then we'll need to care of it as well.
>
> > 2. With regmap you can add your own regmap driver, and again do
> > whatever you want. I can help with that if it sounds attractive
>
> Ok so I took a look at regmap in Linux kernel and indeed that
> will solve our problem: we'll have a regmap-mmio.c and regmap-arcaux.c
> with appropriate implementation of accessors but I'm not really sure
> it worth the trouble. Or your idea was to move all the different #ifdefs from
> serial_{in|out}_shift() to the corresponding regmap implementations such that
> we have something like below:
>  regmap-mem32-le.c
>  regmap-mem32-be.c
>  regmap-portmapped.c
>  etc
> ?

Yes, that's it.

I'm not sure why that driver is so special. Presumably other drivers
would have the same problem?

Regards,
Simon
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Re: [U-Boot] [PATCH v5 07/15] phy: add support for internal phys

[Joe Hershberger]

On Thu, Mar 8, 2018 at 1:38 PM, Álvaro Fernández Rojas
 wrote:
> Hi Joe,
>
> El 07/03/2018 a las 21:28, Joe Hershberger escribió:
>>
>> On Mon, Mar 5, 2018 at 2:05 PM, Álvaro Fernández Rojas
>>  wrote:
>>>
>>> Signed-off-by: Álvaro Fernández Rojas 
>>> ---
>>>   v5: no changes
>>>   v4: no changes
>>>   v3: no changes
>>>   v2: no changes
>>>
>>>   include/phy.h | 2 ++
>>>   1 file changed, 2 insertions(+)
>>>
>>> diff --git a/include/phy.h b/include/phy.h
>>> index 0543ec10c2..8f3e53db01 100644
>>> --- a/include/phy.h
>>> +++ b/include/phy.h
>>> @@ -50,6 +50,7 @@
>>>
>>>
>>>   typedef enum {
>>> +   PHY_INTERFACE_MODE_INTERNAL,
>>
>> In Linux this is handled as a flag instead of a different mode. It
>> seems we should do it the same way.
>
> Not really, in Linux this is handled as both:
> - As a flag (https://elixir.bootlin.com/linux/latest/ident/PHY_IS_INTERNAL):
> https://github.com/torvalds/linux/blob/master/include/linux/phy.h#L61
> https://github.com/torvalds/linux/blob/master/drivers/net/phy/phy_device.c#L1792
> https://github.com/torvalds/linux/blob/master/include/linux/phy.h#L832
> - As a mode
> (https://elixir.bootlin.com/linux/latest/ident/PHY_INTERFACE_MODE_INTERNAL):
> https://github.com/torvalds/linux/blob/master/include/linux/phy.h#L68
> https://github.com/torvalds/linux/blob/master/include/linux/phy.h#L119
>

OK, I was looking at an older kernel where there was only the flag.

Acked-by: Joe Hershberger 

>>
>>>  PHY_INTERFACE_MODE_MII,
>>>  PHY_INTERFACE_MODE_GMII,
>>>  PHY_INTERFACE_MODE_SGMII,
>>> @@ -72,6 +73,7 @@ typedef enum {
>>>   } phy_interface_t;
>>>
>>>   static const char *phy_interface_strings[] = {
>>> +   [PHY_INTERFACE_MODE_INTERNAL]   = "internal",
>>>  [PHY_INTERFACE_MODE_MII]= "mii",
>>>  [PHY_INTERFACE_MODE_GMII]   = "gmii",
>>>  [PHY_INTERFACE_MODE_SGMII]  = "sgmii",
>>> --
>>> 2.11.0
>>>
>>> ___
>>> U-Boot mailing list
>>> U-Boot@lists.denx.de
>>> https://lists.denx.de/listinfo/u-boot
>
> ~Álvaro.
>
> ___
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[U-Boot] [DISCUSSION] Trying to use u-boot 2016.05 with xen 4.4 for jacinto j6 evm board

[moin anjnawala]

Hi,

I am not able to enable Xen in u-boot 2016.05 for Jacinto 6 board.

I am using dra7xx_evm_defconfig and enabled CONFIG_XEN_VIRT_EN.
Basically, this config selects CONFIG_CPU_V7_HAS_NONSEC and
CPU_V7_HAS_VIRTUAL and CONFIG_ARMv7_PSCI.

When I try to build u-boot.I get following build errors:

arch/arm/cpu/armv7/built-in.o: In function `_secure_monitor':
/media/moinuddin.a/b910a820-12f5-4d64-86eb-9642360c66da/dra7xx/6AO.1.0/u-boot-xen/arch/arm/cpu/armv7/nonsec_virt.S:53:
undefined reference to `psci_arch_init'
arch/arm/cpu/armv7/built-in.o: In function `psci_cpu_entry':
/media/moinuddin.a/b910a820-12f5-4d64-86eb-9642360c66da/dra7xx/6AO.1.0/u-boot-xen/arch/arm/cpu/armv7/psci.S:202:
undefined reference to `psci_text_end'
arm-linux-gnueabi-ld.bfd: BFD (GNU Binutils for Ubuntu) 2.24 assertion
fail ../../bfd/elf32-arm.c:7696
arm-linux-gnueabi-ld.bfd: error: required section '.rel.plt' not found
in the linker script
arm-linux-gnueabi-ld.bfd: final link failed: Invalid operation
make: *** [u-boot] Error 1

Can you please share your understanding about these issues and how to fix them?

Regards,
Moinuddin
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Re: [U-Boot] [PATCH 0/2] Add atomic write to fw_setenv for environments on filesystems

[Heinrich Schuchardt]

On 03/08/2018 12:52 PM, Alex Kiernan wrote:

For environments stored on filesystems where you can't have a redundant
configuration, rather than just over-writing the existing environment
in fw_setenv, do the tradtional create temporary file, rename, sync,
sync directory dance to achieve ACID semantics when writing through
fw_setenv.

Note that this series triggers large numbers of checkpatch warnings because
of the existing code style:

   warning: space prohibited between function name and open parenthesis '('
   check: Avoid CamelCase: 


So, please, change the patches to match the U-Boot coding style.

Regards

Heinrich




Alex Kiernan (2):
   tools: env: Refactor write path of flash_io()
   tools: env: Implement atomic replace for filesystem

  tools/env/fw_env.c | 159 -
  1 file changed, 121 insertions(+), 38 deletions(-)



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[U-Boot] [PATCH v2 1/1] scripts/coccinelle: add some more coccinelle tests

[Heinrich Schuchardt]

kmerr: verify that malloc and calloc are followed by a check to verify
that we are not out of memory.

badzero: Compare pointer-typed values to NULL rather than 0

Both checks are copied from the Linux kernel archive.

Signed-off-by: Heinrich Schuchardt 
---
v2
Add SPDX license identifier
---
 scripts/coccinelle/null/badzero.cocci | 241 ++
 scripts/coccinelle/null/kmerr.cocci   |  75 +++
 2 files changed, 316 insertions(+)
 create mode 100644 scripts/coccinelle/null/badzero.cocci
 create mode 100644 scripts/coccinelle/null/kmerr.cocci

diff --git a/scripts/coccinelle/null/badzero.cocci 
b/scripts/coccinelle/null/badzero.cocci
new file mode 100644
index 000..619b058f93f
--- /dev/null
+++ b/scripts/coccinelle/null/badzero.cocci
@@ -0,0 +1,241 @@
+/// Compare pointer-typed values to NULL rather than 0
+///
+//# This makes an effort to choose between !x and x == NULL.  !x is used
+//# if it has previously been used with the function used to initialize x.
+//# This relies on type information.  More type information can be obtained
+//# using the option -all_includes and the option -I to specify an
+//# include path.
+//
+// Confidence: High
+// Copyright: (C) 2012 Julia Lawall, INRIA/LIP6.  GPLv2.
+// Copyright: (C) 2012 Gilles Muller, INRIA/LiP6.  GPLv2.
+// URL: http://coccinelle.lip6.fr/
+// Requires: 1.0.0
+// Options:
+//
+// SPDX-License-Identifier:GPL-2.0
+//
+
+virtual patch
+virtual context
+virtual org
+virtual report
+
+@initialize:ocaml@
+@@
+let negtable = Hashtbl.create 101
+
+@depends on patch@
+expression *E;
+identifier f;
+@@
+
+(
+  (E = f(...)) ==
+- 0
++ NULL
+|
+  (E = f(...)) !=
+- 0
++ NULL
+|
+- 0
++ NULL
+  == (E = f(...))
+|
+- 0
++ NULL
+  != (E = f(...))
+)
+
+
+@t1 depends on !patch@
+expression *E;
+identifier f;
+position p;
+@@
+
+(
+  (E = f(...)) ==
+* 0@p
+|
+  (E = f(...)) !=
+* 0@p
+|
+* 0@p
+  == (E = f(...))
+|
+* 0@p
+  != (E = f(...))
+)
+
+@script:python depends on org@
+p << t1.p;
+@@
+
+coccilib.org.print_todo(p[0], "WARNING comparing pointer to 0")
+
+@script:python depends on report@
+p << t1.p;
+@@
+
+coccilib.report.print_report(p[0], "WARNING comparing pointer to 0")
+
+// Tests of returned values
+
+@s@
+identifier f;
+expression E,E1;
+@@
+
+ E = f(...)
+ ... when != E = E1
+ !E
+
+@script:ocaml depends on s@
+f << s.f;
+@@
+
+try let _ = Hashtbl.find negtable f in ()
+with Not_found -> Hashtbl.add negtable f ()
+
+@ r disable is_zero,isnt_zero exists @
+expression *E;
+identifier f;
+@@
+
+E = f(...)
+...
+(E == 0
+|E != 0
+|0 == E
+|0 != E
+)
+
+@script:ocaml@
+f << r.f;
+@@
+
+try let _ = Hashtbl.find negtable f in ()
+with Not_found -> include_match false
+
+// This rule may lead to inconsistent path problems, if E is defined in two
+// places
+@ depends on patch disable is_zero,isnt_zero @
+expression *E;
+expression E1;
+identifier r.f;
+@@
+
+E = f(...)
+<...
+(
+- E == 0
++ !E
+|
+- E != 0
++ E
+|
+- 0 == E
++ !E
+|
+- 0 != E
++ E
+)
+...>
+?E = E1
+
+@t2 depends on !patch disable is_zero,isnt_zero @
+expression *E;
+expression E1;
+identifier r.f;
+position p1;
+position p2;
+@@
+
+E = f(...)
+<...
+(
+* E == 0@p1
+|
+* E != 0@p2
+|
+* 0@p1 == E
+|
+* 0@p1 != E
+)
+...>
+?E = E1
+
+@script:python depends on org@
+p << t2.p1;
+@@
+
+coccilib.org.print_todo(p[0], "WARNING comparing pointer to 0, suggest !E")
+
+@script:python depends on org@
+p << t2.p2;
+@@
+
+coccilib.org.print_todo(p[0], "WARNING comparing pointer to 0")
+
+@script:python depends on report@
+p << t2.p1;
+@@
+
+coccilib.report.print_report(p[0], "WARNING comparing pointer to 0, suggest 
!E")
+
+@script:python depends on report@
+p << t2.p2;
+@@
+
+coccilib.report.print_report(p[0], "WARNING comparing pointer to 0")
+
+@ depends on patch disable is_zero,isnt_zero @
+expression *E;
+@@
+
+(
+  E ==
+- 0
++ NULL
+|
+  E !=
+- 0
++ NULL
+|
+- 0
++ NULL
+  == E
+|
+- 0
++ NULL
+  != E
+)
+
+@ t3 depends on !patch disable is_zero,isnt_zero @
+expression *E;
+position p;
+@@
+
+(
+* E == 0@p
+|
+* E != 0@p
+|
+* 0@p == E
+|
+* 0@p != E
+)
+
+@script:python depends on org@
+p << t3.p;
+@@
+
+coccilib.org.print_todo(p[0], "WARNING comparing pointer to 0")
+
+@script:python depends on report@
+p << t3.p;
+@@
+
+coccilib.report.print_report(p[0], "WARNING comparing pointer to 0")
diff --git a/scripts/coccinelle/null/kmerr.cocci 
b/scripts/coccinelle/null/kmerr.cocci
new file mode 100644
index 000..a1e75e617d0
--- /dev/null
+++ b/scripts/coccinelle/null/kmerr.cocci
@@ -0,0 +1,75 @@
+/// This semantic patch looks for malloc etc that are not followed by a
+/// NULL check.  It only gives a report in the case where there is some
+/// error handling code later in the function, which may be helpful
+/// in determining what the error handling code for the call to malloc etc
+/// should be.
+///
+// Confidence: High
+// Copyright: (C) 2010 Nicolas Palix, DIKU.  GPLv2.
+// Copyright: (C) 2010 Julia Lawall, DIKU.  

Re: [U-Boot] [PATCH v5 08/15] net: add support for bcm6348-enet

[Álvaro Fernández Rojas]

Hi Joe,

El 07/03/2018 a las 22:46, Joe Hershberger escribió:

On Mon, Mar 5, 2018 at 2:05 PM, Álvaro Fernández Rojas
 wrote:

Signed-off-by: Álvaro Fernández Rojas 
---
  v5: Receive as much packets as possible from bcm6348-eth and cache them in
  net_rx_packets. This is needed in order to fix flow control issues.
  v4: Fix issues reported by Grygorii Strashko and other fixes:
   - Copy received dma buffer to net_rx_packets in order to avoid possible
   dma overwrites.
   - Reset dma rx channel when sending a new packet to prevent flow control
   issues.
   - Fix packet casting on bcm6348_eth_recv/send.
  v3: no changes
  v2: select DMA_CHANNELS.

  drivers/net/Kconfig|  10 +
  drivers/net/Makefile   |   1 +
  drivers/net/bcm6348-eth.c  | 575 +
  include/configs/bmips_common.h |   5 +-
  4 files changed, 590 insertions(+), 1 deletion(-)
  create mode 100644 drivers/net/bcm6348-eth.c

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index de1947ccc1..e532332d78 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -71,6 +71,16 @@ config BCM_SF2_ETH_GMAC
   by the BCM_SF2_ETH driver.
   Say Y to any bcmcygnus based platforms.

+config BCM6348_ETH
+   bool "BCM6348 EMAC support"
+   depends on DM_ETH && ARCH_BMIPS
+   select DMA
+   select DMA_CHANNELS
+   select MII
+   select PHYLIB
+   help
+ This driver supports the BCM6348 Ethernet MAC.
+
  config DWC_ETH_QOS
 bool "Synopsys DWC Ethernet QOS device support"
 depends on DM_ETH
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index ac5443c752..282adbc775 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -8,6 +8,7 @@
  obj-$(CONFIG_ALTERA_TSE) += altera_tse.o
  obj-$(CONFIG_AG7XXX) += ag7xxx.o
  obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o
+obj-$(CONFIG_BCM6348_ETH) += bcm6348-eth.o
  obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
  obj-$(CONFIG_DRIVER_AX88180) += ax88180.o
  obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o
diff --git a/drivers/net/bcm6348-eth.c b/drivers/net/bcm6348-eth.c
new file mode 100644
index 00..43518f7b2d
--- /dev/null
+++ b/drivers/net/bcm6348-eth.c
@@ -0,0 +1,575 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas 
+ *
+ * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c:
+ * Copyright (C) 2008 Maxime Bizon 
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define ETH_RX_DESCPKTBUFSRX
+#define ETH_MAX_MTU_SIZE   1518
+#define ETH_TIMEOUT100
+#define ETH_TX_WATERMARK   32
+
+/* ETH Receiver Configuration register */
+#define ETH_RXCFG_REG  0x00
+#define ETH_RXCFG_ENFLOW_SHIFT 5
+#define ETH_RXCFG_ENFLOW_MASK  (1 << ETH_RXCFG_ENFLOW_SHIFT)
+
+/* ETH Receive Maximum Length register */
+#define ETH_RXMAXLEN_REG   0x04
+#define ETH_RXMAXLEN_SHIFT 0
+#define ETH_RXMAXLEN_MASK  (0x7ff << ETH_RXMAXLEN_SHIFT)
+
+/* ETH Transmit Maximum Length register */
+#define ETH_TXMAXLEN_REG   0x08
+#define ETH_TXMAXLEN_SHIFT 0
+#define ETH_TXMAXLEN_MASK  (0x7ff << ETH_TXMAXLEN_SHIFT)
+
+/* MII Status/Control register */
+#define MII_SC_REG 0x10
+#define MII_SC_MDCFREQDIV_SHIFT0
+#define MII_SC_MDCFREQDIV_MASK (0x7f << MII_SC_MDCFREQDIV_SHIFT)
+#define MII_SC_PREAMBLE_EN_SHIFT   7
+#define MII_SC_PREAMBLE_EN_MASK(1 << MII_SC_PREAMBLE_EN_SHIFT)
+
+/* MII Data register */
+#define MII_DAT_REG0x14
+#define MII_DAT_DATA_SHIFT 0
+#define MII_DAT_DATA_MASK  (0x << MII_DAT_DATA_SHIFT)
+#define MII_DAT_TA_SHIFT   16
+#define MII_DAT_TA_MASK(0x3 << MII_DAT_TA_SHIFT)
+#define MII_DAT_REG_SHIFT  18
+#define MII_DAT_REG_MASK   (0x1f << MII_DAT_REG_SHIFT)
+#define MII_DAT_PHY_SHIFT  23
+#define MII_DAT_PHY_MASK   (0x1f << MII_DAT_PHY_SHIFT)
+#define MII_DAT_OP_SHIFT   28
+#define MII_DAT_OP_WRITE   (0x5 << MII_DAT_OP_SHIFT)
+#define MII_DAT_OP_READ(0x6 << MII_DAT_OP_SHIFT)
+
+/* ETH Interrupts Mask register */
+#define ETH_IRMASK_REG 0x18
+
+/* ETH Interrupts register */
+#define ETH_IR_REG 0x1c
+#define ETH_IR_MII_SHIFT   0
+#define ETH_IR_MII_MASK(1 << ETH_IR_MII_SHIFT)
+
+/* ETH Control register */
+#define ETH_CTL_REG0x2c
+#define ETH_CTL_ENABLE_SHIFT   0
+#define ETH_CTL_ENABLE_MASK(1 << ETH_CTL_ENABLE_SHIFT)
+#define ETH_CTL_DISABLE_SHIFT  1
+#define 

Re: [U-Boot] [PATCH v5 02/15] dma: add channels support

[Álvaro Fernández Rojas]

Hi Joe,

El 07/03/2018 a las 22:27, Joe Hershberger escribió:

On Mon, Mar 5, 2018 at 2:05 PM, Álvaro Fernández Rojas
 wrote:

This adds channels support for dma controllers that have multiple channels
which can transfer data to/from different devices (enet, usb...).

Signed-off-by: Álvaro Fernández Rojas 
Reviewed-by: Simon Glass 
---
  v5: remove unneeded dma.h include
  v4: no changes
  v3: Introduce changes reported by Simon Glass:
   - Improve dma-uclass.h documentation.
   - Switch to live tree API.

  drivers/dma/Kconfig  |   7 ++
  drivers/dma/dma-uclass.c | 188 +--
  include/dma-uclass.h |  78 
  include/dma.h| 174 ++-
  4 files changed, 439 insertions(+), 8 deletions(-)

diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 1b92c7789d..21b2c0dcaa 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -12,6 +12,13 @@ config DMA
   buses that is used to transfer data to and from memory.
   The uclass interface is defined in include/dma.h.

+config DMA_CHANNELS
+   bool "Enable DMA channels support"
+   depends on DMA
+   help
+ Enable channels support for DMA. Some DMA controllers have multiple
+ channels which can either transfer data to/from different devices.
+
  config TI_EDMA3
 bool "TI EDMA3 driver"
 help
diff --git a/drivers/dma/dma-uclass.c b/drivers/dma/dma-uclass.c
index faa27a3a56..b5109aafc9 100644
--- a/drivers/dma/dma-uclass.c
+++ b/drivers/dma/dma-uclass.c
@@ -1,23 +1,199 @@
  /*
   * Direct Memory Access U-Class driver
   *
- * (C) Copyright 2015
- * Texas Instruments Incorporated, 
- *
- * Author: Mugunthan V N 
+ * Copyright (C) 2018 Álvaro Fernández Rojas 
+ * Copyright (C) 2015 Texas Instruments Incorporated 
+ * Written by Mugunthan V N 
   *
   * SPDX-License-Identifier: GPL-2.0+
   */

  #include 
  #include 
-#include 
-#include 
+#include 
  #include 
+#include 
  #include 

  DECLARE_GLOBAL_DATA_PTR;

+#ifdef CONFIG_DMA_CHANNELS
+static inline struct dma_ops *dma_dev_ops(struct udevice *dev)
+{
+   return (struct dma_ops *)dev->driver->ops;
+}
+
+# if CONFIG_IS_ENABLED(OF_CONTROL)
+#  if CONFIG_IS_ENABLED(OF_PLATDATA)
+int dma_get_by_index_platdata(struct udevice *dev, int index,
+ struct phandle_1_arg *cells, struct dma *dma)
+{
+   int ret;
+
+   if (index != 0)
+   return -ENOSYS;
+   ret = uclass_get_device(UCLASS_DMA, 0, >dev);
+   if (ret)
+   return ret;
+   dma->id = cells[0].id;
+
+   return 0;
+}
+#  else
+static int dma_of_xlate_default(struct dma *dma,
+   struct ofnode_phandle_args *args)
+{
+   debug("%s(dma=%p)\n", __func__, dma);
+
+   if (args->args_count > 1) {
+   pr_err("Invaild args_count: %d\n", args->args_count);
+   return -EINVAL;
+   }
+
+   if (args->args_count)
+   dma->id = args->args[0];
+   else
+   dma->id = 0;
+
+   return 0;
+}
+
+int dma_get_by_index(struct udevice *dev, int index, struct dma *dma)
+{
+   int ret;
+   struct ofnode_phandle_args args;
+   struct udevice *dev_dma;
+   const struct dma_ops *ops;
+
+   debug("%s(dev=%p, index=%d, dma=%p)\n", __func__, dev, index, dma);
+
+   assert(dma);
+   dma->dev = NULL;
+
+   ret = dev_read_phandle_with_args(dev, "dmas", "#dma-cells", 0, index,
+);
+   if (ret) {
+   pr_err("%s: dev_read_phandle_with_args failed: err=%d\n",
+  __func__, ret);
+   return ret;
+   }
+
+   ret = uclass_get_device_by_ofnode(UCLASS_DMA, args.node, _dma);
+   if (ret) {
+   pr_err("%s: uclass_get_device_by_ofnode failed: err=%d\n",
+  __func__, ret);
+   return ret;
+   }
+
+   dma->dev = dev_dma;
+
+   ops = dma_dev_ops(dev_dma);
+
+   if (ops->of_xlate)
+   ret = ops->of_xlate(dma, );
+   else
+   ret = dma_of_xlate_default(dma, );
+   if (ret) {
+   pr_err("of_xlate() failed: %d\n", ret);
+   return ret;
+   }
+
+   return dma_request(dev_dma, dma);
+}
+#  endif /* OF_PLATDATA */
+
+int dma_get_by_name(struct udevice *dev, const char *name, struct dma *dma)
+{
+   int index;
+
+   debug("%s(dev=%p, name=%s, dma=%p)\n", __func__, dev, name, dma);
+   dma->dev = NULL;
+
+   index = dev_read_stringlist_search(dev, "dma-names", name);
+   if (index < 0) {
+   pr_err("dev_read_stringlist_search() failed: %d\n", index);
+   return index;
+   }
+
+   return dma_get_by_index(dev, index, dma);
+}
+# endif /* 

Re: [U-Boot] [PATCH v5 07/15] phy: add support for internal phys

[Álvaro Fernández Rojas]

Hi Joe,

El 07/03/2018 a las 21:28, Joe Hershberger escribió:

On Mon, Mar 5, 2018 at 2:05 PM, Álvaro Fernández Rojas
 wrote:

Signed-off-by: Álvaro Fernández Rojas 
---
  v5: no changes
  v4: no changes
  v3: no changes
  v2: no changes

  include/phy.h | 2 ++
  1 file changed, 2 insertions(+)

diff --git a/include/phy.h b/include/phy.h
index 0543ec10c2..8f3e53db01 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -50,6 +50,7 @@


  typedef enum {
+   PHY_INTERFACE_MODE_INTERNAL,

In Linux this is handled as a flag instead of a different mode. It
seems we should do it the same way.

Not really, in Linux this is handled as both:
- As a flag (https://elixir.bootlin.com/linux/latest/ident/PHY_IS_INTERNAL):
https://github.com/torvalds/linux/blob/master/include/linux/phy.h#L61
https://github.com/torvalds/linux/blob/master/drivers/net/phy/phy_device.c#L1792
https://github.com/torvalds/linux/blob/master/include/linux/phy.h#L832
- As a mode 
(https://elixir.bootlin.com/linux/latest/ident/PHY_INTERFACE_MODE_INTERNAL):

https://github.com/torvalds/linux/blob/master/include/linux/phy.h#L68
https://github.com/torvalds/linux/blob/master/include/linux/phy.h#L119




 PHY_INTERFACE_MODE_MII,
 PHY_INTERFACE_MODE_GMII,
 PHY_INTERFACE_MODE_SGMII,
@@ -72,6 +73,7 @@ typedef enum {
  } phy_interface_t;

  static const char *phy_interface_strings[] = {
+   [PHY_INTERFACE_MODE_INTERNAL]   = "internal",
 [PHY_INTERFACE_MODE_MII]= "mii",
 [PHY_INTERFACE_MODE_GMII]   = "gmii",
 [PHY_INTERFACE_MODE_SGMII]  = "sgmii",
--
2.11.0

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Re: [U-Boot] No BOOT_FROM tag build error

[Fabio Estevam]

Hi Stefano,

On Thu, Mar 8, 2018 at 2:40 PM, Stefano Babic  wrote:

> Confirmed - even with patch, running in a loop:
>
> make mrproper;make vf610twr_defconfig; make -j8
>
> I can trigger the error. In most cases it works. It looks to me that
> mkimake is called before board/freescale/vf610twr/imximage.cfg.cfgtmp
> has finished.

I managed to fix this problem.

We are running some more build tests and then I will send a patch later today.
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Re: [U-Boot] [PATCH v8 2/3] Adding TCP

[Joe Hershberger]

Hi Duncan,

The subject should be "net: Add TCP". Subjects should be completing
the sentence, "This patch is intended to _." It should also be
prefixed by the a tag for what area of the project it is touching.

On Wed, Mar 7, 2018 at 10:43 PM,   wrote:
> From: Duncan Hare 
>
> All the code is new, and not copied from any source.
>
>>
> 
>
> Signed-off-by: Duncan Hare 
> ---
>
> Routine tcp_print_buffer() is used to print portions of
> non zero terminated buffers. If there is an existing routine
> please let me know. I'm from the world of length fields
> not zero terminated strings (zOS).
>
> Added
> include/net.h
> net/tcp.c
>
> added CONFIG_TCP Kconfig parameter in networking to
> Kconfig
> Makefile
> include/net.h
> net/net.c
>
> In net.c added procedure
> int net_send_tcp_packet
>
> Modified procedures
> net_init - set tcp initial state
> net_send_ip_packet -  debug messages
> net_send_ip_packet - for tcp packet header creation
> net_process_received_packet - rxhand_tcp_f
>
>
> Changes in v8:
> Adding TCP
>
>  include/net.h |   8 +-
>  include/net/tcp.h | 218 
>  net/Kconfig   |  35 +--
>  net/Makefile  |   2 +-
>  net/net.c |  51 +++-
>  net/tcp.c | 749 
> ++
>  6 files changed, 1024 insertions(+), 39 deletions(-)
>  create mode 100644 include/net/tcp.h
>  create mode 100644 net/tcp.c
>
> diff --git a/include/net.h b/include/net.h
> index 7e5f5a6a5b..e29d804a23 100644
> --- a/include/net.h
> +++ b/include/net.h
> @@ -548,7 +548,7 @@ extern int  net_restart_wrap;   /* Tried all 
> network devices */
>
>  enum proto_t {
> BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP,
> -   TFTPSRV, TFTPPUT, LINKLOCAL
> +   TFTPSRV, TFTPPUT, LINKLOCAL, WGET
>  };
>
>  extern charnet_boot_file_name[1024];/* Boot File name */
> @@ -681,11 +681,15 @@ static inline void net_send_packet(uchar *pkt, int len)
>   * @param payload_len Length of data after the UDP header
>   */
>  int net_send_ip_packet(uchar *ether, struct in_addr dest, int dport, int 
> sport,
> -  int payload_len, int proto);
> +  int payload_len, int proto, u8 action, u32 tcp_seq_num,
> +  u32 tcp_ack_num);
>
>  int net_send_udp_packet(uchar *ether, struct in_addr dest, int dport,
> int sport, int payload_len);
>
> +int net_send_tcp_packet(int payload_len, int dport, int sport, u8 action,
> +   u32 tcp_seq_num, u32 tcp_ack_num);
> +
>  /* Processes a received packet */
>  void net_process_received_packet(uchar *in_packet, int len);
>
> diff --git a/include/net/tcp.h b/include/net/tcp.h
> new file mode 100644
> index 00..81f263351e
> --- /dev/null
> +++ b/include/net/tcp.h
> @@ -0,0 +1,218 @@
> +/*
> + * TCP Support for file transfer.
> + *
> + * Copyright 2017 Duncan Hare, All rights reserved.
> + *
> + *  SPDX-License-Identifier:GPL-2.0
> + */
> +
> +#define TCP_ACTIVITY 127   /* Activity on downloading  */
> +
> +struct ip_tcp_hdr {
> +   u8  ip_hl_v;/* header length and version*/
> +   u8  ip_tos; /* type of service  */
> +   u16 ip_len; /* total length */
> +   u16 ip_id;  /* identification   */
> +   u16 ip_off; /* fragment offset field*/
> +   u8  ip_ttl; /* time to live */
> +   u8  ip_p;   /* protocol */
> +   u16 ip_sum; /* checksum */
> +   struct in_addr  ip_src; /* Source IP address*/
> +   struct in_addr  ip_dst; /* Destination IP address   */
> +   u16 tcp_src;/* TCP source port  */
> +   u16 tcp_dst;/* TCP destination port */
> +   u32 tcp_seq;/* TCP sequence number  */
> +   u32 tcp_ack;/* TCP Acknowledgment number*/
> +   u8  tcp_hlen;   /* 4 bits TCP header Length/4   */
> +   /* 4 bits Reserved  */
> +   /* 2 more bits reserved */
> +   u8  tcp_flags;  /* see defines  */
> +   u16 tcp_win;/* TCP windows size */
> +   u16 tcp_xsum;   /* Checksum */
> +   u16 tcp_ugr;/* Pointer to urgent data   */
> +} __packed;
> +
> +#define IP_TCP_HDR_SIZE(sizeof(struct ip_tcp_hdr))
> +#define TCP_HDR_SIZE   (IP_TCP_HDR_SIZE  

Re: [U-Boot] [PATCH v8 1/3] Adding TCP and wget into u-boot

[Joe Hershberger]

Hi Duncan,

Still some issues, but getting closer to parsable.

The subject of this should be something like, "net: Adjust UDP
implementation to prepare for TCP support"

On Wed, Mar 7, 2018 at 10:43 PM,   wrote:
> From: Duncan Hare 
>
>>
> 

I think these are coming from your commit log. You should remove them.

>
> cover-letter:

You need to use the exact tags in the documentation. That means that
you need to capitalize the 'C'.

> Why netboot:

The first line here is the subject for the series, so you should have
the line that you used to have as the patches' titles in v7.

> Central management, including logs and change control,
> coupled with with enhanced security and unauthorized
> change detection and remediation by exposing a
> small attack surface.
>
> Why TCP:
>
> Currently file transfer are done using tftp or NFS both
> over udp. This requires a request to be sent from client
> (u-boot) to the boot server.
>
> For a 4 Mbyte kernel, with a 1k block size this requires
> 4,000 request for a block.
>
> Using a large block size, one greater than the Ethernet
> maximum frame size limitation, would require fragmentation,
> which u-boot supports. However missing fragment recovery
> requires timeout detection and re-transmission requests
> for missing fragments.
>
> UDP is ideally suited to fast single packet exchanges,
> inquiry/response, for example dns, becuse of the lack of
> connection overhead.
>
> UDP as a file transport mechanism is slow, even in low
> latency networks, because file transfer with udp requires
> poll/response mechanism to provide transfer integrity.
>
> In networks with large latency, for example: the internet,
> UDP is even slower. What is a 30 second transfer on a local
> boot server and LAN increase to over 3 minutes, because of
> all the requests/response traffic.
>
> This was anticipated in the evolution of the IP protocols
> and TCP was developed and then enhanced for high latency high
> bandwidth networks.
>
> The current standard is TCP with selective acknowledgment.
>
> In our testing we have reduce kernel transmission time to
> around 0.4 seconds for a 4Mbyte kernel, with a 100 Mbps
> downlink.
>
> Why http and wget:
>
> HTTP is the most efficient file retrieval protocol in common
> use. The client send a single request, after TCP connection,
> to receive a file of any length.
>
> WGET is the application which implements http file transfer
> outside browsers as a file transfer protocol. Versions of
> wget exists on many operating systems.
> END
>

This stuff is great for a cover letter. I would recommend that you
also include the relevant TCP section and wget section in those
patches.

> Signed-off-by: Duncan Hare 
> ---
>
> Changed in this patch:
> include/net.h
> net/net.c

This isn't really needed since the patch already lists the files
changed... see below about 12 lines.

>
> Added a protocol parameter to ip packet sending in net.c
> Added UDP protocol for current applications to minimize
> code changes to existing net apps.

This stuff should not be in a patman tag. The default (untagged) is
what ends up in the commit message. In other words, don't put this
stuff in the "Commit-notes:" tag. In patman, "notes" means that you
are providing notes to the reviewer that you do not want to end up in
git.

>
> All the code is new, and not copied from any source.
>
>
> Changes in v8:
> Initial changes for adding TCP
>
>  include/net.h | 25 +++--
>  net/net.c | 52 ++--
>  net/ping.c|  9 ++---
>  3 files changed, 55 insertions(+), 31 deletions(-)
>
> diff --git a/include/net.h b/include/net.h
> index 455b48f6c7..7e5f5a6a5b 100644
> --- a/include/net.h
> +++ b/include/net.h
> @@ -15,17 +15,26 @@
>  #include 
>  #include  /* for nton* / ntoh* stuff */
>
> -#define DEBUG_LL_STATE 0   /* Link local state machine changes */
> -#define DEBUG_DEV_PKT 0/* Packets or info directed to the 
> device */
> -#define DEBUG_NET_PKT 0/* Packets on info on the network at 
> large */
> +#define DEBUG_LL_STATE  0  /* Link local state machine changes */
> +#define DEBUG_DEV_PKT   0  /* Packets or info directed to the device */
> +#define DEBUG_NET_PKT   0  /* Packets on info on the network at large */
>  #define DEBUG_INT_STATE 0  /* Internal network state changes */
>
>  /*
>   * The number of receive packet buffers, and the required packet buffer
>   * alignment in memory.
>   *
> + * The number of buffers for TCP is used to calculate a static TCP window
> + * size, becuse TCP window size is a promise to the sending TCP to be 
> able
> + * to buffer up to the window size of data.
> + * When the sending TCP has a window size of outstanding unacknowledged
> + * data, the sending TCP will stop sending.
>   */
>
> +#if defined(CONFIG_TCP)
> +#define 

Re: [U-Boot] No BOOT_FROM tag build error

[Stefano Babic]

On 08/03/2018 18:20, Fabio Estevam wrote:
> Hi Stefano,
> 
> On Thu, Mar 8, 2018 at 2:00 PM, Stefano Babic  wrote:
> 
>> Anyway, I) have just done what the error is saying:
>>
>> diff --git a/board/freescale/vf610twr/imximage.cfg
>> b/board/freescale/vf610twr/imximage.cfg
>> index 70157ed..9ff4890 100644
>> --- a/board/freescale/vf610twr/imximage.cfg
>> +++ b/board/freescale/vf610twr/imximage.cfg
>> @@ -13,5 +13,7 @@
>>  /* image version */
>>  IMAGE_VERSION  2
>>
>> +BOOT_FROM  sd
>> +
>>  /* Boot Offset 0x400, valid for both SD and NAND boot */
>>  BOOT_OFFSETFLASH_OFFSET_STANDARD
> 
> Yes, I tried this change before here and it works for me, but still
> fails for Breno.
> 
> The curious thing is that sometime it builds fine, sometimes not in
> his machine even with this change applied.
> 
> It looks like a parallel build problem because I never see a failure
> when only 'make' is used instead of 'make -j4'.

Confirmed - even with patch, running in a loop:

make mrproper;make vf610twr_defconfig; make -j8

I can trigger the error. In most cases it works. It looks to me that
mkimake is called before board/freescale/vf610twr/imximage.cfg.cfgtmp
has finished.

Stefano

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Re: [U-Boot] [PATCH] tools/mkimage: Use proper output parameter in dtc-system call

[Tom Rini]

On Thu, Mar 08, 2018 at 09:00:13AM +0100, Stefan Theil wrote:

> The system call used by mkimage to run dtc redirects stdout to a
> temporary file. This can cause problems on Windows (with a MinGW
> cross-compiled version). Using the "-o" dtc parameter avoids
> this problem.
> 
> Signed-off-by: Stefan Theil 

Reviewed-by: Tom Rini 

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Re: [U-Boot] No BOOT_FROM tag build error

[Fabio Estevam]

Hi Stefano,

On Thu, Mar 8, 2018 at 2:00 PM, Stefano Babic  wrote:

> Anyway, I) have just done what the error is saying:
>
> diff --git a/board/freescale/vf610twr/imximage.cfg
> b/board/freescale/vf610twr/imximage.cfg
> index 70157ed..9ff4890 100644
> --- a/board/freescale/vf610twr/imximage.cfg
> +++ b/board/freescale/vf610twr/imximage.cfg
> @@ -13,5 +13,7 @@
>  /* image version */
>  IMAGE_VERSION  2
>
> +BOOT_FROM  sd
> +
>  /* Boot Offset 0x400, valid for both SD and NAND boot */
>  BOOT_OFFSETFLASH_OFFSET_STANDARD

Yes, I tried this change before here and it works for me, but still
fails for Breno.

The curious thing is that sometime it builds fine, sometimes not in
his machine even with this change applied.

It looks like a parallel build problem because I never see a failure
when only 'make' is used instead of 'make -j4'.

Thanks
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Re: [U-Boot] [PATCH 00/18] Introduce SPI TPM v2.0 support

[Tom Rini]

On Thu, Mar 08, 2018 at 04:40:03PM +0100, Miquel Raynal wrote:

> Current U-Boot supports TPM v1.2 specification. The new specification
> (v2.0) is not backward compatible and renames/introduces several
> functions.
> 
> This series introduces a new SPI driver following the TPM v2.0
> specification. It has been tested on a ST TPM but should be usable with
> others v2.0 compliant chips.
> 
> Then, basic functionalities are introduced one by one for the v2.0
> specification. The INIT command now can receive a parameter to
> distinguish further TPMv1/TPMv2 commands. After that, the library itself
> will know which one is pertinent and will return a special error if the
> desired command is not supported for the selected specification.

Thanks for doing all of this.  Can you please enable this feature on
sandbox and/or an x86 QEMU variant where I assume we could also then
setup automated testing?

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Re: [U-Boot] [PATCH 2/2] tools: env: Implement atomic replace for filesystem

[Stefano Babic]

Hi alex,

On 08/03/2018 12:52, Alex Kiernan wrote:
> If the U-Boot environment is stored in a regular file and redundant
> operation isn't set, then write to a temporary file and perform an
> atomic rename.
> 

Even if it is not explicitely set (IMHO it should), this code can
be used as library and linked to own application. That means that
concurrency can happens. I mean:

> Signed-off-by: Alex Kiernan 
> ---
> 
>  tools/env/fw_env.c | 81 
> --
>  1 file changed, 78 insertions(+), 3 deletions(-)
> 
> diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
> index 2df3504..b814c4e 100644
> --- a/tools/env/fw_env.c
> +++ b/tools/env/fw_env.c
> @@ -14,6 +14,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -1229,9 +1230,46 @@ static int flash_read (int fd)
>   return 0;
>  }
>  
> +static int flash_open_tempfile(const char **dname, const char **target_temp)
> +{
> + char *dup_name = strdup(DEVNAME (dev_current));
> + char *temp_name = NULL;
> + int rc = -1;
> +
> + if (!dup_name)
> + return -1;
> +
> + *dname = dirname(dup_name);
> + if (!*dname)
> + goto err;
> +
> + rc = asprintf(_name, "%s/uboot.tmp", *dname);

Filename is fixed - should we not use mkstemp ?

> + if (rc == -1)
> + goto err;
> +
> + rc = open(temp_name, O_RDWR | O_CREAT | O_TRUNC, 0700);
> + if (rc == -1) {
> + /* fall back to in place write */
> + free(temp_name);
> + } else {
> + *target_temp = temp_name;
> + /* deliberately leak dup_name as dname /might/ point into
> +  * it and we need it for our caller
> +  */
> + dup_name = NULL;
> + }
> +
> +err:
> + if (dup_name)
> + free(dup_name);
> +
> + return rc;
> +}
> +
>  static int flash_io_write (int fd_current)
>  {
> - int fd_target, rc, dev_target;
> + int fd_target = -1, rc, dev_target;
> + const char *dname, *target_temp = NULL;
>  
>   if (HaveRedundEnv) {
>   /* switch to next partition for writing */
> @@ -1247,8 +1285,17 @@ static int flash_io_write (int fd_current)
>   goto exit;
>   }
>   } else {
> + struct stat sb;
> +
> + if (fstat(fd_current, ) == 0 && S_ISREG(sb.st_mode)) {
> + /* if any part of flash_open_tempfile() fails we fall
> +  * back to in-place writes
> +  */
> + fd_target = flash_open_tempfile(, _temp);
> + }
>   dev_target = dev_current;
> - fd_target = fd_current;
> + if (fd_target == -1)
> + fd_target = fd_current;
>   }
>  
>   rc = flash_write (fd_current, fd_target, dev_target);
> @@ -1260,7 +1307,7 @@ static int flash_io_write (int fd_current)
>DEVNAME (dev_current), strerror (errno));
>   }
>  
> - if (HaveRedundEnv) {
> + if (fd_current != fd_target) {
>   if (fsync(fd_target) &&
>   !(errno == EINVAL || errno == EROFS)) {
>   fprintf (stderr,
> @@ -1275,6 +1322,34 @@ static int flash_io_write (int fd_current)
>strerror (errno));
>   rc = -1;
>   }
> +
> + if (target_temp) {
> + int dir_fd;
> +
> + dir_fd = open(dname, O_DIRECTORY | O_RDONLY);
> + if (dir_fd == -1)
> + fprintf (stderr,
> +  "Can't open %s: %s\n",
> +  dname, strerror (errno));
> +
> + if (rename(target_temp, DEVNAME(dev_target))) {
> + fprintf (stderr,
> +  "rename failed %s => %s: %s\n",
> +  target_temp, DEVNAME(dev_target),
> +  strerror (errno));
> + rc = -1;
> + }
> +
> + if (dir_fd != -1 && fsync(dir_fd))
> + fprintf (stderr,
> +  "fsync failed on %s: %s\n",
> +  dname, strerror (errno));
> +
> + if (dir_fd != -1 && close(dir_fd))
> + fprintf (stderr,
> +  "I/O error on %s: %s\n",
> +  dname, strerror (errno));
> + }
>   }
>  exit:
>   return rc;
> 

Best regards,
Stefano

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Re: [U-Boot] No BOOT_FROM tag build error

[Stefano Babic]

Hi Fabio,

On 08/03/2018 17:49, Fabio Estevam wrote:
> Hi,
> 
> My colleague Breno reported an issue with vf610twr_defconfig in U-Boot 
> mainline.
> 
> Sometimes it fails like this:
> 
>   CAT u-boot-dtb.bin
>   COPYu-boot.dtb
>   COPYu-boot.bin
>   CFGSboard/freescale/vf610twr/imximage.cfg.cfgtmp
>   CFGSboard/freescale/vf610twr/imximage.cfg.cfgtmp
>   MKIMAGE u-boot-dtb.imx
> Error: No BOOT_FROM tag in board/freescale/vf610twr/imximage.cfg.cfgtmp
> arch/arm/mach-imx/Makefile:100: recipe for target 'u-boot-dtb.imx' failed
> make[1]: *** [u-boot-dtb.imx] Error 1
> Makefile:911: recipe for target 'u-boot-dtb.imx' failed
> make: *** [u-boot-dtb.imx] Error 2
> make: *** Waiting for unfinished jobs
>   MKIMAGE u-boot.imx
> rm u-boot.imx
> 
> After this fails, if I run 'make -j4' then the build successfully
> completes in the second attempt.
> 
> I am able to reproduce it (not 100% though) with these steps:
> 
> make mrproper
> make vf610twr_defconfig
> make -j4
> 
> If I use just 'make' to build with a single core I never see the failure.
> 

I can confirm this - something happened after my last PR. I build vf610,
too, before sending my PR to Tom, and there was no issue. Now buildman
fails.

> Recently Thomas also reported the same problem in the Buildroot autobuilder :
> http://lists.busybox.net/pipermail/buildroot/2018-March/215036.html
> 
> Does anyone have any idea on how to properly fix this issue?
> 

Anyway, I) have just done what the error is saying:

diff --git a/board/freescale/vf610twr/imximage.cfg
b/board/freescale/vf610twr/imximage.cfg
index 70157ed..9ff4890 100644
--- a/board/freescale/vf610twr/imximage.cfg
+++ b/board/freescale/vf610twr/imximage.cfg
@@ -13,5 +13,7 @@
 /* image version */
 IMAGE_VERSION  2

+BOOT_FROM  sd
+
 /* Boot Offset 0x400, valid for both SD and NAND boot */
 BOOT_OFFSETFLASH_OFFSET_STANDARD

And build works again. And I confirmed because I implemented in
tools/imximage.c that there is a check: BOOT_FROM is mandatory to set
the offset. Now, why this is reported just now and it did not happen
before, and why this results just building with multiple thread, it is
still a mistery for me.

Best regards,
Stefano


-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
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[U-Boot] No BOOT_FROM tag build error

[Fabio Estevam]

Hi,

My colleague Breno reported an issue with vf610twr_defconfig in U-Boot mainline.

Sometimes it fails like this:

  CAT u-boot-dtb.bin
  COPYu-boot.dtb
  COPYu-boot.bin
  CFGSboard/freescale/vf610twr/imximage.cfg.cfgtmp
  CFGSboard/freescale/vf610twr/imximage.cfg.cfgtmp
  MKIMAGE u-boot-dtb.imx
Error: No BOOT_FROM tag in board/freescale/vf610twr/imximage.cfg.cfgtmp
arch/arm/mach-imx/Makefile:100: recipe for target 'u-boot-dtb.imx' failed
make[1]: *** [u-boot-dtb.imx] Error 1
Makefile:911: recipe for target 'u-boot-dtb.imx' failed
make: *** [u-boot-dtb.imx] Error 2
make: *** Waiting for unfinished jobs
  MKIMAGE u-boot.imx
rm u-boot.imx

After this fails, if I run 'make -j4' then the build successfully
completes in the second attempt.

I am able to reproduce it (not 100% though) with these steps:

make mrproper
make vf610twr_defconfig
make -j4

If I use just 'make' to build with a single core I never see the failure.

Recently Thomas also reported the same problem in the Buildroot autobuilder :
http://lists.busybox.net/pipermail/buildroot/2018-March/215036.html

Does anyone have any idea on how to properly fix this issue?

Thanks,

Fabio Estevam
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[U-Boot] [PATCH 13/18] tpm: add TPM2_PCR_Extend command support

[Miquel Raynal]

Add support for the TPM2_PCR_Extend command.

Change the command file and the help accordingly.

Signed-off-by: Miquel Raynal 
---
 cmd/tpm.c | 18 ++
 include/tpm.h | 18 ++
 lib/tpm.c | 41 +
 3 files changed, 77 insertions(+)

diff --git a/cmd/tpm.c b/cmd/tpm.c
index 93dcd1a65c..3f284f0adf 100644
--- a/cmd/tpm.c
+++ b/cmd/tpm.c
@@ -349,6 +349,18 @@ static int do_tpm_pcr_event(cmd_tbl_t *cmdtp, int flag,
return report_return_code(rc);
 }
 
+static int do_tpm_pcr_extend(cmd_tbl_t *cmdtp, int flag,
+int argc, char * const argv[])
+{
+   u32 index = simple_strtoul(argv[1], NULL, 0);
+   void *digest = (void *)simple_strtoul(argv[2], NULL, 0);
+
+   if (argc != 3)
+   return CMD_RET_USAGE;
+
+   return report_return_code(tpm2_pcr_extend(index, digest));
+}
+
 static int do_tpm_pcr_read(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
 {
@@ -890,6 +902,8 @@ static cmd_tbl_t tpm_commands[] = {
 do_tpm_nv_write_value, "", ""),
U_BOOT_CMD_MKENT(pcr_event, 0, 1,
 do_tpm_pcr_event, "", ""),
+   U_BOOT_CMD_MKENT(pcr_extend, 0, 1,
+do_tpm_pcr_extend, "", ""),
U_BOOT_CMD_MKENT(pcr_read, 0, 1,
 do_tpm_pcr_read, "", ""),
U_BOOT_CMD_MKENT(tsc_physical_presence, 0, 1,
@@ -1026,6 +1040,10 @@ U_BOOT_CMD(tpm, CONFIG_SYS_MAXARGS, 1, do_tpm,
 "  digest of 32 bytes for TPMv2. Value of the PCR is given at 
\n"
 "  pcr_read index addr count\n"
 "- Read  bytes from PCR  to memory address .\n"
+"  pcr_extend index \n"
+"- Add a new measurement to a PCR.  Update PCR  with\n"
+"  . It must be a 20 byte digest for TPMv1 or a SHA256\n"
+"  digest of 32 bytes for TPMv2.\n"
 #ifdef CONFIG_TPM_AUTH_SESSIONS
 "Authorization Sessions\n"
 "  oiap\n"
diff --git a/include/tpm.h b/include/tpm.h
index a863ac6196..b88ad4b2f4 100644
--- a/include/tpm.h
+++ b/include/tpm.h
@@ -76,6 +76,14 @@ enum tpm2_return_codes {
TPM2_RC_LOCKOUT = 0x0921,
 };
 
+enum tpm_algorithms {
+   TPM2_ALG_XOR= 0x0A,
+   TPM2_ALG_SHA256 = 0x0B,
+   TPM2_ALG_SHA384 = 0x0C,
+   TPM2_ALG_SHA512 = 0x0D,
+   TPM2_ALG_NULL   = 0x10,
+};
+
 enum tpm_physical_presence {
TPM_PHYSICAL_PRESENCE_HW_DISABLE= 0x0200,
TPM_PHYSICAL_PRESENCE_CMD_DISABLE   = 0x0100,
@@ -548,6 +556,16 @@ uint32_t tpm_nv_write_value(uint32_t index, const void 
*data, uint32_t length);
  */
 int tpm_pcr_event(u32 index, const void *in_digest, void *out_digest);
 
+/**
+ * Issue a TPM_PCR_Extend command.
+ *
+ * @param indexIndex of the PCR
+ * @param digest   Value representing the event to be recorded
+ *
+ * @return return code of the operation
+ */
+int tpm2_pcr_extend(u32 index, const uint8_t *digest);
+
 /**
  * Issue a TPM_PCRRead command.
  *
diff --git a/lib/tpm.c b/lib/tpm.c
index 07e2490af2..e74530d538 100644
--- a/lib/tpm.c
+++ b/lib/tpm.c
@@ -527,6 +527,47 @@ int tpm_pcr_event(u32 index, const void *in_digest, void 
*out_digest)
return 0;
 }
 
+int tpm2_pcr_extend(u32 index, const uint8_t *digest)
+{
+   u8 command_v2[COMMAND_BUFFER_SIZE] = {
+   STRINGIFY16(TPM2_ST_SESSIONS),  /* TAG */
+   STRINGIFY32(33 + TPM2_DIGEST_LENGTH), /* Command size */
+   STRINGIFY32(TPM2_CC_PCR_EXTEND), /* Command code */
+
+   /* HANDLE */
+   STRINGIFY32(index), /* Handle (PCR Index) */
+
+   /* AUTH_SESSION */
+   STRINGIFY32(9), /* Authorization size */
+   STRINGIFY32(TPM2_RS_PW),/* Session handle */
+   STRINGIFY16(0), /* Size of  */
+   /*  (if any) */
+   0,  /* Attributes: Cont/Excl/Rst */
+   STRINGIFY16(0), /* Size of  */
+   /*  (if any) */
+   STRINGIFY32(1), /* Count (number of hashes) */
+   STRINGIFY16(TPM2_ALG_SHA256),   /* Algorithm of the hash */
+   /* STRING(digest)  Digest */
+   };
+   unsigned int offset = 33;
+   int ret;
+
+   if (!is_tpmv2)
+   return TPM_LIB_ERROR;
+
+   /*
+* Fill the command structure starting from the first buffer:
+* - the digest
+*/
+   ret = pack_byte_string(command_v2, sizeof(command_v2), "s",
+  offset, digest, TPM2_DIGEST_LENGTH);
+   offset += TPM2_DIGEST_LENGTH;
+   if (ret)
+   return TPM_LIB_ERROR;
+
+   return tpm_sendrecv_command(command_v2, NULL, NULL);
+}
+
 uint32_t tpm_pcr_read(uint32_t index, 

[U-Boot] [PATCH 10/18] tpm: add TPM2_SelfTest command support

[Miquel Raynal]

Add support for the TPM2_Selftest command.

Change the command file and the help accordingly.

Signed-off-by: Miquel Raynal 
---
 include/tpm.h |  9 +++--
 lib/tpm.c | 36 
 2 files changed, 35 insertions(+), 10 deletions(-)

diff --git a/include/tpm.h b/include/tpm.h
index ba71bac885..38d7cb899d 100644
--- a/include/tpm.h
+++ b/include/tpm.h
@@ -31,6 +31,11 @@ enum tpm2_structures {
TPM2_ST_SESSIONS= 0x8002,
 };
 
+enum tpm2_yes_no {
+   TPMI_YES= 1,
+   TPMI_NO = 0,
+};
+
 enum tpm_startup_type {
TPM_ST_CLEAR= 0x0001,
TPM_ST_STATE= 0x0002,
@@ -476,14 +481,14 @@ int tpm_startup(enum tpm_startup_type mode);
  *
  * @return return code of the operation
  */
-uint32_t tpm_self_test_full(void);
+int tpm_self_test_full(void);
 
 /**
  * Issue a TPM_ContinueSelfTest command.
  *
  * @return return code of the operation
  */
-uint32_t tpm_continue_self_test(void);
+int tpm_continue_self_test(void);
 
 /**
  * Issue a TPM_NV_DefineSpace command.  The implementation is limited
diff --git a/lib/tpm.c b/lib/tpm.c
index cd97ac7eb5..7b379b99aa 100644
--- a/lib/tpm.c
+++ b/lib/tpm.c
@@ -341,20 +341,40 @@ int tpm_startup(enum tpm_startup_type mode)
return 0;
 }
 
-uint32_t tpm_self_test_full(void)
+int tpm_self_test_full(void)
 {
-   const uint8_t command[10] = {
-   0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x50,
+   const u8 command_v1[10] = {
+   STRINGIFY16(0xc1),
+   STRINGIFY32(10),
+   STRINGIFY32(0x50),
};
-   return tpm_sendrecv_command(command, NULL, NULL);
+   const u8 command_v2[12] = {
+   STRINGIFY16(TPM2_ST_NO_SESSIONS),
+   STRINGIFY32(11),
+   STRINGIFY32(TPM2_CC_SELF_TEST),
+   TPMI_YES,
+   };
+
+   return tpm_sendrecv_command(is_tpmv2 ? command_v2 : command_v1, NULL,
+   NULL);
 }
 
-uint32_t tpm_continue_self_test(void)
+int tpm_continue_self_test(void)
 {
-   const uint8_t command[10] = {
-   0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x53,
+   const u8 command_v1[10] = {
+   STRINGIFY16(0xc1),
+   STRINGIFY32(10),
+   STRINGIFY32(0x53),
};
-   return tpm_sendrecv_command(command, NULL, NULL);
+   const u8 command_v2[12] = {
+   STRINGIFY16(TPM2_ST_NO_SESSIONS),
+   STRINGIFY32(11),
+   STRINGIFY32(TPM2_CC_SELF_TEST),
+   TPMI_NO,
+   };
+
+   return tpm_sendrecv_command(is_tpmv2 ? command_v2 : command_v1, NULL,
+   NULL);
 }
 
 uint32_t tpm_nv_define_space(uint32_t index, uint32_t perm, uint32_t size)
-- 
2.14.1

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[U-Boot] [PATCH 17/18] tpm: add TPM2_HierarchyChangeAuth command support

[Miquel Raynal]

Add support for the TPM2_HierarchyChangeAuth command.

Change the command file and the help accordingly.

Signed-off-by: Miquel Raynal 
---
 cmd/tpm.c | 34 ++
 include/tpm.h | 14 ++
 lib/tpm.c | 47 +++
 3 files changed, 95 insertions(+)

diff --git a/cmd/tpm.c b/cmd/tpm.c
index 533da2d2ac..3c486c313b 100644
--- a/cmd/tpm.c
+++ b/cmd/tpm.c
@@ -555,6 +555,36 @@ static int do_tpm_force_clear(cmd_tbl_t *cmdtp, int flag,
return report_return_code(tpm_force_clear(handle, pw, pw_sz));
 }
 
+static int do_tpm_change_auth(cmd_tbl_t *cmdtp, int flag,
+ int argc, char *const argv[])
+{
+   u32 handle;
+   const char *newpw = argv[2];
+   const char *oldpw = (argc == 3) ? NULL : argv[3];
+   const ssize_t newpw_sz = strlen(newpw);
+   const ssize_t oldpw_sz = oldpw ? strlen(oldpw) : 0;
+
+   if (argc < 3 || argc > 4)
+   return CMD_RET_USAGE;
+
+   if (newpw_sz > TPM2_DIGEST_LENGTH || oldpw_sz > TPM2_DIGEST_LENGTH)
+   return -EINVAL;
+
+   if (!strcasecmp("TPM2_RH_LOCKOUT", argv[1]))
+   handle = TPM2_RH_LOCKOUT;
+   else if (!strcasecmp("TPM2_RH_ENDORSEMENT", argv[1]))
+   handle = TPM2_RH_ENDORSEMENT;
+   else if (!strcasecmp("TPM2_RH_OWNER", argv[1]))
+   handle = TPM2_RH_OWNER;
+   else if (!strcasecmp("TPM2_RH_PLATFORM", argv[1]))
+   handle = TPM2_RH_PLATFORM;
+   else
+   return CMD_RET_USAGE;
+
+   return report_return_code(tpm2_change_auth(handle, newpw, newpw_sz,
+  oldpw, oldpw_sz));
+}
+
 #define TPM_COMMAND_NO_ARG(cmd)\
 static int do_##cmd(cmd_tbl_t *cmdtp, int flag,\
int argc, char * const argv[])  \
@@ -959,6 +989,8 @@ static cmd_tbl_t tpm_commands[] = {
 do_tpm_dam_set_parameters, "", ""),
U_BOOT_CMD_MKENT(force_clear, 0, 1,
 do_tpm_force_clear, "", ""),
+   U_BOOT_CMD_MKENT(change_auth, 0, 1,
+do_tpm_change_auth, "", ""),
U_BOOT_CMD_MKENT(physical_enable, 0, 1,
 do_tpm_physical_enable, "", ""),
U_BOOT_CMD_MKENT(physical_disable, 0, 1,
@@ -1060,6 +1092,8 @@ U_BOOT_CMD(tpm, CONFIG_SYS_MAXARGS, 1, do_tpm,
 "  force_clear []\n"
 "- Issue TPM_[Force]Clear command, with  one of (TPMv2 only):\n"
 "  * TPM2_RH_LOCKOUT, TPM2_RH_PLATFORM.\n"
+"  change_auth  []\n"
+"- Change the hierarchy authorizations (TPMv2 only).\n"
 "  tsc_physical_presence flags\n"
 "- Set TPM device's Physical Presence flags to .\n"
 "The Capability Commands:\n"
diff --git a/include/tpm.h b/include/tpm.h
index 4d062584f9..cc63f06634 100644
--- a/include/tpm.h
+++ b/include/tpm.h
@@ -60,6 +60,7 @@ enum tpm2_command_codes {
TPM2_CC_SELF_TEST   = 0x0143,
TPM2_CC_CLEAR   = 0x0126,
TPM2_CC_CLEARCONTROL= 0x0127,
+   TPM2_CC_HIERCHANGEAUTH  = 0x0129,
TPM2_CC_DAM_RESET   = 0x0139,
TPM2_CC_DAM_PARAMETERS  = 0x013A,
TPM2_CC_GET_CAPABILITY  = 0x017A,
@@ -630,6 +631,19 @@ int tpm2_dam_set_parameters(const char *pw, const ssize_t 
pw_sz,
  */
 int tpm_force_clear(u32 handle, const char *pw, const ssize_t pw_sz);
 
+/**
+ * Issue a TPM2_HierarchyChangeAuthorization command.
+ *
+ * @param handle   Handle
+ * @param newpwNew password
+ * @param newpw_sz Length of the new password
+ * @param oldpwOld password
+ * @param oldpw_sz Length of the old password
+ * @return return code of the operation
+ */
+int tpm2_change_auth(u32 handle, const char *newpw, const ssize_t newpw_sz,
+const char *oldpw, const ssize_t oldpw_sz);
+
 /**
  * Issue a TPM_PhysicalEnable command.
  *
diff --git a/lib/tpm.c b/lib/tpm.c
index 1e064e6ff1..f09b9ce9eb 100644
--- a/lib/tpm.c
+++ b/lib/tpm.c
@@ -835,6 +835,53 @@ int tpm_force_clear(u32 handle, const char *pw, const 
ssize_t pw_sz)
return tpm_sendrecv_command(command_v2, NULL, NULL);
 }
 
+int tpm2_change_auth(u32 handle, const char *newpw, const ssize_t newpw_sz,
+const char *oldpw, const ssize_t oldpw_sz)
+{
+   unsigned int offset = 27;
+   u8 command_v2[COMMAND_BUFFER_SIZE] = {
+   STRINGIFY16(TPM2_ST_SESSIONS),  /* TAG */
+   STRINGIFY32(offset + oldpw_sz + 2 + newpw_sz), /* Command len */
+   STRINGIFY32(TPM2_CC_HIERCHANGEAUTH), /* Command code */
+
+   /* HANDLE */
+   STRINGIFY32(handle),/* TPM resource handle */
+
+   /* AUTH_SESSION */
+   STRINGIFY32(9 + oldpw_sz),  /* Authorization size */
+   STRINGIFY32(TPM2_RS_PW),/* Session handle */
+   STRINGIFY16(0),

[U-Boot] [PATCH 05/18] tpm: prepare support for TPMv2 commands

[Miquel Raynal]

Later choice between v1 and v2 compliant functions will be handled by a
global value in lib/tpm.c that will be accessible through set/get
accessors from lib/cmd.c.

This global value is set during the initialization phase if the TPM2
handle is given to the init command.

Signed-off-by: Miquel Raynal 
---
 cmd/tpm.c | 37 +-
 include/tpm.h | 20 ++
 lib/tpm.c | 83 +--
 3 files changed, 131 insertions(+), 9 deletions(-)

diff --git a/cmd/tpm.c b/cmd/tpm.c
index f456396d75..1d32028b64 100644
--- a/cmd/tpm.c
+++ b/cmd/tpm.c
@@ -89,12 +89,16 @@ static void *parse_byte_string(char *bytes, uint8_t *data, 
size_t *count_ptr)
  */
 static int report_return_code(int return_code)
 {
-   if (return_code) {
-   printf("Error: %d\n", return_code);
-   return CMD_RET_FAILURE;
-   } else {
+   if (!return_code)
return CMD_RET_SUCCESS;
-   }
+
+   if (return_code == -EOPNOTSUPP)
+   printf("TPMv%d error: unavailable command with this spec\n",
+  tpm_get_specification());
+   else
+   printf("TPM error: %d\n", return_code);
+
+   return CMD_RET_FAILURE;
 }
 
 /**
@@ -427,6 +431,24 @@ static int do_tpm_get_capability(cmd_tbl_t *cmdtp, int 
flag,
return report_return_code(rc);
 }
 
+static int do_tpm_init(cmd_tbl_t *cmdtp, int flag,
+  int argc, char * const argv[])
+{
+   if (argc > 2)
+   return CMD_RET_USAGE;
+
+   if (argc == 2) {
+   if (!strcasecmp("TPM1", argv[1]))
+   tpm_set_specification(1);
+   else if (!strcasecmp("TPM2", argv[1]))
+   tpm_set_specification(2);
+   else
+   return CMD_RET_USAGE;
+   }
+
+   return report_return_code(tpm_init());
+}
+
 #define TPM_COMMAND_NO_ARG(cmd)\
 static int do_##cmd(cmd_tbl_t *cmdtp, int flag,\
int argc, char * const argv[])  \
@@ -436,7 +458,6 @@ static int do_##cmd(cmd_tbl_t *cmdtp, int flag, 
\
return report_return_code(cmd());   \
 }
 
-TPM_COMMAND_NO_ARG(tpm_init)
 TPM_COMMAND_NO_ARG(tpm_self_test_full)
 TPM_COMMAND_NO_ARG(tpm_continue_self_test)
 TPM_COMMAND_NO_ARG(tpm_force_clear)
@@ -902,8 +923,10 @@ U_BOOT_CMD(tpm, CONFIG_SYS_MAXARGS, 1, do_tpm,
 "- Issue TPM command  with arguments .\n"
 "Admin Startup and State Commands:\n"
 "  info - Show information about the TPM\n"
-"  init\n"
+"  init []\n"
 "- Put TPM into a state where it waits for 'startup' command.\n"
+"   is one of TPM1 (default) or TPM2. This choice impacts the way\n"
+"  other functions will behave.\n"
 "  startup mode\n"
 "- Issue TPM_Starup command.   is one of TPM_ST_CLEAR,\n"
 "  TPM_ST_STATE, and TPM_ST_DEACTIVATED.\n"
diff --git a/include/tpm.h b/include/tpm.h
index 760d94865c..0ec3428ea4 100644
--- a/include/tpm.h
+++ b/include/tpm.h
@@ -30,6 +30,11 @@ enum tpm_startup_type {
TPM_ST_DEACTIVATED  = 0x0003,
 };
 
+enum tpm2_startup_types {
+   TPM2_SU_CLEAR   = 0x,
+   TPM2_SU_STATE   = 0x0001,
+};
+
 enum tpm_physical_presence {
TPM_PHYSICAL_PRESENCE_HW_DISABLE= 0x0200,
TPM_PHYSICAL_PRESENCE_CMD_DISABLE   = 0x0100,
@@ -417,6 +422,21 @@ int tpm_xfer(struct udevice *dev, const uint8_t *sendbuf, 
size_t send_size,
  */
 int tpm_init(void);
 
+/**
+ * Assign a value to the global is_nfcv2 boolean to discriminate in the lib
+ * between the available specifications.
+ *
+ * @version: 1 or 2, depending on the supported specification
+ */
+int tpm_set_specification(int version);
+
+/**
+ * Return the current value of the specification.
+ *
+ * @return: 1 or 2, depending on the supported specification
+ */
+int tpm_get_specification(void);
+
 /**
  * Issue a TPM_Startup command.
  *
diff --git a/lib/tpm.c b/lib/tpm.c
index 99556b1cf6..38b76b4961 100644
--- a/lib/tpm.c
+++ b/lib/tpm.c
@@ -15,6 +15,9 @@
 /* Internal error of TPM command library */
 #define TPM_LIB_ERROR  ((uint32_t)~0u)
 
+/* Global boolean to discriminate TPMv2.x from TPMv1.x functions */
+static bool is_tpmv2;
+
 /* Useful constants */
 enum {
COMMAND_BUFFER_SIZE = 256,
@@ -262,6 +265,26 @@ static uint32_t tpm_sendrecv_command(const void *command,
return tpm_return_code(response);
 }
 
+int tpm_set_specification(int version)
+{
+   if (version == 1) {
+   debug("TPM complies to the v1.x specification\n");
+   is_tpmv2 = false;
+   } else if (version == 2) {
+   debug("TPM complies to the v2.x specification\n");
+   is_tpmv2 = true;
+   } else {
+   return -EINVAL;
+   }
+
+   return 0;
+}
+
+int tpm_get_specification(void)
+{
+   return is_tpmv2 ? 2 : 1;
+}
+
 int 

[U-Boot] [PATCH 09/18] tpm: add TPM2_Startup command support

[Miquel Raynal]

Add support for the TPM2_Startup command.

Change the command file and the help accordingly.

Signed-off-by: Miquel Raynal 
---
 cmd/tpm.c |  9 +++--
 include/tpm.h | 26 +-
 lib/tpm.c | 35 +--
 3 files changed, 57 insertions(+), 13 deletions(-)

diff --git a/cmd/tpm.c b/cmd/tpm.c
index 3e2bb3b118..fc9ef9d4a3 100644
--- a/cmd/tpm.c
+++ b/cmd/tpm.c
@@ -255,6 +255,10 @@ static int do_tpm_startup(cmd_tbl_t *cmdtp, int flag,
mode = TPM_ST_STATE;
} else if (!strcasecmp("TPM_ST_DEACTIVATED", argv[1])) {
mode = TPM_ST_DEACTIVATED;
+   } else if (!strcasecmp("TPM2_SU_CLEAR", argv[1])) {
+   mode = TPM2_SU_CLEAR;
+   } else if (!strcasecmp("TPM2_SU_STATE", argv[1])) {
+   mode = TPM2_SU_STATE;
} else {
printf("Couldn't recognize mode string: %s\n", argv[1]);
return CMD_RET_FAILURE;
@@ -929,8 +933,9 @@ U_BOOT_CMD(tpm, CONFIG_SYS_MAXARGS, 1, do_tpm,
 "   is one of TPM1 (default) or TPM2. This choice impacts the way\n"
 "  other functions will behave.\n"
 "  startup mode\n"
-"- Issue TPM_Starup command.   is one of TPM_ST_CLEAR,\n"
-"  TPM_ST_STATE, and TPM_ST_DEACTIVATED.\n"
+"- Issue TPM_Startup command.  is one of:\n"
+"  * TPM_ST_CLEAR, TPM_ST_STATE, TPM_ST_DEACTIVATED for TPMv1.x.\n"
+"  * TPM2_SU_CLEAR, TPM2_SU_STATE, for TPMv2.x.\n"
 "Admin Testing Commands:\n"
 "  self_test_full\n"
 "- Test all of the TPM capabilities.\n"
diff --git a/include/tpm.h b/include/tpm.h
index 1a60ef5b36..ba71bac885 100644
--- a/include/tpm.h
+++ b/include/tpm.h
@@ -26,6 +26,11 @@ enum tpm_duration {
TPM_DURATION_COUNT,
 };
 
+enum tpm2_structures {
+   TPM2_ST_NO_SESSIONS = 0x8001,
+   TPM2_ST_SESSIONS= 0x8002,
+};
+
 enum tpm_startup_type {
TPM_ST_CLEAR= 0x0001,
TPM_ST_STATE= 0x0002,
@@ -37,6 +42,25 @@ enum tpm2_startup_types {
TPM2_SU_STATE   = 0x0001,
 };
 
+enum tpm2_command_codes {
+   TPM2_CC_STARTUP = 0x0144,
+   TPM2_CC_SELF_TEST   = 0x0143,
+   TPM2_CC_GET_CAPABILITY  = 0x017A,
+   TPM2_CC_PCR_READ= 0x017E,
+   TPM2_CC_PCR_EXTEND  = 0x0182,
+};
+
+enum tpm2_return_codes {
+   TPM2_RC_SUCCESS = 0x,
+   TPM2_RC_HASH= 0x0083, /* RC_FMT1 */
+   TPM2_RC_HANDLE  = 0x008B,
+   TPM2_RC_INITIALIZE  = 0x0100, /* RC_VER1 */
+   TPM2_RC_DISABLED= 0x0120,
+   TPM2_RC_TESTING = 0x090A, /* RC_WARN */
+   TPM2_RC_REFERENCE_H0= 0x0910,
+   TPM2_RC_LOCKOUT = 0x0921,
+};
+
 enum tpm_physical_presence {
TPM_PHYSICAL_PRESENCE_HW_DISABLE= 0x0200,
TPM_PHYSICAL_PRESENCE_CMD_DISABLE   = 0x0100,
@@ -445,7 +469,7 @@ int tpm_get_specification(void);
  * @param mode TPM startup mode
  * @return return code of the operation
  */
-uint32_t tpm_startup(enum tpm_startup_type mode);
+int tpm_startup(enum tpm_startup_type mode);
 
 /**
  * Issue a TPM_SelfTestFull command.
diff --git a/lib/tpm.c b/lib/tpm.c
index f8e99a1e91..cd97ac7eb5 100644
--- a/lib/tpm.c
+++ b/lib/tpm.c
@@ -310,20 +310,35 @@ int tpm_init(void)
return tpm_open(dev);
 }
 
-uint32_t tpm_startup(enum tpm_startup_type mode)
+int tpm_startup(enum tpm_startup_type mode)
 {
-   const uint8_t command[12] = {
-   0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x0,
+   const u8 command_v1[12] = {
+   STRINGIFY16(0xc1),
+   STRINGIFY32(12),
+   STRINGIFY32(0x99),
+   STRINGIFY16(mode),
};
-   const size_t mode_offset = 10;
-   uint8_t buf[COMMAND_BUFFER_SIZE];
+   const u8 command_v2[12] = {
+   STRINGIFY16(TPM2_ST_NO_SESSIONS),
+   STRINGIFY32(12),
+   STRINGIFY32(TPM2_CC_STARTUP),
+   STRINGIFY16(mode),
+   };
+   int ret;
+
+   if (!is_tpmv2)
+   return tpm_sendrecv_command(command_v1, NULL, NULL);
+
+   ret = tpm_sendrecv_command(command_v2, NULL, NULL);
 
-   if (pack_byte_string(buf, sizeof(buf), "sw",
-   0, command, sizeof(command),
-   mode_offset, mode))
-   return TPM_LIB_ERROR;
+   /*
+* Note TPMv2: STARTUP command will return RC_SUCCESS the first time,
+* but will return RC_INITIALIZE otherwise.
+*/
+   if (ret && ret != TPM2_RC_INITIALIZE)
+   return ret;
 
-   return tpm_sendrecv_command(buf, NULL, NULL);
+   return 0;
 }
 
 uint32_t tpm_self_test_full(void)
-- 
2.14.1

___
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[U-Boot] [PATCH 11/18] tpm: add TPM2_Clear command support

[Miquel Raynal]

Add support for the TPM2_Clear command.

Change the command file and the help accordingly.

Signed-off-by: Miquel Raynal 
---
 cmd/tpm.c  | 29 ++---
 cmd/tpm_test.c |  6 +++---
 include/tpm.h  | 21 +
 lib/tpm.c  | 42 ++
 4 files changed, 84 insertions(+), 14 deletions(-)

diff --git a/cmd/tpm.c b/cmd/tpm.c
index fc9ef9d4a3..32921e1a70 100644
--- a/cmd/tpm.c
+++ b/cmd/tpm.c
@@ -454,6 +454,29 @@ static int do_tpm_init(cmd_tbl_t *cmdtp, int flag,
return report_return_code(tpm_init());
 }
 
+static int do_tpm_force_clear(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+   u32 handle = 0;
+   const char *pw = (argc < 3) ? NULL : argv[2];
+   const ssize_t pw_sz = pw ? strlen(pw) : 0;
+
+   if (argc < 2 || argc > 3)
+   return CMD_RET_USAGE;
+
+   if (pw_sz > TPM2_DIGEST_LENGTH)
+   return -EINVAL;
+
+   if (!strcasecmp("TPM2_RH_LOCKOUT", argv[1]))
+   handle = TPM2_RH_LOCKOUT;
+   else if (!strcasecmp("TPM2_RH_PLATFORM", argv[1]))
+   handle = TPM2_RH_PLATFORM;
+   else
+   return CMD_RET_USAGE;
+
+   return report_return_code(tpm_force_clear(handle, pw, pw_sz));
+}
+
 #define TPM_COMMAND_NO_ARG(cmd)\
 static int do_##cmd(cmd_tbl_t *cmdtp, int flag,\
int argc, char * const argv[])  \
@@ -465,7 +488,6 @@ static int do_##cmd(cmd_tbl_t *cmdtp, int flag, 
\
 
 TPM_COMMAND_NO_ARG(tpm_self_test_full)
 TPM_COMMAND_NO_ARG(tpm_continue_self_test)
-TPM_COMMAND_NO_ARG(tpm_force_clear)
 TPM_COMMAND_NO_ARG(tpm_physical_enable)
 TPM_COMMAND_NO_ARG(tpm_physical_disable)
 
@@ -951,8 +973,9 @@ U_BOOT_CMD(tpm, CONFIG_SYS_MAXARGS, 1, do_tpm,
 "  physical_set_deactivated 0|1\n"
 "- Set deactivated flag.\n"
 "Admin Ownership Commands:\n"
-"  force_clear\n"
-"- Issue TPM_ForceClear command.\n"
+"  force_clear []\n"
+"- Issue TPM_[Force]Clear command, with  one of (TPMv2 only):\n"
+"  * TPM2_RH_LOCKOUT, TPM2_RH_PLATFORM.\n"
 "  tsc_physical_presence flags\n"
 "- Set TPM device's Physical Presence flags to .\n"
 "The Capability Commands:\n"
diff --git a/cmd/tpm_test.c b/cmd/tpm_test.c
index 37ad2ff33d..da40dbc423 100644
--- a/cmd/tpm_test.c
+++ b/cmd/tpm_test.c
@@ -176,7 +176,7 @@ static int test_fast_enable(void)
TPM_CHECK(tpm_get_flags(, , NULL));
printf("\tdisable is %d, deactivated is %d\n", disable, deactivated);
for (i = 0; i < 2; i++) {
-   TPM_CHECK(tpm_force_clear());
+   TPM_CHECK(tpm_force_clear(0, NULL, 0));
TPM_CHECK(tpm_get_flags(, , NULL));
printf("\tdisable is %d, deactivated is %d\n", disable,
   deactivated);
@@ -458,7 +458,7 @@ static int test_write_limit(void)
TPM_CHECK(TlclStartupIfNeeded());
TPM_CHECK(tpm_self_test_full());
TPM_CHECK(tpm_tsc_physical_presence(PRESENCE));
-   TPM_CHECK(tpm_force_clear());
+   TPM_CHECK(tpm_force_clear(0, NULL, 0));
TPM_CHECK(tpm_physical_enable());
TPM_CHECK(tpm_physical_set_deactivated(0));
 
@@ -477,7 +477,7 @@ static int test_write_limit(void)
}
 
/* Reset write count */
-   TPM_CHECK(tpm_force_clear());
+   TPM_CHECK(tpm_force_clear(0, NULL, 0));
TPM_CHECK(tpm_physical_enable());
TPM_CHECK(tpm_physical_set_deactivated(0));
 
diff --git a/include/tpm.h b/include/tpm.h
index 38d7cb899d..2f1712 100644
--- a/include/tpm.h
+++ b/include/tpm.h
@@ -43,13 +43,23 @@ enum tpm_startup_type {
 };
 
 enum tpm2_startup_types {
-   TPM2_SU_CLEAR   = 0x,
-   TPM2_SU_STATE   = 0x0001,
+   TPM2_SU_CLEAR   = 0x,
+   TPM2_SU_STATE   = 0x0001,
+};
+
+enum tpm2_handles {
+   TPM2_RH_OWNER   = 0x4001,
+   TPM2_RS_PW  = 0x4009,
+   TPM2_RH_LOCKOUT = 0x400A,
+   TPM2_RH_ENDORSEMENT = 0x400B,
+   TPM2_RH_PLATFORM= 0x400C,
 };
 
 enum tpm2_command_codes {
TPM2_CC_STARTUP = 0x0144,
TPM2_CC_SELF_TEST   = 0x0143,
+   TPM2_CC_CLEAR   = 0x0126,
+   TPM2_CC_CLEARCONTROL= 0x0127,
TPM2_CC_GET_CAPABILITY  = 0x017A,
TPM2_CC_PCR_READ= 0x017E,
TPM2_CC_PCR_EXTEND  = 0x0182,
@@ -567,11 +577,14 @@ uint32_t tpm_tsc_physical_presence(uint16_t presence);
 uint32_t tpm_read_pubek(void *data, size_t count);
 
 /**
- * Issue a TPM_ForceClear command.
+ * Issue a TPM_ForceClear or a TPM2_Clear command.
  *
+ * @param handle   Handle
+ * @param pw   Password
+ * @param pw_szLength of the password
  * @return return code of the operation
  */
-uint32_t tpm_force_clear(void);
+int tpm_force_clear(u32 handle, const char *pw, const ssize_t 

[U-Boot] [PATCH 15/18] tpm: add TPM2_GetCapability command support

[Miquel Raynal]

Add support for the TPM2_GetCapability command.

Change the command file and the help accordingly.

Signed-off-by: Miquel Raynal 
---
 cmd/tpm.c | 31 ---
 include/tpm.h | 14 +++---
 lib/tpm.c | 39 +--
 3 files changed, 64 insertions(+), 20 deletions(-)

diff --git a/cmd/tpm.c b/cmd/tpm.c
index 8630571b1a..7fcfbf8550 100644
--- a/cmd/tpm.c
+++ b/cmd/tpm.c
@@ -433,21 +433,30 @@ static int do_tpm_physical_set_deactivated(cmd_tbl_t 
*cmdtp, int flag,
 static int do_tpm_get_capability(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
 {
-   uint32_t cap_area, sub_cap, rc;
-   void *cap;
+   u32 capability, property, rc;
+   u8 *data;
size_t count;
+   int i, j;
 
if (argc != 5)
return CMD_RET_USAGE;
-   cap_area = simple_strtoul(argv[1], NULL, 0);
-   sub_cap = simple_strtoul(argv[2], NULL, 0);
-   cap = (void *)simple_strtoul(argv[3], NULL, 0);
+   capability = simple_strtoul(argv[1], NULL, 0);
+   property = simple_strtoul(argv[2], NULL, 0);
+   data = (void *)simple_strtoul(argv[3], NULL, 0);
count = simple_strtoul(argv[4], NULL, 0);
 
-   rc = tpm_get_capability(cap_area, sub_cap, cap, count);
+   rc = tpm_get_capability(capability, property, data, count);
if (!rc) {
-   puts("capability information:\n");
-   print_byte_string(cap, count);
+   printf("Capabilities read from TPM:\n");
+   for (i = 0; i < count; i++) {
+   printf("Property 0x");
+   for (j = 0; j < 4; j++)
+   printf("%02x", data[(i * 8) + j]);
+   printf(": 0x");
+   for (j = 4; j < 8; j++)
+   printf("%02x", data[(i * 8) + j]);
+   printf("\n");
+   }
}
 
return report_return_code(rc);
@@ -998,9 +1007,9 @@ U_BOOT_CMD(tpm, CONFIG_SYS_MAXARGS, 1, do_tpm,
 "  tsc_physical_presence flags\n"
 "- Set TPM device's Physical Presence flags to .\n"
 "The Capability Commands:\n"
-"  get_capability cap_area sub_cap addr count\n"
-"- Read  bytes of TPM capability indexed by  and\n"
-"   to memory address .\n"
+"  get_capability    \n"
+"- Read  bytes of TPM capability indexed by \n"
+"  and  to memory address .\n"
 #if defined(CONFIG_TPM_FLUSH_RESOURCES) || defined(CONFIG_TPM_LIST_RESOURCES)
 "Resource management functions\n"
 #endif
diff --git a/include/tpm.h b/include/tpm.h
index 2df2ea3c5b..369119fc1b 100644
--- a/include/tpm.h
+++ b/include/tpm.h
@@ -628,17 +628,17 @@ uint32_t tpm_physical_set_deactivated(uint8_t state);
 
 /**
  * Issue a TPM_GetCapability command.  This implementation is limited
- * to query sub_cap index that is 4-byte wide.
+ * to query property index that is 4-byte wide.
  *
- * @param cap_area partition of capabilities
- * @param sub_cap  further definition of capability, which is
+ * @param capability   partition of capabilities
+ * @param property further definition of capability, which is
  * limited to be 4-byte wide
- * @param cap  output buffer for capability information
- * @param countsize of ouput buffer
+ * @param buf  output buffer for capability information
+ * @param propertycount size of output buffer
  * @return return code of the operation
  */
-uint32_t tpm_get_capability(uint32_t cap_area, uint32_t sub_cap,
-   void *cap, size_t count);
+int tpm_get_capability(u32 capability, u32 property, void *buf,
+  size_t property_count);
 
 /**
  * Issue a TPM_FlushSpecific command for a AUTH ressource.
diff --git a/lib/tpm.c b/lib/tpm.c
index 925b21e2d6..59f6cd6dba 100644
--- a/lib/tpm.c
+++ b/lib/tpm.c
@@ -789,8 +789,7 @@ uint32_t tpm_physical_set_deactivated(uint8_t state)
return tpm_sendrecv_command(buf, NULL, NULL);
 }
 
-uint32_t tpm_get_capability(uint32_t cap_area, uint32_t sub_cap,
-   void *cap, size_t count)
+int tpm1_get_capability(u32 cap_area, u32 sub_cap, void *cap, size_t count)
 {
const uint8_t command[22] = {
0x0, 0xc1,  /* TPM_TAG */
@@ -829,6 +828,42 @@ uint32_t tpm_get_capability(uint32_t cap_area, uint32_t 
sub_cap,
return 0;
 }
 
+int tpm2_get_capability(u32 capability, u32 property, void *buf,
+   size_t property_count)
+{
+   u8 command_v2[COMMAND_BUFFER_SIZE] = {
+   STRINGIFY16(TPM2_ST_NO_SESSIONS),   /* TAG */
+   STRINGIFY32(22),/* Command size */
+   STRINGIFY32(TPM2_CC_GET_CAPABILITY),/* Command code */
+
+   STRINGIFY32(capability),/* Capability */
+ 

[U-Boot] [PATCH 18/18] tpm: add PCR authentication commands support

[Miquel Raynal]

Add support for the TPM2_PCR_SetAuthPolicy and
TPM2_PCR_SetAuthValue commands.

Change the command file and the help accordingly.

Note: These commands could not be tested because the TPMs available
do not support them, however they could be useful for someone else.
The user is warned by the command help.

Signed-off-by: Miquel Raynal 
---
 cmd/tpm.c |  49 +++
 include/tpm.h |  29 
 lib/tpm.c | 106 ++
 3 files changed, 184 insertions(+)

diff --git a/cmd/tpm.c b/cmd/tpm.c
index 3c486c313b..c97babea84 100644
--- a/cmd/tpm.c
+++ b/cmd/tpm.c
@@ -349,6 +349,43 @@ static int do_tpm_pcr_event(cmd_tbl_t *cmdtp, int flag,
return report_return_code(rc);
 }
 
+static int do_tpm_pcr_setauthpolicy(cmd_tbl_t *cmdtp, int flag,
+   int argc, char * const argv[])
+{
+   u32 index = simple_strtoul(argv[1], NULL, 0);
+   char *key = argv[2];
+   const char *pw = (argc < 4) ? NULL : argv[3];
+   const ssize_t pw_sz = pw ? strlen(pw) : 0;
+
+   if (strlen(key) != TPM2_DIGEST_LENGTH)
+   return -EINVAL;
+
+   if (argc < 3 || argc > 4)
+   return CMD_RET_USAGE;
+
+   return report_return_code(tpm2_pcr_setauthpolicy(pw, pw_sz, index,
+key));
+}
+
+static int do_tpm_pcr_setauthvalue(cmd_tbl_t *cmdtp, int flag,
+  int argc, char * const argv[])
+{
+   u32 index = simple_strtoul(argv[1], NULL, 0);
+   char *key = argv[2];
+   const ssize_t key_sz = strlen(key);
+   const char *pw = (argc < 4) ? NULL : argv[3];
+   const ssize_t pw_sz = pw ? strlen(pw) : 0;
+
+   if (strlen(key) != TPM2_DIGEST_LENGTH)
+   return -EINVAL;
+
+   if (argc < 3 || argc > 4)
+   return CMD_RET_USAGE;
+
+   return report_return_code(tpm2_pcr_setauthvalue(pw, pw_sz, index,
+   key, key_sz));
+}
+
 static int do_tpm_pcr_extend(cmd_tbl_t *cmdtp, int flag,
 int argc, char * const argv[])
 {
@@ -1003,6 +1040,10 @@ static cmd_tbl_t tpm_commands[] = {
 do_tpm_nv_write_value, "", ""),
U_BOOT_CMD_MKENT(pcr_event, 0, 1,
 do_tpm_pcr_event, "", ""),
+   U_BOOT_CMD_MKENT(pcr_setauthpolicy, 0, 1,
+do_tpm_pcr_setauthpolicy, "", ""),
+   U_BOOT_CMD_MKENT(pcr_setauthvalue, 0, 1,
+do_tpm_pcr_setauthvalue, "", ""),
U_BOOT_CMD_MKENT(pcr_extend, 0, 1,
 do_tpm_pcr_extend, "", ""),
U_BOOT_CMD_MKENT(pcr_read, 0, 1,
@@ -1150,6 +1191,14 @@ U_BOOT_CMD(tpm, CONFIG_SYS_MAXARGS, 1, do_tpm,
 "- Read  bytes of the public endorsement key to memory\n"
 "  address \n"
 "Integrity Collection and Reporting Commands:\n"
+"  pcr_setauthpolicy   \n"
+"- Change the  to access  PCR.  is for the platform\n"
+"  hierarchy and may be empty.\n"
+"  /!\\WARNING: untested function, use at your own risks !\n"
+"  pcr_setauthvalue   \n"
+"- Change the  to access  PCR.  is for the platform\n"
+"  hierarchy and may be empty.\n"
+"  /!\\WARNING: untested function, use at your own risks !\n"
 "  pcr_event   \n"
 "- Add a new measurement to a PCR.  Update PCR  with\n"
 "  . It must be a 20 byte digest for TPMv1 or a SHA256\n"
diff --git a/include/tpm.h b/include/tpm.h
index cc63f06634..93ec521e74 100644
--- a/include/tpm.h
+++ b/include/tpm.h
@@ -61,11 +61,13 @@ enum tpm2_command_codes {
TPM2_CC_CLEAR   = 0x0126,
TPM2_CC_CLEARCONTROL= 0x0127,
TPM2_CC_HIERCHANGEAUTH  = 0x0129,
+   TPM2_CC_PCR_SETAUTHPOL  = 0x012C,
TPM2_CC_DAM_RESET   = 0x0139,
TPM2_CC_DAM_PARAMETERS  = 0x013A,
TPM2_CC_GET_CAPABILITY  = 0x017A,
TPM2_CC_PCR_READ= 0x017E,
TPM2_CC_PCR_EXTEND  = 0x0182,
+   TPM2_CC_PCR_SETAUTHVAL  = 0x0183,
 };
 
 enum tpm2_return_codes {
@@ -559,6 +561,33 @@ uint32_t tpm_nv_write_value(uint32_t index, const void 
*data, uint32_t length);
  */
 int tpm_pcr_event(u32 index, const void *in_digest, void *out_digest);
 
+/**
+ * Issue a TPM_PCR_SetAuthPolicy command.
+ *
+ * @param pw   Platform password
+ * @param pw_szLength of the password
+ * @param indexIndex of the PCR
+ * @param digest   New key to access the PCR
+ *
+ * @return return code of the operation
+ */
+int tpm2_pcr_setauthpolicy(const char *pw, const ssize_t pw_sz, u32 index,
+  const char *key);
+
+/**
+ * Issue a TPM_PCR_SetAuthValue command.
+ *
+ * @param pw   Platform password
+ * @param pw_szLength of the password
+ * @param indexIndex of the PCR
+ * @param digest   New key to access the PCR
+ * @param key_sz   

[U-Boot] [PATCH 08/18] tpm: handle different buffer sizes

[Miquel Raynal]

Usual buffer sizes for TPMv1 and TPMv2 are different. Change TPMv1
buffer size definition for that and declare another size for TPMv2
buffers.

Signed-off-by: Miquel Raynal 
---
 cmd/tpm.c |  5 +++--
 include/tpm.h |  2 ++
 lib/tpm.c | 60 +--
 3 files changed, 34 insertions(+), 33 deletions(-)

diff --git a/cmd/tpm.c b/cmd/tpm.c
index 1d32028b64..3e2bb3b118 100644
--- a/cmd/tpm.c
+++ b/cmd/tpm.c
@@ -323,8 +323,9 @@ static int do_tpm_nv_write_value(cmd_tbl_t *cmdtp, int flag,
 static int do_tpm_extend(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
 {
+   uint8_t in_digest[TPM1_DIGEST_LENGTH];
+   uint8_t out_digest[TPM1_DIGEST_LENGTH];
uint32_t index, rc;
-   uint8_t in_digest[20], out_digest[20];
 
if (argc != 3)
return CMD_RET_USAGE;
@@ -337,7 +338,7 @@ static int do_tpm_extend(cmd_tbl_t *cmdtp, int flag,
rc = tpm_extend(index, in_digest, out_digest);
if (!rc) {
puts("PCR value after execution of the command:\n");
-   print_byte_string(out_digest, sizeof(out_digest));
+   print_byte_string(out_digest, TPM1_DIGEST_LENGTH);
}
 
return report_return_code(rc);
diff --git a/include/tpm.h b/include/tpm.h
index 0ec3428ea4..1a60ef5b36 100644
--- a/include/tpm.h
+++ b/include/tpm.h
@@ -14,6 +14,8 @@
  */
 
 #define TPM_HEADER_SIZE10
+#define TPM1_DIGEST_LENGTH 20
+#define TPM2_DIGEST_LENGTH 32
 
 enum tpm_duration {
TPM_SHORT = 0,
diff --git a/lib/tpm.c b/lib/tpm.c
index c32fc51ff9..f8e99a1e91 100644
--- a/lib/tpm.c
+++ b/lib/tpm.c
@@ -29,8 +29,6 @@ enum {
COMMAND_BUFFER_SIZE = 256,
TPM_REQUEST_HEADER_LENGTH   = 10,
TPM_RESPONSE_HEADER_LENGTH  = 10,
-   PCR_DIGEST_LENGTH   = 20,
-   DIGEST_LENGTH   = 20,
TPM_REQUEST_AUTH_LENGTH = 45,
TPM_RESPONSE_AUTH_LENGTH= 41,
/* some max lengths, valid for RSA keys <= 2048 bits */
@@ -47,8 +45,8 @@ enum {
 struct session_data {
int valid;
uint32_thandle;
-   uint8_t nonce_even[DIGEST_LENGTH];
-   uint8_t nonce_odd[DIGEST_LENGTH];
+   uint8_t nonce_even[TPM1_DIGEST_LENGTH];
+   uint8_t nonce_odd[TPM1_DIGEST_LENGTH];
 };
 
 static struct session_data oiap_session = {0, };
@@ -469,7 +467,7 @@ uint32_t tpm_extend(uint32_t index, const void *in_digest, 
void *out_digest)
const size_t in_digest_offset = 14;
const size_t out_digest_offset = 10;
uint8_t buf[COMMAND_BUFFER_SIZE];
-   uint8_t response[TPM_RESPONSE_HEADER_LENGTH + PCR_DIGEST_LENGTH];
+   uint8_t response[TPM_RESPONSE_HEADER_LENGTH + TPM1_DIGEST_LENGTH];
size_t response_length = sizeof(response);
uint32_t err;
 
@@ -477,18 +475,18 @@ uint32_t tpm_extend(uint32_t index, const void 
*in_digest, void *out_digest)
return -EOPNOTSUPP;
 
if (pack_byte_string(buf, sizeof(buf), "sds",
-   0, command, sizeof(command),
-   index_offset, index,
-   in_digest_offset, in_digest,
-   PCR_DIGEST_LENGTH))
+0, command, sizeof(command),
+index_offset, index,
+in_digest_offset, in_digest,
+TPM1_DIGEST_LENGTH))
return TPM_LIB_ERROR;
err = tpm_sendrecv_command(buf, response, _length);
if (err)
return err;
 
if (unpack_byte_string(response, response_length, "s",
-   out_digest_offset, out_digest,
-   PCR_DIGEST_LENGTH))
+  out_digest_offset, out_digest,
+  TPM1_DIGEST_LENGTH))
return TPM_LIB_ERROR;
 
return 0;
@@ -516,7 +514,7 @@ uint32_t tpm_pcr_read(uint32_t index, void *data, size_t 
count)
if (err)
return err;
if (unpack_byte_string(response, response_length, "s",
-   out_digest_offset, data, PCR_DIGEST_LENGTH))
+   out_digest_offset, data, TPM1_DIGEST_LENGTH))
return TPM_LIB_ERROR;
 
return 0;
@@ -784,7 +782,7 @@ static uint32_t create_request_auth(const void *request, 
size_t request_len0,
struct session_data *auth_session,
void *request_auth, const void *auth)
 {
-   uint8_t hmac_data[DIGEST_LENGTH * 3 + 1];
+   uint8_t hmac_data[TPM1_DIGEST_LENGTH * 3 + 1];
sha1_context hash_ctx;
const size_t command_code_offset = 6;
const size_t auth_nonce_odd_offset = 4;
@@ -804,25 +802,25 @@ static uint32_t create_request_auth(const void *request, 

[U-Boot] [PATCH 16/18] tpm: add dictionary attack mitigation commands support

[Miquel Raynal]

Add support for the TPM2_DictionaryAttackParameters and
TPM2_DictionaryAttackLockReset commands.

Change the command file and the help accordingly.

Signed-off-by: Miquel Raynal 
---
 cmd/tpm.c | 69 +
 include/tpm.h | 26 +
 lib/tpm.c | 89 +++
 3 files changed, 184 insertions(+)

diff --git a/cmd/tpm.c b/cmd/tpm.c
index 7fcfbf8550..533da2d2ac 100644
--- a/cmd/tpm.c
+++ b/cmd/tpm.c
@@ -480,6 +480,58 @@ static int do_tpm_init(cmd_tbl_t *cmdtp, int flag,
return report_return_code(tpm_init());
 }
 
+static int do_tpm_dam_reset_counter(cmd_tbl_t *cmdtp, int flag,
+   int argc, char *const argv[])
+{
+   const char *pw = (argc < 2) ? NULL : argv[1];
+   const ssize_t pw_sz = pw ? strlen(pw) : 0;
+
+   if (argc > 2)
+   return CMD_RET_USAGE;
+
+   if (pw_sz > TPM2_DIGEST_LENGTH)
+   return -EINVAL;
+
+   return report_return_code(tpm2_dam_reset_counter(pw, pw_sz));
+}
+
+static int do_tpm_dam_set_parameters(cmd_tbl_t *cmdtp, int flag,
+int argc, char *const argv[])
+{
+   const char *pw = (argc < 5) ? NULL : argv[4];
+   const ssize_t pw_sz = pw ? strlen(pw) : 0;
+   /*
+* No Dictionary Attack Mitigation (DAM) means:
+* maxtries = 0x, recovery_time = 0, lockout_recovery = 1
+*/
+   unsigned long int max_tries;
+   unsigned long int recovery_time;
+   unsigned long int lockout_recovery;
+
+   if (argc < 4 || argc > 5)
+   return CMD_RET_USAGE;
+
+   if (pw_sz > TPM2_DIGEST_LENGTH)
+   return -EINVAL;
+
+   if (strict_strtoul(argv[1], 0, _tries))
+   return CMD_RET_USAGE;
+
+   if (strict_strtoul(argv[2], 0, _time))
+   return CMD_RET_USAGE;
+
+   if (strict_strtoul(argv[3], 0, _recovery))
+   return CMD_RET_USAGE;
+
+   debug("Changing dictionary attack parameters:\n");
+   debug("- maxTries: %lu\n- recoveryTime: %lu\n- lockoutRecovery: %lu\n",
+ max_tries, recovery_time, lockout_recovery);
+
+   return report_return_code(tpm2_dam_set_parameters(pw, pw_sz, max_tries,
+recovery_time,
+lockout_recovery));
+}
+
 static int do_tpm_force_clear(cmd_tbl_t *cmdtp, int flag,
  int argc, char * const argv[])
 {
@@ -901,6 +953,10 @@ static cmd_tbl_t tpm_commands[] = {
 do_tpm_self_test_full, "", ""),
U_BOOT_CMD_MKENT(continue_self_test, 0, 1,
 do_tpm_continue_self_test, "", ""),
+   U_BOOT_CMD_MKENT(dam_reset_counter, 0, 1,
+do_tpm_dam_reset_counter, "", ""),
+   U_BOOT_CMD_MKENT(dam_set_parameters, 0, 1,
+do_tpm_dam_set_parameters, "", ""),
U_BOOT_CMD_MKENT(force_clear, 0, 1,
 do_tpm_force_clear, "", ""),
U_BOOT_CMD_MKENT(physical_enable, 0, 1,
@@ -1010,6 +1066,19 @@ U_BOOT_CMD(tpm, CONFIG_SYS_MAXARGS, 1, do_tpm,
 "  get_capability    \n"
 "- Read  bytes of TPM capability indexed by \n"
 "  and  to memory address .\n"
+"Lockout/Dictionary attack Commands:\n"
+"  dam_reset_counter []\n"
+"- If the TPM is not in a LOCKOUT state, reset the internal error\n"
+"  counter (TPMv2 only)\n"
+"  dam_set_parameters
[]\n"
+"- If the TPM is not in a LOCKOUT state, set the dictionary attack\n"
+"  parameters:\n"
+"  * maxTries: maximum number of failures before lockout.\n"
+"  0 means always locking.\n"
+"  * recoveryTime: time before decrementation of the error counter,\n"
+"  0 means no lockout.\n"
+"  * lockoutRecovery: time of a lockout (before the next try)\n"
+"  0 means a reboot is needed.\n"
 #if defined(CONFIG_TPM_FLUSH_RESOURCES) || defined(CONFIG_TPM_LIST_RESOURCES)
 "Resource management functions\n"
 #endif
diff --git a/include/tpm.h b/include/tpm.h
index 369119fc1b..4d062584f9 100644
--- a/include/tpm.h
+++ b/include/tpm.h
@@ -60,6 +60,8 @@ enum tpm2_command_codes {
TPM2_CC_SELF_TEST   = 0x0143,
TPM2_CC_CLEAR   = 0x0126,
TPM2_CC_CLEARCONTROL= 0x0127,
+   TPM2_CC_DAM_RESET   = 0x0139,
+   TPM2_CC_DAM_PARAMETERS  = 0x013A,
TPM2_CC_GET_CAPABILITY  = 0x017A,
TPM2_CC_PCR_READ= 0x017E,
TPM2_CC_PCR_EXTEND  = 0x0182,
@@ -594,6 +596,30 @@ uint32_t tpm_tsc_physical_presence(uint16_t presence);
  */
 uint32_t tpm_read_pubek(void *data, size_t count);
 
+/**
+ * Issue a TPM2_DictionaryAttackLockReset command.
+ *
+ * @param pw   

[U-Boot] [PATCH 03/18] tpm: add support for TPMv2 SPI modules

[Miquel Raynal]

Add the tpm_tis_spi driver that should support any TPMv2 compliant (SPI)
module.

Signed-off-by: Miquel Raynal 
---
 drivers/tpm/Kconfig   |   9 +
 drivers/tpm/Makefile  |   1 +
 drivers/tpm/tpm_tis.h |   3 +
 drivers/tpm/tpm_tis_spi.c | 656 ++
 4 files changed, 669 insertions(+)
 create mode 100644 drivers/tpm/tpm_tis_spi.c

diff --git a/drivers/tpm/Kconfig b/drivers/tpm/Kconfig
index a98570ee77..cc57008b6a 100644
--- a/drivers/tpm/Kconfig
+++ b/drivers/tpm/Kconfig
@@ -46,6 +46,15 @@ config TPM_TIS_I2C_BURST_LIMITATION_LEN
help
  Use this to set the burst limitation length
 
+config TPM_TIS_SPI
+   bool "Enable support for TPMv2 SPI chips"
+   depends on TPM && DM_SPI
+   help
+ This driver supports TPMv2 devices connected on the SPI bus.
+ The usual TPM operations and the 'tpm' command can be used to talk
+ to the device using the standard TPM Interface Specification (TIS)
+ protocol
+
 config TPM_TIS_LPC
bool "Enable support for Infineon SLB9635/45 TPMs on LPC"
depends on TPM && X86
diff --git a/drivers/tpm/Makefile b/drivers/tpm/Makefile
index 5a19a58f43..a753b24230 100644
--- a/drivers/tpm/Makefile
+++ b/drivers/tpm/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_TPM) += tpm-uclass.o
 
 obj-$(CONFIG_TPM_ATMEL_TWI) += tpm_atmel_twi.o
 obj-$(CONFIG_TPM_TIS_INFINEON_I2C) += tpm_tis_infineon_i2c.o
+obj-$(CONFIG_TPM_TIS_SPI) += tpm_tis_spi.o
 obj-$(CONFIG_TPM_TIS_LPC) += tpm_tis_lpc.o
 obj-$(CONFIG_TPM_TIS_SANDBOX) += tpm_tis_sandbox.o
 obj-$(CONFIG_TPM_ST33ZP24_I2C) += tpm_tis_st33zp24_i2c.o
diff --git a/drivers/tpm/tpm_tis.h b/drivers/tpm/tpm_tis.h
index 2b81f3be50..1f4b0c24bd 100644
--- a/drivers/tpm/tpm_tis.h
+++ b/drivers/tpm/tpm_tis.h
@@ -37,6 +37,9 @@ enum tpm_timeout {
 #define TPM_RSP_SIZE_BYTE  2
 #define TPM_RSP_RC_BYTE6
 
+/* Number of xfer retries */
+#define TPM_XFER_RETRY 10
+
 struct tpm_chip {
int is_open;
int locality;
diff --git a/drivers/tpm/tpm_tis_spi.c b/drivers/tpm/tpm_tis_spi.c
new file mode 100644
index 00..17f6cfa85c
--- /dev/null
+++ b/drivers/tpm/tpm_tis_spi.c
@@ -0,0 +1,656 @@
+/*
+ * Author:
+ * Miquel Raynal 
+ *
+ * Description:
+ * SPI-level driver for TCG/TIS TPM (trusted platform module).
+ * Specifications at www.trustedcomputinggroup.org
+ *
+ * This device driver implements the TPM interface as defined in
+ * the TCG SPI protocol stack version 2.0.
+ *
+ * It is based on the U-Boot driver tpm_tis_infineon_i2c.c.
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "tpm_tis.h"
+#include "tpm_internal.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define TPM_ACCESS(l)  (0x | ((l) << 12))
+#define TPM_INT_ENABLE(l)   (0x0008 | ((l) << 12))
+#define TPM_STS(l) (0x0018 | ((l) << 12))
+#define TPM_DATA_FIFO(l)   (0x0024 | ((l) << 12))
+#define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
+#define TPM_RID(l) (0x0F04 | ((l) << 12))
+
+#define MAX_SPI_FRAMESIZE 64
+
+/*
+ * tpm_tis_spi_read() - read from TPM register
+ * @addr: register address to read from
+ * @buffer: provided by caller
+ * @len: number of bytes to read
+ *
+ * Read len bytes from TPM register and put them into
+ * buffer (little-endian format, i.e. first byte is put into buffer[0]).
+ *
+ * NOTE: TPM is big-endian for multi-byte values. Multi-byte
+ * values have to be swapped.
+ *
+ * Return -EIO on error, 0 on success.
+ */
+static int tpm_tis_spi_xfer(struct udevice *dev, u32 addr, const u8 *out,
+   u8 *in, u16 len)
+{
+   struct spi_slave *slave = dev_get_parent_priv(dev);
+   int transfer_len, ret;
+   u8 tx_buf[MAX_SPI_FRAMESIZE];
+   u8 rx_buf[MAX_SPI_FRAMESIZE];
+
+   if (in && out) {
+   debug("%s: cannot do full duplex\n", __func__);
+   return -EINVAL;
+   }
+
+   ret = spi_claim_bus(slave);
+   if (ret < 0) {
+   debug("%s: could not claim bus\n", __func__);
+   return ret;
+   }
+
+   while (len) {
+   /* Request */
+   transfer_len = min_t(u16, len, MAX_SPI_FRAMESIZE);
+   tx_buf[0] = (in ? BIT(7) : 0) | (transfer_len - 1);
+   tx_buf[1] = 0xD4;
+   tx_buf[2] = addr >> 8;
+   tx_buf[3] = addr;
+
+   ret = spi_xfer(slave, 4 * 8, tx_buf, rx_buf, SPI_XFER_BEGIN);
+   if (ret < 0) {
+   debug("%s: spi request transfer failed (err: %d)\n",
+ __func__, ret);
+   goto release_bus;
+   }
+
+   /* Wait state */
+   if (!(rx_buf[3] & 0x1)) {
+   int i;
+
+   

[U-Boot] [PATCH 12/18] tpm: rename the _extend() function to be _pcr_event()

[Miquel Raynal]

The function currently called _extend() actually does what the
specification defines as a _pcr_event(). Rename the function
accordingly before implementing the actual _extend() command.

Signed-off-by: Miquel Raynal 
---
 cmd/tpm.c  | 18 ++
 cmd/tpm_test.c |  4 ++--
 include/tpm.h  |  4 ++--
 lib/tpm.c  |  2 +-
 4 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/cmd/tpm.c b/cmd/tpm.c
index 32921e1a70..93dcd1a65c 100644
--- a/cmd/tpm.c
+++ b/cmd/tpm.c
@@ -324,8 +324,8 @@ static int do_tpm_nv_write_value(cmd_tbl_t *cmdtp, int flag,
return report_return_code(rc);
 }
 
-static int do_tpm_extend(cmd_tbl_t *cmdtp, int flag,
-   int argc, char * const argv[])
+static int do_tpm_pcr_event(cmd_tbl_t *cmdtp, int flag,
+   int argc, char * const argv[])
 {
uint8_t in_digest[TPM1_DIGEST_LENGTH];
uint8_t out_digest[TPM1_DIGEST_LENGTH];
@@ -333,13 +333,14 @@ static int do_tpm_extend(cmd_tbl_t *cmdtp, int flag,
 
if (argc != 3)
return CMD_RET_USAGE;
+
index = simple_strtoul(argv[1], NULL, 0);
if (!parse_byte_string(argv[2], in_digest, NULL)) {
printf("Couldn't parse byte string %s\n", argv[2]);
return CMD_RET_FAILURE;
}
 
-   rc = tpm_extend(index, in_digest, out_digest);
+   rc = tpm_pcr_event(index, in_digest, out_digest);
if (!rc) {
puts("PCR value after execution of the command:\n");
print_byte_string(out_digest, TPM1_DIGEST_LENGTH);
@@ -887,8 +888,8 @@ static cmd_tbl_t tpm_commands[] = {
 do_tpm_nv_read_value, "", ""),
U_BOOT_CMD_MKENT(nv_write_value, 0, 1,
 do_tpm_nv_write_value, "", ""),
-   U_BOOT_CMD_MKENT(extend, 0, 1,
-do_tpm_extend, "", ""),
+   U_BOOT_CMD_MKENT(pcr_event, 0, 1,
+do_tpm_pcr_event, "", ""),
U_BOOT_CMD_MKENT(pcr_read, 0, 1,
 do_tpm_pcr_read, "", ""),
U_BOOT_CMD_MKENT(tsc_physical_presence, 0, 1,
@@ -1019,9 +1020,10 @@ U_BOOT_CMD(tpm, CONFIG_SYS_MAXARGS, 1, do_tpm,
 "- Read  bytes of the public endorsement key to memory\n"
 "  address \n"
 "Integrity Collection and Reporting Commands:\n"
-"  extend index digest_hex_string\n"
-"- Add a new measurement to a PCR.  Update PCR  with the 20-bytes\n"
-"  \n"
+"  pcr_event   \n"
+"- Add a new measurement to a PCR.  Update PCR  with\n"
+"  . It must be a 20 byte digest for TPMv1 or a SHA256\n"
+"  digest of 32 bytes for TPMv2. Value of the PCR is given at 
\n"
 "  pcr_read index addr count\n"
 "- Read  bytes from PCR  to memory address .\n"
 #ifdef CONFIG_TPM_AUTH_SESSIONS
diff --git a/cmd/tpm_test.c b/cmd/tpm_test.c
index da40dbc423..0bbbdab4ee 100644
--- a/cmd/tpm_test.c
+++ b/cmd/tpm_test.c
@@ -104,7 +104,7 @@ static int test_early_extend(void)
tpm_init();
TPM_CHECK(tpm_startup(TPM_ST_CLEAR));
TPM_CHECK(tpm_continue_self_test());
-   TPM_CHECK(tpm_extend(1, value_in, value_out));
+   TPM_CHECK(tpm_pcr_event(1, value_in, value_out));
printf("done\n");
return 0;
 }
@@ -439,7 +439,7 @@ static int test_timing(void)
TTPM_CHECK(tpm_tsc_physical_presence(PRESENCE), 100);
TTPM_CHECK(tpm_nv_write_value(INDEX0, (uint8_t *), sizeof(x)), 100);
TTPM_CHECK(tpm_nv_read_value(INDEX0, (uint8_t *), sizeof(x)), 100);
-   TTPM_CHECK(tpm_extend(0, in, out), 200);
+   TTPM_CHECK(tpm_pcr_event(0, in, out), 200);
TTPM_CHECK(tpm_set_global_lock(), 50);
TTPM_CHECK(tpm_tsc_physical_presence(PHYS_PRESENCE), 100);
printf("done\n");
diff --git a/include/tpm.h b/include/tpm.h
index 2f1712..a863ac6196 100644
--- a/include/tpm.h
+++ b/include/tpm.h
@@ -537,7 +537,7 @@ uint32_t tpm_nv_read_value(uint32_t index, void *data, 
uint32_t count);
 uint32_t tpm_nv_write_value(uint32_t index, const void *data, uint32_t length);
 
 /**
- * Issue a TPM_Extend command.
+ * Issue a TPM_PCR_Event command.
  *
  * @param indexindex of the PCR
  * @param in_digest160-bit value representing the event to be
@@ -546,7 +546,7 @@ uint32_t tpm_nv_write_value(uint32_t index, const void 
*data, uint32_t length);
  * command
  * @return return code of the operation
  */
-uint32_t tpm_extend(uint32_t index, const void *in_digest, void *out_digest);
+int tpm_pcr_event(u32 index, const void *in_digest, void *out_digest);
 
 /**
  * Issue a TPM_PCRRead command.
diff --git a/lib/tpm.c b/lib/tpm.c
index e5fb18308c..07e2490af2 100644
--- a/lib/tpm.c
+++ b/lib/tpm.c
@@ -493,7 +493,7 @@ uint32_t tpm_nv_write_value(uint32_t index, const void 
*data, uint32_t length)
return 0;
 }
 
-uint32_t tpm_extend(uint32_t index, const void *in_digest, void *out_digest)
+int tpm_pcr_event(u32 index, const void *in_digest, void *out_digest)
 {
  

[U-Boot] [PATCH 14/18] tpm: add TPM2_PCR_Read command support

[Miquel Raynal]

Add support for the TPM2_PCR_Read command.

Change the command file and the help accordingly.

Signed-off-by: Miquel Raynal 
---
 cmd/tpm.c | 23 ++-
 include/tpm.h |  4 ++--
 lib/tpm.c | 56 +++-
 3 files changed, 71 insertions(+), 12 deletions(-)

diff --git a/cmd/tpm.c b/cmd/tpm.c
index 3f284f0adf..8630571b1a 100644
--- a/cmd/tpm.c
+++ b/cmd/tpm.c
@@ -362,21 +362,25 @@ static int do_tpm_pcr_extend(cmd_tbl_t *cmdtp, int flag,
 }
 
 static int do_tpm_pcr_read(cmd_tbl_t *cmdtp, int flag,
-   int argc, char * const argv[])
+  int argc, char * const argv[])
 {
-   uint32_t index, count, rc;
+   bool is_tpmv2 = (tpm_get_specification() == 2);
+   u32 index, rc;
+   unsigned int updates;
void *data;
 
-   if (argc != 4)
+   if (argc != 3)
return CMD_RET_USAGE;
+
index = simple_strtoul(argv[1], NULL, 0);
data = (void *)simple_strtoul(argv[2], NULL, 0);
-   count = simple_strtoul(argv[3], NULL, 0);
 
-   rc = tpm_pcr_read(index, data, count);
+   rc = tpm_pcr_read(index, data, );
if (!rc) {
-   puts("Named PCR content:\n");
-   print_byte_string(data, count);
+   printf("Named PCR %u content (known updates: %d):\n", index,
+  is_tpmv2 ? updates : -1);
+   print_byte_string(data, !is_tpmv2 ? TPM1_DIGEST_LENGTH :
+   TPM2_DIGEST_LENGTH);
}
 
return report_return_code(rc);
@@ -1038,12 +1042,13 @@ U_BOOT_CMD(tpm, CONFIG_SYS_MAXARGS, 1, do_tpm,
 "- Add a new measurement to a PCR.  Update PCR  with\n"
 "  . It must be a 20 byte digest for TPMv1 or a SHA256\n"
 "  digest of 32 bytes for TPMv2. Value of the PCR is given at 
\n"
-"  pcr_read index addr count\n"
-"- Read  bytes from PCR  to memory address .\n"
 "  pcr_extend index \n"
 "- Add a new measurement to a PCR.  Update PCR  with\n"
 "  . It must be a 20 byte digest for TPMv1 or a SHA256\n"
 "  digest of 32 bytes for TPMv2.\n"
+"  pcr_read  \n"
+"- Read PCR  to memory address  (20B with TPMv1, 64B 
with\n"
+"   TPMv2).\n"
 #ifdef CONFIG_TPM_AUTH_SESSIONS
 "Authorization Sessions\n"
 "  oiap\n"
diff --git a/include/tpm.h b/include/tpm.h
index b88ad4b2f4..2df2ea3c5b 100644
--- a/include/tpm.h
+++ b/include/tpm.h
@@ -571,10 +571,10 @@ int tpm2_pcr_extend(u32 index, const uint8_t *digest);
  *
  * @param indexindex of the PCR
  * @param data output buffer for contents of the named PCR
- * @param countsize of output buffer
+ * @param updates  optional out parameter: number of updates for this PCR
  * @return return code of the operation
  */
-uint32_t tpm_pcr_read(uint32_t index, void *data, size_t count);
+int tpm_pcr_read(u32 index, void *data, unsigned int *updates);
 
 /**
  * Issue a TSC_PhysicalPresence command.  TPM physical presence flag
diff --git a/lib/tpm.c b/lib/tpm.c
index e74530d538..925b21e2d6 100644
--- a/lib/tpm.c
+++ b/lib/tpm.c
@@ -568,7 +568,7 @@ int tpm2_pcr_extend(u32 index, const uint8_t *digest)
return tpm_sendrecv_command(command_v2, NULL, NULL);
 }
 
-uint32_t tpm_pcr_read(uint32_t index, void *data, size_t count)
+int tpm1_pcr_read(u32 index, void *data)
 {
const uint8_t command[14] = {
0x0, 0xc1, 0x0, 0x0, 0x0, 0xe, 0x0, 0x0, 0x0, 0x15,
@@ -596,6 +596,60 @@ uint32_t tpm_pcr_read(uint32_t index, void *data, size_t 
count)
return 0;
 }
 
+int tpm2_pcr_read(u32 index, void *data, unsigned int *updates)
+{
+   u8 command_v2[COMMAND_BUFFER_SIZE] = {
+   STRINGIFY16(TPM2_ST_NO_SESSIONS), /* TAG */
+   STRINGIFY32(20),/* Command size */
+   STRINGIFY32(TPM2_CC_PCR_READ),  /* Command code */
+
+   /* TPML_PCR_SELECTION */
+   STRINGIFY32(1), /* Number of selections */
+   STRINGIFY16(TPM2_ALG_SHA256),   /* Algorithm of the hash */
+   3,  /* Array size for selection */
+   /* STRINGIFY32(bitmap(index) << 8) Selected PCR bitmap */
+   };
+   size_t response_len = COMMAND_BUFFER_SIZE;
+   u8 response[COMMAND_BUFFER_SIZE];
+   unsigned int counter = 0;
+   u8 pcr_sel[3] = {};
+   int ret;
+
+   if (!is_tpmv2)
+   return TPM_LIB_ERROR;
+
+   if (index >= 24)
+   return TPM_LIB_ERROR;
+
+   pcr_sel[index / 8] = BIT(index % 8);
+   if (pack_byte_string(command_v2, COMMAND_BUFFER_SIZE, "bbb",
+17, pcr_sel[0], 18, pcr_sel[1], 19, pcr_sel[2]))
+   return TPM_LIB_ERROR;
+
+   ret = tpm_sendrecv_command(command_v2, response, _len);
+   if (ret)
+   return ret;
+
+   if (unpack_byte_string(response, 

[U-Boot] [PATCH 07/18] tpm: add possible traces to analyze buffers returned by the TPM

[Miquel Raynal]

When debugging, it is welcome to get more information about what the TPM
returns. Add the possibility to print the packets received to show their
exact content.

Signed-off-by: Miquel Raynal 
---
 lib/tpm.c | 12 +++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/lib/tpm.c b/lib/tpm.c
index 1b3a112311..c32fc51ff9 100644
--- a/lib/tpm.c
+++ b/lib/tpm.c
@@ -249,6 +249,7 @@ static uint32_t tpm_sendrecv_command(const void *command,
int err, ret;
uint8_t response_buffer[COMMAND_BUFFER_SIZE];
size_t response_length;
+   int i;
 
if (response) {
response_length = *size_ptr;
@@ -260,15 +261,24 @@ static uint32_t tpm_sendrecv_command(const void *command,
ret = uclass_first_device_err(UCLASS_TPM, );
if (ret)
return ret;
+
err = tpm_xfer(dev, command, tpm_command_size(command),
   response, _length);
 
if (err < 0)
return TPM_LIB_ERROR;
+
if (size_ptr)
*size_ptr = response_length;
 
-   return tpm_return_code(response);
+   ret = tpm_return_code(response);
+
+   debug("TPM response [ret:%d]: ", ret);
+   for (i = 0; i < response_length; i++)
+   debug("%02x ", ((u8 *)response)[i]);
+   debug("\n");
+
+   return ret;
 }
 
 int tpm_set_specification(int version)
-- 
2.14.1

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[U-Boot] [PATCH 04/18] tpm: fix indentation in command list before adding more

[Miquel Raynal]

Prepare the addition of more commands by first indenting correctly the
current list.

Signed-off-by: Miquel Raynal 
---
 cmd/tpm.c | 40 
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/cmd/tpm.c b/cmd/tpm.c
index d9b433582c..f456396d75 100644
--- a/cmd/tpm.c
+++ b/cmd/tpm.c
@@ -820,45 +820,45 @@ static int do_tpm_list(cmd_tbl_t *cmdtp, int flag, int 
argc,
 static cmd_tbl_t tpm_commands[] = {
U_BOOT_CMD_MKENT(info, 0, 1, do_tpm_info, "", ""),
U_BOOT_CMD_MKENT(init, 0, 1,
-   do_tpm_init, "", ""),
+do_tpm_init, "", ""),
U_BOOT_CMD_MKENT(startup, 0, 1,
-   do_tpm_startup, "", ""),
+do_tpm_startup, "", ""),
U_BOOT_CMD_MKENT(self_test_full, 0, 1,
-   do_tpm_self_test_full, "", ""),
+do_tpm_self_test_full, "", ""),
U_BOOT_CMD_MKENT(continue_self_test, 0, 1,
-   do_tpm_continue_self_test, "", ""),
+do_tpm_continue_self_test, "", ""),
U_BOOT_CMD_MKENT(force_clear, 0, 1,
-   do_tpm_force_clear, "", ""),
+do_tpm_force_clear, "", ""),
U_BOOT_CMD_MKENT(physical_enable, 0, 1,
-   do_tpm_physical_enable, "", ""),
+do_tpm_physical_enable, "", ""),
U_BOOT_CMD_MKENT(physical_disable, 0, 1,
-   do_tpm_physical_disable, "", ""),
+do_tpm_physical_disable, "", ""),
U_BOOT_CMD_MKENT(nv_define_space, 0, 1,
-   do_tpm_nv_define_space, "", ""),
+do_tpm_nv_define_space, "", ""),
U_BOOT_CMD_MKENT(nv_read_value, 0, 1,
-   do_tpm_nv_read_value, "", ""),
+do_tpm_nv_read_value, "", ""),
U_BOOT_CMD_MKENT(nv_write_value, 0, 1,
-   do_tpm_nv_write_value, "", ""),
+do_tpm_nv_write_value, "", ""),
U_BOOT_CMD_MKENT(extend, 0, 1,
-   do_tpm_extend, "", ""),
+do_tpm_extend, "", ""),
U_BOOT_CMD_MKENT(pcr_read, 0, 1,
-   do_tpm_pcr_read, "", ""),
+do_tpm_pcr_read, "", ""),
U_BOOT_CMD_MKENT(tsc_physical_presence, 0, 1,
-   do_tpm_tsc_physical_presence, "", ""),
+do_tpm_tsc_physical_presence, "", ""),
U_BOOT_CMD_MKENT(read_pubek, 0, 1,
-   do_tpm_read_pubek, "", ""),
+do_tpm_read_pubek, "", ""),
U_BOOT_CMD_MKENT(physical_set_deactivated, 0, 1,
-   do_tpm_physical_set_deactivated, "", ""),
+do_tpm_physical_set_deactivated, "", ""),
U_BOOT_CMD_MKENT(get_capability, 0, 1,
-   do_tpm_get_capability, "", ""),
+do_tpm_get_capability, "", ""),
U_BOOT_CMD_MKENT(raw_transfer, 0, 1,
-   do_tpm_raw_transfer, "", ""),
+do_tpm_raw_transfer, "", ""),
U_BOOT_CMD_MKENT(nv_define, 0, 1,
-   do_tpm_nv_define, "", ""),
+do_tpm_nv_define, "", ""),
U_BOOT_CMD_MKENT(nv_read, 0, 1,
-   do_tpm_nv_read, "", ""),
+do_tpm_nv_read, "", ""),
U_BOOT_CMD_MKENT(nv_write, 0, 1,
-   do_tpm_nv_write, "", ""),
+do_tpm_nv_write, "", ""),
 #ifdef CONFIG_TPM_AUTH_SESSIONS
U_BOOT_CMD_MKENT(oiap, 0, 1,
 do_tpm_oiap, "", ""),
-- 
2.14.1

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[U-Boot] [PATCH 06/18] tpm: add macros for TPMv2 commands

[Miquel Raynal]

TPM commands are much easier to handle with these macros that will
transform words or integers into byte string. This way, there is no need
to call pack_byte_string() while all variable length in a command are
known (and at must 4 bytes, which is a lot of them).

Signed-off-by: Miquel Raynal 
---
 lib/tpm.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/lib/tpm.c b/lib/tpm.c
index 38b76b4961..1b3a112311 100644
--- a/lib/tpm.c
+++ b/lib/tpm.c
@@ -15,6 +15,12 @@
 /* Internal error of TPM command library */
 #define TPM_LIB_ERROR  ((uint32_t)~0u)
 
+/* To make strings of commands more easily */
+#define __MSB(x) ((x) >> 8)
+#define __LSB(x) ((x) & 0xFF)
+#define STRINGIFY16(x) __MSB(x), __LSB(x)
+#define STRINGIFY32(x) STRINGIFY16((x) >> 16), STRINGIFY16((x) & 0x)
+
 /* Global boolean to discriminate TPMv2.x from TPMv1.x functions */
 static bool is_tpmv2;
 
-- 
2.14.1

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[U-Boot] [PATCH 02/18] tpm: rename tpm_tis_infineon in tpm_tis_infineon_i2c

[Miquel Raynal]

As the chips driven by tpm_tis_infineon.c are only I2C chips, rename the
driver with the _i2c suffix to prepare the venue of its _spi cousin.

Also change the driver name in the U_BOOT_DRIVER structure.

Signed-off-by: Miquel Raynal 
---
 drivers/tpm/Kconfig| 4 ++--
 drivers/tpm/Makefile   | 2 +-
 drivers/tpm/{tpm_tis_infineon.c => tpm_tis_infineon_i2c.c} | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)
 rename drivers/tpm/{tpm_tis_infineon.c => tpm_tis_infineon_i2c.c} (99%)

diff --git a/drivers/tpm/Kconfig b/drivers/tpm/Kconfig
index 2a64bc49c3..a98570ee77 100644
--- a/drivers/tpm/Kconfig
+++ b/drivers/tpm/Kconfig
@@ -22,7 +22,7 @@ config TPM_ATMEL_TWI
  to the device using the standard TPM Interface Specification (TIS)
  protocol
 
-config TPM_TIS_INFINEON
+config TPM_TIS_INFINEON_I2C
bool "Enable support for Infineon SLB9635/45 TPMs on I2C"
depends on TPM && DM_I2C
help
@@ -33,7 +33,7 @@ config TPM_TIS_INFINEON
 
 config TPM_TIS_I2C_BURST_LIMITATION
bool "Enable I2C burst length limitation"
-   depends on TPM_TIS_INFINEON
+   depends on TPM_TIS_INFINEON_I2C
help
  Some broken TPMs have a limitation on the number of bytes they can
  receive in one message. Enable this option to allow you to set this
diff --git a/drivers/tpm/Makefile b/drivers/tpm/Makefile
index c42a93f267..5a19a58f43 100644
--- a/drivers/tpm/Makefile
+++ b/drivers/tpm/Makefile
@@ -6,7 +6,7 @@
 obj-$(CONFIG_TPM) += tpm-uclass.o
 
 obj-$(CONFIG_TPM_ATMEL_TWI) += tpm_atmel_twi.o
-obj-$(CONFIG_TPM_TIS_INFINEON) += tpm_tis_infineon.o
+obj-$(CONFIG_TPM_TIS_INFINEON_I2C) += tpm_tis_infineon_i2c.o
 obj-$(CONFIG_TPM_TIS_LPC) += tpm_tis_lpc.o
 obj-$(CONFIG_TPM_TIS_SANDBOX) += tpm_tis_sandbox.o
 obj-$(CONFIG_TPM_ST33ZP24_I2C) += tpm_tis_st33zp24_i2c.o
diff --git a/drivers/tpm/tpm_tis_infineon.c b/drivers/tpm/tpm_tis_infineon_i2c.c
similarity index 99%
rename from drivers/tpm/tpm_tis_infineon.c
rename to drivers/tpm/tpm_tis_infineon_i2c.c
index 41b748e7a2..c29c2d1106 100644
--- a/drivers/tpm/tpm_tis_infineon.c
+++ b/drivers/tpm/tpm_tis_infineon_i2c.c
@@ -629,7 +629,7 @@ static const struct udevice_id tpm_tis_i2c_ids[] = {
 };
 
 U_BOOT_DRIVER(tpm_tis_i2c) = {
-   .name   = "tpm_tis_infineon",
+   .name   = "tpm_tis_infineon_i2c",
.id = UCLASS_TPM,
.of_match = tpm_tis_i2c_ids,
.ops= _tis_i2c_ops,
-- 
2.14.1

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[U-Boot] [PATCH 01/18] tpm: add Revision ID field in the chip structure

[Miquel Raynal]

TPM are shipped with a few read-only register from which we can retrieve
for instance:
- vendor ID
- product ID
- revision ID

Product and vendor ID share the same register and are already referenced
in the tpm_chip structure. Add the revision ID entry which is missing.

Signed-off-by: Miquel Raynal 
---
 drivers/tpm/tpm_tis.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/tpm/tpm_tis.h b/drivers/tpm/tpm_tis.h
index 25b152b321..2b81f3be50 100644
--- a/drivers/tpm/tpm_tis.h
+++ b/drivers/tpm/tpm_tis.h
@@ -41,6 +41,7 @@ struct tpm_chip {
int is_open;
int locality;
u32 vend_dev;
+   u8 rid;
unsigned long timeout_a, timeout_b, timeout_c, timeout_d;  /* msec */
ulong chip_type;
 };
-- 
2.14.1

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[U-Boot] [PATCH 00/18] Introduce SPI TPM v2.0 support

[Miquel Raynal]

Current U-Boot supports TPM v1.2 specification. The new specification
(v2.0) is not backward compatible and renames/introduces several
functions.

This series introduces a new SPI driver following the TPM v2.0
specification. It has been tested on a ST TPM but should be usable with
others v2.0 compliant chips.

Then, basic functionalities are introduced one by one for the v2.0
specification. The INIT command now can receive a parameter to
distinguish further TPMv1/TPMv2 commands. After that, the library itself
will know which one is pertinent and will return a special error if the
desired command is not supported for the selected specification.

Available commands for v2.0 TPMs are:
* STARTUP
* SELF TEST
* CLEAR
* PCR EXTEND
* PCR READ
* GET CAPABILITY
* DICTIONARY ATTACK LOCK RESET
* DICTIONARY ATTACK CHANGE PARAMETERS
* HIERARCHY CHANGE AUTH

Two commands have been written but could not be tested (unsupported by
the TPM chosen):
* PCR CHANGE AUTH POLICY
* PCR CHANGE AUTH VALUE

With this set of function, minimal TPMv2.0 handling is possible with the
following sequence.

* First, initialize the TPM stack in U-Boot: "TPM2" is a new parameter
  to discern the format of the commands:

> tpm init TPM2

* Then send the STARTUP command to the TPM. The flag is slightly
  different between the revisions.

> tpm startup TPM2_SU_CLEAR

* To enable full TPM capabilities, continue the tests (or do them all
  again). It seems like self_test_full always waits for the operation to
  finish, while continue_self_test returns a busy state if called to
  early.

> tpm continue_self_test
> tpm self_test_full

* Manage passwords (force_clear also resets a lot of internal stuff).
  Olderly, TAKE OWNERSHIP == CLEAR + CHANGE AUTH. LOCKOUT is an example,
  ENDORSEMENT and PLATFORM hierarchies are available too:

> tpm force_clear TPM2_RH_LOCKOUT []
> tpm change_auth TPM2_RH_LOCKOUT  []

* Dictionary Attack Mitigation (DAM) parameters can be changed. It is
  possible to reset the failure counter and disable the lockout (values
  erased after a CLEAR). It is then possible to check the parameters
  have been correctly applied.

> tpm dam_reset_counter []
> tpm dam_set_parameters 0x 1 0 []
> tpm get_capability 0x0006 0x020e 0x400 4

* PCR policy may be changed (untested).
  PCR can be extended (no protection against packet replay yet).
  PCR can be read (the counter with the number of "extensions" is also
  given).

> tpm pcr_setauthpolicy 0 12345678901234567890123456789012 []
> tpm pcr_read 0 0x400
> tpm pcr_extend 0 0x400


Miquel Raynal (18):
  tpm: add Revision ID field in the chip structure
  tpm: rename tpm_tis_infineon in tpm_tis_infineon_i2c
  tpm: add support for TPMv2 SPI modules
  tpm: fix indentation in command list before adding more
  tpm: prepare support for TPMv2 commands
  tpm: add macros for TPMv2 commands
  tpm: add possible traces to analyze buffers returned by the TPM
  tpm: handle different buffer sizes
  tpm: add TPM2_Startup command support
  tpm: add TPM2_SelfTest command support
  tpm: add TPM2_Clear command support
  tpm: rename the _extend() function to be _pcr_event()
  tpm: add TPM2_PCR_Extend command support
  tpm: add TPM2_PCR_Read command support
  tpm: add TPM2_GetCapability command support
  tpm: add dictionary attack mitigation commands support
  tpm: add TPM2_HierarchyChangeAuth command support
  tpm: add PCR authentication commands support

 cmd/tpm.c  | 360 +--
 cmd/tpm_test.c |  10 +-
 drivers/tpm/Kconfig|  13 +-
 drivers/tpm/Makefile   |   3 +-
 drivers/tpm/tpm_tis.h  |   4 +
 .../{tpm_tis_infineon.c => tpm_tis_infineon_i2c.c} |   2 +-
 drivers/tpm/tpm_tis_spi.c  | 656 +
 include/tpm.h  | 183 +-
 lib/tpm.c  | 654 ++--
 9 files changed, 1739 insertions(+), 146 deletions(-)
 rename drivers/tpm/{tpm_tis_infineon.c => tpm_tis_infineon_i2c.c} (99%)
 create mode 100644 drivers/tpm/tpm_tis_spi.c

-- 
2.14.1

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Re: [U-Boot] [PATCH 1/2] tools: env: Refactor write path of flash_io()

[Stefano Babic]

On 08/03/2018 12:52, Alex Kiernan wrote:
> Extract write path of flash_io() into a separate function. This patch
> should be a functional no-op.
> 
> Signed-off-by: Alex Kiernan 
> ---
> 
>  tools/env/fw_env.c | 98 
> +-
>  1 file changed, 53 insertions(+), 45 deletions(-)
> 
> diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
> index 0e3e343..2df3504 100644
> --- a/tools/env/fw_env.c
> +++ b/tools/env/fw_env.c
> @@ -1229,68 +1229,76 @@ static int flash_read (int fd)
>   return 0;
>  }
>  
> -static int flash_io (int mode)
> +static int flash_io_write (int fd_current)
>  {
> - int fd_current, fd_target, rc, dev_target;
> + int fd_target, rc, dev_target;
>  
> - /* dev_current: fd_current, erase_current */
> - fd_current = open (DEVNAME (dev_current), mode);
> - if (fd_current < 0) {
> - fprintf (stderr,
> -  "Can't open %s: %s\n",
> -  DEVNAME (dev_current), strerror (errno));
> - return -1;
> + if (HaveRedundEnv) {
> + /* switch to next partition for writing */
> + dev_target = !dev_current;
> + /* dev_target: fd_target, erase_target */
> + fd_target = open (DEVNAME (dev_target), O_RDWR);
> + if (fd_target < 0) {
> + fprintf (stderr,
> +  "Can't open %s: %s\n",
> +  DEVNAME (dev_target),
> +  strerror (errno));
> + rc = -1;
> + goto exit;
> + }
> + } else {
> + dev_target = dev_current;
> + fd_target = fd_current;
>   }
>  
> - if (mode == O_RDWR) {
> - if (HaveRedundEnv) {
> - /* switch to next partition for writing */
> - dev_target = !dev_current;
> - /* dev_target: fd_target, erase_target */
> - fd_target = open (DEVNAME (dev_target), mode);
> - if (fd_target < 0) {
> - fprintf (stderr,
> -  "Can't open %s: %s\n",
> -  DEVNAME (dev_target),
> -  strerror (errno));
> - rc = -1;
> - goto exit;
> - }
> - } else {
> - dev_target = dev_current;
> - fd_target = fd_current;
> - }
> + rc = flash_write (fd_current, fd_target, dev_target);
>  
> - rc = flash_write (fd_current, fd_target, dev_target);
> + if (fsync(fd_current) &&
> + !(errno == EINVAL || errno == EROFS)) {
> + fprintf (stderr,
> +  "fsync failed on %s: %s\n",
> +  DEVNAME (dev_current), strerror (errno));
> + }
>  
> - if (fsync(fd_current) &&
> + if (HaveRedundEnv) {
> + if (fsync(fd_target) &&
>   !(errno == EINVAL || errno == EROFS)) {
>   fprintf (stderr,
>"fsync failed on %s: %s\n",
>DEVNAME (dev_current), strerror (errno));
>   }
>  
> - if (HaveRedundEnv) {
> - if (fsync(fd_target) &&
> - !(errno == EINVAL || errno == EROFS)) {
> - fprintf (stderr,
> -  "fsync failed on %s: %s\n",
> -  DEVNAME (dev_current), strerror 
> (errno));
> - }
> -
> - if (close (fd_target)) {
> - fprintf (stderr,
> - "I/O error on %s: %s\n",
> - DEVNAME (dev_target),
> - strerror (errno));
> - rc = -1;
> - }
> + if (close (fd_target)) {
> + fprintf (stderr,
> +  "I/O error on %s: %s\n",
> +  DEVNAME (dev_target),
> +  strerror (errno));
> + rc = -1;
>   }
> + }
> +exit:
> + return rc;
> +}
> +
> +static int flash_io (int mode)
> +{
> + int fd_current, rc;
> +
> + /* dev_current: fd_current, erase_current */
> + fd_current = open (DEVNAME (dev_current), mode);
> + if (fd_current < 0) {
> + fprintf (stderr,
> +  "Can't open %s: %s\n",
> +  DEVNAME (dev_current), strerror (errno));
> + return -1;
> + }
> +
> + if (mode == O_RDWR) {
> + rc = flash_io_write(fd_current);
>   } else {
>   rc = flash_read 

Re: [U-Boot] [PATCH] arm: socfpga: gen5: Enabling cache and TLB maintenance broadcast

[See, Chin Liang]

On Thu, 2018-03-01 at 17:17 +0100, Marek Vasut wrote:
> On 02/28/2018 06:12 AM, chin.liang@intel.com wrote:
> > 
> > From: Chin Liang See 
> > 
> > Enabling cache and TLB maintenance broadcast through ACTLR as
> > required
> > by Linux.
> This needs far more clarification. What is the problem you're fixing
> here ? How does it fix the problem ?

Sure. When the 2 processors is enabled with SMP, popen operation would
fail as content are different after the copy. This issue goes away when
we force Linux to run with 1 core only. Checked with ARM, this bit is
required by Linux when running SMP.

Chin Liang

> 
> > 
> > Signed-off-by: Chin Liang See 
> > ---
> >  arch/arm/mach-socfpga/misc_gen5.c | 11 ++-
> >  1 file changed, 10 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-
> > socfpga/misc_gen5.c
> > index a7dcacc..7c7a708 100644
> > --- a/arch/arm/mach-socfpga/misc_gen5.c
> > +++ b/arch/arm/mach-socfpga/misc_gen5.c
> > @@ -239,7 +239,7 @@ static u32 iswgrp_handoff[8];
> >  
> >  int arch_early_init_r(void)
> >  {
> > -   int i;
> > +   int i, val;
> >  
> >     /*
> >      * Write magic value into magic register to unlock support
> > for
> > @@ -285,6 +285,15 @@ int arch_early_init_r(void)
> >     socfpga_per_reset(SOCFPGA_RESET(NAND), 0);
> >  #endif
> >  
> > +   /* Enable cache and TLB maintainance broadcast as required
> > by Linux */
> > +   /* Read auxiliary control register */
> > +   asm volatile ("mrc p15, 0, %0, c1, c0, 1\n\t" :
> > "=r"(val));
> > +   val |= (1 << 0);
> > +   /* Write auxiliary control register */
> > +   asm volatile ("mcr p15, 0, %0, c1, c0, 1\n\t" : :
> > "r"(val));
> > +   CP15DSB;
> > +   CP15ISB;
> > +
> >     return 0;
> >  }
> >  
> > 
> 
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[U-Boot] [PATCH 1/2] tools: env: Refactor write path of flash_io()

[Alex Kiernan]

Extract write path of flash_io() into a separate function. This patch
should be a functional no-op.

Signed-off-by: Alex Kiernan 
---

 tools/env/fw_env.c | 98 +-
 1 file changed, 53 insertions(+), 45 deletions(-)

diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index 0e3e343..2df3504 100644
--- a/tools/env/fw_env.c
+++ b/tools/env/fw_env.c
@@ -1229,68 +1229,76 @@ static int flash_read (int fd)
return 0;
 }
 
-static int flash_io (int mode)
+static int flash_io_write (int fd_current)
 {
-   int fd_current, fd_target, rc, dev_target;
+   int fd_target, rc, dev_target;
 
-   /* dev_current: fd_current, erase_current */
-   fd_current = open (DEVNAME (dev_current), mode);
-   if (fd_current < 0) {
-   fprintf (stderr,
-"Can't open %s: %s\n",
-DEVNAME (dev_current), strerror (errno));
-   return -1;
+   if (HaveRedundEnv) {
+   /* switch to next partition for writing */
+   dev_target = !dev_current;
+   /* dev_target: fd_target, erase_target */
+   fd_target = open (DEVNAME (dev_target), O_RDWR);
+   if (fd_target < 0) {
+   fprintf (stderr,
+"Can't open %s: %s\n",
+DEVNAME (dev_target),
+strerror (errno));
+   rc = -1;
+   goto exit;
+   }
+   } else {
+   dev_target = dev_current;
+   fd_target = fd_current;
}
 
-   if (mode == O_RDWR) {
-   if (HaveRedundEnv) {
-   /* switch to next partition for writing */
-   dev_target = !dev_current;
-   /* dev_target: fd_target, erase_target */
-   fd_target = open (DEVNAME (dev_target), mode);
-   if (fd_target < 0) {
-   fprintf (stderr,
-"Can't open %s: %s\n",
-DEVNAME (dev_target),
-strerror (errno));
-   rc = -1;
-   goto exit;
-   }
-   } else {
-   dev_target = dev_current;
-   fd_target = fd_current;
-   }
+   rc = flash_write (fd_current, fd_target, dev_target);
 
-   rc = flash_write (fd_current, fd_target, dev_target);
+   if (fsync(fd_current) &&
+   !(errno == EINVAL || errno == EROFS)) {
+   fprintf (stderr,
+"fsync failed on %s: %s\n",
+DEVNAME (dev_current), strerror (errno));
+   }
 
-   if (fsync(fd_current) &&
+   if (HaveRedundEnv) {
+   if (fsync(fd_target) &&
!(errno == EINVAL || errno == EROFS)) {
fprintf (stderr,
 "fsync failed on %s: %s\n",
 DEVNAME (dev_current), strerror (errno));
}
 
-   if (HaveRedundEnv) {
-   if (fsync(fd_target) &&
-   !(errno == EINVAL || errno == EROFS)) {
-   fprintf (stderr,
-"fsync failed on %s: %s\n",
-DEVNAME (dev_current), strerror 
(errno));
-   }
-
-   if (close (fd_target)) {
-   fprintf (stderr,
-   "I/O error on %s: %s\n",
-   DEVNAME (dev_target),
-   strerror (errno));
-   rc = -1;
-   }
+   if (close (fd_target)) {
+   fprintf (stderr,
+"I/O error on %s: %s\n",
+DEVNAME (dev_target),
+strerror (errno));
+   rc = -1;
}
+   }
+exit:
+   return rc;
+}
+
+static int flash_io (int mode)
+{
+   int fd_current, rc;
+
+   /* dev_current: fd_current, erase_current */
+   fd_current = open (DEVNAME (dev_current), mode);
+   if (fd_current < 0) {
+   fprintf (stderr,
+"Can't open %s: %s\n",
+DEVNAME (dev_current), strerror (errno));
+   return -1;
+   }
+
+   if (mode == O_RDWR) {
+   rc = flash_io_write(fd_current);
} else {
rc = flash_read (fd_current);
}
 
-exit:
if (close (fd_current)) {
fprintf (stderr,
 

[U-Boot] [PATCH 2/2] tools: env: Implement atomic replace for filesystem

[Alex Kiernan]

If the U-Boot environment is stored in a regular file and redundant
operation isn't set, then write to a temporary file and perform an
atomic rename.

Signed-off-by: Alex Kiernan 
---

 tools/env/fw_env.c | 81 --
 1 file changed, 78 insertions(+), 3 deletions(-)

diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index 2df3504..b814c4e 100644
--- a/tools/env/fw_env.c
+++ b/tools/env/fw_env.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1229,9 +1230,46 @@ static int flash_read (int fd)
return 0;
 }
 
+static int flash_open_tempfile(const char **dname, const char **target_temp)
+{
+   char *dup_name = strdup(DEVNAME (dev_current));
+   char *temp_name = NULL;
+   int rc = -1;
+
+   if (!dup_name)
+   return -1;
+
+   *dname = dirname(dup_name);
+   if (!*dname)
+   goto err;
+
+   rc = asprintf(_name, "%s/uboot.tmp", *dname);
+   if (rc == -1)
+   goto err;
+
+   rc = open(temp_name, O_RDWR | O_CREAT | O_TRUNC, 0700);
+   if (rc == -1) {
+   /* fall back to in place write */
+   free(temp_name);
+   } else {
+   *target_temp = temp_name;
+   /* deliberately leak dup_name as dname /might/ point into
+* it and we need it for our caller
+*/
+   dup_name = NULL;
+   }
+
+err:
+   if (dup_name)
+   free(dup_name);
+
+   return rc;
+}
+
 static int flash_io_write (int fd_current)
 {
-   int fd_target, rc, dev_target;
+   int fd_target = -1, rc, dev_target;
+   const char *dname, *target_temp = NULL;
 
if (HaveRedundEnv) {
/* switch to next partition for writing */
@@ -1247,8 +1285,17 @@ static int flash_io_write (int fd_current)
goto exit;
}
} else {
+   struct stat sb;
+
+   if (fstat(fd_current, ) == 0 && S_ISREG(sb.st_mode)) {
+   /* if any part of flash_open_tempfile() fails we fall
+* back to in-place writes
+*/
+   fd_target = flash_open_tempfile(, _temp);
+   }
dev_target = dev_current;
-   fd_target = fd_current;
+   if (fd_target == -1)
+   fd_target = fd_current;
}
 
rc = flash_write (fd_current, fd_target, dev_target);
@@ -1260,7 +1307,7 @@ static int flash_io_write (int fd_current)
 DEVNAME (dev_current), strerror (errno));
}
 
-   if (HaveRedundEnv) {
+   if (fd_current != fd_target) {
if (fsync(fd_target) &&
!(errno == EINVAL || errno == EROFS)) {
fprintf (stderr,
@@ -1275,6 +1322,34 @@ static int flash_io_write (int fd_current)
 strerror (errno));
rc = -1;
}
+
+   if (target_temp) {
+   int dir_fd;
+
+   dir_fd = open(dname, O_DIRECTORY | O_RDONLY);
+   if (dir_fd == -1)
+   fprintf (stderr,
+"Can't open %s: %s\n",
+dname, strerror (errno));
+
+   if (rename(target_temp, DEVNAME(dev_target))) {
+   fprintf (stderr,
+"rename failed %s => %s: %s\n",
+target_temp, DEVNAME(dev_target),
+strerror (errno));
+   rc = -1;
+   }
+
+   if (dir_fd != -1 && fsync(dir_fd))
+   fprintf (stderr,
+"fsync failed on %s: %s\n",
+dname, strerror (errno));
+
+   if (dir_fd != -1 && close(dir_fd))
+   fprintf (stderr,
+"I/O error on %s: %s\n",
+dname, strerror (errno));
+   }
}
 exit:
return rc;
-- 
2.7.4

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[U-Boot] [PATCH 0/2] Add atomic write to fw_setenv for environments on filesystems

[Alex Kiernan]

For environments stored on filesystems where you can't have a redundant
configuration, rather than just over-writing the existing environment
in fw_setenv, do the tradtional create temporary file, rename, sync,
sync directory dance to achieve ACID semantics when writing through
fw_setenv.

Note that this series triggers large numbers of checkpatch warnings because
of the existing code style:

  warning: space prohibited between function name and open parenthesis '('
  check: Avoid CamelCase: 


Alex Kiernan (2):
  tools: env: Refactor write path of flash_io()
  tools: env: Implement atomic replace for filesystem

 tools/env/fw_env.c | 159 -
 1 file changed, 121 insertions(+), 38 deletions(-)

-- 
2.7.4

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[U-Boot] [PATCH] tools/mkimage: Use proper output parameter in dtc-system call

[Stefan Theil]

The system call used by mkimage to run dtc redirects stdout to a
temporary file. This can cause problems on Windows (with a MinGW
cross-compiled version). Using the "-o" dtc parameter avoids
this problem.

Signed-off-by: Stefan Theil 
---
 tools/fit_image.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/fit_image.c b/tools/fit_image.c
index 1db44f4..3f5cc20 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -650,9 +650,9 @@ static int fit_handle_file(struct image_tool_params *params)
}
*cmd = '\0';
} else if (params->datafile) {
-   /* dtc -I dts -O dtb -p 500 datafile > tmpfile */
-   snprintf(cmd, sizeof(cmd), "%s %s \"%s\" > \"%s\"",
-MKIMAGE_DTC, params->dtc, params->datafile, tmpfile);
+   /* dtc -I dts -O dtb -p 500 -o tmpfile datafile */
+   snprintf(cmd, sizeof(cmd), "%s %s -o \"%s\" \"%s\"",
+MKIMAGE_DTC, params->dtc, tmpfile, params->datafile);
debug("Trying to execute \"%s\"\n", cmd);
} else {
snprintf(cmd, sizeof(cmd), "cp \"%s\" \"%s\"",
-- 
2.7.4

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Re: [U-Boot] [PATCH] dm: mmc: socfpga: call dwmci_probe()

[Patrick Brünn]

>From: Jaehoon Chung [mailto:jh80.ch...@samsung.com]
>Sent: Donnerstag, 8. März 2018 04:57
>On 03/08/2018 12:12 PM, Marek Vasut wrote:
>> On 03/08/2018 03:17 AM, Jaehoon Chung wrote:
>>> On 03/06/2018 05:07 PM, linux-kernel-...@beckhoff.com wrote:
 From: Patrick Bruenn 

 On a socfpga_cyclone5 based board the SD card, was never powered up.
>For
 other dw_mmc based SoCs dwmci_probe() is called in the platform
>specific
 probe(). It seems this call is missing for socfpga_dw_mmc.

 With this change DWMCI_PWREN is set by dmwci_init().

 Signed-off-by: Patrick Bruenn 
>>>
>>> Reviewed-by: Jaehoon Chung 
>>>
>>> Will apply this patch before releasing v2018.03.
>>> (I have a problem about accessing git.denx.de. After fixing my problem,
>will resend email about applying.)
>>
>> DWMMC works on SoCFPGA for me (tested on rc4), so I don't understand
>what this patch is trying to fix. I'd prefer if you did not hastily apply this.
>
>It's my misunderstanding. When i checked more. I think that Marek is right.
>Thanks Marek for pointing out.
>
Okay, but do you have any hint what I am doing wrong? My board (cx8100 not 
mainline, yet) is based on socfpga_cyclone5. And on my board " 
dwmci_writel(host, DWMCI_PWREN, 1);" is never called, because dwmci_init() is 
never called.
As far as I can see with CONFIG_DM_MMC enabled dwmci_init() should be called by 
dwmci_probe().

exynos  and rockchip do call dwmci_probe() within exynos/rockchip_dwmmc_probe().
but socfpga_dwmmc_probe() is missing this call. So I looked deeper but found no 
place for socfpga platform to call dwmci_probe() or dwmci_init().
What am I missing?

Maybe this diff helps:
u-boot$ diff configs/socfpga_cx8100_defconfig configs/socfpga_cyclone5_defconfig
2d1
< CONFIG_API=y
6c5
< CONFIG_TARGET_SOCFPGA_CX8100=y
---
> CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
8c7,8
< CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_cx8100"
---
> CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
> CONFIG_DISTRO_DEFAULTS=y
9a10
> # CONFIG_USE_BOOTCOMMAND is not set
13c14
< CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_cx8100.dtb"
---
> CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_socdk.dtb"
16d16
< CONFIG_BOARD_EARLY_INIT_F=y
20,21d19
< CONFIG_HUSH_PARSER=y
< CONFIG_CMD_BOOTZ=y
29d26
< CONFIG_CMD_PART=y
34,37d30
< CONFIG_CMD_DHCP=y
< CONFIG_CMD_PXE=y
< CONFIG_CMD_MII=y
< CONFIG_CMD_PING=y
39d31
< CONFIG_CMD_EXT4=y
41,42d32
< CONFIG_CMD_FAT=y
< CONFIG_CMD_FS_GENERIC=y
54,56d43
< CONFIG_CMD_LED=y
< CONFIG_LED=y
< CONFIG_LED_GPIO=y
60a48
> CONFIG_SPI_FLASH_MACRONIX=y

Thanks for your time and patience,
Patrick

Beckhoff Automation GmbH & Co. KG | Managing Director: Dipl. Phys. Hans Beckhoff
Registered office: Verl, Germany | Register court: Guetersloh HRA 7075


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Re: [U-Boot] [PATCH v2 2/2] bcm283x_pl011: Flush RX queue after setting baud rate

[Peter Robinson]

On Wed, Mar 7, 2018 at 9:08 PM, Alexander Graf  wrote:
> After the UART was initialized, we may still have bogus data in the
> RX queue if it was enabled with incorrect pin muxing before.
>
> So let's flush the RX queue whenever we initialize baud rates.
>
> This fixes a regression with the dynamic pinmuxing code when enable_uart=1
> is not set in config.txt on Raspberry Pis that use pl011 for serial.
>
> Fixes: caf2233b28 ("bcm283x: Add pinctrl driver")
> Reported-by: Göran Lundberg 
> Reported-by: Peter Robinson 
> Signed-off-by: Alexander Graf 
Tested-by: Peter Robinson 

Tested on RPi2 and works a lot better, I can boot, interact with the
console etc :-)


> ---
>
> v1 -> v2:
>
>   - correctly drain the queue
> ---
>  drivers/serial/serial_bcm283x_pl011.c  | 25 -
>  drivers/serial/serial_pl01x.c  | 10 +-
>  drivers/serial/serial_pl01x_internal.h |  7 ++-
>  3 files changed, 35 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/serial/serial_bcm283x_pl011.c 
> b/drivers/serial/serial_bcm283x_pl011.c
> index bfd39f84f3..dad7236895 100644
> --- a/drivers/serial/serial_bcm283x_pl011.c
> +++ b/drivers/serial/serial_bcm283x_pl011.c
> @@ -9,6 +9,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include "serial_pl01x_internal.h"
>
>  /*
> @@ -55,6 +56,28 @@ static int bcm283x_pl011_serial_ofdata_to_platdata(struct 
> udevice *dev)
> return 0;
>  }
>
> +static int bcm283x_pl011_serial_setbrg(struct udevice *dev, int baudrate)
> +{
> +   int r;
> +
> +   r = pl01x_serial_setbrg(dev, baudrate);
> +
> +   /*
> +* We may have been muxed to a bogus line before. Drain the RX
> +* queue so we start at a clean slate.
> +*/
> +   while (pl01x_serial_getc(dev) != -EAGAIN) ;
> +
> +   return r;
> +}
> +
> +static const struct dm_serial_ops bcm283x_pl011_serial_ops = {
> +   .putc = pl01x_serial_putc,
> +   .pending = pl01x_serial_pending,
> +   .getc = pl01x_serial_getc,
> +   .setbrg = bcm283x_pl011_serial_setbrg,
> +};
> +
>  static const struct udevice_id bcm283x_pl011_serial_id[] = {
> {.compatible = "brcm,bcm2835-pl011", .data = TYPE_PL011},
> {}
> @@ -67,7 +90,7 @@ U_BOOT_DRIVER(bcm283x_pl011_uart) = {
> .ofdata_to_platdata = 
> of_match_ptr(bcm283x_pl011_serial_ofdata_to_platdata),
> .platdata_auto_alloc_size = sizeof(struct pl01x_serial_platdata),
> .probe  = pl01x_serial_probe,
> -   .ops= _serial_ops,
> +   .ops= _pl011_serial_ops,
> .flags  = DM_FLAG_PRE_RELOC,
> .priv_auto_alloc_size = sizeof(struct pl01x_priv),
>  };
> diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
> index 23d9d839cb..45f1282770 100644
> --- a/drivers/serial/serial_pl01x.c
> +++ b/drivers/serial/serial_pl01x.c
> @@ -273,7 +273,7 @@ __weak struct serial_device *default_serial_console(void)
>
>  #ifdef CONFIG_DM_SERIAL
>
> -static int pl01x_serial_setbrg(struct udevice *dev, int baudrate)
> +int pl01x_serial_setbrg(struct udevice *dev, int baudrate)
>  {
> struct pl01x_serial_platdata *plat = dev_get_platdata(dev);
> struct pl01x_priv *priv = dev_get_priv(dev);
> @@ -299,21 +299,21 @@ int pl01x_serial_probe(struct udevice *dev)
> return 0;
>  }
>
> -static int pl01x_serial_getc(struct udevice *dev)
> +int pl01x_serial_getc(struct udevice *dev)
>  {
> struct pl01x_priv *priv = dev_get_priv(dev);
>
> return pl01x_getc(priv->regs);
>  }
>
> -static int pl01x_serial_putc(struct udevice *dev, const char ch)
> +int pl01x_serial_putc(struct udevice *dev, const char ch)
>  {
> struct pl01x_priv *priv = dev_get_priv(dev);
>
> return pl01x_putc(priv->regs, ch);
>  }
>
> -static int pl01x_serial_pending(struct udevice *dev, bool input)
> +int pl01x_serial_pending(struct udevice *dev, bool input)
>  {
> struct pl01x_priv *priv = dev_get_priv(dev);
> unsigned int fr = readl(>regs->fr);
> @@ -324,7 +324,7 @@ static int pl01x_serial_pending(struct udevice *dev, bool 
> input)
> return fr & UART_PL01x_FR_TXFF ? 0 : 1;
>  }
>
> -const struct dm_serial_ops pl01x_serial_ops = {
> +static const struct dm_serial_ops pl01x_serial_ops = {
> .putc = pl01x_serial_putc,
> .pending = pl01x_serial_pending,
> .getc = pl01x_serial_getc,
> diff --git a/drivers/serial/serial_pl01x_internal.h 
> b/drivers/serial/serial_pl01x_internal.h
> index c56dd54c7b..d4605f24a3 100644
> --- a/drivers/serial/serial_pl01x_internal.h
> +++ b/drivers/serial/serial_pl01x_internal.h
> @@ -43,7 +43,12 @@ struct pl01x_regs {
>
>  int pl01x_serial_ofdata_to_platdata(struct udevice *dev);
>  int pl01x_serial_probe(struct udevice *dev);
> -extern const struct dm_serial_ops pl01x_serial_ops;
> +
> +/* Needed for external pl01x_serial_ops drivers */
> +int 

Re: [U-Boot] [PATCH v2 1/2] serial_bcm283x_mu: Flush RX queue after setting baud rate

[Peter Robinson]

On Wed, Mar 7, 2018 at 9:08 PM, Alexander Graf  wrote:
> After the UART was initialized, we may still have bogus data in the
> RX queue if it was enabled with incorrect pin muxing before.
>
> So let's flush the RX queue whenever we initialize baud rates.
>
> This fixes a regression with the dynamic pinmuxing code when enable_uart=1
> is not set in config.txt.
>
> Fixes: caf2233b28 ("bcm283x: Add pinctrl driver")
> Reported-by: Göran Lundberg 
> Reported-by: Peter Robinson 
> Signed-off-by: Alexander Graf 

Tested-by: Peter Robinson 

> ---
>  drivers/serial/serial_bcm283x_mu.c | 8 +++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/serial/serial_bcm283x_mu.c 
> b/drivers/serial/serial_bcm283x_mu.c
> index 40029fadbc..d87b44e902 100644
> --- a/drivers/serial/serial_bcm283x_mu.c
> +++ b/drivers/serial/serial_bcm283x_mu.c
> @@ -51,6 +51,8 @@ struct bcm283x_mu_priv {
> struct bcm283x_mu_regs *regs;
>  };
>
> +static int bcm283x_mu_serial_getc(struct udevice *dev);
> +
>  static int bcm283x_mu_serial_setbrg(struct udevice *dev, int baudrate)
>  {
> struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
> @@ -59,13 +61,17 @@ static int bcm283x_mu_serial_setbrg(struct udevice *dev, 
> int baudrate)
> u32 divider;
>
> if (plat->skip_init)
> -   return 0;
> +   goto out;
>
> divider = plat->clock / (baudrate * 8);
>
> writel(BCM283X_MU_LCR_DATA_SIZE_8, >lcr);
> writel(divider - 1, >baud);
>
> +out:
> +   /* Flush the RX queue - all data in there is bogus */
> +   while (bcm283x_mu_serial_getc(dev) != -EAGAIN) ;
> +
> return 0;
>  }
>
> --
> 2.12.3
>
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[U-Boot] [PATCH v4 10/13] armv8: fsl-lsch2: add pfe macros and update ccsr_scfg structure

[Calvin Johnson]

SoC specific PFE macros are defined and structure ccsr_scfg
is updated with members defined for PFE.

Signed-off-by: Calvin Johnson 
Signed-off-by: Anjaneyulu Jagarlmudi 
Acked-by: Joe Hershberger 

---

Changes in v4: None
Changes in v3:
-Use BIT macro wherever applicable

Changes in v2: None

 .../include/asm/arch-fsl-layerscape/immap_lsch2.h  | 38 --
 1 file changed, 36 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index b195005..d6f0c5b 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -395,6 +395,21 @@ struct ccsr_gur {
 #define SCFG_SNPCNFGCR_SATARDSNP   0x0080
 #define SCFG_SNPCNFGCR_SATAWRSNP   0x0040
 
+/* RGMIIPCR bit definitions*/
+#define SCFG_RGMIIPCR_EN_AUTO  BIT(3)
+#define SCFG_RGMIIPCR_SETSP_1000M  BIT(2)
+#define SCFG_RGMIIPCR_SETSP_100M   0
+#define SCFG_RGMIIPCR_SETSP_10MBIT(1)
+#define SCFG_RGMIIPCR_SETFDBIT(0)
+
+/* PFEASBCR bit definitions */
+#define SCFG_PFEASBCR_ARCACHE0 BIT(31)
+#define SCFG_PFEASBCR_AWCACHE0 BIT(30)
+#define SCFG_PFEASBCR_ARCACHE1 BIT(29)
+#define SCFG_PFEASBCR_AWCACHE1 BIT(28)
+#define SCFG_PFEASBCR_ARSNPBIT(27)
+#define SCFG_PFEASBCR_AWSNPBIT(26)
+
 /* Supplemental Configuration Unit */
 struct ccsr_scfg {
u8 res_000[0x100-0x000];
@@ -412,7 +427,12 @@ struct ccsr_scfg {
u8 res_140[0x158-0x140];
u32 altcbar;
u32 qspi_cfg;
-   u8 res_160[0x180-0x160];
+   u8 res_160[0x164 - 0x160];
+   u32 wr_qos1;
+   u32 wr_qos2;
+   u32 rd_qos1;
+   u32 rd_qos2;
+   u8 res_174[0x180 - 0x174];
u32 dmamcr;
u8 res_184[0x188-0x184];
u32 gic_align;
@@ -443,7 +463,21 @@ struct ccsr_scfg {
u32 usb_refclk_selcr1;
u32 usb_refclk_selcr2;
u32 usb_refclk_selcr3;
-   u8 res_424[0x600-0x424];
+   u8 res_424[0x434 - 0x424];
+   u32 rgmiipcr;
+   u32 res_438;
+   u32 rgmiipsr;
+   u32 pfepfcssr1;
+   u32 pfeintencr1;
+   u32 pfepfcssr2;
+   u32 pfeintencr2;
+   u32 pfeerrcr;
+   u32 pfeeerrintencr;
+   u32 pfeasbcr;
+   u32 pfebsbcr;
+   u8 res_460[0x484 - 0x460];
+   u32 mdioselcr;
+   u8 res_468[0x600 - 0x488];
u32 scratchrw[4];
u8 res_610[0x680-0x610];
u32 corebcr;
-- 
2.7.4

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[U-Boot] [PATCH v4 09/13] board: freescale: ls1012a2g5rdb: enable network support on ls1012a2g5rdb

[Calvin Johnson]

This patch enables ethernet support for ls1012a2g5rdb.

Signed-off-by: Calvin Johnson 
Signed-off-by: Bhaskar Upadhaya 
Acked-by: Joe Hershberger 

---

Changes in v4: None
Changes in v3:
-Update Kconfig
-Update header file location to include/net/pfe_eth
-Prefix CONFIG_PFE_ to appropriate macros
-Indent properly

Changes in v2:
-New patch added to series to enable ethernet support for
ls1012a2g5rdb

 board/freescale/ls1012ardb/Kconfig | 30 +
 board/freescale/ls1012ardb/eth.c   | 45 +++---
 2 files changed, 67 insertions(+), 8 deletions(-)

diff --git a/board/freescale/ls1012ardb/Kconfig 
b/board/freescale/ls1012ardb/Kconfig
index af35a01..493d477 100644
--- a/board/freescale/ls1012ardb/Kconfig
+++ b/board/freescale/ls1012ardb/Kconfig
@@ -59,6 +59,36 @@ config SYS_SOC
 config SYS_CONFIG_NAME
 default "ls1012a2g5rdb"
 
+if FSL_PFE
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+   def_bool y
+   select PHYLIB
+   imply CONFIG_PHYLIB_10G
+   imply CONFIG_PHY_AQUANTIA
+
+config SYS_LS_PFE_FW_ADDR
+   hex "Flash address of PFE firmware"
+   default 0x40a0
+
+config DDR_PFE_PHYS_BASEADDR
+   hex "PFE DDR physical base address"
+   default 0x0380
+
+config DDR_PFE_BASEADDR
+   hex "PFE DDR base address"
+   default 0x8380
+
+config PFE_EMAC1_PHY_ADDR
+   hex "PFE DDR base address"
+   default 0x2
+
+config PFE_EMAC2_PHY_ADDR
+   hex "PFE DDR base address"
+   default 0x1
+
+endif
+
 source "board/freescale/common/Kconfig"
 
 endif
diff --git a/board/freescale/ls1012ardb/eth.c b/board/freescale/ls1012ardb/eth.c
index e6379a3..8e6cd0a 100644
--- a/board/freescale/ls1012ardb/eth.c
+++ b/board/freescale/ls1012ardb/eth.c
@@ -26,6 +26,7 @@
 
 static inline void ls1012ardb_reset_phy(void)
 {
+#ifdef CONFIG_TARGET_LS1012ARDB
/* Through reset IO expander reset both RGMII and SGMII PHYs */
i2c_reg_write(I2C_MUX_IO2_ADDR, 6, __PHY_MASK);
i2c_reg_write(I2C_MUX_IO2_ADDR, 2, __PHY_ETH2_MASK);
@@ -34,6 +35,7 @@ static inline void ls1012ardb_reset_phy(void)
mdelay(10);
i2c_reg_write(I2C_MUX_IO2_ADDR, 2, 0xFF);
mdelay(50);
+#endif
 }
 
 int pfe_eth_board_init(struct udevice *dev)
@@ -42,6 +44,11 @@ int pfe_eth_board_init(struct udevice *dev)
struct mii_dev *bus;
struct pfe_mdio_info mac_mdio_info;
struct pfe_eth_dev *priv = dev_get_priv(dev);
+   struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
+
+   int srds_s1 = in_be32(>rcwsr[4]) &
+   FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK;
+   srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT;
 
if (!init_done) {
ls1012ardb_reset_phy();
@@ -59,14 +66,36 @@ int pfe_eth_board_init(struct udevice *dev)
pfe_set_mdio(priv->gemac_port,
 miiphy_get_dev_by_name(DEFAULT_PFE_MDIO_NAME));
 
-   if (!priv->gemac_port) {
-   /* MAC1 */
-   pfe_set_phy_address_mode(priv->gemac_port, EMAC1_PHY_ADDR,
-PHY_INTERFACE_MODE_SGMII);
-   } else {
-   /* MAC2 */
-   pfe_set_phy_address_mode(priv->gemac_port, EMAC2_PHY_ADDR,
-PHY_INTERFACE_MODE_RGMII_TXID);
+   switch (srds_s1) {
+   case 0x3508:
+   if (!priv->gemac_port) {
+   /* MAC1 */
+   pfe_set_phy_address_mode(priv->gemac_port,
+CONFIG_PFE_EMAC1_PHY_ADDR,
+PHY_INTERFACE_MODE_SGMII);
+   } else {
+   /* MAC2 */
+   pfe_set_phy_address_mode(priv->gemac_port,
+CONFIG_PFE_EMAC2_PHY_ADDR,
+PHY_INTERFACE_MODE_RGMII_TXID);
+   }
+   break;
+   case 0x2208:
+   if (!priv->gemac_port) {
+   /* MAC1 */
+   pfe_set_phy_address_mode(priv->gemac_port,
+CONFIG_PFE_EMAC1_PHY_ADDR,
+PHY_INTERFACE_MODE_SGMII_2500);
+   } else {
+   /* MAC2 */
+   pfe_set_phy_address_mode(priv->gemac_port,
+CONFIG_PFE_EMAC2_PHY_ADDR,
+PHY_INTERFACE_MODE_SGMII_2500);
+   }
+   break;
+   default:
+   printf("unsupported SerDes PRCTL= %d\n", srds_s1);
+   break;
}
return 0;
 }
-- 
2.7.4

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[U-Boot] [PATCH v4 08/13] board: freescale: ls1012ardb: enable network support on ls1012ardb

[Calvin Johnson]

This patch enables ethernet support for ls1012ardb.

Signed-off-by: Calvin Johnson 
Signed-off-by: Anjaneyulu Jagarlmudi 
Acked-by: Joe Hershberger 

---

Changes in v4:
-Compile pfe driver conditionally with CONFIG_FSL_PFE

Changes in v3:
-Update Kconfig
-Update header file location to include/net/pfe_eth

Changes in v2:
-split from original patch "board: freescale: ls1012a: enable network
support on ls1012a platforms"

 board/freescale/ls1012ardb/Kconfig  |  29 +
 board/freescale/ls1012ardb/Makefile |   1 +
 board/freescale/ls1012ardb/eth.c| 106 
 board/freescale/ls1012ardb/ls1012ardb.c |   4 --
 include/configs/ls1012ardb.h|   4 ++
 5 files changed, 140 insertions(+), 4 deletions(-)
 create mode 100644 board/freescale/ls1012ardb/eth.c

diff --git a/board/freescale/ls1012ardb/Kconfig 
b/board/freescale/ls1012ardb/Kconfig
index d13b08e..af35a01 100644
--- a/board/freescale/ls1012ardb/Kconfig
+++ b/board/freescale/ls1012ardb/Kconfig
@@ -12,6 +12,35 @@ config SYS_SOC
 config SYS_CONFIG_NAME
default "ls1012ardb"
 
+if FSL_PFE
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+   def_bool y
+   select PHYLIB
+   imply PHY_REALTEK
+
+config SYS_LS_PFE_FW_ADDR
+   hex "Flash address of PFE firmware"
+   default 0x40a0
+
+config DDR_PFE_PHYS_BASEADDR
+   hex "PFE DDR physical base address"
+   default 0x0380
+
+config DDR_PFE_BASEADDR
+   hex "PFE DDR base address"
+   default 0x8380
+
+config PFE_EMAC1_PHY_ADDR
+   hex "PFE DDR base address"
+   default 0x2
+
+config PFE_EMAC2_PHY_ADDR
+   hex "PFE DDR base address"
+   default 0x1
+
+endif
+
 source "board/freescale/common/Kconfig"
 
 endif
diff --git a/board/freescale/ls1012ardb/Makefile 
b/board/freescale/ls1012ardb/Makefile
index 05fa9d9..70c7b33 100644
--- a/board/freescale/ls1012ardb/Makefile
+++ b/board/freescale/ls1012ardb/Makefile
@@ -5,3 +5,4 @@
 #
 
 obj-y += ls1012ardb.o
+obj-$(CONFIG_FSL_PFE) += eth.o
diff --git a/board/freescale/ls1012ardb/eth.c b/board/freescale/ls1012ardb/eth.c
new file mode 100644
index 000..e6379a3
--- /dev/null
+++ b/board/freescale/ls1012ardb/eth.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DEFAULT_PFE_MDIO_NAME "PFE_MDIO"
+
+static inline void ls1012ardb_reset_phy(void)
+{
+   /* Through reset IO expander reset both RGMII and SGMII PHYs */
+   i2c_reg_write(I2C_MUX_IO2_ADDR, 6, __PHY_MASK);
+   i2c_reg_write(I2C_MUX_IO2_ADDR, 2, __PHY_ETH2_MASK);
+   mdelay(10);
+   i2c_reg_write(I2C_MUX_IO2_ADDR, 2, __PHY_ETH1_MASK);
+   mdelay(10);
+   i2c_reg_write(I2C_MUX_IO2_ADDR, 2, 0xFF);
+   mdelay(50);
+}
+
+int pfe_eth_board_init(struct udevice *dev)
+{
+   static int init_done;
+   struct mii_dev *bus;
+   struct pfe_mdio_info mac_mdio_info;
+   struct pfe_eth_dev *priv = dev_get_priv(dev);
+
+   if (!init_done) {
+   ls1012ardb_reset_phy();
+   mac_mdio_info.reg_base = (void *)EMAC1_BASE_ADDR;
+   mac_mdio_info.name = DEFAULT_PFE_MDIO_NAME;
+
+   bus = pfe_mdio_init(_mdio_info);
+   if (!bus) {
+   printf("Failed to register mdio\n");
+   return -1;
+   }
+   init_done = 1;
+   }
+
+   pfe_set_mdio(priv->gemac_port,
+miiphy_get_dev_by_name(DEFAULT_PFE_MDIO_NAME));
+
+   if (!priv->gemac_port) {
+   /* MAC1 */
+   pfe_set_phy_address_mode(priv->gemac_port, EMAC1_PHY_ADDR,
+PHY_INTERFACE_MODE_SGMII);
+   } else {
+   /* MAC2 */
+   pfe_set_phy_address_mode(priv->gemac_port, EMAC2_PHY_ADDR,
+PHY_INTERFACE_MODE_RGMII_TXID);
+   }
+   return 0;
+}
+
+static struct pfe_eth_pdata pfe_pdata0 = {
+   .pfe_eth_pdata_mac = {
+   .iobase = (phys_addr_t)EMAC1_BASE_ADDR,
+   .phy_interface = 0,
+   },
+
+   .pfe_ddr_addr = {
+   .ddr_pfe_baseaddr = (void *)CONFIG_DDR_PFE_BASEADDR,
+   .ddr_pfe_phys_baseaddr = CONFIG_DDR_PFE_PHYS_BASEADDR,
+   },
+};
+
+static struct pfe_eth_pdata pfe_pdata1 = {
+   .pfe_eth_pdata_mac = {
+   .iobase = (phys_addr_t)EMAC2_BASE_ADDR,
+   .phy_interface = 1,
+   },
+
+   .pfe_ddr_addr = {
+   .ddr_pfe_baseaddr = (void *)CONFIG_DDR_PFE_BASEADDR,
+   .ddr_pfe_phys_baseaddr = CONFIG_DDR_PFE_PHYS_BASEADDR,
+   },
+};
+
+U_BOOT_DEVICE(ls1012a_pfe0) = {
+   

[U-Boot] [PATCH v4 12/13] armv8: layerscape: csu: enable ns access to PFE registers

[Calvin Johnson]

Enable all types of non-secure access to PFE block registers.

Signed-off-by: Calvin Johnson 
Signed-off-by: Anjaneyulu Jagarlmudi 
Acked-by: Joe Hershberger 

---

Changes in v4: None
Changes in v3: None
Changes in v2:
-Improved commit message to provide more description

 arch/arm/include/asm/arch-fsl-layerscape/ns_access.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h 
b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
index f46f1d8..fe97a93 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
@@ -26,6 +26,7 @@ enum csu_cslx_ind {
CSU_CSLX_PCIE3_IO,
CSU_CSLX_USB3 = 20,
CSU_CSLX_USB2,
+   CSU_CSLX_PFE = 23,
CSU_CSLX_SERDES = 32,
CSU_CSLX_QDMA,
CSU_CSLX_LPUART2,
@@ -105,6 +106,7 @@ static struct csu_ns_dev ns_dev[] = {
 {CSU_CSLX_PCIE3_IO, CSU_ALL_RW},
 {CSU_CSLX_USB3, CSU_ALL_RW},
 {CSU_CSLX_USB2, CSU_ALL_RW},
+{CSU_CSLX_PFE, CSU_ALL_RW},
 {CSU_CSLX_SERDES, CSU_ALL_RW},
 {CSU_CSLX_QDMA, CSU_ALL_RW},
 {CSU_CSLX_LPUART2, CSU_ALL_RW},
-- 
2.7.4

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[U-Boot] [PATCH v4 13/13] configs: ls1012a: add pfe configuration for LS1012A

[Calvin Johnson]

Add configurations for PFE.

Signed-off-by: Calvin Johnson 
Signed-off-by: Anjaneyulu Jagarlmudi 
Acked-by: Joe Hershberger 
---

Changes in v4:
-Fix typo "ppfe stop"

Changes in v3:
-Move PFE macros to Kconfig
-Remove unused UTIL_PE_DISABLED config

Changes in v2:
-Moved SYS_LS_PFE_FW_ADDR from pfe Kconfig to board Kconfigs
-Add "pfe stop" to ls1012a rdb, frdm and 2g5rdb config files

 configs/ls1012a2g5rdb_qspi_defconfig |  2 ++
 configs/ls1012afrdm_qspi_defconfig   |  2 ++
 configs/ls1012aqds_qspi_defconfig|  2 ++
 configs/ls1012ardb_qspi_defconfig|  2 ++
 drivers/net/Kconfig  |  1 +
 drivers/net/Makefile |  1 +
 drivers/net/pfe_eth/Kconfig  | 12 
 drivers/net/pfe_eth/Makefile | 12 
 include/configs/ls1012a2g5rdb.h  | 11 +--
 include/configs/ls1012a_common.h |  6 +++---
 include/configs/ls1012afrdm.h|  2 +-
 include/configs/ls1012ardb.h |  2 +-
 12 files changed, 40 insertions(+), 15 deletions(-)
 create mode 100644 drivers/net/pfe_eth/Kconfig
 create mode 100644 drivers/net/pfe_eth/Makefile

diff --git a/configs/ls1012a2g5rdb_qspi_defconfig 
b/configs/ls1012a2g5rdb_qspi_defconfig
index 26dcb1a..af676e2 100644
--- a/configs/ls1012a2g5rdb_qspi_defconfig
+++ b/configs/ls1012a2g5rdb_qspi_defconfig
@@ -31,7 +31,9 @@ CONFIG_DM=y
 CONFIG_DM_MMC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_DM_ETH=y
 CONFIG_NETDEVICES=y
+CONFIG_FSL_PFE=y
 CONFIG_SYS_NS16550=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
diff --git a/configs/ls1012afrdm_qspi_defconfig 
b/configs/ls1012afrdm_qspi_defconfig
index 1164361..c02e520 100644
--- a/configs/ls1012afrdm_qspi_defconfig
+++ b/configs/ls1012afrdm_qspi_defconfig
@@ -29,8 +29,10 @@ CONFIG_DM=y
 # CONFIG_MMC is not set
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_DM_ETH=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
+CONFIG_FSL_PFE=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1012aqds_qspi_defconfig 
b/configs/ls1012aqds_qspi_defconfig
index 9fdf333..25470cb 100644
--- a/configs/ls1012aqds_qspi_defconfig
+++ b/configs/ls1012aqds_qspi_defconfig
@@ -36,8 +36,10 @@ CONFIG_SCSI_AHCI=y
 CONFIG_DM_MMC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_DM_ETH=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
+CONFIG_FSL_PFE=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1012ardb_qspi_defconfig 
b/configs/ls1012ardb_qspi_defconfig
index 4347263..1f62953 100644
--- a/configs/ls1012ardb_qspi_defconfig
+++ b/configs/ls1012ardb_qspi_defconfig
@@ -32,8 +32,10 @@ CONFIG_DM=y
 CONFIG_DM_MMC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_DM_ETH=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
+CONFIG_FSL_PFE=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index de1947c..f589978 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1,4 +1,5 @@
 source "drivers/net/phy/Kconfig"
+source "drivers/net/pfe_eth/Kconfig"
 
 config DM_ETH
bool "Enable Driver Model for Ethernet drivers"
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 4a16c62..95cb7bb 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -73,3 +73,4 @@ obj-$(CONFIG_FSL_MEMAC) += fm/memac_phy.o
 obj-$(CONFIG_VSC9953) += vsc9953.o
 obj-$(CONFIG_PIC32_ETH) += pic32_mdio.o pic32_eth.o
 obj-$(CONFIG_DWC_ETH_QOS) += dwc_eth_qos.o
+obj-$(CONFIG_FSL_PFE) += pfe_eth/
diff --git a/drivers/net/pfe_eth/Kconfig b/drivers/net/pfe_eth/Kconfig
new file mode 100644
index 000..a13b331
--- /dev/null
+++ b/drivers/net/pfe_eth/Kconfig
@@ -0,0 +1,12 @@
+menuconfig FSL_PFE
+   bool "NXP PFE Ethernet driver"
+   help
+ This driver provides support for NXP's Packet Forwarding Engine.
+
+if FSL_PFE
+
+config SYS_FSL_PFE_ADDR
+   hex "PFE base address"
+   default 0x0400
+
+endif
diff --git a/drivers/net/pfe_eth/Makefile b/drivers/net/pfe_eth/Makefile
new file mode 100644
index 000..6b5248f
--- /dev/null
+++ b/drivers/net/pfe_eth/Makefile
@@ -0,0 +1,12 @@
+# Copyright 2015-2016 Freescale Semiconductor, Inc.
+# Copyright 2017 NXP
+#
+# SPDX-License-Identifier:GPL-2.0+
+
+# Layerscape PFE driver
+obj-y += pfe_cmd.o \
+pfe_driver.o   \
+pfe_eth.o  \
+pfe_firmware.o \
+pfe_hw.o   \
+pfe_mdio.o
diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h
index 25df103..dbb0fcc 100644
--- a/include/configs/ls1012a2g5rdb.h
+++ b/include/configs/ls1012a2g5rdb.h
@@ -9,15 +9,6 @@
 
 #include "ls1012a_common.h"
 
-/* PFE Ethernet */
-#ifdef CONFIG_FSL_PFE
-#define EMAC1_PHY_ADDR  0x2
-#define EMAC2_PHY_ADDR  0x1
-#define CONFIG_PHYLIB
-#define CONFIG_PHYLIB_10G
-#define CONFIG_PHY_AQUANTIA
-#endif
-
 /* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR 1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   1
@@ -110,7 +101,7 @@
 
 #undef 

[U-Boot] [PATCH v4 11/13] armv8: fsl-lsch2: configure pfe's DDR and HDBUS interfaces and ECC

[Calvin Johnson]

1. Set AWCACHE0 attribute of PFE DDR and HDBUS master interfaces
to bufferable.
2. Set RD/WR QoS for PFE DDR and HDBUS AXI master interfaces.
3. Disable ECC detection for PFE.

Signed-off-by: Calvin Johnson 
Signed-off-by: Anjaneyulu Jagarlmudi 
Acked-by: Joe Hershberger 

---

Changes in v4: None
Changes in v3:
-Cosmetic change

Changes in v2:
-Improved commit message to provide more description
-Replaced magic numbers with proper definitions

 arch/arm/cpu/armv8/fsl-layerscape/soc.c| 23 ++
 .../include/asm/arch-fsl-layerscape/immap_lsch2.h  | 10 ++
 arch/arm/include/asm/arch-fsl-layerscape/soc.h |  3 +++
 3 files changed, 36 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index b9f837d..18fb937 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -612,6 +612,29 @@ int setup_chip_volt(void)
return 0;
 }
 
+#ifdef CONFIG_FSL_PFE
+void init_pfe_scfg_dcfg_regs(void)
+{
+   struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
+   u32 ecccr2;
+
+   out_be32(>pfeasbcr,
+in_be32(>pfeasbcr) | SCFG_PFEASBCR_AWCACHE0);
+   out_be32(>pfebsbcr,
+in_be32(>pfebsbcr) | SCFG_PFEASBCR_AWCACHE0);
+
+   /* CCI-400 QoS settings for PFE */
+   out_be32(>wr_qos1, (unsigned int)(SCFG_WR_QOS1_PFE1_QOS
+| SCFG_WR_QOS1_PFE2_QOS));
+   out_be32(>rd_qos1, (unsigned int)(SCFG_RD_QOS1_PFE1_QOS
+| SCFG_RD_QOS1_PFE2_QOS));
+
+   ecccr2 = in_be32(CONFIG_SYS_DCSR_DCFG_ADDR + DCFG_DCSR_ECCCR2);
+   out_be32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + DCFG_DCSR_ECCCR2,
+ecccr2 | (unsigned int)DISABLE_PFE_ECC);
+}
+#endif
+
 void fsl_lsch2_early_init_f(void)
 {
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR +
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index d6f0c5b..af68af4 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -205,6 +205,8 @@ struct sys_info {
 
 /* Device Configuration and Pin Control */
 #define DCFG_DCSR_PORCR1   0x0
+#define DCFG_DCSR_ECCCR2   0x524
+#define DISABLE_PFE_ECCBIT(13)
 
 struct ccsr_gur {
u32 porsr1; /* POR status 1 */
@@ -410,6 +412,14 @@ struct ccsr_gur {
 #define SCFG_PFEASBCR_ARSNPBIT(27)
 #define SCFG_PFEASBCR_AWSNPBIT(26)
 
+/* WR_QoS1 PFE bit definitions */
+#define SCFG_WR_QOS1_PFE1_QOS  GENMASK(27, 24)
+#define SCFG_WR_QOS1_PFE2_QOS  GENMASK(23, 20)
+
+/* RD_QoS1 PFE bit definitions */
+#define SCFG_RD_QOS1_PFE1_QOS  GENMASK(27, 24)
+#define SCFG_RD_QOS1_PFE2_QOS  GENMASK(23, 20)
+
 /* Supplemental Configuration Unit */
 struct ccsr_scfg {
u8 res_000[0x100-0x000];
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h 
b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index cb760b5..d9bfddb 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -127,6 +127,9 @@ void fsl_lsch2_early_init_f(void);
 int setup_chip_volt(void);
 /* Setup core vdd in unit mV */
 int board_setup_core_volt(u32 vdd);
+#ifdef CONFIG_FSL_PFE
+void init_pfe_scfg_dcfg_regs(void);
+#endif
 #endif
 
 void cpu_name(char *name);
-- 
2.7.4

___
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[U-Boot] [PATCH v4 07/13] board: freescale: ls1012afrdm: enable network support on ls1012afrdm

[Calvin Johnson]

This patch enables ethernet support for ls1012afrdm.

Signed-off-by: Calvin Johnson 
Signed-off-by: Anjaneyulu Jagarlmudi 
Acked-by: Joe Hershberger 

---

Changes in v4:
-Compile pfe driver conditionally with CONFIG_FSL_PFE

Changes in v3:
-Update Kconfig
-Update header file location to include/net/pfe_eth
-Prefix CONFIG_PFE_ to appropriate macros

Changes in v2:
-split from original patch "board: freescale: ls1012a: enable network
support on ls1012a platforms"

 board/freescale/ls1012afrdm/Kconfig   |  29 +++
 board/freescale/ls1012afrdm/Makefile  |   1 +
 board/freescale/ls1012afrdm/eth.c | 124 ++
 board/freescale/ls1012afrdm/ls1012afrdm.c |   5 --
 4 files changed, 154 insertions(+), 5 deletions(-)
 create mode 100644 board/freescale/ls1012afrdm/eth.c

diff --git a/board/freescale/ls1012afrdm/Kconfig 
b/board/freescale/ls1012afrdm/Kconfig
index 38bd91b..22d521b 100644
--- a/board/freescale/ls1012afrdm/Kconfig
+++ b/board/freescale/ls1012afrdm/Kconfig
@@ -12,6 +12,35 @@ config SYS_SOC
 config SYS_CONFIG_NAME
default "ls1012afrdm"
 
+if FSL_PFE
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+   def_bool y
+   select PHYLIB
+   imply PHY_REALTEK
+
+config SYS_LS_PFE_FW_ADDR
+   hex "Flash address of PFE firmware"
+   default 0x40a0
+
+config DDR_PFE_PHYS_BASEADDR
+   hex "PFE DDR physical base address"
+   default 0x0380
+
+config DDR_PFE_BASEADDR
+   hex "PFE DDR base address"
+   default 0x8380
+
+config PFE_EMAC1_PHY_ADDR
+   hex "PFE DDR base address"
+   default 0x2
+
+config PFE_EMAC2_PHY_ADDR
+   hex "PFE DDR base address"
+   default 0x1
+
+endif
+
 source "board/freescale/common/Kconfig"
 
 endif
diff --git a/board/freescale/ls1012afrdm/Makefile 
b/board/freescale/ls1012afrdm/Makefile
index dbfa2ce..1e53c96 100644
--- a/board/freescale/ls1012afrdm/Makefile
+++ b/board/freescale/ls1012afrdm/Makefile
@@ -5,3 +5,4 @@
 #
 
 obj-y += ls1012afrdm.o
+obj-$(CONFIG_FSL_PFE) += eth.o
diff --git a/board/freescale/ls1012afrdm/eth.c 
b/board/freescale/ls1012afrdm/eth.c
new file mode 100644
index 000..cc6deb2
--- /dev/null
+++ b/board/freescale/ls1012afrdm/eth.c
@@ -0,0 +1,124 @@
+/*
+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DEFAULT_PFE_MDIO_NAME "PFE_MDIO"
+#define DEFAULT_PFE_MDIO1_NAME "PFE_MDIO1"
+
+#define MASK_ETH_PHY_RST   0x0100
+
+static inline void ls1012afrdm_reset_phy(void)
+{
+   unsigned int val;
+   struct ccsr_gpio *pgpio = (void *)(GPIO1_BASE_ADDR);
+
+   setbits_be32(>gpdir, MASK_ETH_PHY_RST);
+
+   val = in_be32(>gpdat);
+   setbits_be32(>gpdat, val & ~MASK_ETH_PHY_RST);
+   mdelay(10);
+
+   val = in_be32(>gpdat);
+   setbits_be32(>gpdat, val | MASK_ETH_PHY_RST);
+   mdelay(50);
+}
+
+int pfe_eth_board_init(struct udevice *dev)
+{
+   static int init_done;
+   struct mii_dev *bus;
+   struct pfe_mdio_info mac_mdio_info;
+   struct pfe_eth_dev *priv = dev_get_priv(dev);
+
+   if (!init_done) {
+   ls1012afrdm_reset_phy();
+
+   mac_mdio_info.reg_base = (void *)EMAC1_BASE_ADDR;
+   mac_mdio_info.name = DEFAULT_PFE_MDIO_NAME;
+
+   bus = pfe_mdio_init(_mdio_info);
+   if (!bus) {
+   printf("Failed to register mdio\n");
+   return -1;
+   }
+
+   init_done = 1;
+   }
+
+   if (priv->gemac_port) {
+   mac_mdio_info.reg_base = (void *)EMAC2_BASE_ADDR;
+   mac_mdio_info.name = DEFAULT_PFE_MDIO1_NAME;
+   bus = pfe_mdio_init(_mdio_info);
+   if (!bus) {
+   printf("Failed to register mdio\n");
+   return -1;
+   }
+   }
+
+   pfe_set_mdio(priv->gemac_port,
+miiphy_get_dev_by_name(DEFAULT_PFE_MDIO_NAME));
+   if (!priv->gemac_port)
+   /* MAC1 */
+   pfe_set_phy_address_mode(priv->gemac_port,
+CONFIG_PFE_EMAC1_PHY_ADDR,
+PHY_INTERFACE_MODE_SGMII);
+   else
+   /* MAC2 */
+   pfe_set_phy_address_mode(priv->gemac_port,
+CONFIG_PFE_EMAC2_PHY_ADDR,
+PHY_INTERFACE_MODE_SGMII);
+   return 0;
+}
+
+static struct pfe_eth_pdata pfe_pdata0 = {
+   .pfe_eth_pdata_mac = {
+   .iobase = (phys_addr_t)EMAC1_BASE_ADDR,
+   .phy_interface = 0,
+   },
+
+   .pfe_ddr_addr = {
+   

[U-Boot] [PATCH v4 04/13] drivers: net: pfe_eth: provide pfe commands

[Calvin Johnson]

pfe_command provides command line support for several features that
support pfe, like starting or stopping the pfe, checking the health
of the processor engines and checking status of different units inside
pfe.

Signed-off-by: Calvin Johnson 
Signed-off-by: Anjaneyulu Jagarlmudi 
Acked-by: Joe Hershberger 

---

Changes in v4: None
Changes in v3:
-Update header location to include/net/pfe_eth

Changes in v2:
-remove unused code under CONFIG_UTIL_PE_DISABLED
-remove unused code under CONFIG_PFE_WARN_WA

 drivers/net/pfe_eth/pfe_cmd.c | 497 ++
 1 file changed, 497 insertions(+)
 create mode 100644 drivers/net/pfe_eth/pfe_cmd.c

diff --git a/drivers/net/pfe_eth/pfe_cmd.c b/drivers/net/pfe_eth/pfe_cmd.c
new file mode 100644
index 000..822dc0f
--- /dev/null
+++ b/drivers/net/pfe_eth/pfe_cmd.c
@@ -0,0 +1,497 @@
+/*
+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * @file
+ * @brief PFE utility commands
+ */
+
+#include 
+
+static inline void pfe_command_help(void)
+{
+   printf("Usage: pfe [pe | status | expt ] \n");
+}
+
+static void pfe_command_pe(int argc, char * const argv[])
+{
+   if (argc >= 3 && strcmp(argv[2], "pmem") == 0) {
+   if (argc >= 4 && strcmp(argv[3], "read") == 0) {
+   int i;
+   int num;
+   int id;
+   u32 addr;
+   u32 size;
+   u32 val;
+
+   if (argc == 7) {
+   num = simple_strtoul(argv[6], NULL, 0);
+   } else if (argc == 6) {
+   num = 1;
+   } else {
+   printf("Usage: pfe pe pmem read   
[]\n");
+   return;
+   }
+
+   id = simple_strtoul(argv[4], NULL, 0);
+   addr = simple_strtoul(argv[5], NULL, 16);
+   size = 4;
+
+   for (i = 0; i < num; i++, addr += 4) {
+   val = pe_pmem_read(id, addr, size);
+   val = be32_to_cpu(val);
+   if (!(i & 3))
+   printf("%08x: ", addr);
+   printf("%08x%s", val, i == num - 1 || (i & 3)
+  == 3 ? "\n" : " ");
+   }
+
+   } else {
+   printf("Usage: pfe pe pmem read \n");
+   }
+   } else if (argc >= 3 && strcmp(argv[2], "dmem") == 0) {
+   if (argc >= 4 && strcmp(argv[3], "read") == 0) {
+   int i;
+   int num;
+   int id;
+   u32 addr;
+   u32 size;
+   u32 val;
+
+   if (argc == 7) {
+   num = simple_strtoul(argv[6], NULL, 0);
+   } else if (argc == 6) {
+   num = 1;
+   } else {
+   printf("Usage: pfe pe dmem read   
[]\n");
+   return;
+   }
+
+   id = simple_strtoul(argv[4], NULL, 0);
+   addr = simple_strtoul(argv[5], NULL, 16);
+   size = 4;
+
+   for (i = 0; i < num; i++, addr += 4) {
+   val = pe_dmem_read(id, addr, size);
+   val = be32_to_cpu(val);
+   if (!(i & 3))
+   printf("%08x: ", addr);
+   printf("%08x%s", val, i == num - 1 || (i & 3)
+  == 3 ? "\n" : " ");
+   }
+
+   } else if (argc >= 4 && strcmp(argv[3], "write") == 0) {
+   int id;
+   u32 val;
+   u32 addr;
+   u32 size;
+
+   if (argc != 7) {
+   printf("Usage: pfe pe dmem write   
\n");
+   return;
+   }
+
+   id = simple_strtoul(argv[4], NULL, 0);
+   val = simple_strtoul(argv[5], NULL, 16);
+   val = cpu_to_be32(val);
+   addr = simple_strtoul(argv[6], NULL, 16);
+   size = 4;
+   pe_dmem_write(id, val, addr, size);
+   } else {
+   printf("Usage: pfe pe dmem [read | write] 
\n");
+   }
+   } else if (argc >= 3 && strcmp(argv[2], "lmem") == 0) {
+   if (argc 

[U-Boot] [PATCH v4 06/13] board: freescale: ls1012aqds: enable network support on ls1012aqds

[Calvin Johnson]

This patch enables ethernet support for ls1012aqds.

Signed-off-by: Calvin Johnson 
Signed-off-by: Anjaneyulu Jagarlmudi 
Acked-by: Joe Hershberger 

---

Changes in v4:
-Compile pfe driver conditionally with CONFIG_FSL_PFE

Changes in v3:
-Update Kconfig
-Update header file location to include/net/pfe_eth
-Cosmetic changes

Changes in v2:
-split from original patch "board: freescale: ls1012a: enable network
support on ls1012a platforms"

 board/freescale/ls1012aqds/Kconfig|  45 
 board/freescale/ls1012aqds/Makefile   |   1 +
 board/freescale/ls1012aqds/eth.c  | 309 ++
 board/freescale/ls1012aqds/ls1012aqds.c   |  97 +++-
 board/freescale/ls1012aqds/ls1012aqds_pfe.h   |  45 
 board/freescale/ls1012aqds/ls1012aqds_qixis.h |   2 +-
 6 files changed, 492 insertions(+), 7 deletions(-)
 create mode 100644 board/freescale/ls1012aqds/eth.c
 create mode 100644 board/freescale/ls1012aqds/ls1012aqds_pfe.h

diff --git a/board/freescale/ls1012aqds/Kconfig 
b/board/freescale/ls1012aqds/Kconfig
index fc9250b..c0b12ed 100644
--- a/board/freescale/ls1012aqds/Kconfig
+++ b/board/freescale/ls1012aqds/Kconfig
@@ -12,6 +12,51 @@ config SYS_SOC
 config SYS_CONFIG_NAME
default "ls1012aqds"
 
+
+if FSL_PFE
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+   def_bool y
+   select PHYLIB
+   imply PHY_VITESSE
+   imply PHY_REALTEK
+   imply PHY_AQUANTIA
+   imply PHYLIB_10G
+
+config PFE_RGMII_RESET_WA
+   def_bool y
+
+config SYS_LS_PFE_FW_ADDR
+   hex "Flash address of PFE firmware"
+   default 0x40a0
+
+config DDR_PFE_PHYS_BASEADDR
+   hex "PFE DDR physical base address"
+   default 0x0380
+
+config DDR_PFE_BASEADDR
+   hex "PFE DDR base address"
+   default 0x8380
+
+config PFE_EMAC1_PHY_ADDR
+   hex "PFE DDR base address"
+   default 0x1e
+
+config PFE_EMAC2_PHY_ADDR
+   hex "PFE DDR base address"
+   default 0x1
+
+config PFE_SGMII_2500_PHY1_ADDR
+   hex "PFE DDR base address"
+   default 0x1
+
+config PFE_SGMII_2500_PHY2_ADDR
+   hex "PFE DDR base address"
+   default 0x2
+
+endif
+
+
 source "board/freescale/common/Kconfig"
 
 endif
diff --git a/board/freescale/ls1012aqds/Makefile 
b/board/freescale/ls1012aqds/Makefile
index 0b813f9..5aba9ca 100644
--- a/board/freescale/ls1012aqds/Makefile
+++ b/board/freescale/ls1012aqds/Makefile
@@ -5,3 +5,4 @@
 #
 
 obj-y += ls1012aqds.o
+obj-$(CONFIG_FSL_PFE) += eth.o
diff --git a/board/freescale/ls1012aqds/eth.c b/board/freescale/ls1012aqds/eth.c
new file mode 100644
index 000..f8026a2
--- /dev/null
+++ b/board/freescale/ls1012aqds/eth.c
@@ -0,0 +1,309 @@
+/*
+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "../common/qixis.h"
+#include 
+#include 
+#include "ls1012aqds_qixis.h"
+
+#define EMI_NONE   0xFF
+#define EMI1_RGMII 1
+#define EMI1_SLOT1 2
+#define EMI1_SLOT2 3
+
+#define DEFAULT_PFE_MDIO_NAME "PFE_MDIO"
+#define DEFAULT_PFE_MDIO1_NAME "PFE_MDIO1"
+
+static const char * const mdio_names[] = {
+   "NULL",
+   "LS1012AQDS_MDIO_RGMII",
+   "LS1012AQDS_MDIO_SLOT1",
+   "LS1012AQDS_MDIO_SLOT2",
+   "NULL",
+};
+
+static const char *ls1012aqds_mdio_name_for_muxval(u8 muxval)
+{
+   return mdio_names[muxval];
+}
+
+struct ls1012aqds_mdio {
+   u8 muxval;
+   struct mii_dev *realbus;
+};
+
+static void ls1012aqds_mux_mdio(u8 muxval)
+{
+   u8 brdcfg4;
+
+   if (muxval < 7) {
+   brdcfg4 = QIXIS_READ(brdcfg[4]);
+   brdcfg4 &= ~BRDCFG4_EMISEL_MASK;
+   brdcfg4 |= (muxval << BRDCFG4_EMISEL_SHIFT);
+   QIXIS_WRITE(brdcfg[4], brdcfg4);
+   }
+}
+
+static int ls1012aqds_mdio_read(struct mii_dev *bus, int addr, int devad,
+   int regnum)
+{
+   struct ls1012aqds_mdio *priv = bus->priv;
+
+   ls1012aqds_mux_mdio(priv->muxval);
+
+   return priv->realbus->read(priv->realbus, addr, devad, regnum);
+}
+
+static int ls1012aqds_mdio_write(struct mii_dev *bus, int addr, int devad,
+int regnum, u16 value)
+{
+   struct ls1012aqds_mdio *priv = bus->priv;
+
+   ls1012aqds_mux_mdio(priv->muxval);
+
+   return priv->realbus->write(priv->realbus, addr, devad, regnum, value);
+}
+
+static int ls1012aqds_mdio_reset(struct mii_dev *bus)
+{
+   struct ls1012aqds_mdio *priv = bus->priv;
+
+   if (priv->realbus->reset)
+   return priv->realbus->reset(priv->realbus);
+   else
+   return -1;
+}
+
+static int ls1012aqds_mdio_init(char *realbusname, u8 muxval)
+{
+   struct ls1012aqds_mdio *pmdio;
+   struct 

[U-Boot] [PATCH v4 05/13] drivers: net: pfe_eth: LS1012A PFE headers

[Calvin Johnson]

Contains all the pfe header files.

Signed-off-by: Calvin Johnson 
Signed-off-by: Anjaneyulu Jagarlmudi 
Acked-by: Joe Hershberger 

---

Changes in v4: None
Changes in v3:
-Move pfe_eth header files to include/net/pfe_eth
-Use BIT macro wherever applicable

Changes in v2:
-Add pfe_rx_done to clear bd after packet processing
-remove unused code under CONFIG_UTIL_PE_DISABLED
-Used BIT and GENMASK macros wherever applicable
-Removed generic definitions that pollutes namespace
-File names pfe.h renamed to pfe_hw.h to be more clear as it contains
 low level functions that directly access pfe hardware block
-Added pfe_dm_eth.h for new driver model

 include/dm/platform_data/pfe_dm_eth.h|  21 
 include/net/pfe_eth/pfe/cbus.h   |  77 +
 include/net/pfe_eth/pfe/cbus/bmu.h   |  40 +++
 include/net/pfe_eth/pfe/cbus/class_csr.h | 180 +++
 include/net/pfe_eth/pfe/cbus/emac.h  | 140 
 include/net/pfe_eth/pfe/cbus/gpi.h   |  62 +++
 include/net/pfe_eth/pfe/cbus/hif.h   |  68 
 include/net/pfe_eth/pfe/cbus/hif_nocpy.h |  40 +++
 include/net/pfe_eth/pfe/cbus/tmu_csr.h   | 148 +
 include/net/pfe_eth/pfe/cbus/util_csr.h  |  47 
 include/net/pfe_eth/pfe/pfe_hw.h | 163 
 include/net/pfe_eth/pfe_driver.h |  59 ++
 include/net/pfe_eth/pfe_eth.h| 104 ++
 include/net/pfe_eth/pfe_firmware.h   |  17 +++
 include/net/pfe_eth/pfe_mdio.h   |  13 +++
 15 files changed, 1179 insertions(+)
 create mode 100644 include/dm/platform_data/pfe_dm_eth.h
 create mode 100644 include/net/pfe_eth/pfe/cbus.h
 create mode 100644 include/net/pfe_eth/pfe/cbus/bmu.h
 create mode 100644 include/net/pfe_eth/pfe/cbus/class_csr.h
 create mode 100644 include/net/pfe_eth/pfe/cbus/emac.h
 create mode 100644 include/net/pfe_eth/pfe/cbus/gpi.h
 create mode 100644 include/net/pfe_eth/pfe/cbus/hif.h
 create mode 100644 include/net/pfe_eth/pfe/cbus/hif_nocpy.h
 create mode 100644 include/net/pfe_eth/pfe/cbus/tmu_csr.h
 create mode 100644 include/net/pfe_eth/pfe/cbus/util_csr.h
 create mode 100644 include/net/pfe_eth/pfe/pfe_hw.h
 create mode 100644 include/net/pfe_eth/pfe_driver.h
 create mode 100644 include/net/pfe_eth/pfe_eth.h
 create mode 100644 include/net/pfe_eth/pfe_firmware.h
 create mode 100644 include/net/pfe_eth/pfe_mdio.h

diff --git a/include/dm/platform_data/pfe_dm_eth.h 
b/include/dm/platform_data/pfe_dm_eth.h
new file mode 100644
index 000..7943c67
--- /dev/null
+++ b/include/dm/platform_data/pfe_dm_eth.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __PFE_DM_ETH_H__
+#define __PFE_DM_ETH_H__
+#include 
+
+struct pfe_ddr_address {
+   void *ddr_pfe_baseaddr;
+   unsigned long ddr_pfe_phys_baseaddr;
+};
+
+struct pfe_eth_pdata {
+   struct eth_pdata pfe_eth_pdata_mac;
+   struct pfe_ddr_address pfe_ddr_addr;
+};
+#endif /* __PFE_DM_ETH_H__ */
diff --git a/include/net/pfe_eth/pfe/cbus.h b/include/net/pfe_eth/pfe/cbus.h
new file mode 100644
index 000..002041c
--- /dev/null
+++ b/include/net/pfe_eth/pfe/cbus.h
@@ -0,0 +1,77 @@
+/*
+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _CBUS_H_
+#define _CBUS_H_
+
+#include "cbus/emac.h"
+#include "cbus/gpi.h"
+#include "cbus/bmu.h"
+#include "cbus/hif.h"
+#include "cbus/tmu_csr.h"
+#include "cbus/class_csr.h"
+#include "cbus/hif_nocpy.h"
+#include "cbus/util_csr.h"
+
+#define CBUS_BASE_ADDR ((void *)CONFIG_SYS_FSL_PFE_ADDR)
+
+/* PFE Control and Status Register Desciption */
+#define EMAC1_BASE_ADDR(CBUS_BASE_ADDR + 0x20)
+#define EGPI1_BASE_ADDR(CBUS_BASE_ADDR + 0x21)
+#define EMAC2_BASE_ADDR(CBUS_BASE_ADDR + 0x22)
+#define EGPI2_BASE_ADDR(CBUS_BASE_ADDR + 0x23)
+#define BMU1_BASE_ADDR (CBUS_BASE_ADDR + 0x24)
+#define BMU2_BASE_ADDR (CBUS_BASE_ADDR + 0x25)
+#define ARB_BASE_ADDR  (CBUS_BASE_ADDR + 0x26)
+#define DDR_CONFIG_BASE_ADDR   (CBUS_BASE_ADDR + 0x27)
+#define HIF_BASE_ADDR  (CBUS_BASE_ADDR + 0x28)
+#define HGPI_BASE_ADDR (CBUS_BASE_ADDR + 0x29)
+#define LMEM_BASE_ADDR (CBUS_BASE_ADDR + 0x30)
+#define LMEM_SIZE  0x1
+#define LMEM_END   (LMEM_BASE_ADDR + LMEM_SIZE)
+#define TMU_CSR_BASE_ADDR  (CBUS_BASE_ADDR + 0x31)
+#define CLASS_CSR_BASE_ADDR(CBUS_BASE_ADDR + 0x32)
+#define HIF_NOCPY_BASE_ADDR(CBUS_BASE_ADDR + 0x35)
+#define UTIL_CSR_BASE_ADDR (CBUS_BASE_ADDR + 0x36)
+#define CBUS_GPT_BASE_ADDR (CBUS_BASE_ADDR + 0x37)
+
+/*
+ * 

[U-Boot] [PATCH v4 02/13] armv8: fsl-layerscape: Add support of GPIO structure

[Calvin Johnson]

From: Prabhakar Kushwaha 

Layerscape Gen2 SoC supports GPIO registers to control GPIO
signals. Adding support of GPIO structure to access GPIO
registers.

Signed-off-by: Pratiyush Srivastava 
Signed-off-by: Prabhakar Kushwaha 
Signed-off-by: Calvin Johnson 
Acked-by: Joe Hershberger 

---

Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 1ff5cac..b195005 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -82,6 +82,11 @@
 #define QSPI0_BASE_ADDR(CONFIG_SYS_IMMR + 
0x0055)
 #define DSPI1_BASE_ADDR(CONFIG_SYS_IMMR + 
0x0110)
 
+#define GPIO1_BASE_ADDR(CONFIG_SYS_IMMR + 
0x130)
+#define GPIO2_BASE_ADDR(CONFIG_SYS_IMMR + 
0x131)
+#define GPIO3_BASE_ADDR(CONFIG_SYS_IMMR + 
0x132)
+#define GPIO4_BASE_ADDR(CONFIG_SYS_IMMR + 
0x133)
+
 #define LPUART_BASE(CONFIG_SYS_IMMR + 0x0195)
 
 #define AHCI_BASE_ADDR (CONFIG_SYS_IMMR + 0x0220)
@@ -591,6 +596,16 @@ struct ccsr_serdes {
u8  res_19a0[0x2000-0x19a0];/* from 0x19a0 to 0x1fff */
 };
 
+struct ccsr_gpio {
+   u32 gpdir;
+   u32 gpodr;
+   u32 gpdat;
+   u32 gpier;
+   u32 gpimr;
+   u32 gpicr;
+   u32 gpibe;
+};
+
 /* MMU 500 */
 #define SMMU_SCR0  (SMMU_BASE + 0x0)
 #define SMMU_SCR1  (SMMU_BASE + 0x4)
-- 
2.7.4

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[U-Boot] [PATCH v4 03/13] drivers: net: pfe_eth: LS1012A PFE driver introduction

[Calvin Johnson]

This patch adds PFE driver to U-Boot

Following are the main driver files:-
pfe_hw.c: provides low level helper functions to initialize PFE
internal processor engines and other hardware blocks
pfe_driver.c: provides initialization functions
and packet send and receive functions
pfe_eth.c: provides high level gemac initialization functions
pfe_firmware.c: provides functions to load firmware into PFE
internal processor engines.
pfe_mdio.c: provides functions to initialize phy and mdio.

Signed-off-by: Calvin Johnson 
Signed-off-by: Anjaneyulu Jagarlmudi 
Acked-by: Joe Hershberger 

---

Changes in v4: None
Changes in v3:
-Update header location to include/net/pfe_eth
-Replace EMACX_PHY_ADDR with CONFIG_PFE_EMACX_PHY_ADDR

Changes in v2:
-fix RGMII TX-delay issue
-add pfe_rx_done to clear bd after packet processing
-use writel/readl to access hw bds
-cleanup typos and indent
-remove unused code under CONFIG_UTIL_PE_DISABLED
-Consolidate code in pfe_lib_init
-Corrected typo receive
-Magic numbers replaced with proper definitions
-File names pfe.c renamed to pfe_hw.c to be more clear as it contains
 low level functions that directly access pfe hardware block.
-MDIO related code is also moved from pfe_eth.c to a new file
 pfe_mdio.c.

 drivers/net/pfe_eth/pfe_driver.c   | 643 
 drivers/net/pfe_eth/pfe_eth.c  | 297 +++
 drivers/net/pfe_eth/pfe_firmware.c | 230 +
 drivers/net/pfe_eth/pfe_hw.c   | 999 +
 drivers/net/pfe_eth/pfe_mdio.c | 291 +++
 5 files changed, 2460 insertions(+)
 create mode 100644 drivers/net/pfe_eth/pfe_driver.c
 create mode 100644 drivers/net/pfe_eth/pfe_eth.c
 create mode 100644 drivers/net/pfe_eth/pfe_firmware.c
 create mode 100644 drivers/net/pfe_eth/pfe_hw.c
 create mode 100644 drivers/net/pfe_eth/pfe_mdio.c

diff --git a/drivers/net/pfe_eth/pfe_driver.c b/drivers/net/pfe_eth/pfe_driver.c
new file mode 100644
index 000..a9991f5
--- /dev/null
+++ b/drivers/net/pfe_eth/pfe_driver.c
@@ -0,0 +1,643 @@
+/*
+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+
+static struct tx_desc_s *g_tx_desc;
+static struct rx_desc_s *g_rx_desc;
+
+/*
+ * HIF Rx interface function
+ * Reads the rx descriptor from the current location (rx_to_read).
+ * - If the descriptor has a valid data/pkt, then get the data pointer
+ * - check for the input rx phy number
+ * - increment the rx data pointer by pkt_head_room_size
+ * - decrement the data length by pkt_head_room_size
+ * - handover the packet to caller.
+ *
+ * @param[out] pkt_ptr - Pointer to store rx packet
+ * @param[out] phy_port - Pointer to store recv phy port
+ *
+ * @return -1 if no packet, else return length of packet.
+ */
+int pfe_recv(uchar **pkt_ptr, int *phy_port)
+{
+   struct rx_desc_s *rx_desc = g_rx_desc;
+   struct buf_desc *bd;
+   int len = 0;
+
+   struct hif_header_s *hif_header;
+
+   bd = rx_desc->rx_base + rx_desc->rx_to_read;
+
+   if (readl(>ctrl) & BD_CTRL_DESC_EN)
+   return len; /* No pending Rx packet */
+
+   /* this len include hif_header(8 bytes) */
+   len = readl(>ctrl) & 0x;
+
+   hif_header = (struct hif_header_s *)DDR_PFE_TO_VIRT(readl(>data));
+
+   /* Get the receive port info from the packet */
+   debug("Pkt received:");
+   debug(" Pkt ptr(%p), len(%d), gemac_port(%d) status(%08x)\n",
+ hif_header, len, hif_header->port_no, readl(>status));
+#ifdef DEBUG
+   {
+   int i;
+   unsigned char *p = (unsigned char *)hif_header;
+
+   for (i = 0; i < len; i++) {
+   if (!(i % 16))
+   printf("\n");
+   printf(" %02x", p[i]);
+   }
+   printf("\n");
+   }
+#endif
+
+   *pkt_ptr = (uchar *)(hif_header + 1);
+   *phy_port = hif_header->port_no;
+   len -= sizeof(struct hif_header_s);
+
+   return len;
+}
+
+/*
+ * HIF function to check the Rx done
+ * This function will check the rx done indication of the current rx_to_read
+ * locations
+ * if success, moves the rx_to_read to next location.
+ */
+int pfe_eth_free_pkt(struct udevice *dev, uchar *packet, int length)
+{
+   struct rx_desc_s *rx_desc = g_rx_desc;
+   struct buf_desc *bd;
+
+   debug("%s:rx_base: %p, rx_to_read: %d\n", __func__, rx_desc->rx_base,
+ rx_desc->rx_to_read);
+
+   bd = rx_desc->rx_base + rx_desc->rx_to_read;
+
+   /* reset the control field */
+   writel((MAX_FRAME_SIZE | BD_CTRL_LIFM | BD_CTRL_DESC_EN
+   | BD_CTRL_DIR), >ctrl);
+   writel(0, >status);
+
+   debug("Rx Done : status: %08x, ctrl: %08x\n", readl(>status),
+ readl(>ctrl));
+
+   /* Give START_STROBE to BDP to fetch the 

[U-Boot] [PATCH v4 01/13] drivers: net: phy: Fix aquantia compilation with DM

[Calvin Johnson]

With CONFIG_DM_ETH enabled, aquantia driver compilation fails with
below error. This patch fixes the issue by including dm.h.

drivers/net/phy/aquantia.c: In function ‘aquantia_startup’:
drivers/net/phy/aquantia.c:73:21: error: dereferencing pointer to
incomplete
type ‘struct udevice’
  phydev->dev->name);
 ^~

Signed-off-by: Calvin Johnson 
Acked-by: Joe Hershberger 
---

Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/net/phy/aquantia.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index ad12f6d..6678147 100644
--- a/drivers/net/phy/aquantia.c
+++ b/drivers/net/phy/aquantia.c
@@ -7,6 +7,7 @@
  */
 #include 
 #include 
+#include 
 #include 
 
 #ifndef CONFIG_PHYLIB_10G
-- 
2.7.4

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[U-Boot] [PATCH v4 00/13] LS1012A PFE driver patch series

[Calvin Johnson]

This patch series introduces U-Boot support for NXP's LS1012A Packet
Forwarding Engine (pfe_eth). LS1012A uses hardware packet forwarding
engine to provide high performance Ethernet interfaces. The device
includes two Ethernet ports.


Changes in v4:
-Compile pfe driver conditionally with CONFIG_FSL_PFE
-Compile pfe driver conditionally with CONFIG_FSL_PFE
-Compile pfe driver conditionally with CONFIG_FSL_PFE
-Fix typo "ppfe stop"

Changes in v3:
-Update header location to include/net/pfe_eth
-Replace EMACX_PHY_ADDR with CONFIG_PFE_EMACX_PHY_ADDR
-Update header location to include/net/pfe_eth
-Move pfe_eth header files to include/net/pfe_eth
-Use BIT macro wherever applicable
-Update Kconfig
-Update header file location to include/net/pfe_eth
-Cosmetic changes
-Update Kconfig
-Update header file location to include/net/pfe_eth
-Prefix CONFIG_PFE_ to appropriate macros
-Update Kconfig
-Update header file location to include/net/pfe_eth
-Update Kconfig
-Update header file location to include/net/pfe_eth
-Prefix CONFIG_PFE_ to appropriate macros
-Indent properly
-Use BIT macro wherever applicable
-Cosmetic change
-Move PFE macros to Kconfig
-Remove unused UTIL_PE_DISABLED config

Changes in v2:
-fix RGMII TX-delay issue
-add pfe_rx_done to clear bd after packet processing
-use writel/readl to access hw bds
-cleanup typos and indent
-remove unused code under CONFIG_UTIL_PE_DISABLED
-Consolidate code in pfe_lib_init
-Corrected typo receive
-Magic numbers replaced with proper definitions
-File names pfe.c renamed to pfe_hw.c to be more clear as it contains
 low level functions that directly access pfe hardware block.
-MDIO related code is also moved from pfe_eth.c to a new file
 pfe_mdio.c.
-remove unused code under CONFIG_UTIL_PE_DISABLED
-remove unused code under CONFIG_PFE_WARN_WA
-Add pfe_rx_done to clear bd after packet processing
-remove unused code under CONFIG_UTIL_PE_DISABLED
-Used BIT and GENMASK macros wherever applicable
-Removed generic definitions that pollutes namespace
-File names pfe.h renamed to pfe_hw.h to be more clear as it contains
 low level functions that directly access pfe hardware block
-Added pfe_dm_eth.h for new driver model
-split from original patch "board: freescale: ls1012a: enable network
support on ls1012a platforms"
-split from original patch "board: freescale: ls1012a: enable network
support on ls1012a platforms"
-split from original patch "board: freescale: ls1012a: enable network
support on ls1012a platforms"
-New patch added to series to enable ethernet support for
ls1012a2g5rdb
-Improved commit message to provide more description
-Replaced magic numbers with proper definitions
-Improved commit message to provide more description
-Moved SYS_LS_PFE_FW_ADDR from pfe Kconfig to board Kconfigs
-Add "pfe stop" to ls1012a rdb, frdm and 2g5rdb config files

Calvin Johnson (12):
  drivers: net: phy: Fix aquantia compilation with DM
  drivers: net: pfe_eth: LS1012A PFE driver introduction
  drivers: net: pfe_eth: provide pfe commands
  drivers: net: pfe_eth: LS1012A PFE headers
  board: freescale: ls1012aqds: enable network support on ls1012aqds
  board: freescale: ls1012afrdm: enable network support on ls1012afrdm
  board: freescale: ls1012ardb: enable network support on ls1012ardb
  board: freescale: ls1012a2g5rdb: enable network support on
ls1012a2g5rdb
  armv8: fsl-lsch2: add pfe macros and update ccsr_scfg structure
  armv8: fsl-lsch2: configure pfe's DDR and HDBUS interfaces and ECC
  armv8: layerscape: csu: enable ns access to PFE registers
  configs: ls1012a: add pfe configuration for LS1012A

Prabhakar Kushwaha (1):
  armv8: fsl-layerscape: Add support of GPIO structure

 arch/arm/cpu/armv8/fsl-layerscape/soc.c|  23 +
 .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |  63 +-
 .../include/asm/arch-fsl-layerscape/ns_access.h|   2 +
 arch/arm/include/asm/arch-fsl-layerscape/soc.h |   3 +
 board/freescale/ls1012afrdm/Kconfig|  29 +
 board/freescale/ls1012afrdm/Makefile   |   1 +
 board/freescale/ls1012afrdm/eth.c  | 124 +++
 board/freescale/ls1012afrdm/ls1012afrdm.c  |   5 -
 board/freescale/ls1012aqds/Kconfig |  45 +
 board/freescale/ls1012aqds/Makefile|   1 +
 board/freescale/ls1012aqds/eth.c   | 309 +++
 board/freescale/ls1012aqds/ls1012aqds.c|  97 +-
 board/freescale/ls1012aqds/ls1012aqds_pfe.h|  45 +
 board/freescale/ls1012aqds/ls1012aqds_qixis.h  |   2 +-
 board/freescale/ls1012ardb/Kconfig |  59 ++
 board/freescale/ls1012ardb/Makefile|   1 +
 board/freescale/ls1012ardb/eth.c   | 135 +++
 board/freescale/ls1012ardb/ls1012ardb.c|   4 -
 configs/ls1012a2g5rdb_qspi_defconfig   |   2 +
 configs/ls1012afrdm_qspi_defconfig |   2 +
 configs/ls1012aqds_qspi_defconfig  |   2 +
 configs/ls1012ardb_qspi_defconfig  

[U-Boot] [PATCH] arm64: zynqmp: Add support for verifying secure images

[Michal Simek]

From: Siva Durga Prasad Paladugu 

This patch adds new command "zynqmp" to handle zynqmp
specific commands like "zynqmp secure". This secure command is
used for verifying zynqmp specific secure images. The secure
image can either be authenticated or encrypted or both encrypted
and authenticated. The secure image is prepared using bootgen
and will be in xilinx specific BOOT.BIN format. The optional
key can be used for decryption of encrypted image if user
key was specified while creation BOOT.BIN.

Signed-off-by: Siva Durga Prasad Paladugu 
Signed-off-by: Michal Simek 
---

 arch/arm/Kconfig |   1 +
 arch/arm/include/asm/arch-zynqmp/sys_proto.h |   2 +
 board/xilinx/zynqmp/Kconfig  |  18 +
 board/xilinx/zynqmp/Makefile |   4 +
 board/xilinx/zynqmp/cmds.c   | 105 +++
 configs/xilinx_zynqmp_mini_emmc_defconfig|   1 +
 configs/xilinx_zynqmp_mini_nand_defconfig|   1 +
 7 files changed, 132 insertions(+)
 create mode 100644 board/xilinx/zynqmp/Kconfig
 create mode 100644 board/xilinx/zynqmp/cmds.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4b5c64c8ba8b..a6e152237a70 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1336,6 +1336,7 @@ source "board/toradex/colibri_pxa270/Kconfig"
 source "board/vscom/baltos/Kconfig"
 source "board/woodburn/Kconfig"
 source "board/work-microwave/work_92105/Kconfig"
+source "board/xilinx/zynqmp/Kconfig"
 source "board/zipitz2/Kconfig"
 
 source "arch/arm/Kconfig.debug"
diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h 
b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
index 084d55a2b01f..ad3dc9aba50d 100644
--- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h
+++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
@@ -11,6 +11,8 @@
 #define PAYLOAD_ARG_CNT5
 
 #define ZYNQMP_CSU_SILICON_VER_MASK0xF
+#define ZYNQMP_SIP_SVC_PM_SECURE_IMG_LOAD  0xC22D
+#define KEY_PTR_LEN32
 
 enum {
IDCODE,
diff --git a/board/xilinx/zynqmp/Kconfig b/board/xilinx/zynqmp/Kconfig
new file mode 100644
index ..7d1f7398c3e9
--- /dev/null
+++ b/board/xilinx/zynqmp/Kconfig
@@ -0,0 +1,18 @@
+# Copyright (c) 2018, Xilinx, Inc.
+#
+# SPDX-License-Identifier: GPL-2.0
+
+if ARCH_ZYNQMP
+
+config CMD_ZYNQMP
+   bool "Enable ZynqMP specific commands"
+   default y
+   help
+ Enable ZynqMP specific commands like "zynqmp secure"
+ which is used for zynqmp secure image verification.
+ The secure image is a xilinx specific BOOT.BIN with
+ either authentication or encryption or both encryption
+ and authentication feature enabled while generating
+ BOOT.BIN using Xilinx bootgen tool.
+
+endif
diff --git a/board/xilinx/zynqmp/Makefile b/board/xilinx/zynqmp/Makefile
index 75aab92f0473..3b7a10e202e5 100644
--- a/board/xilinx/zynqmp/Makefile
+++ b/board/xilinx/zynqmp/Makefile
@@ -26,6 +26,10 @@ ifneq ($(call ifdef_any_of, CONFIG_ZYNQMP_PSU_INIT_ENABLED 
CONFIG_SPL_BUILD),)
 obj-y += $(init-objs)
 endif
 
+ifndef CONFIG_SPL_BUILD
+obj-$(CONFIG_CMD_ZYNQMP) += cmds.o
+endif
+
 # Suppress "warning: function declaration isn't a prototype"
 CFLAGS_REMOVE_psu_init_gpl.o := -Wstrict-prototypes
 
diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c
new file mode 100644
index ..6712d7b8cfaa
--- /dev/null
+++ b/board/xilinx/zynqmp/cmds.c
@@ -0,0 +1,105 @@
+/*
+ * (C) Copyright 2018 Xilinx, Inc.
+ * Siva Durga Prasad Paladugu 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+static int zynqmp_verify_secure(u8 *key_ptr, u8 *src_ptr, u32 len)
+{
+   int ret;
+   u32 src_lo, src_hi;
+   u32 key_lo = 0;
+   u32 key_hi = 0;
+   u32 ret_payload[PAYLOAD_ARG_CNT];
+   u64 addr;
+
+   if ((ulong)src_ptr != ALIGN((ulong)src_ptr,
+   CONFIG_SYS_CACHELINE_SIZE)) {
+   printf("Failed: source address not aligned:%p\n", src_ptr);
+   return -EINVAL;
+   }
+
+   src_lo = lower_32_bits((ulong)src_ptr);
+   src_hi = upper_32_bits((ulong)src_ptr);
+   flush_dcache_range((ulong)src_ptr, (ulong)(src_ptr + len));
+
+   if (key_ptr) {
+   key_lo = lower_32_bits((ulong)key_ptr);
+   key_hi = upper_32_bits((ulong)key_ptr);
+   flush_dcache_range((ulong)key_ptr,
+  (ulong)(key_ptr + KEY_PTR_LEN));
+   }
+
+   ret = invoke_smc(ZYNQMP_SIP_SVC_PM_SECURE_IMG_LOAD, src_lo, src_hi,
+key_lo, key_hi, ret_payload);
+   if (ret) {
+   printf("Failed: secure op status:0x%x\n", ret);
+   } else {
+   addr = (u64)ret_payload[1] << 32 | ret_payload[2];
+   printf("Verified image at 0x%llx\n", addr);
+

Re: [U-Boot] [PATCH v2 00/10] splash screen on the stm32f769 disco board

[Patrice CHOTARD]

Hi Vikas

+Benjamin

On 03/06/2018 08:44 PM, Vikas Manocha wrote:
> Hi Patrice/Yannick,
> 
> On 03/05/2018 11:50 PM, Patrice CHOTARD wrote:
>>> There seems to be a dependency on patch for 
>>> include/dt-bindings/mfd/stm32f7-rcc.h
>>> adding some new macros. Is it also submitted to the list?
>> Right, needed patches are already on the list
>> http://patchwork.ozlabs.org/patch/870938/
> 
> Great addition !
> 
> Few points:
> it seems above mentioned patchset also has dependency on another patchset 
> http://patchwork.ozlabs.org/patch/870283/
> After applying these two dependency patchsets, it creates conflicts with 
> pathch "ARM: dts: stm32: Add timer support for STM32F7".

If the following series are applied first, there is no issue:

http://patchwork.ozlabs.org/project/uboot/list/?series=27330
http://patchwork.ozlabs.org/project/uboot/list/?series=27607


> I understand you want to get it reviewed without waiting for other patchset 
> acceptance, it would be good to mention all the dependencies.

Agree, we will pay attention to that point in the future.

> 
> Also i observe that without applying f769 display patches, f746 display 
> didn't work.

Yes, i observed the same issue, the f769 patch 
http://patchwork.ozlabs.org/patch/880593/ fixes the 746 display

> And F769 board display is not working, i see one error log:
> 
> Board 1:
> stm32_ltdc_probe: decode display timing error -4
> & Board 2:
> stm32_ltdc_probe: decode display timing error -668998023

I confirm too, Yannick is the best person to explain why .

Thanks

Patrice

> 
> Cheers,
> Vikas
> 
>>
>> Patrice
>>
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