> -Original Message-
> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
> Sent: 2018年3月22日 3:00
> To: Joe Hershberger
> Cc: Peng Fan ; Fabio Estevam ;
> U-Boot Mailing List
> Subject: Re: [U-Boot]
> -Original Message-
> From: Joe Hershberger [mailto:joe.hershber...@ni.com]
> Sent: 2018年3月22日 3:54
> To: Peng Fan ; Jagan Teki
> Cc: Joe Hershberger ; u-boot
> Subject: Re: [U-Boot] [PATCH V2
Hi Tom,
please pull following changes:
- add initial support for Broadcom BCM6362 SoC and Netgear DGND3700v2 board
- add USB support for all Broadcom MIPS SoCs
- fix an array bounds check
The following changes since commit 9c0e2f6ed391f199ba1bf30c7d0b71123a012958:
Merge
Hi Peng,
On Wed, Mar 21, 2018 at 4:01 AM, Peng Fan wrote:
> Add i.MX6UL/SX/SL compatible.
In case you didn't notice and it is still an issue in v2 (I just
kicked off a build of it) there are a number of failures as a result
of this series...
On 21/03/18 19:08, Jagan Teki wrote:
> On Thu, Mar 22, 2018 at 12:33 AM, André Przywara
> wrote:
>> Hi,
>>
>> On 21/03/18 18:40, Jagan Teki wrote:
>>> On Wed, Mar 14, 2018 at 7:26 AM, Andre Przywara
>>> wrote:
As we are running into issues
On Wed, Mar 21, 2018 at 4:44 AM, Stefan Roese wrote:
> On 21.03.2018 10:42, Stefan Roese wrote:
>>
>> On 07.03.2018 22:52, Marek Behún wrote:
>>>
>>> The driver does not check id phy_connect failed (for example on wrong
>>> property name in device tree). In such a case a fault
On Wed, Mar 21, 2018 at 2:19 PM, Jagan Teki wrote:
> Joe,
>
> On Wed, Mar 21, 2018 at 2:31 PM, Peng Fan wrote:
>> Add i.MX6UL/SX/SL compatible.
>
> Please wait few days about pushing this series, I need to test it on
> my imx6ul board.
Will do.
-Joe
On Wed, Mar 21, 2018 at 2:13 PM, Joe Hershberger wrote:
> On Tue, Mar 20, 2018 at 4:29 AM, Peng Fan wrote:
>>
>>
>>> -Original Message-
>>> From: Lothar Waßmann [mailto:l...@karo-electronics.de]
>>> Sent: 2018年3月20日 16:50
>>> To: Peng Fan
Joe,
On Wed, Mar 21, 2018 at 2:31 PM, Peng Fan wrote:
> Add i.MX6UL/SX/SL compatible.
Please wait few days about pushing this series, I need to test it on
my imx6ul board.
Jagan.
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On Mon, Mar 5, 2018 at 6:47 PM, Eugeniy Paltsev
wrote:
> In current implementation if some data still exists in Tx FIFO it
> can be silently flushed, i.e. dropped on disabling of the controller,
> which happens when writing 0 to DW_SPI_SSIENR (it happens in the
>
On Wed, Mar 21, 2018 at 1:59 PM, Jagan Teki wrote:
> On Thu, Mar 22, 2018 at 12:09 AM, Joe Hershberger
> wrote:
>> On Wed, Mar 21, 2018 at 1:29 PM, Jagan Teki wrote:
>>> On Wed, Mar 21, 2018 at 6:54 PM, Peng Fan
On Tue, Mar 20, 2018 at 4:29 AM, Peng Fan wrote:
>
>
>> -Original Message-
>> From: Lothar Waßmann [mailto:l...@karo-electronics.de]
>> Sent: 2018年3月20日 16:50
>> To: Peng Fan
>> Cc: joe.hershber...@ni.com; u-boot@lists.denx.de
>> Subject: Re: [U-Boot]
On Thu, Mar 22, 2018 at 12:33 AM, André Przywara wrote:
> Hi,
>
> On 21/03/18 18:40, Jagan Teki wrote:
>> On Wed, Mar 14, 2018 at 7:26 AM, Andre Przywara
>> wrote:
>>> As we are running into issues where the final U-Boot FIT image file is
>>>
Hi Jagan,
On Thu, 2018-03-22 at 00:04 +0530, Jagan Teki wrote:
> On Tue, Mar 13, 2018 at 8:44 PM, Jagan Teki wrote:
> > On Mon, Mar 5, 2018 at 6:47 PM, Eugeniy Paltsev
> > wrote:
> > > Various fixes and improvements of designware spi
Hi,
On 21/03/18 18:40, Jagan Teki wrote:
> On Wed, Mar 14, 2018 at 7:26 AM, Andre Przywara
> wrote:
>> As we are running into issues where the final U-Boot FIT image file is
>> exceeding our size limit, add a hint to the README.sunxi64 file
>> to point out the
On Thu, Mar 22, 2018 at 12:09 AM, Joe Hershberger
wrote:
> On Wed, Mar 21, 2018 at 1:29 PM, Jagan Teki wrote:
>> On Wed, Mar 21, 2018 at 6:54 PM, Peng Fan wrote:
>> >
>> >
>> >> -Original Message-
>>
On Thu, Mar 22, 2018 at 12:15 AM, Fabio Estevam wrote:
> On Wed, Mar 21, 2018 at 3:31 PM, Jagan Teki wrote:
>
>> I'm not sure I can understand your point? imx is correct notation
>> compared to mx with platform code is concern. So the whole patch is
Signed-off-by: Eugeniy Paltsev
---
arch/arc/dts/hsdk.dts | 56 +++
board/synopsys/hsdk/MAINTAINERS | 6 +-
board/synopsys/hsdk/Makefile| 4 +-
board/synopsys/hsdk/clk-lib.c | 68 +++
board/synopsys/hsdk/clk-lib.h | 17 +
On Wed, Mar 21, 2018 at 3:31 PM, Jagan Teki wrote:
> I'm not sure I can understand your point? imx is correct notation
> compared to mx with platform code is concern. So the whole patch is
> trying to do that for imx6 SOC.
My point is that changing mx to imx is pure
On Wed, Mar 14, 2018 at 7:26 AM, Andre Przywara wrote:
> As we are running into issues where the final U-Boot FIT image file is
> exceeding our size limit, add a hint to the README.sunxi64 file
> to point out the possibility of building non-debug versions of the ATF
>
On Wed, Mar 21, 2018 at 1:29 PM, Jagan Teki wrote:
> On Wed, Mar 21, 2018 at 6:54 PM, Peng Fan wrote:
>>> >> >
>>> >> >
>>> >> >> -Original Message-
>>> >> >> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
>>> >> >> Sent: 2018年3月21日 17:19
On Tue, Mar 13, 2018 at 8:44 PM, Jagan Teki wrote:
> On Mon, Mar 5, 2018 at 6:47 PM, Eugeniy Paltsev
> wrote:
>> Various fixes and improvements of designware spi driver.
>>
>> Eugeniy Paltsev (5):
>> DW SPI: fix tx data loss on FIFO flush
On Wed, Mar 21, 2018 at 11:53 PM, Fabio Estevam wrote:
> On Wed, Mar 21, 2018 at 3:22 PM, Jagan Teki wrote:
>
>> As per imx notation, imx6 is correct instead if mx6 (which I was
>> thinking) yes all following mxN convention which we need to update,
On Wed, Mar 21, 2018 at 6:54 PM, Peng Fan wrote:
>> >> >
>> >> >
>> >> >> -Original Message-
>> >> >> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
>> >> >> Sent: 2018年3月21日 17:19
>> >> >> To: Peng Fan
>> >> >> Cc: Joe Hershberger
On Wed, Mar 21, 2018 at 3:22 PM, Jagan Teki wrote:
> As per imx notation, imx6 is correct instead if mx6 (which I was
> thinking) yes all following mxN convention which we need to update,
> here I'm changing only imx6 stuff throughout the series. I will do the
> reset
Hi Fabio,
On Wed, Mar 21, 2018 at 6:48 PM, Fabio Estevam wrote:
> Hi Jagan,
>
> On Mon, Mar 19, 2018 at 5:45 AM, Jagan Teki
> wrote:
>
>> -ifneq (,$(filter $(SOC), mx31 mx35 mx5 mx6 mx7 vf610))
>> +ifneq (,$(filter $(SOC), mx31 mx35 mx5 imx6 mx7
Hi Bin
2018-03-21 14:14 GMT+01:00 Bin Meng :
> Hi Christian,
>
> On Tue, Mar 20, 2018 at 9:18 PM, Christian Gmeiner
> wrote:
>> The section header address is a VMA whereas the address found in
>> the program header is a physical one. With this
On 02/26/2018 11:30 PM, Vini Pillai wrote:
> Fix NOR, SD and QSPI fallback option failure in case of secure boot
>
> Signed-off-by: Vinitha V Pillai
> ---
Minor change to commit message.
Applied to fsl-qoriq master. Thanks.
York
On 02/19/2018 12:46 AM, Ashish Kumar wrote:
> IFC-NOR and QSPI-NOR pins are muxed on SoC,so they
> cannot be accessed simultaneously, but
> IFC-NOR can be accessed along with SD-BOOT.
>
> ls1088aqds_sdcard_ifc_defconfig: is defconfig for
> SD as boot source and IFC-NOR to be used as flash,
> this
On 02/19/2018 12:44 AM, Ashish Kumar wrote:
> This function is required for enabling access to
> early i2c function for correct usage of QIXIS_READ
> and QIXIS_WRITE
>
> Signed-off-by: Ashish Kumar
> ---
Minor change to commit message.
Applied to fsl-qoriq master. Thanks.
On 02/19/2018 12:44 AM, Ashish Kumar wrote:
> get_board_ddr_clk(), get_board_sys_clk() and if_board_diff_clk() is now
> valid for CONFIG_SPL_BUILD
>
> Signed-off-by: Ashish Kumar
> ---
Minor change to commit message.
Applied to fsl-qoriq master. Thanks.
York
On 02/19/2018 12:43 AM, Ashish Kumar wrote:
> Signed-off-by: Ashish Kumar
> ---
Applied to fsl-qoriq master. Thanks.
York
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On Wed, Mar 21, 2018 at 03:44:45PM +0200, Felipe Balbi wrote:
> The following warnings are fixed:
>
> arch/arm/dts/am43x-epos-evm.dtb: Warning (interrupts_property): interrupts
> size is (8), expected multiple of 12 in /ocp/mcasp@48038000
> arch/arm/dts/am43x-epos-evm.dtb: Warning
On Tue, Mar 20, 2018 at 03:51:22PM +0100, Miquel Raynal wrote:
> Hi Tom,
>
> On Tue, 20 Mar 2018 10:04:55 -0400, Tom Rini wrote:
>
> > On Tue, Mar 20, 2018 at 02:36:56PM +0100, Miquel Raynal wrote:
> > > Hi Tom,
> > >
> > > Sorry for the delay.
> > >
> > > On Fri, 9 Mar
The following warnings are fixed:
arch/arm/dts/am43x-epos-evm.dtb: Warning (interrupts_property): interrupts size
is (8), expected multiple of 12 in /ocp/mcasp@48038000
arch/arm/dts/am43x-epos-evm.dtb: Warning (interrupts_property): interrupts size
is (8), expected multiple of 12 in
> >> >
> >> >
> >> >> -Original Message-
> >> >> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
> >> >> Sent: 2018年3月21日 17:19
> >> >> To: Peng Fan
> >> >> Cc: Joe Hershberger ; Fabio Estevam
> >> >> ; U-Boot Mailing
Hi Jagan,
On Mon, Mar 19, 2018 at 5:45 AM, Jagan Teki wrote:
> -ifneq (,$(filter $(SOC), mx31 mx35 mx5 mx6 mx7 vf610))
> +ifneq (,$(filter $(SOC), mx31 mx35 mx5 imx6 mx7 vf610))
I am not really seeing any benefit with this change.
All other i.MX use mxN convention,
There is the problem with current implementation if we start u-boot
from ROM, as we use global variables before ther initialization,
so these variables are overwritten when we copy .data section
from ROM.
So move these cache global variables into our arch "global data"
structure so that we may
Hi Christian,
On Tue, Mar 20, 2018 at 9:18 PM, Christian Gmeiner
wrote:
> The section header address is a VMA whereas the address found in
> the program header is a physical one. With this change it is
> possible to load and start a vx7 intel generic based image.
>
>
Move all checks before cache flush and IOC setup.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/cache.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index 99776066d3..8203fae145
Use is_isa_arcv2() function where it is possible instead of
CONFIG_ISA_ARCV2 define check to make code clear at the same time
keeping pretty much the same functionality - code in branches
under "if (is_isa_arcv2())" won't be compiled if CONFIG_ISA_ARCV2
is not defined, still need a couple of
Move pae exists check into slc_upper_region_init function itself
instead of its caller as more appropriate place.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/cache.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git
Add missing cache cleanup before cache disable:
* Flush and invalidate L1 D$ before disabling. Flush and invalidate
SLC before L1 D$ disabling (as it will be bypassed for data)
Otherwise we can lose some data when we disable L1 D$ if this data
isn't flushed to next level cache. Or we can
Implement icache_enabled and dcache_enabled as separate functions
which can be used with inline attribute. This is preparation to
make them always_inline.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/cache.c | 38 +-
1 file
As we are planning to get rid of dozens of ifdef's in cache.c we
would better check dcache status before each entire/line operation
then check CONFIG_SYS_DCACHE_OFF config option.
This makes the code clear.
Another advantage is that the dcache entire/line functions
remain functional even if we
If L1 data cache is disabled SL$ is bypassed for data and all
load/store requests are sent directly to main memory.
If L1 instructiona cache is disabled SL$ is NOT bypassed for
instructions and all instruction requests are fetched through
SLC.
Signed-off-by: Eugeniy Paltsev
Introduce is_isa_arcv2 and is_isa_arcompact functions.
As this functions only check configuration options and return
compile-time constant they can be used instead of #ifdef's to
to write clear code.
So we can write
-->8---
if (is_isa_arcv2())
ioc_configure();
Move IOC initialization to separate function from cache_init
function.
This is the preparation for the next patch when we will switch
to is_isa_arcv2() function using instead of "CONFIG_ISA_ARCV2"
ifdef using.
Also it makes cache_init function clear.
Signed-off-by: Eugeniy Paltsev
As of today we check slc status before each call of __slc_rgn_op
or __slc_entire_op. So move status check into __slc_rgn_op
and __slc_entire_op.
As we need to check status before *each* function call and we
slc_entire_op and slc_rgn_op functions from different places we add
this check directly
Use CONFIG_ARC_DBG_IOC_ENABLE Kconfig option instead of
ioc_enable global variable.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/Kconfig | 18
arch/arc/include/asm/cache.h | 5 +
arch/arc/lib/cache.c | 49
Add additional cache configuration checks and note about
supported configurations.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/cache.c | 75
1 file changed, 75 insertions(+)
diff --git a/arch/arc/lib/cache.c
Signed-off-by: Eugeniy Paltsev
---
arch/arc/include/asm/arc-bcr.h | 77 ++
arch/arc/lib/cache.c | 67 +---
2 files changed, 85 insertions(+), 59 deletions(-)
create mode 100644
There is the problem with current implementation if we start u-boot
from ROM, as we use cache global variables before ther initialization,
so these variables are overwritten when we copy .data section
from ROM.
So use icache_exists(), dcache_exists(), slc_exists(), pae_exists()
functions which
Implement specialized function to clenup caches (and therefore
sync I/D caches) which can be used for cleanup before linux
launch or to sync caches during uboot relocation.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/include/asm/cache.h | 1 +
arch/arc/lib/bootm.c
As of today __dc_line_op and __dc_entire_op support
only flush (OP_FLUSH) and invalidate (OP_INV) operations.
Add support of flush and invalidate (OP_FLUSH_N_INV)
operation which we planing to use in next patches.
Signed-off-by: Eugeniy Paltsev
---
We don't implement separate flush_dcache_all intentionally as
entire data cache invalidation is dangerous operation even if we flush
data cache right before invalidation.
There is the real example:
We may hang in the next code if we store any context (like
BLINK register) on stack in
Move icache entire operation to separate function as we are planing
to use it in another places (like sync_icache_dcache_all)
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/cache.c | 31 +++
1 file changed, 19 insertions(+), 12
__cache_line_loop function was copied from linux kernel code
where per line instruction cache operations are used. In
uboot we use only entire instruction cache operations, so
we can drop support of per line instruction cache operations
from __cache_line_loop function as __cache_line_loop is never
This iv v2 version of "ARC: cache subsystem improvement/refactoring"
patch series. You can find v1 patch series here:
http://patchwork.ozlabs.org/cover/873039/
Eugeniy Paltsev (20):
ARC: cache: move i$ entire operation to separate function
ARC: cache: remove per-line I$ operations as unused
Hi Stefan,
> > Lukasz Majewski hat am 14. März 2018 um 18:24
> > geschrieben:
> >
> >
> > This patch adds support for incrementation of the bootcount in SPL.
> > Such feature is necessary when we do want to use this feature with
> > 'falcon' boot mode (which loads OS directly in
From: Philipp Tomsich
Throughput tests have shown the sunxi_mmc driver to take over 10s to
read 10MB from a fast eMMC device due to excessive delays in polling
loops.
This commit restructures the main polling loops to use get_timer(...)
to determine
Hi Marek
On 03/19/2018 10:52 AM, Marek Vasut wrote:
> On 03/19/2018 09:05 AM, Patrice CHOTARD wrote:
>> Hi Marek
>
> Hi,
>
>> On 03/16/2018 05:28 PM, Marek Vasut wrote:
>>> On 03/16/2018 01:27 PM, Patrice Chotard wrote:
Allow passing in a custom configuration of the gotgctl
register
> Lukasz Majewski hat am 14. März 2018 um 18:24 geschrieben:
>
>
> This patch adds support for incrementation of the bootcount in SPL.
> Such feature is necessary when we do want to use this feature with
> 'falcon' boot mode (which loads OS directly in SPL).
>
> Signed-off-by:
> Lukasz Majewski hat am 14. März 2018 um 18:24 geschrieben:
>
>
> New, SPL related config option - CONFIG_SPL_BOOTCOUNT_LIMIT has been
> added to allow drivers/bootcount code re-usage in SPL.
>
> This code is necessary to use and setup bootcount in SPL in the case of
> falcon
Hello,
For some reason git clone fails if HTTP URL is used [at least for ARC's U-Boot
tree].
See:
--->8---
git clone http://git.denx.de/u-boot-arc.git
Cloning into 'u-boot-arc'...
warning: alternate disabled by http.followRedirects:
On 14.03.2018 18:24, Lukasz Majewski wrote:
The boot count is enabled in both SPL and proper u-boot.
Signed-off-by: Lukasz Majewski
Reviewed-by: Stefan Roese
Thanks,
Stefan
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On 14.03.2018 18:24, Lukasz Majewski wrote:
This patch is necessary for providing basic bootcount checking in the case
of using "falcon" boot mode in that board.
It forces u-boot proper boot, when we exceed the number of errors.
Signed-off-by: Lukasz Majewski
Reviewed-by:
Hi Stefan,
> On 14.03.2018 18:24, Lukasz Majewski wrote:
> > Those two functions can be used to provide easy bootcount
> > management.
> >
> > Signed-off-by: Lukasz Majewski
> >
> > ---
> >
> > Changes in v2:
> > - None
> >
> > include/bootcount.h | 25
On 14.03.2018 18:24, Lukasz Majewski wrote:
If the CONFIG_SPL_BOOTCOUNT_LIMIT is defined, the bootcount variable is
already incremented after each boot attempt.
For that reason we shall not increment it again in u-boot.
Signed-off-by: Lukasz Majewski
---
Changes in v2:
- None
On Wed, Mar 21, 2018 at 3:12 PM, Peng Fan wrote:
>
>
>> -Original Message-
>> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
>> Sent: 2018年3月21日 17:31
>> To: Peng Fan
>> Cc: Joe Hershberger ; Fabio Estevam
>>
On 14.03.2018 18:24, Lukasz Majewski wrote:
Signed-off-by: Lukasz Majewski
It is usually a requirement, to add a comment to the commit test. Even
with such simple changes. So please add at least one line here.
Other thank this:
Reviewed-by: Stefan Roese
On 14.03.2018 18:24, Lukasz Majewski wrote:
Those two functions can be used to provide easy bootcount management.
Signed-off-by: Lukasz Majewski
---
Changes in v2:
- None
include/bootcount.h | 25 +
1 file changed, 25 insertions(+)
diff --git
On 21.03.2018 10:42, Stefan Roese wrote:
On 07.03.2018 22:52, Marek Behún wrote:
The driver does not check id phy_connect failed (for example on wrong
property name in device tree). In such a case a fault occurs and the
CPU is restarted.
Signed-off-by: Marek Behun
---
On 07.03.2018 22:52, Marek Behún wrote:
The driver does not check id phy_connect failed (for example on wrong
property name in device tree). In such a case a fault occurs and the
CPU is restarted.
Signed-off-by: Marek Behun
---
drivers/net/mvneta.c | 4
1 file
> -Original Message-
> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
> Sent: 2018年3月21日 17:31
> To: Peng Fan
> Cc: Joe Hershberger ; Fabio Estevam
> ; U-Boot Mailing List
> Subject: Re: [U-Boot]
On 07.03.2018 22:52, Marek Behún wrote:
Move the reg_set* functions into comphy.h as static inline functions.
Change return type of get_*_string to const char *.
Signed-off-by: Marek Behun
Reviewed-by: Stefan Roese
Thanks,
Stefan
On 07.03.2018 22:52, Marek Behún wrote:
The groups pcie1, ptp and mii changed in new revision (from 2016).
Also smi was added to support enabling the MDIO pins.
Signed-off-by: Marek Behun
Reviewed-by: Stefan Roese
Thanks,
Stefan
On 07.03.2018 22:52, Marek Behún wrote:
Add support for the clk dump command on Armada 37xx.
Signed-off-by: Marek Behun
Reviewed-by: Stefan Roese
Thanks,
Stefan
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Please add Jagan (on Cc) to Cc for SPI driver related changes.
Please find some comments below...
On 07.03.2018 22:52, Marek Behún wrote:
> Since now we have driver for clocks on Armada 37xx, use it to determine
> SQF clock frequency for the SPI driver.
>
> Also change the default config files
On 07.03.2018 22:52, Marek Behún wrote:
The drivers are based on Linux driver by Gregory Clement.
The TBG clocks support only the .get_rate method.
- since setting rate is not supported, the driver computes the rates
when probing and so subsequent calls to the .get_rate method do not
On Wed, Mar 21, 2018 at 2:54 PM, Peng Fan wrote:
>
>
>> -Original Message-
>> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
>> Sent: 2018年3月21日 17:19
>> To: Peng Fan
>> Cc: Joe Hershberger ; Fabio Estevam
>>
> -Original Message-
> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
> Sent: 2018年3月21日 17:19
> To: Peng Fan
> Cc: Joe Hershberger ; Fabio Estevam
> ; U-Boot Mailing List
> Subject: Re: [U-Boot]
Kever,
Am 20.03.2018 um 15:46 schrieb Kever Yang:
> Hi Wadim,
>
>
> On 03/19/2018 11:39 PM, Wadim Egorov wrote:
>> The generic ehci-driver (ehci-generic.c) will try to enable the clocks
>> listed in the DTSI. If this fails (e.g. due to clk_enable not being
>> implemented in a driver and -ENOSYS
On 07.03.2018 22:52, Marek Behún wrote:
The driver is already in the tree and functional. Enable it by default
and also remove the board_early_init_f which was a temporary fix for
not having the pinctrl driver.
Signed-off-by: Marek Behun
Nice catch, thanks.
Reviewed-by:
On 07.03.2018 22:52, Marek Behún wrote:
In SGMII initialization PIN_PIPE_SEL has to be zero when resetting
the PHY. Since comphy_mux already set the selector register to
correct values, we have to store it's value before setting it to 0
and restore it after SGMII init.
Signed-off-by: Marek
On 07.03.2018 22:52, Marek Behún wrote:
Lane 0 supports SGMII1 and USB3.
Lane 1 supports SGMII0 and PEX0.
Lane 2 supports SATA0 and USB3.
This is needed for Armada 37xx.
Signed-off-by: Marek Behun
---
arch/arm/dts/armada-37xx.dtsi | 5 +++--
On 07.03.2018 22:52, Marek Behún wrote:
Currently comphy_mux supports only trivial order of nodes in pin
selector register, that is lane N on position N*bitcount.
Add support for nontrivial order, with map stored in device tree
property mux-lane-order.
This is needed for Armada 37xx.
On Wed, Mar 21, 2018 at 2:31 PM, Peng Fan wrote:
> On i.MX6SX, 6UL and 7D, there are two enet controllers each has a
> MDIO port. But Some boards share one MDIO port for the two enets. So
> introduce a configuration CONFIG_FEC_MXC_MDIO_BASE to indicate
> the MDIO port for
Hi Fabio
> -Original Message-
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: 2018年3月21日 3:47
> To: Peng Fan
> Cc: Peng Fan ; Fabio Estevam ;
> U-Boot-Denx
> Subject: Re: [U-Boot] [PATCH V5
On 07.03.2018 22:52, Marek Behún wrote:
This commit is based on commit d9899826 by
zachary
from u-boot-marvell, see
github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/d9899826
If its largely based on this commit, then you need to add a "From: ..."
as fist line
My goal is to sync lib/libfdt/ with scripts/dtc/libfdt/, that is,
make lib/libfdt/ contain only wrapper files.
fdt_region.c was written only for U-Boot to implement the verified
boot. So, this belongs to the same group as common/fdt_support.c,
which is a collection of U-Boot own fdt helpers.
fdt_region.c does not depend on anything in libfdt_internal.h
Signed-off-by: Masahiro Yamada
---
lib/libfdt/fdt_region.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/lib/libfdt/fdt_region.c b/lib/libfdt/fdt_region.c
index 70914a4..054c4b3 100644
---
This header needs to know 'fdt_region' is a struct for the
fit_region_make_list() prototype.
Signed-off-by: Masahiro Yamada
---
include/image.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/image.h b/include/image.h
index 621abf6..a6f82ae 100644
---
fdt_region APIs are not part of libfdt. They are U-Boot extension
for the verified boot. Split the declartions related to fdt_region
out ot . This allows to become a
simple wrapper file, like Linux does.
Signed-off-by: Masahiro Yamada
---
common/fdt_region.c
My goal is to make lib/libfdt/ only contain
wrapper files to scripts/dtc/libfdt/.
This will ease to pull-in improvement from the upstream.
Linux also does this; scripts/dtc/ is the mirror to the
upstream DTC.
U-Boot has lib/libfdt/fdt_region.c, but it is not a part
of libfdt. I want to move it
This macro is locally referenced in common/image-fdt.c
Signed-off-by: Masahiro Yamada
---
common/image-fdt.c | 3 +++
include/linux/libfdt.h | 3 ---
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/common/image-fdt.c b/common/image-fdt.c
index
On 07.03.2018 22:52, Marek Behún wrote:
According to specification, CFG_PM_RXDLOZ_WAIT should be set to 0x7
when reference clock is at 25 MHz. The specification (at least the
version I have) does not mentoin the setting for 40 MHz reference
clock, but Marvell's U-Boot sets 0xC in that case.
On 07.03.2018 22:52, Marek Behún wrote:
> When USB3 is on comphy lane 2 on the Armada 37xx, the registers
> have to be accessed indirectly via SATA indirect access.
>
> Signed-off-by: Marek Behun
Could you please describe, which problem this patch fixes? Is this
on an
To platforms has two enet interface, using dev->seq could
avoid conflict.
i.MX6UL/ULL evk board net get the wrong MAC address from fuse,
eth1 get MAC0 address, eth0 get MAC1 address from fuse. Set the
priv->dev_id to device->seq as the real net interface alias id then
.fec_get_hwaddr() read the
Add i.MX6UL/SX/SL compatible.
Signed-off-by: Peng Fan
Acked-by: Joe Hershberger
---
drivers/net/fec_mxc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index ba66c2f95a..765226e3ab 100644
---
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