[U-Boot] [PATCH v2 07/18] elf: Clean up the ELF header file

[Bin Meng]

Fix various style violations in elf.h
- use correct comment format if the comment fits in just one line
- remove the ending period for the one-line comment
- use tab for the indention instead of space
- put the opening brace at the same line of a typedef/union
- remove  in a 'typedef struct' for consistency

Signed-off-by: Bin Meng 
---

Changes in v2: None

 include/elf.h | 284 --
 1 file changed, 138 insertions(+), 146 deletions(-)

diff --git a/include/elf.h b/include/elf.h
index fe2128f..4742597 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -5,10 +5,7 @@
  * SPDX-License-Identifier:BSD-3-Clause
  */
 
-/*
- * This is the ELF ABI header file
- * formerly known as "elf_abi.h".
- */
+/* This is the ELF ABI header file formerly known as "elf_abi.h" */
 
 #ifndef _ELF_H
 #define _ELF_H
@@ -16,20 +13,16 @@
 #ifndef __ASSEMBLER__
 #include "compiler.h"
 
-/*
- *  This version doesn't work for 64-bit ABIs - Erik.
- */
+/* This version doesn't work for 64-bit ABIs - Erik */
 
-/*
- * These typedefs need to be handled better.
- */
+/* These typedefs need to be handled better */
 typedef uint32_t   Elf32_Addr; /* Unsigned program address */
 typedef uint32_t   Elf32_Off;  /* Unsigned file offset */
 typedef int32_tElf32_Sword;/* Signed large integer */
 typedef uint32_t   Elf32_Word; /* Unsigned large integer */
 typedef uint16_t   Elf32_Half; /* Unsigned medium integer */
 
-/* 64-bit ELF base types. */
+/* 64-bit ELF base types */
 typedef uint64_t   Elf64_Addr;
 typedef uint16_t   Elf64_Half;
 typedef int16_tElf64_SHalf;
@@ -96,7 +89,7 @@ typedef int64_t   Elf64_Sxword;
  (ehdr).e_ident[EI_MAG3] == ELFMAG3)
 
 /* ELF Header */
-typedef struct elfhdr{
+typedef struct {
unsigned char   e_ident[EI_NIDENT]; /* ELF Identification */
Elf32_Half  e_type; /* object file type */
Elf32_Half  e_machine;  /* machine */
@@ -122,9 +115,9 @@ typedef struct elfhdr{
 #define ET_CORE4   /* core file */
 #define ET_NUM 5   /* number of types */
 #define ET_LOOS0xfe00  /* reserved range for operating 
*/
-#define ET_HIOS0xfeff  /*  system specific e_type */
+#define ET_HIOS0xfeff  /* system specific e_type */
 #define ET_LOPROC  0xff00  /* reserved range for processor */
-#define ET_HIPROC  0x  /*  specific e_type */
+#define ET_HIPROC  0x  /* specific e_type */
 
 /* e_machine */
 #define EM_NONE0   /* No Machine */
@@ -235,9 +228,9 @@ typedef struct {
 #define SHN_UNDEF  0   /* undefined */
 #define SHN_LORESERVE  0xff00  /* lower bounds of reserved indexes */
 #define SHN_LOPROC 0xff00  /* reserved range for processor */
-#define SHN_HIPROC 0xff1f  /*   specific section indexes */
+#define SHN_HIPROC 0xff1f  /* specific section indexes */
 #define SHN_LOOS   0xff20  /* reserved range for operating */
-#define SHN_HIOS   0xff3f  /*   specific semantics */
+#define SHN_HIOS   0xff3f  /* specific semantics */
 #define SHN_ABS0xfff1  /* absolute value */
 #define SHN_COMMON 0xfff2  /* common symbol */
 #define SHN_XINDEX 0x  /* Index is an extra table */
@@ -265,46 +258,46 @@ typedef struct {
 #define SHT_LOOS   0x6000  /* Start OS-specific */
 #define SHT_HIOS   0x6fff  /* End OS-specific */
 #define SHT_LOPROC 0x7000  /* reserved range for processor */
-#define SHT_HIPROC 0x7fff  /*  specific section header types */
+#define SHT_HIPROC 0x7fff  /* specific section header types */
 #define SHT_LOUSER 0x8000  /* reserved range for application */
-#define SHT_HIUSER 0x  /*  specific indexes */
+#define SHT_HIUSER 0x  /* specific indexes */
 
 /* Section names */
-#define ELF_BSS ".bss" /* uninitialized data */
+#define ELF_BSS".bss"  /* uninitialized data */
 #define ELF_COMMENT".comment"  /* version control information */
-#define ELF_DATA".data"/* initialized data */
-#define ELF_DATA1   ".data1"   /* initialized data */
-#define ELF_DEBUG   ".debug"   /* debug */
-#define ELF_DYNAMIC ".dynamic" /* dynamic linking information */
-#define ELF_DYNSTR  ".dynstr"  /* dynamic string table */
-#define ELF_DYNSYM  ".dynsym"  /* dynamic symbol table */
-#define ELF_FINI".fini"/* termination code */
+#define ELF_DATA   ".data" /* initialized data */
+#define ELF_DATA1  ".data1"/* initialized data */
+#define 

[U-Boot] [PATCH v2 10/18] bios: vesa: Guard setting vesa mode with CONFIG_FRAMEBUFFER_SET_VESA_MODE

[Bin Meng]

If CONFIG_FRAMEBUFFER_SET_VESA_MODE is not set, don't switch
graphics card to VESA mode. This applies to both native mode
and emulator mode of running the VGA BIOS.

Signed-off-by: Bin Meng 
---

Changes in v2: None

 arch/x86/lib/bios.c | 4 
 drivers/bios_emulator/atibios.c | 4 
 2 files changed, 8 insertions(+)

diff --git a/arch/x86/lib/bios.c b/arch/x86/lib/bios.c
index 66d7629..f9092fd 100644
--- a/arch/x86/lib/bios.c
+++ b/arch/x86/lib/bios.c
@@ -185,6 +185,7 @@ static void setup_realmode_idt(void)
write_idt_stub((void *)0xffe6e, 0x1a);
 }
 
+#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
 static u8 vbe_get_mode_info(struct vbe_mode_info *mi)
 {
u16 buffer_seg;
@@ -241,6 +242,7 @@ static void vbe_set_graphics(int vesa_mode, struct 
vbe_mode_info *mode_info)
mode_info->video_mode &= 0x3ff;
vbe_set_mode(mode_info);
 }
+#endif /* CONFIG_FRAMEBUFFER_SET_VESA_MODE */
 
 void bios_run_on_x86(struct udevice *dev, unsigned long addr, int vesa_mode,
 struct vbe_mode_info *mode_info)
@@ -273,8 +275,10 @@ void bios_run_on_x86(struct udevice *dev, unsigned long 
addr, int vesa_mode,
  0x0);
debug("done\n");
 
+#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
if (vesa_mode != -1)
vbe_set_graphics(vesa_mode, mode_info);
+#endif
 }
 
 asmlinkage int interrupt_handler(u32 intnumber, u32 gsfs, u32 dses,
diff --git a/drivers/bios_emulator/atibios.c b/drivers/bios_emulator/atibios.c
index 2d5b5dc..07e45f2 100644
--- a/drivers/bios_emulator/atibios.c
+++ b/drivers/bios_emulator/atibios.c
@@ -78,6 +78,7 @@ static const void *bios_ptr(const void *buf, BE_VGAInfo 
*vga_info,
return buf + (flat - vbe_offset);
 }
 
+#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
 static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs,
  int vesa_mode, struct vbe_mode_info *mode_info)
 {
@@ -215,6 +216,7 @@ static int atibios_set_vesa_mode(RMREGS *regs, int 
vesa_mode,
 
return 0;
 }
+#endif /* CONFIG_FRAMEBUFFER_SET_VESA_MODE */
 
 /
 PARAMETERS:
@@ -263,11 +265,13 @@ static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo 
*vga_info,
/*Cleanup and exit*/
BE_getVGA(vga_info);
 
+#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
/* Useful for debugging */
if (0)
atibios_debug_mode(vga_info, , vesa_mode, mode_info);
if (vesa_mode != -1)
atibios_set_vesa_mode(, vesa_mode, mode_info);
+#endif
 }
 
 /
-- 
2.7.4

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[U-Boot] [PATCH v2 15/18] bootvx: Refactor the bootline copy codes a little bit

[Bin Meng]

There is a small duplication in do_bootvx() that does the bootline
copy. Refactor this a little bit to make it simpler.

Signed-off-by: Bin Meng 
---

Changes in v2: None

 cmd/elf.c | 15 +--
 1 file changed, 5 insertions(+), 10 deletions(-)

diff --git a/cmd/elf.c b/cmd/elf.c
index cd98392..22ff254 100644
--- a/cmd/elf.c
+++ b/cmd/elf.c
@@ -312,12 +312,7 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 * construct the info.
 */
bootline = env_get("bootargs");
-   if (bootline) {
-   memcpy((void *)bootaddr, bootline,
-  max(strlen(bootline), (size_t)255));
-   flush_cache(bootaddr, max(strlen(bootline),
- (size_t)255));
-   } else {
+   if (!bootline) {
tmp = env_get("bootdev");
if (tmp) {
strcpy(build_buf, tmp);
@@ -368,12 +363,12 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
ptr += strlen(tmp);
}
 
-   memcpy((void *)bootaddr, build_buf,
-  max(strlen(build_buf), (size_t)255));
-   flush_cache(bootaddr, max(strlen(build_buf),
- (size_t)255));
+   bootline = build_buf;
}
 
+   memcpy((void *)bootaddr, bootline,
+  max(strlen(bootline), (size_t)255));
+   flush_cache(bootaddr, max(strlen(bootline), (size_t)255));
printf("## Using bootline (@ 0x%lx): %s\n", bootaddr,
   (char *)bootaddr);
}
-- 
2.7.4

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[U-Boot] [PATCH v2 13/18] pci: video: Only print out when everything is OK

[Bin Meng]

If video initialization fails, the "Video:" output message will be
mixed with the next console log. Change to print out such message
only when everything is OK, which improves the boot log readability.

Signed-off-by: Bin Meng 
---

Changes in v2: None

 drivers/pci/pci_rom.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c
index 46fe5e6..7f46194 100644
--- a/drivers/pci/pci_rom.c
+++ b/drivers/pci/pci_rom.c
@@ -355,8 +355,6 @@ int vbe_setup_video(struct udevice *dev, int 
(*int15_handler)(void))
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
int ret;
 
-   printf("Video: ");
-
/* If we are running from EFI or coreboot, this can't work */
if (!ll_boot_init()) {
printf("Not available (previous bootloader prevents it)\n");
@@ -377,7 +375,7 @@ int vbe_setup_video(struct udevice *dev, int 
(*int15_handler)(void))
return ret;
}
 
-   printf("%dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
+   printf("Video: %dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
   mode_info.vesa.bits_per_pixel);
 
return 0;
-- 
2.7.4

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[U-Boot] [PATCH v2 09/18] elf: Add a very simple ELF64 loader

[Bin Meng]

This adds a very simple ELF64 loader via program headers, similar
to load_elf_image_phdr() that we already have.

Signed-off-by: Bin Meng 

---

Changes in v2:
- update the ELF32 and ELF64 loader comments

 cmd/elf.c | 44 +++-
 1 file changed, 43 insertions(+), 1 deletion(-)

diff --git a/cmd/elf.c b/cmd/elf.c
index 824f88e..8a0e7d9 100644
--- a/cmd/elf.c
+++ b/cmd/elf.c
@@ -24,8 +24,46 @@
 #endif
 
 /*
- * A very simple elf loader, assumes the image is valid, returns the
+ * A very simple ELF64 loader, assumes the image is valid, returns the
  * entry point address.
+ *
+ * Note if U-Boot is 32-bit, the loader assumes the to segment's
+ * physical address and size is within the lower 32-bit address space.
+ */
+static unsigned long load_elf64_image_phdr(unsigned long addr)
+{
+   Elf64_Ehdr *ehdr; /* Elf header structure pointer */
+   Elf64_Phdr *phdr; /* Program header structure pointer */
+   int i;
+
+   ehdr = (Elf64_Ehdr *)addr;
+   phdr = (Elf64_Phdr *)(addr + (ulong)ehdr->e_phoff);
+
+   /* Load each program header */
+   for (i = 0; i < ehdr->e_phnum; ++i) {
+   void *dst = (void *)(ulong)phdr->p_paddr;
+   void *src = (void *)addr + phdr->p_offset;
+
+   debug("Loading phdr %i to 0x%p (%lu bytes)\n",
+ i, dst, (ulong)phdr->p_filesz);
+   if (phdr->p_filesz)
+   memcpy(dst, src, phdr->p_filesz);
+   if (phdr->p_filesz != phdr->p_memsz)
+   memset(dst + phdr->p_filesz, 0x00,
+  phdr->p_memsz - phdr->p_filesz);
+   flush_cache((unsigned long)dst, phdr->p_filesz);
+   ++phdr;
+   }
+
+   return ehdr->e_entry;
+}
+
+/*
+ * A very simple ELF loader, assumes the image is valid, returns the
+ * entry point address.
+ *
+ * The loader firstly reads the EFI class to see if it's a 64-bit image.
+ * If yes, call the ELF64 loader. Otherwise continue with the ELF32 loader.
  */
 static unsigned long load_elf_image_phdr(unsigned long addr)
 {
@@ -34,12 +72,16 @@ static unsigned long load_elf_image_phdr(unsigned long addr)
int i;
 
ehdr = (Elf32_Ehdr *)addr;
+   if (ehdr->e_ident[EI_CLASS] == ELFCLASS64)
+   return load_elf64_image_phdr(addr);
+
phdr = (Elf32_Phdr *)(addr + ehdr->e_phoff);
 
/* Load each program header */
for (i = 0; i < ehdr->e_phnum; ++i) {
void *dst = (void *)(uintptr_t)phdr->p_paddr;
void *src = (void *)addr + phdr->p_offset;
+
debug("Loading phdr %i to 0x%p (%i bytes)\n",
  i, dst, phdr->p_filesz);
if (phdr->p_filesz)
-- 
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[U-Boot] [PATCH v2 06/18] x86: Rename e820entry to e820_entry

[Bin Meng]

This changes 'struct e820entry' to 'struct e820_entry' to conform
with the coding style.

Signed-off-by: Bin Meng 
---

Changes in v2: None

 arch/x86/cpu/coreboot/sdram.c| 2 +-
 arch/x86/cpu/qemu/e820.c | 2 +-
 arch/x86/cpu/tangier/sdram.c | 4 ++--
 arch/x86/include/asm/bootparam.h | 2 +-
 arch/x86/include/asm/e820.h  | 4 ++--
 arch/x86/lib/coreboot_table.c| 2 +-
 arch/x86/lib/e820.c  | 2 +-
 arch/x86/lib/fsp/fsp_dram.c  | 2 +-
 cmd/elf.c| 6 +++---
 9 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c
index 05918bc..885fc6f 100644
--- a/arch/x86/cpu/coreboot/sdram.c
+++ b/arch/x86/cpu/coreboot/sdram.c
@@ -13,7 +13,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 unsigned int install_e820_map(unsigned int max_entries,
- struct e820entry *entries)
+ struct e820_entry *entries)
 {
unsigned int num_entries;
int i;
diff --git a/arch/x86/cpu/qemu/e820.c b/arch/x86/cpu/qemu/e820.c
index 11409dd..ec733cb 100644
--- a/arch/x86/cpu/qemu/e820.c
+++ b/arch/x86/cpu/qemu/e820.c
@@ -10,7 +10,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 unsigned int install_e820_map(unsigned int max_entries,
- struct e820entry *entries)
+ struct e820_entry *entries)
 {
entries[0].addr = 0;
entries[0].size = ISA_START_ADDRESS;
diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c
index daa9909..f5f412a 100644
--- a/arch/x86/cpu/tangier/sdram.c
+++ b/arch/x86/cpu/tangier/sdram.c
@@ -100,7 +100,7 @@ static struct sfi_table_simple *sfi_search_mmap(void)
 i++, mentry++) \
 
 static unsigned int sfi_setup_e820(unsigned int max_entries,
-  struct e820entry *entries)
+  struct e820_entry *entries)
 {
struct sfi_table_simple *sb;
struct sfi_mem_entry *mentry;
@@ -190,7 +190,7 @@ static phys_size_t sfi_get_ram_size(void)
 }
 
 unsigned int install_e820_map(unsigned int max_entries,
- struct e820entry *entries)
+ struct e820_entry *entries)
 {
return sfi_setup_e820(max_entries, entries);
 }
diff --git a/arch/x86/include/asm/bootparam.h b/arch/x86/include/asm/bootparam.h
index 6aba614..0386cbe 100644
--- a/arch/x86/include/asm/bootparam.h
+++ b/arch/x86/include/asm/bootparam.h
@@ -111,7 +111,7 @@ struct boot_params {
struct setup_header hdr;/* setup header */  /* 0x1f1 */
__u8  _pad7[0x290-0x1f1-sizeof(struct setup_header)];
__u32 edd_mbr_sig_buffer[EDD_MBR_SIG_MAX];  /* 0x290 */
-   struct e820entry e820_map[E820MAX]; /* 0x2d0 */
+   struct e820_entry e820_map[E820MAX];/* 0x2d0 */
__u8  _pad8[48];/* 0xcd0 */
struct edd_info eddbuf[EDDMAXNR];   /* 0xd00 */
__u8  _pad9[276];   /* 0xeec */
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index 8355c34..9d29f82 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -12,7 +12,7 @@
 #ifndef __ASSEMBLY__
 #include 
 
-struct e820entry {
+struct e820_entry {
__u64 addr; /* start of memory segment */
__u64 size; /* size of memory segment */
__u32 type; /* type of memory segment */
@@ -25,6 +25,6 @@ struct e820entry {
 
 /* Implementation defined function to install an e820 map */
 unsigned int install_e820_map(unsigned int max_entries,
- struct e820entry *);
+ struct e820_entry *);
 
 #endif /* _ASM_X86_E820_H */
diff --git a/arch/x86/lib/coreboot_table.c b/arch/x86/lib/coreboot_table.c
index b1b4cd9..5e0edd3 100644
--- a/arch/x86/lib/coreboot_table.c
+++ b/arch/x86/lib/coreboot_table.c
@@ -100,7 +100,7 @@ void write_coreboot_table(u32 addr, struct memory_area 
*cfg_tables)
struct cb_record *cbr;
struct cb_memory *mem;
struct cb_memory_range *map;
-   struct e820entry e820[32];
+   struct e820_entry e820[32];
struct cb_framebuffer *fb;
struct vesa_mode_info *vesa;
int i, num;
diff --git a/arch/x86/lib/e820.c b/arch/x86/lib/e820.c
index c2595b1..84c8fab 100644
--- a/arch/x86/lib/e820.c
+++ b/arch/x86/lib/e820.c
@@ -18,7 +18,7 @@ DECLARE_GLOBAL_DATA_PTR;
  * CONFIG_PCIE_ECAM_BASE   PCIe ECAM
  */
 __weak unsigned int install_e820_map(unsigned int max_entries,
-struct e820entry *entries)
+struct e820_entry *entries)
 {
entries[0].addr = 0;
entries[0].size = ISA_START_ADDRESS;
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index c1c6c54..662d4ac 100644
--- 

[U-Boot] [PATCH v2 11/18] video: vesa: Change default FRAMEBUFFER_VESA_MODE

[Bin Meng]

This changes the default FRAMEBUFFER_VESA_MODE to use 32-bit pixel
format for better VxWorks compatibility.

Signed-off-by: Bin Meng 
---

Changes in v2: None

 drivers/video/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 45a105d..4c4d286 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -174,7 +174,7 @@ config FRAMEBUFFER_SET_VESA_MODE
 
 choice
prompt "framebuffer graphics resolution"
-   default FRAMEBUFFER_VESA_MODE_117
+   default FRAMEBUFFER_VESA_MODE_118
depends on FRAMEBUFFER_SET_VESA_MODE
help
  This option sets the resolution used for the U-Boot framebuffer (and
-- 
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[U-Boot] [PATCH v2 05/18] x86: Use 'unsigned int' in install_e820_map() functions

[Bin Meng]

This fixes the following checkpatch warning:

  warning: Prefer 'unsigned int' to bare use of 'unsigned'

Signed-off-by: Bin Meng 
---

Changes in v2: None

 arch/x86/cpu/coreboot/sdram.c | 7 ---
 arch/x86/cpu/qemu/e820.c  | 3 ++-
 arch/x86/cpu/tangier/sdram.c  | 6 --
 arch/x86/include/asm/e820.h   | 3 ++-
 arch/x86/lib/e820.c   | 4 ++--
 arch/x86/lib/fsp/fsp_dram.c   | 5 +++--
 6 files changed, 17 insertions(+), 11 deletions(-)

diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c
index 82407af..05918bc 100644
--- a/arch/x86/cpu/coreboot/sdram.c
+++ b/arch/x86/cpu/coreboot/sdram.c
@@ -12,12 +12,13 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
+unsigned int install_e820_map(unsigned int max_entries,
+ struct e820entry *entries)
 {
-   unsigned num_entries;
+   unsigned int num_entries;
int i;
 
-   num_entries = min((unsigned)lib_sysinfo.n_memranges, max_entries);
+   num_entries = min((unsigned int)lib_sysinfo.n_memranges, max_entries);
if (num_entries < lib_sysinfo.n_memranges) {
printf("Warning: Limiting e820 map to %d entries.\n",
num_entries);
diff --git a/arch/x86/cpu/qemu/e820.c b/arch/x86/cpu/qemu/e820.c
index c1c9b89..11409dd 100644
--- a/arch/x86/cpu/qemu/e820.c
+++ b/arch/x86/cpu/qemu/e820.c
@@ -9,7 +9,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
+unsigned int install_e820_map(unsigned int max_entries,
+ struct e820entry *entries)
 {
entries[0].addr = 0;
entries[0].size = ISA_START_ADDRESS;
diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c
index eae8d78..daa9909 100644
--- a/arch/x86/cpu/tangier/sdram.c
+++ b/arch/x86/cpu/tangier/sdram.c
@@ -99,7 +99,8 @@ static struct sfi_table_simple *sfi_search_mmap(void)
 i < SFI_GET_NUM_ENTRIES(sb, struct sfi_mem_entry); \
 i++, mentry++) \
 
-static unsigned sfi_setup_e820(unsigned max_entries, struct e820entry *entries)
+static unsigned int sfi_setup_e820(unsigned int max_entries,
+  struct e820entry *entries)
 {
struct sfi_table_simple *sb;
struct sfi_mem_entry *mentry;
@@ -188,7 +189,8 @@ static phys_size_t sfi_get_ram_size(void)
return ram;
 }
 
-unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
+unsigned int install_e820_map(unsigned int max_entries,
+ struct e820entry *entries)
 {
return sfi_setup_e820(max_entries, entries);
 }
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index 351f021..8355c34 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -24,6 +24,7 @@ struct e820entry {
 #endif /* __ASSEMBLY__ */
 
 /* Implementation defined function to install an e820 map */
-unsigned install_e820_map(unsigned max_entries, struct e820entry *);
+unsigned int install_e820_map(unsigned int max_entries,
+ struct e820entry *);
 
 #endif /* _ASM_X86_E820_H */
diff --git a/arch/x86/lib/e820.c b/arch/x86/lib/e820.c
index 5babfde..c2595b1 100644
--- a/arch/x86/lib/e820.c
+++ b/arch/x86/lib/e820.c
@@ -17,8 +17,8 @@ DECLARE_GLOBAL_DATA_PTR;
  * 0x10-gd->ram_size   Useable RAM
  * CONFIG_PCIE_ECAM_BASE   PCIe ECAM
  */
-__weak unsigned install_e820_map(unsigned max_entries,
-struct e820entry *entries)
+__weak unsigned int install_e820_map(unsigned int max_entries,
+struct e820entry *entries)
 {
entries[0].addr = 0;
entries[0].size = ISA_START_ADDRESS;
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index 1a7af57..c1c6c54 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -62,9 +62,10 @@ ulong board_get_usable_ram_top(ulong total_size)
return fsp_get_usable_lowmem_top(gd->arch.hob_list);
 }
 
-unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
+unsigned int install_e820_map(unsigned int max_entries,
+ struct e820entry *entries)
 {
-   unsigned num_entries = 0;
+   unsigned int num_entries = 0;
const struct hob_header *hdr;
struct hob_res_desc *res_desc;
 
-- 
2.7.4

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[U-Boot] [PATCH v2 17/18] bootvx: x86: Assign bootaddr based on kernel memory base

[Bin Meng]

On VxWorks x86 its bootline address is at a pre-defined offset @
0x1200. If 'bootaddr' is not passed via environment variable, we
assign its value based on the kernel memory base address.

Signed-off-by: Bin Meng 
---

Changes in v2: None

 cmd/elf.c | 91 +--
 include/vxworks.h |  3 ++
 2 files changed, 51 insertions(+), 43 deletions(-)

diff --git a/cmd/elf.c b/cmd/elf.c
index 0c84664..91e866b 100644
--- a/cmd/elf.c
+++ b/cmd/elf.c
@@ -245,7 +245,7 @@ int do_bootelf(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
unsigned long addr; /* Address of image */
-   unsigned long bootaddr; /* Address to put the bootline */
+   unsigned long bootaddr = 0; /* Address to put the bootline */
char *bootline; /* Text of the bootline */
char *tmp; /* Temporary char pointer */
char build_buf[128]; /* Buffer for building the bootline */
@@ -294,6 +294,45 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
puts("## Ethernet MAC address not copied to NV RAM\n");
 #endif
 
+#ifdef CONFIG_X86
+   /*
+* Get VxWorks's physical memory base address from environment,
+* if we don't specify it in the environment, use a default one.
+*/
+   base = env_get_hex("vx_phys_mem_base", VXWORKS_PHYS_MEM_BASE);
+   data = (struct e820_entry *)(base + E820_DATA_OFFSET);
+   info = (struct e820_info *)(base + E820_INFO_OFFSET);
+
+   memset(info, 0, sizeof(struct e820_info));
+   info->sign = E820_SIGNATURE;
+   info->entries = install_e820_map(E820MAX, data);
+   info->addr = (info->entries - 1) * sizeof(struct e820_entry) +
+E820_DATA_OFFSET;
+
+   /*
+* Explicitly clear the bootloader image size otherwise if memory
+* at this offset happens to contain some garbage data, the final
+* available memory size for the kernel is insane.
+*/
+   *(u32 *)(base + BOOT_IMAGE_SIZE_OFFSET) = 0;
+
+   /*
+* Prepare compatible framebuffer information block.
+* The VESA mode has to be 32-bit RGBA.
+*/
+   if (vesa->x_resolution && vesa->y_resolution) {
+   gop = (struct efi_gop_info *)(base + EFI_GOP_INFO_OFFSET);
+   gop->magic = EFI_GOP_INFO_MAGIC;
+   gop->info.version = 0;
+   gop->info.width = vesa->x_resolution;
+   gop->info.height = vesa->y_resolution;
+   gop->info.pixel_format = EFI_GOT_RGBA8;
+   gop->info.pixels_per_scanline = vesa->bytes_per_scanline / 4;
+   gop->fb_base = vesa->phys_base_ptr;
+   gop->fb_size = vesa->bytes_per_scanline * vesa->y_resolution;
+   }
+#endif
+
/*
 * Use bootaddr to find the location in memory that VxWorks
 * will look for the bootline string. The default value is
@@ -302,11 +341,16 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
 */
tmp = env_get("bootaddr");
if (!tmp) {
-   printf("## VxWorks bootline address not specified\n");
-   return 1;
+   if (CONFIG_IS_ENABLED(X86)) {
+   bootaddr = base + X86_BOOT_LINE_OFFSET;
+   } else {
+   printf("## VxWorks bootline address not specified\n");
+   return 1;
+   }
}
 
-   bootaddr = simple_strtoul(tmp, NULL, 16);
+   if (!bootaddr)
+   bootaddr = simple_strtoul(tmp, NULL, 16);
 
/*
 * Check to see if the bootline is defined in the 'bootargs' parameter.
@@ -370,45 +414,6 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
flush_cache(bootaddr, max(strlen(bootline), (size_t)255));
printf("## Using bootline (@ 0x%lx): %s\n", bootaddr, (char *)bootaddr);
 
-#ifdef CONFIG_X86
-   /*
-* Get VxWorks's physical memory base address from environment,
-* if we don't specify it in the environment, use a default one.
-*/
-   base = env_get_hex("vx_phys_mem_base", VXWORKS_PHYS_MEM_BASE);
-   data = (struct e820_entry *)(base + E820_DATA_OFFSET);
-   info = (struct e820_info *)(base + E820_INFO_OFFSET);
-
-   memset(info, 0, sizeof(struct e820_info));
-   info->sign = E820_SIGNATURE;
-   info->entries = install_e820_map(E820MAX, data);
-   info->addr = (info->entries - 1) * sizeof(struct e820_entry) +
-E820_DATA_OFFSET;
-
-   /*
-* Explicitly clear the bootloader image size otherwise if memory
-* at this offset happens to contain some garbage data, the final
-* available memory size for the kernel is insane.
-*/
-   *(u32 *)(base + BOOT_IMAGE_SIZE_OFFSET) = 0;
-
-   /*
-* Prepare 

[U-Boot] [PATCH v2 18/18] doc: vxworks: Update x86 specific instructions

[Bin Meng]

This updates the doc of booting VxWorks, like loading an x64 kernel,
and how to make VxWorks graphics console driver work.

Signed-off-by: Bin Meng 

---

Changes in v2:
- update the graphics console driver information

 doc/README.vxworks | 21 +++--
 1 file changed, 19 insertions(+), 2 deletions(-)

diff --git a/doc/README.vxworks b/doc/README.vxworks
index b95a516..3d31db9 100644
--- a/doc/README.vxworks
+++ b/doc/README.vxworks
@@ -17,8 +17,6 @@ For booting old kernels (6.9.x) on PowerPC and ARM, and all 
kernel versions
 on other architectures, 'bootvx' shall be used. For booting VxWorks 7 kernels
 on PowerPC and ARM, 'bootm' shall be used.
 
-64-bit x86 kernel cannot be loaded as of today.
-
 VxWork 7 on PowerPC and ARM
 ---
 From VxWorks 7, VxWorks starts adopting device tree as its hardware decription
@@ -79,3 +77,22 @@ For boards on which ACPI is not supported by U-Boot yet, 
VxWorks kernel must
 be configured to use MP table and virtual wire interrupt mode. This requires
 INCLUDE_MPTABLE_BOOT_OP and INCLUDE_VIRTUAL_WIRE_MODE to be included in a
 VxWorks kernel configuration.
+
+Both 32-bit x86 and 64-bit x64 kernels can be loaded.
+
+There are two types of graphics console drivers in VxWorks. One is the 80x25
+VGA text mode driver. The other one is the EFI console bitmapped graphics mode
+driver. To make these drivers function, U-Boot needs to load and run the VGA
+BIOS of the graphics card first.
+
+- If the kernel is configured with 80x25 VGA text mode driver,
+  CONFIG_FRAMEBUFFER_SET_VESA_MODE must be unset in U-Boot.
+- If the kernel is configured with bitmapped graphics mode driver,
+  CONFIG_FRAMEBUFFER_SET_VESA_MODE need remain set but care must be taken
+  at which VESA mode is to be set. The supported pixel format is 32-bit
+  RGBA, hence the available VESA mode can only be one of the following:
+* FRAMEBUFFER_VESA_MODE_10F
+* FRAMEBUFFER_VESA_MODE_112
+* FRAMEBUFFER_VESA_MODE_115
+* FRAMEBUFFER_VESA_MODE_118
+* FRAMEBUFFER_VESA_MODE_11B
-- 
2.7.4

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[U-Boot] [PATCH v2 14/18] bootvx: x86: Make VxWorks EFI console driver happy

[Bin Meng]

When booting from EFI BIOS, VxWorks bootloader stores the EFI GOP
framebuffer info at a pre-defined offset @ 0x6100. When VxWorks
kernel boots up, its EFI console driver tries to find such a block
and if the signature matches, the framebuffer information will be
used to initialize the driver.

However it is not necessary to prepare an EFI environment for
VxWorks's EFI console driver to function (eg: EFI loader in
U-Boot). If U-Boot has already initialized the graphics card and
set it to a VESA mode that is compatible with EFI GOP, we can
simply prepare such a block for VxWorks.

Signed-off-by: Bin Meng 
---

Changes in v2: None

 cmd/elf.c | 19 +++
 include/vxworks.h | 26 ++
 2 files changed, 45 insertions(+)

diff --git a/cmd/elf.c b/cmd/elf.c
index 8a0e7d9..cd98392 100644
--- a/cmd/elf.c
+++ b/cmd/elf.c
@@ -19,6 +19,7 @@
 #include 
 #include 
 #ifdef CONFIG_X86
+#include 
 #include 
 #include 
 #endif
@@ -253,6 +254,8 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
ulong base;
struct e820_info *info;
struct e820_entry *data;
+   struct efi_gop_info *gop;
+   struct vesa_mode_info *vesa = _info.vesa;
 #endif
 
/*
@@ -396,6 +399,22 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 * available memory size for the kernel is insane.
 */
*(u32 *)(base + BOOT_IMAGE_SIZE_OFFSET) = 0;
+
+   /*
+* Prepare compatible framebuffer information block.
+* The VESA mode has to be 32-bit RGBA.
+*/
+   if (vesa->x_resolution && vesa->y_resolution) {
+   gop = (struct efi_gop_info *)(base + EFI_GOP_INFO_OFFSET);
+   gop->magic = EFI_GOP_INFO_MAGIC;
+   gop->info.version = 0;
+   gop->info.width = vesa->x_resolution;
+   gop->info.height = vesa->y_resolution;
+   gop->info.pixel_format = EFI_GOT_RGBA8;
+   gop->info.pixels_per_scanline = vesa->bytes_per_scanline / 4;
+   gop->fb_base = vesa->phys_base_ptr;
+   gop->fb_size = vesa->bytes_per_scanline * vesa->y_resolution;
+   }
 #endif
 
/*
diff --git a/include/vxworks.h b/include/vxworks.h
index 4a83a34..b1b5096 100644
--- a/include/vxworks.h
+++ b/include/vxworks.h
@@ -8,6 +8,8 @@
 #ifndef _VXWORKS_H_
 #define _VXWORKS_H_
 
+#include 
+
 /*
  * Physical address of memory base for VxWorks x86
  * This is LOCAL_MEM_LOCAL_ADRS in the VxWorks kernel configuration.
@@ -52,6 +54,30 @@ struct e820_info {
  */
 #define BOOT_IMAGE_SIZE_OFFSET 0x5004
 
+/*
+ * When booting from EFI BIOS, VxWorks bootloader stores the EFI GOP
+ * framebuffer info at a pre-defined offset @ 0x6100. When VxWorks kernel
+ * boots up, its EFI console driver tries to find such a block and if
+ * the signature matches, the framebuffer information will be used to
+ * initialize the driver.
+ *
+ * However it is not necessary to prepare an EFI environment for VxWorks's
+ * EFI console driver to function (eg: EFI loader in U-Boot). If U-Boot has
+ * already initialized the graphics card and set it to a VESA mode that is
+ * compatible with EFI GOP, we can simply prepare such a block for VxWorks.
+ */
+#define EFI_GOP_INFO_OFFSET0x6100
+
+/* EFI GOP info signatiure */
+#define EFI_GOP_INFO_MAGIC 0xfeedface
+
+struct efi_gop_info {
+   u32 magic;  /* signature */
+   struct efi_gop_mode_info info;  /* EFI GOP mode info structure */
+   phys_addr_t fb_base;/* framebuffer base address */
+   u32 fb_size;/* framebuffer size */
+};
+
 int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 void boot_prep_vxworks(bootm_headers_t *images);
 void boot_jump_vxworks(bootm_headers_t *images);
-- 
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[U-Boot] [PATCH v2 01/18] doc: vxworks: Minor update for clarity

[Bin Meng]

This corrects a typo and updates several places for clarity.

Signed-off-by: Bin Meng 
Reviewed-by: Christian Gmeiner 
---

Changes in v2: None

 doc/README.vxworks | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/doc/README.vxworks b/doc/README.vxworks
index 3433e4f..eb1f458 100644
--- a/doc/README.vxworks
+++ b/doc/README.vxworks
@@ -30,11 +30,11 @@ the ePAPR standard, which is shown below (see ePAPR for 
more details):
 
 void (*kernel_entry)(fdt_addr, 0, 0, EPAPR_MAGIC, boot_IMA, 0, 0)
 
-For ARM, the calling convention is show below:
+For ARM, the calling convention is shown below:
 
 void (*kernel_entry)(void *fdt_addr)
 
-When booting new VxWorks kernel (uImage format), the parameters passed to bootm
+When booting a VxWorks 7 kernel (uImage format), the parameters passed to bootm
 is like below:
 
 bootm  - 
@@ -46,7 +46,7 @@ board-specific address before loading VxWorks. U-Boot 
supplies its address
 via "bootaddr" environment variable. To check where the bootline should be
 for a specific board, go to the VxWorks BSP for that board, and look for a
 parameter called BOOT_LINE_ADRS. Assign its value to "bootaddr". A typical
-value for "bootaddr" is 0x101200.
+value for "bootaddr" on an x86 board is 0x101200.
 
 If a "bootargs" variable is defined, its content will be copied to the memory
 location pointed by "bootaddr" as the kernel bootline. If "bootargs" is not
@@ -79,7 +79,7 @@ for "e820data" and "e820info" are 0x104000 and 0x104a00. But 
there is one
 exception on Intel Galileo, where "e820data" and "e820info" should be left
 unset, which assume the default location for VxWorks.
 
-Note since currently U-Boot does not support ACPI yet, VxWorks kernel must
+For boards on which ACPI is not supported by U-Boot yet, VxWorks kernel must
 be configured to use MP table and virtual wire interrupt mode. This requires
 INCLUDE_MPTABLE_BOOT_OP and INCLUDE_VIRTUAL_WIRE_MODE to be included in a
 VxWorks kernel configuration.
-- 
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[U-Boot] [PATCH v2 08/18] elf: Add ELF64 related structure defines

[Bin Meng]

This adds ELF header, program header and section header structure
defines for the 64-bit ELF image.

Signed-off-by: Bin Meng 
---

Changes in v2: None

 include/elf.h | 43 +++
 1 file changed, 43 insertions(+)

diff --git a/include/elf.h b/include/elf.h
index 4742597..248ba59 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -107,6 +107,24 @@ typedef struct {
   header string table" entry offset */
 } Elf32_Ehdr;
 
+typedef struct {
+   unsigned char   e_ident[EI_NIDENT]; /* ELF Identification */
+   Elf64_Half  e_type; /* object file type */
+   Elf64_Half  e_machine;  /* machine */
+   Elf64_Word  e_version;  /* object file version */
+   Elf64_Addr  e_entry;/* virtual entry point */
+   Elf64_Off   e_phoff;/* program header table offset */
+   Elf64_Off   e_shoff;/* section header table offset */
+   Elf64_Word  e_flags;/* processor-specific flags */
+   Elf64_Half  e_ehsize;   /* ELF header size */
+   Elf64_Half  e_phentsize;/* program header entry size */
+   Elf64_Half  e_phnum;/* number of program header entries */
+   Elf64_Half  e_shentsize;/* section header entry size */
+   Elf64_Half  e_shnum;/* number of section header entries */
+   Elf64_Half  e_shstrndx; /* section header table's "section
+  header string table" entry offset */
+} Elf64_Ehdr;
+
 /* e_type */
 #define ET_NONE0   /* No file type */
 #define ET_REL 1   /* relocatable file */
@@ -224,6 +242,20 @@ typedef struct {
Elf32_Word  sh_entsize; /* section entry size */
 } Elf32_Shdr;
 
+typedef struct {
+   Elf64_Word  sh_name;/* name - index into section header
+  string table section */
+   Elf64_Word  sh_type;/* type */
+   Elf64_Xword sh_flags;   /* flags */
+   Elf64_Addr  sh_addr;/* address */
+   Elf64_Off   sh_offset;  /* file offset */
+   Elf64_Xword sh_size;/* section size */
+   Elf64_Word  sh_link;/* section header table index link */
+   Elf64_Word  sh_info;/* extra information */
+   Elf64_Xword sh_addralign;   /* address alignment */
+   Elf64_Xword sh_entsize; /* section entry size */
+} Elf64_Shdr;
+
 /* Special Section Indexes */
 #define SHN_UNDEF  0   /* undefined */
 #define SHN_LORESERVE  0xff00  /* lower bounds of reserved indexes */
@@ -408,6 +440,17 @@ typedef struct {
Elf32_Word  p_align;/* memory alignment */
 } Elf32_Phdr;
 
+typedef struct {
+   Elf64_Word  p_type; /* segment type */
+   Elf64_Word  p_flags;/* flags */
+   Elf64_Off   p_offset;   /* segment offset */
+   Elf64_Addr  p_vaddr;/* virtual address of segment */
+   Elf64_Addr  p_paddr;/* physical address of segment */
+   Elf64_Xword p_filesz;   /* number of bytes in file for seg */
+   Elf64_Xword p_memsz;/* number of bytes in mem. for seg */
+   Elf64_Xword p_align;/* memory alignment */
+} Elf64_Phdr;
+
 /* Segment types - p_type */
 #define PT_NULL0   /* unused */
 #define PT_LOAD1   /* loadable segment */
-- 
2.7.4

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[U-Boot] [PATCH v2 04/18] vxworks: x86: Rename e820info to e820_info

[Bin Meng]

This changes 'struct e820info' to 'struct e820_info' to conform
with the coding style.

Signed-off-by: Bin Meng 
---

Changes in v2: None

 cmd/elf.c | 6 +++---
 include/vxworks.h | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/cmd/elf.c b/cmd/elf.c
index 4638d79..0717feb 100644
--- a/cmd/elf.c
+++ b/cmd/elf.c
@@ -209,7 +209,7 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
int ptr = 0;
 #ifdef CONFIG_X86
ulong base;
-   struct e820info *info;
+   struct e820_info *info;
struct e820entry *data;
 #endif
 
@@ -340,9 +340,9 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 */
base = env_get_hex("vx_phys_mem_base", VXWORKS_PHYS_MEM_BASE);
data = (struct e820entry *)(base + E820_DATA_OFFSET);
-   info = (struct e820info *)(base + E820_INFO_OFFSET);
+   info = (struct e820_info *)(base + E820_INFO_OFFSET);
 
-   memset(info, 0, sizeof(struct e820info));
+   memset(info, 0, sizeof(struct e820_info));
info->sign = E820_SIGNATURE;
info->entries = install_e820_map(E820MAX, data);
info->addr = (info->entries - 1) * sizeof(struct e820entry) +
diff --git a/include/vxworks.h b/include/vxworks.h
index d912076..4a83a34 100644
--- a/include/vxworks.h
+++ b/include/vxworks.h
@@ -32,7 +32,7 @@
 /* E820 info signatiure "SMAP" - System MAP */
 #define E820_SIGNATURE 0x534d4150
 
-struct e820info {
+struct e820_info {
u32 sign;   /* "SMAP" signature */
u32 x0; /* don't care, used by VxWorks */
u32 x1; /* don't care, used by VxWorks */
-- 
2.7.4

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[U-Boot] [PATCH v2 16/18] bootvx: Exit if bootline address is not specified

[Bin Meng]

Exit the 'bootvx' command if bootline address is not specified.

Signed-off-by: Bin Meng 
---

Changes in v2: None

 cmd/elf.c | 109 ++
 1 file changed, 53 insertions(+), 56 deletions(-)

diff --git a/cmd/elf.c b/cmd/elf.c
index 22ff254..0c84664 100644
--- a/cmd/elf.c
+++ b/cmd/elf.c
@@ -303,76 +303,73 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
tmp = env_get("bootaddr");
if (!tmp) {
printf("## VxWorks bootline address not specified\n");
-   } else {
-   bootaddr = simple_strtoul(tmp, NULL, 16);
+   return 1;
+   }
+
+   bootaddr = simple_strtoul(tmp, NULL, 16);
+
+   /*
+* Check to see if the bootline is defined in the 'bootargs' parameter.
+* If it is not defined, we may be able to construct the info.
+*/
+   bootline = env_get("bootargs");
+   if (!bootline) {
+   tmp = env_get("bootdev");
+   if (tmp) {
+   strcpy(build_buf, tmp);
+   ptr = strlen(tmp);
+   } else {
+   printf("## VxWorks boot device not specified\n");
+   }
+
+   tmp = env_get("bootfile");
+   if (tmp)
+   ptr += sprintf(build_buf + ptr, "host:%s ", tmp);
+   else
+   ptr += sprintf(build_buf + ptr, "host:vxWorks ");
 
/*
-* Check to see if the bootline is defined in the 'bootargs'
-* parameter. If it is not defined, we may be able to
-* construct the info.
+* The following parameters are only needed if 'bootdev'
+* is an ethernet device, otherwise they are optional.
 */
-   bootline = env_get("bootargs");
-   if (!bootline) {
-   tmp = env_get("bootdev");
+   tmp = env_get("ipaddr");
+   if (tmp) {
+   ptr += sprintf(build_buf + ptr, "e=%s", tmp);
+   tmp = env_get("netmask");
if (tmp) {
-   strcpy(build_buf, tmp);
-   ptr = strlen(tmp);
-   } else
-   printf("## VxWorks boot device not 
specified\n");
-
-   tmp = env_get("bootfile");
-   if (tmp)
-   ptr += sprintf(build_buf + ptr,
-  "host:%s ", tmp);
-   else
+   u32 mask = env_get_ip("netmask").s_addr;
ptr += sprintf(build_buf + ptr,
-  "host:vxWorks ");
-
-   /*
-* The following parameters are only needed if 'bootdev'
-* is an ethernet device, otherwise they are optional.
-*/
-   tmp = env_get("ipaddr");
-   if (tmp) {
-   ptr += sprintf(build_buf + ptr, "e=%s", tmp);
-   tmp = env_get("netmask");
-   if (tmp) {
-   u32 mask = env_get_ip("netmask").s_addr;
-   ptr += sprintf(build_buf + ptr,
-  ":%08x ", ntohl(mask));
-   } else {
-   ptr += sprintf(build_buf + ptr, " ");
-   }
+  ":%08x ", ntohl(mask));
+   } else {
+   ptr += sprintf(build_buf + ptr, " ");
}
+   }
 
-   tmp = env_get("serverip");
-   if (tmp)
-   ptr += sprintf(build_buf + ptr, "h=%s ", tmp);
-
-   tmp = env_get("gatewayip");
-   if (tmp)
-   ptr += sprintf(build_buf + ptr, "g=%s ", tmp);
+   tmp = env_get("serverip");
+   if (tmp)
+   ptr += sprintf(build_buf + ptr, "h=%s ", tmp);
 
-   tmp = env_get("hostname");
-   if (tmp)
-   ptr += sprintf(build_buf + ptr, "tn=%s ", tmp);
+   tmp = env_get("gatewayip");
+   if (tmp)
+   ptr += sprintf(build_buf + ptr, "g=%s ", tmp);
 
-   tmp = env_get("othbootargs");
-   if (tmp) {
-   strcpy(build_buf + ptr, tmp);
-   ptr += strlen(tmp);
-   }
+ 

[U-Boot] [PATCH v2 12/18] x86: Change default FRAMEBUFFER_VESA_MODE of some boards

[Bin Meng]

This changes some boards' default FRAMEBUFFER_VESA_MODE to use 32-bit
pixel format for better VxWorks compatibility.

Signed-off-by: Bin Meng 
---

Changes in v2: None

 configs/bayleybay_defconfig  | 2 +-
 configs/minnowmax_defconfig  | 2 +-
 configs/qemu-x86_64_defconfig| 2 +-
 configs/qemu-x86_defconfig   | 2 +-
 configs/qemu-x86_efi_payload32_defconfig | 2 +-
 configs/qemu-x86_efi_payload64_defconfig | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig
index 5f7a09d..c78a70d 100644
--- a/configs/bayleybay_defconfig
+++ b/configs/bayleybay_defconfig
@@ -52,5 +52,5 @@ CONFIG_E1000=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
-CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
+CONFIG_FRAMEBUFFER_VESA_MODE_11B=y
 CONFIG_CONSOLE_SCROLL_LINES=5
diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig
index 3547713..627f1d8 100644
--- a/configs/minnowmax_defconfig
+++ b/configs/minnowmax_defconfig
@@ -57,5 +57,5 @@ CONFIG_DEBUG_UART_CLOCK=1843200
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
-CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
+CONFIG_FRAMEBUFFER_VESA_MODE_11B=y
 CONFIG_CONSOLE_SCROLL_LINES=5
diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig
index 10bbc76..3aae96f 100644
--- a/configs/qemu-x86_64_defconfig
+++ b/configs/qemu-x86_64_defconfig
@@ -69,5 +69,5 @@ CONFIG_SPL_TIMER=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
-CONFIG_FRAMEBUFFER_VESA_MODE_111=y
+CONFIG_FRAMEBUFFER_VESA_MODE_112=y
 CONFIG_CONSOLE_SCROLL_LINES=5
diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig
index 311fae3..28ee4aa 100644
--- a/configs/qemu-x86_defconfig
+++ b/configs/qemu-x86_defconfig
@@ -49,5 +49,5 @@ CONFIG_NVME=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
-CONFIG_FRAMEBUFFER_VESA_MODE_111=y
+CONFIG_FRAMEBUFFER_VESA_MODE_112=y
 CONFIG_CONSOLE_SCROLL_LINES=5
diff --git a/configs/qemu-x86_efi_payload32_defconfig 
b/configs/qemu-x86_efi_payload32_defconfig
index d2fc546..b847609 100644
--- a/configs/qemu-x86_efi_payload32_defconfig
+++ b/configs/qemu-x86_efi_payload32_defconfig
@@ -43,7 +43,7 @@ CONFIG_CPU=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
-CONFIG_FRAMEBUFFER_VESA_MODE_111=y
+CONFIG_FRAMEBUFFER_VESA_MODE_112=y
 CONFIG_CONSOLE_SCROLL_LINES=5
 CONFIG_EFI=y
 CONFIG_EFI_STUB=y
diff --git a/configs/qemu-x86_efi_payload64_defconfig 
b/configs/qemu-x86_efi_payload64_defconfig
index 9fd563e..59ff2a0 100644
--- a/configs/qemu-x86_efi_payload64_defconfig
+++ b/configs/qemu-x86_efi_payload64_defconfig
@@ -43,7 +43,7 @@ CONFIG_CPU=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
-CONFIG_FRAMEBUFFER_VESA_MODE_111=y
+CONFIG_FRAMEBUFFER_VESA_MODE_112=y
 CONFIG_CONSOLE_SCROLL_LINES=5
 CONFIG_EFI=y
 CONFIG_EFI_STUB=y
-- 
2.7.4

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[U-Boot] [PATCH v2 03/18] bootvx: x86: Explicitly clear the bootloader image size

[Bin Meng]

VxWorks bootloader stores its size at a pre-defined offset @ 0x5004.
Later when VxWorks kernel boots up and system memory information is
retrieved from the E820 table, the bootloader size will be subtracted
from the total system memory size to calculate the size of available
memory for the OS.

Explicitly clear the bootloader image size otherwise if memory
at this offset happens to contain some garbage data, the final
available memory size for the kernel is insane.

Signed-off-by: Bin Meng 
---

Changes in v2: None

 cmd/elf.c | 7 +++
 include/vxworks.h | 9 +
 2 files changed, 16 insertions(+)

diff --git a/cmd/elf.c b/cmd/elf.c
index c83d4cd..4638d79 100644
--- a/cmd/elf.c
+++ b/cmd/elf.c
@@ -347,6 +347,13 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
info->entries = install_e820_map(E820MAX, data);
info->addr = (info->entries - 1) * sizeof(struct e820entry) +
 E820_DATA_OFFSET;
+
+   /*
+* Explicitly clear the bootloader image size otherwise if memory
+* at this offset happens to contain some garbage data, the final
+* available memory size for the kernel is insane.
+*/
+   *(u32 *)(base + BOOT_IMAGE_SIZE_OFFSET) = 0;
 #endif
 
/*
diff --git a/include/vxworks.h b/include/vxworks.h
index f600dfa..d912076 100644
--- a/include/vxworks.h
+++ b/include/vxworks.h
@@ -43,6 +43,15 @@ struct e820info {
u32 error;  /* must be zero */
 };
 
+/*
+ * VxWorks bootloader stores its size at a pre-defined offset @ 0x5004.
+ * Later when VxWorks kernel boots up and system memory information is
+ * retrieved from the E820 table, the bootloader size will be subtracted
+ * from the total system memory size to calculate the size of available
+ * memory for the OS.
+ */
+#define BOOT_IMAGE_SIZE_OFFSET 0x5004
+
 int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 void boot_prep_vxworks(bootm_headers_t *images);
 void boot_jump_vxworks(bootm_headers_t *images);
-- 
2.7.4

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[U-Boot] [PATCH v2 02/18] bootvx: x86: Prepare e820 related stuff from the given kernel memory base address

[Bin Meng]

At present two environment variables 'e820data'/'e820info' are required
to boot a VxWorks x86 kernel, but this is superfluous. The offset of
these two tables are actually at a fixed offset from the kernel memory
base address and we can provide the kernel memory base address to U-Boot
via only one variable 'vx_phys_mem_base'.

Note as it name indicates, the physical address should be provided.

Signed-off-by: Bin Meng 
---

Changes in v2: None

 cmd/elf.c  | 20 +++-
 doc/README.vxworks | 18 +++---
 include/vxworks.h  | 12 +---
 3 files changed, 23 insertions(+), 27 deletions(-)

diff --git a/cmd/elf.c b/cmd/elf.c
index f874073..c83d4cd 100644
--- a/cmd/elf.c
+++ b/cmd/elf.c
@@ -208,6 +208,7 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
char build_buf[128]; /* Buffer for building the bootline */
int ptr = 0;
 #ifdef CONFIG_X86
+   ulong base;
struct e820info *info;
struct e820entry *data;
 #endif
@@ -334,25 +335,18 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
 
 #ifdef CONFIG_X86
/*
-* Since E820 information is critical to the kernel, if we don't
-* specify these in the environments, use a default one.
+* Get VxWorks's physical memory base address from environment,
+* if we don't specify it in the environment, use a default one.
 */
-   tmp = env_get("e820data");
-   if (tmp)
-   data = (struct e820entry *)simple_strtoul(tmp, NULL, 16);
-   else
-   data = (struct e820entry *)VXWORKS_E820_DATA_ADDR;
-   tmp = env_get("e820info");
-   if (tmp)
-   info = (struct e820info *)simple_strtoul(tmp, NULL, 16);
-   else
-   info = (struct e820info *)VXWORKS_E820_INFO_ADDR;
+   base = env_get_hex("vx_phys_mem_base", VXWORKS_PHYS_MEM_BASE);
+   data = (struct e820entry *)(base + E820_DATA_OFFSET);
+   info = (struct e820info *)(base + E820_INFO_OFFSET);
 
memset(info, 0, sizeof(struct e820info));
info->sign = E820_SIGNATURE;
info->entries = install_e820_map(E820MAX, data);
info->addr = (info->entries - 1) * sizeof(struct e820entry) +
-VXWORKS_E820_DATA_ADDR;
+E820_DATA_OFFSET;
 #endif
 
/*
diff --git a/doc/README.vxworks b/doc/README.vxworks
index eb1f458..b95a516 100644
--- a/doc/README.vxworks
+++ b/doc/README.vxworks
@@ -67,17 +67,13 @@ look like VxWorks hangs somewhere as nothing outputs on the 
serial console.
 
 x86-specific information
 
-Before loading an x86 kernel, two additional environment variables need to be
-provided. They are "e820data" and "e820info", which represent the address of
-E820 table and E820 information (defined by VxWorks) in system memory.
-
-Check VxWorks kernel configuration to look for BIOS_E820_DATA_START and
-BIOS_E820_INFO_START, and assign their values to "e820data" and "e820info"
-accordingly. If neither of these two are supplied, U-Boot assumes a default
-location at 0x4000 for "e820data" and 0x4a00 for "e820info". Typical values
-for "e820data" and "e820info" are 0x104000 and 0x104a00. But there is one
-exception on Intel Galileo, where "e820data" and "e820info" should be left
-unset, which assume the default location for VxWorks.
+Before loading an x86 kernel, one additional environment variable need to be
+provided. This is "vx_phys_mem_base", which represent the physical memory
+base address of VxWorks.
+
+Check VxWorks kernel configuration to look for LOCAL_MEM_LOCAL_ADRS. For
+VxWorks 7, this is normally a virtual address and you need find out its
+corresponding physical address and assign its value to "vx_phys_mem_base".
 
 For boards on which ACPI is not supported by U-Boot yet, VxWorks kernel must
 be configured to use MP table and virtual wire interrupt mode. This requires
diff --git a/include/vxworks.h b/include/vxworks.h
index f69b008..f600dfa 100644
--- a/include/vxworks.h
+++ b/include/vxworks.h
@@ -9,9 +9,15 @@
 #define _VXWORKS_H_
 
 /*
+ * Physical address of memory base for VxWorks x86
+ * This is LOCAL_MEM_LOCAL_ADRS in the VxWorks kernel configuration.
+ */
+#define VXWORKS_PHYS_MEM_BASE  0x10
+
+/*
  * VxWorks x86 E820 related stuff
  *
- * VxWorks on x86 gets E820 information from pre-defined address @
+ * VxWorks on x86 gets E820 information from pre-defined offset @
  * 0x4a00 and 0x4000. At 0x4a00 it's an information table defined
  * by VxWorks and the actual E820 table entries starts from 0x4000.
  * As defined by the BIOS E820 spec, the maximum number of E820 table
@@ -20,8 +26,8 @@
  * information that is retrieved from the BIOS E820 call and saved
  * later for sanity test during the kernel boot-up.
  */
-#define VXWORKS_E820_DATA_ADDR 0x4000
-#define VXWORKS_E820_INFO_ADDR 0x4a00
+#define E820_DATA_OFFSET   0x4000
+#define E820_INFO_OFFSET   

[U-Boot] [PATCH v2 00/18] bootvx: Various enhancements to booting VxWorks x86 kernels

[Bin Meng]

This introduces various enhancements to booting VxWorks x86 kernels.
It also cleans up the 'bootvx' x86 path a little bit.

Test was performed on MinnowMax, with VxWorks 7 generic x86/x64
images, with VGA text mode and EFI graphics mode console drivers.

This series is available at u-boot-x86/bootvx for testing.

Changes in v2:
- update the ELF32 and ELF64 loader comments
- update the graphics console driver information

Bin Meng (18):
  doc: vxworks: Minor update for clarity
  bootvx: x86: Prepare e820 related stuff from the given kernel memory
base address
  bootvx: x86: Explicitly clear the bootloader image size
  vxworks: x86: Rename e820info to e820_info
  x86: Use 'unsigned int' in install_e820_map() functions
  x86: Rename e820entry to e820_entry
  elf: Clean up the ELF header file
  elf: Add ELF64 related structure defines
  elf: Add a very simple ELF64 loader
  bios: vesa: Guard setting vesa mode with
CONFIG_FRAMEBUFFER_SET_VESA_MODE
  video: vesa: Change default FRAMEBUFFER_VESA_MODE
  x86: Change default FRAMEBUFFER_VESA_MODE of some boards
  pci: video: Only print out when everything is OK
  bootvx: x86: Make VxWorks EFI console driver happy
  bootvx: Refactor the bootline copy codes a little bit
  bootvx: Exit if bootline address is not specified
  bootvx: x86: Assign bootaddr based on kernel memory base
  doc: vxworks: Update x86 specific instructions

 arch/x86/cpu/coreboot/sdram.c|   7 +-
 arch/x86/cpu/qemu/e820.c |   3 +-
 arch/x86/cpu/tangier/sdram.c |   6 +-
 arch/x86/include/asm/bootparam.h |   2 +-
 arch/x86/include/asm/e820.h  |   5 +-
 arch/x86/lib/bios.c  |   4 +
 arch/x86/lib/coreboot_table.c|   2 +-
 arch/x86/lib/e820.c  |   4 +-
 arch/x86/lib/fsp/fsp_dram.c  |   5 +-
 cmd/elf.c| 233 ++
 configs/bayleybay_defconfig  |   2 +-
 configs/minnowmax_defconfig  |   2 +-
 configs/qemu-x86_64_defconfig|   2 +-
 configs/qemu-x86_defconfig   |   2 +-
 configs/qemu-x86_efi_payload32_defconfig |   2 +-
 configs/qemu-x86_efi_payload64_defconfig |   2 +-
 doc/README.vxworks   |  49 +++--
 drivers/bios_emulator/atibios.c  |   4 +
 drivers/pci/pci_rom.c|   4 +-
 drivers/video/Kconfig|   2 +-
 include/elf.h| 327 +--
 include/vxworks.h|  52 -
 22 files changed, 442 insertions(+), 279 deletions(-)

-- 
2.7.4

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Re: [U-Boot] [PATCH 03/12] libfdt: Safer access to strings section

[David Gibson]

On Tue, Apr 10, 2018 at 10:42:45AM -0400, Simon Glass wrote:
> +U-Boot, Tom, Masahiro
> 
> Hi David,
> 
> On 10 April 2018 at 01:22, David Gibson  wrote:
> > On Wed, Apr 04, 2018 at 01:21:10AM +0800, Simon Glass wrote:
> >> Hi David,
> >>
> >> On 3 April 2018 at 23:02, David Gibson  wrote:
> >> >
> >> > On Fri, Mar 30, 2018 at 04:42:21PM +0800, Simon Glass wrote:
> >> > > Hi David,
> >> > >
> >> > > On 26 March 2018 at 07:25, David Gibson  
> >> > > wrote:
> >> > > > fdt_string() is used to retrieve strings from a DT blob's strings 
> >> > > > section.
> >> > > > It's rarely used directly, but is widely used internally.
> >> > > >
> >> > > > However, it doesn't do any bounds checking, which means in the case 
> >> > > > of a
> >> > > > corrupted blob it could access bad memory, which libfdt is supposed 
> >> > > > to
> >> > > > avoid.
> >> > > >
> >> > > > This write a safe alternative to fdt_string, fdt_get_string().  It 
> >> > > > checks
> >> > > > both that the given offset is within the string section and that the 
> >> > > > string
> >> > > > it points to is properly \0 terminated within the section.  It also 
> >> > > > returns
> >> > > > the string's length as a convenience (since it needs to determine to 
> >> > > > do the
> >> > > > checks anyway).
> >> > > >
> >> > > > fdt_string() is rewritten in terms of fdt_get_string() for 
> >> > > > compatibility.
> >> > > >
> >> > > > Most of the diff here is actually testing infrastructure.
> >> > > >
> >> > > > Signed-off-by: David Gibson 
> >> > > > ---
> >> > > >  libfdt/fdt_ro.c  | 61 +++--
> >> > > >  libfdt/libfdt.h  | 18 ++-
> >> > > >  libfdt/version.lds   |  2 +-
> >> > > >  tests/.gitignore |  1 +
> >> > > >  tests/Makefile.tests |  2 +-
> >> > > >  tests/run_tests.sh   |  1 +
> >> > > >  tests/testdata.h |  1 +
> >> > > >  tests/testutils.c| 11 +--
> >> > > >  tests/trees.S| 26 
> >> > > >  tests/truncated_string.c | 79 
> >> > > > 
> >> > > >  10 files changed, 193 insertions(+), 9 deletions(-)
> >> > > >  create mode 100644 tests/truncated_string.c
> >> > >
> >> > > Similar code-size quesiton here. It looks like a lot of checking code.
> >> > > Can we have an option to remove it?
> >> >
> >> > Again, I'm disinclined without a concrete example of a problem.  Fwiw
> >> > the code size change is +276 bytes on my setup.
> >>
> >> That might not sound like a lot, but the overhead of DT in U-Boot is
> >> about 3KB, so this adds nearly 10%.
> >
> > Hm.  And how much is it compared to the whole U-Boot blob?
> >
> >> The specific problem is that when U-Boot SPL gets too big boards don't
> >> boot. Because we take the upstream libfdt this will affect U-Boot.
> >>
> >> Do you have any thoughts on how we could avoid this size increase?
> >
> > So, again, I'm very disinclined to prioritize size over memory safety
> > without a *concrete* example.  i.e. "We hit this specific problem with
> > size on this specific board that we were really using" rather than
> > just "it might be a problem".
> >
> > IMO, thinking of it in terms of the "increase" is the wrong way
> > arond.  If size is really a problem for you, you want to consider how
> > you can reduce it in any way, not just rolling back the most recent
> > changes.  The most obvious one to me would be to try
> > -ffunction-sections to exclude any functions that aren't actually used
> > by u-boot (if this is helpful and the compiler's an issue, I'd be
> > willing to consider splitting up libfdt into a bunch more C files).
> 
> Actually U-Boot does use that option. Believe me, a lot of work has
> gone into making this small. There is constant pressure to
> reduce/retain the size in SPL so that we can stay below limits. E.g.
> firefly-rk3288 has a 30KB limit for SPL. Current problems are the
> 64-bit Allwinner parts which are right up against the limit at
> present.
> 
> Also, Masahiro recently did some work to make U-Boot's version of
> libfdt the same as is used by Linux, so any changes will impact us
> quite quickly.

Hm, ok, point taken.

I did some quick hacks and I think it wouldn't be too hard to add a
"-DUNSAFE" or similar option that would turn off most of the checking
and save a substantial amount of code.

I don't really have time to polish this up myself, but I'd be happy to
merge patches that add something like this.  I am disinclined to hold
up this safety work for it, though.

If someone tackles this, I'd suggest 4 levels of "unsafety":

1) Safe.  The default, as now, full checking and safety wherever possible

2) Remove "assert"s.  Remove all checks that result in
   -FDT_ERR_INTERNAL.  These are basically supposed to be assert()s,
   but I don't want to rely on assert() as an external dependency.
   

Re: [U-Boot] chiliSOM: USB bug

[sdrb]

Hi Marcin,

Marcin Niestroj wrote:

Hi Witold,

On 11.04.2018 08:18, sdrb wrote:

Hi,

I use Grinn's chiliSOM and very old U-boot 2014.07 on it. 
Unfortunately the newest u-boot doesn't run SPL properly - so I'm 
forced to use 2014.07 version.


What are your problems exactly with SPL? What version of chiliSOM does
you board have? Mainline u-boot with SPL runs successfully on
chiliboard 1.1 (containing chiliSOM 2.2).


I've got ChiliSOM 2.2 version.
I don't use chiliboard - I've got only chiliSOM 2.2 integrated in our 
carrying board.



The problem is that SPL is not starting as good as in 2014.07 version. I 
mean - firmware shows only a few 'C' letters and then it hungs in some 
infinite loop:


CCC

but when at that moment I press Reset button it starts but unfortunately 
something is going wrong because it restarts:


U-Boot SPL 2018.05-rc1-00251-g2600df4f8e-dirty (Apr 12 2018 - 05:59:00 
+0200)

Trying to boot from MMC1

U-Boot SPL 2018.05-rc1-00251-g2600df4f8e-dirty (Apr 12 2018 - 05:59:00 
+0200)

Trying to boot from MMC1

U-Boot SPL 2018.05-rc1-00251-g2600df4f8e-dirty (Apr 12 2018 - 05:59:00 
+0200)

Trying to boot from MMC1

U-Boot SPL 2018.05-rc1-00251-g2600df4f8e-dirty (Apr 12 2018 - 05:59:00 
+0200)

Trying to boot from MMC1

So - to run newest u-boot I need to power-on board and then press reset.


I dig a litte in source of latest uboot and noticed that the last 
procedure which is invoked in SPL is jump_to_image_no_args().

This proc tries to go to 0x8080 addr and then reset appears.
But before it tries to go into this addr it successfully reads 
u-boot.img file. So rather the problem is in invocation of TPL than in SPL.


I wonder why the u-boot.img file is only 389392 bytes long while in old 
u-boot it was 1.7 MB.


Additionally - I see no device tree source file for chilisom in git repo 
but the configuration file mention it in CONFIG_DEFAULT_FDT_FILE.


Do we use the same u-boot repo? I use this one: 
http://git.denx.de/u-boot.git


and master branch.

Maybe I did something wrong?

I noticed that there is some problem with USB maintenance. As far as I 
know the chiliSOM is TI AM335x compatible system so it uses Mentor USB 
OTG controller.


The problem occures when I'm trying to use following sequence of 
commands:


# usb start
# usb stop
# usb start


See output of commands issued on u-boot 2018.03:

=> usb start
starting USB...
USB0:   scanning bus 0 for devices... 1 USB Device(s) found
    scanning usb for storage devices... Device NOT ready
    Request Sense returned 02 3A 00
Device NOT ready
    Request Sense returned 02 3A 00
Device NOT ready
    Request Sense returned 02 3A 00
Device NOT ready
    Request Sense returned 02 3A 00
0 Storage Device(s) found
=> usb stop
stopping USB..
=> usb start
starting USB...
USB0:   scanning bus 0 for devices... 1 USB Device(s) found
    scanning usb for storage devices... Device NOT ready
    Request Sense returned 02 3A 00
Device NOT ready
    Request Sense returned 02 3A 00
Device NOT ready
    Request Sense returned 02 3A 00
Device NOT ready
    Request Sense returned 02 3A 00
0 Storage Device(s) found

Did you try to connect other USB devices? Is that issue connected
USB device dependent?


We've got two USB 1.1 hubs integrated on board - so I cannot switch them 
off. I'm connecting USB device to one of it ports. I see no any 
dependency between any connected USB device and the problem.


Regards,
WK
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Re: [U-Boot] [PATCH 03/12] libfdt: Safer access to strings section

[David Gibson]

On Tue, Apr 10, 2018 at 06:36:06PM -0400, Tom Rini wrote:
> On Tue, Apr 10, 2018 at 10:42:45AM -0400, Simon Glass wrote:
> > +U-Boot, Tom, Masahiro
> > 
> > Hi David,
> > 
> > On 10 April 2018 at 01:22, David Gibson  wrote:
> > > On Wed, Apr 04, 2018 at 01:21:10AM +0800, Simon Glass wrote:
> > >> Hi David,
> > >>
> > >> On 3 April 2018 at 23:02, David Gibson  
> > >> wrote:
> > >> >
> > >> > On Fri, Mar 30, 2018 at 04:42:21PM +0800, Simon Glass wrote:
> > >> > > Hi David,
> > >> > >
> > >> > > On 26 March 2018 at 07:25, David Gibson 
> > >> > >  wrote:
> > >> > > > fdt_string() is used to retrieve strings from a DT blob's strings 
> > >> > > > section.
> > >> > > > It's rarely used directly, but is widely used internally.
> > >> > > >
> > >> > > > However, it doesn't do any bounds checking, which means in the 
> > >> > > > case of a
> > >> > > > corrupted blob it could access bad memory, which libfdt is 
> > >> > > > supposed to
> > >> > > > avoid.
> > >> > > >
> > >> > > > This write a safe alternative to fdt_string, fdt_get_string().  It 
> > >> > > > checks
> > >> > > > both that the given offset is within the string section and that 
> > >> > > > the string
> > >> > > > it points to is properly \0 terminated within the section.  It 
> > >> > > > also returns
> > >> > > > the string's length as a convenience (since it needs to determine 
> > >> > > > to do the
> > >> > > > checks anyway).
> > >> > > >
> > >> > > > fdt_string() is rewritten in terms of fdt_get_string() for 
> > >> > > > compatibility.
> > >> > > >
> > >> > > > Most of the diff here is actually testing infrastructure.
> > >> > > >
> > >> > > > Signed-off-by: David Gibson 
> > >> > > > ---
> > >> > > >  libfdt/fdt_ro.c  | 61 
> > >> > > > +++--
> > >> > > >  libfdt/libfdt.h  | 18 ++-
> > >> > > >  libfdt/version.lds   |  2 +-
> > >> > > >  tests/.gitignore |  1 +
> > >> > > >  tests/Makefile.tests |  2 +-
> > >> > > >  tests/run_tests.sh   |  1 +
> > >> > > >  tests/testdata.h |  1 +
> > >> > > >  tests/testutils.c| 11 +--
> > >> > > >  tests/trees.S| 26 
> > >> > > >  tests/truncated_string.c | 79 
> > >> > > > 
> > >> > > >  10 files changed, 193 insertions(+), 9 deletions(-)
> > >> > > >  create mode 100644 tests/truncated_string.c
> > >> > >
> > >> > > Similar code-size quesiton here. It looks like a lot of checking 
> > >> > > code.
> > >> > > Can we have an option to remove it?
> > >> >
> > >> > Again, I'm disinclined without a concrete example of a problem.  Fwiw
> > >> > the code size change is +276 bytes on my setup.
> > >>
> > >> That might not sound like a lot, but the overhead of DT in U-Boot is
> > >> about 3KB, so this adds nearly 10%.
> > >
> > > Hm.  And how much is it compared to the whole U-Boot blob?
> > >
> > >> The specific problem is that when U-Boot SPL gets too big boards don't
> > >> boot. Because we take the upstream libfdt this will affect U-Boot.
> > >>
> > >> Do you have any thoughts on how we could avoid this size increase?
> > >
> > > So, again, I'm very disinclined to prioritize size over memory safety
> > > without a *concrete* example.  i.e. "We hit this specific problem with
> > > size on this specific board that we were really using" rather than
> > > just "it might be a problem".
> 
> I'm either failing in my Google-fu or is there not an easy way to grab
> the patches from patchwork/similar?  But, if you shoot me the series
> off-list, I can tell you how much U-Boot targets grow here (we can use
> the same script as the kernel to re-sync sources back in, so I can give
> you a before/after).  But as Simon notes, we have a number of platforms
> that need to use (parts of) libfdt and stick to ~30KiB or less in total,
> sometimes including some memory for stack/etc and we've long been using
> -ffunction-sections/etc (the latest round of trying to use LTO has me
> thinking maybe we can see if that's a valid option finally, but that's
> an aside). Thanks!

We don't have a patchwork for these lists AFAIK, but you can get my
draft branch from:

https://github.com/dgibson/dtc/tree/safety

-- 
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson


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Re: [U-Boot] [PULL] u-boot-sh/master

[Masahiro Yamada]

2018-04-12 12:28 GMT+09:00 Marek Vasut :
> The following changes since commit
> d79dfd4519c3f357a2523acfeb26eca6f59eae4d:
>
>
>
>
>
>   spl: ram: Add TPL Kconfig symbols (2018-04-11 13:22:06 -0400)
>
>
>
>
>
> are available in the Git repository at:
>
>   git://git.denx.de/u-boot-sh.git master
>
> for you to fetch changes up to 97ed677831e45b789fc19bd807273ff34486efb8:
>
>   ARM: rmobile: Set maximum kernel size to 64 MiB on Gen3 (2018-04-11
> 23:19:52 +0200)
>
> 
> Marek Vasut (36):
>   ARM: rmobile: Split U-Boot and SPL sources on Porter
>   ARM: rmobile: Do not init caches in TPL before DRAM
>   ARM: rmobile: Add TPL support on R8A7791 M2 Porter
>   ARM: rmobile: Add JTAG recovery support for M2 Porter
>   ARM: rmobile: Enable HUSH on M2 Porter
>   mmc: uniphier: Split out SoC specific bits from the driver
>   mmc: renesas-sdhi: Add Renesas SDHI Kconfig entry
>   ARM: rmobile: Switch to CONFIG_RENESAS_SDHI
>   mmc: uniphier: Factor out FIFO accessors
>   mmc: uniphier: Drop useless check
>   mmc: uniphier: Add support for 16bit variant
>   mmc: uniphier: Allow passing quirks to the probe function


FWIW,

Ack for the mmc:uniphier changes.


Thanks.


>   mmc: renesas-sdhi: Handle 16bit IP
>   mmc: matsushita-common: Use mmc_of_parse()
>   mmc: matsushita-common: Add Renesas RCar quirks
>   mmc: matsushita-common: Handle Renesas div-by-1
>   mmc: matsushita-common: Handle DMA completion flag differences
>   mmc: matsushita-common: Handle bus width 0
>   mmc: matsushita-common: Always check controller version
>   mmc: matsushita-common: Properly handle pin voltage configuration
>   mmc: matsushita-common: Export register access functions
>   mmc: renesas-sdhi: Add Renesas SDR104/HS200 tuning support
>   ARM: rmobile: Enable HS200 mode on RCar Gen3
>   mmc: matsushita-common: Special case only select registers in 16bit
>   mmc: matsushita-common: Correctly set mode in 16bit
>   mmc: matsushita-common: Wait for command completion
>   mmc: matsushita-common: Add missing else
>   mmc: renesas-sdhi: Wait after reconfiguring pins
>   mtd: rpc: Add Renesas RPC Hyperflash driver
>   mtd: spi: Add Renesas RPC SPI-flash driver
>   spi: sh_qspi: Replace data types with short ones
>   spi: sh_qspi: Drop SPBDCR wait
>   spi: sh_qspi: Replace ad hoc waiting with wait_for_bit
>   spi: sh_qspi: Make use of the 32byte FIFO
>   ARM: rmobile: Fix the memory map on Gen3
>   ARM: rmobile: Set maximum kernel size to 64 MiB on Gen3
>
>  arch/arm/mach-rmobile/Kconfig.32 |   1 +
>  arch/arm/mach-rmobile/cpu_info.c |   3 -
>  arch/arm/mach-rmobile/include/mach/boot0.h   |  24 
>  arch/arm/mach-rmobile/include/mach/rmobile.h |   1 -
>  arch/arm/mach-rmobile/lowlevel_init_ca15.S   |   2 +
>  arch/arm/mach-rmobile/memmap-gen3.c  |  92 ++--
>  board/renesas/porter/Makefile|   4 +
>  board/renesas/porter/porter.c|  22 
>  board/renesas/porter/porter_spl.c| 495
> +++
>  configs/porter_defconfig |  23 +++-
>  configs/r8a7795_salvator-x_defconfig |   6 +-
>  configs/r8a7795_ulcb_defconfig   |   6 +-
>  configs/r8a77965_salvator-x_defconfig|   2 +-
>  configs/r8a7796_salvator-x_defconfig |   6 +-
>  configs/r8a7796_ulcb_defconfig   |   6 +-
>  configs/r8a77970_eagle_defconfig |   6 +-
>  configs/r8a77995_draak_defconfig |   6 +-
>  drivers/mmc/Kconfig  |  15 ++-
>  drivers/mmc/Makefile |   3 +-
>  drivers/mmc/matsushita-common.c  | 787
> +++
>  drivers/mmc/matsushita-common.h  | 151
> ++
>  drivers/mmc/renesas-sdhi.c   | 368
> ++
>  drivers/mmc/uniphier-sd.c| 850
> ++
>  drivers/mtd/Kconfig  |   7 ++
>  drivers/mtd/Makefile |   1 +
>  drivers/mtd/renesas_rpc_hf.c | 398
> +++
>  drivers/spi/Kconfig  |   8 ++
>  drivers/spi/Makefile |   1 +
>  drivers/spi/renesas_rpc_spi.c| 465
> ++
>  drivers/spi/sh_qspi.c| 119 

[U-Boot] [PULL] u-boot-usb/master

[Marek Vasut]

The following changes since commit c4446b1d6c96de406972690083e2884bf69bce5c:

  Merge git://git.denx.de/u-boot-ubi (2018-04-11 10:05:41 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-usb.git master

for you to fetch changes up to 2960e27e3834ef2e6d506b21a582bd97ac18bbb0:

  phy: Add Amlogic Meson USB2 & USB3 Generic PHY drivers (2018-04-11
17:22:07 +0200)


Neil Armstrong (3):
  usb: host: Add simple of glue driver for DWC3 USB Controllers
integration
  usb: host: dwc3: Add support for multiple PHYs
  phy: Add Amlogic Meson USB2 & USB3 Generic PHY drivers

 drivers/phy/Kconfig   |   8 ++
 drivers/phy/Makefile  |   1 +
 drivers/phy/meson-gxl-usb2.c  | 238
+
 drivers/phy/meson-gxl-usb3.c  | 201
+
 drivers/usb/host/Kconfig  |   7 +
 drivers/usb/host/Makefile |   1 +
 drivers/usb/host/dwc3-of-simple.c | 109
++
 drivers/usb/host/xhci-dwc3.c  | 113
++---
 8 files changed, 631 insertions(+), 47 deletions(-)
 create mode 100644 drivers/phy/meson-gxl-usb2.c
 create mode 100644 drivers/phy/meson-gxl-usb3.c
 create mode 100644 drivers/usb/host/dwc3-of-simple.c
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[U-Boot] [PULL] u-boot-sh/master

[Marek Vasut]

The following changes since commit
d79dfd4519c3f357a2523acfeb26eca6f59eae4d:





  spl: ram: Add TPL Kconfig symbols (2018-04-11 13:22:06 -0400)





are available in the Git repository at:

  git://git.denx.de/u-boot-sh.git master

for you to fetch changes up to 97ed677831e45b789fc19bd807273ff34486efb8:

  ARM: rmobile: Set maximum kernel size to 64 MiB on Gen3 (2018-04-11
23:19:52 +0200)


Marek Vasut (36):
  ARM: rmobile: Split U-Boot and SPL sources on Porter
  ARM: rmobile: Do not init caches in TPL before DRAM
  ARM: rmobile: Add TPL support on R8A7791 M2 Porter
  ARM: rmobile: Add JTAG recovery support for M2 Porter
  ARM: rmobile: Enable HUSH on M2 Porter
  mmc: uniphier: Split out SoC specific bits from the driver
  mmc: renesas-sdhi: Add Renesas SDHI Kconfig entry
  ARM: rmobile: Switch to CONFIG_RENESAS_SDHI
  mmc: uniphier: Factor out FIFO accessors
  mmc: uniphier: Drop useless check
  mmc: uniphier: Add support for 16bit variant
  mmc: uniphier: Allow passing quirks to the probe function
  mmc: renesas-sdhi: Handle 16bit IP
  mmc: matsushita-common: Use mmc_of_parse()
  mmc: matsushita-common: Add Renesas RCar quirks
  mmc: matsushita-common: Handle Renesas div-by-1
  mmc: matsushita-common: Handle DMA completion flag differences
  mmc: matsushita-common: Handle bus width 0
  mmc: matsushita-common: Always check controller version
  mmc: matsushita-common: Properly handle pin voltage configuration
  mmc: matsushita-common: Export register access functions
  mmc: renesas-sdhi: Add Renesas SDR104/HS200 tuning support
  ARM: rmobile: Enable HS200 mode on RCar Gen3
  mmc: matsushita-common: Special case only select registers in 16bit
  mmc: matsushita-common: Correctly set mode in 16bit
  mmc: matsushita-common: Wait for command completion
  mmc: matsushita-common: Add missing else
  mmc: renesas-sdhi: Wait after reconfiguring pins
  mtd: rpc: Add Renesas RPC Hyperflash driver
  mtd: spi: Add Renesas RPC SPI-flash driver
  spi: sh_qspi: Replace data types with short ones
  spi: sh_qspi: Drop SPBDCR wait
  spi: sh_qspi: Replace ad hoc waiting with wait_for_bit
  spi: sh_qspi: Make use of the 32byte FIFO
  ARM: rmobile: Fix the memory map on Gen3
  ARM: rmobile: Set maximum kernel size to 64 MiB on Gen3

 arch/arm/mach-rmobile/Kconfig.32 |   1 +
 arch/arm/mach-rmobile/cpu_info.c |   3 -
 arch/arm/mach-rmobile/include/mach/boot0.h   |  24 
 arch/arm/mach-rmobile/include/mach/rmobile.h |   1 -
 arch/arm/mach-rmobile/lowlevel_init_ca15.S   |   2 +
 arch/arm/mach-rmobile/memmap-gen3.c  |  92 ++--
 board/renesas/porter/Makefile|   4 +
 board/renesas/porter/porter.c|  22 
 board/renesas/porter/porter_spl.c| 495
+++
 configs/porter_defconfig |  23 +++-
 configs/r8a7795_salvator-x_defconfig |   6 +-
 configs/r8a7795_ulcb_defconfig   |   6 +-
 configs/r8a77965_salvator-x_defconfig|   2 +-
 configs/r8a7796_salvator-x_defconfig |   6 +-
 configs/r8a7796_ulcb_defconfig   |   6 +-
 configs/r8a77970_eagle_defconfig |   6 +-
 configs/r8a77995_draak_defconfig |   6 +-
 drivers/mmc/Kconfig  |  15 ++-
 drivers/mmc/Makefile |   3 +-
 drivers/mmc/matsushita-common.c  | 787
+++
 drivers/mmc/matsushita-common.h  | 151
++
 drivers/mmc/renesas-sdhi.c   | 368
++
 drivers/mmc/uniphier-sd.c| 850
++
 drivers/mtd/Kconfig  |   7 ++
 drivers/mtd/Makefile |   1 +
 drivers/mtd/renesas_rpc_hf.c | 398
+++
 drivers/spi/Kconfig  |   8 ++
 drivers/spi/Makefile |   1 +
 drivers/spi/renesas_rpc_spi.c| 465
++
 drivers/spi/sh_qspi.c| 119 ++--
 include/configs/porter.h |   6 +
 include/configs/rcar-gen3-common.h   |   1 +
 32 files changed, 2867 insertions(+), 1018 deletions(-)
 create mode 100644 arch/arm/mach-rmobile/include/mach/boot0.h
 create mode 100644 

Re: [U-Boot] [RFC PATCH 03/13] arm: move SYS_ARCH_TIMER to KConfig

[Tuomas Tynkkynen]

Hi,

On Thu, 30 Nov 2017 01:25:01 +
Andre Przywara  wrote:

> SYS_ARCH_TIMER guards the usage of the ARM Generic Timer (aka arch
> timer) in U-Boot.
> At the moment it is mandatory for ARMv8 and used by two ARMv7 boards.
> Add a proper Kconfig symbol to express this dependency properly,
> allowing certain board configuration to later disable arch timer in case
> there are any problems with it.
> 
> Signed-off-by: Andre Przywara 

I was doing some SYS_ARCH_TIMER related cleanup to qemu-arm, so I took
the opportunity to test + send a rebased + resynced version of this patch
at the same time. Hope that it doesn't conflict or cause any problems
with upgrading this Nexell patchset.

- Tuomas
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[U-Boot] [PATCH 2/2] arm: move SYS_ARCH_TIMER to KConfig

[Tuomas Tynkkynen]

From: Andre Przywara 

SYS_ARCH_TIMER guards the usage of the ARM Generic Timer (aka arch
timer) in U-Boot.
At the moment it is mandatory for ARMv8 and used by a few ARMv7 boards.
Add a proper Kconfig symbol to express this dependency properly,
allowing certain board configuration to later disable arch timer in case
there are any problems with it.

Signed-off-by: Andre Przywara 
[tuomas: rebase + fix conflicts and resync with moveconfig & use select]
Signed-off-by: Tuomas Tynkkynen 
---
 arch/arm/Kconfig | 11 +++
 arch/arm/cpu/armv8/Makefile  |  2 +-
 arch/arm/mach-imx/mx7ulp/Kconfig |  1 +
 arch/arm/mach-qemu/Kconfig   |  1 +
 arch/arm/mach-stm32mp/Kconfig|  1 +
 include/configs/mx7ulp_evk.h |  1 -
 include/configs/qemu-arm.h   |  1 -
 include/configs/stm32mp1.h   |  1 -
 include/configs/ti_armv7_keystone2.h |  1 -
 scripts/config_whitelist.txt |  1 -
 10 files changed, 15 insertions(+), 6 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 190f883aa8..421210ed46 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -242,6 +242,16 @@ config SYS_CACHELINE_SIZE
default 64 if SYS_CACHE_SHIFT_6
default 32 if SYS_CACHE_SHIFT_5
 
+config SYS_ARCH_TIMER
+   bool "ARM Generic Timer support"
+   depends on CPU_V7 || ARM64
+   default y if ARM64
+   help
+ The ARM Generic Timer (aka arch-timer) provides an architected
+ interface to a timer source on an SoC.
+ It is mandantory for ARMv8 implementation and widely available
+ on ARMv7 systems.
+
 config ARM_SMCCC
bool "Support for ARM SMC Calling Convention (SMCCC)"
depends on CPU_V7 || ARM64
@@ -583,6 +593,7 @@ config ARCH_KEYSTONE
select SUPPORT_SPL
select SYS_THUMB_BUILD
select CMD_POWEROFF
+   select SYS_ARCH_TIMER
imply CMD_MTDPARTS
imply FIT
imply CMD_SAVES
diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index 1249547436..d18b38eb9e 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -9,7 +9,7 @@ extra-y := start.o
 
 obj-y  += cpu.o
 ifndef CONFIG_$(SPL_TPL_)TIMER
-obj-y  += generic_timer.o
+obj-$(CONFIG_SYS_ARCH_TIMER) += generic_timer.o
 endif
 obj-y  += cache_v8.o
 obj-y  += exceptions.o
diff --git a/arch/arm/mach-imx/mx7ulp/Kconfig b/arch/arm/mach-imx/mx7ulp/Kconfig
index 1bdc85a9a0..d4b0299dbd 100644
--- a/arch/arm/mach-imx/mx7ulp/Kconfig
+++ b/arch/arm/mach-imx/mx7ulp/Kconfig
@@ -9,6 +9,7 @@ choice
 
 config TARGET_MX7ULP_EVK
 bool "Support mx7ulp EVK board"
+   select SYS_ARCH_TIMER
 
 endchoice
 
diff --git a/arch/arm/mach-qemu/Kconfig b/arch/arm/mach-qemu/Kconfig
index 133163aecf..226dfa362f 100644
--- a/arch/arm/mach-qemu/Kconfig
+++ b/arch/arm/mach-qemu/Kconfig
@@ -16,6 +16,7 @@ config TARGET_QEMU_ARM_32BIT
depends on ARCH_QEMU
select CPU_V7
select ARCH_SUPPORT_PSCI
+   select SYS_ARCH_TIMER
 
 config TARGET_QEMU_ARM_64BIT
bool "Support qemu_arm64"
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index 8ca97bf0c9..4d59480c19 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -27,6 +27,7 @@ config TARGET_STM32MP1
select CPU_V7
select PINCTRL_STM32
select STM32_RESET
+   select SYS_ARCH_TIMER
select SYSRESET_SYSCON
help
target STMicroelectronics SOC STM32MP1 family
diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h
index c2223bd858..3dcda9ea77 100644
--- a/include/configs/mx7ulp_evk.h
+++ b/include/configs/mx7ulp_evk.h
@@ -46,7 +46,6 @@
 /* Using ULP WDOG for reset */
 #define WDOG_BASE_ADDR WDG1_RBASE
 
-#define CONFIG_SYS_ARCH_TIMER
 #define CONFIG_SYS_HZ_CLOCK100 /* Fixed at 1Mhz from TSTMR */
 
 #define CONFIG_INITRD_TAG
diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h
index b29a54ef89..f306b41635 100644
--- a/include/configs/qemu-arm.h
+++ b/include/configs/qemu-arm.h
@@ -20,7 +20,6 @@
 #define CONFIG_SYS_MALLOC_LEN  SZ_16M
 
 /* For timer, QEMU emulates an ARMv7/ARMv8 architected timer */
-#define CONFIG_SYS_ARCH_TIMER
 #define CONFIG_SYS_HZ   1000
 
 /* For block devices, QEMU emulates an ICH9 AHCI controller over PCI */
diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h
index da0e259736..b2b654ca7a 100644
--- a/include/configs/stm32mp1.h
+++ b/include/configs/stm32mp1.h
@@ -17,7 +17,6 @@
  * Number of clock ticks in 1 sec
  */
 #define CONFIG_SYS_HZ  1000
-#define CONFIG_SYS_ARCH_TIMER
 
 /*
  * malloc() pool size
diff --git a/include/configs/ti_armv7_keystone2.h 
b/include/configs/ti_armv7_keystone2.h
index e87acca650..6f2a33e187 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ 

[U-Boot] [PATCH 1/2] ARM: qemu-arm: Dynamically determine timer frequency

[Tuomas Tynkkynen]

After commit 46fc679ede5f69 ("arm: timer: get frequency for arch timer
armv7 in cp15 cntfrq") the ARM architected timer driver knows how to
determine the timer frequency at runtime by reading the CNTFRQ register,
so we don't need to hardcode the timer frequency anymore.

Signed-off-by: Tuomas Tynkkynen 
---
 include/configs/qemu-arm.h | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h
index 839bc10a18..b29a54ef89 100644
--- a/include/configs/qemu-arm.h
+++ b/include/configs/qemu-arm.h
@@ -19,11 +19,9 @@
 #define CONFIG_SYS_LOAD_ADDR   (CONFIG_SYS_SDRAM_BASE + SZ_2M)
 #define CONFIG_SYS_MALLOC_LEN  SZ_16M
 
-/* QEMU implements a 62.5MHz architected timer */
-/* FIXME: can we rely on CNTFREQ instead of hardcoding this fact here? */
+/* For timer, QEMU emulates an ARMv7/ARMv8 architected timer */
 #define CONFIG_SYS_ARCH_TIMER
 #define CONFIG_SYS_HZ   1000
-#define CONFIG_SYS_HZ_CLOCK 6250
 
 /* For block devices, QEMU emulates an ICH9 AHCI controller over PCI */
 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 6
-- 
2.16.3

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[U-Boot] RSA Signed images/configs issue

[John Schmoller]

Hello all,

I've been playing around with signed FIT images and I found some unexpected 
behavior.
I was hoping to get some input on whether this behaves as expected or whether 
there's
an issue that needs resolving.

I have a board where I am attempting to sign both the config and image nodes of 
a FIT
image.  I am using two separate keys, one to sign the config, one the images. I 
am using
mkimage to set these keys as required.  I have found that if I require 
config.key for
configs and image.key for images, I boot successfully.  But if I have U-Boot 
require the
same keys but sign my config node with image.key, this also boots, but prints

RSA failed to verify: -22

This seems like unintended behavior to me. If I have config.key as the required 
key for
configs, booting should not succeed if I have my image signed with another 
valid key. If
I'm thinking about this correctly, it would mean only one key would need to be 
compromised
to infiltrate an image where multiple keys should be required. Can someone 
validate my
thinking, or explain what I'm doing/thinking wrong?  The patch for this 
particular
issue, if indeed it is an issue, is fairly simple.

diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index 0d548f8..2e7c226 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -230,8 +230,7 @@ int rsa_verify(struct image_sign_info *info,
if (info->required_keynode != -1) {
ret = rsa_verify_with_keynode(info, hash, sig, sig_len,
info->required_keynode);
-   if (!ret)
-   return ret;
+   return ret;
}
 
/* Look for a key that matches our hint */


Thanks,
John
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[U-Boot] [PATCH] ARM: rmobile: Set maximum kernel size to 64 MiB on Gen3

[Marek Vasut]

The Gen3 kernel images are often above 8 MiB, increase the
maximum kernel size to 64 MiB to future-proof it, just like
many other ARM64 boards do.

Signed-off-by: Marek Vasut 
Cc: Nobuhiro Iwamatsu 
---
 include/configs/rcar-gen3-common.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/rcar-gen3-common.h 
b/include/configs/rcar-gen3-common.h
index bbaab80e23..da82e4442a 100644
--- a/include/configs/rcar-gen3-common.h
+++ b/include/configs/rcar-gen3-common.h
@@ -51,6 +51,7 @@
 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
 #define CONFIG_SYS_MALLOC_LEN  (1 * 1024 * 1024)
 #define CONFIG_SYS_BOOTMAPSZ   (8 * 1024 * 1024)
+#define CONFIG_SYS_BOOTM_LEN   (64 << 20)
 
 /* ENV setting */
 #define CONFIG_ENV_OVERWRITE
-- 
2.16.2

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Re: [U-Boot] spl: ram: Convert to CONFIG_IS_ENABLED

[Tom Rini]

On Sat, Apr 07, 2018 at 05:03:28PM +0200, Marek Vasut wrote:

> This patch is a preparation for adding TPL support for RAM loading.
> CONFIG_IS_ENABLED allows for proper handling of the U-Boot/SPL/TPL
> differences in config symbol names.
> 
> Signed-off-by: Marek Vasut 
> Cc: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] spl: ram: Add TPL Kconfig symbols

[Tom Rini]

On Sat, Apr 07, 2018 at 05:03:45PM +0200, Marek Vasut wrote:

> Add TPL config symbols for RAM loading matching the SPL ones.
> 
> Signed-off-by: Marek Vasut 
> Cc: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] serial: Fix Makefile during SPL and TPL build

[Tom Rini]

On Sat, Apr 07, 2018 at 04:06:22PM +0200, Marek Vasut wrote:

> This patch fixes a situation where CONFIG_DM_SERIAL is enabled for
> regular U-Boot and SPL, but not for TPL. In that case, the build
> will try to include serial-uclass into the TPL nonetheless, because
> CONFIG_DM_SERIAL is set.
> 
> The solution is to check if the build is for SPL or TPL and in that
> case, check if CONFIG_$(SPL_TPL_)DM_SERIAL is also set. Only in that
> case, include serial-uclass.c . If the build is for regular U-Boot,
> CONFIG_BUILD is not set, so only check if CONFIG_DM_SERIAL is set
> and if so, include serial-uclass.c
> 
> Signed-off-by: Marek Vasut 
> Cc: Simon Glass 
> Cc: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] tpl: spi: Add CONFIG_TPL_SPI_LOAD to Kconfig

[Tom Rini]

On Sat, Apr 07, 2018 at 04:05:46PM +0200, Marek Vasut wrote:

> Add Kconfig entry for CONFIG_TPL_SPI_LOAD symbol to match the SPL one.
> 
> Signed-off-by: Marek Vasut 
> Cc: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] tpl: ymodem: Add CONFIG_TPL_YMODEM_SUPPORT to Kconfig

[Tom Rini]

On Sat, Apr 07, 2018 at 04:06:11PM +0200, Marek Vasut wrote:

> Add Kconfig entry for CONFIG_TPL_YMODEM_SUPPORT symbol to match the SPL one.
> 
> Signed-off-by: Marek Vasut 
> Cc: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] ARM: Fix Makefile during SPL and TPL build

[Tom Rini]

On Sat, Apr 07, 2018 at 04:06:36PM +0200, Marek Vasut wrote:

> The tiny variants of memset and memcpy implementations can be
> built for TPL as well, check whether a TPL build is in progress
> and avoid including the default variants.
> 
> Signed-off-by: Marek Vasut 
> Cc: Simon Glass 
> Cc: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] spl: spi: Move CONFIG_SPL_SPI_LOAD to Kconfig

[Tom Rini]

On Sat, Apr 07, 2018 at 04:05:27PM +0200, Marek Vasut wrote:

> Add Kconfig entry for CONFIG_SPL_SPI_LOAD symbol and move all
> configurations using it to Kconfig.
> 
> Signed-off-by: Marek Vasut 
> Cc: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH] arm: mach-omap2: Enlarge SYS_MALLOC_F_LEN

[Tom Rini]

On Wed, Apr 11, 2018 at 09:26:40PM +0200, Sjoerd Simons wrote:

> Since commit 8e14ba7bd524 ("gpio: omap_gpio: Add DM_FLAG_PRE_RELOC
> flag") omap GPIO gets bound before relocation.  Unfortunately due to
> this, on at least the beaglebone black, the pre-relocation memory pool
> gets exhausted before probing the serial port. This then causes u-boot
> to panic as CONFIG_REQUIRE_SERIAL_CONSOLE is set...

Ah, so, you're using am335x_boneblack_defconfig and not
am335x_evm_defconfig which is why I didn't see this problem myself.

> Resolve this by doubling the default size of the pre-relocation malloc
> pool on mach-omap2.
> 
> Signed-off-by: Sjoerd Simons 
> 
> ---
> 
>  arch/arm/mach-omap2/Kconfig | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
> index 3bb1ecb58d..02c5a4c0b8 100644
> --- a/arch/arm/mach-omap2/Kconfig
> +++ b/arch/arm/mach-omap2/Kconfig
> @@ -186,4 +186,7 @@ source "board/compulab/cm_t43/Kconfig"
>  config SPL_LDSCRIPT
>  default "arch/arm/mach-omap2/u-boot-spl.lds"
>  
> +config SYS_MALLOC_F_LEN
> + default 0x0800

This isn't the first bad example, ugh, but we shouldn't go this route.
Ideally we should modify the top-level Kconfig, as that declares
SYS_MALLOC_F_LEN, to be default 0x800 if ARCH_OMAP2PLUS.

That said, most of the am335x platforms set SYS_MALLOC_F_LEN to either
0x1000 or 0x2000.  At this point, I would recommend tweaking
configs/am335x_evm* and configs/am335x_boneblack* to be consistent and
use 0x1000 as I don't know if the HS variants can safely be pushed up to
0x2000 (adding in Andrew).  Thanks!

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[U-Boot] [PATCH] arm: mach-omap2: Enlarge SYS_MALLOC_F_LEN

[Sjoerd Simons]

Since commit 8e14ba7bd524 ("gpio: omap_gpio: Add DM_FLAG_PRE_RELOC
flag") omap GPIO gets bound before relocation.  Unfortunately due to
this, on at least the beaglebone black, the pre-relocation memory pool
gets exhausted before probing the serial port. This then causes u-boot
to panic as CONFIG_REQUIRE_SERIAL_CONSOLE is set...

Resolve this by doubling the default size of the pre-relocation malloc
pool on mach-omap2.

Signed-off-by: Sjoerd Simons 

---

 arch/arm/mach-omap2/Kconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 3bb1ecb58d..02c5a4c0b8 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -186,4 +186,7 @@ source "board/compulab/cm_t43/Kconfig"
 config SPL_LDSCRIPT
 default "arch/arm/mach-omap2/u-boot-spl.lds"
 
+config SYS_MALLOC_F_LEN
+   default 0x0800
+
 endif
-- 
2.17.0

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[U-Boot] [PATCH] configs: am335x_boneblack: add example debug uart configuration

[Sjoerd Simons]

To make it simpler to enable the debug uart on boneblack add debug
uart configuration as an example in the defconfig but with
CONFIG_DEBUG_UART disabled. Which allows a user to simple enable it when
needing easily without figuring out the right values for memory
base/clock and shift.

Signed-off-by: Sjoerd Simons 
---

 configs/am335x_boneblack_defconfig | 5 +
 1 file changed, 5 insertions(+)

diff --git a/configs/am335x_boneblack_defconfig 
b/configs/am335x_boneblack_defconfig
index 5688e44c0b..67c16e46d2 100644
--- a/configs/am335x_boneblack_defconfig
+++ b/configs/am335x_boneblack_defconfig
@@ -48,3 +48,8 @@ CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_LZO=y
 CONFIG_OF_LIBFDT=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_DEBUG_UART is not set
+CONFIG_DEBUG_UART_NS16550=y
+CONFIG_DEBUG_UART_BASE=0x44e09000
+CONFIG_DEBUG_UART_CLOCK=4800
+CONFIG_DEBUG_UART_SHIFT=2
-- 
2.17.0

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Re: [U-Boot] [PATCH v2 2/2] dm: i2c: implement gpio-based I2C deblock

[Heiko Schocher]

Hello Alexander,

Am 27.03.2018 um 16:52 schrieb Alexander Kochetkov:

The commit implement a gpio-based software deblocking. The code
extract I2C pins description from device tree, switch pins to GPIO
mode, toggle SCL until slave release SDA, send I2C stop and switch
I2C pins back to I2C mode.

Signed-off-by: Alexander Kochetkov 
---
  drivers/i2c/i2c-uclass.c |  118 ++
  1 file changed, 109 insertions(+), 9 deletions(-)


Applied to u-boot-i2c master

Thanks!

bye,
Heiko
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Re: [U-Boot] [PATCH 3/3] i2c: fsl: Add option to get clock from DT

[Heiko Schocher]

Hello Mario,

Am 28.03.2018 um 14:37 schrieb Mario Six:

Add an option to get the clock speed from the device tree, hence adding
compatibility with DM clock drivers.

Signed-off-by: Mario Six 
---
  drivers/i2c/fsl_i2c.c | 8 +++-
  1 file changed, 7 insertions(+), 1 deletion(-)


Applied to u-boot-i2c master

Thanks!

bye,
Heiko
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Re: [U-Boot] [PATCH v2 1/2] dm: i2c: dts: Add gpios and pinctrl device tree properties

[Heiko Schocher]

Hello Alexander,

Am 27.03.2018 um 16:52 schrieb Alexander Kochetkov:

The commit describe usage of gpios and pinctrl device tree
properties in order to enable gpio-based software deblocking.

Signed-off-by: Alexander Kochetkov 
---
  doc/device-tree-bindings/i2c/i2c.txt |   13 +
  1 file changed, 13 insertions(+)


Applied to u-boot-i2c master

Thanks!

bye,
Heiko
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Re: [U-Boot] [PATCH 2/3] i2c: fsl: Use dev_read_addr

[Heiko Schocher]

Hello Mario,

Am 28.03.2018 um 14:37 schrieb Mario Six:

Since bus translations are now fully supported, use a plain
"dev_read_addr" to get the device address from the device tree.

Signed-off-by: Mario Six 
---
  drivers/i2c/fsl_i2c.c | 5 +
  1 file changed, 1 insertion(+), 4 deletions(-)


Applied to u-boot-i2c master

Thanks!

bye,
Heiko
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Re: [U-Boot] [PATCH 1/3] i2c: ihs_i2c: Use new fpgamap interface

[Heiko Schocher]

Hello Mario,

Am 28.03.2018 um 14:37 schrieb Mario Six:

The fpgamap interface has been switched to a "single function + data
size" interface. Reflect this change in the IHS I2C driver.

Signed-off-by: Mario Six 
---
  drivers/i2c/ihs_i2c.c | 45 -
  1 file changed, 24 insertions(+), 21 deletions(-)


Applied to u-boot-i2c master

Thanks!

bye,
Heiko
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Re: [U-Boot] [PATCH v3 u-boot 1/3] usb: host: Add simple of glue driver for DWC3 USB Controllers integration

[Jean-Jacques Hiblot]

On 11/04/2018 17:08, Neil Armstrong wrote:

This is a port of the dwc3-of-simple driver from Linux to enable/deassert
clock and resets of a simple DWC3 Controller HW glue.

Signed-off-by: Neil Armstrong 
---
  drivers/usb/host/Kconfig  |   7 +++
  drivers/usb/host/Makefile |   1 +
  drivers/usb/host/dwc3-of-simple.c | 109 ++
  3 files changed, 117 insertions(+)
  create mode 100644 drivers/usb/host/dwc3-of-simple.c

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index a7249b7..6caa615 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -21,6 +21,13 @@ config USB_XHCI_DWC3
  Say Y or if your system has a Dual Role SuperSpeed
  USB controller based on the DesignWare USB3 IP Core.
  
+config USB_XHCI_DWC3_OF_SIMPLE

+   bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
+   select MISC
+   help
+ Support USB2/3 functionality in simple SoC integrations with
+ USB controller based on the DesignWare USB3 IP Core.
+
  config USB_XHCI_MVEBU
bool "MVEBU USB 3.0 support"
default y
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 9819489..abe4f90 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -49,6 +49,7 @@ obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
  # xhci
  obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
  obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
+obj-$(CONFIG_USB_XHCI_DWC3_OF_SIMPLE) += dwc3-of-simple.o
  obj-$(CONFIG_USB_XHCI_ROCKCHIP) += xhci-rockchip.o
  obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o
  obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o
diff --git a/drivers/usb/host/dwc3-of-simple.c 
b/drivers/usb/host/dwc3-of-simple.c
new file mode 100644
index 000..54a5f60
--- /dev/null
+++ b/drivers/usb/host/dwc3-of-simple.c
@@ -0,0 +1,109 @@
+/*
+ * dwc3-of-simple.c - OF glue layer for simple integrations
+ *
+ * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Author: Felipe Balbi 
+ *
+ * Copyright (C) 2018 BayLibre, SAS
+ * Author: Neil Armstrong 
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct dwc3_of_simple {
+   struct clk_bulk clks;
+   struct reset_ctl_bulk   resets;
+};
+
+static int dwc3_of_simple_reset_init(struct udevice *dev,
+struct dwc3_of_simple *simple)
+{
+   int ret;
+
+   ret = reset_get_bulk(dev, >resets);
+   if (ret == -ENOTSUPP)
+   return 0;
+   else if (ret)
+   return ret;
+
+   ret = reset_deassert_bulk(>resets);
+   if (ret) {
+   reset_release_bulk(>resets);
+   return ret;
+   }
+
+   return 0;
+}
+
+static int dwc3_of_simple_clk_init(struct udevice *dev,
+  struct dwc3_of_simple *simple)
+{
+   int ret;
+
+   ret = clk_get_bulk(dev, >clks);
+   if (ret == -ENOTSUPP)


Must be ENOSYS instead of ENOTSUPP, otherwise probe fails on platform not using 
the clk framework

tested-by: Jean-Jacques hiblot 


+   return 0;
+   if (ret)
+   return ret;
+
+#if CONFIG_IS_ENABLED(CLK)
+   ret = clk_enable_bulk(>clks);
+   if (ret) {
+   clk_release_bulk(>clks);
+   return ret;
+   }
+#endif
+
+   return 0;
+}
+
+static int dwc3_of_simple_probe(struct udevice *dev)
+{
+   struct dwc3_of_simple *simple = dev_get_platdata(dev);
+   int ret;
+
+   ret = dwc3_of_simple_clk_init(dev, simple);
+   if (ret)
+   return ret;
+
+   ret = dwc3_of_simple_reset_init(dev, simple);
+   if (ret)
+   return ret;
+
+   return 0;
+}
+
+static int dwc3_of_simple_remove(struct udevice *dev)
+{
+   struct dwc3_of_simple *simple = dev_get_platdata(dev);
+
+   reset_release_bulk(>resets);
+
+   clk_release_bulk(>clks);
+
+   return dm_scan_fdt_dev(dev);
+}
+
+static const struct udevice_id dwc3_of_simple_ids[] = {
+   { .compatible = "amlogic,meson-gxl-dwc3" },
+   { }
+};
+
+U_BOOT_DRIVER(dwc3_of_simple) = {
+   .name = "dwc3-of-simple",
+   .id = UCLASS_SIMPLE_BUS,
+   .of_match = dwc3_of_simple_ids,
+   .probe = dwc3_of_simple_probe,
+   .remove = dwc3_of_simple_remove,
+   .platdata_auto_alloc_size = sizeof(struct dwc3_of_simple),
+   .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};


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Re: [U-Boot] chiliSOM: USB bug

[Marcin Niestroj]

Hi Witold,

On 11.04.2018 08:18, sdrb wrote:

Hi,

I use Grinn's chiliSOM and very old U-boot 2014.07 on it. Unfortunately 
the newest u-boot doesn't run SPL properly - so I'm forced to use 
2014.07 version.


What are your problems exactly with SPL? What version of chiliSOM does
you board have? Mainline u-boot with SPL runs successfully on
chiliboard 1.1 (containing chiliSOM 2.2).



I noticed that there is some problem with USB maintenance. As far as I 
know the chiliSOM is TI AM335x compatible system so it uses Mentor USB 
OTG controller.


The problem occures when I'm trying to use following sequence of commands:

# usb start
# usb stop
# usb start


See output of commands issued on u-boot 2018.03:

=> usb start
starting USB...
USB0:   scanning bus 0 for devices... 1 USB Device(s) found
   scanning usb for storage devices... Device NOT ready
   Request Sense returned 02 3A 00
Device NOT ready
   Request Sense returned 02 3A 00
Device NOT ready
   Request Sense returned 02 3A 00
Device NOT ready
   Request Sense returned 02 3A 00
0 Storage Device(s) found
=> usb stop
stopping USB..
=> usb start
starting USB...
USB0:   scanning bus 0 for devices... 1 USB Device(s) found
   scanning usb for storage devices... Device NOT ready
   Request Sense returned 02 3A 00
Device NOT ready
   Request Sense returned 02 3A 00
Device NOT ready
   Request Sense returned 02 3A 00
Device NOT ready
   Request Sense returned 02 3A 00
0 Storage Device(s) found

Did you try to connect other USB devices? Is that issue connected
USB device dependent?

Regards,
Marcin



and after the second "usb start" I get error:

[2018-04-06 08:13:42.600] U-Boot# usb start
[2018-04-06 08:13:44.162] (Re)start USB...
[2018-04-06 08:13:44.164] USB0:   scanning bus 0 for devices... 5 USB 
Device(s) found
[2018-04-06 08:13:50.872]    scanning usb for storage devices... 0 
Storage Device(s) found

[2018-04-06 08:13:50.881] U-Boot# usb stop
[2018-04-06 08:13:55.514] stopping USB..
[2018-04-06 08:13:55.521] U-Boot# usb start
[2018-04-06 08:14:01.962] (Re)start USB...
[2018-04-06 08:14:01.964] USB0:   lowlevel init failed
[2018-04-06 08:14:16.730] USB error: all controllers failed lowlevel init
[2018-04-06 08:14:16.734] U-Boot#

I dig a little the code and I noticed that there is some line which 
breaks up things.
The problem is in proc musb_generic_disable() where there is zeroed 
DEVCTL register.
Seems like zeroing breaks somehow Mentor USB because after it it not 
possible to turn USB host mode.


I tried to solve the problem with push MUSB into suspend mode, then zero 
DEVCTL and then resume MUSB, but still no success.
So I decided to remove this line from my code and now it seems to work. 
I mean now USB is working fine:


[2018-04-06 08:15:44.290] U-Boot# usb start
[2018-04-06 08:15:45.787] (Re)start USB...
[2018-04-06 08:15:45.790] USB0:   scanning bus 0 for devices... 5 USB 
Device(s) found
[2018-04-06 08:15:52.489]    scanning usb for storage devices... 0 
Storage Device(s) found

[2018-04-06 08:15:52.495] U-Boot# usb stop
[2018-04-06 08:15:54.835] stopping USB..
[2018-04-06 08:15:54.837] U-Boot# usb start
[2018-04-06 08:17:03.323] (Re)start USB...
[2018-04-06 08:17:03.325] USB0:   scanning bus 0 for devices... 5 USB 
Device(s) found
[2018-04-06 08:17:09.864]    scanning usb for storage devices... 0 
Storage Device(s) found

[2018-04-06 08:17:09.871] U-Boot#


I know that my u-boot version 2014.07 is quite old, but the proc 
musb_generic_disable() in newest version is the same so probably the 
problem also still occures on other boards.


Anyone can verify or confirm that? I'd like to know if this is not 
specific to my board with chiliSOM.
I removed zeroing of DEVCTL register but maybe there is some better 
solution?


Any thoughts?

WK


commit 22447924ca27d3332698d3976f3e5e653bf893cc
Author: Witold Kowolik 
Date:   Wed Apr 11 07:49:42 2018 +0200

     ARM: am335x: chiliSOM: Temporary workaround for Mentor OTG USB in 
host mode


     Signed-off-by: Witold Kowolik 

diff --git a/drivers/usb/musb-new/musb_core.c 
b/drivers/usb/musb-new/musb_core.c

index 79e118ef85..2be2bd6081 100644
--- a/drivers/usb/musb-new/musb_core.c
+++ b/drivers/usb/musb-new/musb_core.c
@@ -977,7 +977,7 @@ static void musb_generic_disable(struct musb *musb)
  musb_writew(mbase, MUSB_INTRRXE, 0);

  /* off */
-    musb_writeb(mbase, MUSB_DEVCTL, 0);
+    /* musb_writeb(mbase, MUSB_DEVCTL, 0); */

  /*  flush pending interrupts */
  temp = musb_readb(mbase, MUSB_INTRUSB);

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--
Marcin Niestroj
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Re: [U-Boot] [PATCH V3 1/3] imx6: Define 'soc' env var for imx6 SoC

[Fabio Estevam]

On Wed, Apr 11, 2018 at 12:52 PM, Guillaume Gardet
 wrote:

> So, how to handle dtb filenames? Update with wrong soc definition ? Or drop
> this patch and define a FDTFILE for each flavor?

You can take a look at how we handle this for wandboard, cuboxi,
sabresd, for example.

Taking mx6sabresd as an example you can look at board_late_init() in
board/freescale/mx6sabresd/mx6sabresd.c

Then inside  include/configs/mx6sabre_common.h check for the findfdt
script that picks the correct dtb.
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[U-Boot] [PATCH v3 4/5] mtd: nand: mxs_nand: report correct ECC parameters

[Stefan Agner]

From: Stefan Agner 

Report correct ECC parameters back to the stack. Do not report
bytes as we have it not immeaditly available and the Linux version
also does not report it. It seems to have no aversive effect.

Signed-off-by: Stefan Agner 
---

Changes in v3: None
Changes in v2:
- Extend the patchset with "report correct ECC parameters" patch

 drivers/mtd/nand/mxs_nand.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index aa4c5a6526..2696b543ef 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -1212,9 +1212,8 @@ void board_nand_init(void)
 
nand->ecc.layout= _ecc_layout;
nand->ecc.mode  = NAND_ECC_HW;
-   nand->ecc.bytes = 9;
-   nand->ecc.size  = 512;
-   nand->ecc.strength  = 8;
+   nand->ecc.size  = nand_info->bch_geometry.ecc_chunk_size;
+   nand->ecc.strength  = nand_info->bch_geometry.ecc_strength;
 
/* second phase scan */
err = nand_scan_tail(mtd);
-- 
2.17.0

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[U-Boot] [PATCH v3 5/5] mtd: nand: mxs_nand: add minimal ECC support

[Stefan Agner]

From: Stefan Agner 

Add support for minimum ECC strength supported by the NAND chip.
This aligns with the behavior when using the fsl,use-minimum-ecc
device tree property in Linux.

Signed-off-by: Stefan Agner 
---

Changes in v3: None
Changes in v2: None

 drivers/mtd/nand/Kconfig|  8 +
 drivers/mtd/nand/mxs_nand.c | 71 +
 2 files changed, 65 insertions(+), 14 deletions(-)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 4db259fcb2..c039b9cc60 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -152,6 +152,14 @@ config NAND_MXS
  This enables NAND driver for the NAND flash controller on the
  MXS processors.
 
+if NAND_MXS
+
+config NAND_MXS_USE_MINIMUM_ECC
+   bool "Use minimum ECC strength supported by the controller"
+   default false
+
+endif
+
 config NAND_ZYNQ
bool "Support for Zynq Nand controller"
select SYS_NAND_SELF_INIT
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 2696b543ef..8305bf2302 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -211,11 +211,52 @@ static inline int mxs_nand_calc_mark_offset(struct 
bch_geometry *geo,
return 0;
 }
 
+static inline unsigned int mxs_nand_max_ecc_strength_supported(void)
+{
+   /* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */
+   if (is_mx6sx() || is_mx7())
+   return 62;
+   else
+   return 40;
+}
+
+static inline int mxs_nand_calc_ecc_layout_by_info(struct bch_geometry *geo,
+  struct mtd_info *mtd)
+{
+   struct nand_chip *chip = mtd_to_nand(mtd);
+
+   if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0))
+   return -ENOTSUPP;
+
+   switch (chip->ecc_step_ds) {
+   case SZ_512:
+   geo->gf_len = 13;
+   break;
+   case SZ_1K:
+   geo->gf_len = 14;
+   break;
+   default:
+   return -EINVAL;
+   }
+
+   geo->ecc_chunk_size = chip->ecc_step_ds;
+   geo->ecc_strength = round_up(chip->ecc_strength_ds, 2);
+
+   /* Keep the C >= O */
+   if (geo->ecc_chunk_size < mtd->oobsize)
+   return -EINVAL;
+
+   if (geo->ecc_strength > mxs_nand_max_ecc_strength_supported())
+   return -EINVAL;
+
+   geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
+
+   return 0;
+}
+
 static inline int mxs_nand_calc_ecc_layout(struct bch_geometry *geo,
   struct mtd_info *mtd)
 {
-   unsigned int max_ecc_strength_supported;
-
/* The default for the length of Galois Field. */
geo->gf_len = 13;
 
@@ -235,12 +276,6 @@ static inline int mxs_nand_calc_ecc_layout(struct 
bch_geometry *geo,
 
geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
 
-   /* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */
-   if (is_mx6sx() || is_mx7())
-   max_ecc_strength_supported = 62;
-   else
-   max_ecc_strength_supported = 40;
-
/*
 * Determine the ECC layout with the formula:
 *  ECC bits per chunk = (total page spare data bits) /
@@ -252,10 +287,8 @@ static inline int mxs_nand_calc_ecc_layout(struct 
bch_geometry *geo,
geo->ecc_strength = ((mtd->oobsize - MXS_NAND_METADATA_SIZE) * 8)
/ (geo->gf_len * geo->ecc_chunk_count);
 
-   geo->ecc_strength = min(round_down(geo->ecc_strength, 2), 
max_ecc_strength_supported);
-
-   if (mxs_nand_calc_mark_offset(geo, mtd->writesize) < 0)
-   return -EINVAL;
+   geo->ecc_strength = min(round_down(geo->ecc_strength, 2),
+   mxs_nand_max_ecc_strength_supported());
 
return 0;
 }
@@ -1006,9 +1039,19 @@ static int mxs_nand_setup_ecc(struct mtd_info *mtd)
struct bch_geometry *geo = _info->bch_geometry;
struct mxs_bch_regs *bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
uint32_t tmp;
+   int ret = -ENOTSUPP;
 
-   if (mxs_nand_calc_ecc_layout(geo, mtd))
-   return -EINVAL;
+#ifdef CONFIG_NAND_MXS_USE_MINIMUM_ECC
+   ret = mxs_nand_calc_ecc_layout_by_info(geo, mtd);
+#endif
+
+   if (ret == -ENOTSUPP)
+   ret = mxs_nand_calc_ecc_layout(geo, mtd);
+
+   if (ret)
+   return ret;
+
+   mxs_nand_calc_mark_offset(geo, mtd->writesize);
 
/* Configure BCH and set NFC geometry */
mxs_reset_block(_regs->hw_bch_ctrl_reg);
-- 
2.17.0

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[U-Boot] [PATCH v3 2/5] mtd: nand: mxs_nand: allow to enable BBT support

[Stefan Agner]

From: Stefan Agner 

Add config option which allows to enable on flash bad block table
support. This has the same effect as when using the device tree
property "nand-on-flash-bbt" in Linux.

Signed-off-by: Stefan Agner 
---

Changes in v3: None
Changes in v2: None

 drivers/mtd/nand/mxs_nand.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 9338f1889d..867549e530 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -1172,6 +1172,10 @@ void board_nand_init(void)
 
memset(_ecc_layout, 0, sizeof(fake_ecc_layout));
 
+#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
+   nand->bbt_options |= NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
+#endif
+
nand_set_controller_data(nand, nand_info);
nand->options |= NAND_NO_SUBPAGE_WRITE;
 
-- 
2.17.0

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[U-Boot] [PATCH v3 3/5] mtd: nand: mxs_nand: use structure for BCH geometry

[Stefan Agner]

From: Stefan Agner 

Calculate BCH geometry at start and store the information in
a structure. This avoids recalculation on every page access
and allows to calculate ECC relevant information in one place.
This patch does not change ECC layout or driver behavior in
any way.

The patch aligns the driver somewhat with the Linux GPMI NAND
driver which drives the same IP.

Signed-off-by: Stefan Agner 
---

Changes in v3: None
Changes in v2: None

 drivers/mtd/nand/mxs_nand.c | 182 +++-
 1 file changed, 95 insertions(+), 87 deletions(-)

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 867549e530..aa4c5a6526 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -30,7 +30,6 @@
 
 #defineMXS_NAND_DMA_DESCRIPTOR_COUNT   4
 
-#defineMXS_NAND_CHUNK_DATA_CHUNK_SIZE  512
 #if (defined(CONFIG_MX6) || defined(CONFIG_MX7))
 #defineMXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT2
 #else
@@ -47,12 +46,35 @@
 
 #defineMXS_NAND_BCH_TIMEOUT1
 
+/**
+ * @gf_len:   The length of Galois Field. (e.g., 13 or 14)
+ * @ecc_strength: A number that describes the strength of the ECC
+ *algorithm.
+ * @ecc_chunk_size:   The size, in bytes, of a single ECC chunk. Note
+ *the first chunk in the page includes both data 
and
+ *metadata, so it's a bit larger than this value.
+ * @ecc_chunk_count:  The number of ECC chunks in the page,
+ * @block_mark_byte_offset:   The byte offset in the ECC-based page view at
+ *which the underlying physical block mark appears.
+ * @block_mark_bit_offset:The bit offset into the ECC-based page view at
+ *which the underlying physical block mark appears.
+ */
+struct bch_geometry {
+   unsigned int  gf_len;
+   unsigned int  ecc_strength;
+   unsigned int  ecc_chunk_size;
+   unsigned int  ecc_chunk_count;
+   unsigned int  block_mark_byte_offset;
+   unsigned int  block_mark_bit_offset;
+};
+
 struct mxs_nand_info {
struct nand_chip chip;
int cur_chip;
 
uint32_tcmd_queue_len;
uint32_tdata_buf_size;
+   struct bch_geometry bch_geometry;
 
uint8_t *cmd_buf;
uint8_t *data_buf;
@@ -75,8 +97,6 @@ struct mxs_nand_info {
 };
 
 struct nand_ecclayout fake_ecc_layout;
-static int chunk_data_size = MXS_NAND_CHUNK_DATA_CHUNK_SIZE;
-static int galois_field = 13;
 
 /*
  * Cache management functions
@@ -137,61 +157,21 @@ static void mxs_nand_return_dma_descs(struct 
mxs_nand_info *info)
info->desc_index = 0;
 }
 
-static uint32_t mxs_nand_ecc_chunk_cnt(uint32_t page_data_size)
-{
-   return page_data_size / chunk_data_size;
-}
-
-static uint32_t mxs_nand_ecc_size_in_bits(uint32_t ecc_strength)
-{
-   return ecc_strength * galois_field;
-}
-
 static uint32_t mxs_nand_aux_status_offset(void)
 {
return (MXS_NAND_METADATA_SIZE + 0x3) & ~0x3;
 }
 
-static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size,
-   uint32_t page_oob_size)
+static inline int mxs_nand_calc_mark_offset(struct bch_geometry *geo,
+   uint32_t page_data_size)
 {
-   int ecc_strength;
-   int max_ecc_strength_supported;
-
-   /* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */
-   if (is_mx6sx() || is_mx7())
-   max_ecc_strength_supported = 62;
-   else
-   max_ecc_strength_supported = 40;
-
-   /*
-* Determine the ECC layout with the formula:
-*  ECC bits per chunk = (total page spare data bits) /
-*  (bits per ECC level) / (chunks per page)
-* where:
-*  total page spare data bits =
-*  (page oob size - meta data size) * (bits per byte)
-*/
-   ecc_strength = ((page_oob_size - MXS_NAND_METADATA_SIZE) * 8)
-   / (galois_field *
-  mxs_nand_ecc_chunk_cnt(page_data_size));
-
-   return min(round_down(ecc_strength, 2), max_ecc_strength_supported);
-}
-
-static inline uint32_t mxs_nand_get_mark_offset(uint32_t page_data_size,
-   uint32_t ecc_strength)
-{
-   uint32_t chunk_data_size_in_bits;
-   uint32_t chunk_ecc_size_in_bits;
+   uint32_t chunk_data_size_in_bits = geo->ecc_chunk_size * 8;
+   uint32_t chunk_ecc_size_in_bits = geo->ecc_strength * geo->gf_len;
uint32_t chunk_total_size_in_bits;
uint32_t block_mark_chunk_number;
uint32_t block_mark_chunk_bit_offset;
uint32_t block_mark_bit_offset;
 
-   chunk_data_size_in_bits = chunk_data_size * 

[U-Boot] [PATCH v3 1/5] mtd: nand: mxs_nand: use self init

[Stefan Agner]

From: Stefan Agner 

Instead of completing initialization via scan_bbt callback use
NAND self init to initialize the GPMI (MXS) NAND controller.

Suggested-by: Scott Wood 
Signed-off-by: Stefan Agner 
---

Changes in v3:
- Fix indentation

Changes in v2: None

 drivers/mtd/nand/Kconfig|  1 +
 drivers/mtd/nand/mxs_nand.c | 52 +
 2 files changed, 30 insertions(+), 23 deletions(-)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 94fbf89e4b..4db259fcb2 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -143,6 +143,7 @@ config NAND_MXC
 config NAND_MXS
bool "MXS NAND support"
depends on MX23 || MX28 || MX6 || MX7
+   select SYS_NAND_SELF_INIT
imply CMD_NAND
select APBH_DMA
select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index bed9b65ef4..9338f1889d 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -18,6 +18,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -47,6 +48,7 @@
 #defineMXS_NAND_BCH_TIMEOUT1
 
 struct mxs_nand_info {
+   struct nand_chip chip;
int cur_chip;
 
uint32_tcmd_queue_len;
@@ -972,20 +974,15 @@ static int mxs_nand_block_bad(struct mtd_info *mtd, 
loff_t ofs)
 }
 
 /*
- * Nominally, the purpose of this function is to look for or create the bad
- * block table. In fact, since the we call this function at the very end of
- * the initialization process started by nand_scan(), and we doesn't have a
- * more formal mechanism, we "hook" this function to continue init process.
- *
  * At this point, the physical NAND Flash chips have been identified and
  * counted, so we know the physical geometry. This enables us to make some
  * important configuration decisions.
  *
  * The return value of this function propagates directly back to this driver's
- * call to nand_scan(). Anything other than zero will cause this driver to
+ * board_nand_init(). Anything other than zero will cause this driver to
  * tear everything down and declare failure.
  */
-static int mxs_nand_scan_bbt(struct mtd_info *mtd)
+static int mxs_nand_setup_ecc(struct mtd_info *mtd)
 {
struct nand_chip *nand = mtd_to_nand(mtd);
struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
@@ -1047,8 +1044,7 @@ static int mxs_nand_scan_bbt(struct mtd_info *mtd)
mtd->_block_markbad = mxs_nand_hook_block_markbad;
}
 
-   /* We use the reference implementation for bad block management. */
-   return nand_default_bbt(mtd);
+   return 0;
 }
 
 /*
@@ -1150,27 +1146,22 @@ err1:
return ret;
 }
 
-/*!
- * This function is called during the driver binding process.
- *
- * @param   pdev  the device structure used to store device specific
- *information that is used by the suspend, resume and
- *remove functions
- *
- * @return  The function always returns 0.
- */
-int board_nand_init(struct nand_chip *nand)
+void board_nand_init(void)
 {
+   struct mtd_info *mtd;
struct mxs_nand_info *nand_info;
+   struct nand_chip *nand;
int err;
 
nand_info = malloc(sizeof(struct mxs_nand_info));
if (!nand_info) {
printf("MXS NAND: Failed to allocate private data\n");
-   return -ENOMEM;
+   return;
}
memset(nand_info, 0, sizeof(struct mxs_nand_info));
 
+   nand = _info->chip;
+   mtd = nand_to_mtd(nand);
err = mxs_nand_alloc_buffers(nand_info);
if (err)
goto err1;
@@ -1189,13 +1180,19 @@ int board_nand_init(struct nand_chip *nand)
nand->dev_ready = mxs_nand_device_ready;
nand->select_chip   = mxs_nand_select_chip;
nand->block_bad = mxs_nand_block_bad;
-   nand->scan_bbt  = mxs_nand_scan_bbt;
 
nand->read_byte = mxs_nand_read_byte;
 
nand->read_buf  = mxs_nand_read_buf;
nand->write_buf = mxs_nand_write_buf;
 
+   /* first scan to find the device and get the page size */
+   if (nand_scan_ident(mtd, CONFIG_SYS_MAX_NAND_DEVICE, NULL))
+   goto err2;
+
+   if (mxs_nand_setup_ecc(mtd))
+   goto err2;
+
nand->ecc.read_page = mxs_nand_ecc_read_page;
nand->ecc.write_page= mxs_nand_ecc_write_page;
nand->ecc.read_oob  = mxs_nand_ecc_read_oob;
@@ -1207,12 +1204,21 @@ int board_nand_init(struct nand_chip *nand)
nand->ecc.size  = 512;
nand->ecc.strength  = 8;
 
-   return 0;
+   /* second phase scan */
+   err = nand_scan_tail(mtd);
+   if (err)
+   goto err2;
+
+   err = nand_register(0, mtd);
+   if 

[U-Boot] [PATCH v3 0/5] mtd: nand: mxs_nand: improve ECC support

[Stefan Agner]

From: Stefan Agner 

This patchset reworks the drivers ECC calculation to align more
with the Linux driver gpmi-nand.c. It aims to implements minimal
ECC support as supported by the NAND chip.

This is the rebased version after moving MXS NAND to Kconfig.

--
Stefan

Changes in v3:
- Fix indentation
- Rebased and removed already applied Kconfig change

Changes in v2:
- Extend the patchset with "report correct ECC parameters" patch

Stefan Agner (5):
  mtd: nand: mxs_nand: use self init
  mtd: nand: mxs_nand: allow to enable BBT support
  mtd: nand: mxs_nand: use structure for BCH geometry
  mtd: nand: mxs_nand: report correct ECC parameters
  mtd: nand: mxs_nand: add minimal ECC support

 drivers/mtd/nand/Kconfig|   9 ++
 drivers/mtd/nand/mxs_nand.c | 282 ++--
 2 files changed, 180 insertions(+), 111 deletions(-)

-- 
2.17.0

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Re: [U-Boot] [PATCH V3 1/3] imx6: Define 'soc' env var for imx6 SoC

[Guillaume Gardet]

Le 11/04/2018 à 17:46, Gary Bisson a écrit :

Hi Guillaume,

On Wed, Apr 11, 2018 at 12:38:48PM +0200, Guillaume GARDET wrote:

Signed-off-by: Guillaume GARDET 
Cc: Troy Kisky 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Gary Bisson 

---
  arch/arm/mach-imx/mx6/soc.c | 34 ++
  1 file changed, 34 insertions(+)

diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
index 9b3d8f69b2..c4cb752c76 100644
--- a/arch/arm/mach-imx/mx6/soc.c
+++ b/arch/arm/mach-imx/mx6/soc.c
@@ -446,6 +446,40 @@ int arch_cpu_init(void)
return 0;
  }
  
+ #ifdef CONFIG_ARCH_MISC_INIT

+ int arch_misc_init(void)
+ {
+ #ifdef CONFIG_ENV_VARS_UBOOT_CONFIG
+   if (is_cpu_type(MXC_CPU_MX6QP))
+   env_set("soc", "imx6qp");
+   else if (is_cpu_type(MXC_CPU_MX6Q))
+   env_set("soc", "imx6q");
+   else if (is_cpu_type(MXC_CPU_MX6DP))
+   env_set("soc", "imx6dp");

If we want that soc variable to be used for dtb names, then the above
won't work. A i.MX6DP platform has its dtb named imx6qp-board.dtb.


+   else if (is_cpu_type(MXC_CPU_MX6D))
+   env_set("soc", "imx6d");

Same here, a Dual CPU actually uses a imx6q-board.dtb.


+   else if (is_mx6dl( ))
+   env_set("soc", "imx6dl");
+   else if (is_mx6sx( ))
+   env_set("soc", "imx6sx");
+   else if (is_mx6sl( ))
+   env_set("soc", "imx6sl");
+   else if (is_mx6solo( ))
+   env_set("soc", "imx6solo");

Same here, a Solo CPU uses a imx6dl-board.dtb.


So, how to handle dtb filenames? Update with wrong soc definition ? Or drop 
this patch and define a FDTFILE for each flavor?




+   else if (is_mx6ul( ))
+   env_set("soc", "imx6ul");
+   else if (is_mx6ull( ))
+   env_set("soc", "imx6ull");
+   else if (is_mx6sll( ))
+   env_set("soc", "imx6sll");
+   else
+   env_set("soc", "imx6");

In that case we most likely miss a CPU definition, maybe "unknown" would
be more explicit?


Currently soc is defined to imx6, so I think it is a good idea to keep imx6 
definition.

Guillaume




Regards,
Gary



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Re: [U-Boot] [PATCH v2 u-boot 1/2] reset: Add get/assert/deassert/release for bulk of reset signals

[Jean-Jacques Hiblot]

Hi Neil,

while trying to test your patches on dwc3, I ran into a compilation issue.

On 03/04/2018 11:40, Neil Armstrong wrote:

This patch adds a "bulk" API to the reset API in order to get/deassert/
assert/release a group of reset signals associated with a device.

This bulk API will avoid adding a copy of the same code to manage
a group of reset signals in drivers.

Signed-off-by: Neil Armstrong 
---
  drivers/reset/reset-uclass.c | 60 +++
  include/reset.h  | 99 
  2 files changed, 159 insertions(+)

diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c
index 307a297..9a5c9c9 100644
--- a/drivers/reset/reset-uclass.c
+++ b/drivers/reset/reset-uclass.c
@@ -81,6 +81,40 @@ int reset_get_by_index(struct udevice *dev, int index,
return 0;
  }
  
+int reset_get_bulk(struct udevice *dev, struct reset_ctl_bulk *bulk)

+{
+   int i, ret, err, count;
+   
+   bulk->count = 0;
+
+   count = dev_count_phandle_with_args(dev, "resets", "#reset-cells");
+   if (!count)
+   return 0;
+
+   bulk->resets = devm_kcalloc(dev, count, sizeof(struct reset_ctl),
+   GFP_KERNEL);
+   if (!bulk->resets)
+   return -ENOMEM;
+
+   for (i = 0; i < count; i++) {
+   ret = reset_get_by_index(dev, i, >resets[i]);
+   if (ret < 0)
+   goto bulk_get_err;
+
+   ++bulk->count;
+   }
+
+   return 0;
+
+bulk_get_err:
+   err = reset_release_all(bulk->resets, bulk->count);
+   if (err)
+   debug("%s: could release all resets for %p\n",
+ __func__, dev);
+
+   return ret;
+}
+
  int reset_get_by_name(struct udevice *dev, const char *name,
 struct reset_ctl *reset_ctl)
  {
@@ -126,6 +160,19 @@ int reset_assert(struct reset_ctl *reset_ctl)
return ops->rst_assert(reset_ctl);
  }
  
+int reset_assert_bulk(struct reset_ctl_bulk *bulk)

+{
+   int i, ret;
+
+   for (i = 0; i < bulk->count; i++) {
+   ret = reset_assert(>resets[i]);
+   if (ret < 0)
+   return ret;
+   }
+
+   return 0;
+}
+
  int reset_deassert(struct reset_ctl *reset_ctl)
  {
struct reset_ops *ops = reset_dev_ops(reset_ctl->dev);
@@ -135,6 +182,19 @@ int reset_deassert(struct reset_ctl *reset_ctl)
return ops->rst_deassert(reset_ctl);
  }
  
+int reset_deassert_bulk(struct reset_ctl_bulk *bulk)

+{
+   int i, ret;
+
+   for (i = 0; i < bulk->count; i++) {
+   ret = reset_deassert(>resets[i]);
+   if (ret < 0)
+   return ret;
+   }
+
+   return 0;
+}
+
  int reset_release_all(struct reset_ctl *reset_ctl, int count)
  {
int i, ret;
diff --git a/include/reset.h b/include/reset.h
index 7185ade..d38f176 100644
--- a/include/reset.h
+++ b/include/reset.h
@@ -60,6 +60,24 @@ struct reset_ctl {
unsigned long id;
  };
  
+/**

+ * struct reset_ctl_bulk - A handle to (allowing control of) a bulk of reset
+ * signals.
+ *
+ * Clients provide storage for the reset control bulk. The content of the
+ * structure is managed solely by the reset API. A reset control bulk struct is
+ * initialized by "get"ing the reset control bulk struct.
+ * The reset control bulk struct is passed to all other bulk reset APIs to 
apply
+ * the API to all the reset signals in the bulk struct.
+ *
+ * @resets: An array of reset signal handles handles.
+ * @count: The number of reset signal handles in the reset array.
+ */
+struct reset_ctl_bulk {
+   struct reset_ctl *resets;
+   unsigned int count;
+};
+
  #ifdef CONFIG_DM_RESET
  /**
   * reset_get_by_index - Get/request a reset signal by integer index.
@@ -81,6 +99,22 @@ int reset_get_by_index(struct udevice *dev, int index,
   struct reset_ctl *reset_ctl);
  
  /**

+ * reset_get_bulk - Get/request all reset signals of a device.
+ *
+ * This looks up and requests all reset signals of the client device; each
+ * device is assumed to have n reset signals associated with it somehow,
+ * and this function finds and requests all of them in a separate structure.
+ * The mapping of client device reset signals indices to provider reset signals
+ * may be via device-tree properties, board-provided mapping tables, or some
+ * other mechanism.
+ *
+ * @dev:   The client device.
+ * @bulk   A pointer to a reset control bulk struct to initialize.
+ * @return 0 if OK, or a negative error code.
+ */
+int reset_get_bulk(struct udevice *dev, struct reset_ctl_bulk *bulk);
+
+/**
   * reset_get_by_name - Get/request a reset signal by name.
   *
   * This looks up and requests a reset signal. The name is relative to the
@@ -132,6 +166,21 @@ int reset_free(struct reset_ctl *reset_ctl);
  int reset_assert(struct reset_ctl *reset_ctl);
  
  /**

+ 

Re: [U-Boot] [PATCH V3 1/3] imx6: Define 'soc' env var for imx6 SoC

[Gary Bisson]

Hi Guillaume,

On Wed, Apr 11, 2018 at 12:38:48PM +0200, Guillaume GARDET wrote:
> Signed-off-by: Guillaume GARDET 
> Cc: Troy Kisky 
> Cc: Stefano Babic 
> Cc: Fabio Estevam 
> Cc: Gary Bisson 
> 
> ---
>  arch/arm/mach-imx/mx6/soc.c | 34 ++
>  1 file changed, 34 insertions(+)
> 
> diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
> index 9b3d8f69b2..c4cb752c76 100644
> --- a/arch/arm/mach-imx/mx6/soc.c
> +++ b/arch/arm/mach-imx/mx6/soc.c
> @@ -446,6 +446,40 @@ int arch_cpu_init(void)
>   return 0;
>  }
>  
> + #ifdef CONFIG_ARCH_MISC_INIT
> + int arch_misc_init(void)
> + {
> + #ifdef CONFIG_ENV_VARS_UBOOT_CONFIG
> + if (is_cpu_type(MXC_CPU_MX6QP))
> + env_set("soc", "imx6qp");
> + else if (is_cpu_type(MXC_CPU_MX6Q))
> + env_set("soc", "imx6q");
> + else if (is_cpu_type(MXC_CPU_MX6DP))
> + env_set("soc", "imx6dp");

If we want that soc variable to be used for dtb names, then the above
won't work. A i.MX6DP platform has its dtb named imx6qp-board.dtb.

> + else if (is_cpu_type(MXC_CPU_MX6D))
> + env_set("soc", "imx6d");

Same here, a Dual CPU actually uses a imx6q-board.dtb.

> + else if (is_mx6dl( ))
> + env_set("soc", "imx6dl");
> + else if (is_mx6sx( ))
> + env_set("soc", "imx6sx");
> + else if (is_mx6sl( ))
> + env_set("soc", "imx6sl");
> + else if (is_mx6solo( ))
> + env_set("soc", "imx6solo");

Same here, a Solo CPU uses a imx6dl-board.dtb.

> + else if (is_mx6ul( ))
> + env_set("soc", "imx6ul");
> + else if (is_mx6ull( ))
> + env_set("soc", "imx6ull");
> + else if (is_mx6sll( ))
> + env_set("soc", "imx6sll");
> + else
> + env_set("soc", "imx6");

In that case we most likely miss a CPU definition, maybe "unknown" would
be more explicit?

Regards,
Gary
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[U-Boot] [PATCH u-boot 2/2] pinctrl: meson: Update pinmux with new Linux bindings

[Neil Armstrong]

The pinctrl bindings has changed for Amlogic Meson SoCs since Linux 4.13,
update the pinctrl driver to take this in account.

Signed-off-by: Neil Armstrong 
---
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 12 ++--
 drivers/pinctrl/meson/pinctrl-meson-gxl.c  | 14 +++---
 2 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c 
b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
index 87c9912..928356f 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
@@ -14,7 +14,7 @@
 
 #include "pinctrl-meson.h"
 
-#define EE_OFF 14
+#define EE_OFF 15
 
 static const unsigned int emmc_nand_d07_pins[] = {
PIN(BOOT_0, EE_OFF), PIN(BOOT_1, EE_OFF), PIN(BOOT_2, EE_OFF),
@@ -319,8 +319,6 @@ static const char * const gpio_periphs_groups[] = {
"GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
"GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19",
"GPIOX_20", "GPIOX_21", "GPIOX_22",
-
-   "GPIO_TEST_N",
 };
 
 static const char * const emmc_groups[] = {
@@ -355,6 +353,8 @@ static const char * const gpio_aobus_groups[] = {
"GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",
"GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
"GPIOAO_10", "GPIOAO_11", "GPIOAO_12", "GPIOAO_13",
+
+   "GPIO_TEST_N",
 };
 
 static const char * const uart_ao_groups[] = {
@@ -410,11 +410,11 @@ static struct meson_bank meson_gxbb_aobus_banks[] = {
 
 struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = {
.name   = "periphs-banks",
-   .pin_base   = 14,
+   .pin_base   = 15,
.groups = meson_gxbb_periphs_groups,
.funcs  = meson_gxbb_periphs_functions,
.banks  = meson_gxbb_periphs_banks,
-   .num_pins   = 120,
+   .num_pins   = 119,
.num_groups = ARRAY_SIZE(meson_gxbb_periphs_groups),
.num_funcs  = ARRAY_SIZE(meson_gxbb_periphs_functions),
.num_banks  = ARRAY_SIZE(meson_gxbb_periphs_banks),
@@ -426,7 +426,7 @@ struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = {
.groups = meson_gxbb_aobus_groups,
.funcs  = meson_gxbb_aobus_functions,
.banks  = meson_gxbb_aobus_banks,
-   .num_pins   = 14,
+   .num_pins   = 15,
.num_groups = ARRAY_SIZE(meson_gxbb_aobus_groups),
.num_funcs  = ARRAY_SIZE(meson_gxbb_aobus_functions),
.num_banks  = ARRAY_SIZE(meson_gxbb_aobus_banks),
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c 
b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
index eebfaa9..fdc379b 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
@@ -14,7 +14,7 @@
 
 #include "pinctrl-meson.h"
 
-#define EE_OFF 10
+#define EE_OFF 11
 
 static const unsigned int emmc_nand_d07_pins[] = {
PIN(BOOT_0, EE_OFF), PIN(BOOT_1, EE_OFF), PIN(BOOT_2, EE_OFF),
@@ -290,7 +290,7 @@ static struct meson_pmx_group meson_gxl_periphs_groups[] = {
GPIO_GROUP(GPIOCLK_0, EE_OFF),
GPIO_GROUP(GPIOCLK_1, EE_OFF),
 
-   GPIO_GROUP(GPIO_TEST_N, EE_OFF),
+   GPIO_GROUP(GPIO_TEST_N, 0),
 
/* Bank X */
GROUP(sdio_d0,  5,  31),
@@ -472,8 +472,6 @@ static const char * const gpio_periphs_groups[] = {
"GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
"GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
"GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18",
-
-   "GPIO_TEST_N",
 };
 
 static const char * const emmc_groups[] = {
@@ -588,6 +586,8 @@ static const char * const tsin_a_groups[] = {
 static const char * const gpio_aobus_groups[] = {
"GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",
"GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
+
+   "GPIO_TEST_N",
 };
 
 static const char * const uart_ao_groups[] = {
@@ -692,11 +692,11 @@ static struct meson_bank meson_gxl_aobus_banks[] = {
 
 struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = {
.name   = "periphs-banks",
-   .pin_base   = 10,
+   .pin_base   = 11,
.groups = meson_gxl_periphs_groups,
.funcs  = meson_gxl_periphs_functions,
.banks  = meson_gxl_periphs_banks,
-   .num_pins   = 101,
+   .num_pins   = 100,
.num_groups = ARRAY_SIZE(meson_gxl_periphs_groups),
.num_funcs  = ARRAY_SIZE(meson_gxl_periphs_functions),
.num_banks  = ARRAY_SIZE(meson_gxl_periphs_banks),
@@ -708,7 +708,7 @@ struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = {
.groups = meson_gxl_aobus_groups,
.funcs  = meson_gxl_aobus_functions,
.banks  = meson_gxl_aobus_banks,
-   .num_pins   = 10,
+   .num_pins   = 11,

Re: [U-Boot] [PATCH V3 1/3] imx6: Define 'soc' env var for imx6 SoC

[Fabio Estevam]

On Wed, Apr 11, 2018 at 11:41 AM, Guillaume Gardet
 wrote:

> This is for efi fdtfile fallback definition for default distro config for
> nitrogen6x board.
> Is it ok for you?

Yes, this is the explanation that I was looking for :-)

Please send a new version with this info added in the commit log.

Thanks
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[U-Boot] [PATCH u-boot 1/2] ARM64: meson: Sync DT and Bindings with Linux 4.16

[Neil Armstrong]

Synchronize the Linux Device Tree for Amlogic Meson GX boards from Linux 4.16.0.

Signed-off-by: Neil Armstrong 
---
 arch/arm/dts/meson-gx.dtsi|  87 ++-
 arch/arm/dts/meson-gxbb-odroidc2.dts  |  56 --
 arch/arm/dts/meson-gxbb.dtsi  | 137 ++--
 arch/arm/dts/meson-gxl-s905x-khadas-vim.dts   |  63 +++
 arch/arm/dts/meson-gxl-s905x-libretech-cc.dts | 108 ++-
 arch/arm/dts/meson-gxl-s905x-p212.dts |   7 ++
 arch/arm/dts/meson-gxl-s905x-p212.dtsi|  24 -
 arch/arm/dts/meson-gxl.dtsi   | 147 --
 include/dt-bindings/clock/gxbb-aoclkc.h   |   1 +
 include/dt-bindings/clock/gxbb-clkc.h |  75 +
 include/dt-bindings/gpio/meson-gxbb-gpio.h|   2 +-
 include/dt-bindings/gpio/meson-gxl-gpio.h |   2 +-
 12 files changed, 645 insertions(+), 64 deletions(-)

diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi
index 738ed68..4ee2e79 100644
--- a/arch/arm/dts/meson-gx.dtsi
+++ b/arch/arm/dts/meson-gx.dtsi
@@ -211,32 +211,39 @@
#size-cells = <2>;
ranges;
 
-   cbus: cbus@c110 {
+   cbus: bus@c110 {
compatible = "simple-bus";
reg = <0x0 0xc110 0x0 0x10>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc110 0x0 0x10>;
 
+   gpio_intc: interrupt-controller@9880 {
+   compatible = "amlogic,meson-gpio-intc";
+   reg = <0x0 0x9880 0x0 0x10>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   amlogic,channel-interrupts = <64 65 66 67 68 69 
70 71>;
+   status = "disabled";
+   };
+
reset: reset-controller@4404 {
compatible = "amlogic,meson-gx-reset", 
"amlogic,meson-gxbb-reset";
-   reg = <0x0 0x04404 0x0 0x20>;
+   reg = <0x0 0x04404 0x0 0x9c>;
#reset-cells = <1>;
};
 
uart_A: serial@84c0 {
-   compatible = "amlogic,meson-uart";
-   reg = <0x0 0x84c0 0x0 0x14>;
+   compatible = "amlogic,meson-gx-uart";
+   reg = <0x0 0x84c0 0x0 0x18>;
interrupts = ;
-   clocks = <>;
status = "disabled";
};
 
uart_B: serial@84dc {
-   compatible = "amlogic,meson-uart";
-   reg = <0x0 0x84dc 0x0 0x14>;
+   compatible = "amlogic,meson-gx-uart";
+   reg = <0x0 0x84dc 0x0 0x18>;
interrupts = ;
-   clocks = <>;
status = "disabled";
};
 
@@ -279,10 +286,9 @@
};
 
uart_C: serial@8700 {
-   compatible = "amlogic,meson-uart";
-   reg = <0x0 0x8700 0x0 0x14>;
+   compatible = "amlogic,meson-gx-uart";
+   reg = <0x0 0x8700 0x0 0x18>;
interrupts = ;
-   clocks = <>;
status = "disabled";
};
 
@@ -360,33 +366,53 @@
};
};
 
-   aobus: aobus@c810 {
+   aobus: bus@c810 {
compatible = "simple-bus";
reg = <0x0 0xc810 0x0 0x10>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc810 0x0 0x10>;
 
-   clkc_AO: clock-controller@040 {
-   compatible = "amlogic,gx-aoclkc", 
"amlogic,gxbb-aoclkc";
-   reg = <0x0 0x00040 0x0 0x4>;
-   #clock-cells = <1>;
-   #reset-cells = <1>;
+   sysctrl_AO: sys-ctrl@0 {
+   compatible = "amlogic,meson-gx-ao-sysctrl", 
"syscon", "simple-mfd";
+   reg =  <0x0 0x0 0x0 0x100>;
+
+   pwrc_vpu: power-controller-vpu {
+   compatible = 
"amlogic,meson-gx-pwrc-vpu";
+   

[U-Boot] [PATCH u-boot 0/2] ARM64: meson: Sync DT and Bindings with Linux 4.16

[Neil Armstrong]

Synchronize the Amlogic Meson GX Device Tree and bindings with Linux 4.16 to
beneficiate with the new DT nodes.

The pinctrl bindings has changed since 4.13, so the pinctrl driver must be
updated with the changes.

Neil Armstrong (2):
  ARM64: meson: Sync DT and Bindings with Linux 4.16
  pinctrl: meson: Update pinmux with new Linux bindings

 arch/arm/dts/meson-gx.dtsi|  87 ++-
 arch/arm/dts/meson-gxbb-odroidc2.dts  |  56 --
 arch/arm/dts/meson-gxbb.dtsi  | 137 ++--
 arch/arm/dts/meson-gxl-s905x-khadas-vim.dts   |  63 +++
 arch/arm/dts/meson-gxl-s905x-libretech-cc.dts | 108 ++-
 arch/arm/dts/meson-gxl-s905x-p212.dts |   7 ++
 arch/arm/dts/meson-gxl-s905x-p212.dtsi|  24 -
 arch/arm/dts/meson-gxl.dtsi   | 147 --
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c|  12 +--
 drivers/pinctrl/meson/pinctrl-meson-gxl.c |  14 +--
 include/dt-bindings/clock/gxbb-aoclkc.h   |   1 +
 include/dt-bindings/clock/gxbb-clkc.h |  75 +
 include/dt-bindings/gpio/meson-gxbb-gpio.h|   2 +-
 include/dt-bindings/gpio/meson-gxl-gpio.h |   2 +-
 14 files changed, 658 insertions(+), 77 deletions(-)

-- 
2.7.4

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Re: [U-Boot] [PATCH v3 u-boot 0/3] Add USB Support for Amlogic Meson GXL SoCs

[Marek Vasut]

On 04/11/2018 05:07 PM, Neil Armstrong wrote:
> This patchset adds support for USB for the Amlogic Meson GXL SoCs following
> the work done for Linux by Martin Blumenstingl at [1] [2] [3].
> 
> The support consist of :
>  - A port of dwc3-of-simple from Linux to U-boot
>  - A change to support more than 2 PHYs in the DWC3 DM driver
>  - An USB2 PHY Driver and an USB3 PHY Driver
> 
> The DWC3 Controller has up to 4 PHYs connected :
>  - 2 USB2 PHYs and an USB3 PHY for GXL SoCs
>  - 3 USB2 PHYs and an USB3 PHY for the GXM SoC Variant
> This is enabled by the "usb: host: dwc3: Add support for multiple PHYs" patch.
> This patch is based on the "xhci-dwc3: Couple of fixes for USB3 support"
> serie from Vignesh R, on the u-boot-usb tree.
> 
> The DWC3 Controller glue is generic enough to use the dwc3-of-simple from 
> Linux
> and can be easily ported to U-Boot as a Simple-Bus with Glue-Specific clocks
> and Reset lines setup.
> 
> This depends on the recently applied :
>  - clk: Add get/enable/disable/release for a bulk of clocks at [4]
>  - reset: Add get/assert/deassert/release for bulk of reset signals at [5]
> in order to manage the clocks and resets of the Glue in a clean fashion.
> 
> The USB PHY driver supports the standard generic PHY interface and supports
> the power-on/off calls and set the Host mode by default.
> They are based on the excellent work from Martin Blumenstingl merged in linux.
> 
> Changes since v2:
>  - Drop #if and use the empty stubs for clock & reset API
> 
> Changes since v1:
>  - switch to submitted clk/reset bulk API
>  - splitted dwc3 multiple phy init error between poweroff & exit
> 

Applied all, thanks.

-- 
Best regards,
Marek Vasut
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[U-Boot] [PATCH] fit: skip signature verification if board request

[Jun Nie]

It may be unnecessary to check signature on unlocked board.
Get the hint from platform specific code to support secure boot
and non-secure boot with the same binary, so that boot is not
blocked if board is not locked and has no key for signature
verification.

Signed-off-by: Jun Nie 
---
 common/image-sig.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/common/image-sig.c b/common/image-sig.c
index d9f712f..f3d1252 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -151,6 +151,11 @@ struct image_region *fit_region_make_list(const void *fit,
return region;
 }
 
+int __attribute__((weak)) fit_board_skip_sig_verification(void)
+{
+   return 0;
+}
+
 static int fit_image_setup_verify(struct image_sign_info *info,
const void *fit, int noffset, int required_keynode,
char **err_msgp)
@@ -188,6 +193,12 @@ int fit_image_check_sig(const void *fit, int noffset, 
const void *data,
uint8_t *fit_value;
int fit_value_len;
 
+   /* Skip verification if board says that */
+   if (fit_board_skip_sig_verification()) {
+   printf("signature check skipped\n");
+   return 0;
+   }
+
*err_msgp = NULL;
if (fit_image_setup_verify(, fit, noffset, required_keynode,
   err_msgp))
@@ -438,6 +449,12 @@ int fit_config_verify_required_sigs(const void *fit, int 
conf_noffset,
int noffset;
int sig_node;
 
+   /* Skip verification if board says that */
+   if (fit_board_skip_sig_verification()) {
+   printf("signature check skipped\n");
+   return 0;
+   }
+
/* Work out what we need to verify */
sig_node = fdt_subnode_offset(sig_blob, 0, FIT_SIG_NODENAME);
if (sig_node < 0) {
-- 
2.7.4

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[U-Boot] [PATCH v2 u-boot] ARM: meson: rename GXBB to GX

[Neil Armstrong]

Taking into account the Amlogic Family name starts with GX, including
the GXBB, GXL and GXM SoCs.

Signed-off-by: Neil Armstrong 
---

Changes since v1:
 - Resent as single patch since cpuinfo needs further work
 - Aligned the defines in gx.h

 arch/arm/include/asm/arch-meson/gx.h  | 70 +++
 arch/arm/include/asm/arch-meson/gxbb.h| 70 ---
 arch/arm/mach-meson/board.c   | 28 ++---
 arch/arm/mach-meson/eth.c | 24 +--
 arch/arm/mach-meson/sm.c  |  2 +-
 board/amlogic/khadas-vim/khadas-vim.c |  2 +-
 board/amlogic/libretech-cc/libretech-cc.c |  6 +--
 board/amlogic/odroid-c2/odroid-c2.c   | 10 ++---
 board/amlogic/p212/p212.c |  2 +-
 include/configs/khadas-vim.h  |  2 +-
 include/configs/libretech-cc.h|  2 +-
 include/configs/meson-gx-common.h | 47 +
 include/configs/meson-gxbb-common.h   | 47 -
 include/configs/odroid-c2.h   |  2 +-
 include/configs/p212.h|  2 +-
 15 files changed, 158 insertions(+), 158 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-meson/gx.h
 delete mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
 create mode 100644 include/configs/meson-gx-common.h
 delete mode 100644 include/configs/meson-gxbb-common.h

diff --git a/arch/arm/include/asm/arch-meson/gx.h 
b/arch/arm/include/asm/arch-meson/gx.h
new file mode 100644
index 000..2b311cd
--- /dev/null
+++ b/arch/arm/include/asm/arch-meson/gx.h
@@ -0,0 +1,70 @@
+/*
+ * (C) Copyright 2016 - Beniamino Galvani 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __GX_H__
+#define __GX_H__
+
+#define GX_FIRMWARE_MEM_SIZE   0x100
+
+#define GX_AOBUS_BASE  0xc810
+#define GX_PERIPHS_BASE0xc8834400
+#define GX_HIU_BASE0xc883c000
+#define GX_ETH_BASE0xc941
+
+/* Always-On Peripherals registers */
+#define GX_AO_ADDR(off)(GX_AOBUS_BASE + ((off) << 2))
+
+#define GX_AO_SEC_GP_CFG0  GX_AO_ADDR(0x90)
+#define GX_AO_SEC_GP_CFG3  GX_AO_ADDR(0x93)
+#define GX_AO_SEC_GP_CFG4  GX_AO_ADDR(0x94)
+#define GX_AO_SEC_GP_CFG5  GX_AO_ADDR(0x95)
+
+#define GX_AO_MEM_SIZE_MASK0x
+#define GX_AO_MEM_SIZE_SHIFT   16
+#define GX_AO_BL31_RSVMEM_SIZE_MASK0x
+#define GX_AO_BL31_RSVMEM_SIZE_SHIFT   16
+#define GX_AO_BL32_RSVMEM_SIZE_MASK0x
+
+/* Peripherals registers */
+#define GX_PERIPHS_ADDR(off)   (GX_PERIPHS_BASE + ((off) << 2))
+
+/* GPIO registers 0 to 6 */
+#define _GX_GPIO_OFF(n)((n) == 6 ? 0x08 : 0x0c + 3 * 
(n))
+#define GX_GPIO_EN(n)  GX_PERIPHS_ADDR(_GX_GPIO_OFF(n) + 0)
+#define GX_GPIO_IN(n)  GX_PERIPHS_ADDR(_GX_GPIO_OFF(n) + 1)
+#define GX_GPIO_OUT(n) GX_PERIPHS_ADDR(_GX_GPIO_OFF(n) + 2)
+
+#define GX_ETH_REG_0   GX_PERIPHS_ADDR(0x50)
+#define GX_ETH_REG_1   GX_PERIPHS_ADDR(0x51)
+#define GX_ETH_REG_2   GX_PERIPHS_ADDR(0x56)
+#define GX_ETH_REG_3   GX_PERIPHS_ADDR(0x57)
+
+#define GX_ETH_REG_0_PHY_INTF  BIT(0)
+#define GX_ETH_REG_0_TX_PHASE(x)   (((x) & 3) << 5)
+#define GX_ETH_REG_0_TX_RATIO(x)   (((x) & 7) << 7)
+#define GX_ETH_REG_0_PHY_CLK_ENBIT(10)
+#define GX_ETH_REG_0_INVERT_RMII_CLK   BIT(11)
+#define GX_ETH_REG_0_CLK_ENBIT(12)
+
+/* HIU registers */
+#define GX_HIU_ADDR(off)   (GX_HIU_BASE + ((off) << 2))
+
+#define GX_MEM_PD_REG_0GX_HIU_ADDR(0x40)
+
+/* Ethernet memory power domain */
+#define GX_MEM_PD_REG_0_ETH_MASK   (BIT(2) | BIT(3))
+
+/* Clock gates */
+#define GX_GCLK_MPEG_0 GX_HIU_ADDR(0x50)
+#define GX_GCLK_MPEG_1 GX_HIU_ADDR(0x51)
+#define GX_GCLK_MPEG_2 GX_HIU_ADDR(0x52)
+#define GX_GCLK_MPEG_OTHER GX_HIU_ADDR(0x53)
+#define GX_GCLK_MPEG_AOGX_HIU_ADDR(0x54)
+
+#define GX_GCLK_MPEG_0_I2C BIT(9)
+#define GX_GCLK_MPEG_1_ETH BIT(3)
+
+#endif /* __GX_H__ */
diff --git a/arch/arm/include/asm/arch-meson/gxbb.h 
b/arch/arm/include/asm/arch-meson/gxbb.h
deleted file mode 100644
index ef63dea..000
--- a/arch/arm/include/asm/arch-meson/gxbb.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * (C) Copyright 2016 - Beniamino Galvani 
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#ifndef __GXBB_H__
-#define __GXBB_H__
-
-#define GXBB_FIRMWARE_MEM_SIZE 0x100
-
-#define GXBB_AOBUS_BASE0xc810
-#define GXBB_PERIPHS_BASE  0xc8834400
-#define GXBB_HIU_BASE  0xc883c000
-#define GXBB_ETH_BASE  0xc941
-
-/* Always-On Peripherals 

[U-Boot] [PATCH v3 u-boot 3/3] phy: Add Amlogic Meson USB2 & USB3 Generic PHY drivers

[Neil Armstrong]

The Amlogic Meson GXL and GXM (simple variant) embeds up to 3 USB2 PHYs
and an USB3 PHY. This patch adds drivers for these for the standard generic
PHY interface and supports the power-on/off calls and set the Host mode by
default.
They are based on the excellent work from Martin Blumenstingl merged in linux.

Signed-off-by: Neil Armstrong 
---
 drivers/phy/Kconfig  |   8 ++
 drivers/phy/Makefile |   1 +
 drivers/phy/meson-gxl-usb2.c | 238 +++
 drivers/phy/meson-gxl-usb3.c | 201 
 4 files changed, 448 insertions(+)
 create mode 100644 drivers/phy/meson-gxl-usb2.c
 create mode 100644 drivers/phy/meson-gxl-usb3.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 3b9a09c..99a6d95 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -85,4 +85,12 @@ config STI_USB_PHY
  used by USB2 and USB3 Host controllers available on
  STiH407 SoC families.
 
+config MESON_GXL_USB_PHY
+   bool "Amlogic Meson GXL USB PHYs"
+   depends on PHY && ARCH_MESON && MESON_GXL
+   imply REGMAP
+   help
+ This is the generic phy driver for the Amlogic Meson GXL
+ USB2 and USB3 PHYS.
+
 endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 668040b..6c1610e 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
 obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o
+obj-$(CONFIG_MESON_GXL_USB_PHY) += meson-gxl-usb2.o meson-gxl-usb3.o
diff --git a/drivers/phy/meson-gxl-usb2.c b/drivers/phy/meson-gxl-usb2.c
new file mode 100644
index 000..15c9c89
--- /dev/null
+++ b/drivers/phy/meson-gxl-usb2.c
@@ -0,0 +1,238 @@
+/*
+ * Meson GXL and GXM USB2 PHY driver
+ *
+ * Copyright (C) 2017 Martin Blumenstingl 
+ * Copyright (C) 2018 BayLibre, SAS
+ * Author: Neil Armstrong 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* bits [31:27] are read-only */
+#define U2P_R0 0x0
+   #define U2P_R0_BYPASS_SEL   BIT(0)
+   #define U2P_R0_BYPASS_DM_EN BIT(1)
+   #define U2P_R0_BYPASS_DP_EN BIT(2)
+   #define U2P_R0_TXBITSTUFF_ENH   BIT(3)
+   #define U2P_R0_TXBITSTUFF_ENBIT(4)
+   #define U2P_R0_DM_PULLDOWN  BIT(5)
+   #define U2P_R0_DP_PULLDOWN  BIT(6)
+   #define U2P_R0_DP_VBUS_VLD_EXT_SEL  BIT(7)
+   #define U2P_R0_DP_VBUS_VLD_EXT  BIT(8)
+   #define U2P_R0_ADP_PRB_EN   BIT(9)
+   #define U2P_R0_ADP_DISCHARGEBIT(10)
+   #define U2P_R0_ADP_CHARGE   BIT(11)
+   #define U2P_R0_DRV_VBUS BIT(12)
+   #define U2P_R0_ID_PULLUPBIT(13)
+   #define U2P_R0_LOOPBACK_EN_BBIT(14)
+   #define U2P_R0_OTG_DISABLE  BIT(15)
+   #define U2P_R0_COMMON_ONN   BIT(16)
+   #define U2P_R0_FSEL_MASKGENMASK(19, 17)
+   #define U2P_R0_REF_CLK_SEL_MASK GENMASK(21, 20)
+   #define U2P_R0_POWER_ON_RESET   BIT(22)
+   #define U2P_R0_V_ATE_TEST_EN_B_MASK GENMASK(24, 23)
+   #define U2P_R0_ID_SET_ID_DQ BIT(25)
+   #define U2P_R0_ATE_RESETBIT(26)
+   #define U2P_R0_FSV_MINUSBIT(27)
+   #define U2P_R0_FSV_PLUS BIT(28)
+   #define U2P_R0_BYPASS_DM_DATA   BIT(29)
+   #define U2P_R0_BYPASS_DP_DATA   BIT(30)
+
+#define U2P_R1 0x4
+   #define U2P_R1_BURN_IN_TEST BIT(0)
+   #define U2P_R1_ACA_ENABLE   BIT(1)
+   #define U2P_R1_DCD_ENABLE   BIT(2)
+   #define U2P_R1_VDAT_SRC_EN_BBIT(3)
+   #define U2P_R1_VDAT_DET_EN_BBIT(4)
+   #define U2P_R1_CHARGES_SEL  BIT(5)
+   #define U2P_R1_TX_PREEMP_PULSE_TUNE BIT(6)
+   #define U2P_R1_TX_PREEMP_AMP_TUNE_MASK  GENMASK(8, 7)
+   

[U-Boot] [PATCH v3 u-boot 0/3] Add USB Support for Amlogic Meson GXL SoCs

[Neil Armstrong]

This patchset adds support for USB for the Amlogic Meson GXL SoCs following
the work done for Linux by Martin Blumenstingl at [1] [2] [3].

The support consist of :
 - A port of dwc3-of-simple from Linux to U-boot
 - A change to support more than 2 PHYs in the DWC3 DM driver
 - An USB2 PHY Driver and an USB3 PHY Driver

The DWC3 Controller has up to 4 PHYs connected :
 - 2 USB2 PHYs and an USB3 PHY for GXL SoCs
 - 3 USB2 PHYs and an USB3 PHY for the GXM SoC Variant
This is enabled by the "usb: host: dwc3: Add support for multiple PHYs" patch.
This patch is based on the "xhci-dwc3: Couple of fixes for USB3 support"
serie from Vignesh R, on the u-boot-usb tree.

The DWC3 Controller glue is generic enough to use the dwc3-of-simple from Linux
and can be easily ported to U-Boot as a Simple-Bus with Glue-Specific clocks
and Reset lines setup.

This depends on the recently applied :
 - clk: Add get/enable/disable/release for a bulk of clocks at [4]
 - reset: Add get/assert/deassert/release for bulk of reset signals at [5]
in order to manage the clocks and resets of the Glue in a clean fashion.

The USB PHY driver supports the standard generic PHY interface and supports
the power-on/off calls and set the Host mode by default.
They are based on the excellent work from Martin Blumenstingl merged in linux.

Changes since v2:
 - Drop #if and use the empty stubs for clock & reset API

Changes since v1:
 - switch to submitted clk/reset bulk API
 - splitted dwc3 multiple phy init error between poweroff & exit

[1] 
https://lkml.kernel.org/r/20180303184700.21480-1-martin.blumensti...@googlemail.com
[2] 
https://lkml.kernel.org/r/20180128202245.25021-1-martin.blumensti...@googlemail.com
[3] 
https://lkml.kernel.org/r/20180303214309.25643-1-martin.blumensti...@googlemail.com
[4] http://lists.infradead.org/pipermail/linux-amlogic/2018-April/006952.html
[5] http://lists.infradead.org/pipermail/linux-amlogic/2018-April/006949.html

Neil Armstrong (3):
  usb: host: Add simple of glue driver for DWC3 USB Controllers
integration
  usb: host: dwc3: Add support for multiple PHYs
  phy: Add Amlogic Meson USB2 & USB3 Generic PHY drivers

 drivers/phy/Kconfig   |   8 ++
 drivers/phy/Makefile  |   1 +
 drivers/phy/meson-gxl-usb2.c  | 238 ++
 drivers/phy/meson-gxl-usb3.c  | 201 
 drivers/usb/host/Kconfig  |   7 ++
 drivers/usb/host/Makefile |   1 +
 drivers/usb/host/dwc3-of-simple.c | 109 +
 drivers/usb/host/xhci-dwc3.c  | 113 ++
 8 files changed, 631 insertions(+), 47 deletions(-)
 create mode 100644 drivers/phy/meson-gxl-usb2.c
 create mode 100644 drivers/phy/meson-gxl-usb3.c
 create mode 100644 drivers/usb/host/dwc3-of-simple.c

-- 
2.7.4

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[U-Boot] [PATCH v3 u-boot 2/3] usb: host: dwc3: Add support for multiple PHYs

[Neil Armstrong]

DWC3 Ips can have more than 1 PHY for USB2 and 1 PHY for USB3, add support
for a generic number of PHYs and adapt the code to handle a generic
number of PHYs.

Signed-off-by: Neil Armstrong 
---
 drivers/usb/host/xhci-dwc3.c | 113 +--
 1 file changed, 66 insertions(+), 47 deletions(-)

diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 1022dd5..c100735 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -22,8 +22,8 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 struct xhci_dwc3_platdata {
-   struct phy usb_phy;
-   struct phy usb3_phy;
+   struct phy *usb_phys;
+   int num_phys;
 };
 
 void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
@@ -113,45 +113,82 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
 }
 
 #ifdef CONFIG_DM_USB
-static int xhci_dwc3_setup_phy(struct udevice *dev, int index, struct phy *phy)
+static int xhci_dwc3_setup_phy(struct udevice *dev, int count)
 {
-   int ret = 0;
+   struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+   int i, ret;
+
+   if (!count)
+   return 0;
 
-   ret = generic_phy_get_by_index(dev, index, phy);
-   if (ret) {
-   if (ret != -ENOENT) {
-   pr_err("Failed to get USB PHY for %s\n", dev->name);
+   plat->usb_phys = devm_kcalloc(dev, count, sizeof(struct phy),
+   GFP_KERNEL);
+   if (!plat->usb_phys)
+   return -ENOMEM;
+
+   for (i = 0; i < count; i++) {
+   ret = generic_phy_get_by_index(dev, i, >usb_phys[i]);
+   if (ret && ret != -ENOENT) {
+   pr_err("Failed to get USB PHY%d for %s\n",
+  i, dev->name);
return ret;
}
-   } else {
-   ret = generic_phy_init(phy);
+
+   ++plat->num_phys;
+   }
+   
+   for (i = 0; i < plat->num_phys; i++) {
+   ret = generic_phy_init(>usb_phys[i]);
if (ret) {
-   pr_err("Can't init USB PHY for %s\n", dev->name);
-   return ret;
+   pr_err("Can't init USB PHY%d for %s\n",
+  i, dev->name);
+   goto phys_init_err;
}
-   ret = generic_phy_power_on(phy);
+   }
+   
+   for (i = 0; i < plat->num_phys; i++) {
+   ret = generic_phy_power_on(>usb_phys[i]);
if (ret) {
-   pr_err("Can't power on USB PHY for %s\n", dev->name);
-   generic_phy_exit(phy);
-   return ret;
+   pr_err("Can't power USB PHY%d for %s\n",
+  i, dev->name);
+   goto phys_poweron_err;
}
}
 
return 0;
+
+
+phys_poweron_err:
+   for (; i >= 0; i--)
+   generic_phy_power_off(>usb_phys[i]);
+
+   for (i = 0; i < plat->num_phys; i++)
+   generic_phy_exit(>usb_phys[i]);
+
+   return ret;
+
+phys_init_err:
+   for (; i >= 0; i--)
+   generic_phy_exit(>usb_phys[i]);
+
+   return ret;
 }
 
-static int xhci_dwc3_shutdown_phy(struct phy *phy)
+static int xhci_dwc3_shutdown_phy(struct udevice *dev)
 {
-   int ret = 0;
+   struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+   int i, ret;
 
-   if (generic_phy_valid(phy)) {
-   ret = generic_phy_power_off(phy);
-   if (ret)
-   return ret;
+   for (i = 0; i < plat->num_phys; i++) {
+   if (!generic_phy_valid(>usb_phys[i]))
+   continue;
 
-   ret = generic_phy_exit(phy);
-   if (ret)
-   return ret;
+   ret = generic_phy_power_off(>usb_phys[i]);
+   ret |= generic_phy_exit(>usb_phys[i]);
+   if (ret) {
+   pr_err("Can't shutdown USB PHY%d for %s\n",
+   i, dev->name);
+   }
}
 
return 0;
@@ -159,7 +196,6 @@ static int xhci_dwc3_shutdown_phy(struct phy *phy)
 
 static int xhci_dwc3_probe(struct udevice *dev)
 {
-   struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
struct xhci_hcor *hcor;
struct xhci_hccr *hccr;
struct dwc3 *dwc3_reg;
@@ -170,18 +206,10 @@ static int xhci_dwc3_probe(struct udevice *dev)
hcor = (struct xhci_hcor *)((uintptr_t)hccr +
HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
 
-   ret = xhci_dwc3_setup_phy(dev, 0, >usb_phy);
-   if (ret) {
-   pr_err("Failed to setup USB PHY for %s\n", dev->name);
+   ret = xhci_dwc3_setup_phy(dev, dev_count_phandle_with_args(
+   dev, "phys", "#phy-cells"));
+   

[U-Boot] [PATCH v3 u-boot 1/3] usb: host: Add simple of glue driver for DWC3 USB Controllers integration

[Neil Armstrong]

This is a port of the dwc3-of-simple driver from Linux to enable/deassert
clock and resets of a simple DWC3 Controller HW glue.

Signed-off-by: Neil Armstrong 
---
 drivers/usb/host/Kconfig  |   7 +++
 drivers/usb/host/Makefile |   1 +
 drivers/usb/host/dwc3-of-simple.c | 109 ++
 3 files changed, 117 insertions(+)
 create mode 100644 drivers/usb/host/dwc3-of-simple.c

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index a7249b7..6caa615 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -21,6 +21,13 @@ config USB_XHCI_DWC3
  Say Y or if your system has a Dual Role SuperSpeed
  USB controller based on the DesignWare USB3 IP Core.
 
+config USB_XHCI_DWC3_OF_SIMPLE
+   bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
+   select MISC
+   help
+ Support USB2/3 functionality in simple SoC integrations with
+ USB controller based on the DesignWare USB3 IP Core.
+
 config USB_XHCI_MVEBU
bool "MVEBU USB 3.0 support"
default y
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 9819489..abe4f90 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -49,6 +49,7 @@ obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
 # xhci
 obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
 obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
+obj-$(CONFIG_USB_XHCI_DWC3_OF_SIMPLE) += dwc3-of-simple.o
 obj-$(CONFIG_USB_XHCI_ROCKCHIP) += xhci-rockchip.o
 obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o
 obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o
diff --git a/drivers/usb/host/dwc3-of-simple.c 
b/drivers/usb/host/dwc3-of-simple.c
new file mode 100644
index 000..54a5f60
--- /dev/null
+++ b/drivers/usb/host/dwc3-of-simple.c
@@ -0,0 +1,109 @@
+/*
+ * dwc3-of-simple.c - OF glue layer for simple integrations
+ *
+ * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Author: Felipe Balbi 
+ *
+ * Copyright (C) 2018 BayLibre, SAS
+ * Author: Neil Armstrong 
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct dwc3_of_simple {
+   struct clk_bulk clks;
+   struct reset_ctl_bulk   resets;
+};
+
+static int dwc3_of_simple_reset_init(struct udevice *dev,
+struct dwc3_of_simple *simple)
+{
+   int ret;
+
+   ret = reset_get_bulk(dev, >resets);
+   if (ret == -ENOTSUPP)
+   return 0;
+   else if (ret)
+   return ret;
+
+   ret = reset_deassert_bulk(>resets);
+   if (ret) {
+   reset_release_bulk(>resets);
+   return ret;
+   }
+
+   return 0;
+}
+
+static int dwc3_of_simple_clk_init(struct udevice *dev,
+  struct dwc3_of_simple *simple)
+{
+   int ret;
+
+   ret = clk_get_bulk(dev, >clks);
+   if (ret == -ENOTSUPP)
+   return 0;
+   if (ret)
+   return ret;
+
+#if CONFIG_IS_ENABLED(CLK)
+   ret = clk_enable_bulk(>clks);
+   if (ret) {
+   clk_release_bulk(>clks);
+   return ret;
+   }
+#endif
+
+   return 0;
+}
+
+static int dwc3_of_simple_probe(struct udevice *dev)
+{
+   struct dwc3_of_simple *simple = dev_get_platdata(dev);
+   int ret;
+
+   ret = dwc3_of_simple_clk_init(dev, simple);
+   if (ret)
+   return ret;
+
+   ret = dwc3_of_simple_reset_init(dev, simple);
+   if (ret)
+   return ret;
+
+   return 0;
+}
+
+static int dwc3_of_simple_remove(struct udevice *dev)
+{
+   struct dwc3_of_simple *simple = dev_get_platdata(dev);
+
+   reset_release_bulk(>resets);
+
+   clk_release_bulk(>clks);
+
+   return dm_scan_fdt_dev(dev);
+}
+
+static const struct udevice_id dwc3_of_simple_ids[] = {
+   { .compatible = "amlogic,meson-gxl-dwc3" },
+   { }
+};
+
+U_BOOT_DRIVER(dwc3_of_simple) = {
+   .name = "dwc3-of-simple",
+   .id = UCLASS_SIMPLE_BUS,
+   .of_match = dwc3_of_simple_ids,
+   .probe = dwc3_of_simple_probe,
+   .remove = dwc3_of_simple_remove,
+   .platdata_auto_alloc_size = sizeof(struct dwc3_of_simple),
+   .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
-- 
2.7.4

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[U-Boot] [PATCH] clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock

[Patrice Chotard]

On all STM32F4 and F7 SoCs  family (except STM32F429), PLLSAI
output P can be used as 48MHz clock source for USB and SDMMC.

Signed-off-by: Patrice Chotard 
Tested By: Bruno Herrera 

---

 drivers/clk/clk_stm32f.c | 36 +---
 drivers/misc/stm32_rcc.c | 12 +---
 include/stm32_rcc.h  |  3 ++-
 3 files changed, 36 insertions(+), 15 deletions(-)

diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
index d8eab1a88d7c..b5773181e8fb 100644
--- a/drivers/clk/clk_stm32f.c
+++ b/drivers/clk/clk_stm32f.c
@@ -134,6 +134,7 @@ struct stm32_clk {
struct stm32_pwr_regs *pwr_regs;
struct stm32_clk_info info;
unsigned long hse_rate;
+   bool pllsaip;
 };
 
 #ifdef CONFIG_VIDEO_STM32
@@ -180,8 +181,12 @@ static int configure_clocks(struct udevice *dev)
 
/* configure SDMMC clock */
if (priv->info.v2) { /*stm32f7 case */
-   /* select PLLQ as 48MHz clock source */
-   clrbits_le32(>dckcfgr2, RCC_DCKCFGRX_CK48MSEL);
+   if (priv->pllsaip)
+   /* select PLLSAIP as 48MHz clock source */
+   setbits_le32(>dckcfgr2, RCC_DCKCFGRX_CK48MSEL);
+   else
+   /* select PLLQ as 48MHz clock source */
+   clrbits_le32(>dckcfgr2, RCC_DCKCFGRX_CK48MSEL);
 
/* select 48MHz as SDMMC1 clock source */
clrbits_le32(>dckcfgr2, RCC_DCKCFGRX_SDMMC1SEL);
@@ -189,17 +194,23 @@ static int configure_clocks(struct udevice *dev)
/* select 48MHz as SDMMC2 clock source */
clrbits_le32(>dckcfgr2, RCC_DCKCFGR2_SDMMC2SEL);
} else  { /* stm32f4 case */
-   /* select PLLQ as 48MHz clock source */
-   clrbits_le32(>dckcfgr, RCC_DCKCFGRX_CK48MSEL);
+   if (priv->pllsaip)
+   /* select PLLSAIP as 48MHz clock source */
+   setbits_le32(>dckcfgr, RCC_DCKCFGRX_CK48MSEL);
+   else
+   /* select PLLQ as 48MHz clock source */
+   clrbits_le32(>dckcfgr, RCC_DCKCFGRX_CK48MSEL);
 
/* select 48MHz as SDMMC1 clock source */
clrbits_le32(>dckcfgr, RCC_DCKCFGRX_SDMMC1SEL);
}
 
-#ifdef CONFIG_VIDEO_STM32
/*
-* Configure the SAI PLL to generate LTDC pixel clock
+* Configure the SAI PLL to generate LTDC pixel clock and
+* 48 Mhz for SDMMC and USB
 */
+   clrsetbits_le32(>pllsaicfgr, RCC_PLLSAICFGR_PLLSAIP_MASK,
+   RCC_PLLSAICFGR_PLLSAIP_4);
clrsetbits_le32(>pllsaicfgr, RCC_PLLSAICFGR_PLLSAIR_MASK,
RCC_PLLSAICFGR_PLLSAIR_3);
clrsetbits_le32(>pllsaicfgr, RCC_PLLSAICFGR_PLLSAIN_MASK,
@@ -207,18 +218,16 @@ static int configure_clocks(struct udevice *dev)
 
clrsetbits_le32(>dckcfgr, RCC_DCKCFGR_PLLSAIDIVR_MASK,
RCC_DCKCFGR_PLLSAIDIVR_2 << 
RCC_DCKCFGR_PLLSAIDIVR_SHIFT);
-#endif
+
/* Enable the main PLL */
setbits_le32(>cr, RCC_CR_PLLON);
while (!(readl(>cr) & RCC_CR_PLLRDY))
;
 
-#ifdef CONFIG_VIDEO_STM32
-/* Enable the SAI PLL */
+   /* Enable the SAI PLL */
setbits_le32(>cr, RCC_CR_PLLSAION);
while (!(readl(>cr) & RCC_CR_PLLSAIRDY))
;
-#endif
setbits_le32(>apb1enr, RCC_APB1ENR_PWREN);
 
if (priv->info.has_overdrive) {
@@ -618,12 +627,17 @@ static int stm32_clk_probe(struct udevice *dev)
return -EINVAL;
 
priv->base = (struct stm32_rcc_regs *)addr;
+   priv->pllsaip = true;
 
switch (dev_get_driver_data(dev)) {
-   case STM32F4:
+   case STM32F42X:
+   priv->pllsaip = false;
+   /* fallback into STM32F469 case */
+   case STM32F469:
memcpy(>info, _clk_info,
   sizeof(struct stm32_clk_info));
break;
+
case STM32F7:
memcpy(>info, _clk_info,
   sizeof(struct stm32_clk_info));
diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c
index 87d9928362be..454a9cccfcc2 100644
--- a/drivers/misc/stm32_rcc.c
+++ b/drivers/misc/stm32_rcc.c
@@ -12,9 +12,14 @@
 #include 
 #include 
 
-struct stm32_rcc_clk stm32_rcc_clk_f4 = {
+struct stm32_rcc_clk stm32_rcc_clk_f42x = {
.drv_name = "stm32fx_rcc_clock",
-   .soc = STM32F4,
+   .soc = STM32F42X,
+};
+
+struct stm32_rcc_clk stm32_rcc_clk_f469 = {
+   .drv_name = "stm32fx_rcc_clock",
+   .soc = STM32F469,
 };
 
 struct stm32_rcc_clk stm32_rcc_clk_f7 = {
@@ -62,7 +67,8 @@ static const struct misc_ops stm32_rcc_ops = {
 };
 
 static const struct udevice_id stm32_rcc_ids[] = {
-   {.compatible = "st,stm32f42xx-rcc", .data = (ulong)_rcc_clk_f4 },
+   {.compatible = "st,stm32f42xx-rcc", .data = (ulong)_rcc_clk_f42x 
},
+   

[U-Boot] [RFC PATCH] imx: add writebcb command

[Stefan Agner]

From: Stefan Agner 

Add writebcb command which creates a NAND Boot Configuration Block
(BCB) at the beginning of the active flash device. The BCB stores
the information for the SoC internal boot ROM where the application
with a valid IVT header can be found on the NAND device. The first
two argument of the command need an offset of the NAND device where
the primary and secondary application can be found.

Typically, U-Boot is the application which gets loaded by the boot
ROM. Hence, the offset address need to be the address where U-Boot
(u-boot.imx along with a 0x400 long prefix) is stored on the device.
At least one location is mandatory.

Currently only the FCB (Firmware Configuration Block) is written to
the device. The DBBT (Discovered Bad Block Table) is optional and
not created by writebcb currently.

Signed-off-by: Stefan Agner 
Acked-by: Max Krummenacher 
---
Hi, 

I send this a s a discussion base for "i.MX6: nand: add nandbcb
update command"
https://www.mail-archive.com/u-boot@lists.denx.de/msg277500.html

This is the implementation for Vybrid which has a different NAND
flash controller IP than i.MX 6. It was based on do_nand_boot_update
from the downstream U-Boot for Vybrid:
http://git.toradex.com/cgit/u-boot-toradex.git/tree/drivers/mtd/nand/fsl_nfc.c?h=2011.12-colibri_vf#n1048

We used this as a base for a very similar implementation for
i.MX 7 and i.MX 6ULL support. Those SoCs use the GPMI NAND IP like
i.MX 6.

Compared to Jagan's proposal this command only does a minimal
thing, especially it does not write the firmware length
(sectors_in_firmware1/2, which is fw1/2_pages in Jagans patchset).
It seems not to be strictly required by any NXP boot ROMs so far.
This allows to update the firmware (SPL/U-Boot) independently of
the boot block, which is nice since boot block is usually written
to the first erease block which is often only has a limited erase
cycle guaranteed by the NAND flash manufacturer.

Furthermore, it does not mandates a particular spacing between
the boot loaders. One can simply pass the offset for each instance.

Note that I think the final patch should be based on Jagans
proposal since the implemenation is more advanced and clear. It
is just that aspect which I like more in this implementation.

--
Stefam

 arch/arm/imx-common/Makefile   |   1 +
 arch/arm/imx-common/cmd_writebcb.c | 187 +
 include/configs/colibri_vf.h   |   1 +
 scripts/config_whitelist.txt   |   1 +
 4 files changed, 190 insertions(+)
 create mode 100644 arch/arm/imx-common/cmd_writebcb.c

diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index aae776349e..b9cf281ca9 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -37,6 +37,7 @@ endif
 obj-$(CONFIG_CMD_BMODE) += cmd_bmode.o
 obj-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o
 obj-$(CONFIG_CMD_DEKBLOB) += cmd_dek.o
+obj-$(CONFIG_CMD_WRITEBCB) += cmd_writebcb.o
 
 PLUGIN = board/$(BOARDDIR)/plugin
 
diff --git a/arch/arm/imx-common/cmd_writebcb.c 
b/arch/arm/imx-common/cmd_writebcb.c
new file mode 100644
index 00..8abf1b0ba7
--- /dev/null
+++ b/arch/arm/imx-common/cmd_writebcb.c
@@ -0,0 +1,187 @@
+/*
+ * Copyright (c) 2013, Toradex AG.  All rights reserved.
+ *
+ * Derived from downstream U-Boot (drivers/mtd/nand/fsl_nfc.c)
+ * and mxsboot
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+
+struct mxs_nand_fcb {
+   uint32_tchecksum;
+   uint32_tfingerprint;
+   uint32_tversion;
+   struct {
+   uint8_t data_setup;
+   uint8_t data_hold;
+   uint8_t address_setup;
+   uint8_t dsample_time;
+   uint8_t nand_timing_state;
+   uint8_t rea;
+   uint8_t rloh;
+   uint8_t rhoh;
+   }   timing;
+   uint32_tpage_data_size;
+   uint32_ttotal_page_size;
+   uint32_tsectors_per_block;
+   uint32_tnumber_of_nands;/* Ignored */
+   uint32_ttotal_internal_die; /* Ignored */
+   uint32_tcell_type;  /* Ignored */
+   uint32_tecc_block_n_ecc_type;
+   uint32_tecc_block_0_size;
+   uint32_tecc_block_n_size;
+   uint32_tecc_block_0_ecc_type;
+   uint32_tmetadata_bytes;
+   uint32_tnum_ecc_blocks_per_page;
+   uint32_tecc_block_n_ecc_level_sdk;  /* Ignored */
+   uint32_tecc_block_0_size_sdk;   /* Ignored */
+   uint32_t   

Re: [U-Boot] [PATCH v2 u-boot 1/3] usb: host: Add simple of glue driver for DWC3 USB Controllers integration

[Marek Vasut]

On 04/11/2018 04:53 PM, Neil Armstrong wrote:
> Hi Marek,
> 
> On 11/04/2018 16:37, Marek Vasut wrote:
>> On 04/11/2018 04:29 PM, Neil Armstrong wrote:
>>> This is a port of the dwc3-of-simple driver from Linux to enable/deassert
>>> clock and resets of a simple DWC3 Controller HW glue.
>>>
>>> Signed-off-by: Neil Armstrong 
>>
>> Looks good, except can we reduce the number of ifdefs, ie. by using
>> empty functions if DM_* is not defined ?
> 
> For reset, yes, for clock only the get_bulk and release_bulk...

Any reduction of the omnipresent ifdefs would be nice.

> Should I re-spin ?

That'd be nice, thanks.

-- 
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2 u-boot 1/3] usb: host: Add simple of glue driver for DWC3 USB Controllers integration

[Neil Armstrong]

Hi Marek,

On 11/04/2018 16:37, Marek Vasut wrote:
> On 04/11/2018 04:29 PM, Neil Armstrong wrote:
>> This is a port of the dwc3-of-simple driver from Linux to enable/deassert
>> clock and resets of a simple DWC3 Controller HW glue.
>>
>> Signed-off-by: Neil Armstrong 
> 
> Looks good, except can we reduce the number of ifdefs, ie. by using
> empty functions if DM_* is not defined ?

For reset, yes, for clock only the get_bulk and release_bulk...

Should I re-spin ?

Neil
> 
>> ---
>>  drivers/usb/host/Kconfig  |   7 +++
>>  drivers/usb/host/Makefile |   1 +
>>  drivers/usb/host/dwc3-of-simple.c | 123 
>> ++
>>  3 files changed, 131 insertions(+)
>>  create mode 100644 drivers/usb/host/dwc3-of-simple.c
>>
>> diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
>> index a7249b7..6caa615 100644
>> --- a/drivers/usb/host/Kconfig
>> +++ b/drivers/usb/host/Kconfig
>> @@ -21,6 +21,13 @@ config USB_XHCI_DWC3
>>Say Y or if your system has a Dual Role SuperSpeed
>>USB controller based on the DesignWare USB3 IP Core.
>>  
>> +config USB_XHCI_DWC3_OF_SIMPLE
>> +bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
>> +select MISC
>> +help
>> +  Support USB2/3 functionality in simple SoC integrations with
>> +  USB controller based on the DesignWare USB3 IP Core.
>> +
>>  config USB_XHCI_MVEBU
>>  bool "MVEBU USB 3.0 support"
>>  default y
>> diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
>> index 9819489..abe4f90 100644
>> --- a/drivers/usb/host/Makefile
>> +++ b/drivers/usb/host/Makefile
>> @@ -49,6 +49,7 @@ obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
>>  # xhci
>>  obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
>>  obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
>> +obj-$(CONFIG_USB_XHCI_DWC3_OF_SIMPLE) += dwc3-of-simple.o
>>  obj-$(CONFIG_USB_XHCI_ROCKCHIP) += xhci-rockchip.o
>>  obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o
>>  obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o
>> diff --git a/drivers/usb/host/dwc3-of-simple.c 
>> b/drivers/usb/host/dwc3-of-simple.c
>> new file mode 100644
>> index 000..9abe450
>> --- /dev/null
>> +++ b/drivers/usb/host/dwc3-of-simple.c
>> @@ -0,0 +1,123 @@
>> +/*
>> + * dwc3-of-simple.c - OF glue layer for simple integrations
>> + *
>> + * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
>> + *
>> + * Author: Felipe Balbi 
>> + *
>> + * Copyright (C) 2018 BayLibre, SAS
>> + * Author: Neil Armstrong 
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +struct dwc3_of_simple {
>> +#if CONFIG_IS_ENABLED(CLK)
>> +struct clk_bulk clks;
>> +#endif
>> +#if CONFIG_IS_ENABLED(DM_RESET)
>> +struct reset_ctl_bulk   resets;
>> +#endif
>> +};
>> +
>> +#if CONFIG_IS_ENABLED(DM_RESET)
>> +static int dwc3_of_simple_reset_init(struct udevice *dev,
>> + struct dwc3_of_simple *simple)
>> +{
>> +int ret;
>> +
>> +ret = reset_get_bulk(dev, >resets);
>> +if (ret)
>> +return ret;
>> +
>> +ret = reset_deassert_bulk(>resets);
>> +if (ret) {
>> +reset_release_bulk(>resets);
>> +return ret;
>> +}
>> +
>> +return 0;
>> +}
>> +#endif
>> +
>> +#if CONFIG_IS_ENABLED(CLK)
>> +static int dwc3_of_simple_clk_init(struct udevice *dev,
>> +   struct dwc3_of_simple *simple)
>> +{
>> +int ret;
>> +
>> +ret = clk_get_bulk(dev, >clks);
>> +if (ret)
>> +return ret;
>> +
>> +ret = clk_enable_bulk(>clks);
>> +if (ret) {
>> +clk_release_bulk(>clks);
>> +return ret;
>> +}
>> +
>> +return 0;
>> +}
>> +#endif
>> +
>> +static int dwc3_of_simple_probe(struct udevice *dev)
>> +{
>> +#if CONFIG_IS_ENABLED(DM_RESET) || CONFIG_IS_ENABLED(CLK)
>> +struct dwc3_of_simple *simple = dev_get_platdata(dev);
>> +int ret;
>> +#endif
>> +
>> +#if CONFIG_IS_ENABLED(CLK)
>> +ret = dwc3_of_simple_clk_init(dev, simple);
>> +if (ret)
>> +return ret;
>> +#endif
>> +
>> +#if CONFIG_IS_ENABLED(DM_RESET)
>> +ret = dwc3_of_simple_reset_init(dev, simple);
>> +if (ret)
>> +return ret;
>> +#endif
>> +
>> +return 0;
>> +}
>> +
>> +static int dwc3_of_simple_remove(struct udevice *dev)
>> +{
>> +#if CONFIG_IS_ENABLED(DM_RESET) || CONFIG_IS_ENABLED(CLK)
>> +struct dwc3_of_simple *simple = dev_get_platdata(dev);
>> +#endif
>> +
>> +#if CONFIG_IS_ENABLED(DM_RESET)
>> +reset_release_bulk(>resets);
>> +#endif
>> +
>> +#if CONFIG_IS_ENABLED(CLK)
>> +clk_release_bulk(>clks);
>> +#endif
>> +
>> +return dm_scan_fdt_dev(dev);
>> +}
>> +
>> +static const struct udevice_id dwc3_of_simple_ids[] = {
>> +{ .compatible = "amlogic,meson-gxl-dwc3" },
>> +

[U-Boot] uboot support to Allwinner bananapi zero

[Jun Nie]

Hi Icenowy & Jagan,

I see bananapi zero patch was posted and discussed in [1], but without
further follow up. Maybe we can decide which name is more maintainable
first, bananapi-*, Bananapi-* or Sinovoip_BPI_*. And add all new
boards with following the rule. Which one do you prefer?

If possible, we can create symbol link or just rename files later as
it may cause issue for end user.

[1] https://patchwork.ozlabs.org/patch/832937/
[2] https://patchwork.kernel.org/patch/9753547/

Jun
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Re: [U-Boot] arm: socfpga: unable to boot cyclone5 devkit or SocKit

[Dinh Nguyen]

On Wed, Apr 11, 2018 at 7:55 AM, Alexander Graf  wrote:
> On 04/11/2018 02:37 PM, Marek Vasut wrote:
>>
>> On 04/11/2018 02:26 PM, Tom Rini wrote:
>>>
>>> On Wed, Apr 11, 2018 at 10:12:42AM +0200, Marek Vasut wrote:

 On 04/11/2018 04:52 AM, Dinh Nguyen wrote:
 [...]

 u-boot$ git reset --hard v2018.01 ; bu socfpga_cyclone5 ; ls -la
 spl/u-boot-spl.bin
 HEAD is now at f3dd87e0b9 Prepare v2018.01
 -rw-r--r-- 1 marex marex 52902 Apr 11 00:34 spl/u-boot-spl.bin

 u-boot$ git reset --hard v2018.03 ; bu socfpga_cyclone5 ; ls -la
 spl/u-boot-spl.bin
 HEAD is now at f95ab1fb6e Prepare v2018.03
 -rw-r--r-- 1 marex marex 59706 Apr 11 00:34 spl/u-boot-spl.bin

 Try bisecting out the commit which caused this 7 kiB growth between
 2018.01 and 2018.03 . Even those 53 kiB are quite borderline, but it
 was
 at 53 kiB for a while (2017.05 is also ~53 kiB)
>>>
>>> Do you have a size constraint and are not setting the correct CONFIG
>>> options so that it becomes a build failure?
>>>
>>> Doing the bisect points me to this commit:
>>>
>>> commit fa2c14676c7c6f3115dd4d9b2a4cc3b35c3ad2a2
>>> Author: Tom Rini 
>>> Date:   Sat Feb 10 16:54:38 2018 -0500
>>>
>>>  configs: Re-sync with CONFIG_DISTRO_DEFAULTS
>>>
>>>  A number of platforms include config_distro_defaults.h but do
>>> not enable
>>>  CONFIG_DISTRO_DEFAULTS.  As they plainly intended to, set that
>>> flag and
>>>  re-sync config files.
>>>
>>>  Signed-off-by: Tom Rini 
>>>
>>> Doing a revert of the above commit shrinks the SPL back down to ~7
>>> kiB.
>>>
>>> Dinh
>>>
>> It looks like the enablement of CONFIG_DISTRO_DEFAULTS, enables these
>> configs:
>>
>> CONFIG_ISO_PARTITION=y
>> CONFIG_SPL_ISO_PARTITION=y
>> # CONFIG_AMIGA_PARTITION is not set
>> # CONFIG_SPL_AMIGA_PARTITION is not set
>> CONFIG_EFI_PARTITION=y
>> CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=128
>> CONFIG_EFI_PARTITION_ENTRIES_OFF=0
>> CONFIG_SPL_EFI_PARTITION=y
>> CONFIG_PARTITION_UUIDS=y
>> CONFIG_SPL_PARTITION_UUIDS=y
>> # CONFIG_PARTITION_TYPE_GUID is not set
>>
>> Which is contributing to the SPL growth.
>>
> Turning the following config options off subtracts 7k from the SPL:
>
> +# CONFIG_SPL_ISO_PARTITION is not set
> +# CONFIG_SPL_EFI_PARTITION is not set
>
> Not sure if these are needed?

 IMO not on SoCFPGA. Also CCing Tom.
>>>
>>> Yes, all of those options are part of CONFIG_DISTRO_DEFAULTS and are
>>> needed so that booting from various distro media works.
>>
>> In SPL on boards which usually boot from SDMMC or QSPI NOR ? How is EFI
>> or ISO partition needed there ?
>
>
>
> I don't think ISO partitioning is needed in SPL. However, for GPT I'm not
> 100% sure. People tend to go with GPT more often than not these days - and
> to be able to fetch U-Boot proper from a GPT partition may make sense.
>
> How much reduction do you get when you only disable
> CONFIG_SPL_ISO_PARTITION?
>

~3 kiB

Dinh
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Re: [U-Boot] [PATCH v2 u-boot 1/3] usb: host: Add simple of glue driver for DWC3 USB Controllers integration

[Marek Vasut]

On 04/11/2018 04:29 PM, Neil Armstrong wrote:
> This is a port of the dwc3-of-simple driver from Linux to enable/deassert
> clock and resets of a simple DWC3 Controller HW glue.
> 
> Signed-off-by: Neil Armstrong 

Looks good, except can we reduce the number of ifdefs, ie. by using
empty functions if DM_* is not defined ?

> ---
>  drivers/usb/host/Kconfig  |   7 +++
>  drivers/usb/host/Makefile |   1 +
>  drivers/usb/host/dwc3-of-simple.c | 123 
> ++
>  3 files changed, 131 insertions(+)
>  create mode 100644 drivers/usb/host/dwc3-of-simple.c
> 
> diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
> index a7249b7..6caa615 100644
> --- a/drivers/usb/host/Kconfig
> +++ b/drivers/usb/host/Kconfig
> @@ -21,6 +21,13 @@ config USB_XHCI_DWC3
> Say Y or if your system has a Dual Role SuperSpeed
> USB controller based on the DesignWare USB3 IP Core.
>  
> +config USB_XHCI_DWC3_OF_SIMPLE
> + bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
> + select MISC
> + help
> +   Support USB2/3 functionality in simple SoC integrations with
> +   USB controller based on the DesignWare USB3 IP Core.
> +
>  config USB_XHCI_MVEBU
>   bool "MVEBU USB 3.0 support"
>   default y
> diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
> index 9819489..abe4f90 100644
> --- a/drivers/usb/host/Makefile
> +++ b/drivers/usb/host/Makefile
> @@ -49,6 +49,7 @@ obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
>  # xhci
>  obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
>  obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
> +obj-$(CONFIG_USB_XHCI_DWC3_OF_SIMPLE) += dwc3-of-simple.o
>  obj-$(CONFIG_USB_XHCI_ROCKCHIP) += xhci-rockchip.o
>  obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o
>  obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o
> diff --git a/drivers/usb/host/dwc3-of-simple.c 
> b/drivers/usb/host/dwc3-of-simple.c
> new file mode 100644
> index 000..9abe450
> --- /dev/null
> +++ b/drivers/usb/host/dwc3-of-simple.c
> @@ -0,0 +1,123 @@
> +/*
> + * dwc3-of-simple.c - OF glue layer for simple integrations
> + *
> + * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
> + *
> + * Author: Felipe Balbi 
> + *
> + * Copyright (C) 2018 BayLibre, SAS
> + * Author: Neil Armstrong 
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +struct dwc3_of_simple {
> +#if CONFIG_IS_ENABLED(CLK)
> + struct clk_bulk clks;
> +#endif
> +#if CONFIG_IS_ENABLED(DM_RESET)
> + struct reset_ctl_bulk   resets;
> +#endif
> +};
> +
> +#if CONFIG_IS_ENABLED(DM_RESET)
> +static int dwc3_of_simple_reset_init(struct udevice *dev,
> +  struct dwc3_of_simple *simple)
> +{
> + int ret;
> +
> + ret = reset_get_bulk(dev, >resets);
> + if (ret)
> + return ret;
> +
> + ret = reset_deassert_bulk(>resets);
> + if (ret) {
> + reset_release_bulk(>resets);
> + return ret;
> + }
> +
> + return 0;
> +}
> +#endif
> +
> +#if CONFIG_IS_ENABLED(CLK)
> +static int dwc3_of_simple_clk_init(struct udevice *dev,
> +struct dwc3_of_simple *simple)
> +{
> + int ret;
> +
> + ret = clk_get_bulk(dev, >clks);
> + if (ret)
> + return ret;
> +
> + ret = clk_enable_bulk(>clks);
> + if (ret) {
> + clk_release_bulk(>clks);
> + return ret;
> + }
> +
> + return 0;
> +}
> +#endif
> +
> +static int dwc3_of_simple_probe(struct udevice *dev)
> +{
> +#if CONFIG_IS_ENABLED(DM_RESET) || CONFIG_IS_ENABLED(CLK)
> + struct dwc3_of_simple *simple = dev_get_platdata(dev);
> + int ret;
> +#endif
> +
> +#if CONFIG_IS_ENABLED(CLK)
> + ret = dwc3_of_simple_clk_init(dev, simple);
> + if (ret)
> + return ret;
> +#endif
> +
> +#if CONFIG_IS_ENABLED(DM_RESET)
> + ret = dwc3_of_simple_reset_init(dev, simple);
> + if (ret)
> + return ret;
> +#endif
> +
> + return 0;
> +}
> +
> +static int dwc3_of_simple_remove(struct udevice *dev)
> +{
> +#if CONFIG_IS_ENABLED(DM_RESET) || CONFIG_IS_ENABLED(CLK)
> + struct dwc3_of_simple *simple = dev_get_platdata(dev);
> +#endif
> +
> +#if CONFIG_IS_ENABLED(DM_RESET)
> + reset_release_bulk(>resets);
> +#endif
> +
> +#if CONFIG_IS_ENABLED(CLK)
> + clk_release_bulk(>clks);
> +#endif
> +
> + return dm_scan_fdt_dev(dev);
> +}
> +
> +static const struct udevice_id dwc3_of_simple_ids[] = {
> + { .compatible = "amlogic,meson-gxl-dwc3" },
> + { }
> +};
> +
> +U_BOOT_DRIVER(dwc3_of_simple) = {
> + .name = "dwc3-of-simple",
> + .id = UCLASS_SIMPLE_BUS,
> + .of_match = dwc3_of_simple_ids,
> + .probe = dwc3_of_simple_probe,
> + .remove = dwc3_of_simple_remove,
> + 

Re: [U-Boot] [PATCH V3 1/3] imx6: Define 'soc' env var for imx6 SoC

[Guillaume Gardet]

Hi,


Le 11/04/2018 à 16:23, Fabio Estevam a écrit :

Hi Guillaume,

On Wed, Apr 11, 2018 at 7:38 AM, Guillaume GARDET
 wrote:

Please explain in the commit log why this is needed. Thanks


This is for efi fdtfile fallback definition for default distro config for 
nitrogen6x board.
Is it ok for you?




Signed-off-by: Guillaume GARDET 
Cc: Troy Kisky 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Gary Bisson 


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Re: [U-Boot] [PATCH 1/1] mmc: avoid division by zero in meson_mmc_config_clock - Please, consider for v2018.05-rc2

[Neil Armstrong]

Hi Jaehoon,

On 10/04/2018 18:01, Heinrich Schuchardt wrote:
> On 03/24/2018 03:57 PM, Heinrich Schuchardt wrote:
>> On 03/18/2018 01:03 AM, Vagrant Cascadian wrote:
>>> On 2018-03-17, Heinrich Schuchardt wrote:
 The Odroid C2 fails to read from mmc with U-Boot v2018.03.
 The change avoids a division by zero.

 The fix was suggested by Jaehoon in
 https://lists.denx.de/pipermail/u-boot/2018-January/318577.html
>>>
>>> Thanks!
>>>
>>> Works for me with odroid-c2 on u-boot 2018.03.
>>>
>>> Without the patch, mmc access immediately hangs the board.
>>>
>>> Tested-by: Vagrant Cascadian 
>>>
>>>
>>> live well,
>>>   vagrant
>>>
 Reported-by: Vagrant Cascadian 
 Suggested-by: Jaehoon Chung 
 Signed-off-by: Heinrich Schuchardt 
 ---
[...]
 -- 
 2.14.2
>>
>> Hello Jaehoon,
>>
>> will you pick the patch?
>>
>> Best regards
>>
>> Heinrich
>>
> 
> Hello Jaehoon,
> 
> since v2018.03 the Odroid C2 cannot be booted with U-Boot. This patch
> fixes it and has been adopted by Debian:
> https://packages.debian.org/de/buster/u-boot
> 
> Could you, please, consider it for v2018.05-rc2.
> 
> Best regards
> 
> Heinrich
> 
It also affects the other Amlogic platforms : P212, LibreTech-CC and 
Khadas-Vim, thus 2018.03 is broken for these platforms.

Thanks,
Neil
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[U-Boot] [PATCH v2 u-boot 3/3] phy: Add Amlogic Meson USB2 & USB3 Generic PHY drivers

[Neil Armstrong]

The Amlogic Meson GXL and GXM (simple variant) embeds up to 3 USB2 PHYs
and an USB3 PHY. This patch adds drivers for these for the standard generic
PHY interface and supports the power-on/off calls and set the Host mode by
default.
They are based on the excellent work from Martin Blumenstingl merged in linux.

Signed-off-by: Neil Armstrong 
---
 drivers/phy/Kconfig  |   8 ++
 drivers/phy/Makefile |   1 +
 drivers/phy/meson-gxl-usb2.c | 238 +++
 drivers/phy/meson-gxl-usb3.c | 201 
 4 files changed, 448 insertions(+)
 create mode 100644 drivers/phy/meson-gxl-usb2.c
 create mode 100644 drivers/phy/meson-gxl-usb3.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 3b9a09c..99a6d95 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -85,4 +85,12 @@ config STI_USB_PHY
  used by USB2 and USB3 Host controllers available on
  STiH407 SoC families.
 
+config MESON_GXL_USB_PHY
+   bool "Amlogic Meson GXL USB PHYs"
+   depends on PHY && ARCH_MESON && MESON_GXL
+   imply REGMAP
+   help
+ This is the generic phy driver for the Amlogic Meson GXL
+ USB2 and USB3 PHYS.
+
 endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 668040b..6c1610e 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
 obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o
+obj-$(CONFIG_MESON_GXL_USB_PHY) += meson-gxl-usb2.o meson-gxl-usb3.o
diff --git a/drivers/phy/meson-gxl-usb2.c b/drivers/phy/meson-gxl-usb2.c
new file mode 100644
index 000..15c9c89
--- /dev/null
+++ b/drivers/phy/meson-gxl-usb2.c
@@ -0,0 +1,238 @@
+/*
+ * Meson GXL and GXM USB2 PHY driver
+ *
+ * Copyright (C) 2017 Martin Blumenstingl 
+ * Copyright (C) 2018 BayLibre, SAS
+ * Author: Neil Armstrong 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* bits [31:27] are read-only */
+#define U2P_R0 0x0
+   #define U2P_R0_BYPASS_SEL   BIT(0)
+   #define U2P_R0_BYPASS_DM_EN BIT(1)
+   #define U2P_R0_BYPASS_DP_EN BIT(2)
+   #define U2P_R0_TXBITSTUFF_ENH   BIT(3)
+   #define U2P_R0_TXBITSTUFF_ENBIT(4)
+   #define U2P_R0_DM_PULLDOWN  BIT(5)
+   #define U2P_R0_DP_PULLDOWN  BIT(6)
+   #define U2P_R0_DP_VBUS_VLD_EXT_SEL  BIT(7)
+   #define U2P_R0_DP_VBUS_VLD_EXT  BIT(8)
+   #define U2P_R0_ADP_PRB_EN   BIT(9)
+   #define U2P_R0_ADP_DISCHARGEBIT(10)
+   #define U2P_R0_ADP_CHARGE   BIT(11)
+   #define U2P_R0_DRV_VBUS BIT(12)
+   #define U2P_R0_ID_PULLUPBIT(13)
+   #define U2P_R0_LOOPBACK_EN_BBIT(14)
+   #define U2P_R0_OTG_DISABLE  BIT(15)
+   #define U2P_R0_COMMON_ONN   BIT(16)
+   #define U2P_R0_FSEL_MASKGENMASK(19, 17)
+   #define U2P_R0_REF_CLK_SEL_MASK GENMASK(21, 20)
+   #define U2P_R0_POWER_ON_RESET   BIT(22)
+   #define U2P_R0_V_ATE_TEST_EN_B_MASK GENMASK(24, 23)
+   #define U2P_R0_ID_SET_ID_DQ BIT(25)
+   #define U2P_R0_ATE_RESETBIT(26)
+   #define U2P_R0_FSV_MINUSBIT(27)
+   #define U2P_R0_FSV_PLUS BIT(28)
+   #define U2P_R0_BYPASS_DM_DATA   BIT(29)
+   #define U2P_R0_BYPASS_DP_DATA   BIT(30)
+
+#define U2P_R1 0x4
+   #define U2P_R1_BURN_IN_TEST BIT(0)
+   #define U2P_R1_ACA_ENABLE   BIT(1)
+   #define U2P_R1_DCD_ENABLE   BIT(2)
+   #define U2P_R1_VDAT_SRC_EN_BBIT(3)
+   #define U2P_R1_VDAT_DET_EN_BBIT(4)
+   #define U2P_R1_CHARGES_SEL  BIT(5)
+   #define U2P_R1_TX_PREEMP_PULSE_TUNE BIT(6)
+   #define U2P_R1_TX_PREEMP_AMP_TUNE_MASK  GENMASK(8, 7)
+   

[U-Boot] [PATCH v2 u-boot 2/3] usb: host: dwc3: Add support for multiple PHYs

[Neil Armstrong]

DWC3 Ips can have more than 1 PHY for USB2 and 1 PHY for USB3, add support
for a generic number of PHYs and adapt the code to handle a generic
number of PHYs.

Signed-off-by: Neil Armstrong 
---
 drivers/usb/host/xhci-dwc3.c | 113 +--
 1 file changed, 66 insertions(+), 47 deletions(-)

diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 1022dd5..c100735 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -22,8 +22,8 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 struct xhci_dwc3_platdata {
-   struct phy usb_phy;
-   struct phy usb3_phy;
+   struct phy *usb_phys;
+   int num_phys;
 };
 
 void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
@@ -113,45 +113,82 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
 }
 
 #ifdef CONFIG_DM_USB
-static int xhci_dwc3_setup_phy(struct udevice *dev, int index, struct phy *phy)
+static int xhci_dwc3_setup_phy(struct udevice *dev, int count)
 {
-   int ret = 0;
+   struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+   int i, ret;
+
+   if (!count)
+   return 0;
 
-   ret = generic_phy_get_by_index(dev, index, phy);
-   if (ret) {
-   if (ret != -ENOENT) {
-   pr_err("Failed to get USB PHY for %s\n", dev->name);
+   plat->usb_phys = devm_kcalloc(dev, count, sizeof(struct phy),
+   GFP_KERNEL);
+   if (!plat->usb_phys)
+   return -ENOMEM;
+
+   for (i = 0; i < count; i++) {
+   ret = generic_phy_get_by_index(dev, i, >usb_phys[i]);
+   if (ret && ret != -ENOENT) {
+   pr_err("Failed to get USB PHY%d for %s\n",
+  i, dev->name);
return ret;
}
-   } else {
-   ret = generic_phy_init(phy);
+
+   ++plat->num_phys;
+   }
+   
+   for (i = 0; i < plat->num_phys; i++) {
+   ret = generic_phy_init(>usb_phys[i]);
if (ret) {
-   pr_err("Can't init USB PHY for %s\n", dev->name);
-   return ret;
+   pr_err("Can't init USB PHY%d for %s\n",
+  i, dev->name);
+   goto phys_init_err;
}
-   ret = generic_phy_power_on(phy);
+   }
+   
+   for (i = 0; i < plat->num_phys; i++) {
+   ret = generic_phy_power_on(>usb_phys[i]);
if (ret) {
-   pr_err("Can't power on USB PHY for %s\n", dev->name);
-   generic_phy_exit(phy);
-   return ret;
+   pr_err("Can't power USB PHY%d for %s\n",
+  i, dev->name);
+   goto phys_poweron_err;
}
}
 
return 0;
+
+
+phys_poweron_err:
+   for (; i >= 0; i--)
+   generic_phy_power_off(>usb_phys[i]);
+
+   for (i = 0; i < plat->num_phys; i++)
+   generic_phy_exit(>usb_phys[i]);
+
+   return ret;
+
+phys_init_err:
+   for (; i >= 0; i--)
+   generic_phy_exit(>usb_phys[i]);
+
+   return ret;
 }
 
-static int xhci_dwc3_shutdown_phy(struct phy *phy)
+static int xhci_dwc3_shutdown_phy(struct udevice *dev)
 {
-   int ret = 0;
+   struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+   int i, ret;
 
-   if (generic_phy_valid(phy)) {
-   ret = generic_phy_power_off(phy);
-   if (ret)
-   return ret;
+   for (i = 0; i < plat->num_phys; i++) {
+   if (!generic_phy_valid(>usb_phys[i]))
+   continue;
 
-   ret = generic_phy_exit(phy);
-   if (ret)
-   return ret;
+   ret = generic_phy_power_off(>usb_phys[i]);
+   ret |= generic_phy_exit(>usb_phys[i]);
+   if (ret) {
+   pr_err("Can't shutdown USB PHY%d for %s\n",
+   i, dev->name);
+   }
}
 
return 0;
@@ -159,7 +196,6 @@ static int xhci_dwc3_shutdown_phy(struct phy *phy)
 
 static int xhci_dwc3_probe(struct udevice *dev)
 {
-   struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
struct xhci_hcor *hcor;
struct xhci_hccr *hccr;
struct dwc3 *dwc3_reg;
@@ -170,18 +206,10 @@ static int xhci_dwc3_probe(struct udevice *dev)
hcor = (struct xhci_hcor *)((uintptr_t)hccr +
HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
 
-   ret = xhci_dwc3_setup_phy(dev, 0, >usb_phy);
-   if (ret) {
-   pr_err("Failed to setup USB PHY for %s\n", dev->name);
+   ret = xhci_dwc3_setup_phy(dev, dev_count_phandle_with_args(
+   dev, "phys", "#phy-cells"));
+   

[U-Boot] [PATCH v2 u-boot 0/3] Add USB Support for Amlogic Meson GXL SoCs

[Neil Armstrong]

This patchset adds support for USB for the Amlogic Meson GXL SoCs following
the work done for Linux by Martin Blumenstingl at [1] [2] [3].

The support consist of :
 - A port of dwc3-of-simple from Linux to U-boot
 - A change to support more than 2 PHYs in the DWC3 DM driver
 - An USB2 PHY Driver and an USB3 PHY Driver

The DWC3 Controller has up to 4 PHYs connected :
 - 2 USB2 PHYs and an USB3 PHY for GXL SoCs
 - 3 USB2 PHYs and an USB3 PHY for the GXM SoC Variant
This is enabled by the "usb: host: dwc3: Add support for multiple PHYs" patch.
This patch is based on the "xhci-dwc3: Couple of fixes for USB3 support"
serie from Vignesh R, on the u-boot-usb tree.

The DWC3 Controller glue is generic enough to use the dwc3-of-simple from Linux
and can be easily ported to U-Boot as a Simple-Bus with Glue-Specific clocks
and Reset lines setup.

This depends on the recently applied :
 - clk: Add get/enable/disable/release for a bulk of clocks at [4]
 - reset: Add get/assert/deassert/release for bulk of reset signals at [5]
in order to manage the clocks and resets of the Glue in a clean fashion.

The USB PHY driver supports the standard generic PHY interface and supports
the power-on/off calls and set the Host mode by default.
They are based on the excellent work from Martin Blumenstingl merged in linux.

Changes since v1:
 - switch to submitted clk/reset bulk API
 - splitted dwc3 multiple phy init error between poweroff & exit

[1] 
https://lkml.kernel.org/r/20180303184700.21480-1-martin.blumensti...@googlemail.com
[2] 
https://lkml.kernel.org/r/20180128202245.25021-1-martin.blumensti...@googlemail.com
[3] 
https://lkml.kernel.org/r/20180303214309.25643-1-martin.blumensti...@googlemail.com
[4] http://lists.infradead.org/pipermail/linux-amlogic/2018-April/006952.html
[5] http://lists.infradead.org/pipermail/linux-amlogic/2018-April/006949.html

Neil Armstrong (3):
  usb: host: Add simple of glue driver for DWC3 USB Controllers
integration
  usb: host: dwc3: Add support for multiple PHYs
  phy: Add Amlogic Meson USB2 & USB3 Generic PHY drivers

 drivers/phy/Kconfig   |   8 ++
 drivers/phy/Makefile  |   1 +
 drivers/phy/meson-gxl-usb2.c  | 238 ++
 drivers/phy/meson-gxl-usb3.c  | 201 
 drivers/usb/host/Kconfig  |   7 ++
 drivers/usb/host/Makefile |   1 +
 drivers/usb/host/dwc3-of-simple.c | 123 
 drivers/usb/host/xhci-dwc3.c  | 113 ++
 8 files changed, 645 insertions(+), 47 deletions(-)
 create mode 100644 drivers/phy/meson-gxl-usb2.c
 create mode 100644 drivers/phy/meson-gxl-usb3.c
 create mode 100644 drivers/usb/host/dwc3-of-simple.c

-- 
2.7.4

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[U-Boot] [PATCH v2 u-boot 1/3] usb: host: Add simple of glue driver for DWC3 USB Controllers integration

[Neil Armstrong]

This is a port of the dwc3-of-simple driver from Linux to enable/deassert
clock and resets of a simple DWC3 Controller HW glue.

Signed-off-by: Neil Armstrong 
---
 drivers/usb/host/Kconfig  |   7 +++
 drivers/usb/host/Makefile |   1 +
 drivers/usb/host/dwc3-of-simple.c | 123 ++
 3 files changed, 131 insertions(+)
 create mode 100644 drivers/usb/host/dwc3-of-simple.c

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index a7249b7..6caa615 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -21,6 +21,13 @@ config USB_XHCI_DWC3
  Say Y or if your system has a Dual Role SuperSpeed
  USB controller based on the DesignWare USB3 IP Core.
 
+config USB_XHCI_DWC3_OF_SIMPLE
+   bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
+   select MISC
+   help
+ Support USB2/3 functionality in simple SoC integrations with
+ USB controller based on the DesignWare USB3 IP Core.
+
 config USB_XHCI_MVEBU
bool "MVEBU USB 3.0 support"
default y
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 9819489..abe4f90 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -49,6 +49,7 @@ obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
 # xhci
 obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
 obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
+obj-$(CONFIG_USB_XHCI_DWC3_OF_SIMPLE) += dwc3-of-simple.o
 obj-$(CONFIG_USB_XHCI_ROCKCHIP) += xhci-rockchip.o
 obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o
 obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o
diff --git a/drivers/usb/host/dwc3-of-simple.c 
b/drivers/usb/host/dwc3-of-simple.c
new file mode 100644
index 000..9abe450
--- /dev/null
+++ b/drivers/usb/host/dwc3-of-simple.c
@@ -0,0 +1,123 @@
+/*
+ * dwc3-of-simple.c - OF glue layer for simple integrations
+ *
+ * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Author: Felipe Balbi 
+ *
+ * Copyright (C) 2018 BayLibre, SAS
+ * Author: Neil Armstrong 
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct dwc3_of_simple {
+#if CONFIG_IS_ENABLED(CLK)
+   struct clk_bulk clks;
+#endif
+#if CONFIG_IS_ENABLED(DM_RESET)
+   struct reset_ctl_bulk   resets;
+#endif
+};
+
+#if CONFIG_IS_ENABLED(DM_RESET)
+static int dwc3_of_simple_reset_init(struct udevice *dev,
+struct dwc3_of_simple *simple)
+{
+   int ret;
+
+   ret = reset_get_bulk(dev, >resets);
+   if (ret)
+   return ret;
+
+   ret = reset_deassert_bulk(>resets);
+   if (ret) {
+   reset_release_bulk(>resets);
+   return ret;
+   }
+
+   return 0;
+}
+#endif
+
+#if CONFIG_IS_ENABLED(CLK)
+static int dwc3_of_simple_clk_init(struct udevice *dev,
+  struct dwc3_of_simple *simple)
+{
+   int ret;
+
+   ret = clk_get_bulk(dev, >clks);
+   if (ret)
+   return ret;
+
+   ret = clk_enable_bulk(>clks);
+   if (ret) {
+   clk_release_bulk(>clks);
+   return ret;
+   }
+
+   return 0;
+}
+#endif
+
+static int dwc3_of_simple_probe(struct udevice *dev)
+{
+#if CONFIG_IS_ENABLED(DM_RESET) || CONFIG_IS_ENABLED(CLK)
+   struct dwc3_of_simple *simple = dev_get_platdata(dev);
+   int ret;
+#endif
+
+#if CONFIG_IS_ENABLED(CLK)
+   ret = dwc3_of_simple_clk_init(dev, simple);
+   if (ret)
+   return ret;
+#endif
+
+#if CONFIG_IS_ENABLED(DM_RESET)
+   ret = dwc3_of_simple_reset_init(dev, simple);
+   if (ret)
+   return ret;
+#endif
+
+   return 0;
+}
+
+static int dwc3_of_simple_remove(struct udevice *dev)
+{
+#if CONFIG_IS_ENABLED(DM_RESET) || CONFIG_IS_ENABLED(CLK)
+   struct dwc3_of_simple *simple = dev_get_platdata(dev);
+#endif
+
+#if CONFIG_IS_ENABLED(DM_RESET)
+   reset_release_bulk(>resets);
+#endif
+
+#if CONFIG_IS_ENABLED(CLK)
+   clk_release_bulk(>clks);
+#endif
+
+   return dm_scan_fdt_dev(dev);
+}
+
+static const struct udevice_id dwc3_of_simple_ids[] = {
+   { .compatible = "amlogic,meson-gxl-dwc3" },
+   { }
+};
+
+U_BOOT_DRIVER(dwc3_of_simple) = {
+   .name = "dwc3-of-simple",
+   .id = UCLASS_SIMPLE_BUS,
+   .of_match = dwc3_of_simple_ids,
+   .probe = dwc3_of_simple_probe,
+   .remove = dwc3_of_simple_remove,
+   .platdata_auto_alloc_size = sizeof(struct dwc3_of_simple),
+   .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
-- 
2.7.4

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Re: [U-Boot] [PATCH V3 1/3] imx6: Define 'soc' env var for imx6 SoC

[Fabio Estevam]

Hi Guillaume,

On Wed, Apr 11, 2018 at 7:38 AM, Guillaume GARDET
 wrote:

Please explain in the commit log why this is needed. Thanks

> Signed-off-by: Guillaume GARDET 
> Cc: Troy Kisky 
> Cc: Stefano Babic 
> Cc: Fabio Estevam 
> Cc: Gary Bisson 
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[U-Boot] chiliSOM: USB bug

[sdrb]

Hi,

I use Grinn's chiliSOM and very old U-boot 2014.07 on it. Unfortunately 
the newest u-boot doesn't run SPL properly - so I'm forced to use 
2014.07 version.


I noticed that there is some problem with USB maintenance. As far as I 
know the chiliSOM is TI AM335x compatible system so it uses Mentor USB 
OTG controller.


The problem occures when I'm trying to use following sequence of commands:

# usb start
# usb stop
# usb start

and after the second "usb start" I get error:

[2018-04-06 08:13:42.600] U-Boot# usb start
[2018-04-06 08:13:44.162] (Re)start USB...
[2018-04-06 08:13:44.164] USB0:   scanning bus 0 for devices... 5 USB 
Device(s) found
[2018-04-06 08:13:50.872]scanning usb for storage devices... 0 
Storage Device(s) found

[2018-04-06 08:13:50.881] U-Boot# usb stop
[2018-04-06 08:13:55.514] stopping USB..
[2018-04-06 08:13:55.521] U-Boot# usb start
[2018-04-06 08:14:01.962] (Re)start USB...
[2018-04-06 08:14:01.964] USB0:   lowlevel init failed
[2018-04-06 08:14:16.730] USB error: all controllers failed lowlevel init
[2018-04-06 08:14:16.734] U-Boot#

I dig a little the code and I noticed that there is some line which 
breaks up things.
The problem is in proc musb_generic_disable() where there is zeroed 
DEVCTL register.
Seems like zeroing breaks somehow Mentor USB because after it it not 
possible to turn USB host mode.


I tried to solve the problem with push MUSB into suspend mode, then zero 
DEVCTL and then resume MUSB, but still no success.
So I decided to remove this line from my code and now it seems to work. 
I mean now USB is working fine:


[2018-04-06 08:15:44.290] U-Boot# usb start
[2018-04-06 08:15:45.787] (Re)start USB...
[2018-04-06 08:15:45.790] USB0:   scanning bus 0 for devices... 5 USB 
Device(s) found
[2018-04-06 08:15:52.489]scanning usb for storage devices... 0 
Storage Device(s) found

[2018-04-06 08:15:52.495] U-Boot# usb stop
[2018-04-06 08:15:54.835] stopping USB..
[2018-04-06 08:15:54.837] U-Boot# usb start
[2018-04-06 08:17:03.323] (Re)start USB...
[2018-04-06 08:17:03.325] USB0:   scanning bus 0 for devices... 5 USB 
Device(s) found
[2018-04-06 08:17:09.864]scanning usb for storage devices... 0 
Storage Device(s) found

[2018-04-06 08:17:09.871] U-Boot#


I know that my u-boot version 2014.07 is quite old, but the proc 
musb_generic_disable() in newest version is the same so probably the 
problem also still occures on other boards.


Anyone can verify or confirm that? I'd like to know if this is not 
specific to my board with chiliSOM.
I removed zeroing of DEVCTL register but maybe there is some better 
solution?


Any thoughts?

WK


commit 22447924ca27d3332698d3976f3e5e653bf893cc
Author: Witold Kowolik 
Date:   Wed Apr 11 07:49:42 2018 +0200

ARM: am335x: chiliSOM: Temporary workaround for Mentor OTG USB in 
host mode


Signed-off-by: Witold Kowolik 

diff --git a/drivers/usb/musb-new/musb_core.c 
b/drivers/usb/musb-new/musb_core.c

index 79e118ef85..2be2bd6081 100644
--- a/drivers/usb/musb-new/musb_core.c
+++ b/drivers/usb/musb-new/musb_core.c
@@ -977,7 +977,7 @@ static void musb_generic_disable(struct musb *musb)
musb_writew(mbase, MUSB_INTRRXE, 0);

/* off */
-   musb_writeb(mbase, MUSB_DEVCTL, 0);
+   /* musb_writeb(mbase, MUSB_DEVCTL, 0); */

/*  flush pending interrupts */
temp = musb_readb(mbase, MUSB_INTRUSB);

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[U-Boot] [PATCH] arm: zynq: Make ENV_SIZE and ENV_OFFSET optional via board file

[Michal Simek]

Boards have an option to rewrite variable locations in their own board
files. This is necessary for qspi and nand configurations where boot
image can be bigger then 896k(current limit).

Signed-off-by: Michal Simek 
---

 include/configs/zynq-common.h | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 554fb666346c..f2f5ad393df7 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -127,7 +127,9 @@
 #endif
 
 /* Total Size of Environment Sector */
-#define CONFIG_ENV_SIZE(128 << 10)
+#ifndef CONFIG_ENV_SIZE
+# define CONFIG_ENV_SIZE   (128 << 10)
+#endif
 
 /* Allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
@@ -135,7 +137,9 @@
 /* Environment */
 #ifndef CONFIG_ENV_IS_NOWHERE
 # define CONFIG_ENV_SECT_SIZE  CONFIG_ENV_SIZE
-# define CONFIG_ENV_OFFSET 0xE
+# ifndef CONFIG_ENV_OFFSET
+#  define CONFIG_ENV_OFFSET0xE
+# endif
 #endif
 
 /* enable preboot to be loaded before CONFIG_BOOTDELAY */
-- 
2.17.0

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[U-Boot] [PATCH] arm: zynq: Enable setup board name for different boards

[Michal Simek]

There is no need to use zynq name as SYS_BOARD for all boards.
The patch is adding an option to change it.

Signed-off-by: Michal Simek 
---

 arch/arm/mach-zynq/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index 87729047f999..13523594386f 100644
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -36,6 +36,7 @@ config ZYNQ_DDRC_INIT
  want to skip ddr init and this option is useful for it.
 
 config SYS_BOARD
+   string "Board name"
default "zynq"
 
 config SYS_VENDOR
-- 
2.17.0

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[U-Boot] [PATCH] arm: zynq: Wire automatic ddr detection for Zynq and ZynqMP case

[Michal Simek]

When static memory configuration is used U-Boot has capability to detect
memory size in setup range. Enable this feature for static
configuration.

Signed-off-by: Michal Simek 
---

 board/xilinx/zynq/board.c| 3 ++-
 board/xilinx/zynqmp/zynqmp.c | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 838ac0f4c4ea..2f4679e21135 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -184,7 +184,8 @@ int dram_init(void)
 #else
 int dram_init(void)
 {
-   gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+   gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+   CONFIG_SYS_SDRAM_SIZE);
 
zynq_ddrc_init();
 
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 0d1bd5412b16..3c4cf80b233f 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -377,7 +377,8 @@ int dram_init(void)
 #else
 int dram_init(void)
 {
-   gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+   gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+   CONFIG_SYS_SDRAM_SIZE);
 
return 0;
 }
-- 
2.17.0

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Re: [U-Boot] [U-Boot, v2, u-boot, 1/2] clk: Add get/enable/disable/release for a bulk of clocks

[Tom Rini]

On Tue, Apr 03, 2018 at 11:44:18AM +0200, Neil Armstrong wrote:

> This patch adds a "bulk" API to the clock API in order to get/enable/disable
> /release a group of clocks associated with a device.
> 
> This bulk API will avoid adding a copy of the same code to manage
> a group of clocks in drivers.
> 
> Signed-off-by: Neil Armstrong 
> Reviewed-by: Simon Glass 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] log: Add units to code-size stats in README.log

[Tom Rini]

On Mon, Apr 02, 2018 at 02:42:53AM -0600, Simon Glass wrote:

> Without the units these numbers are confusing. Add a comment about the
> unit being 'bytes' and mention 'buildman' as the source.
> 
> Suggested-by: Lukasz Majewski 
> Signed-off-by: Simon Glass 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v2, u-boot, 2/2] clk: add sandbox test for bulk API

[Tom Rini]

On Tue, Apr 03, 2018 at 11:44:19AM +0200, Neil Armstrong wrote:

> This patch adds the bulk clock API tests for the sandbox test suite.
> 
> It's very similar to the main test but only uses the _bulk() API and
> checks if the clocks are correctly enabled/disabled.
> 
> Signed-off-by: Neil Armstrong 
> Reviewed-by: Simon Glass 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 1/1] checkpatch.pl: update from Linux kernel v4.16

[Tom Rini]

On Wed, Apr 04, 2018 at 03:39:20PM +0200, Heinrich Schuchardt wrote:

> Update scripts/checkpatch.pl from upstream.
> 
> One of the many corrections is not creating an error for cover-letters.
> 
> Reintroduce U-Boot's
> 5c761ce58666b3a1695697498598f8bf3484a0c7
> checkpatch.pl: Add warning for new __packed additions
> 
> Signed-off-by: Heinrich Schuchardt 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 1/1] MAINTAINERS: ARM STM STM32MP: correct file paths

[Tom Rini]

On Wed, Apr 04, 2018 at 01:16:08AM +0200, Heinrich Schuchardt wrote:

> Provide correct file paths.
> 
> Signed-off-by: Heinrich Schuchardt 
> Reviewed-by: Patrick Delaunay 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 1/1] get_maintainer.pl: update from Linux kernel v4.16

[Tom Rini]

On Wed, Apr 04, 2018 at 01:54:26AM +0200, Heinrich Schuchardt wrote:

> The most significant change is the addition of the --self-test option
> which allows to run a consistency check on all MAINTAINERS files.
> 
> Signed-off-by: Heinrich Schuchardt 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v2, u-boot, 2/2] reset: add sandbox test for bulk API

[Tom Rini]

On Tue, Apr 03, 2018 at 11:40:51AM +0200, Neil Armstrong wrote:

> This patch adds the bulk reset API tests for the sandbox test suite.
> 
> Unlike the main test, it also check the "other" reset signal using the bulk 
> API
> and checks if the resets are correctly asserted/deasserted.
> 
> To allow the bulk API to work, and avoid changing the DT, the number of resets
> of the sandbox reset controller has been bumped to 101 for the "other" reset
> line to be valid.
> 
> Signed-off-by: Neil Armstrong 
> Reviewed-by: Simon Glass 

Applied to u-boot/master, thanks!

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Re: [U-Boot] Pull request: u-boot-ubi/master

[Tom Rini]

On Wed, Apr 11, 2018 at 03:16:21PM +0200, Heiko Schocher wrote:

> Hello Tom,
> 
> please pull from u-boot-ubi master
> 
> The following changes since commit 2600df4f8ef12ece9cec13030005919e0ba2b0d5:
> 
>   Merge tag 'xilinx-for-v2018.05-rc2' of git://git.denx.de/u-boot-microblaze
> (2018-04-09 11:06:21 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-ubi.git master
> 
> for you to fetch changes up to 05ea83b67ed7861c1693187dbf3a2613601c1b15:
> 
>   ubifs: Change value of mutex_is_locked() (2018-04-11 11:27:07 +0200)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] mkimage: do not fail if there is no print_header function

[Tom Rini]

On Fri, Mar 30, 2018 at 10:28:19AM +0200, Guillaume GARDET wrote:

> Commit 253c60a breaks the exit value of 'mkimage -T rkimage'
> and print the following  error:
>   mkimage: Can't print header for Rockchip Boot Image support: Success
> 
> It is not a failure to not print headers, so just display the warning message,
> and finish the function properly.
> 
> Signed-off-by: Guillaume GARDET 
> 
> Cc: Philipp Tomsich 
> Cc: Simon Glass 
> Cc: Tom Rini 
> Reviewed-by: Philipp Tomsich 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 1/1] fw_printenv: Fix crash due to incorrect size for malloc'ed string.

[Tom Rini]

On Wed, Apr 04, 2018 at 10:09:57AM +0200, Kristian Amlie wrote:

> Using sizeof gives the size of the pointer only, not the string. This
> could easily lead to crashes when using -l argument.
> 
> Signed-off-by: Kristian Amlie 

Applied to u-boot/master, thanks!

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Re: [U-Boot] armv7m: disable icache before linux booting

[Tom Rini]

On Fri, Mar 30, 2018 at 09:22:40AM +0200, Patrice Chotard wrote:

> Similarly to ARMV7, on ARMV7M instruction cache memory needs
> to be disabled before running linux kernel to avoid kernel to
> be stuck.
> 
> Signed-off-by: Patrice Chotard 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [U-Boot, u-boot] reset: Add Amlogic Meson Reset Controller

[Tom Rini]

On Thu, Mar 29, 2018 at 02:55:25PM +0200, Neil Armstrong wrote:

> The Amlogic Meson SoCs embeds up to 256 reset lines, add the corresponding
> driver.
> 
> Signed-off-by: Neil Armstrong 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [U-Boot, v2, u-boot, 1/2] reset: Add get/assert/deassert/release for bulk of reset signals

[Tom Rini]

On Tue, Apr 03, 2018 at 11:40:50AM +0200, Neil Armstrong wrote:

> This patch adds a "bulk" API to the reset API in order to get/deassert/
> assert/release a group of reset signals associated with a device.
> 
> This bulk API will avoid adding a copy of the same code to manage
> a group of reset signals in drivers.
> 
> Signed-off-by: Neil Armstrong 
> Reviewed-by: Simon Glass 

Applied to u-boot/master, thanks!

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Tom


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Re: [U-Boot] log: Correct missing free() on error in log_add_filter()

[Tom Rini]

On Mon, Apr 02, 2018 at 02:42:39AM -0600, Simon Glass wrote:

> If there is a problem with the parameters to log_add_filter(), the memory
> allocated is currently not freed. Fix this.
> 
> Reported-by: Coverity (CID: 171962)
> 
> Signed-off-by: Simon Glass 

Applied to u-boot/master, thanks!

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Tom


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