On Wed, Feb 06, 2019 at 12:15:11PM +0900, AKASHI Takahiro wrote:
> On Sat, Feb 02, 2019 at 07:15:53AM -0700, Simon Glass wrote:
> > Hi,
> >
> > On Thu, 31 Jan 2019 at 22:53, AKASHI Takahiro
> > wrote:
> > >
> > > Hi Simon,
> > >
> > > Thank you for suggestive comments.
> > > I've got no idea of
On Tue, Feb 5, 2019 at 7:37 PM Vladimir Oltean wrote:
>
> On 2/6/19 12:10 AM, Joe Hershberger wrote:
> > On Tue, Feb 5, 2019 at 9:20 AM Carlo Caione wrote:
> >>
> >> On 05/02/2019 00:15, Joe Hershberger wrote:
> >>> On Mon, Feb 4, 2019 at 5:39 PM Vladimir Oltean
> >>> wrote:
> >>
> >> /cut
>
On Sat, Feb 02, 2019 at 07:15:53AM -0700, Simon Glass wrote:
> Hi,
>
> On Thu, 31 Jan 2019 at 22:53, AKASHI Takahiro
> wrote:
> >
> > Hi Simon,
> >
> > Thank you for suggestive comments.
> > I've got no idea of making DM class for EFI protocol.
> >
> > On Wed, Jan 30, 2019 at 06:22:47PM -0700,
On Tue, Feb 5, 2019 at 6:45 PM Philipp Tomsich
wrote:
>
> As my last merge (and the successive follow-up patch) shows, *.rej
> files are not covered by our .gitignore. To protect against future
> accidental addition of *.rej artifacts, this adds a pattern for these
> to our .gitignore.
>
>
On 2/6/19 12:10 AM, Joe Hershberger wrote:
> On Tue, Feb 5, 2019 at 9:20 AM Carlo Caione wrote:
>>
>> On 05/02/2019 00:15, Joe Hershberger wrote:
>>> On Mon, Feb 4, 2019 at 5:39 PM Vladimir Oltean
>>> wrote:
>>
>> /cut
Which brings me to my next point.
If we can't properly make the
On Tue, Feb 5, 2019 at 9:20 AM Carlo Caione wrote:
>
> On 05/02/2019 00:15, Joe Hershberger wrote:
> > On Mon, Feb 4, 2019 at 5:39 PM Vladimir Oltean
> > wrote:
>
> /cut
> >> Which brings me to my next point.
> >> If we can't properly make the distinction between an indirect C22 MMD
> >> access
> Date: Tue, 5 Feb 2019 12:14:25 +0100
> From: Emmanuel Vadot
>
> On Tue, 5 Feb 2019 12:05:57 +0100
> Philipp Tomsich wrote:
>
> >
> >
> > > On 05.02.2019, at 11:54, Emmanuel Vadot wrote:
> > >
> > > Other make_fit script (like imx or sunxi) use the BL31 environment
> > > variable to
Hi @all,
I'm trying to build a linux kernel as zImage and boot it with u-boot on
a qemu vexpress-a15 machine. The host machine is a Ubuntu 18.04.
What I tried until now:
1. Get Linux from git, export ARCH=arm and
CROSS_COMPILE=arm-linux-gnueabihf-
2. Make Defconfig: make
Hi Philipp,
On Thu, 31 Jan 2019 22:12:36 +0100
Philipp Tomsich wrote:
> > If we used the pinctrl-rockchip driver, these config is not needed,
> > so remove them.
> >
> > Signed-off-by: David Wu
> > Reviewed-by: Kever Yang
> > ---
> >
> > Changes in v2: None
> >
> >
On Tue, 5 Feb 2019 12:05:57 +0100
Philipp Tomsich wrote:
>
>
> > On 05.02.2019, at 11:54, Emmanuel Vadot wrote:
> >
> > Other make_fit script (like imx or sunxi) use the BL31 environment
> > variable to indicate the location of the file.
> > Also do that for rockchip so we don't need to copy
Hi,
sending this v2 as follow up series based on
https://lists.denx.de/pipermail/u-boot/2019-January/357172.html
which converts all platform to DM_I2C and removes old driver.
Thanks,
Michal
Changes in v2:
- Extract Syzygy from Topic
- Add eeprom to i2c - needs to be checked by Syzygy team if
Signed-off-by: Rosy Song
---
arch/mips/dts/ap143.dts| 5 +
arch/mips/dts/qca953x.dtsi | 31 +++
2 files changed, 36 insertions(+)
diff --git a/arch/mips/dts/ap143.dts b/arch/mips/dts/ap143.dts
index 6aedd87db9..2e23225f12 100644
--- a/arch/mips/dts/ap143.dts
Signed-off-by: Rosy Song
---
drivers/net/ag7xxx.c | 203 +++
1 file changed, 186 insertions(+), 17 deletions(-)
diff --git a/drivers/net/ag7xxx.c b/drivers/net/ag7xxx.c
index 8146c3170e..403eb64895 100644
--- a/drivers/net/ag7xxx.c
+++
Signed-off-by: Rosy Song
---
drivers/pinctrl/ath79/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/ath79/Makefile b/drivers/pinctrl/ath79/Makefile
index 1daa2123a1..c7d1e44882 100644
--- a/drivers/pinctrl/ath79/Makefile
+++
Test
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Hi all,
yes you are right. I had checked out older version of u-boot.
off + mtd->erasesize
this is OK. I`m sending patch v2.
On 08. 12. 18 17:16, Stefano Babic wrote:
Hi Jiri, Miquel,
On 24/10/18 15:56, Miquel Raynal wrote:
Hi Jiri,
Jiri Valek wrote on Fri, 19 Oct 2018 10:15:55
+0200:
On 1/31/19 6:38 PM, Oleksandr Tyshchenko wrote:
> From: Oleksandr Tyshchenko
>
> Also take care of the fact that Lager and Stout boards use
> different serial interface for console.
This describes something else than $subject , please split the patchset
such that one patch does one thing and
On 1/31/19 6:38 PM, Oleksandr Tyshchenko wrote:
> From: Oleksandr Tyshchenko
>
> Both Lager and Stout boards are based on r8a7790 SoC.
>
> Leave platform specific functions for bringing seconadary CPUs up empty,
> since our target is to use PSCI for that.
>
> Also take care of updating arch
On 1/31/19 6:38 PM, Oleksandr Tyshchenko wrote:
> From: Oleksandr Tyshchenko
>
> Also enable PSCI support for Stout and Lager boards where
> actually the r8a7790 SoC is installed.
>
> All secondary CPUs will be switched to a non-secure HYP mode
> after booting.
>
> Signed-off-by: Oleksandr
Before the patch scsi would report the same device number for all SCSI
devices, e.g.
Device 0: (1:0) Vendor: ATA Prod.: Crucial_CT128M55 Rev: MU01
Type: Hard Disk
Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)
Device 0: (1:0) Vendor: ATA Prod.: Rev:
Hi All,
Any comments ?
Patrice
On 12/20/18 3:53 PM, Patrice Chotard wrote:
> The objective is to provide a simple way to retrieve a BMP file,
> and display it as splashscreen, from extlinux.conf file input.
>
> For this, we take example on https://www.syslinux.org/wiki/
>
From: Leo Ruan
The FIT image could contain the splash data in 3 different structure:
- The splash data is embedded in FIT image (internal)
In this case, the property 'data' presents in FIT image header. And
internal information 'start' and 'end' represent the location and
size of splash
We store a splash screen in SPI-NOR. We chose to use a FIT image as a
container because we want to
- store more than just the splash screen in SPI-NOR,
- do not create a bunch of MTD partitions,
- do not waste storage space, and
- avoid the overhead of a real file system.
In general
From: Leo Ruan
The splash image could be loaded from different sources (e.g. sf, mmc)
with different formats (e.g. raw, file-system). These sources are
structured by a board dependent object 'splash_location'. To decide
where is the splash image loaded, following environment variables are
used
On 05/02/2019 00:15, Joe Hershberger wrote:
On Mon, Feb 4, 2019 at 5:39 PM Vladimir Oltean wrote:
/cut
Which brings me to my next point.
If we can't properly make the distinction between an indirect C22 MMD
access and a proper C45 MMD access, and hence not keeping proper API
compatibility
On Tue, Feb 5, 2019 at 8:30 PM Andreas Schwab wrote:
>
> On Feb 05 2019, Anup Patel wrote:
>
> > Ahh, looks like it is not picking up "CC" set by Makefile. This might
> > be because you have removed "-R" from MAKEFLAGS.
>
> Nope. That fixed it.
Cool, I had already approved your PR on OpenSBI
On Feb 05 2019, Anup Patel wrote:
> Ahh, looks like it is not picking up "CC" set by Makefile. This might
> be because you have removed "-R" from MAKEFLAGS.
Nope. That fixed it.
Andreas.
--
Andreas Schwab, SUSE Labs, sch...@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4
On 05/02/2019 14:45, Tom Rini wrote:
On Mon, Feb 04, 2019 at 12:19:19PM +0100, Jean-Jacques Hiblot wrote:
We need to make sure that file writes,file creation, etc. are properly
performed and do not corrupt the filesystem.
To help with this, introduce the assert_fs_integrity() function that
On Tue, Feb 5, 2019 at 8:09 PM Andreas Schwab wrote:
>
> mkdir -p `dirname
> /net/hawking/daten/src/riscv/opensbi/build/platform/sifive/fu540/firmware/fw_payload.dep`;
> echo " AS-DEPplatform/sifive/fu540/firmware/fw_payload.dep"; echo -n
> `dirname
>
mkdir -p `dirname
/net/hawking/daten/src/riscv/opensbi/build/platform/sifive/fu540/firmware/fw_payload.dep`;
echo " AS-DEPplatform/sifive/fu540/firmware/fw_payload.dep"; echo -n
`dirname
/net/hawking/daten/src/riscv/opensbi/build/platform/sifive/fu540/firmware/fw_payload.dep`/
>
On Tue, Feb 5, 2019 at 7:10 PM Andreas Schwab wrote:
>
> On Feb 05 2019, Anup Patel wrote:
>
> > Okay, if you are doing native compilation then
> > make sure CROSS_COMPILE is not set so that
> > makefile will take native compiler instead of
> > cross-compiler.
>
> AS-DEP
Add support in the driver for handling phy specific registers.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
drivers/mmc/Kconfig | 1 +
drivers/mmc/am654_sdhci.c | 224 +-
2 files changed, 222 insertions(+), 3 deletions(-)
diff --git
From: Faiz Abbas
The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.
Also create a common API to set UHS timings in HOST_CONTROL2.
Signed-off-by: Faiz Abbas
---
drivers/mmc/sdhci.c | 28
From: Faiz Abbas
Add a platform specific set_control_reg() callback to help switch to
UHS speed modes.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
drivers/mmc/am654_sdhci.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git
Add Support for CONFIG_REGMAP.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
configs/am65x_evm_a53_defconfig | 2 ++
configs/am65x_evm_r5_defconfig | 2 ++
2 files changed, 4 insertions(+)
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index
In device nodes with more than one entry in the reg property,
it is sometimes useful to regmap only of the entries. Add an
API regmap_init_mem_index() to facilitate this.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
drivers/core/regmap.c | 42 ++
With changes in the driver requiring phy related properties,
add the same for the SD card node to prevent breaking boot with
the driver update.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git
Add Support for masking some bits in the capabilities
register of a host controller.
Also remove the redundant readl() into caps1.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
drivers/mmc/sdhci.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git
Make set_ios_post() return int to faciliate error handling in
platform drivers.
Signed-off-by: Faiz Abbas
---
drivers/mmc/sdhci.c | 8 ++--
drivers/mmc/xenon_sdhci.c | 4 +++-
include/sdhci.h | 2 +-
3 files changed, 10 insertions(+), 4 deletions(-)
diff --git
The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.
Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
The host controller works perfectly well without having to add any
quirks. Remove them.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
drivers/mmc/am654_sdhci.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index
Add an API to continuously read a register until a condition is
satisfied or a timeout occurs.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
include/regmap.h | 34 ++
1 file changed, 34 insertions(+)
diff --git a/include/regmap.h b/include/regmap.h
index
Sync the sdhci0 node from kernel. This changes the compatible that is
required to be there in the driver. Change the same for the SD card node
which is not yet supported in kernel.
Also sync the main_pmx0 node as a side effect.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
This driver works with the sdhci controller present on TI's AM65x devices.
Change the name to make this clearer and match the compatible with
kernel.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
configs/am65x_evm_a53_defconfig | 2 +-
configs/am65x_evm_r5_defconfig
Add Support for eMMC in TI's AM65x-evm. The series starts
by syncing the sdhci0 node from the kernel. Then it adds APIs and
changes to the driver required for handling the driver's integrated
phy. The current maximum supported speed is DDR52. Higher speeds and
tuning support will be added in a
The dram chip on the tablet was changed. The new one requires a lower
frequency, so change it.
Frequency 564 was also stable in the tests, but use slightly lower one
to be on a safe side.
Signed-off-by: Tomas Novotny
---
configs/tbs_a711_defconfig | 2 +-
1 file changed, 1 insertion(+), 1
On Mon, Feb 04, 2019 at 12:19:19PM +0100, Jean-Jacques Hiblot wrote:
> We need to make sure that file writes,file creation, etc. are properly
> performed and do not corrupt the filesystem.
> To help with this, introduce the assert_fs_integrity() function that
> executes the appropriate fsck tool.
On Feb 05 2019, Anup Patel wrote:
> Okay, if you are doing native compilation then
> make sure CROSS_COMPILE is not set so that
> makefile will take native compiler instead of
> cross-compiler.
AS-DEPplatform/sifive/fu540/firmware/fw_payload.dep
/bin/sh: -g: command not found
Andreas.
--
Hi Tom,
please pull the following Marvell related patches, mostly dealing
with the move to driver model (DM_VIDEO & DM_PCI) for the MVEBU
Armada XP / 38x platforms:
- Move Armada XP / 38x PCIe driver to DM_PCI from me
- Move
On 30.01.19 09:09, Anatolij Gustschin wrote:
On Wed, 30 Jan 2019 08:54:13 +0100
Stefan Roese s...@denx.de wrote:
With the new DM_VIDEO support in the Armada XP LCD driver, this patch
adds the needed DT node for the LCD controller to the theadorable dts
file. This DT property is not added to
On 30.01.19 09:02, Anatolij Gustschin wrote:
On Wed, 30 Jan 2019 08:54:11 +0100
Stefan Roese s...@denx.de wrote:
This patch moves the Armada XP video / LCD driver to DM_VIDEO. With this
move, the legacy interface board_video_init() is removed from the
theadorable board code (only user of this
On 25.01.19 11:52, Stefan Roese wrote:
Now that the PCIe driver supports DM and DT parsing, enable the PCIe DT
nodes that are used by this board.
Signed-off-by: Stefan Roese
Cc: Dirk Eibach
Cc: Mario Six
Cc: Chris Packham
Cc: Phil Sutter
Cc: Marek Behún
Cc: VlaoMao
Applied to
On 25.01.19 11:52, Stefan Roese wrote:
This patch sync's the PCIe DT nodes with the recent Linux v4.20 version.
This change makes it easier to reference specific PCIe nodes in the
board dts files to e.g. enable a PCIe port as this is now necessary with
the new DM PCI driver for these platforms.
On 25.01.19 11:52, Stefan Roese wrote:
This patch adds DM_PCI support to the MVEBU PCIe driver. This is
necessary, since all PCI drivers have to be moved to DM (driver model)
until the v2019.07 release.
To not break git bisect'ablility, this patch also moves CONFIG_PCI_MVEBU
from config headers
On 31.01.19 11:04, Simon Glass wrote:
On Fri, 25 Jan 2019 at 03:52, Stefan Roese wrote:
This function will be used by the Marvell Armada XP/38x PCIe driver,
which is moved to DM right now. So let's extract the functionality
from pci_uclass_child_post_bind() to make it available.
On 28.01.19 17:27, Vladimir Vid wrote:
This adds initial support for micro-DPU (uDPU) board which is based on
Armada-3720 SoC.
micro-DPU is the single-port FTTdp "distribution point unit" made by Methode
Electronics
which offers complete modularity with replaceable SFP modules both for uplink
From: Atish Patra
The readme guide describes the procedure to build, flash and boot Linux
using U-boot on HiFive Unleashed. It also explains the current state of
U-boot support and future action items.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
---
doc/README.sifive-fu540 | 302
This patch adds SiFive FU540 board support. For now, only
SiFive serial, SiFive PRCI, and Cadance MACB drivers are
only enabled. The SiFive FU540 defconfig by default builds
U-Boot for S-Mode because U-Boot on SiFive FU540 will run
in S-Mode as payload of BBL or OpenSBI.
Signed-off-by: Atish
From: Atish Patra
Fix MID bit field check to correctly identify all GEM hardwares.
The check is updated as per macb driver in Linux location:
/drivers/net/ethernet/cadence/macb_main.c:259
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
Reviewed-by: Alexander Graf
Reviewed-by: Lukas
This patch adds fixed-factor clock driver which derives clock
rate by dividing (div) and multiplying (mult) fixed factors
to a parent clock.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
---
arch/sandbox/dts/test.dts | 8
drivers/clk/Makefile | 4 +-
From: Atish Patra
Currently, timer driver is bound only for hart0.
There is no mandatory requirement that hart0 should always
come up. In fact, HiFive Unleashed SoC hart0 doesn't boot
in S-mode because it only has M-mode.
The timer driver should be bound for boot hart.
Signed-off-by: Atish
Don't fail in macb_enable_clk() if clk_enable() returns
-ENOSYS because we get -ENOSYS for fixed-rate clocks.
Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
---
drivers/net/macb.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/net/macb.c
From: Atish Patra
Compute the baud rate multipler with more precision.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
Reviewed-by: Alexander Graf
Reviewed-by: Lukas Auer
---
drivers/serial/serial_sifive.c | 28 ++--
1 file changed, 26 insertions(+), 2
From: Atish Patra
It is possible that input clock is not available because clk
device was not available and 'clock-frequency' DT property is
also not available.
In this case, instead of failing we should just skip baudrate
config by returning zero.
Signed-off-by: Atish Patra
Signed-off-by:
This patch adds asm/dma-mapping.h for Linux-like DMA mappings
APIs required by some of the drivers (such as, Cadance MACB
Ethernet driver).
Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
Reviewed-by: Alexander Graf
Reviewed-by: Lukas Auer
---
arch/riscv/include/asm/dma-mapping.h | 38
Add driver code for the SiFive FU540 PRCI IP block. This IP block
handles reset and clock control for the SiFive FU540 device and
implements SoC-level clock tree controls and dividers.
Based on code written by Wesley Terpstra
found in commit 999529edf517ed75b56659d456d221b2ee56bb60 of:
On 64bit systems, the DRAM top can be easily beyond 4GB and U-Boot
DMA mapping APIs will generate DMA addresses beyond 4GB. This
breaks DMA programming in 32bit DMA capable devices (such as
Cadence MACB ethernet). For example, If DRAM is more then 2GB
on QEMU sifive_u machine then Cadence MACB
Some of the drivers expect asm/arch/clk.h to be provided by
arch support code so we add place-holder asm/arch/clk.h for
RISC-V support.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/arch/clk.h | 14 ++
1 file changed, 14 insertions(+)
create mode 100644
The QEMU CPU support under arch/riscv is pretty much generic
and works fine for SiFive Unleashed as well. In fact, there
will be quite a few RISC-V SOCs for which QEMU CPU support
will work fine.
This patch renames cpu/qemu to cpu/generic to indicate the
above fact. If there are SOC specific
We will be adding place-holder headers under include/asm/arch
for RISC-V so this patch updates .gitignore to not consider
files under arch/riscv/include/asm/arch
Signed-off-by: Anup Patel
---
arch/.gitignore | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/.gitignore b/arch/.gitignore
Currently, the mrproper make target tries to force remove all
"arch/*/include/asm/arch" paths assuming they are symlinks but
this prevents us from adding place-holder headers under the
arch/riscv/include/asm/arch directory.
To solve this, we fix mrproper make target to only remove
This patchset adds SiFive Freedom Unleashed (FU540) support
to RISC-V U-Boot.
The patches are based upon latest RISC-V U-Boot tree
(git://git.denx.de/u-boot-riscv.git) at commit id
91882c472d8c0aef4db699d3f2de55bf43d4ae4b
All drivers namely: SiFive PRCI, SiFive Serial, and Cadance
MACB Ethernet
On Tue, Feb 5, 2019 at 6:21 PM Andreas Schwab wrote:
>
> On Feb 05 2019, Anup Patel wrote:
>
> > The OpenSBI build is similar to Linux and U-Boot. We expect
> > CROSS_COMPILE environment variable to be set.
>
> Why? That doesn't make sense.
Use of CROSS_COMPILE environment variable is
pretty
> -Original Message-
> From: Simon Glass [mailto:s...@chromium.org]
> Sent: Thursday, January 31, 2019 3:34 PM
> To: Anup Patel
> Cc: Rick Chen ; Bin Meng ;
> Joe Hershberger ; Lukas Auer
> ; Masahiro Yamada
> ; Alexander Graf ;
> Palmer Dabbelt ; Paul Walmsley
> ; Atish Patra ;
>
On Feb 05 2019, Anup Patel wrote:
> The OpenSBI build is similar to Linux and U-Boot. We expect
> CROSS_COMPILE environment variable to be set.
Why? That doesn't make sense.
> Example, if you cross-compiler
I don't have a cross compiler.
Andreas.
--
Andreas Schwab, SUSE Labs,
Currently the CPU frequency is incorrectly reported:
CPU: NXP i.MX8QXP RevB A35 at 147228 MHz
Fix this problem by using a direct call to the SCU firmware to
retrieve the Cortex A35 CPU frequency.
With this change applied the CPU frequency is displayed correctly:
CPU: NXP i.MX8QXP RevB A35
Trying to figure out if it will be possible to boot u-boot from an eMMC boot
partition using an
eMMC 4.2 controller(eMMC boot part. was introduced in 4.3) ?
I know this might not be the best list to ask this but I have been unable to
find this out using Google
and I hope there is someone here
On Mon, Feb 4, 2019 at 6:40 PM Andreas Schwab wrote:
>
> On Feb 04 2019, Atish Patra wrote:
>
> > Probably your cross compilation is not set. Can you try this ?
> >
> > export ARCH=riscv
> > export CROSS_COMPILE=
>
> There is no cross compile prefix.
>
The OpenSBI build is similar to Linux and
From: Grygorii Strashko
Enable TI K3 AM65x PSI-L, Ring Accelerator and UDMA drivers
Signed-off-by: Grygorii Strashko
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
---
configs/am65x_evm_a53_defconfig | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
Merge drivers/soc/keystone/ into drivers/soc/ti/
and convert CONFIG_TI_KEYSTONE_SERDES into Kconfig.
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
---
arch/arm/mach-keystone/Kconfig | 8
drivers/soc/Makefile | 1 -
From: Grygorii Strashko
Add DT node for MCU NAVSS its components to get DMA working on AM654
SoC.
Signed-off-by: Grygorii Strashko
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 47
1 file changed, 47 insertions(+)
The UDMA-P is intended to perform similar (but significantly upgraded) functions
as the packet-oriented DMA used on previous SoC devices. The UDMA-P module
supports the transmission and reception of various packet types.
The UDMA-P also supports acting as both a UTC and UDMA-C for its internal
From: Grygorii Strashko
Texas Instruments' System Control Interface (TI-SCI) Message Protocol
abstracts management of NAVSS resources, like PSI-L pairing and
unpairing, UDMAP tx/rx/flow configuration and Rings.
This patch adds support for requesting and configuring such resources
from TI-SCI
From: Grygorii Strashko
The Ring Accelerator (RINGACC or RA) provides hardware acceleration to
enable straightforward passing of work between a producer and a consumer.
There is one RINGACC module per NAVSS on TI AM65x SoCs.
The RINGACC converts constant-address read and write accesses to
From: Grygorii Strashko
Add TI Communications Port Programming Interface (CPPI) 5
interface description and helpers
Signed-off-by: Grygorii Strashko
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
---
include/linux/soc/ti/cppi5.h | 995 +++
1 file changed,
This series adds DMA support for TI's AM654 SoC.
v4:
Convert debug prints to pr_debug()s
Collect R-bs
v3:
Minor comment/whitespace cleanups as pointed out by Tom Rini
v2:
Align DT bindings with latest proposed bindings as pointed out by Peter.
Merge drivers/soc/keystone into drivers/soc/ti
On 2/2/19 7:06 AM, Simon Glass wrote:
> On Thu, 31 Jan 2019 at 09:17, Bin Meng wrote:
>>
>> At present the 4-level page table base address for 64-bit U-Boot
>> proper is assigned an address that conflicts with CONFIG_LOADADDR.
>> Change it to an address within the low memory range instead.
>>
>>
> -Original Message-
> From: Simon Glass [mailto:s...@chromium.org]
> Sent: Thursday, January 31, 2019 3:34 PM
> To: Alexander Graf
> Cc: Anup Patel ; Rick Chen ;
> Bin Meng ; Joe Hershberger
> ; Lukas Auer ;
> Masahiro Yamada ; Palmer Dabbelt
> ; Paul Walmsley ; Atish
> Patra ;
> On 05.02.2019, at 12:14, Emmanuel Vadot wrote:
>
> On Tue, 5 Feb 2019 12:05:57 +0100
> Philipp Tomsich wrote:
>
>>
>>
>>> On 05.02.2019, at 11:54, Emmanuel Vadot wrote:
>>>
>>> Other make_fit script (like imx or sunxi) use the BL31 environment
>>> variable to indicate the location of
Basin Cove PMIC is connected to I2C0 bus which is hidden from the OS
and access is going via SCU device, enumerated via PCI.
For now, we add just a minimum support of PMIC device to allow enabling,
e.g. USB OTG, in the OS.
Signed-off-by: Andy Shevchenko
---
On 05/02/2019 at 11:20, Eugen Hristev - M18282 wrote:
> From: Eugen Hristev
>
> Update Atmel AT91 maintainership
>
> Signed-off-by: Eugen Hristev
> ---
> MAINTAINERS | 13 +++--
> 1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index
> On 05.02.2019, at 11:54, Emmanuel Vadot wrote:
>
> Other make_fit script (like imx or sunxi) use the BL31 environment
> variable to indicate the location of the file.
> Also do that for rockchip so we don't need to copy the file in the source
> directory.
>
> Signed-off-by: Emmanuel Vadot
Other make_fit script (like imx or sunxi) use the BL31 environment
variable to indicate the location of the file.
Also do that for rockchip so we don't need to copy the file in the source
directory.
Signed-off-by: Emmanuel Vadot
---
arch/arm/mach-rockchip/make_fit_atf.py | 2 +-
1 file changed,
Emmanuel,
Thanks for the heads-up.
The follow-on PR is already on the list (+ an additional patch to include these
in .gitignore).
Thanks,
Phil.
> On 05.02.2019, at 11:49, Emmanuel Vadot wrote:
>
>
> Hi Philipp,
>
> On Thu, 31 Jan 2019 22:12:36 +0100
> Philipp Tomsich wrote:
>
>>> If we
From: Eugen Hristev
Update Atmel AT91 maintainership
Signed-off-by: Eugen Hristev
---
MAINTAINERS | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index e3a1586..d32851e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -113,12 +113,6 @@
On 2/4/19 3:40 PM, Simon Glass wrote:
> On Mon, 4 Feb 2019 at 03:15, Patrick Delaunay wrote:
>>
>> This add missing parts for previous commit 06f94461a9f4
>> ("fdt: Allow indicating a node is for U-Boot proper only")
>>
>> At present it is not possible to specify that a node should be used before
On 2/1/19 5:02 PM, Chee, Tien Fong wrote:
> On Fri, 2019-02-01 at 09:25 +0100, Marek Vasut wrote:
>> On 2/1/19 4:48 AM, Chee, Tien Fong wrote:
>>>
>>> On Thu, 2019-01-31 at 15:54 +0100, Marek Vasut wrote:
On 1/31/19 3:51 PM, tien.fong.c...@intel.com wrote:
>
>
> From: Tien
On 2/1/19 5:50 PM, Chee, Tien Fong wrote:
> On Fri, 2019-02-01 at 09:29 +0100, Marek Vasut wrote:
>> On 2/1/19 4:59 AM, Chee, Tien Fong wrote:
>>>
>>> On Thu, 2019-01-31 at 15:54 +0100, Marek Vasut wrote:
On 1/31/19 3:51 PM, tien.fong.c...@intel.com wrote:
>
>
> From: Tien
On 2/2/19 4:27 AM, Chee, Tien Fong wrote:
> On Fri, 2019-02-01 at 12:12 -0800, Dalon L Westergreen wrote:
>> On Thu, 2019-01-31 at 22:51 +0800, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> Add FPGA driver to support program FPGA with FPGA bitstream loading
>>> from
>>>
On 2/1/19 4:20 PM, Chee, Tien Fong wrote:
> On Fri, 2019-02-01 at 09:19 +0100, Marek Vasut wrote:
>> On 2/1/19 9:11 AM, Chee, Tien Fong wrote:
>>>
>>> On Thu, 2019-01-31 at 15:22 +0100, Marek Vasut wrote:
On 1/31/19 1:42 PM, tien.fong.c...@intel.com wrote:
>
>
> From: Tien
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