Re: [U-Boot] [PATCH v2] pci: Avoid assigning PCI resources that are below 0x1000
On 05.06.19 16:26, Bin Meng wrote:
commit b7598a43f2b4 ("[PATCH] Avoid assigning PCI resources from
zero address") only moved the bus lower address to 0x1000 if the
given bus start address is zero. The comment said 0x1000 is a
reasonable starting value, hence we'd better apply the same
adjustment when the given bus start address is below 0x1000.
Signed-off-by: Bin Meng
Reviewed-by: Stefan Roese
Though again my question, where you did spot an issue with the
current implementation?
Thanks,
Stefan
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Re: [U-Boot] [PATCH] clk: sifive: fu540-prci: align primary DT match string to the DT bindings
Hello Bin,
On Fri, 31 May 2019, Paul Walmsley wrote:
> On Thu, 30 May 2019, Bin Meng wrote:
>
> > On Sun, May 26, 2019 at 5:13 PM Paul Walmsley
> > wrote:
> >
> > > diff --git a/drivers/clk/sifive/fu540-prci.c
> > > b/drivers/clk/sifive/fu540-prci.c
> > > index 2d47ebc6b1..d79d1a5351 100644
> > > --- a/drivers/clk/sifive/fu540-prci.c
> > > +++ b/drivers/clk/sifive/fu540-prci.c
> > > @@ -589,7 +589,7 @@ static struct clk_ops sifive_fu540_prci_ops = {
> > > };
> > >
> > > static const struct udevice_id sifive_fu540_prci_ids[] = {
> > > - { .compatible = "sifive,fu540-c000-prci0" },
> > > + { .compatible = "sifive,fu540-c000-prci" },
> >
> > Can we keep the previous compatible string for compatibility reason?
> > U-Boot is now reusing the DT that FSBL passes.
>
> Are there any FSBLs that pass "sifive,fu540-c000-prci0" ? I am not aware
> of any.
>
> SiFive FSBLs have only ever used "sifive,aloeprci0" (or
> "sifive,ux00prci0") and those will soon be deprecated.
Just checking in again on this patch. Do you still need
"sifive,fu540-c000-prci0" to be preserved, even though it should be
unused? Or is the original patch OK for you?
- Paul
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Re: [U-Boot] [PATCH v7 11/15] mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings
On 06/06/19 7:24 PM, Faiz Abbas wrote:
> The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
> to arasan/zynq controllers. Add the same to sdhci.h.
>
> Also create a common API to set UHS timings in HOST_CONTROL2.
>
> Signed-off-by: Faiz Abbas
> Reviewed-by: Tom Rini
> Tested-by: Lokesh Vutla
This is causing build failure for the following defconfig:
xilinx_zynqmp_zcu104_revA_defconfig
➜ u-boot git:(master) v78make xilinx_zynqmp_zcu104_revA_defconfig
HOSTCC scripts/basic/fixdep
HOSTCC scripts/kconfig/conf.o
YACCscripts/kconfig/zconf.tab.c
LEX scripts/kconfig/zconf.lex.c
HOSTCC scripts/kconfig/zconf.tab.o
v8 HOSTLD scripts/kconfig/conf
#
# configuration written to .config
#
➜ u-boot git:(master) v78make -j4 -s
drivers/mmc/zynq_sdhci.c: In function ‘arasan_sdhci_execute_tuning’:
drivers/mmc/zynq_sdhci.c:97:27: error: ‘SDHCI_HOST_CTRL2’ undeclared (first use
in this function); did you mean ‘SDHCI_HOST_CONTROL2’?
ctrl = sdhci_readw(host, SDHCI_HOST_CTRL2);
^~~~
SDHCI_HOST_CONTROL2
drivers/mmc/zynq_sdhci.c:97:27: note: each undeclared identifier is reported
only once for each function it appears in
drivers/mmc/zynq_sdhci.c: In function ‘arasan_sdhci_set_control_reg’:
drivers/mmc/zynq_sdhci.c:182:27: error: ‘SDHCI_HOST_CTRL2’ undeclared (first use
in this function); did you mean ‘SDHCI_HOST_CONTROL2’?
reg = sdhci_readw(host, SDHCI_HOST_CTRL2);
^~~~
SDHCI_HOST_CONTROL2
drivers/mmc/zynq_sdhci.c:183:10: error: ‘SDHCI_18V_SIGNAL’ undeclared (first use
in this function); did you mean ‘SDHCI_DIV_HI_MASK’?
reg |= SDHCI_18V_SIGNAL;
^~~~
SDHCI_DIV_HI_MASK
scripts/Makefile.build:278: recipe for target 'drivers/mmc/zynq_sdhci.o' failed
make[2]: *** [drivers/mmc/zynq_sdhci.o] Error 1
scripts/Makefile.build:432: recipe for target 'drivers/mmc' failed
make[1]: *** [drivers/mmc] Error 2
Makefile:1582: recipe for target 'drivers' failed
make: *** [drivers] Error 2
make: *** Waiting for unfinished jobs
Can you fix it and repost the series?
Thanks and regards,
Lokesh
> ---
> drivers/mmc/sdhci.c | 28
> drivers/mmc/zynq_sdhci.c | 31 ++-
> include/sdhci.h | 19 ++-
> 3 files changed, 48 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
> index 75e6567631..79edb18fe5 100644
> --- a/drivers/mmc/sdhci.c
> +++ b/drivers/mmc/sdhci.c
> @@ -533,6 +533,34 @@ static void sdhci_set_power(struct sdhci_host *host,
> unsigned short power)
> sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
> }
>
> +void sdhci_set_uhs_timing(struct sdhci_host *host)
> +{
> + struct mmc *mmc = (struct mmc *)host->mmc;
> + u32 reg;
> +
> + reg = sdhci_readw(host, SDHCI_HOST_CONTROL2);
> + reg &= ~SDHCI_CTRL_UHS_MASK;
> +
> + switch (mmc->selected_mode) {
> + case UHS_SDR50:
> + case MMC_HS_52:
> + reg |= SDHCI_CTRL_UHS_SDR50;
> + break;
> + case UHS_DDR50:
> + case MMC_DDR_52:
> + reg |= SDHCI_CTRL_UHS_DDR50;
> + break;
> + case UHS_SDR104:
> + case MMC_HS_200:
> + reg |= SDHCI_CTRL_UHS_SDR104;
> + break;
> + default:
> + reg |= SDHCI_CTRL_UHS_SDR12;
> + }
> +
> + sdhci_writew(host, reg, SDHCI_HOST_CONTROL2);
> +}
> +
> #ifdef CONFIG_DM_MMC
> static int sdhci_set_ios(struct udevice *dev)
> {
> diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
> index 08023783de..b39e1d7a19 100644
> --- a/drivers/mmc/zynq_sdhci.c
> +++ b/drivers/mmc/zynq_sdhci.c
> @@ -48,11 +48,6 @@ static const u8 mode2timing[] = {
> [MMC_HS_200] = MMC_HS200_BUS_SPEED,
> };
>
> -#define SDHCI_HOST_CTRL2 0x3E
> -#define SDHCI_CTRL2_MODE_MASK0x7
> -#define SDHCI_18V_SIGNAL 0x8
> -#define SDHCI_CTRL_EXEC_TUNING 0x0040
> -#define SDHCI_CTRL_TUNED_CLK 0x80
> #define SDHCI_TUNING_LOOP_COUNT 40
>
> static void arasan_zynqmp_dll_reset(struct sdhci_host *host, u8 deviceid)
> @@ -190,30 +185,8 @@ static void arasan_sdhci_set_control_reg(struct
> sdhci_host *host)
> }
>
> if (mmc->selected_mode > SD_HS &&
> - mmc->selected_mode <= UHS_DDR50) {
> - reg = sdhci_readw(host, SDHCI_HOST_CTRL2);
> - reg &= ~SDHCI_CTRL2_MODE_MASK;
> - switch (mmc->selected_mode) {
> - case UHS_SDR12:
> - reg |= UHS_SDR12_BUS_SPEED;
> - break;
> - case UHS_SDR25:
> - reg |= UHS_SDR25_BUS_SPEED;
> - break;
> - case UHS_SDR50:
> - reg |= UHS_SDR50_BUS_SPEED;
> - break;
> - case UHS_SDR104:
> - reg |= UHS_SDR104_BUS_SPEED;
> -
Re: [U-Boot] [PATCH v4 0/5] net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver
On Thu, Jun 06, 2019 at 05:08:16PM +0530, Keerthy wrote: > > > On 02/05/19 11:14 AM, Keerthy wrote: > > > > > >On 30/04/19 11:57 AM, Keerthy wrote: > >> > >> > >>On 30/04/19 11:54 AM, Keerthy wrote: > >>>Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem > >>>(CPSW > >>>NUSS). It has two ports and provides Ethernet packet communication for > >>>the > >>>device and can be configured as an Ethernet switch. CPSW NUSS > >>>features: the > >>>Reduced Gigabit Media Independent Interface (RGMII), Reduced Media > >>>Independent Interface (RMII), and the Management Data Input/Output > >>>(MDIO) > >>>interface for physical layer device (PHY) management. The TI AM65x SoC > >>>has > >>>integrated two-port Gigabit Ethernet Switch subsystem into device MCU > >>>domain named MCU_CPSW0. One Ethernet port (port 1) with selectable RGMII > >>>and RMII interfaces and an internal Communications Port Programming > >>>Interface (CPPI) port (Host port 0). > >>> > >>>Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX > >>>channels and on RX channels operating by TI am654 NAVSS Unified DMA > >>>Peripheral Root Complex (UDMA-P) controller. > >>> > >>>Tested for tftp and booting to kernel on am654-evm. > >> > >>https://patchwork.ozlabs.org/patch/1090618/ > >> > >>Needs to be applied before trying the cpsw. > > > >Tom, > > > >Thanks for pulling this series and as pointed above please pull the patch > >[1] which will avoid udma accessing RT registers before channel config is > >done. > > Tom, > > I do not see this series in latest u-boot. Was this dropped for some reason? Just came in late in the cycle, I'll pick it up next release, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Pull request, u-boot-tegra/master
On Wed, Jun 05, 2019 at 01:50:59PM -0700, Tom Warren wrote: > Tom, > > Please pull u-boot-tegra/master into U-Boot/master. Thanks! > > All Tegra builds are OK, and Stephen's automated test system reports that > all tests pass. > > The following changes since commit 6d93d245c148f10f15724601650fab3a665f102c: > > Merge git://git.denx.de/u-boot-riscv (2019-06-05 10:07:31 -0400) > > are available in the git repository at: > > git://git.denx.de/u-boot-tegra.git master > > for you to fetch changes up to 879a3bc1c2f3e2aadd6f05e6427cf4d97a272f9a: > > ARM: tegra: Mark built-in Ethernet as default on Jetson TX2 (2019-06-05 > 09:16:35 -0700) This feels like a lot of change this late in the cycle. Are you sure this is the right time for it? Thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Pull request for UEFI sub-system for v2019.07-rc4 (2)
On Wed, Jun 05, 2019 at 07:58:15PM +0200, Heinrich Schuchardt wrote: > The following changes since commit 8a802a2eefd36865eaa3d927d1db7af63bb2d922: > > Merge tag 'rockchip-for-v2019.07-rc3' of > git://git.denx.de/u-boot-rockchip (2019-05-31 07:17:09 -0400) > > are available in the Git repository at: > > git://git.denx.de/u-boot-efi.git tags/efi-2019-07-rc4-2 > > for you to fetch changes up to 4b27a761321fd17536e02644d0ec0373150eb570: > > cmd: env: add -nv option for UEFI non-volatile variable (2019-06-04 > 23:56:14 +0200) > > Travis CI has no complains: > https://travis-ci.org/xypron2/u-boot/builds/541464942 > > Primary key fingerprint: > 6DC4 F9C7 1F29 A6FA 06B7 6D33 C481 DBBC 2C05 1AC4 > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Did anything ever happen with mvmdio / marvell xsmi support?
Hi All Last I see is version 4 of a patchset that is almost a year old with some change requests within - [PATCH v4 1/2] dm: mdio: add a uclass for MDIO (https://lists.denx.de/pipermail/u-boot/2018-July/334118.html) - [PATCH v4 2/2] mdio: add marvell MDIO driver (https://lists.denx.de/pipermail/u-boot/2018-July/333750.html) I see no trace of this on u-boot repos (i think I looked at the primary, the `-net`, the `-marvell` and even the `-dm` repos) I do see similar work in Marvell's public github repo (g...@github.com:MarvellEmbeddedProcessors/u-boot-marvell.git) but said repo/branch seems to be significantly outdated relative to u-boot master. - Ken, Is there intention on your side to wrap this up? - If not or if if yes but not in the near future we could give it a go, is there anything that I should be aware of? Thanks --Nevo p.s. new to the mailing list - feel free to hit me over the head or direct me if not following correct protocol. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] MAINTAINERS: change Ramon Fried email address
Change my email address, too many mails gets to my private mail, created specific email account just for developmement. Signed-off-by: Ramon Fried --- MAINTAINERS| 2 +- board/qualcomm/dragonboard410c/MAINTAINERS | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 36625795a4..101ad570b9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -269,7 +269,7 @@ F: arch/arm/mach-s5pc1xx/ F: arch/arm/cpu/armv7/s5p-common/ ARM SNAPDRAGON -M: Ramon Fried +M: Ramon Fried S: Maintained F: arch/arm/mach-snapdragon/ F: drivers/gpio/msm_gpio.c diff --git a/board/qualcomm/dragonboard410c/MAINTAINERS b/board/qualcomm/dragonboard410c/MAINTAINERS index a43f1c878e..83448f5c13 100644 --- a/board/qualcomm/dragonboard410c/MAINTAINERS +++ b/board/qualcomm/dragonboard410c/MAINTAINERS @@ -1,5 +1,5 @@ DRAGONBOARD410C BOARD -M: Ramon Fried +M: Ramon Fried S: Maintained F: board/qualcomm/dragonboard410c/ F: include/configs/dragonboard410c.h -- 2.21.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH V2 0/7] ARM: imx: Update Novena to DM/DT
On 2019-06-04, Vagrant Cascadian wrote: > On 2019-05-17, Marek Vasut wrote: Retried with a build from: https://github.com/marex/u-boot-imx/tree/imx-dm commit:7a381bb7edfd43aefc1dbfea6d574234ef9d7771 Which contains the two patchsets needed. > I have two oustanding issues... with some files it sometimes fails to > load one or more from SATA: > > Retrieving file: /boot/initrd.img-5.0.0-trunk-armmp > 20077960 bytes read in 375 ms (51.1 MiB/s) > Retrieving file: /boot/vmlinuz-5.0.0-trunk-armmp > 4215296 bytes read in 40 ms (100.5 MiB/s) > append: root=UUID=9666ab0b-f932-4e2f-95d7-0e96a12a4540 ro quiet > Retrieving file: /usr/lib/linux-image-5.0.0-trunk-armmp/imx6q-novena.dtb > CACHE: Misaligned operation at range [fafb5398, fafb6398] > CACHE: Misaligned operation at range [fafb5398, fafb6398] > ERROR: v7_outer_cache_inval_range - start address is not aligned - > 0xfafb5398 > ERROR: v7_outer_cache_inval_range - stop address is not aligned - > 0xfafb6398 > invalid extent block > > It then falls back to one of the other kernels (using the extlinux.conf > parsing) and succeeds. It consistantly gets a cache/alignment error with > this specific file. A bit-for-bit identical .dtb loaded from another > path works just fine. Older versions of u-boot boot this fine. Would > some particular EXT4 flag possibly be causing issues? > > Several other kernel+initrd+dtb combinations work fine. Running "dcache off" before booting still produces the warnings/errors, but actually does boot successfully. Of course, it's much slower. > The second issue is still using one out of four exposed USB ports fails > and resets the board: > > load usb 0:1 $kernel_addr_r misc/Binaries/linux/Image > data abort > pc : [] lr : [] > reloc pc : [<1783367a>]lr : [<178330fd>] > sp : faf7c6e8 ip : 0003 fp : 0005 > r10: faf8b200 r9 : faf87ea0 r8 : 0001 > r7 : faf8b2c0 r6 : f9f7a040 r5 : faf7c710 r4 : 0038 > r3 : 006d r2 : f9f7a0a3 r1 : faf8b32c r0 : f9f7a09f > Flags: nzCv IRQs off FIQs off Mode SVC_32 > Code: 4630fc5b 81f0e8bd e7d84606 bf082b2f (f822235c) > Resetting CPU ... > > The three other usb ports work just fine with the same USB stick and > file. All four ports work with 2019.01. Got a bit-for-bit identical error on this one. I was able to get the objdump output with the reloc pc value: $ arm-linux-gnueabihf-objdump -d u-boot | grep 178337aa 178337aa: f822 3b02 strh.w r3, [r2], #2 Hope that's helpful! live well, vagrant signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] arm: imx8: factor out uart init code
New imx8 boards started adding duplicated UART init code.
Factor out this to common function sc_pm_setup_uart().
Signed-off-by: Anatolij Gustschin
Cc: Peng Fan
---
arch/arm/include/asm/arch-imx8/sys_proto.h | 2 ++
arch/arm/mach-imx/imx8/Makefile| 2 +-
arch/arm/mach-imx/imx8/misc.c | 26 ++
board/freescale/imx8qm_mek/imx8qm_mek.c| 16 +++--
board/freescale/imx8qxp_mek/imx8qxp_mek.c | 16 +++--
5 files changed, 35 insertions(+), 27 deletions(-)
create mode 100644 arch/arm/mach-imx/imx8/misc.c
diff --git a/arch/arm/include/asm/arch-imx8/sys_proto.h
b/arch/arm/include/asm/arch-imx8/sys_proto.h
index 73ffaba7d5..3f5bbe9dcc 100644
--- a/arch/arm/include/asm/arch-imx8/sys_proto.h
+++ b/arch/arm/include/asm/arch-imx8/sys_proto.h
@@ -3,6 +3,7 @@
* Copyright 2018 NXP
*/
+#include
#include
#include
@@ -17,3 +18,4 @@ struct pass_over_info_t {
enum boot_device get_boot_device(void);
int print_bootinfo(void);
+int sc_pm_setup_uart(sc_rsrc_t uart_rsrc, sc_pm_clock_rate_t clk_rate);
diff --git a/arch/arm/mach-imx/imx8/Makefile b/arch/arm/mach-imx/imx8/Makefile
index 31ad169ccf..92b5c56acb 100644
--- a/arch/arm/mach-imx/imx8/Makefile
+++ b/arch/arm/mach-imx/imx8/Makefile
@@ -4,4 +4,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += cpu.o iomux.o
+obj-y += cpu.o iomux.o misc.o
diff --git a/arch/arm/mach-imx/imx8/misc.c b/arch/arm/mach-imx/imx8/misc.c
new file mode 100644
index 00..5fe23d2080
--- /dev/null
+++ b/arch/arm/mach-imx/imx8/misc.c
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0+
+#include
+#include
+
+int sc_pm_setup_uart(sc_rsrc_t uart_rsrc, sc_pm_clock_rate_t clk_rate)
+{
+ sc_pm_clock_rate_t rate = clk_rate;
+ int ret;
+
+ /* Power up UARTn */
+ ret = sc_pm_set_resource_power_mode(-1, uart_rsrc, SC_PM_PW_MODE_ON);
+ if (ret)
+ return ret;
+
+ /* Set UARTn clock root to 'rate' MHz */
+ ret = sc_pm_set_clock_rate(-1, uart_rsrc, 2, );
+ if (ret)
+ return ret;
+
+ /* Enable UARTn clock root */
+ ret = sc_pm_clock_enable(-1, uart_rsrc, 2, true, false);
+ if (ret)
+ return ret;
+
+ return 0;
+}
diff --git a/board/freescale/imx8qm_mek/imx8qm_mek.c
b/board/freescale/imx8qm_mek/imx8qm_mek.c
index e69efc4dd6..249c29e0f2 100644
--- a/board/freescale/imx8qm_mek/imx8qm_mek.c
+++ b/board/freescale/imx8qm_mek/imx8qm_mek.c
@@ -34,21 +34,11 @@ static void setup_iomux_uart(void)
int board_early_init_f(void)
{
+ sc_pm_clock_rate_t rate = SC_80MHZ;
int ret;
- /* Set UART0 clock root to 80 MHz */
- sc_pm_clock_rate_t rate = 8000;
-
- /* Power up UART0 */
- ret = sc_pm_set_resource_power_mode(-1, SC_R_UART_0, SC_PM_PW_MODE_ON);
- if (ret)
- return ret;
- ret = sc_pm_set_clock_rate(-1, SC_R_UART_0, 2, );
- if (ret)
- return ret;
-
- /* Enable UART0 clock root */
- ret = sc_pm_clock_enable(-1, SC_R_UART_0, 2, true, false);
+ /* Set UART0 clock root to 80 MHz */
+ ret = sc_pm_setup_uart(SC_R_UART_0, rate);
if (ret)
return ret;
diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c
b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
index 63cd605b6a..1038f26d69 100644
--- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c
+++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
@@ -40,21 +40,11 @@ static void setup_iomux_uart(void)
int board_early_init_f(void)
{
+ sc_pm_clock_rate_t rate = SC_80MHZ;
int ret;
- /* Set UART0 clock root to 80 MHz */
- sc_pm_clock_rate_t rate = 8000;
-
- /* Power up UART0 */
- ret = sc_pm_set_resource_power_mode(-1, SC_R_UART_0, SC_PM_PW_MODE_ON);
- if (ret)
- return ret;
- ret = sc_pm_set_clock_rate(-1, SC_R_UART_0, 2, );
- if (ret)
- return ret;
-
- /* Enable UART0 clock root */
- ret = sc_pm_clock_enable(-1, SC_R_UART_0, 2, true, false);
+ /* Set UART0 clock root to 80 MHz */
+ ret = sc_pm_setup_uart(SC_R_UART_0, rate);
if (ret)
return ret;
--
2.17.1
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[U-Boot] [PATCH] net: eth-uclass: No warning for using ROM MAC
Using a ROM burned in MAC address is the normal way devices that have
this ability will store their MAC. It's normal operation and a warning
message isn't appropriate. Make it a debug message, as it is in
non-DM_ETH code paths that do this.
Signed-off-by: Trent Piepho
---
net/eth-uclass.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 031d558625..dae4987355 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -533,8 +533,7 @@ static int eth_post_probe(struct udevice *dev)
memcpy(pdata->enetaddr, env_enetaddr, ARP_HLEN);
} else if (is_valid_ethaddr(pdata->enetaddr)) {
eth_env_set_enetaddr_by_index("eth", dev->seq, pdata->enetaddr);
- printf("\nWarning: %s using MAC address from ROM\n",
- dev->name);
+ debug("%s using MAC address from ROM\n", dev->name);
} else if (is_zero_ethaddr(pdata->enetaddr) ||
!is_valid_ethaddr(pdata->enetaddr)) {
#ifdef CONFIG_NET_RANDOM_ETHADDR
--
2.14.5
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[U-Boot] ARMv8 switching CPUs into EL1
L.S.!
On a Xilinx ZynqMP-based platform with u-boot running in Aarch64 mode in
EL2, after booting a Linux kernel in EL1 using CONFIG_ARMV8_SWITCH_TO_EL1,
Linux throws a warning that the CPUs have started in inconsistent modes
("CPU: CPUs started in inconsistent modes").
Indeed, only the first core on which U-boot was running is switched to EL1
at this point.
Is this a bug or a not completely supported feature in U-boot or can this
warning actually be safely ignored under certain circumstances?
Kind regards,
Mels
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Re: [U-Boot] [PATCH 0/4] nand: davinci: enable driver model for NAND
On Thu, Jun 6, 2019 at 10:50 AM Bartosz Golaszewski wrote: > > From: Bartosz Golaszewski > > This series enables the driver model for NAND on davinci da850 boards. > > The first patch is a simple tweak for an unnecessarily exported function. > > The second patch extends the NAND driver to support both legacy and > driver-model users. For now we don't parse the device-tree as it's a > bit complicated on da850, namely: the nand node is a child of the > aemif node for which we don't have a driver in u-boot (unlike on linux > where the aemif driver populates all its subnodes). In order for the > nand device to be probed, we're adding a dummy node to the u-boot dts > extensions with an appropriate compatible. > > Two last patches enable driver model for NAND on da850-lcdk and da850-evm. > We don't enable the driver model in SPL as first: the patches enabling > CONFIG_SPL_DM are still waiting to be merged, and second: the > nand_spl_simple driver used by davinci SPL doesn't support driver model > users. This is planned for future series once some basic support is > merged. What happens when the board is booting SPL from NAND? Will it still work as expected? I know the da850-evm has at least one configuration which this is intended to boot from NAND instead of the default SPI flash. adam > > Bartosz Golaszewski (4): > nand: davinci: make davinci_nand_init() static > nand: davinci: add support for driver model > davinci: omapl138-lcdk: enable driver model for NAND > davinci: da850-evm: enable driver model for NAND > > arch/arm/dts/da850-evm-u-boot.dtsi| 4 ++ > arch/arm/dts/da850-lcdk-u-boot.dtsi | 4 ++ > arch/arm/include/asm/ti-common/davinci_nand.h | 2 - > configs/da850evm_defconfig| 1 + > configs/da850evm_direct_nor_defconfig | 1 + > configs/da850evm_nand_defconfig | 1 + > configs/omapl138_lcdk_defconfig | 1 + > drivers/mtd/nand/raw/davinci_nand.c | 48 ++- > include/configs/da850evm.h| 4 ++ > include/configs/omapl138_lcdk.h | 4 ++ > 10 files changed, 66 insertions(+), 4 deletions(-) > > -- > 2.21.0 > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 4/4] davinci: da850-evm: enable driver model for NAND
From: Bartosz Golaszewski
Enable the driver-model on da850-evm. We need to add a dummy nand node
to the device tree, as the real nand node is a sub-node of the aemif
device.
On linux the aemif driver populates all its child nodes, but we can't do
it in u-boot currently.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/dts/da850-evm-u-boot.dtsi| 4
configs/da850evm_defconfig| 1 +
configs/da850evm_direct_nor_defconfig | 1 +
configs/da850evm_nand_defconfig | 1 +
include/configs/da850evm.h| 4
5 files changed, 11 insertions(+)
diff --git a/arch/arm/dts/da850-evm-u-boot.dtsi
b/arch/arm/dts/da850-evm-u-boot.dtsi
index 1683f3472e..d9e8b9926a 100644
--- a/arch/arm/dts/da850-evm-u-boot.dtsi
+++ b/arch/arm/dts/da850-evm-u-boot.dtsi
@@ -10,6 +10,10 @@
soc@1c0 {
u-boot,dm-spl;
};
+
+ nand {
+ compatible = "ti,davinci-nand";
+ };
};
{
diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index c095058282..8a891eb8aa 100644
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -52,6 +52,7 @@ CONFIG_DA8XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_DM_MMC=y
+CONFIG_MTD=y
CONFIG_MTD_DEVICE=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
diff --git a/configs/da850evm_direct_nor_defconfig
b/configs/da850evm_direct_nor_defconfig
index 166e77b8e3..85c96f9951 100644
--- a/configs/da850evm_direct_nor_defconfig
+++ b/configs/da850evm_direct_nor_defconfig
@@ -42,6 +42,7 @@ CONFIG_DA8XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DAVINCI=y
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_PROTECTION=y
diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig
index 7271016346..187087768f 100644
--- a/configs/da850evm_nand_defconfig
+++ b/configs/da850evm_nand_defconfig
@@ -49,6 +49,7 @@ CONFIG_DM_GPIO=y
CONFIG_DA8XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
+CONFIG_MTD=y
CONFIG_NAND=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index ccdac0abec..b8556adbb1 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -182,6 +182,10 @@
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_NAND_LOAD
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_SYS_NAND_SELF_INIT
+#endif
#endif
/*
--
2.21.0
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[U-Boot] [PATCH 3/4] davinci: omapl138-lcdk: enable driver model for NAND
From: Bartosz Golaszewski
Enable the driver-model on da850-lcdk. We need to add a dummy nand node
to the device tree, as the real nand node is a sub-node of the aemif
device.
On linux the aemif driver populates all its child nodes, but we can't do
it in u-boot currently.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/dts/da850-lcdk-u-boot.dtsi | 4
configs/omapl138_lcdk_defconfig | 1 +
include/configs/omapl138_lcdk.h | 4
3 files changed, 9 insertions(+)
diff --git a/arch/arm/dts/da850-lcdk-u-boot.dtsi
b/arch/arm/dts/da850-lcdk-u-boot.dtsi
index 80dda8ef58..541f4ca200 100644
--- a/arch/arm/dts/da850-lcdk-u-boot.dtsi
+++ b/arch/arm/dts/da850-lcdk-u-boot.dtsi
@@ -9,4 +9,8 @@
aliases {
i2c0 =
};
+
+ nand {
+ compatible = "ti,davinci-nand";
+ };
};
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index 48f251ebb8..94609f9a34 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -39,6 +39,7 @@ CONFIG_DM_I2C=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_DM_MMC=y
+CONFIG_MTD=y
CONFIG_NAND=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index da615e5063..a4dc060634 100644
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -176,6 +176,10 @@
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_NAND_LOAD
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_SYS_NAND_SELF_INIT
+#endif
#endif
#ifdef CONFIG_SYS_USE_NOR
--
2.21.0
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[U-Boot] [PATCH 0/4] nand: davinci: enable driver model for NAND
From: Bartosz Golaszewski This series enables the driver model for NAND on davinci da850 boards. The first patch is a simple tweak for an unnecessarily exported function. The second patch extends the NAND driver to support both legacy and driver-model users. For now we don't parse the device-tree as it's a bit complicated on da850, namely: the nand node is a child of the aemif node for which we don't have a driver in u-boot (unlike on linux where the aemif driver populates all its subnodes). In order for the nand device to be probed, we're adding a dummy node to the u-boot dts extensions with an appropriate compatible. Two last patches enable driver model for NAND on da850-lcdk and da850-evm. We don't enable the driver model in SPL as first: the patches enabling CONFIG_SPL_DM are still waiting to be merged, and second: the nand_spl_simple driver used by davinci SPL doesn't support driver model users. This is planned for future series once some basic support is merged. Bartosz Golaszewski (4): nand: davinci: make davinci_nand_init() static nand: davinci: add support for driver model davinci: omapl138-lcdk: enable driver model for NAND davinci: da850-evm: enable driver model for NAND arch/arm/dts/da850-evm-u-boot.dtsi| 4 ++ arch/arm/dts/da850-lcdk-u-boot.dtsi | 4 ++ arch/arm/include/asm/ti-common/davinci_nand.h | 2 - configs/da850evm_defconfig| 1 + configs/da850evm_direct_nor_defconfig | 1 + configs/da850evm_nand_defconfig | 1 + configs/omapl138_lcdk_defconfig | 1 + drivers/mtd/nand/raw/davinci_nand.c | 48 ++- include/configs/da850evm.h| 4 ++ include/configs/omapl138_lcdk.h | 4 ++ 10 files changed, 66 insertions(+), 4 deletions(-) -- 2.21.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/4] nand: davinci: make davinci_nand_init() static
From: Bartosz Golaszewski
This function is only used within the driver itself. No need
to export it.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/include/asm/ti-common/davinci_nand.h | 2 --
drivers/mtd/nand/raw/davinci_nand.c | 2 +-
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/ti-common/davinci_nand.h
b/arch/arm/include/asm/ti-common/davinci_nand.h
index e26381c7fd..28842c3b15 100644
--- a/arch/arm/include/asm/ti-common/davinci_nand.h
+++ b/arch/arm/include/asm/ti-common/davinci_nand.h
@@ -95,6 +95,4 @@ struct davinci_emif_regs {
#define DAVINCI_ABCR_ASIZE_16BIT 1
#define DAVINCI_ABCR_ASIZE_8BIT0
-void davinci_nand_init(struct nand_chip *nand);
-
#endif
diff --git a/drivers/mtd/nand/raw/davinci_nand.c
b/drivers/mtd/nand/raw/davinci_nand.c
index cfa9b535c8..e1c4498cb9 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -730,7 +730,7 @@ static int nand_davinci_dev_ready(struct mtd_info *mtd)
return __raw_readl(_emif_regs->nandfsr) & 0x1;
}
-void davinci_nand_init(struct nand_chip *nand)
+static void davinci_nand_init(struct nand_chip *nand)
{
#if defined CONFIG_KEYSTONE_RBL_NAND
int i;
--
2.21.0
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[U-Boot] [PATCH 2/4] nand: davinci: add support for driver model
From: Bartosz Golaszewski
Extend the davinci NAND driver to support the driver model. For now this
doesn't add any device-tree parsing due to the fact that we can't access
the actual nand node on the device-tree - it's a subnode of the aemif
device and we don't have an aemif driver on davinci at the moment.
Signed-off-by: Bartosz Golaszewski
---
drivers/mtd/nand/raw/davinci_nand.c | 46 -
1 file changed, 45 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/davinci_nand.c
b/drivers/mtd/nand/raw/davinci_nand.c
index e1c4498cb9..33c2f16be8 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -31,6 +31,7 @@
#include
#include
#include
+#include
#include
/* Definitions for 4-bit hardware ECC */
@@ -785,10 +786,53 @@ static void davinci_nand_init(struct nand_chip *nand)
nand->dev_ready = nand_davinci_dev_ready;
}
-int board_nand_init(struct nand_chip *chip) __attribute__((weak));
+#ifdef CONFIG_SYS_NAND_SELF_INIT
+static int davinci_nand_probe(struct udevice *dev)
+{
+ struct nand_chip *nand = dev_get_priv(dev);
+ struct mtd_info *mtd = nand_to_mtd(nand);
+ int ret;
+
+ nand->IO_ADDR_R = (void __iomem *)CONFIG_SYS_NAND_BASE;
+ nand->IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE;
+
+ davinci_nand_init(nand);
+
+ ret = nand_scan(mtd, CONFIG_SYS_NAND_MAX_CHIPS);
+ if (ret)
+ return ret;
+
+ return nand_register(0, mtd);
+}
+
+static const struct udevice_id davinci_nand_ids[] = {
+ { .compatible = "ti,davinci-nand" },
+ { }
+};
+
+U_BOOT_DRIVER(davinci_nand) = {
+ .name = "davinci-nand",
+ .id = UCLASS_MTD,
+ .of_match = davinci_nand_ids,
+ .probe = davinci_nand_probe,
+ .priv_auto_alloc_size = sizeof(struct nand_chip),
+};
+
+void board_nand_init(void)
+{
+ struct udevice *dev;
+ int ret;
+ ret = uclass_get_device_by_driver(UCLASS_MTD,
+ DM_GET_DRIVER(davinci_nand), );
+ if (ret && ret != -ENODEV)
+ pr_err("Failed to initialize %s: %d\n", dev->name, ret);
+}
+#else
+int board_nand_init(struct nand_chip *chip) __attribute__((weak));
int board_nand_init(struct nand_chip *chip)
{
davinci_nand_init(chip);
return 0;
}
+#endif /* CONFIG_SYS_NAND_SELF_INIT */
--
2.21.0
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[U-Boot] [PATCH v7 06/15] arm: dts: k3: Add phy specific properties to SD card node
With changes in the driver requiring phy related properties, add the same for the SD card node to prevent breaking boot with the driver update. Signed-off-by: Faiz Abbas Reviewed-by: Tom Rini Tested-by: Lokesh Vutla --- arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 3 +++ arch/arm/dts/k3-am654-r5-base-board.dts | 1 + 2 files changed, 4 insertions(+) diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi index 589a90f9f9..c43888f36d 100644 --- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi +++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi @@ -34,6 +34,8 @@ clocks = <_clks 48 1>; power-domains = <_pds 48>; max-frequency = <2500>; + ti,otap-del-sel = <0x2>; + ti,trm-icp = <0x8>; }; }; @@ -190,4 +192,5 @@ pinctrl-names = "default"; pinctrl-0 = <_mmc1_pins_default>; sdhci-caps-mask = <0x7 0x0>; + ti,driver-strength-ohm = <50>; }; diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts index 1ca4757ca5..8deda328d0 100644 --- a/arch/arm/dts/k3-am654-r5-base-board.dts +++ b/arch/arm/dts/k3-am654-r5-base-board.dts @@ -174,4 +174,5 @@ clock-names = "clk_xin"; clocks = <_200mhz>; /delete-property/ power-domains; + ti,driver-strength-ohm = <50>; }; -- 2.19.2 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v7 07/15] mmc: sdhci: Make set_ios_post() return int
Make set_ios_post() return int to faciliate error handling in
platform drivers.
Signed-off-by: Faiz Abbas
Tested-by: Lokesh Vutla
---
drivers/mmc/sdhci.c | 2 +-
drivers/mmc/xenon_sdhci.c | 4 +++-
include/sdhci.h | 2 +-
3 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 4646dbec9f..75e6567631 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -583,7 +583,7 @@ static int sdhci_set_ios(struct mmc *mmc)
/* If available, call the driver specific "post" set_ios() function */
if (host->ops && host->ops->set_ios_post)
- host->ops->set_ios_post(host);
+ return host->ops->set_ios_post(host);
return 0;
}
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index b576511338..829b75683b 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -326,7 +326,7 @@ static void xenon_mask_cmd_conflict_err(struct sdhci_host
*host)
}
/* Platform specific function for post set_ios configuration */
-static void xenon_sdhci_set_ios_post(struct sdhci_host *host)
+static int xenon_sdhci_set_ios_post(struct sdhci_host *host)
{
struct xenon_sdhci_priv *priv = host->mmc->priv;
uint speed = host->mmc->tran_speed;
@@ -364,6 +364,8 @@ static void xenon_sdhci_set_ios_post(struct sdhci_host
*host)
/* Re-init the PHY */
xenon_mmc_phy_set(host);
+
+ return 0;
}
/* Install a driver specific handler for post set_ios configuration */
diff --git a/include/sdhci.h b/include/sdhci.h
index 820cd16e92..3dcbc14965 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -247,7 +247,7 @@ struct sdhci_ops {
#endif
int (*get_cd)(struct sdhci_host *host);
void(*set_control_reg)(struct sdhci_host *host);
- void(*set_ios_post)(struct sdhci_host *host);
+ int (*set_ios_post)(struct sdhci_host *host);
void(*set_clock)(struct sdhci_host *host, u32 div);
int (*platform_execute_tuning)(struct mmc *host, u8 opcode);
void (*set_delay)(struct sdhci_host *host);
--
2.19.2
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[U-Boot] [PATCH v7 15/15] configs: am65x_evm_a53: Add Support for creating GPT partitions
Add Support for creating GPT partitions in U-boot. Signed-off-by: Faiz Abbas Tested-by: Lokesh Vutla --- configs/am65x_evm_a53_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 5fd9aacd68..43d2ccc5ed 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -30,12 +30,12 @@ CONFIG_SPL_REMOTEPROC=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_REMOTEPROC=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y # CONFIG_ISO_PARTITION is not set -# CONFIG_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board" -- 2.19.2 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v7 12/15] mmc: am654_sdhci: Add a platform specific set_control_reg() callback
Add a platform specific set_control_reg() callback to help switch to
UHS speed modes.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
Tested-by: Lokesh Vutla
---
drivers/mmc/am654_sdhci.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index b9a7924d4e..fe633aa39a 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers/mmc/am654_sdhci.c
@@ -75,6 +75,21 @@ struct am654_sdhci_plat {
bool dll_on;
};
+static void am654_sdhci_set_control_reg(struct sdhci_host *host)
+{
+ struct mmc *mmc = (struct mmc *)host->mmc;
+ u32 reg;
+
+ if (IS_SD(host->mmc) &&
+ mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) {
+ reg = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+ reg |= SDHCI_CTRL_VDD_180;
+ sdhci_writew(host, reg, SDHCI_HOST_CONTROL2);
+ }
+
+ sdhci_set_uhs_timing(host);
+}
+
static int am654_sdhci_set_ios_post(struct sdhci_host *host)
{
struct udevice *dev = host->mmc->dev;
@@ -143,7 +158,8 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host)
}
const struct sdhci_ops am654_sdhci_ops = {
- .set_ios_post = _sdhci_set_ios_post,
+ .set_ios_post = _sdhci_set_ios_post,
+ .set_control_reg= _sdhci_set_control_reg,
};
int am654_sdhci_init(struct am654_sdhci_plat *plat)
--
2.19.2
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[U-Boot] [PATCH v7 08/15] mmc: am654_sdhci: Add Support for PHY
Add support in the driver for handling phy specific registers.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
Tested-by: Lokesh Vutla
---
drivers/mmc/Kconfig | 1 +
drivers/mmc/am654_sdhci.c | 223 +-
2 files changed, 218 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 0062ad1bb9..41e8a270d8 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -458,6 +458,7 @@ config MMC_SDHCI_AM654
depends on ARCH_K3
depends on MMC_SDHCI
depends on DM_MMC && OF_CONTROL && BLK
+ depends on REGMAP
help
Support for Secure Digital Host Controller Interface (SDHCI)
controllers present on TI's AM654 SOCs.
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index a8c92277f7..cd7ad03479 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers/mmc/am654_sdhci.c
@@ -10,16 +10,184 @@
#include
#include
#include
+#include
#include
+/* CTL_CFG Registers */
+#define CTL_CFG_2 0x14
+
+#define SLOTTYPE_MASK GENMASK(31, 30)
+#define SLOTTYPE_EMBEDDED BIT(30)
+
+/* PHY Registers */
+#define PHY_CTRL1 0x100
+#define PHY_CTRL2 0x104
+#define PHY_CTRL3 0x108
+#define PHY_CTRL4 0x10C
+#define PHY_CTRL5 0x110
+#define PHY_CTRL6 0x114
+#define PHY_STAT1 0x130
+#define PHY_STAT2 0x134
+
+#define IOMUX_ENABLE_SHIFT 31
+#define IOMUX_ENABLE_MASK BIT(IOMUX_ENABLE_SHIFT)
+#define OTAPDLYENA_SHIFT 20
+#define OTAPDLYENA_MASKBIT(OTAPDLYENA_SHIFT)
+#define OTAPDLYSEL_SHIFT 12
+#define OTAPDLYSEL_MASKGENMASK(15, 12)
+#define STRBSEL_SHIFT 24
+#define STRBSEL_MASK GENMASK(27, 24)
+#define SEL50_SHIFT8
+#define SEL50_MASK BIT(SEL50_SHIFT)
+#define SEL100_SHIFT 9
+#define SEL100_MASKBIT(SEL100_SHIFT)
+#define DLL_TRIM_ICP_SHIFT 4
+#define DLL_TRIM_ICP_MASK GENMASK(7, 4)
+#define DR_TY_SHIFT20
+#define DR_TY_MASK GENMASK(22, 20)
+#define ENDLL_SHIFT1
+#define ENDLL_MASK BIT(ENDLL_SHIFT)
+#define DLLRDY_SHIFT 0
+#define DLLRDY_MASKBIT(DLLRDY_SHIFT)
+#define PDB_SHIFT 0
+#define PDB_MASK BIT(PDB_SHIFT)
+#define CALDONE_SHIFT 1
+#define CALDONE_MASK BIT(CALDONE_SHIFT)
+#define RETRIM_SHIFT 17
+#define RETRIM_MASKBIT(RETRIM_SHIFT)
+
+#define DRIVER_STRENGTH_50_OHM 0x0
+#define DRIVER_STRENGTH_33_OHM 0x1
+#define DRIVER_STRENGTH_66_OHM 0x2
+#define DRIVER_STRENGTH_100_OHM0x3
+#define DRIVER_STRENGTH_40_OHM 0x4
+
#define AM654_SDHCI_MIN_FREQ 40
struct am654_sdhci_plat {
struct mmc_config cfg;
struct mmc mmc;
unsigned int f_max;
+ struct regmap *base;
+ bool non_removable;
+ u32 otap_del_sel;
+ u32 trm_icp;
+ u32 drv_strength;
+ bool dll_on;
+};
+
+static int am654_sdhci_set_ios_post(struct sdhci_host *host)
+{
+ struct udevice *dev = host->mmc->dev;
+ struct am654_sdhci_plat *plat = dev_get_platdata(dev);
+ unsigned int speed = host->mmc->clock;
+ int sel50, sel100;
+ u32 mask, val;
+ int ret;
+
+ /* Reset SD Clock Enable */
+ val = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+ val &= ~SDHCI_CLOCK_CARD_EN;
+ sdhci_writew(host, val, SDHCI_CLOCK_CONTROL);
+
+ /* power off phy */
+ if (plat->dll_on) {
+ regmap_update_bits(plat->base, PHY_CTRL1, ENDLL_MASK, 0);
+
+ plat->dll_on = false;
+ }
+
+ /* restart clock */
+ sdhci_set_clock(host->mmc, speed);
+
+ /* switch phy back on */
+ if (speed > AM654_SDHCI_MIN_FREQ) {
+ mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
+ val = (1 << OTAPDLYENA_SHIFT) |
+ (plat->otap_del_sel << OTAPDLYSEL_SHIFT);
+ regmap_update_bits(plat->base, PHY_CTRL4, mask, val);
+ switch (speed) {
+ case 2:
+ sel50 = 0;
+ sel100 = 0;
+ break;
+ case 1:
+ sel50 = 0;
+ sel100 = 1;
+ break;
+ default:
+ sel50 = 1;
+ sel100 = 0;
+ }
+
+ /* Configure PHY DLL frequency */
+ mask = SEL50_MASK | SEL100_MASK;
+ val = (sel50 << SEL50_SHIFT) | (sel100 << SEL100_SHIFT);
+ regmap_update_bits(plat->base, PHY_CTRL5, mask, val);
+
+ /* Enable DLL */
+ regmap_update_bits(plat->base, PHY_CTRL1, ENDLL_MASK,
+ 0x1 << ENDLL_SHIFT);
+ /*
+* Poll for DLL ready. Use a one second timeout.
+* Works
[U-Boot] [PATCH v7 09/15] configs: am65x_evm: Enable CONFIG_REGMAP
Add Support for CONFIG_REGMAP. Signed-off-by: Faiz Abbas Reviewed-by: Tom Rini Tested-by: Lokesh Vutla --- configs/am65x_evm_a53_defconfig | 2 ++ configs/am65x_evm_r5_defconfig | 2 ++ 2 files changed, 4 insertions(+) diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index ff41d66e4d..3f6cf7e6b3 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -47,6 +47,8 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_CLK_TI_SCI=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index 6d7ba4d77c..6a261c20ac 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -51,6 +51,8 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y -- 2.19.2 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v7 10/15] mmc: am654_sdhci: Use f_max in mmc_config
Use f_max provided in mmc_config and remove it from the platform
specific data.
Signed-off-by: Faiz Abbas
Tested-by: Lokesh Vutla
---
drivers/mmc/am654_sdhci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index cd7ad03479..b9a7924d4e 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers/mmc/am654_sdhci.c
@@ -67,7 +67,6 @@
struct am654_sdhci_plat {
struct mmc_config cfg;
struct mmc mmc;
- unsigned int f_max;
struct regmap *base;
bool non_removable;
u32 otap_del_sel;
@@ -193,6 +192,7 @@ static int am654_sdhci_probe(struct udevice *dev)
struct am654_sdhci_plat *plat = dev_get_platdata(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct sdhci_host *host = dev_get_priv(dev);
+ struct mmc_config *cfg = >cfg;
struct power_domain sdhci_pwrdmn;
struct clk clk;
unsigned long clock;
--
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[U-Boot] [PATCH v7 13/15] configs: am65x: Add configs to support environment in eMMC
Add configs such that U-boot environment is in eMMC by default. Signed-off-by: Faiz Abbas Tested-by: Lokesh Vutla --- configs/am65x_evm_a53_defconfig | 5 ++--- include/configs/am65x_evm.h | 10 ++ 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 3f6cf7e6b3..5fd9aacd68 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -41,9 +41,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board" CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y -CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_FAT_INTERFACE="mmc" -CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" +CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y @@ -76,3 +74,4 @@ CONFIG_SOC_TI=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_TI_SCI=y +CONFIG_FAT_WRITE=y diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index b043bf886b..e9e9d4a9dc 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -68,6 +68,16 @@ EXTRA_ENV_AM65X_BOARD_SETTINGS \ EXTRA_ENV_AM65X_BOARD_SETTINGS_MMC +/* MMC ENV related defines */ +#ifdef CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART1 +#define CONFIG_ENV_SIZE(128 << 10) +#define CONFIG_ENV_OFFSET 0x68 +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#endif + /* Now for the remaining common defines */ #include -- 2.19.2 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v7 14/15] am65x_evm: Add Support for creating a filesystem GPT partition in eMMC
Add Support for creating a GPT partition for the filesystem in eMMC.
The filesystem is created in the user partition (partition 0).
Signed-off-by: Faiz Abbas
Tested-by: Lokesh Vutla
---
include/configs/am65x_evm.h | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h
index e9e9d4a9dc..51abab3943 100644
--- a/include/configs/am65x_evm.h
+++ b/include/configs/am65x_evm.h
@@ -34,6 +34,10 @@
#define CONFIG_SYS_BOOTM_LEN SZ_64M
+#define PARTS_DEFAULT \
+ /* Linux partitions */ \
+ "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
+
/* U-Boot general configuration */
#define EXTRA_ENV_AM65X_BOARD_SETTINGS \
"findfdt=" \
@@ -48,7 +52,7 @@
"name_kern=Image\0" \
"console=ttyS2,115200n8\0" \
"args_all=setenv optargs earlycon=ns16550a,mmio32,0x0280\0" \
- "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
+ "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"\
/* U-Boot MMC-specific configuration */
#define EXTRA_ENV_AM65X_BOARD_SETTINGS_MMC \
@@ -60,7 +64,8 @@
"init_mmc=run args_all args_mmc\0" \
"get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
"get_kern_mmc=load mmc ${bootpart} ${loadaddr} "\
- "${bootdir}/${name_kern}\0"
+ "${bootdir}/${name_kern}\0" \
+ "partitions=" PARTS_DEFAULT
/* Incorporate settings into the U-Boot environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
--
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[U-Boot] [PATCH v7 04/15] mmc: sdhci: Add support for sdhci-caps-mask
Add Support for masking some bits in the capabilities
register of a host controller.
Also remove the redundant readl() into caps1.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
Tested-by: Lokesh Vutla
---
drivers/mmc/sdhci.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index e2bb90abbd..fa6bb0a944 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -8,6 +8,7 @@
*/
#include
+#include
#include
#include
#include
@@ -643,8 +644,15 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct
sdhci_host *host,
u32 f_max, u32 f_min)
{
u32 caps, caps_1 = 0;
+ u32 mask[2] = {0};
+ int ret;
+
+ ret = dev_read_u32_array(host->mmc->dev, "sdhci-caps-mask",
+mask, 2);
+ if (ret && ret != -1)
+ return ret;
- caps = sdhci_readl(host, SDHCI_CAPABILITIES);
+ caps = ~mask[1] & sdhci_readl(host, SDHCI_CAPABILITIES);
#ifdef CONFIG_MMC_SDHCI_SDMA
if (!(caps & SDHCI_CAN_DO_SDMA)) {
@@ -684,7 +692,7 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct
sdhci_host *host,
/* Check whether the clock multiplier is supported or not */
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
- caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
+ caps_1 = ~mask[0] & sdhci_readl(host, SDHCI_CAPABILITIES_1);
host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
SDHCI_CLOCK_MUL_SHIFT;
}
@@ -741,9 +749,6 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct
sdhci_host *host,
cfg->host_caps &= ~MMC_MODE_HS_52MHz;
}
- if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
- caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
-
if (!(cfg->voltages & MMC_VDD_165_195) ||
(host->quirks & SDHCI_QUIRK_NO_1_8_V))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
--
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[U-Boot] [PATCH v7 11/15] mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings
The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.
Also create a common API to set UHS timings in HOST_CONTROL2.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
Tested-by: Lokesh Vutla
---
drivers/mmc/sdhci.c | 28
drivers/mmc/zynq_sdhci.c | 31 ++-
include/sdhci.h | 19 ++-
3 files changed, 48 insertions(+), 30 deletions(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 75e6567631..79edb18fe5 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -533,6 +533,34 @@ static void sdhci_set_power(struct sdhci_host *host,
unsigned short power)
sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
}
+void sdhci_set_uhs_timing(struct sdhci_host *host)
+{
+ struct mmc *mmc = (struct mmc *)host->mmc;
+ u32 reg;
+
+ reg = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+ reg &= ~SDHCI_CTRL_UHS_MASK;
+
+ switch (mmc->selected_mode) {
+ case UHS_SDR50:
+ case MMC_HS_52:
+ reg |= SDHCI_CTRL_UHS_SDR50;
+ break;
+ case UHS_DDR50:
+ case MMC_DDR_52:
+ reg |= SDHCI_CTRL_UHS_DDR50;
+ break;
+ case UHS_SDR104:
+ case MMC_HS_200:
+ reg |= SDHCI_CTRL_UHS_SDR104;
+ break;
+ default:
+ reg |= SDHCI_CTRL_UHS_SDR12;
+ }
+
+ sdhci_writew(host, reg, SDHCI_HOST_CONTROL2);
+}
+
#ifdef CONFIG_DM_MMC
static int sdhci_set_ios(struct udevice *dev)
{
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 08023783de..b39e1d7a19 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -48,11 +48,6 @@ static const u8 mode2timing[] = {
[MMC_HS_200] = MMC_HS200_BUS_SPEED,
};
-#define SDHCI_HOST_CTRL2 0x3E
-#define SDHCI_CTRL2_MODE_MASK 0x7
-#define SDHCI_18V_SIGNAL 0x8
-#define SDHCI_CTRL_EXEC_TUNING 0x0040
-#define SDHCI_CTRL_TUNED_CLK 0x80
#define SDHCI_TUNING_LOOP_COUNT40
static void arasan_zynqmp_dll_reset(struct sdhci_host *host, u8 deviceid)
@@ -190,30 +185,8 @@ static void arasan_sdhci_set_control_reg(struct sdhci_host
*host)
}
if (mmc->selected_mode > SD_HS &&
- mmc->selected_mode <= UHS_DDR50) {
- reg = sdhci_readw(host, SDHCI_HOST_CTRL2);
- reg &= ~SDHCI_CTRL2_MODE_MASK;
- switch (mmc->selected_mode) {
- case UHS_SDR12:
- reg |= UHS_SDR12_BUS_SPEED;
- break;
- case UHS_SDR25:
- reg |= UHS_SDR25_BUS_SPEED;
- break;
- case UHS_SDR50:
- reg |= UHS_SDR50_BUS_SPEED;
- break;
- case UHS_SDR104:
- reg |= UHS_SDR104_BUS_SPEED;
- break;
- case UHS_DDR50:
- reg |= UHS_DDR50_BUS_SPEED;
- break;
- default:
- break;
- }
- sdhci_writew(host, reg, SDHCI_HOST_CTRL2);
- }
+ mmc->selected_mode <= UHS_DDR50)
+ sdhci_set_uhs_timing(host);
}
#endif
diff --git a/include/sdhci.h b/include/sdhci.h
index 3dcbc14965..01addb7a60 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -144,7 +144,23 @@
#define SDHCI_ACMD12_ERR 0x3C
-/* 3E-3F reserved */
+#define SDHCI_HOST_CONTROL20x3E
+#define SDHCI_CTRL_UHS_MASK 0x0007
+#define SDHCI_CTRL_UHS_SDR12 0x
+#define SDHCI_CTRL_UHS_SDR25 0x0001
+#define SDHCI_CTRL_UHS_SDR50 0x0002
+#define SDHCI_CTRL_UHS_SDR104 0x0003
+#define SDHCI_CTRL_UHS_DDR50 0x0004
+#define SDHCI_CTRL_HS400 0x0005 /* Non-standard */
+#define SDHCI_CTRL_VDD_1800x0008
+#define SDHCI_CTRL_DRV_TYPE_MASK 0x0030
+#define SDHCI_CTRL_DRV_TYPE_B 0x
+#define SDHCI_CTRL_DRV_TYPE_A 0x0010
+#define SDHCI_CTRL_DRV_TYPE_C 0x0020
+#define SDHCI_CTRL_DRV_TYPE_D 0x0030
+#define SDHCI_CTRL_EXEC_TUNING0x0040
+#define SDHCI_CTRL_TUNED_CLK 0x0080
+#define SDHCI_CTRL_PRESET_VAL_ENABLE 0x8000
#define SDHCI_CAPABILITIES 0x40
#define SDHCI_TIMEOUT_CLK_MASK0x003F
@@ -467,6 +483,7 @@ int sdhci_bind(struct udevice *dev, struct mmc *mmc, struct
mmc_config *cfg);
int add_sdhci(struct sdhci_host *host, u32 f_max, u32 f_min);
#endif /* !CONFIG_BLK */
+void sdhci_set_uhs_timing(struct sdhci_host *host);
#ifdef CONFIG_DM_MMC
/* Export the operations to drivers */
int sdhci_probe(struct udevice *dev);
--
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[U-Boot] [PATCH v7 03/15] regmap: Add API regmap_init_mem_index()
In device nodes with more than one entry in the reg property,
it is sometimes useful to regmap only of the entries. Add an
API regmap_init_mem_index() to facilitate this.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
Tested-by: Lokesh Vutla
---
drivers/core/regmap.c | 42 ++
include/regmap.h | 2 ++
2 files changed, 44 insertions(+)
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 5ef0f71c8b..d1d12eef38 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -108,6 +108,48 @@ static int init_range(ofnode node, struct regmap_range
*range, int addr_len,
return 0;
}
+int regmap_init_mem_index(ofnode node, struct regmap **mapp, int index)
+{
+ struct regmap *map;
+ int addr_len, size_len;
+ int ret;
+
+ addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node));
+ if (addr_len < 0) {
+ debug("%s: Error while reading the addr length (ret = %d)\n",
+ ofnode_get_name(node), addr_len);
+ return addr_len;
+ }
+
+ size_len = ofnode_read_simple_size_cells(ofnode_get_parent(node));
+ if (size_len < 0) {
+ debug("%s: Error while reading the size length: (ret = %d)\n",
+ ofnode_get_name(node), size_len);
+ return size_len;
+ }
+
+ map = regmap_alloc(1);
+ if (!map)
+ return -ENOMEM;
+
+ ret = init_range(node, map->ranges, addr_len, size_len, index);
+ if (ret)
+ return ret;
+
+ if (ofnode_read_bool(node, "little-endian"))
+ map->endianness = REGMAP_LITTLE_ENDIAN;
+ else if (ofnode_read_bool(node, "big-endian"))
+ map->endianness = REGMAP_BIG_ENDIAN;
+ else if (ofnode_read_bool(node, "native-endian"))
+ map->endianness = REGMAP_NATIVE_ENDIAN;
+ else /* Default: native endianness */
+ map->endianness = REGMAP_NATIVE_ENDIAN;
+
+ *mapp = map;
+
+ return ret;
+}
+
int regmap_init_mem(ofnode node, struct regmap **mapp)
{
struct regmap_range *range;
diff --git a/include/regmap.h b/include/regmap.h
index 3cd7a66cea..0854200a9c 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -330,6 +330,8 @@ int regmap_init_mem(ofnode node, struct regmap **mapp);
int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,
struct regmap **mapp);
+int regmap_init_mem_index(ofnode node, struct regmap **mapp, int index);
+
/**
* regmap_get_range() - Obtain the base memory address of a regmap range
*
--
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[U-Boot] [PATCH v7 05/15] mmc: sdhci: Make sdhci_set_clock() non static
The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.
Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
Tested-by: Lokesh Vutla
---
drivers/mmc/sdhci.c | 2 +-
include/sdhci.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index fa6bb0a944..4646dbec9f 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -409,7 +409,7 @@ static int sdhci_execute_tuning(struct udevice *dev, uint
opcode)
return 0;
}
#endif
-static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
+int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
{
struct sdhci_host *host = mmc->priv;
unsigned int div, clk = 0, timeout;
diff --git a/include/sdhci.h b/include/sdhci.h
index eee493ab5f..820cd16e92 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -470,6 +470,7 @@ int add_sdhci(struct sdhci_host *host, u32 f_max, u32
f_min);
#ifdef CONFIG_DM_MMC
/* Export the operations to drivers */
int sdhci_probe(struct udevice *dev);
+int sdhci_set_clock(struct mmc *mmc, unsigned int clock);
extern const struct dm_mmc_ops sdhci_ops;
#else
#endif
--
2.19.2
___
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U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v7 02/15] mmc: am654_sdhci: Remove quirks
The host controller works perfectly well without having to add any quirks. Remove them. Signed-off-by: Faiz Abbas Reviewed-by: Tom Rini Tested-by: Lokesh Vutla --- drivers/mmc/am654_sdhci.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c index 2d08fe3347..a8c92277f7 100644 --- a/drivers/mmc/am654_sdhci.c +++ b/drivers/mmc/am654_sdhci.c @@ -54,9 +54,6 @@ static int am654_sdhci_probe(struct udevice *dev) return clock; } - host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | - SDHCI_QUIRK_BROKEN_R1B; - host->max_clk = clock; ret = sdhci_setup_cfg(>cfg, host, plat->f_max, -- 2.19.2 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v7 01/15] arm64: dts: k3: Sync sdhci0 node from kernel and change driver name
Sync the sdhci0 node from kernel. This changes the compatible that is
required to be there in the driver. Change the same for the SD card node
which is not yet supported in kernel. This also syncs the main_pmx0 node
as a side effect.
Also change the name of the driver to match the compatible in kernel.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
Tested-by: Lokesh Vutla
---
arch/arm/dts/k3-am65-main.dtsi| 22 +++
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 27 ++---
arch/arm/dts/k3-am654-base-board.dts | 28 ++
arch/arm/dts/k3-am654-r5-base-board.dts | 38 +++
configs/am65x_evm_a53_defconfig | 2 +-
configs/am65x_evm_r5_defconfig| 2 +-
drivers/mmc/Kconfig | 8 ++--
drivers/mmc/Makefile | 2 +-
.../mmc/{k3_arsan_sdhci.c => am654_sdhci.c} | 36 +-
9 files changed, 116 insertions(+), 49 deletions(-)
rename drivers/mmc/{k3_arsan_sdhci.c => am654_sdhci.c} (67%)
diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi
index adcd6341e4..84fed12fbd 100644
--- a/arch/arm/dts/k3-am65-main.dtsi
+++ b/arch/arm/dts/k3-am65-main.dtsi
@@ -69,4 +69,26 @@
clock-frequency = <4800>;
current-speed = <115200>;
};
+
+ main_pmx0: pinmux@11c000 {
+ compatible = "pinctrl-single";
+ reg = <0x0 0x11c000 0x0 0x2e4>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x>;
+ };
+
+ sdhci0: sdhci@4f8 {
+ compatible = "ti,am654-sdhci-5.1";
+ reg = <0x0 0x4f8 0x0 0x260>, <0x0 0x4f9 0x0 0x134>;
+ power-domains = <_pds 47>;
+ clocks = <_clks 47 0>, <_clks 47 1>;
+ clock-names = "clk_ahb", "clk_xin";
+ interrupts = ;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ ti,otap-del-sel = <0x2>;
+ ti,trm-icp = <0x8>;
+ dma-coherent;
+ };
};
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index f5c8253831..589a90f9f9 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -19,14 +19,6 @@
_main{
u-boot,dm-spl;
- main_pmx0: pinmux@11c000 {
- compatible = "pinctrl-single";
- reg = <0x0 0x11c000 0x0 0x2e4>;
- #pinctrl-cells = <1>;
- pinctrl-single,register-width = <32>;
- pinctrl-single,function-mask = <0x>;
- };
-
main_pmx1: pinmux@11c2e8 {
compatible = "pinctrl-single";
reg = <0x0 0x11c2e8 0x0 0x24>;
@@ -35,17 +27,8 @@
pinctrl-single,function-mask = <0x>;
};
- sdhci0: sdhci@04F8 {
- compatible = "arasan,sdhci-5.1";
- reg = <0x0 0x4F8 0x0 0x1000>,
- <0x0 0x4F9 0x0 0x400>;
- clocks = <_clks 47 1>;
- power-domains = <_pds 47>;
- max-frequency = <2500>;
- };
-
sdhci1: sdhci@04FA {
- compatible = "arasan,sdhci-5.1";
+ compatible = "ti,am654-sdhci-5.1";
reg = <0x0 0x4FA 0x0 0x1000>,
<0x0 0x4FB 0x0 0x400>;
clocks = <_clks 48 1>;
@@ -164,7 +147,8 @@
AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0)/*
(A24) MMC0_DAT5 */
AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0)/*
(B26) MMC0_DAT6 */
AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0)/*
(D25) MMC0_DAT7 */
- AM65X_IOPAD(0x01b0, PIN_INPUT, 0)
/* (C25) MMC0_DS */
+ AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0)/*
(A23) MMC0_SDCD */
+ AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /*
(C25) MMC0_DS */
>;
u-boot,dm-spl;
};
@@ -198,11 +182,6 @@
{
u-boot,dm-spl;
- status = "okay";
- non-removable;
- bus-width = <8>;
- pinctrl-names = "default";
- pinctrl-0 = <_mmc0_pins_default>;
};
{
diff --git a/arch/arm/dts/k3-am654-base-board.dts
b/arch/arm/dts/k3-am654-base-board.dts
index af6956fdc1..ab233916c6 100644
--- a/arch/arm/dts/k3-am654-base-board.dts
+++ b/arch/arm/dts/k3-am654-base-board.dts
@@ -6,6 +6,7 @@
/dts-v1/;
#include "k3-am654.dtsi"
+#include
/ {
compatible = "ti,am654-evm", "ti,am654";
@@ -34,3 +35,30 @@
};
};
};
+
+_pmx0 {
+ main_mmc0_pins_default: main_mmc0_pins_default {
+ pinctrl-single,pins = <
+ AM65X_IOPAD(0x01a8,
[U-Boot] [PATCH v7 00/15] Add Support for eMMC in Am65x-evm
Add Support for eMMC in TI's AM65x-evm. The series starts by syncing the sdhci0 node from the kernel. Then it adds APIs and changes to the driver required for handling the driver's integrated phy. The current maximum supported speed is DDR52. Higher speeds and tuning support will be added in a subsequent series. Tested with Andreas's latest series[1] on top. Can be applied independently of that series though. Changes in v7: Fixed a device tree entry in patch 1 and tested eMMC boot as well with Andreas's latest series[1]. Changes in v6: 1. Squashed one more dependency for clk_200mhz from Andreas's patches[1] into patch 1. Patches now build without any help from the other series. 2. Improved line wrapping in patch 8. Changes in v5: Patches were tested with Andreas's system firmware patches[1] but can now be independently merged cleanly on latest U-boot. Changes in v4: 1. Dropped the patch including regmap_read_poll_timeout() because that support was already added by someone else 2. Fixed a NULL pointer exception in patch 8. 3. Rebased on top of latest master 4. Added extra patches to support GPT partitions in user partition 5. Added Support for environment in eMMC by default Changes in v3: Patch 9: Got rid of variable ret Changes in v2: Patch 9: Fixed return value Patch 12: Fixed spacing [1] https://patchwork.ozlabs.org/project/uboot/list/?series=111844 Faiz Abbas (15): arm64: dts: k3: Sync sdhci0 node from kernel and change driver name mmc: am654_sdhci: Remove quirks regmap: Add API regmap_init_mem_index() mmc: sdhci: Add support for sdhci-caps-mask mmc: sdhci: Make sdhci_set_clock() non static arm: dts: k3: Add phy specific properties to SD card node mmc: sdhci: Make set_ios_post() return int mmc: am654_sdhci: Add Support for PHY configs: am65x_evm: Enable CONFIG_REGMAP mmc: am654_sdhci: Use f_max in mmc_config mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings mmc: am654_sdhci: Add a platform specific set_control_reg() callback configs: am65x: Add configs to support environment in eMMC am65x_evm: Add Support for creating a filesystem GPT partition in eMMC configs: am65x_evm_a53: Add Support for creating GPT partitions arch/arm/dts/k3-am65-main.dtsi | 22 ++ arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 30 +- arch/arm/dts/k3-am654-base-board.dts | 28 ++ arch/arm/dts/k3-am654-r5-base-board.dts | 39 +++ configs/am65x_evm_a53_defconfig | 11 +- configs/am65x_evm_r5_defconfig | 4 +- drivers/core/regmap.c| 42 +++ drivers/mmc/Kconfig | 9 +- drivers/mmc/Makefile | 2 +- drivers/mmc/am654_sdhci.c| 333 +++ drivers/mmc/k3_arsan_sdhci.c | 109 -- drivers/mmc/sdhci.c | 47 ++- drivers/mmc/xenon_sdhci.c| 4 +- drivers/mmc/zynq_sdhci.c | 31 +- include/configs/am65x_evm.h | 19 +- include/regmap.h | 2 + include/sdhci.h | 22 +- 17 files changed, 569 insertions(+), 185 deletions(-) create mode 100644 drivers/mmc/am654_sdhci.c delete mode 100644 drivers/mmc/k3_arsan_sdhci.c -- 2.19.2 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 00/15] Add Support for eMMC in Am65x-evm
Hi, On 05/06/19 9:16 AM, Lokesh Vutla wrote: > > > On 04/06/19 11:57 PM, Andreas Dannenberg wrote: >> On Tue, Jun 04, 2019 at 09:32:21PM +0530, Lokesh Vutla wrote: >>> >>> >>> On 04/06/19 6:46 PM, Faiz Abbas wrote: Add Support for eMMC in TI's AM65x-evm. The series starts by syncing the sdhci0 node from the kernel. Then it adds APIs and changes to the driver required for handling the driver's integrated phy. The current maximum supported speed is DDR52. Higher speeds and tuning support will be added in a subsequent series. Changes in v6: 1. Squashed one more dependency for clk_200mhz from Andreas's patches[1] into patch 1. Patches now build without any help from the other series. 2. Improved line wrapping in patch 8. >>> >>> Thanks for the quick update. For the entire series: >>> >>> Tested-by: Lokesh Vutla >> >> Seems like the test coverage was limited. >> >> While eMMC (sdhci0) works when booting from SD card (sdhci1) the eMMC >> probe fails when booting from eMMC itself defeating the main purpose of >> a series adding eMMC support. > > Series talks about the eMMC support and not the eMMC boot support. So I did > verify what is claimed. Anyways it is a valid bug you pointed out. > > Faiz, > Can you please re post with the fix incorporated. > Sending one more version. Thanks, Faiz ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2] armv8: ls1046afrwy: Add support for LS1046AFRWY platform
LS1046AFRWY board supports LS1046A family SoCs. This patch
add base support for this board.
Board support's 4GB ddr memory, i2c, micro-click module,microSD card,
serial console,qspi nor flash,ifc nand flash,qsgmii network interface,
usb 3.0 and serdes interface to support two x1gen3 pcie interface.
Signed-off-by: Camelia Groza
Signed-off-by: Madalin Bucur
Signed-off-by: Pankit Garg
Signed-off-by: Pramod Kumar
Signed-off-by: Rajesh Bhagat
Signed-off-by: Vabhav Sharma
---
Changes in v2:
- Incorporated review comments from Prabhakar Kushwaha
- Removed non tfa boot support changes
- Removed PMIC and DEEP sleep config
- Unset CONFIG_SPI_FLASH_BAR in defconfig
- Updated mtd-id for QSPI nor in mtdparts variable
arch/arm/Kconfig | 15 ++
arch/arm/cpu/armv8/Kconfig | 1 +
arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c | 2 +
arch/arm/dts/Makefile | 1 +
arch/arm/dts/fsl-ls1046a-frwy.dts | 34
board/freescale/ls1046afrwy/Kconfig| 17 ++
board/freescale/ls1046afrwy/MAINTAINERS| 7 +
board/freescale/ls1046afrwy/Makefile | 7 +
board/freescale/ls1046afrwy/README | 76 +++
board/freescale/ls1046afrwy/ddr.c | 19 ++
board/freescale/ls1046afrwy/eth.c | 114 +++
board/freescale/ls1046afrwy/ls1046afrwy.c | 223 +
configs/ls1046afrwy_tfa_defconfig | 59 ++
include/configs/ls1046a_common.h | 13 +-
include/configs/ls1046afrwy.h | 136 +
include/fm_eth.h | 12 ++
16 files changed, 734 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/dts/fsl-ls1046a-frwy.dts
create mode 100644 board/freescale/ls1046afrwy/Kconfig
create mode 100644 board/freescale/ls1046afrwy/MAINTAINERS
create mode 100644 board/freescale/ls1046afrwy/Makefile
create mode 100644 board/freescale/ls1046afrwy/README
create mode 100644 board/freescale/ls1046afrwy/ddr.c
create mode 100644 board/freescale/ls1046afrwy/eth.c
create mode 100644 board/freescale/ls1046afrwy/ls1046afrwy.c
create mode 100644 configs/ls1046afrwy_tfa_defconfig
create mode 100644 include/configs/ls1046afrwy.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 01ff57c..d9ad32c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1406,6 +1406,20 @@ config TARGET_LS1046ARDB
development platform that supports the QorIQ LS1046A
Layerscape Architecture processor.
+config TARGET_LS1046AFRWY
+ bool "Support ls1046afrwy"
+ select ARCH_LS1046A
+ select ARM64
+ select ARMV8_MULTIENTRY
+ select BOARD_EARLY_INIT_F
+ select BOARD_LATE_INIT
+ select DM_SPI_FLASH if DM_SPI
+ imply SCSI
+ help
+ Support for Freescale LS1046AFRWY platform.
+ The LS1046A Freeway Board (FRWY) is a high-performance
+ development platform that supports the QorIQ LS1046A
+ Layerscape Architecture processor.
config TARGET_H2200
bool "Support h2200"
select CPU_PXA
@@ -1697,6 +1711,7 @@ source "board/freescale/ls1021aiot/Kconfig"
source "board/freescale/ls1046aqds/Kconfig"
source "board/freescale/ls1043ardb/Kconfig"
source "board/freescale/ls1046ardb/Kconfig"
+source "board/freescale/ls1046afrwy/Kconfig"
source "board/freescale/ls1012aqds/Kconfig"
source "board/freescale/ls1012ardb/Kconfig"
source "board/freescale/ls1012afrdm/Kconfig"
diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
index 8a97d5b..92a2b58 100644
--- a/arch/arm/cpu/armv8/Kconfig
+++ b/arch/arm/cpu/armv8/Kconfig
@@ -107,6 +107,7 @@ config PSCI_RESET
!TARGET_LS1028ARDB && !TARGET_LS1028AQDS && \
!TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \
!TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \
+ !TARGET_LS1046AFRWY && \
!TARGET_LS2081ARDB && !TARGET_LX2160ARDB && \
!TARGET_LX2160AQDS && \
!ARCH_UNIPHIER && !TARGET_S32V234EVB
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
index f8310f2..caa4862 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2016 Freescale Semiconductor, Inc.
+ * Copyright 2019 NXP
*/
#include
@@ -33,6 +34,7 @@ static struct serdes_config serdes1_cfg_tbl[] = {
SGMII_FM1_DTSEC6} },
{0x2223, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10,
SGMII_2500_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
+ {0x3040, {NONE, NONE, QSGMII_FM1_A, NONE} },
{}
};
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index
[U-Boot] [PATCH v5 5/5] configs: am65x_evm_a53: enable networking
From: Grygorii Strashko Enable TI K3 AM65x CPSW NUSS driver. Signed-off-by: Grygorii Strashko Signed-off-by: Keerthy Reviewed-by: Tom Rini --- configs/am65x_evm_a53_defconfig | 7 +++ 1 file changed, 7 insertions(+) diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 41cf0100fa..5d33b127b1 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y @@ -58,6 +59,11 @@ CONFIG_K3_SEC_PROXY=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_K3_ARASAN=y +CONFIG_PHY_TI=y +CONFIG_PHY_FIXED=y +CONFIG_DM_ETH=y +CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_PHY=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_GENERIC is not set CONFIG_SPL_PINCTRL=y @@ -74,3 +80,4 @@ CONFIG_SOC_TI=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_TI_SCI=y +CONFIG_HEXDUMP=y -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v5 3/5] arm64: dts: ti: k3-am65: add mcu cpsw node
From: Grygorii Strashko
Add mcu cpsw and its components along with scm_conf node
to have ethernet functional.
Signed-off-by: Grygorii Strashko
Signed-off-by: Keerthy
Reviewed-by: Tom Rini
---
arch/arm/dts/k3-am65.dtsi| 2 +
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 111 +++
2 files changed, 113 insertions(+)
diff --git a/arch/arm/dts/k3-am65.dtsi b/arch/arm/dts/k3-am65.dtsi
index 3d4bf369d0..9d1ed49753 100644
--- a/arch/arm/dts/k3-am65.dtsi
+++ b/arch/arm/dts/k3-am65.dtsi
@@ -64,6 +64,7 @@
/* MCUSS Range */
<0x00 0x2838 0x00 0x2838 0x00 0x0388>,
<0x00 0x4020 0x00 0x4020 0x00 0x00900100>,
+<0x00 0x40f0 0x00 0x40f0 0x00 0x0002>,
<0x00 0x4204 0x00 0x4204 0x00 0x03ac2400>,
<0x00 0x4510 0x00 0x4510 0x00 0x00c24000>,
<0x00 0x4600 0x00 0x4600 0x00 0x0020>,
@@ -75,6 +76,7 @@
#size-cells = <2>;
ranges = <0x00 0x2838 0x00 0x2838 0x00
0x0388>, /* MCU NAVSS*/
<0x00 0x4020 0x00 0x4020 0x00
0x00900100>, /* First peripheral window */
+<0x00 0x40f0 0x00 0x40f0 0x00
0x0002>, /* CTRL_MMR0 */
<0x00 0x4204 0x00 0x4204 0x00
0x03ac2400>, /* WKUP */
<0x00 0x4510 0x00 0x4510 0x00
0x00c24000>, /* MMRs, remaining NAVSS */
<0x00 0x4600 0x00 0x4600 0x00
0x0020>, /* CPSW */
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index f5c8253831..18b611990f 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -13,6 +13,7 @@
aliases {
serial2 = _uart0;
+ ethernet0 = _port1;
};
};
@@ -110,6 +111,116 @@
dma-coherent;
};
};
+
+ mcu_conf: scm_conf@40f0 {
+ compatible = "syscon";
+ reg = <0x0 0x40f0 0x0 0x2>;
+ };
+
+ mcu_cpsw: cpsw_nuss@04600 {
+ compatible = "ti,am654-cpsw-nuss";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ reg = <0x0 0x4600 0x0 0x20>;
+ reg-names = "cpsw_nuss";
+ ranges;
+ dma-coherent;
+ clocks = <_clks 5 10>;
+ clock-names = "fck";
+ power-domains = <_pds 5>;
+ ti,psil-base = <0x7000>;
+
+ dmas = <_udmap _cpsw 0 UDMA_DIR_TX>,
+ <_udmap _cpsw 1 UDMA_DIR_TX>,
+ <_udmap _cpsw 2 UDMA_DIR_TX>,
+ <_udmap _cpsw 3 UDMA_DIR_TX>,
+ <_udmap _cpsw 4 UDMA_DIR_TX>,
+ <_udmap _cpsw 5 UDMA_DIR_TX>,
+ <_udmap _cpsw 6 UDMA_DIR_TX>,
+ <_udmap _cpsw 7 UDMA_DIR_TX>,
+ <_udmap _cpsw 0 UDMA_DIR_RX>;
+ dma-names = "tx0", "tx1", "tx2", "tx3",
+ "tx4", "tx5", "tx6", "tx7",
+ "rx";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ host: host@0 {
+ reg = <0>;
+ ti,label = "host";
+ };
+
+ cpsw_port1: port@1 {
+ reg = <1>;
+ ti,mac-only;
+ ti,label = "port1";
+ ti,syscon-efuse = <_conf 0x200>;
+ };
+ };
+
+ davinci_mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus_freq = <100>;
+ };
+
+ ti,psil-config0 {
+ linux,udma-mode = ;
+ statictr-type = ;
+ ti,needs-epib;
+ ti,psd-size = <16>;
+ };
+
+ ti,psil-config1 {
+ linux,udma-mode = ;
+ statictr-type = ;
+ ti,needs-epib;
+ ti,psd-size = <16>;
+ };
+
+ ti,psil-config2 {
+ linux,udma-mode = ;
+ statictr-type = ;
+ ti,needs-epib;
+ ti,psd-size = <16>;
+ };
+
+ ti,psil-config3 {
+ linux,udma-mode = ;
+ statictr-type = ;
+
[U-Boot] [PATCH v5 2/5] net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver
From: Grygorii Strashko Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem (CPSW NUSS). It has two ports and provides Ethernet packet communication for the device and can be configured as an Ethernet switch. CPSW NUSS features: the Reduced Gigabit Media Independent Interface (RGMII), Reduced Media Independent Interface (RMII), and the Management Data Input/Output (MDIO) interface for physical layer device (PHY) management. The TI AM65x SoC has integrated two-port Gigabit Ethernet Switch subsystem into device MCU domain named MCU_CPSW0. One Ethernet port (port 1) with selectable RGMII and RMII interfaces and an internal Communications Port Programming Interface (CPPI) port (Host port 0). Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX channels and on RX channels operating by TI am654 NAVSS Unified DMA Peripheral Root Complex (UDMA-P) controller. Signed-off-by: Grygorii Strashko Signed-off-by: Keerthy --- drivers/net/ti/Kconfig | 8 + drivers/net/ti/Makefile | 1 + drivers/net/ti/am65-cpsw-nuss.c | 794 3 files changed, 803 insertions(+) create mode 100644 drivers/net/ti/am65-cpsw-nuss.c diff --git a/drivers/net/ti/Kconfig b/drivers/net/ti/Kconfig index 82bc9f5d03..ecf642de10 100644 --- a/drivers/net/ti/Kconfig +++ b/drivers/net/ti/Kconfig @@ -18,3 +18,11 @@ config DRIVER_TI_KEYSTONE_NET bool "TI Keystone 2 Ethernet" help This driver supports the TI Keystone 2 Ethernet subsystem + +config TI_AM65_CPSW_NUSS + bool "TI K3 AM65x MCU CPSW Nuss Ethernet controller driver" + depends on ARCH_K3 + select PHYLIB + help + This driver supports TI K3 MCU CPSW Nuss Ethernet controller + in Texas Instruments K3 AM65x SoCs. diff --git a/drivers/net/ti/Makefile b/drivers/net/ti/Makefile index ee3e4eb5d6..8d3808bb4b 100644 --- a/drivers/net/ti/Makefile +++ b/drivers/net/ti/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_DRIVER_TI_CPSW) += cpsw.o cpsw-common.o cpsw_mdio.o obj-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o obj-$(CONFIG_DRIVER_TI_KEYSTONE_NET) += keystone_net.o cpsw_mdio.o +obj-$(CONFIG_TI_AM65_CPSW_NUSS) += am65-cpsw-nuss.o cpsw_mdio.o diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c new file mode 100644 index 00..658cc34033 --- /dev/null +++ b/drivers/net/ti/am65-cpsw-nuss.c @@ -0,0 +1,794 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Texas Instruments K3 AM65 Ethernet Switch SubSystem Driver + * + * Copyright (C) 2019, Texas Instruments, Incorporated + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "cpsw_mdio.h" + +#define AM65_CPSW_CPSWNU_MAX_PORTS 2 + +#define AM65_CPSW_SS_BASE 0x0 +#define AM65_CPSW_SGMII_BASE 0x100 +#define AM65_CPSW_MDIO_BASE0xf00 +#define AM65_CPSW_XGMII_BASE 0x2100 +#define AM65_CPSW_CPSW_NU_BASE 0x2 +#define AM65_CPSW_CPSW_NU_ALE_BASE 0x1e000 + +#define AM65_CPSW_CPSW_NU_PORTS_OFFSET 0x1000 +#define AM65_CPSW_CPSW_NU_PORT_MACSL_OFFSET0x330 + +#define AM65_CPSW_MDIO_BUS_FREQ_DEF 100 + +#define AM65_CPSW_CTL_REG 0x4 +#define AM65_CPSW_STAT_PORT_EN_REG 0x14 +#define AM65_CPSW_PTYPE_REG0x18 + +#define AM65_CPSW_CTL_REG_P0_ENABLEBIT(2) +#define AM65_CPSW_CTL_REG_P0_TX_CRC_REMOVE BIT(13) +#define AM65_CPSW_CTL_REG_P0_RX_PADBIT(14) + +#define AM65_CPSW_P0_FLOW_ID_REG 0x8 +#define AM65_CPSW_PN_RX_MAXLEN_REG 0x24 +#define AM65_CPSW_PN_REG_SA_L 0x308 +#define AM65_CPSW_PN_REG_SA_H 0x30c + +#define AM65_CPSW_ALE_CTL_REG 0x8 +#define AM65_CPSW_ALE_CTL_REG_ENABLE BIT(31) +#define AM65_CPSW_ALE_CTL_REG_RESET_TBLBIT(30) +#define AM65_CPSW_ALE_CTL_REG_BYPASS BIT(4) +#define AM65_CPSW_ALE_PN_CTL_REG(x)(0x40 + (x) * 4) +#define AM65_CPSW_ALE_PN_CTL_REG_MODE_FORWARD 0x3 +#define AM65_CPSW_ALE_PN_CTL_REG_MAC_ONLY BIT(11) + +#define AM65_CPSW_MACSL_CTL_REG0x0 +#define AM65_CPSW_MACSL_CTL_REG_IFCTL_ABIT(15) +#define AM65_CPSW_MACSL_CTL_REG_GIGBIT(7) +#define AM65_CPSW_MACSL_CTL_REG_GMII_ENBIT(5) +#define AM65_CPSW_MACSL_CTL_REG_LOOPBACK BIT(1) +#define AM65_CPSW_MACSL_CTL_REG_FULL_DUPLEXBIT(0) +#define AM65_CPSW_MACSL_RESET_REG 0x8 +#define AM65_CPSW_MACSL_RESET_REG_RESETBIT(0) +#define AM65_CPSW_MACSL_STATUS_REG 0x4 +#define AM65_CPSW_MACSL_RESET_REG_PN_IDLE BIT(31) +#define AM65_CPSW_MACSL_RESET_REG_PN_E_IDLEBIT(30) +#define AM65_CPSW_MACSL_RESET_REG_PN_P_IDLEBIT(29) +#define AM65_CPSW_MACSL_RESET_REG_PN_TX_IDLE BIT(28) +#define AM65_CPSW_MACSL_RESET_REG_IDLE_MASK \ +
[U-Boot] [PATCH v5 4/5] arm64: dts: k3-am654-base-board: add mcu cpsw nuss pinmux and phy defs
From: Grygorii Strashko
Add mcu cpsw nuss pinmux and phy defs required by cpsw.
Signed-off-by: Grygorii Strashko
Signed-off-by: Keerthy
Reviewed-by: Tom Rini
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 59
1 file changed, 59 insertions(+)
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index 18b611990f..844a5cd96a 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -5,6 +5,7 @@
#include
#include
+#include
/ {
chosen {
@@ -300,6 +301,32 @@
u-boot,dm-spl;
};
+_pmx0 {
+ mcu_cpsw_pins_default: mcu_cpsw_pins_default {
+ pinctrl-single,pins = <
+ AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4)
MCU_RGMII1_TX_CTL */
+ AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5)
MCU_RGMII1_RX_CTL */
+ AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2)
MCU_RGMII1_TD3 */
+ AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3)
MCU_RGMII1_TD2 */
+ AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4)
MCU_RGMII1_TD1 */
+ AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5)
MCU_RGMII1_TD0 */
+ AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2)
MCU_RGMII1_RD3 */
+ AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5)
MCU_RGMII1_RD2 */
+ AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6)
MCU_RGMII1_RD1 */
+ AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6)
MCU_RGMII1_RD0 */
+ AM65X_WKUP_IOPAD(0x0070, PIN_INPUT, 0) /* (N1)
MCU_RGMII1_TXC */
+ AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1)
MCU_RGMII1_RXC */
+ >;
+ };
+
+ mcu_mdio_pins_default: mcu_mdio1_pins_default {
+ pinctrl-single,pins = <
+ AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1)
MCU_MDIO0_MDC */
+ AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4)
MCU_MDIO0_MDIO */
+ >;
+ };
+};
+
_uart0 {
u-boot,dm-spl;
pinctrl-names = "default";
@@ -323,3 +350,35 @@
pinctrl-0 = <_mmc1_pins_default>;
sdhci-caps-mask = <0x7 0x0>;
};
+
+_cpsw {
+ pinctrl-names = "default";
+ pinctrl-0 = <_cpsw_pins_default _mdio_pins_default>;
+};
+
+_mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ /* TODO: phy reset:
TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
+ ti,fifo-depth = ;
+ };
+};
+
+_port1 {
+ phy-mode = "rgmii-id";
+ phy-handle = <>;
+};
+
+_cpsw {
+ reg = <0x0 0x4600 0x0 0x20>,
+ <0x0 0x40f00200 0x0 0x2>;
+ reg-names = "cpsw_nuss", "mac_efuse";
+
+ cpsw-phy-sel@40f04040 {
+ compatible = "ti,am654-cpsw-phy-sel";
+ reg= <0x0 0x40f04040 0x0 0x4>;
+ reg-names = "gmii-sel";
+ };
+};
--
2.17.1
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[U-Boot] [PATCH v5 0/5] net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver
Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem (CPSW NUSS). It has two ports and provides Ethernet packet communication for the device and can be configured as an Ethernet switch. CPSW NUSS features: the Reduced Gigabit Media Independent Interface (RGMII), Reduced Media Independent Interface (RMII), and the Management Data Input/Output (MDIO) interface for physical layer device (PHY) management. The TI AM65x SoC has integrated two-port Gigabit Ethernet Switch subsystem into device MCU domain named MCU_CPSW0. One Ethernet port (port 1) with selectable RGMII and RMII interfaces and an internal Communications Port Programming Interface (CPPI) port (Host port 0). Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX channels and on RX channels operating by TI am654 NAVSS Unified DMA Peripheral Root Complex (UDMA-P) controller. Tested for tftp and booting to kernel on am654-evm. Changes in v5: * Rebased to latest which meant adapting to pinmux macro change. Changes in v4: * Patch1 caused dra7 config build warnings corrected them. Grygorii Strashko (4): net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver arm64: dts: ti: k3-am65: add mcu cpsw node arm64: dts: k3-am654-base-board: add mcu cpsw nuss pinmux and phy defs configs: am65x_evm_a53: enable networking Keerthy (1): driver: net: ti: cpsw-mdio: use phys_addr_t for mdio_base addr arch/arm/dts/k3-am65.dtsi| 2 + arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 170 configs/am65x_evm_a53_defconfig | 7 + drivers/net/ti/Kconfig | 8 + drivers/net/ti/Makefile | 1 + drivers/net/ti/am65-cpsw-nuss.c | 794 +++ drivers/net/ti/cpsw_mdio.c | 4 +- drivers/net/ti/cpsw_mdio.h | 2 +- 8 files changed, 985 insertions(+), 3 deletions(-) create mode 100644 drivers/net/ti/am65-cpsw-nuss.c -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v5 1/5] driver: net: ti: cpsw-mdio: use phys_addr_t for mdio_base addr
Use phys_addr_t for mdio_base address to avoid build
warnings on arm64 and dra7. Cast it to uintprt_t before
assigning to regs.
Signed-off-by: Grygorii Strashko
Signed-off-by: Keerthy
Reviewed-by: Tom Rini
---
drivers/net/ti/cpsw_mdio.c | 4 ++--
drivers/net/ti/cpsw_mdio.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ti/cpsw_mdio.c b/drivers/net/ti/cpsw_mdio.c
index 70f547e6d7..6e8f652011 100644
--- a/drivers/net/ti/cpsw_mdio.c
+++ b/drivers/net/ti/cpsw_mdio.c
@@ -125,7 +125,7 @@ u32 cpsw_mdio_get_alive(struct mii_dev *bus)
return val & GENMASK(15, 0);
}
-struct mii_dev *cpsw_mdio_init(const char *name, u32 mdio_base,
+struct mii_dev *cpsw_mdio_init(const char *name, phys_addr_t mdio_base,
u32 bus_freq, int fck_freq)
{
struct cpsw_mdio *cpsw_mdio;
@@ -144,7 +144,7 @@ struct mii_dev *cpsw_mdio_init(const char *name, u32
mdio_base,
return NULL;
}
- cpsw_mdio->regs = (struct cpsw_mdio_regs *)mdio_base;
+ cpsw_mdio->regs = (struct cpsw_mdio_regs *)(uintptr_t)mdio_base;
if (!bus_freq || !fck_freq)
cpsw_mdio->div = CPSW_MDIO_DIV_DEF;
diff --git a/drivers/net/ti/cpsw_mdio.h b/drivers/net/ti/cpsw_mdio.h
index 4a76d4e5c5..dbf4a2dcac 100644
--- a/drivers/net/ti/cpsw_mdio.h
+++ b/drivers/net/ti/cpsw_mdio.h
@@ -10,7 +10,7 @@
struct cpsw_mdio;
-struct mii_dev *cpsw_mdio_init(const char *name, u32 mdio_base,
+struct mii_dev *cpsw_mdio_init(const char *name, phys_addr_t mdio_base,
u32 bus_freq, int fck_freq);
void cpsw_mdio_free(struct mii_dev *bus);
u32 cpsw_mdio_get_alive(struct mii_dev *bus);
--
2.17.1
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Re: [U-Boot] [PATCH v4 0/5] net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver
On 02/05/19 11:14 AM, Keerthy wrote: On 30/04/19 11:57 AM, Keerthy wrote: On 30/04/19 11:54 AM, Keerthy wrote: Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem (CPSW NUSS). It has two ports and provides Ethernet packet communication for the device and can be configured as an Ethernet switch. CPSW NUSS features: the Reduced Gigabit Media Independent Interface (RGMII), Reduced Media Independent Interface (RMII), and the Management Data Input/Output (MDIO) interface for physical layer device (PHY) management. The TI AM65x SoC has integrated two-port Gigabit Ethernet Switch subsystem into device MCU domain named MCU_CPSW0. One Ethernet port (port 1) with selectable RGMII and RMII interfaces and an internal Communications Port Programming Interface (CPPI) port (Host port 0). Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX channels and on RX channels operating by TI am654 NAVSS Unified DMA Peripheral Root Complex (UDMA-P) controller. Tested for tftp and booting to kernel on am654-evm. https://patchwork.ozlabs.org/patch/1090618/ Needs to be applied before trying the cpsw. Tom, Thanks for pulling this series and as pointed above please pull the patch [1] which will avoid udma accessing RT registers before channel config is done. Tom, I do not see this series in latest u-boot. Was this dropped for some reason? - Keerthy Regards, Keerthy [1] https://patchwork.ozlabs.org/patch/1090618/ Grygorii Strashko (4): net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver arm64: dts: k3-am654-base-board: add mcu cpsw nuss pinmux and phy defs configs: am65x_evm_a53: enable networking arm64: dts: ti: k3-am65: add mcu cpsw node Keerthy (1): driver: net: ti: cpsw-mdio: use phys_addr_t for mdio_base addr Changes in v4: * Patch1 caused dra7 config build warnings corrected them. Testing: 1) Build tested am3/4 and dra7. 2) Booted to kernel using cpsw tftp. arch/arm/dts/k3-am65.dtsi | 2 + arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 170 configs/am65x_evm_a53_defconfig | 7 + drivers/net/ti/Kconfig | 8 + drivers/net/ti/Makefile | 1 + drivers/net/ti/am65-cpsw-nuss.c | 794 +++ drivers/net/ti/cpsw_mdio.c | 4 +- drivers/net/ti/cpsw_mdio.h | 2 +- 8 files changed, 985 insertions(+), 3 deletions(-) create mode 100644 drivers/net/ti/am65-cpsw-nuss.c ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Kconfig options for several boards
Hi everyone, I would like to turn on configurations for several Keymile boards, which are all using the Kirkwood architecture. Now, I do not want to change every defconfig file one after the other. Until now, we have used a common header file, but with the conversion to Kconfig another method has to be elaborated. While searching in the U-Boot source code, I found two different manners to fulfill our needs: * in arch/arm/mach-kirkwood/Kconfig: config TARGET_KM_KIRKWOOD bool "KM_KIRKWOOD Board" select BOARD_LATE_INIT select DM select DM_SPI select DM_SPI_FLASH imply CMD_CRAMFS imply CMD_DIAG imply FS_CRAMFS * in board/keymile/km_arm/Kconfig: config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select DM select DM_SPI select DM_SPI_FLASH Which one do you guys prefer and for what reasons? Also, I would like to know what the dummy keyword is doing in the second proposition (found that in every usage of BOARD_SPECIFIC_OPTIONS). Many thanks in advance! Sincerely, Pascal Linder Student Telekommunikation Netzwerke und Sicherheit Klasse T-3b ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4 v2] test: dm: Add a test for PCI Enhanced Allocation
Hi Bin,
On 6/5/2019 1:05 PM, Bin Meng wrote:
> Hi Alex,
>
> On Tue, Jun 4, 2019 at 8:46 PM Alex Marginean wrote:
>>
>> This test is built on top of the existing swap_case driver. It adds EA
>> capability structure support to swap_case and uses that to map BARs.
>> BAR1 works as it used to, swapping upper/lower case. BARs 2,4 map to a
>> couple of magic values.
>>
>> Signed-off-by: Alex Marginean
>> ---
>>
>> Changes in v2:
>> - new patch, v1 didn't have a test
>>
>> arch/sandbox/dts/test.dts | 8 +++
>> arch/sandbox/include/asm/test.h | 13
>> drivers/misc/swap_case.c| 102 +++-
>> test/dm/pci.c | 50
>> 4 files changed, 172 insertions(+), 1 deletion(-)
>>
>
> Well done!
>
> Reviewed-by: Bin Meng
> Tested-by: Bin Meng
>
> But please see some nits below:
I'm replying from the nxp account, apparently google decided this is
just spam and it's not worth sending out through gmail.
I'll send a v3 with fixes for you comments, should I keep either of your
two tags on this patch?
Thank you!
Alex
>
>> diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
>> index 46d8a56d0f..dd50a951a8 100644
>> --- a/arch/sandbox/dts/test.dts
>> +++ b/arch/sandbox/dts/test.dts
>> @@ -434,6 +434,14 @@
>> compatible = "sandbox,swap-case";
>> };
>> };
>> + pci@1,0 {
>> + compatible = "pci-generic";
>> + reg = <0x0800 0 0 0 0>;
>> + emul@0,0 {
>> + compatible = "sandbox,swap-case";
>> + use-ea;
>> + };
>> + };
>> pci@1f,0 {
>> compatible = "pci-generic";
>> reg = <0xf800 0 0 0 0>;
>> diff --git a/arch/sandbox/include/asm/test.h
>> b/arch/sandbox/include/asm/test.h
>> index e956a05262..32125f3037 100644
>> --- a/arch/sandbox/include/asm/test.h
>> +++ b/arch/sandbox/include/asm/test.h
>> @@ -19,6 +19,7 @@
>> #define PCI_CAP_ID_PM_OFFSET 0x50
>> #define PCI_CAP_ID_EXP_OFFSET 0x60
>> #define PCI_CAP_ID_MSIX_OFFSET 0x70
>> +#define PCI_CAP_ID_EA_OFFSET 0x80
>>
>> #define PCI_EXT_CAP_ID_ERR_OFFSET 0x100
>> #define PCI_EXT_CAP_ID_VC_OFFSET 0x200
>> @@ -30,6 +31,18 @@
>>
>> #define SANDBOX_CLK_RATE 32768
>>
>> +/* Macros used to test PCI EA capability structure */
>> +#define PCI_CAP_EA_BASE_LO00x0010
>> +#define PCI_CAP_EA_BASE_LO10x0011
>> +#define PCI_CAP_EA_BASE_LO20x0012
>> +#define PCI_CAP_EA_BASE_LO40x0014
>> +#define PCI_CAP_EA_BASE_HI20x0002ULL
>> +#define PCI_CAP_EA_BASE_HI40x0004ULL
>> +#define PCI_CAP_EA_SIZE_LO 0x
>> +#define PCI_CAP_EA_SIZE_HI 0x0010ULL
>> +#define PCI_EA_BAR2_MAGIC 0x72727272
>> +#define PCI_EA_BAR4_MAGIC 0x74747474
>> +
>> /* System controller driver data */
>> enum {
>> SYSCON0 = 32,
>> diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c
>> index fa608cec1b..949ef0fdd7 100644
>> --- a/drivers/misc/swap_case.c
>> +++ b/drivers/misc/swap_case.c
>> @@ -61,11 +61,63 @@ static int sandbox_swap_case_get_devfn(struct udevice
>> *dev)
>> return plat->devfn;
>> }
>>
>> +static int sandbox_swap_use_ea(struct udevice *dev)
>
> nits: for consistency, name it as "sandbox_swap_case_use_ea"
>
>> +{
>> + return !!ofnode_get_property(dev->node, "use-ea", NULL);
>> +}
>> +
>> +/* Please keep these macros in sync with ea_regs below */
>> +#define PCI_CAP_ID_EA_SIZE (sizeof(ea_regs) + 4)
>> +#define PCI_CAP_ID_EA_ENTRY_CNT4
>> +/* Hardcoded EA structure, excluding 1st DW. */
>> +static const u32 ea_regs[] = {
>> + /* BEI=0, ES=2, BAR0 32b Base + 32b MaxOffset, I/O space */
>> + (2 << 8) | 2,
>> + PCI_CAP_EA_BASE_LO0,
>> + 0,
>> + /* BEI=1, ES=2, BAR1 32b Base + 32b MaxOffset */
>> + (1 << 4) | 2,
>> + PCI_CAP_EA_BASE_LO1,
>> + MEM_TEXT_SIZE - 1,
>> + /* BEI=2, ES=3, BAR2 64b Base + 32b MaxOffset */
>> + (2 << 4) | 3,
>> + PCI_CAP_EA_BASE_LO2 | PCI_EA_IS_64,
>> + PCI_CAP_EA_SIZE_LO,
>> + PCI_CAP_EA_BASE_HI2,
>> + /* BEI=4, ES=4, BAR4 63b Base + 64b MaxOffset */
>
> nits: typo of '63b'
>
>> + (4 << 4) | 4,
>> + PCI_CAP_EA_BASE_LO4 | PCI_EA_IS_64,
>> + PCI_CAP_EA_SIZE_LO | PCI_EA_IS_64,
>> + PCI_CAP_EA_BASE_HI4,
>> + PCI_CAP_EA_SIZE_HI,
>> +};
>> +
>> +static int sandbox_swap_case_read_ea(struct udevice *emul, uint offset,
>> +ulong *valuep, enum pci_size_t size)
>> +{
>> + u32 reg;
>> +
>> + offset = offset -
Re: [U-Boot] [PATCH 1/1] colibri imx6/t20: enable CONFIG_SYS_WHITE_ON_BLACK
On Thu, 2019-05-30 at 18:00 +0300, Igor Opaniuk wrote:
> From: Igor Opaniuk
>
> Enable CONFIG_SYS_WHITE_ON_BLACK by default for DM_VIDEO enabled
> configurations, where env("splashimage") is used for showing Toradex
> boot logo.
>
> Signed-off-by: Igor Opaniuk
Reviewed-by: Marcel Ziswiler
> ---
> configs/colibri_imx6_defconfig | 1 +
> configs/colibri_t20_defconfig | 1 +
Given that one is Tegra based the maintainer in question would probably
be Tom Warren (;-p).
> 2 files changed, 2 insertions(+)
>
> diff --git a/configs/colibri_imx6_defconfig
> b/configs/colibri_imx6_defconfig
> index 72e9128a69..9e307dae32 100644
> --- a/configs/colibri_imx6_defconfig
> +++ b/configs/colibri_imx6_defconfig
> @@ -85,3 +85,4 @@ CONFIG_DM_VIDEO=y
> CONFIG_VIDEO_IPUV3=y
> CONFIG_FAT_WRITE=y
> CONFIG_OF_LIBFDT_OVERLAY=y
> +CONFIG_SYS_WHITE_ON_BLACK=y
> diff --git a/configs/colibri_t20_defconfig
> b/configs/colibri_t20_defconfig
> index 15fb9555f3..d1bfd3c87a 100644
> --- a/configs/colibri_t20_defconfig
> +++ b/configs/colibri_t20_defconfig
> @@ -64,3 +64,4 @@ CONFIG_DM_VIDEO=y
> CONFIG_VIDEO_TEGRA20=y
> CONFIG_CONSOLE_SCROLL_LINES=10
> CONFIG_OF_LIBFDT_OVERLAY=y
> +CONFIG_SYS_WHITE_ON_BLACK=y
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[U-Boot] [PATCH v3 2/2] power: regulator: Kconfig: Add SPL_DM_REGULATOR configs for palmas/lp873x/lp87565
Add SPL_DM_REGULATOR configs for palmas/lp873x/lp87565. These were missing and the Makefile already assumes them to be defined. Add the corresponding SPL config options. This enables the regulator support in SPL. Signed-off-by: Keerthy --- Changes in v3: * As per Tom's comments added the SPL_* configs instead of removing SPL in Makefile drivers/power/regulator/Kconfig | 26 ++ 1 file changed, 26 insertions(+) diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index 72dfc48981..4e6c440d13 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -258,3 +258,29 @@ config SPL_DM_REGULATOR_STPMIC1 depends on SPL_DM_REGULATOR && PMIC_STPMIC1 help Enable support for the regulator functions of the STPMIC1 PMIC in SPL. + +config SPL_DM_REGULATOR_PALMAS + bool "Enable driver for PALMAS PMIC regulators" + depends on SPL_PMIC_PALMAS + help + This enables implementation of driver-model regulator uclass + features for REGULATOR PALMAS and the family of PALMAS PMICs. + The driver implements get/set api for: value and enable in SPL. + +config SPL_DM_REGULATOR_LP87565 + bool "Enable driver for LP87565 PMIC regulators" + depends on SPL_PMIC_LP87565 + help + This enables implementation of driver-model regulator uclass + features for REGULATOR LP87565 and the family of LP87565 PMICs. + LP87565 series of PMICs have 4 single phase BUCKs that can also + be configured in multi phase modes. The driver implements + get/set api for value and enable in SPL. + +config SPL_DM_REGULATOR_LP873X + bool "Enable driver for LP873X PMIC regulators" + depends on SPL_PMIC_LP873X + help + This enables implementation of driver-model regulator uclass + features for REGULATOR LP873X and the family of LP873X PMICs. + The driver implements get/set api for: value and enable in SPL. -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] colibri_imx7: fastboot support
On Fri, 2019-05-31 at 13:19 +0300, Igor Opaniuk wrote: > From: Igor Opaniuk > > Enable fastboot support (including "fastboot oem" subset of > commands). > > Signed-off-by: Igor Opaniuk Reviewed-by: Marcel Ziswiler > --- > configs/colibri_imx7_emmc_defconfig | 8 > 1 file changed, 8 insertions(+) > > diff --git a/configs/colibri_imx7_emmc_defconfig > b/configs/colibri_imx7_emmc_defconfig > index f66602c0c3..b91ab5df69 100644 > --- a/configs/colibri_imx7_emmc_defconfig > +++ b/configs/colibri_imx7_emmc_defconfig > @@ -67,3 +67,11 @@ CONFIG_VIDEO=y > CONFIG_FAT_WRITE=y > CONFIG_OF_LIBFDT_OVERLAY=y > CONFIG_DM_USB=y > +CONFIG_FASTBOOT=y > +CONFIG_FASTBOOT_USB_DEV=0 > +CONFIG_FASTBOOT_FLASH=y > +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 > +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y > +CONFIG_USB_FUNCTION_FASTBOOT=y > +CONFIG_FASTBOOT_BUF_ADDR=0x8200 > +CONFIG_FASTBOOT_BUF_SIZE=0x1000 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 1/2] power: pmic: Kconfig: Add SPL_PMIC configs for palmas/lp873x/lp87565
Add SPL_PMIC configs for palmas/lp873x/lp87565. These were missing and the Makefile already assumes them to be defined. Add the corresponding SPL config options. This enables the pmics in SPL. Signed-off-by: Keerthy --- Changes in v3: * As per Tom's comments added the SPL_* configs instead of removing SPL in Makefile drivers/power/pmic/Kconfig | 21 + 1 file changed, 21 insertions(+) diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index b0cd260354..064b383880 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -238,3 +238,24 @@ config PMIC_STPMIC1 The STPMIC1 PMIC provides 4 BUCKs, 6 LDOs, 1 VREF and 2 power switches. It is accessed via an I2C interface. The device is used with STM32MP1 SoCs. This driver implements register read/write operations. + +config SPL_PMIC_PALMAS + bool "Enable driver for Texas Instruments PALMAS PMIC" + depends on DM_PMIC + help + The PALMAS is a PMIC containing several LDOs, SMPS. + This driver binds the pmic children in SPL. + +config SPL_PMIC_LP873X + bool "Enable driver for Texas Instruments LP873X PMIC" + depends on DM_PMIC + help + The LP873X is a PMIC containing couple of LDOs and couple of SMPS. + This driver binds the pmic children in SPL. + +config SPL_PMIC_LP87565 + bool "Enable driver for Texas Instruments LP87565 PMIC" + depends on DM_PMIC + help + The LP87565 is a PMIC containing a bunch of SMPS. + This driver binds the pmic children in SPL. -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4 v2] test: dm: Add a test for PCI Enhanced Allocation
Hi Alex, On Thu, Jun 6, 2019 at 3:38 PM Alexandru Marginean wrote: > > Hi Bin, > > On 6/5/2019 1:05 PM, Bin Meng wrote: > > Hi Alex, > > > > On Tue, Jun 4, 2019 at 8:46 PM Alex Marginean > > wrote: > >> > >> This test is built on top of the existing swap_case driver. It adds EA > >> capability structure support to swap_case and uses that to map BARs. > >> BAR1 works as it used to, swapping upper/lower case. BARs 2,4 map to a > >> couple of magic values. > >> > >> Signed-off-by: Alex Marginean > >> --- > >> > >> Changes in v2: > >> - new patch, v1 didn't have a test > >> > >> arch/sandbox/dts/test.dts | 8 +++ > >> arch/sandbox/include/asm/test.h | 13 > >> drivers/misc/swap_case.c| 102 +++- > >> test/dm/pci.c | 50 > >> 4 files changed, 172 insertions(+), 1 deletion(-) > >> > > > > Well done! > > > > Reviewed-by: Bin Meng > > Tested-by: Bin Meng > > > > But please see some nits below: > > I'm replying from the nxp account, apparently google decided this is > just spam and it's not worth sending out through gmail. > > I'll send a v3 with fixes for you comments, should I keep either of your > two tags on this patch? Yes, please keep the two tags in the v3. thanks! Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] usb: dwc3: Handle case where setup_phy is not needed
Hi, > -Original Message- > From: Siva Durga Prasad Paladugu > Sent: Tuesday, May 28, 2019 3:36 PM > To: Michal Simek ; Lukasz Majewski > > Cc: u-boot@lists.denx.de; ma...@denx.de; jjhib...@ti.com; > s...@chromium.org; patrick.delau...@st.com > Subject: RE: [PATCH] usb: dwc3: Handle case where setup_phy is not needed > > Hi, > > > -Original Message- > > From: Michal Simek [mailto:michal.si...@xilinx.com] > > Sent: Monday, April 1, 2019 4:10 PM > > To: Siva Durga Prasad Paladugu ; Lukasz Majewski > > > > Cc: u-boot@lists.denx.de; ma...@denx.de; jjhib...@ti.com; > > s...@chromium.org; patrick.delau...@st.com > > Subject: Re: [PATCH] usb: dwc3: Handle case where setup_phy is not > > needed > > > > On 01. 04. 19 12:38, Siva Durga Prasad Paladugu wrote: > > > Hi Lukasz, > > > > > >> -Original Message- > > >> From: Lukasz Majewski [mailto:lu...@denx.de] > > >> Sent: Monday, April 01, 2019 4:04 PM > > >> To: Siva Durga Prasad Paladugu > > >> Cc: u-boot@lists.denx.de; ma...@denx.de; jjhib...@ti.com; > > >> s...@chromium.org; patrick.delau...@st.com; Michal Simek > > >> > > >> Subject: Re: [PATCH] usb: dwc3: Handle case where setup_phy is not > > >> needed > > >> > > >> On Mon, 1 Apr 2019 10:23:42 + > > >> Siva Durga Prasad Paladugu wrote: > > >> > > >>> Hi Lukasz, > > >>> > > -Original Message- > > From: Lukasz Majewski [mailto:lu...@denx.de] > > Sent: Monday, April 01, 2019 1:03 PM > > To: Siva Durga Prasad Paladugu > > Cc: u-boot@lists.denx.de; ma...@denx.de; jjhib...@ti.com; > > s...@chromium.org; patrick.delau...@st.com; Michal Simek > > > > Subject: Re: [PATCH] usb: dwc3: Handle case where setup_phy is > > not needed > > > > Hi Siva Durga Prasad Paladugu, > > > > > If CONFIG_PHY is not enabled then the dwc3_setup_phy() returns > > > ENOTSUPP which can be still valid and intentional > > ^^^ - > > could you elaborate on this a bit more? > > > > What is the use case when -ENOTSUPP is valid and intentional ? > > >>> > > >>> In the cases where phy will be setup by First stage boot loader > > >>> itself and don't want to do it again at u-boot. > > >> > > >> I think that I saw some time ago similar patch for uart - on IMX > > >> IIRC (it was also setup by BootROM on SoC). > > >> > > >> Maybe we would need some kind of switch in Kconfig to indicate this > > >> use case? > > >> > > >> Another option would be to mark this in DTS as TI specific property? > > >> > > >> My point is that we shall not proceed with the flow when we do > > >> receive - ENOTSUPP > > > > > > TBH, I feel we should not call dwc3_setup_phy() if CONFIG_PHY is not > > > enabled. If we look at dwc3_setup_phy() definition, it is under > > CONFIG_PHY. > > > > +1 on this. > > Any update on this patch? This is how its already being handled in drivers/usb/host/xhci-dwc3.c at line 127 in routine xhci_dwc3_probe() (snippet below) ret = dwc3_setup_phy(dev, >usb_phys, >num_phys); if (ret && (ret != -ENOTSUPP)) return ret; We have two options either treat -ENOTSUPP as valid as above patch which I sent or don’t invoke dwc3_setup_phy() if CONFIG_PHY is not enabled. Thanks, Siva > > Thanks, > Siva > > > > > M ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v8 2/3] rockchip: rk3399: Add Rockpro64 board support
Hi,
On Sat, 2019-06-01 at 10:41 +0800, Kever Yang wrote:
>
> On 05/29/2019 04:09 PM, Kever Yang wrote:
> > On 05/17/2019 06:29 PM, Jagan Teki wrote:
> > > Add initial support for Rockpro64 board.
> > >
> > > Specification
> > > - Rockchip RK3399
> > > - 2/4GB Dual-Channel LPDDR3
> > > - SD card slot
> > > - eMMC socket
> > > - 128Mb SPI Flash
> > > - Gigabit ethernet
> > > - PCIe 4X slot
> > > - WiFI/BT module socket
> > > - HDMI In/Out, DP, MIPI DSI/CSI, eDP
> > > - USB 3.0, 2.0
> > > - USB Type C power and data
> > > - GPIO expansion ports
> > > - DC 12V/2A
> > >
> > > Commit details of rk3399-rockpro64.dts sync from Linux 5.1-rc2:
> > > "arm64: dts: rockchip: rockpro64 dts add usb regulator"
> > > (sha1: 6db644c79c8d45d73b56bc389aebd85fc3679beb)
> > >
> > > 'Akash' has sent an initial patch before, so I keep him as board
> > > maintainer and I'm co-maintainer based on our conversation.
> > >
> > > Signed-off-by: Akash Gajjar
> > > Signed-off-by: Jagan Teki
> > Reviewed-by: Kever Yang
>
> Applied to u-boot-rockchip/master, thanks!
I'm very surprised to read this. Is SPL support part of this version or
was it disabled? I thought there was an agreement to not merge the
patches until the SPL issue is resolved.
Can you explain what happened?
Cheers,
Paul
> > Thanks,
> > - Kever
> >
> > > ---
> > > Changes for v8:
> > > - Add TPL support
> > > - Now the bootchain is
> > > rkbin (TPL) -> SPL -> U-Boot proper
> > >
> > > arch/arm/dts/Makefile | 1 +
> > > arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 6 +
> > > arch/arm/dts/rk3399-rockpro64.dts | 712 ++
> > > board/rockchip/evb_rk3399/MAINTAINERS | 7 +
> > > configs/rockpro64-rk3399_defconfig| 60 ++
> > > 5 files changed, 786 insertions(+)
> > > create mode 100644 arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
> > > create mode 100644 arch/arm/dts/rk3399-rockpro64.dts
> > > create mode 100644 configs/rockpro64-rk3399_defconfig
> > >
> > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> > > index 529c506b4d..8522f01aca 100644
> > > --- a/arch/arm/dts/Makefile
> > > +++ b/arch/arm/dts/Makefile
> > > @@ -114,6 +114,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
> > > rk3399-puma-ddr1600.dtb \
> > > rk3399-puma-ddr1866.dtb \
> > > rk3399-rock960.dtb \
> > > + rk3399-rockpro64.dtb
> > >
> > > dtb-$(CONFIG_ROCKCHIP_RV1108) += \
> > > rv1108-elgin-r1.dtb \
> > > diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
> > > b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
> > > new file mode 100644
> > > index 00..7bddc3acdb
> > > --- /dev/null
> > > +++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
> > > @@ -0,0 +1,6 @@
> > > +// SPDX-License-Identifier: GPL-2.0+
> > > +/*
> > > + * Copyright (C) 2019 Jagan Teki
> > > + */
> > > +
> > > +#include "rk3399-u-boot.dtsi"
> > > diff --git a/arch/arm/dts/rk3399-rockpro64.dts
> > > b/arch/arm/dts/rk3399-rockpro64.dts
> > > new file mode 100644
> > > index 00..1f2394e058
> > > --- /dev/null
> > > +++ b/arch/arm/dts/rk3399-rockpro64.dts
> > > @@ -0,0 +1,712 @@
> > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > > +/*
> > > + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
> > > + * Copyright (c) 2018 Akash Gajjar
> > > + */
> > > +
> > > +/dts-v1/;
> > > +#include
> > > +#include
> > > +#include "rk3399.dtsi"
> > > +#include "rk3399-opp.dtsi"
> > > +
> > > +/ {
> > > + model = "Pine64 RockPro64";
> > > + compatible = "pine64,rockpro64", "rockchip,rk3399";
> > > +
> > > + chosen {
> > > + stdout-path = "serial2:150n8";
> > > + };
> > > +
> > > + clkin_gmac: external-gmac-clock {
> > > + compatible = "fixed-clock";
> > > + clock-frequency = <12500>;
> > > + clock-output-names = "clkin_gmac";
> > > + #clock-cells = <0>;
> > > + };
> > > +
> > > + gpio-keys {
> > > + compatible = "gpio-keys";
> > > + autorepeat;
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <>;
> > > +
> > > + power {
> > > + debounce-interval = <100>;
> > > + gpios = < RK_PA5 GPIO_ACTIVE_LOW>;
> > > + label = "GPIO Key Power";
> > > + linux,code = ;
> > > + wakeup-source;
> > > + };
> > > + };
> > > +
> > > + leds {
> > > + compatible = "gpio-leds";
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <_led_gpio>, <_led_gpio>;
> > > +
> > > + work-led {
> > > + label = "work";
> > > + default-state = "on";
> > > + gpios = < RK_PB3 GPIO_ACTIVE_HIGH>;
> > > + };
> > > +
> > > + diy-led {
> > > + label = "diy";
> > > + default-state = "off";
> > > + gpios = < RK_PA2 GPIO_ACTIVE_HIGH>;
> > > + };
> > > + };
> > > +
> > > + sdio_pwrseq: sdio-pwrseq {
> > > + compatible = "mmc-pwrseq-simple";
>
[U-Boot] [PATCH v3] riscv: add Kconfig entries for the F and D ISA extensions support
This patch adds Kconfig entries for the F (Single-Precision) and D (Double-Precision) floating point instruction-set extensions. Signed-off-by: Eric Lin --- Changes for v2: - Grammatical correction in commit message "adds" - Fixed the config name to indicate both F and D Changes for v3: - Separate the config name for ISA_F and ISA_D arch/riscv/Kconfig | 14 ++ arch/riscv/Makefile | 16 2 files changed, 26 insertions(+), 4 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 362f3cdc65..7a2463ffe2 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -91,6 +91,20 @@ config RISCV_ISA_C when building U-Boot, which results in compressed instructions in the U-Boot binary. +config RISCV_ISA_F + bool "Emit single-precision floating-point instructions" + help + Adds "F" to the ISA subsets that the toolchain is allowed to emit + when building U-Boot, which results in single-precision instructions + in the U-Boot binary. + +config RISCV_ISA_D + bool "Emit double-precision floating-point instructions" + help + Adds "D" to the ISA subsets that the toolchain is allowed to emit + when building U-Boot, which results in double-precision instructions + in the U-Boot binary. + config RISCV_ISA_A def_bool y diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 0b80eb8d86..f834d11720 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -5,15 +5,23 @@ ifeq ($(CONFIG_ARCH_RV64I),y) ARCH_BASE = rv64im - ABI = lp64 + ABI := lp64 endif ifeq ($(CONFIG_ARCH_RV32I),y) ARCH_BASE = rv32im - ABI = ilp32 + ABI := ilp32 endif ifeq ($(CONFIG_RISCV_ISA_A),y) ARCH_A = a endif +ifeq ($(CONFIG_RISCV_ISA_F),y) + ARCH_F = f + ABI := $(ABI)f +endif +ifeq ($(CONFIG_RISCV_ISA_D),y) + ARCH_D = fd + ABI := $(ABI)d +endif ifeq ($(CONFIG_RISCV_ISA_C),y) ARCH_C = c endif @@ -24,8 +32,8 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y) CMODEL = medany endif -ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \ --mcmodel=$(CMODEL) +ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_F)$(ARCH_D)$(ARCH_C) -mabi=$(ABI) \ +-mcmodel=$(CMODEL) PLATFORM_CPPFLAGS += $(ARCH_FLAGS) CFLAGS_EFI += $(ARCH_FLAGS) -- 2.17.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/2] i.MX6: nand: add nandbcb command for imx
Writing/updating boot image in nand device is not
straight forward in i.MX6 platform and it requires
boot control block(BCB) to be configured.
It becomes difficult to use uboot 'nand' command to
write BCB since it requires platform specific attributes
need to be taken care of.
It is even difficult to use existing msx-nand.c driver by
incorporating BCB attributes like mxs_dma_desc does
because it requires change in mtd and nand command.
So, cmd_nandbcb implemented in arch/arm/mach-imx
BCB contains two data structures, Firmware Configuration Block(FCB)
and Discovered Bad Block Table(DBBT). FCB has nand timings,
DBBT search area, page address of firmware.
On summary, nandbcb update will
- erase the entire partition
- create BCB by creating 2 FCB/DBBT block followed by
1 FW block based on partition size and erasesize.
- fill FCB/DBBT structures
- write FW/SPL on FW1
- write FCB/DBBT in first 2 blocks
for nand boot, up on reset bootrom look for FCB structure in
first block's if FCB found the nand timings are loaded for
further reads. once FCB read done, DTTB will load and finally
firmware will be loaded which is boot image.
Refer section "NAND Boot" from doc/imx/common/imx6.txt for more usage
information.
Signed-off-by: Jagan Teki
Signed-off-by: Sergey Kubushyn
Signed-off-by: Shyam Saini
---
Changes for v4:
- Remove obselete apis and use bch_geometry structure for calculating
ecc level, bad block start bit and bad block byte
- Write firmware only once
- Shorten variable names
- Update commit message
- Update docs as per current patch
- Fix checkpatch warnings
Changes for v3:
- Fixed multi-line comments
- Better error handling for failed allocations
Changes for v2:
- Fixed commit message notes
- Updated proper commit message
- Update doc/README.imx6 with NAND boot details
- Fixed long length variable names.
- Fixed Gigantic variable name.
- NULL checks for kzalloc
- Move Kconfig option in separate patch
- Fixed checkpatch warninigs
---
arch/arm/include/asm/mach-imx/imx-nandbcb.h| 111 +++
.../arm/include/asm/mach-imx/mxs-nand.h| 0
arch/arm/mach-imx/Makefile | 1 +
arch/arm/mach-imx/cmd_nandbcb.c| 369 +
doc/imx/common/imx6.txt| 75 +
drivers/mtd/nand/raw/mxs_nand.c| 2 +-
drivers/mtd/nand/raw/mxs_nand_spl.c| 3 +-
7 files changed, 559 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/include/asm/mach-imx/imx-nandbcb.h
rename drivers/mtd/nand/raw/mxs_nand.h =>
arch/arm/include/asm/mach-imx/mxs-nand.h (100%)
create mode 100644 arch/arm/mach-imx/cmd_nandbcb.c
diff --git a/arch/arm/include/asm/mach-imx/imx-nandbcb.h
b/arch/arm/include/asm/mach-imx/imx-nandbcb.h
new file mode 100644
index 00..033659a038
--- /dev/null
+++ b/arch/arm/include/asm/mach-imx/imx-nandbcb.h
@@ -0,0 +1,111 @@
+/*
+ * Copyright (C) 2017 Jagan Teki
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _IMX_NAND_BCB_H_
+#define _IMX_NAND_BCB_H_
+
+#define FCB_FINGERPRINT0x20424346 /* 'FCB' */
+#define FCB_VERSION_1 0x0100
+
+#define DBBT_FINGERPRINT2 0x54424244 /* 'DBBT' */
+#define DBBT_VERSION_1 0x0100
+
+struct dbbt_block {
+ u32 checksum; /* reserved on i.MX6 */
+ u32 fingerprint;
+ u32 version;
+ u32 numberbb; /* reserved on i.MX6 */
+ u32 dbbtpages;
+};
+
+struct fcb_block {
+ u32 checksum; /* First fingerprint in first byte */
+ u32 fingerprint;/* 2nd fingerprint at byte 4 */
+ u32 version;/* 3rd fingerprint at byte 8 */
+ u8 datasetup;
+ u8 datahold;
+ u8 addr_setup;
+ u8 dsample_time;
+
+ /* These are for application use only and not for ROM. */
+ u8 nandtiming;
+ u8 rea;
+ u8 rloh;
+ u8 rhoh;
+ u32 pagesize; /* 2048 for 2K pages, 4096 for 4K pages */
+ u32 oob_pagesize; /* 2112 for 2K pages, 4314 for 4K pages */
+ u32 sectors;/* Number of 2K sections per block */
+ u32 nr_nand;/* Total Number of NANDs - not used by ROM */
+ u32 nr_die; /* Number of separate chips in this NAND */
+ u32 celltype; /* MLC or SLC */
+ u32 ecc_type; /* Type of ECC, can be one of BCH-0-20 */
+ u32 ecc_nr; /* Number of bytes for Block0 - BCH */
+
+ /* Block size in bytes for all blocks other than Block0 - BCH */
+ u32 ecc_size;
+ u32 ecc_level; /* Ecc level for Block 0 - BCH */
+ u32 meta_size; /* Metadata size - BCH */
+ /* Number of blocks per page for ROM use - BCH */
+ u32 nr_blocks;
+ u32 ecc_type_sdk; /* Type of ECC, can be one of BCH-0-20 */
+ u32 ecc_nr_sdk; /* Number of bytes for Block0 - BCH */
+ /* Block size in bytes for all blocks other
[U-Boot] [PATCH 1/2] arm: i.MX: Add CMD_NANDBCB Kconfig entry
Add Kconfig entry for CMD_NANDBCB, and default y on i.MX6 platform with NAND_MXS defined. Signed-off-by: Jagan Teki Signed-off-by: Shyam Saini --- Hi, This patch series is based on feedback gathered from this [1] discussion and [2] patch submitted by Stefan. [1] https://patchwork.ozlabs.org/patch/870467/ [2] https://patchwork.ozlabs.org/patch/897222/ Changes for v4: - No change Changes for v3: - Fixed Typo 'seprate' Changes for v2: - New patch arch/arm/mach-imx/Kconfig | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index ec09ef240f..5dd286f9a7 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -71,6 +71,17 @@ config CMD_HDMIDETECT This enables the 'hdmidet' command which detects if an HDMI monitor is connected. +config CMD_NANDBCB + bool "i.MX6 NAND Boot Control Block(BCB) command" + depends on NAND && CMD_MTDPARTS + default y if ARCH_MX6 && NAND_MXS + help + Unlike normal 'nand write/erase' commands, this command update + Boot Control Block(BCB) for i.MX6 platform NAND IP's. + + This is similar to kobs-ng, which is used in Linux as separate + rootfs package. + config NXP_BOARD_REVISION bool "Read NXP board revision from fuses" depends on ARCH_MX6 || ARCH_MX7 -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] watchdog: Split WDT from SPL_WDT
On Thu, 6 Jun 2019 10:23:06 +0200
Marek Vasut wrote:
> On 6/6/19 10:16 AM, Lukasz Majewski wrote:
> > On Thu, 6 Jun 2019 10:08:04 +0200
> > Marek Vasut wrote:
> >
> >> On 6/6/19 10:00 AM, Lukasz Majewski wrote:
> >>> On Thu, 6 Jun 2019 09:26:04 +0200
> >>> Marek Vasut wrote:
> >>>
> On 6/6/19 9:09 AM, Lukasz Majewski wrote:
> > On Wed, 5 Jun 2019 18:24:11 +0200
> > Lukasz Majewski wrote:
> >
> >> Hi Marek,
> >>
> >>> On Sun, 12 May 2019 23:34:52 +0200
> >>> Marek Vasut wrote:
> >>>
> Use CONFIG_IS_ENABLED(WDT) to permit use of WDT in SPL
> without DM, while the full U-Boot can use rich DM/DT WDT
> driver.
>
> Signed-off-by: Marek Vasut
> Cc: Peng Fan
> Cc: Stefano Babic
> ---
> common/board_r.c | 2 +-
> common/spl/spl.c | 2 +-
> drivers/watchdog/Makefile | 2 +-
> include/asm-generic/global_data.h | 2 +-
> include/wdt.h | 2 +-
> 5 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/common/board_r.c b/common/board_r.c
> index 150e8cd424..988e40abb2 100644
> --- a/common/board_r.c
> +++ b/common/board_r.c
> @@ -678,7 +678,7 @@ static init_fnc_t init_sequence_r[] = {
> #ifdef CONFIG_DM
> initr_dm,
> #endif
> -#if defined(CONFIG_WDT)
> +#if CONFIG_IS_ENABLED(WDT)
> initr_watchdog,
> #endif
> #if defined(CONFIG_ARM) || defined(CONFIG_NDS32) ||
> defined(CONFIG_RISCV) || \ diff --git a/common/spl/spl.c
> b/common/spl/spl.c index 0a6a47c202..f22f854718 100644
> --- a/common/spl/spl.c
> +++ b/common/spl/spl.c
> @@ -601,7 +601,7 @@ void board_init_r(gd_t *dummy1, ulong
> dummy2) spl_board_init();
> #endif
>
> -#if defined(CONFIG_SPL_WATCHDOG_SUPPORT) &&
> defined(CONFIG_WDT) +#if defined(CONFIG_SPL_WATCHDOG_SUPPORT)
> && CONFIG_IS_ENABLED(WDT) initr_watchdog();
> #endif
>
> diff --git a/drivers/watchdog/Makefile
> b/drivers/watchdog/Makefile index 40b2f4bc66..4b94ae988c
> 100644 --- a/drivers/watchdog/Makefile
> +++ b/drivers/watchdog/Makefile
> @@ -16,7 +16,7 @@ obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
> obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
> obj-$(CONFIG_TANGIER_WATCHDOG) += tangier_wdt.o
> obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
> -obj-$(CONFIG_WDT) += wdt-uclass.o
> +obj-$(CONFIG_$(SPL_TPL_)WDT) += wdt-uclass.o
> obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o
> obj-$(CONFIG_WDT_ARMADA_37XX) += armada-37xx-wdt.o
> obj-$(CONFIG_WDT_ASPEED) += ast_wdt.o
> diff --git a/include/asm-generic/global_data.h
> b/include/asm-generic/global_data.h index
> 02a3ed6838..7c2220643b 100644 ---
> a/include/asm-generic/global_data.h +++
> b/include/asm-generic/global_data.h @@ -137,7 +137,7 @@
> typedef struct global_data { #if
> defined(CONFIG_TRANSLATION_OFFSET) fdt_addr_t
> translation_offset; /* optional translation offset */
> #endif -#if defined(CONFIG_WDT)
> +#if CONFIG_IS_ENABLED(WDT)
> struct udevice *watchdog_dev;
> #endif
> } gd_t;
> diff --git a/include/wdt.h b/include/wdt.h
> index aa77d3e9b4..5bcff24ab3 100644
> --- a/include/wdt.h
> +++ b/include/wdt.h
> @@ -106,7 +106,7 @@ struct wdt_ops {
> int (*expire_now)(struct udevice *dev, ulong flags);
> };
>
> -#if defined(CONFIG_WDT)
> +#if CONFIG_IS_ENABLED(WDT)
> #ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
> #define CONFIG_WATCHDOG_TIMEOUT_MSECS (60 * 1000)
> #endif
> >>>
> >>> Tested-by: Lukasz Majewski
> >>>
> >>> Test HW: display5 i.MX6Q device
> >>>
> >>
> >> Unfortunately this series causes build break when run on
> >> Travis-CI for some Atmel/Microchip:
> >>
> >> arm: + picosam9g45
> >> +lib/built-in.o: In function `udelay':
> >> +lib/time.c:167: undefined reference to `watchdog_reset'
> >> +drivers/built-in.o: In function `atmel_serial_getc':
> >> +drivers/serial/atmel_usart.c:103: undefined reference to
> >>`watchdog_reset' +make[2]: *** [spl/u-boot-spl] Error 1
> >> +make[1]: *** [spl/u-boot-spl] Error 2
> >> +make: *** [sub-make] Error 2
> >>14 381 /53 axm
> >> boards.cfg is up to date. Nothing to do.
> >> Summary of current source for 53 boards (2 threads, 1 job per
> >> thread)
> >>
> >>
> >>
Re: [U-Boot] [PATCH 1/2] watchdog: Split WDT from SPL_WDT
On 6/6/19 10:16 AM, Lukasz Majewski wrote:
> On Thu, 6 Jun 2019 10:08:04 +0200
> Marek Vasut wrote:
>
>> On 6/6/19 10:00 AM, Lukasz Majewski wrote:
>>> On Thu, 6 Jun 2019 09:26:04 +0200
>>> Marek Vasut wrote:
>>>
On 6/6/19 9:09 AM, Lukasz Majewski wrote:
> On Wed, 5 Jun 2019 18:24:11 +0200
> Lukasz Majewski wrote:
>
>> Hi Marek,
>>
>>> On Sun, 12 May 2019 23:34:52 +0200
>>> Marek Vasut wrote:
>>>
Use CONFIG_IS_ENABLED(WDT) to permit use of WDT in SPL without
DM, while the full U-Boot can use rich DM/DT WDT driver.
Signed-off-by: Marek Vasut
Cc: Peng Fan
Cc: Stefano Babic
---
common/board_r.c | 2 +-
common/spl/spl.c | 2 +-
drivers/watchdog/Makefile | 2 +-
include/asm-generic/global_data.h | 2 +-
include/wdt.h | 2 +-
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/common/board_r.c b/common/board_r.c
index 150e8cd424..988e40abb2 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -678,7 +678,7 @@ static init_fnc_t init_sequence_r[] = {
#ifdef CONFIG_DM
initr_dm,
#endif
-#if defined(CONFIG_WDT)
+#if CONFIG_IS_ENABLED(WDT)
initr_watchdog,
#endif
#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) ||
defined(CONFIG_RISCV) || \ diff --git a/common/spl/spl.c
b/common/spl/spl.c index 0a6a47c202..f22f854718 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -601,7 +601,7 @@ void board_init_r(gd_t *dummy1, ulong
dummy2) spl_board_init();
#endif
-#if defined(CONFIG_SPL_WATCHDOG_SUPPORT) &&
defined(CONFIG_WDT) +#if defined(CONFIG_SPL_WATCHDOG_SUPPORT)
&& CONFIG_IS_ENABLED(WDT) initr_watchdog();
#endif
diff --git a/drivers/watchdog/Makefile
b/drivers/watchdog/Makefile index 40b2f4bc66..4b94ae988c 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -16,7 +16,7 @@ obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
obj-$(CONFIG_TANGIER_WATCHDOG) += tangier_wdt.o
obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
-obj-$(CONFIG_WDT) += wdt-uclass.o
+obj-$(CONFIG_$(SPL_TPL_)WDT) += wdt-uclass.o
obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o
obj-$(CONFIG_WDT_ARMADA_37XX) += armada-37xx-wdt.o
obj-$(CONFIG_WDT_ASPEED) += ast_wdt.o
diff --git a/include/asm-generic/global_data.h
b/include/asm-generic/global_data.h index
02a3ed6838..7c2220643b 100644 ---
a/include/asm-generic/global_data.h +++
b/include/asm-generic/global_data.h @@ -137,7 +137,7 @@
typedef struct global_data { #if
defined(CONFIG_TRANSLATION_OFFSET) fdt_addr_t
translation_offset;/* optional translation offset */
#endif -#if defined(CONFIG_WDT)
+#if CONFIG_IS_ENABLED(WDT)
struct udevice *watchdog_dev;
#endif
} gd_t;
diff --git a/include/wdt.h b/include/wdt.h
index aa77d3e9b4..5bcff24ab3 100644
--- a/include/wdt.h
+++ b/include/wdt.h
@@ -106,7 +106,7 @@ struct wdt_ops {
int (*expire_now)(struct udevice *dev, ulong flags);
};
-#if defined(CONFIG_WDT)
+#if CONFIG_IS_ENABLED(WDT)
#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
#define CONFIG_WATCHDOG_TIMEOUT_MSECS (60 * 1000)
#endif
>>>
>>> Tested-by: Lukasz Majewski
>>>
>>> Test HW: display5 i.MX6Q device
>>>
>>
>> Unfortunately this series causes build break when run on
>> Travis-CI for some Atmel/Microchip:
>>
>> arm: + picosam9g45
>> +lib/built-in.o: In function `udelay':
>> +lib/time.c:167: undefined reference to `watchdog_reset'
>> +drivers/built-in.o: In function `atmel_serial_getc':
>> +drivers/serial/atmel_usart.c:103: undefined reference to
>>`watchdog_reset' +make[2]: *** [spl/u-boot-spl] Error 1
>> +make[1]: *** [spl/u-boot-spl] Error 2
>> +make: *** [sub-make] Error 2
>>14 381 /53 axm
>> boards.cfg is up to date. Nothing to do.
>> Summary of current source for 53 boards (2 threads, 1 job per
>> thread)
>>
>>
>> u-boot master SHA1: e1a2ed7180adeefb6164239a18249dca5701319d
>>
>
> The fix is under Travis-CI testing:
> https://travis-ci.org/lmajewski/u-boot-dfu/builds/542118403
>
> I will post patches when it finishes.
What's the fix ?
>>>
>>>
Re: [U-Boot] [PATCH 1/2] watchdog: Split WDT from SPL_WDT
On Thu, 6 Jun 2019 10:08:04 +0200
Marek Vasut wrote:
> On 6/6/19 10:00 AM, Lukasz Majewski wrote:
> > On Thu, 6 Jun 2019 09:26:04 +0200
> > Marek Vasut wrote:
> >
> >> On 6/6/19 9:09 AM, Lukasz Majewski wrote:
> >>> On Wed, 5 Jun 2019 18:24:11 +0200
> >>> Lukasz Majewski wrote:
> >>>
> Hi Marek,
>
> > On Sun, 12 May 2019 23:34:52 +0200
> > Marek Vasut wrote:
> >
> >> Use CONFIG_IS_ENABLED(WDT) to permit use of WDT in SPL without
> >> DM, while the full U-Boot can use rich DM/DT WDT driver.
> >>
> >> Signed-off-by: Marek Vasut
> >> Cc: Peng Fan
> >> Cc: Stefano Babic
> >> ---
> >> common/board_r.c | 2 +-
> >> common/spl/spl.c | 2 +-
> >> drivers/watchdog/Makefile | 2 +-
> >> include/asm-generic/global_data.h | 2 +-
> >> include/wdt.h | 2 +-
> >> 5 files changed, 5 insertions(+), 5 deletions(-)
> >>
> >> diff --git a/common/board_r.c b/common/board_r.c
> >> index 150e8cd424..988e40abb2 100644
> >> --- a/common/board_r.c
> >> +++ b/common/board_r.c
> >> @@ -678,7 +678,7 @@ static init_fnc_t init_sequence_r[] = {
> >> #ifdef CONFIG_DM
> >>initr_dm,
> >> #endif
> >> -#if defined(CONFIG_WDT)
> >> +#if CONFIG_IS_ENABLED(WDT)
> >>initr_watchdog,
> >> #endif
> >> #if defined(CONFIG_ARM) || defined(CONFIG_NDS32) ||
> >> defined(CONFIG_RISCV) || \ diff --git a/common/spl/spl.c
> >> b/common/spl/spl.c index 0a6a47c202..f22f854718 100644
> >> --- a/common/spl/spl.c
> >> +++ b/common/spl/spl.c
> >> @@ -601,7 +601,7 @@ void board_init_r(gd_t *dummy1, ulong
> >> dummy2) spl_board_init();
> >> #endif
> >>
> >> -#if defined(CONFIG_SPL_WATCHDOG_SUPPORT) &&
> >> defined(CONFIG_WDT) +#if defined(CONFIG_SPL_WATCHDOG_SUPPORT)
> >> && CONFIG_IS_ENABLED(WDT) initr_watchdog();
> >> #endif
> >>
> >> diff --git a/drivers/watchdog/Makefile
> >> b/drivers/watchdog/Makefile index 40b2f4bc66..4b94ae988c 100644
> >> --- a/drivers/watchdog/Makefile
> >> +++ b/drivers/watchdog/Makefile
> >> @@ -16,7 +16,7 @@ obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
> >> obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
> >> obj-$(CONFIG_TANGIER_WATCHDOG) += tangier_wdt.o
> >> obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
> >> -obj-$(CONFIG_WDT) += wdt-uclass.o
> >> +obj-$(CONFIG_$(SPL_TPL_)WDT) += wdt-uclass.o
> >> obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o
> >> obj-$(CONFIG_WDT_ARMADA_37XX) += armada-37xx-wdt.o
> >> obj-$(CONFIG_WDT_ASPEED) += ast_wdt.o
> >> diff --git a/include/asm-generic/global_data.h
> >> b/include/asm-generic/global_data.h index
> >> 02a3ed6838..7c2220643b 100644 ---
> >> a/include/asm-generic/global_data.h +++
> >> b/include/asm-generic/global_data.h @@ -137,7 +137,7 @@
> >> typedef struct global_data { #if
> >> defined(CONFIG_TRANSLATION_OFFSET) fdt_addr_t
> >> translation_offset;/* optional translation offset */
> >> #endif -#if defined(CONFIG_WDT)
> >> +#if CONFIG_IS_ENABLED(WDT)
> >>struct udevice *watchdog_dev;
> >> #endif
> >> } gd_t;
> >> diff --git a/include/wdt.h b/include/wdt.h
> >> index aa77d3e9b4..5bcff24ab3 100644
> >> --- a/include/wdt.h
> >> +++ b/include/wdt.h
> >> @@ -106,7 +106,7 @@ struct wdt_ops {
> >>int (*expire_now)(struct udevice *dev, ulong flags);
> >> };
> >>
> >> -#if defined(CONFIG_WDT)
> >> +#if CONFIG_IS_ENABLED(WDT)
> >> #ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
> >> #define CONFIG_WATCHDOG_TIMEOUT_MSECS (60 * 1000)
> >> #endif
> >
> > Tested-by: Lukasz Majewski
> >
> > Test HW: display5 i.MX6Q device
> >
>
> Unfortunately this series causes build break when run on
> Travis-CI for some Atmel/Microchip:
>
> arm: + picosam9g45
> +lib/built-in.o: In function `udelay':
> +lib/time.c:167: undefined reference to `watchdog_reset'
> +drivers/built-in.o: In function `atmel_serial_getc':
> +drivers/serial/atmel_usart.c:103: undefined reference to
> `watchdog_reset' +make[2]: *** [spl/u-boot-spl] Error 1
> +make[1]: *** [spl/u-boot-spl] Error 2
> +make: *** [sub-make] Error 2
> 14 381 /53 axm
> boards.cfg is up to date. Nothing to do.
> Summary of current source for 53 boards (2 threads, 1 job per
> thread)
>
>
> u-boot master SHA1: e1a2ed7180adeefb6164239a18249dca5701319d
>
> >>>
> >>> The fix is under Travis-CI testing:
> >>> https://travis-ci.org/lmajewski/u-boot-dfu/builds/542118403
> >>>
> >>> I will post patches when it finishes.
> >>
> >> What's the fix ?
> >>
> >
> > https://github.com/lmajewski/u-boot-dfu/commit/98c95790fee02296023a2906811092a1868f622d
Re: [U-Boot] [PATCH 1/2] watchdog: Split WDT from SPL_WDT
On 6/6/19 10:00 AM, Lukasz Majewski wrote:
> On Thu, 6 Jun 2019 09:26:04 +0200
> Marek Vasut wrote:
>
>> On 6/6/19 9:09 AM, Lukasz Majewski wrote:
>>> On Wed, 5 Jun 2019 18:24:11 +0200
>>> Lukasz Majewski wrote:
>>>
Hi Marek,
> On Sun, 12 May 2019 23:34:52 +0200
> Marek Vasut wrote:
>
>> Use CONFIG_IS_ENABLED(WDT) to permit use of WDT in SPL without
>> DM, while the full U-Boot can use rich DM/DT WDT driver.
>>
>> Signed-off-by: Marek Vasut
>> Cc: Peng Fan
>> Cc: Stefano Babic
>> ---
>> common/board_r.c | 2 +-
>> common/spl/spl.c | 2 +-
>> drivers/watchdog/Makefile | 2 +-
>> include/asm-generic/global_data.h | 2 +-
>> include/wdt.h | 2 +-
>> 5 files changed, 5 insertions(+), 5 deletions(-)
>>
>> diff --git a/common/board_r.c b/common/board_r.c
>> index 150e8cd424..988e40abb2 100644
>> --- a/common/board_r.c
>> +++ b/common/board_r.c
>> @@ -678,7 +678,7 @@ static init_fnc_t init_sequence_r[] = {
>> #ifdef CONFIG_DM
>> initr_dm,
>> #endif
>> -#if defined(CONFIG_WDT)
>> +#if CONFIG_IS_ENABLED(WDT)
>> initr_watchdog,
>> #endif
>> #if defined(CONFIG_ARM) || defined(CONFIG_NDS32) ||
>> defined(CONFIG_RISCV) || \ diff --git a/common/spl/spl.c
>> b/common/spl/spl.c index 0a6a47c202..f22f854718 100644
>> --- a/common/spl/spl.c
>> +++ b/common/spl/spl.c
>> @@ -601,7 +601,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
>> spl_board_init();
>> #endif
>>
>> -#if defined(CONFIG_SPL_WATCHDOG_SUPPORT) && defined(CONFIG_WDT)
>> +#if defined(CONFIG_SPL_WATCHDOG_SUPPORT) &&
>> CONFIG_IS_ENABLED(WDT) initr_watchdog();
>> #endif
>>
>> diff --git a/drivers/watchdog/Makefile
>> b/drivers/watchdog/Makefile index 40b2f4bc66..4b94ae988c 100644
>> --- a/drivers/watchdog/Makefile
>> +++ b/drivers/watchdog/Makefile
>> @@ -16,7 +16,7 @@ obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
>> obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
>> obj-$(CONFIG_TANGIER_WATCHDOG) += tangier_wdt.o
>> obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
>> -obj-$(CONFIG_WDT) += wdt-uclass.o
>> +obj-$(CONFIG_$(SPL_TPL_)WDT) += wdt-uclass.o
>> obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o
>> obj-$(CONFIG_WDT_ARMADA_37XX) += armada-37xx-wdt.o
>> obj-$(CONFIG_WDT_ASPEED) += ast_wdt.o
>> diff --git a/include/asm-generic/global_data.h
>> b/include/asm-generic/global_data.h index 02a3ed6838..7c2220643b
>> 100644 --- a/include/asm-generic/global_data.h
>> +++ b/include/asm-generic/global_data.h
>> @@ -137,7 +137,7 @@ typedef struct global_data {
>> #if defined(CONFIG_TRANSLATION_OFFSET)
>> fdt_addr_t translation_offset; /* optional
>> translation offset */ #endif
>> -#if defined(CONFIG_WDT)
>> +#if CONFIG_IS_ENABLED(WDT)
>> struct udevice *watchdog_dev;
>> #endif
>> } gd_t;
>> diff --git a/include/wdt.h b/include/wdt.h
>> index aa77d3e9b4..5bcff24ab3 100644
>> --- a/include/wdt.h
>> +++ b/include/wdt.h
>> @@ -106,7 +106,7 @@ struct wdt_ops {
>> int (*expire_now)(struct udevice *dev, ulong flags);
>> };
>>
>> -#if defined(CONFIG_WDT)
>> +#if CONFIG_IS_ENABLED(WDT)
>> #ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
>> #define CONFIG_WATCHDOG_TIMEOUT_MSECS (60 * 1000)
>> #endif
>
> Tested-by: Lukasz Majewski
>
> Test HW: display5 i.MX6Q device
>
Unfortunately this series causes build break when run on Travis-CI
for some Atmel/Microchip:
arm: + picosam9g45
+lib/built-in.o: In function `udelay':
+lib/time.c:167: undefined reference to `watchdog_reset'
+drivers/built-in.o: In function `atmel_serial_getc':
+drivers/serial/atmel_usart.c:103: undefined reference to
`watchdog_reset' +make[2]: *** [spl/u-boot-spl] Error 1
+make[1]: *** [spl/u-boot-spl] Error 2
+make: *** [sub-make] Error 2
14 381 /53 axm
boards.cfg is up to date. Nothing to do.
Summary of current source for 53 boards (2 threads, 1 job per
thread)
u-boot master SHA1: e1a2ed7180adeefb6164239a18249dca5701319d
>>>
>>> The fix is under Travis-CI testing:
>>> https://travis-ci.org/lmajewski/u-boot-dfu/builds/542118403
>>>
>>> I will post patches when it finishes.
>>
>> What's the fix ?
>>
>
> https://github.com/lmajewski/u-boot-dfu/commit/98c95790fee02296023a2906811092a1868f622d
>
> I've explicitly enabled SPL_WDT=y for affected boards.
I don't think that's the right approach, it should be possible to do
without explicit board config modification. I'm building another take,
since some boards still failed to build.
--
Best regards,
Marek Vasut
Re: [U-Boot] [EXT] Re: [PATCH 4/6] spl: mmc: support loading i.MX container format file
On 6/6/19 9:54 AM, Peng Fan wrote: [...] We would not introduce cypto driver in SPL stage, that means HAB FIT and AHAB container needs to be dropped when SPL loading other images. ROM already provides API for bootloader to authenticate images, introducing complex crypto driver in SPL could enlarge code size and make things complicated. >>> >>> Ah I see, so it's all making the whole crypto simpler by >>> offloading the hard parts into the firmware, which just magically >>> handles everything , without having much extra code in the SPL ? >> >> Yes. Use what ROM provides will make things easier for U-Boot. > > Is it possible to perform a security audit on the ROM as easily as > on U-Boot ? I mean, U-Boot is free software, the source is > available, so security researchers can easily scrutinize it. Is the ROM ? So, here's my two cents (and it may or may not seem contradictory with my opinions in the secure boot thread going on currently on the Linaro Boot Architecture list). Yes, it would and IMHO is better when we use free and open software to solve our problems (and an aside to the RISC-V folks as this is yet another area they can make the world a better place in). But I am a believe in dealing with the world as it stands at times too. The question isn't "can we get NXP to re-spin i.MX8 to use the FIT image format?" as that's obviously going to be "No.". The question is, "can we support this format in a clean manner?" and the answer is obviously "Yes.". So please lets keep that in mind with reviewing the code as at the end of the day it is more beneficial for this to be supported in mainline U-Boot than only >> supported in the vendor tree. >>> >>> Thanks. So I think you agree the current approach. Could I get any A-b >>> or R-b tags from the list? >> >> I would still like an answer to my question about the security auditing >> above. > > Sorry. Missed your thread. I not work on ROM stuff, but I think answer is > no to public. I see. -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] watchdog: Split WDT from SPL_WDT
On Thu, 6 Jun 2019 09:26:04 +0200
Marek Vasut wrote:
> On 6/6/19 9:09 AM, Lukasz Majewski wrote:
> > On Wed, 5 Jun 2019 18:24:11 +0200
> > Lukasz Majewski wrote:
> >
> >> Hi Marek,
> >>
> >>> On Sun, 12 May 2019 23:34:52 +0200
> >>> Marek Vasut wrote:
> >>>
> Use CONFIG_IS_ENABLED(WDT) to permit use of WDT in SPL without
> DM, while the full U-Boot can use rich DM/DT WDT driver.
>
> Signed-off-by: Marek Vasut
> Cc: Peng Fan
> Cc: Stefano Babic
> ---
> common/board_r.c | 2 +-
> common/spl/spl.c | 2 +-
> drivers/watchdog/Makefile | 2 +-
> include/asm-generic/global_data.h | 2 +-
> include/wdt.h | 2 +-
> 5 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/common/board_r.c b/common/board_r.c
> index 150e8cd424..988e40abb2 100644
> --- a/common/board_r.c
> +++ b/common/board_r.c
> @@ -678,7 +678,7 @@ static init_fnc_t init_sequence_r[] = {
> #ifdef CONFIG_DM
> initr_dm,
> #endif
> -#if defined(CONFIG_WDT)
> +#if CONFIG_IS_ENABLED(WDT)
> initr_watchdog,
> #endif
> #if defined(CONFIG_ARM) || defined(CONFIG_NDS32) ||
> defined(CONFIG_RISCV) || \ diff --git a/common/spl/spl.c
> b/common/spl/spl.c index 0a6a47c202..f22f854718 100644
> --- a/common/spl/spl.c
> +++ b/common/spl/spl.c
> @@ -601,7 +601,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
> spl_board_init();
> #endif
>
> -#if defined(CONFIG_SPL_WATCHDOG_SUPPORT) && defined(CONFIG_WDT)
> +#if defined(CONFIG_SPL_WATCHDOG_SUPPORT) &&
> CONFIG_IS_ENABLED(WDT) initr_watchdog();
> #endif
>
> diff --git a/drivers/watchdog/Makefile
> b/drivers/watchdog/Makefile index 40b2f4bc66..4b94ae988c 100644
> --- a/drivers/watchdog/Makefile
> +++ b/drivers/watchdog/Makefile
> @@ -16,7 +16,7 @@ obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
> obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
> obj-$(CONFIG_TANGIER_WATCHDOG) += tangier_wdt.o
> obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
> -obj-$(CONFIG_WDT) += wdt-uclass.o
> +obj-$(CONFIG_$(SPL_TPL_)WDT) += wdt-uclass.o
> obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o
> obj-$(CONFIG_WDT_ARMADA_37XX) += armada-37xx-wdt.o
> obj-$(CONFIG_WDT_ASPEED) += ast_wdt.o
> diff --git a/include/asm-generic/global_data.h
> b/include/asm-generic/global_data.h index 02a3ed6838..7c2220643b
> 100644 --- a/include/asm-generic/global_data.h
> +++ b/include/asm-generic/global_data.h
> @@ -137,7 +137,7 @@ typedef struct global_data {
> #if defined(CONFIG_TRANSLATION_OFFSET)
> fdt_addr_t translation_offset; /* optional
> translation offset */ #endif
> -#if defined(CONFIG_WDT)
> +#if CONFIG_IS_ENABLED(WDT)
> struct udevice *watchdog_dev;
> #endif
> } gd_t;
> diff --git a/include/wdt.h b/include/wdt.h
> index aa77d3e9b4..5bcff24ab3 100644
> --- a/include/wdt.h
> +++ b/include/wdt.h
> @@ -106,7 +106,7 @@ struct wdt_ops {
> int (*expire_now)(struct udevice *dev, ulong flags);
> };
>
> -#if defined(CONFIG_WDT)
> +#if CONFIG_IS_ENABLED(WDT)
> #ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
> #define CONFIG_WATCHDOG_TIMEOUT_MSECS (60 * 1000)
> #endif
> >>>
> >>> Tested-by: Lukasz Majewski
> >>>
> >>> Test HW: display5 i.MX6Q device
> >>>
> >>
> >> Unfortunately this series causes build break when run on Travis-CI
> >> for some Atmel/Microchip:
> >>
> >> arm: + picosam9g45
> >> +lib/built-in.o: In function `udelay':
> >> +lib/time.c:167: undefined reference to `watchdog_reset'
> >> +drivers/built-in.o: In function `atmel_serial_getc':
> >> +drivers/serial/atmel_usart.c:103: undefined reference to
> >>`watchdog_reset' +make[2]: *** [spl/u-boot-spl] Error 1
> >> +make[1]: *** [spl/u-boot-spl] Error 2
> >> +make: *** [sub-make] Error 2
> >>14 381 /53 axm
> >> boards.cfg is up to date. Nothing to do.
> >> Summary of current source for 53 boards (2 threads, 1 job per
> >> thread)
> >>
> >>
> >> u-boot master SHA1: e1a2ed7180adeefb6164239a18249dca5701319d
> >>
> >
> > The fix is under Travis-CI testing:
> > https://travis-ci.org/lmajewski/u-boot-dfu/builds/542118403
> >
> > I will post patches when it finishes.
>
> What's the fix ?
>
https://github.com/lmajewski/u-boot-dfu/commit/98c95790fee02296023a2906811092a1868f622d
I've explicitly enabled SPL_WDT=y for affected boards.
> I am testing this since yesterday:
> https://github.com/marex/u-boot-imx/commit/c8e1bff9f332a35859e1f4d44e114c3aa639b390
>
However, if your version is building without any issues, it looks
better than mine (IMHO imply is more elegant).
Best regards,
Lukasz Majewski
--
DENX Software
[U-Boot] [PATCH v2] lib: Makefile: build fdtdec_common.c when OF_LIBFDT selected
When build SPL_OF_PLATDATA on i.MX6, meet issue the fdtdec_get_int not defined, however fdtdec.c will use fdtdec_get_int, so let's compile fdtdec_common.c when OF_LIBFDT selected. Since there is also SPL_OF_LIBFDT, so need to use CONFIG_$(SPL_TPL_)OF_LIBFDT. Signed-off-by: Peng Fan --- lib/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Makefile b/lib/Makefile index 09c45b8122..2fffd68f94 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -88,7 +88,7 @@ obj-y += crc32.o obj-$(CONFIG_CRC32C) += crc32c.o obj-y += ctype.o obj-y += div64.o -obj-$(CONFIG_OF_LIBFDT) += fdtdec.o +obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdtdec.o fdtdec_common.o obj-y += hang.o obj-y += linux_compat.o obj-y += linux_string.o -- 2.16.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [EXT] Re: [PATCH 4/6] spl: mmc: support loading i.MX container format file
> Subject: Re: [EXT] Re: [U-Boot] [PATCH 4/6] spl: mmc: support loading i.MX > container format file > > On 6/6/19 4:33 AM, Peng Fan wrote: > >> Subject: Re: [EXT] Re: [U-Boot] [PATCH 4/6] spl: mmc: support loading > >> i.MX container format file > >> > >> On Wed, Jun 05, 2019 at 03:24:40PM +0200, Marek Vasut wrote: > >>> On 6/5/19 5:03 AM, Peng Fan wrote: > >>> [...] > It is not duplication of FIT. Container support the similar > function of FIT image, but it is not only that. > >>> > >>> So what is it ? > >> > >> > > > >> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww. > >> > > > >> > nxp.com%2Fdocs%2Fen%2Freference-manual%2FIMX8DQXPRM.pdfda > > ta=02%7C > >> > > > >> > 01%7Cpeng.fan%40nxp.com%7C72216052f4234a93ad1f08d6e95ed782%7C6 > > 86ea1d3b > >> > > > >> > c2b4c6fa92cd99c5c301635%7C0%7C1%7C636952990895125305sdat > > a=KO%2B0e > >> > > > >> > E3v%2FkHuJ%2BhR7mBgc4NWXxbMUupfubXXu%2BueIWo%3Dreserv > > ed=0 > >> Chapter 5 has information about container set and container. > > > > Thanks, any specific part of those 80 pages ? > > Figure 5-24. Container Format has a picture about a single container. > i.MX8 container also support container sets, support encrypt blob, > certificates, SRK management. Support signature to the whole > container, no need single image inside container. > >>> > >>> Isn't that all supported in fitImage too ? > >> > >> This is neither the first nor last time functionality has been > >> essentially duplicated, sadly, for reasons. > > > > I'll share the fit things to our ROM stakeholders, but they take > > decision on new SoC design. > > > >> > >>> I don't think I get it. Why would I, as an iMX8 user, want to > >>> pick custom new vendor-specific format over years-proven generic > >> fitImage? > >> > >> We not against FIT, we already use FIT on i.MX8M, to let spl to > >> authenticate FIT image using ROM HAB, not using crypto driver. > > > > Great > > > >>> What is the selling point here ? > >> > >> We would not introduce cypto driver in SPL stage, that means HAB > >> FIT and AHAB container needs to be dropped when SPL loading other > >> images. > >> ROM already provides API for bootloader to authenticate images, > >> introducing complex crypto driver in SPL could enlarge code size > >> and make things complicated. > > > > Ah I see, so it's all making the whole crypto simpler by > > offloading the hard parts into the firmware, which just magically > > handles everything , without having much extra code in the SPL ? > > Yes. Use what ROM provides will make things easier for U-Boot. > >>> > >>> Is it possible to perform a security audit on the ROM as easily as > >>> on U-Boot ? I mean, U-Boot is free software, the source is > >>> available, so security researchers can easily scrutinize it. Is the ROM ? > >> > >> So, here's my two cents (and it may or may not seem contradictory > >> with my opinions in the secure boot thread going on currently on the > >> Linaro Boot Architecture list). Yes, it would and IMHO is better > >> when we use free and open software to solve our problems (and an > >> aside to the RISC-V folks as this is yet another area they can make > >> the world a better place in). But I am a believe in dealing with the > >> world as it stands at times too. The question isn't "can we get NXP > >> to re-spin i.MX8 to use the FIT image format?" as that's obviously > >> going to be "No.". The question is, "can we support this format in a > >> clean manner?" and the answer is obviously "Yes.". So please lets > >> keep that in mind with reviewing the code as at the end of the day it > >> is more beneficial for this to be supported in mainline U-Boot than only > supported in the vendor tree. > > > > Thanks. So I think you agree the current approach. Could I get any A-b > > or R-b tags from the list? > > I would still like an answer to my question about the security auditing above. Sorry. Missed your thread. I not work on ROM stuff, but I think answer is no to public. Thanks, Peng. > > -- > Best regards, > Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] aspeed/watchdog: Correct timeout value
The driver was using milliseconds and programming it into a register
which takes ticks of the watchdog clock, which runs at 1MHz. This meant
we were off by 1000 with the desired value.
When 06985289d452 ("watchdog: Implement generic watchdog_reset()
version") was added the aspeed board would leave the watchdog running,
causing it to bite before u-boot was done.
Discovered by booting in qemu:
$ qemu-system-arm -M ast2500-evb -drive file=test.img,format=raw,if=mtd
-nographic -no-reboot -d cpu_reset
U-Boot 2019.07-rc3-00091-g2253e40caef5 (Jun 06 2019 - 16:53:23 +0930)
Model: Aspeed BMC
DRAM: 496 MiB
WDT: Started with servicing (60s timeout)
MMC:
In:serial@1e784000
Out: serial@1e784000
Err: serial@1e784000
Watchdog timer expired.
Fixes: 06985289d452 ("watchdog: Implement generic watchdog_reset() version")
Signed-off-by: Joel Stanley
---
drivers/watchdog/ast_wdt.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/watchdog/ast_wdt.c b/drivers/watchdog/ast_wdt.c
index 523484b1fff9..d344d54aee82 100644
--- a/drivers/watchdog/ast_wdt.c
+++ b/drivers/watchdog/ast_wdt.c
@@ -23,6 +23,12 @@ static int ast_wdt_start(struct udevice *dev, u64 timeout,
ulong flags)
ulong driver_data = dev_get_driver_data(dev);
u32 reset_mode = ast_reset_mode_from_flags(flags);
+ /* 32 bits at 1MHz is 4294967ms */
+ timeout = min_t(u64, timeout, 4294967);
+
+ /* WDT counts in ticks of 1MHz clock. 1ms / 1e3 * 1e6 */
+ timeout *= 1000;
+
clrsetbits_le32(>regs->ctrl,
WDT_CTRL_RESET_MASK << WDT_CTRL_RESET_MODE_SHIFT,
reset_mode << WDT_CTRL_RESET_MODE_SHIFT);
--
2.20.1
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [EXT] Re: [PATCH 4/6] spl: mmc: support loading i.MX container format file
On 6/6/19 4:33 AM, Peng Fan wrote: >> Subject: Re: [EXT] Re: [U-Boot] [PATCH 4/6] spl: mmc: support loading i.MX >> container format file >> >> On Wed, Jun 05, 2019 at 03:24:40PM +0200, Marek Vasut wrote: >>> On 6/5/19 5:03 AM, Peng Fan wrote: >>> [...] It is not duplication of FIT. Container support the similar function of FIT image, but it is not only that. >>> >>> So what is it ? >> >> > >> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww. >> > >> nxp.com%2Fdocs%2Fen%2Freference-manual%2FIMX8DQXPRM.pdfda > ta=02%7C >> > >> 01%7Cpeng.fan%40nxp.com%7C72216052f4234a93ad1f08d6e95ed782%7C6 > 86ea1d3b >> > >> c2b4c6fa92cd99c5c301635%7C0%7C1%7C636952990895125305sdat > a=KO%2B0e >> > >> E3v%2FkHuJ%2BhR7mBgc4NWXxbMUupfubXXu%2BueIWo%3Dreserv > ed=0 >> Chapter 5 has information about container set and container. > > Thanks, any specific part of those 80 pages ? Figure 5-24. Container Format has a picture about a single container. i.MX8 container also support container sets, support encrypt blob, certificates, SRK management. Support signature to the whole container, no need single image inside container. >>> >>> Isn't that all supported in fitImage too ? >> >> This is neither the first nor last time functionality has been essentially >> duplicated, sadly, for reasons. > > I'll share the fit things to our ROM stakeholders, but they take decision > on new SoC design. > >> >>> I don't think I get it. Why would I, as an iMX8 user, want to >>> pick custom new vendor-specific format over years-proven generic >> fitImage? >> >> We not against FIT, we already use FIT on i.MX8M, to let spl to >> authenticate FIT image using ROM HAB, not using crypto driver. > > Great > >>> What is the selling point here ? >> >> We would not introduce cypto driver in SPL stage, that means HAB >> FIT and AHAB container needs to be dropped when SPL loading other >> images. >> ROM already provides API for bootloader to authenticate images, >> introducing complex crypto driver in SPL could enlarge code size >> and make things complicated. > > Ah I see, so it's all making the whole crypto simpler by offloading > the hard parts into the firmware, which just magically handles > everything , without having much extra code in the SPL ? Yes. Use what ROM provides will make things easier for U-Boot. >>> >>> Is it possible to perform a security audit on the ROM as easily as on >>> U-Boot ? I mean, U-Boot is free software, the source is available, so >>> security researchers can easily scrutinize it. Is the ROM ? >> >> So, here's my two cents (and it may or may not seem contradictory with my >> opinions in the secure boot thread going on currently on the Linaro Boot >> Architecture list). Yes, it would and IMHO is better when we use free and >> open software to solve our problems (and an aside to the RISC-V folks as this >> is yet another area they can make the world a better place in). But I am a >> believe in dealing with the world as it stands at times too. The question >> isn't >> "can we get NXP to re-spin i.MX8 to use the FIT image format?" as that's >> obviously going to be "No.". The question is, "can we support this format in >> a clean manner?" and the answer is obviously "Yes.". So please lets keep >> that in mind with reviewing the code as at the end of the day it is more >> beneficial for this to be supported in mainline U-Boot than only supported in >> the vendor tree. > > Thanks. So I think you agree the current approach. Could I get any A-b or R-b > tags from the list? I would still like an answer to my question about the security auditing above. -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] i.MX8MM mapped register access causes crashes
> Subject: Re: [U-Boot] i.MX8MM mapped register access causes crashes > > On 06.06.19 03:58, Peng Fan wrote: > > > >> Subject: Re: [U-Boot] i.MX8MM mapped register access causes crashes > >> > >> On Wed, Jun 5, 2019 at 10:52 PM Peng Fan wrote: > >> > >>> You need to pass an arg after `md 0x302d`. Default it will dump > >>> a lot registers, might 40 registers. It surely will crash, because > >>> there are only a few registers in GPT1 which is the address you are > dumping. > >> > >> Other suggestion is to make sure that the clock for the peripheral > >> you are trying to access is turned on. > > > > Dump `md 0x302d 1` will surely work, but dump `md 0x302d 100` > > will surely crash. The clock already on. It is that GPT1 does not have > > 100 registers, and trigger error when dumping non-existed registers. > > Thanks for your suggestions. I just used GPT1 as an example. As you can see > GPT1 registers can be dumped, but at the start of GPT2 it crashes. > > I have the same problem for all kinds of other peripherals. For example I > tried > to enable I2C1, but the driver hangs in probe when it accesses an I2C1 > register for the first time. > > I suspect that this is either, as Fabio said, caused by clocks that are > turned off, > or because of trustzone settings. I'm not loading any ATF at the moment, so > I'm booting from SPL directly to U-Boot proper and I'm not sure if the > trustzone settings restrict access to the peripherals in this case. Ok, clock might be an issue, you could check CCM and LPCG, default it will source 24M and enabled. You might need check CSU, if GPT1 is ok, GPT2 is bad. Regards, Peng. > > Thanks, > Frieder ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] watchdog: Split WDT from SPL_WDT
On 6/6/19 9:09 AM, Lukasz Majewski wrote:
> On Wed, 5 Jun 2019 18:24:11 +0200
> Lukasz Majewski wrote:
>
>> Hi Marek,
>>
>>> On Sun, 12 May 2019 23:34:52 +0200
>>> Marek Vasut wrote:
>>>
Use CONFIG_IS_ENABLED(WDT) to permit use of WDT in SPL without DM,
while the full U-Boot can use rich DM/DT WDT driver.
Signed-off-by: Marek Vasut
Cc: Peng Fan
Cc: Stefano Babic
---
common/board_r.c | 2 +-
common/spl/spl.c | 2 +-
drivers/watchdog/Makefile | 2 +-
include/asm-generic/global_data.h | 2 +-
include/wdt.h | 2 +-
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/common/board_r.c b/common/board_r.c
index 150e8cd424..988e40abb2 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -678,7 +678,7 @@ static init_fnc_t init_sequence_r[] = {
#ifdef CONFIG_DM
initr_dm,
#endif
-#if defined(CONFIG_WDT)
+#if CONFIG_IS_ENABLED(WDT)
initr_watchdog,
#endif
#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) ||
defined(CONFIG_RISCV) || \ diff --git a/common/spl/spl.c
b/common/spl/spl.c index 0a6a47c202..f22f854718 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -601,7 +601,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
spl_board_init();
#endif
-#if defined(CONFIG_SPL_WATCHDOG_SUPPORT) && defined(CONFIG_WDT)
+#if defined(CONFIG_SPL_WATCHDOG_SUPPORT) &&
CONFIG_IS_ENABLED(WDT) initr_watchdog();
#endif
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 40b2f4bc66..4b94ae988c 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -16,7 +16,7 @@ obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
obj-$(CONFIG_TANGIER_WATCHDOG) += tangier_wdt.o
obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
-obj-$(CONFIG_WDT) += wdt-uclass.o
+obj-$(CONFIG_$(SPL_TPL_)WDT) += wdt-uclass.o
obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o
obj-$(CONFIG_WDT_ARMADA_37XX) += armada-37xx-wdt.o
obj-$(CONFIG_WDT_ASPEED) += ast_wdt.o
diff --git a/include/asm-generic/global_data.h
b/include/asm-generic/global_data.h index 02a3ed6838..7c2220643b
100644 --- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -137,7 +137,7 @@ typedef struct global_data {
#if defined(CONFIG_TRANSLATION_OFFSET)
fdt_addr_t translation_offset; /* optional
translation offset */ #endif
-#if defined(CONFIG_WDT)
+#if CONFIG_IS_ENABLED(WDT)
struct udevice *watchdog_dev;
#endif
} gd_t;
diff --git a/include/wdt.h b/include/wdt.h
index aa77d3e9b4..5bcff24ab3 100644
--- a/include/wdt.h
+++ b/include/wdt.h
@@ -106,7 +106,7 @@ struct wdt_ops {
int (*expire_now)(struct udevice *dev, ulong flags);
};
-#if defined(CONFIG_WDT)
+#if CONFIG_IS_ENABLED(WDT)
#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
#define CONFIG_WATCHDOG_TIMEOUT_MSECS (60 * 1000)
#endif
>>>
>>> Tested-by: Lukasz Majewski
>>>
>>> Test HW: display5 i.MX6Q device
>>>
>>
>> Unfortunately this series causes build break when run on Travis-CI for
>> some Atmel/Microchip:
>>
>> arm: + picosam9g45
>> +lib/built-in.o: In function `udelay':
>> +lib/time.c:167: undefined reference to `watchdog_reset'
>> +drivers/built-in.o: In function `atmel_serial_getc':
>> +drivers/serial/atmel_usart.c:103: undefined reference to
>>`watchdog_reset' +make[2]: *** [spl/u-boot-spl] Error 1
>> +make[1]: *** [spl/u-boot-spl] Error 2
>> +make: *** [sub-make] Error 2
>>14 381 /53 axm
>> boards.cfg is up to date. Nothing to do.
>> Summary of current source for 53 boards (2 threads, 1 job per thread)
>>
>>
>> u-boot master SHA1: e1a2ed7180adeefb6164239a18249dca5701319d
>>
>
> The fix is under Travis-CI testing:
> https://travis-ci.org/lmajewski/u-boot-dfu/builds/542118403
>
> I will post patches when it finishes.
What's the fix ?
I am testing this since yesterday:
https://github.com/marex/u-boot-imx/commit/c8e1bff9f332a35859e1f4d44e114c3aa639b390
--
Best regards,
Marek Vasut
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Re: [U-Boot] [EXT] Re: [PATCH 4/6] spl: mmc: support loading i.MX container format file
> Subject: Re: [EXT] Re: [U-Boot] [PATCH 4/6] spl: mmc: support loading i.MX > container format file > > On Thu, 6 Jun 2019 02:33:14 + > Peng Fan wrote: > > > > Subject: Re: [EXT] Re: [U-Boot] [PATCH 4/6] spl: mmc: support > > > loading i.MX container format file > > > > > > On Wed, Jun 05, 2019 at 03:24:40PM +0200, Marek Vasut wrote: > > > > On 6/5/19 5:03 AM, Peng Fan wrote: > > > > [...] > > > > > It is not duplication of FIT. Container support the similar > > > > > function of FIT image, but it is not only that. > > > > > > > > So what is it ? > > > > >>> > > > > >>> > > > > >> > > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww. > > > > >>> > > > > >> > > > > nxp.com%2Fdocs%2Fen%2Freference-manual%2FIMX8DQXPRM.pdfda > > > > >> ta=02%7C > > > > >>> > > > > >> > > > > 01%7Cpeng.fan%40nxp.com%7C72216052f4234a93ad1f08d6e95ed782%7C6 > > > > >> 86ea1d3b > > > > >>> > > > > >> > > > > c2b4c6fa92cd99c5c301635%7C0%7C1%7C636952990895125305sdat > > > > >> a=KO%2B0e > > > > >>> > > > > >> > > > > E3v%2FkHuJ%2BhR7mBgc4NWXxbMUupfubXXu%2BueIWo%3Dreserv > > > > >> ed=0 > > > > >>> Chapter 5 has information about container set and container. > > > > >> > > > > >> Thanks, any specific part of those 80 pages ? > > > > > > > > > > Figure 5-24. Container Format has a picture about a single > > > > > container. i.MX8 container also support container sets, support > > > > > encrypt blob, certificates, SRK management. Support signature to > > > > > the whole container, no need single image inside container. > > > > > > > > Isn't that all supported in fitImage too ? > > > > > > This is neither the first nor last time functionality has been > > > essentially duplicated, sadly, for reasons. > > > > I'll share the fit things to our ROM stakeholders, but they take > > decision on new SoC design. > > > > > > > > > I don't think I get it. Why would I, as an iMX8 user, want to > > > > pick custom new vendor-specific format over years-proven > > > > generic > > > fitImage? > > > > >>> > > > > >>> We not against FIT, we already use FIT on i.MX8M, to let spl > > > > >>> to authenticate FIT image using ROM HAB, not using crypto > > > > >>> driver. > > > > >> > > > > >> Great > > > > >> > > > > What is the selling point here ? > > > > >>> > > > > >>> We would not introduce cypto driver in SPL stage, that means > > > > >>> HAB FIT and AHAB container needs to be dropped when SPL > > > > >>> loading other > > > images. > > > > >>> ROM already provides API for bootloader to authenticate > > > > >>> images, introducing complex crypto driver in SPL could enlarge > > > > >>> code size and make things complicated. > > > > >> > > > > >> Ah I see, so it's all making the whole crypto simpler by > > > > >> offloading the hard parts into the firmware, which just > > > > >> magically handles everything , without having much extra code > > > > >> in the SPL ? > > > > > > > > > > Yes. Use what ROM provides will make things easier for U-Boot. > > > > > > > > Is it possible to perform a security audit on the ROM as easily as > > > > on U-Boot ? I mean, U-Boot is free software, the source is > > > > available, so security researchers can easily scrutinize it. Is > > > > the ROM ? > > > > > > So, here's my two cents (and it may or may not seem contradictory > > > with my opinions in the secure boot thread going on currently on the > > > Linaro Boot Architecture list). Yes, it would and IMHO is better > > > when we use free and open software to solve our problems (and an > > > aside to the RISC-V folks as this is yet another area they can make > > > the world a better place in). But I am a believe in dealing with > > > the world as it stands at times too. The question isn't "can we get > > > NXP to re-spin i.MX8 to use the FIT image format?" as that's > > > obviously going to be "No.". The question is, "can we support this > > > format in a clean manner?" and the answer is obviously "Yes.". So > > > please lets keep that in mind with reviewing the code as at the end > > > of the day it is more beneficial for this to be supported in > > > mainline U-Boot than only supported in the vendor tree. > > > > Thanks. So I think you agree the current approach. Could I get any A-b > > or R-b tags from the list? > > Just to add my 2 cents... > > Please if possible provide a good (and as much verbose as possible) entry > to ./doc/README.imx_image (or something) regarding the i.MX8 format. ok. I'll post out a separate patch for that. Regards, Peng. > > Thanks in advance, > > > > > Thanks, > > Peng. > > > > > Thanks! > > > > > > -- > > > Tom > > > > > Best regards, > > Lukasz Majewski > > -- > > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: > lu...@denx.de ___ U-Boot mailing list
Re: [U-Boot] [PATCH 1/2] watchdog: Split WDT from SPL_WDT
On Wed, 5 Jun 2019 18:24:11 +0200
Lukasz Majewski wrote:
> Hi Marek,
>
> > On Sun, 12 May 2019 23:34:52 +0200
> > Marek Vasut wrote:
> >
> > > Use CONFIG_IS_ENABLED(WDT) to permit use of WDT in SPL without DM,
> > > while the full U-Boot can use rich DM/DT WDT driver.
> > >
> > > Signed-off-by: Marek Vasut
> > > Cc: Peng Fan
> > > Cc: Stefano Babic
> > > ---
> > > common/board_r.c | 2 +-
> > > common/spl/spl.c | 2 +-
> > > drivers/watchdog/Makefile | 2 +-
> > > include/asm-generic/global_data.h | 2 +-
> > > include/wdt.h | 2 +-
> > > 5 files changed, 5 insertions(+), 5 deletions(-)
> > >
> > > diff --git a/common/board_r.c b/common/board_r.c
> > > index 150e8cd424..988e40abb2 100644
> > > --- a/common/board_r.c
> > > +++ b/common/board_r.c
> > > @@ -678,7 +678,7 @@ static init_fnc_t init_sequence_r[] = {
> > > #ifdef CONFIG_DM
> > > initr_dm,
> > > #endif
> > > -#if defined(CONFIG_WDT)
> > > +#if CONFIG_IS_ENABLED(WDT)
> > > initr_watchdog,
> > > #endif
> > > #if defined(CONFIG_ARM) || defined(CONFIG_NDS32) ||
> > > defined(CONFIG_RISCV) || \ diff --git a/common/spl/spl.c
> > > b/common/spl/spl.c index 0a6a47c202..f22f854718 100644
> > > --- a/common/spl/spl.c
> > > +++ b/common/spl/spl.c
> > > @@ -601,7 +601,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
> > > spl_board_init();
> > > #endif
> > >
> > > -#if defined(CONFIG_SPL_WATCHDOG_SUPPORT) && defined(CONFIG_WDT)
> > > +#if defined(CONFIG_SPL_WATCHDOG_SUPPORT) &&
> > > CONFIG_IS_ENABLED(WDT) initr_watchdog();
> > > #endif
> > >
> > > diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
> > > index 40b2f4bc66..4b94ae988c 100644
> > > --- a/drivers/watchdog/Makefile
> > > +++ b/drivers/watchdog/Makefile
> > > @@ -16,7 +16,7 @@ obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
> > > obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
> > > obj-$(CONFIG_TANGIER_WATCHDOG) += tangier_wdt.o
> > > obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
> > > -obj-$(CONFIG_WDT) += wdt-uclass.o
> > > +obj-$(CONFIG_$(SPL_TPL_)WDT) += wdt-uclass.o
> > > obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o
> > > obj-$(CONFIG_WDT_ARMADA_37XX) += armada-37xx-wdt.o
> > > obj-$(CONFIG_WDT_ASPEED) += ast_wdt.o
> > > diff --git a/include/asm-generic/global_data.h
> > > b/include/asm-generic/global_data.h index 02a3ed6838..7c2220643b
> > > 100644 --- a/include/asm-generic/global_data.h
> > > +++ b/include/asm-generic/global_data.h
> > > @@ -137,7 +137,7 @@ typedef struct global_data {
> > > #if defined(CONFIG_TRANSLATION_OFFSET)
> > > fdt_addr_t translation_offset; /* optional
> > > translation offset */ #endif
> > > -#if defined(CONFIG_WDT)
> > > +#if CONFIG_IS_ENABLED(WDT)
> > > struct udevice *watchdog_dev;
> > > #endif
> > > } gd_t;
> > > diff --git a/include/wdt.h b/include/wdt.h
> > > index aa77d3e9b4..5bcff24ab3 100644
> > > --- a/include/wdt.h
> > > +++ b/include/wdt.h
> > > @@ -106,7 +106,7 @@ struct wdt_ops {
> > > int (*expire_now)(struct udevice *dev, ulong flags);
> > > };
> > >
> > > -#if defined(CONFIG_WDT)
> > > +#if CONFIG_IS_ENABLED(WDT)
> > > #ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
> > > #define CONFIG_WATCHDOG_TIMEOUT_MSECS(60 * 1000)
> > > #endif
> >
> > Tested-by: Lukasz Majewski
> >
> > Test HW: display5 i.MX6Q device
> >
>
> Unfortunately this series causes build break when run on Travis-CI for
> some Atmel/Microchip:
>
> arm: + picosam9g45
> +lib/built-in.o: In function `udelay':
> +lib/time.c:167: undefined reference to `watchdog_reset'
> +drivers/built-in.o: In function `atmel_serial_getc':
> +drivers/serial/atmel_usart.c:103: undefined reference to
>`watchdog_reset' +make[2]: *** [spl/u-boot-spl] Error 1
> +make[1]: *** [spl/u-boot-spl] Error 2
> +make: *** [sub-make] Error 2
>14 381 /53 axm
> boards.cfg is up to date. Nothing to do.
> Summary of current source for 53 boards (2 threads, 1 job per thread)
>
>
> u-boot master SHA1: e1a2ed7180adeefb6164239a18249dca5701319d
>
The fix is under Travis-CI testing:
https://travis-ci.org/lmajewski/u-boot-dfu/builds/542118403
I will post patches when it finishes.
>
>
> > Best regards,
> >
> > Lukasz Majewski
> >
> > --
> >
> > DENX Software Engineering GmbH, Managing Director: Wolfgang
> > Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell,
> > Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email:
> > lu...@denx.de
>
>
>
>
> Best regards,
>
> Lukasz Majewski
>
> --
>
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email:
> lu...@denx.de
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax:
Re: [U-Boot] [EXT] Re: [PATCH 4/6] spl: mmc: support loading i.MX container format file
On Thu, 6 Jun 2019 02:33:14 + Peng Fan wrote: > > Subject: Re: [EXT] Re: [U-Boot] [PATCH 4/6] spl: mmc: support > > loading i.MX container format file > > > > On Wed, Jun 05, 2019 at 03:24:40PM +0200, Marek Vasut wrote: > > > On 6/5/19 5:03 AM, Peng Fan wrote: > > > [...] > > > > It is not duplication of FIT. Container support the similar > > > > function of FIT image, but it is not only that. > > > > > > So what is it ? > > > >>> > > > >>> > > > >> > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww. > > > >>> > > > >> > > nxp.com%2Fdocs%2Fen%2Freference-manual%2FIMX8DQXPRM.pdfda > > > >> ta=02%7C > > > >>> > > > >> > > 01%7Cpeng.fan%40nxp.com%7C72216052f4234a93ad1f08d6e95ed782%7C6 > > > >> 86ea1d3b > > > >>> > > > >> > > c2b4c6fa92cd99c5c301635%7C0%7C1%7C636952990895125305sdat > > > >> a=KO%2B0e > > > >>> > > > >> > > E3v%2FkHuJ%2BhR7mBgc4NWXxbMUupfubXXu%2BueIWo%3Dreserv > > > >> ed=0 > > > >>> Chapter 5 has information about container set and container. > > > >> > > > >> Thanks, any specific part of those 80 pages ? > > > > > > > > Figure 5-24. Container Format has a picture about a single > > > > container. i.MX8 container also support container sets, support > > > > encrypt blob, certificates, SRK management. Support signature > > > > to the whole container, no need single image inside container. > > > > > > Isn't that all supported in fitImage too ? > > > > This is neither the first nor last time functionality has been > > essentially duplicated, sadly, for reasons. > > I'll share the fit things to our ROM stakeholders, but they take > decision on new SoC design. > > > > > > I don't think I get it. Why would I, as an iMX8 user, want to > > > pick custom new vendor-specific format over years-proven > > > generic > > fitImage? > > > >>> > > > >>> We not against FIT, we already use FIT on i.MX8M, to let spl > > > >>> to authenticate FIT image using ROM HAB, not using crypto > > > >>> driver. > > > >> > > > >> Great > > > >> > > > What is the selling point here ? > > > >>> > > > >>> We would not introduce cypto driver in SPL stage, that means > > > >>> HAB FIT and AHAB container needs to be dropped when SPL > > > >>> loading other > > images. > > > >>> ROM already provides API for bootloader to authenticate > > > >>> images, introducing complex crypto driver in SPL could > > > >>> enlarge code size and make things complicated. > > > >> > > > >> Ah I see, so it's all making the whole crypto simpler by > > > >> offloading the hard parts into the firmware, which just > > > >> magically handles everything , without having much extra code > > > >> in the SPL ? > > > > > > > > Yes. Use what ROM provides will make things easier for U-Boot. > > > > > > Is it possible to perform a security audit on the ROM as easily > > > as on U-Boot ? I mean, U-Boot is free software, the source is > > > available, so security researchers can easily scrutinize it. Is > > > the ROM ? > > > > So, here's my two cents (and it may or may not seem contradictory > > with my opinions in the secure boot thread going on currently on > > the Linaro Boot Architecture list). Yes, it would and IMHO is > > better when we use free and open software to solve our problems > > (and an aside to the RISC-V folks as this is yet another area they > > can make the world a better place in). But I am a believe in > > dealing with the world as it stands at times too. The question > > isn't "can we get NXP to re-spin i.MX8 to use the FIT image > > format?" as that's obviously going to be "No.". The question is, > > "can we support this format in a clean manner?" and the answer is > > obviously "Yes.". So please lets keep that in mind with reviewing > > the code as at the end of the day it is more beneficial for this to > > be supported in mainline U-Boot than only supported in the vendor > > tree. > > Thanks. So I think you agree the current approach. Could I get any > A-b or R-b tags from the list? Just to add my 2 cents... Please if possible provide a good (and as much verbose as possible) entry to ./doc/README.imx_image (or something) regarding the i.MX8 format. Thanks in advance, > > Thanks, > Peng. > > > Thanks! > > > > -- > > Tom Best regards, Lukasz Majewski -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de pgpweJyQXgFss.pgp Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] i.MX8MM mapped register access causes crashes
On 06.06.19 03:58, Peng Fan wrote: > >> Subject: Re: [U-Boot] i.MX8MM mapped register access causes crashes >> >> On Wed, Jun 5, 2019 at 10:52 PM Peng Fan wrote: >> >>> You need to pass an arg after `md 0x302d`. Default it will dump a >>> lot registers, might 40 registers. It surely will crash, because there >>> are only a few registers in GPT1 which is the address you are dumping. >> >> Other suggestion is to make sure that the clock for the peripheral you are >> trying to access is turned on. > > Dump `md 0x302d 1` will surely work, but dump `md 0x302d 100` > will surely crash. The clock already on. It is that GPT1 does not have 100 > registers, and trigger error when dumping non-existed registers. Thanks for your suggestions. I just used GPT1 as an example. As you can see GPT1 registers can be dumped, but at the start of GPT2 it crashes. I have the same problem for all kinds of other peripherals. For example I tried to enable I2C1, but the driver hangs in probe when it accesses an I2C1 register for the first time. I suspect that this is either, as Fabio said, caused by clocks that are turned off, or because of trustzone settings. I'm not loading any ATF at the moment, so I'm booting from SPL directly to U-Boot proper and I'm not sure if the trustzone settings restrict access to the peripherals in this case. Thanks, Frieder ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] board/friendlyarm: Add support for friendlyarm nanopi neo4 board
Hi Tom,
> > This initial support includes:
> > Linux v5.2-rc1
> > Custom U-Boot
> > Arm Trusted Firmware v2.0
> > Buildroot default packages
> >
> > Signed-off-by: Shyam Saini
> > ---
> > .gitlab-ci.yml | 1 +
> > DEVELOPERS | 2 ++
> > board/friendlyarm/nanopi-neo4/extlinux.conf | 4 +++
> > board/friendlyarm/nanopi-neo4/genimage.cfg | 22
> > board/friendlyarm/nanopi-neo4/post-build.sh | 9 +
> > board/friendlyarm/nanopi-neo4/readme.txt| 53
> > +++
> > configs/nanopi_neo4_defconfig | 55
> > +
> > 7 files changed, 146 insertions(+)
> > create mode 100644 board/friendlyarm/nanopi-neo4/extlinux.conf
> > create mode 100644 board/friendlyarm/nanopi-neo4/genimage.cfg
> > create mode 100755 board/friendlyarm/nanopi-neo4/post-build.sh
> > create mode 100644 board/friendlyarm/nanopi-neo4/readme.txt
> > create mode 100644 configs/nanopi_neo4_defconfig
> >
> > diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> > index 5ed1b8f4d5..2f41bcf7c6 100644
> > --- a/.gitlab-ci.yml
> > +++ b/.gitlab-ci.yml
> > @@ -181,6 +181,7 @@ nanopi_m1_defconfig: { extends: .defconfig }
> > nanopi_m1_plus_defconfig: { extends: .defconfig }
> > nanopi_m4_defconfig: { extends: .defconfig }
> > nanopi_neo_defconfig: { extends: .defconfig }
> > +nanopi_neo4_defconfig: { extends: .defconfig }
> > nexbox_a95x_defconfig: { extends: .defconfig }
> > nitrogen6sx_defconfig: { extends: .defconfig }
> > nitrogen6x_defconfig: { extends: .defconfig }
>
> We don't have gitlab-ci setup in mainline, so this won't apply as-is. I
> would however very much like to see what you have as I'd posted
> elsewhere my gitlab-ci file that converts what we do in travis to
> gitlab. Thanks!
These are the buildroot patches which I accidentally sent to u-boot
mailing list.
Sorry for the confusion and noise.
Thanks!!
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