Hi Manivannan,
On Sat, 17 Aug 2019 at 08:53, Manivannan Sadhasivam
wrote:
>
> Hi,
>
> On Sat, Aug 17, 2019 at 12:23:35AM +0530, Anand Moon wrote:
> > Hi All,
> >
> > On Mon, 5 Aug 2019 at 20:09, Peter Robinson wrote:
> > >
> > > On Mon, Aug 5, 2019 at 1:54 PM Kever Yang
> > > wrote:
> > > >
>
Hi,
On Sat, Aug 17, 2019 at 12:23:35AM +0530, Anand Moon wrote:
> Hi All,
>
> On Mon, 5 Aug 2019 at 20:09, Peter Robinson wrote:
> >
> > On Mon, Aug 5, 2019 at 1:54 PM Kever Yang wrote:
> > >
> > >
> > > On 2019/7/29 下午9:52, Manivannan Sadhasivam wrote:
> > > > This commits enables booting
In lx2160a rev2 the pcie controller has been changed.
Therefore, we need to change the device tree nodes of pcie controllers
so that new controller can be probed.
It involves changing the "compatible" field as well as registers names'.
we are keeping same device tree for lx2160a rev1 and rev2,
The commit 1b42ab3eda8a ("ARM: DRA7: Fixup DSPEVE, IVA and GPU clock
frequencies based on OPP") updates the kernel device-tree blob to adjust
the DSP, IVA and GPU DPLL clocks based on a one-time OPP choice selected
in U-Boot. All these DPLL clocks are children of the cm_core_aon clocks
DT node.
Andrew,
On Mon, Aug 12, 2019 at 03:59:54PM -0400, Andrew F. Davis wrote:
> This is the first part of a larger effort I would like to propose to
> unify and simplify the default set of environment variables.
>
> When many early environment variables were named there were fewer images
> being
Hi All,
On Mon, 5 Aug 2019 at 20:09, Peter Robinson wrote:
>
> On Mon, Aug 5, 2019 at 1:54 PM Kever Yang wrote:
> >
> >
> > On 2019/7/29 下午9:52, Manivannan Sadhasivam wrote:
> > > This commits enables booting from eMMC when using SPL on 96Boards
> > > Rock960 board by adding SDHCI to boot
Noncached area at present is being initialized to random space after malloc
area. It works in most the cases as it goes to stack area & stack is not
overwriting it being far from it.
Signed-off-by: Vikas Manocha
---
Changes in v2: added blank line before return
common/board_f.c | 17
Hi Sam,
CC: Peng
On Wed, Aug 14, 2019 at 10:52:50PM +0300, Sam Protsenko wrote:
> mmc_wait_dat0() expects timeout argument to be in usec units.
I agree, based on the documentation of wait_dat0() from commit:
Hi,
As for upstreaming libavb patches, I'd be interested in landing them
upstream... makes it easier for anyone.
Our upstream is AOSP and we use gerrit for code-review:
https://android-review.googlesource.com/q/project:platform%252Fexternal%252Favb
Here's a guide to contributing:
On 16/08/19, Marcel Ziswiler wrote:
> Hi Oliver
>
> On Fri, 2019-08-16 at 12:43 +, Oliver Graute wrote:
> > I'am currently working on the following patch to get the imx8qm-
> > rom7720-a1
>
> That version sounds suspiciously like it may be based on initial alpha
> silicon from NXP which as
On Fri, 16 Aug 2019 at 10:05, Simon Goldschmidt
wrote:
>
>
>
> Stefan Roese schrieb am Fr., 16. Aug. 2019, 14:45:
>>
>> With the removal of the x86 specific GD flags, there are no arch-
>> specific GD flags any more. Let's remove the comment about reserving the
>> upper 16 bits for arch-specific
On 16/08/19, Marcel Ziswiler wrote:
> Hi Oliver
>
> On Fri, 2019-08-16 at 12:43 +, Oliver Graute wrote:
> > I'am currently working on the following patch to get the imx8qm-
> > rom7720-a1
>
> That version sounds suspiciously like it may be based on initial alpha
> silicon from NXP which as
Hello Adam,
On 14.08.19 15:29, Adam Ford wrote:
> This converts the following to Kconfig:
>CONFIG_ARCH_CPU_INIT
>
> Signed-off-by: Adam Ford
>
For the PDU001 board:
Tested-by: Felix Brack
___
U-Boot mailing list
U-Boot@lists.denx.de
Add i.MX8QM ROM 7720a1 board support
Signed-off-by: Oliver Graute
Cc: Stefano Babic
Cc: Peng Fan
Cc: Ye Li
Cc: uboot-imx
---
These changes are based on this vendor tree:
https://github.com/ADVANTECH-Corp/uboot-imx6.git
I adapted the files and compared them with code from similar imx8qm-mek
I'am currently working on the following patch to get the imx8qm-rom7720-a1
board working with recent u-boot v2019.07. Unfortunaly I get no output on my
serial line.
I'am not sure if something in my patch is just missing or if my composition of
"SCFW + ATF + uboot" which is necessary for this
Stefan Roese schrieb am Fr., 16. Aug. 2019, 14:45:
> With the removal of the x86 specific GD flags, there are no arch-
> specific GD flags any more. Let's remove the comment about reserving the
> upper 16 bits for arch-specific flags in the common header. This gives
> us more flexibility with
Stefan Roese schrieb am Fr., 16. Aug. 2019, 14:45:
> This patch removes the x86 architecture specific GD flags
> (GD_FLG_COLD_BOOT & GD_FLG_WARM_BOOT), as they are not used. Only
> GD_FLG_COLD_BOOT is referenced in coreboot.c but assigned in start16.S.
> But the coreboot target does not use
On Fri, Aug 16, 2019 at 8:45 PM Stefan Roese wrote:
>
> With the removal of the x86 specific GD flags, there are no arch-
> specific GD flags any more. Let's remove the comment about reserving the
> upper 16 bits for arch-specific flags in the common header. This gives
> us more flexibility with
On Fri, Aug 16, 2019 at 8:45 PM Stefan Roese wrote:
>
> This patch removes the x86 architecture specific GD flags
> (GD_FLG_COLD_BOOT & GD_FLG_WARM_BOOT), as they are not used. Only
> GD_FLG_COLD_BOOT is referenced in coreboot.c but assigned in start16.S.
> But the coreboot target does not use
On Thu, Aug 15, 2019 at 9:56 AM Simon Glass wrote:
>
> Rename some camel-case variables to match U-Boot style.
>
> Camel case is not generally allowed in U-Boot. Rename this variable to fit
> in with the style.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Bin Meng
> ---
>
> Changes in v2: None
On Thu, Aug 15, 2019 at 9:56 AM Simon Glass wrote:
>
> Sometimes an image has multiple CBFS. The current CBFS API is limited to
> handling only one at time. Also it keeps track of the CBFS internally in
> BSS, which does not work before relocation, for example.
>
> Add a few new functions to
On Thu, Aug 15, 2019 at 9:56 AM Simon Glass wrote:
>
> Move the result variable into the struct also, so that it can be used when
> BSS is not available. Add a function to read it.
>
> Note that all functions sill use the BSS version of the data.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Bin
On Thu, Aug 15, 2019 at 3:18 PM Bin Meng wrote:
>
> On Thu, Aug 15, 2019 at 9:56 AM Simon Glass wrote:
> >
> > At present there are a number of static variables in BSS. This cannot work
> > with SPL, at least until BSS is available in board_init_r().
> >
> > Move the variables into a struct, so
On Thu, Aug 15, 2019 at 9:56 AM Simon Glass wrote:
>
> Add a new Kconfig option to enable CBFS in SPL. This can be useful when
> the memory-init code is in CBFS.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Bin Meng
> ---
>
> Changes in v2:
> - Fix typo in Kconfig help
>
> fs/Makefile |
On Thu, Aug 15, 2019 at 9:56 AM Simon Glass wrote:
>
> At present this file has a function at the top, above declarations. This
> is normally avoided, so fix it.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Bin Meng
> ---
>
> Changes in v2: None
>
> fs/cbfs/cbfs.c | 14 +-
> 1
On Wed, Aug 14, 2019 at 4:23 PM Bin Meng wrote:
>
> Use DISTRO_BOOTENV to decouple BOOTENV from CONFIG_DISTRO_DEFAULTS.
>
> Reported-by: Heinrich Schuchardt
> Signed-off-by: Bin Meng
> ---
>
> include/configs/x86-common.h | 11 +++
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
On Fri, Aug 16, 2019 at 8:23 AM Bin Meng wrote:
>
> On Fri, Aug 16, 2019 at 3:21 AM Heinrich Schuchardt
> wrote:
> >
> > Correctly reference uefi/uefi.rst and uefi/u-boot_on_efi.rst.
> >
> > Signed-off-by: Heinrich Schuchardt
> > ---
> > doc/arch/x86.rst | 3 ++-
> > 1 file changed, 2
On Fri, Aug 16, 2019 at 8:20 AM Bin Meng wrote:
>
> On Fri, Aug 16, 2019 at 3:02 AM Heinrich Schuchardt
> wrote:
> >
> > Avoid a warning when building the 'make htmldocs' target:
> >
> > doc/board/intel/slimbootloader.rst:90: WARNING: Title underline too short.
> >
> > Signed-off-by: Heinrich
On Fri, Aug 16, 2019 at 10:46 AM Anup Patel wrote:
>
> On Wed, Aug 14, 2019 at 4:01 PM Bin Meng wrote:
> >
> > This reverts commit 1b0c9914cc75d1570359181ebd493cd5746cb0ed.
> >
> > Commit 1b0c9914cc75 ("net: macb: Fixed reading MII_LPA register")
> > causes 100Mbps does not work any more with
Hi Sam,
CC: LIBAVB people (w.r.t. libavb fixes in U-Boot)
I can reproduce the compiler warnings myself and I confirm they are
fixed with this patch. More comments below.
On Thu, Aug 15, 2019 at 11:04:03PM +0300, Sam Protsenko wrote:
> After updating libavb to most recent version from
Hi Oliver
On Fri, 2019-08-16 at 12:43 +, Oliver Graute wrote:
> I'am currently working on the following patch to get the imx8qm-
> rom7720-a1
That version sounds suspiciously like it may be based on initial alpha
silicon from NXP which as far as I know is not supported anywhere any
more. Not
This patch removes the x86 architecture specific GD flags
(GD_FLG_COLD_BOOT & GD_FLG_WARM_BOOT), as they are not used. Only
GD_FLG_COLD_BOOT is referenced in coreboot.c but assigned in start16.S.
But the coreboot target does not use start16.S at all and boots directly
from the 32-bit start code.
With the removal of the x86 specific GD flags, there are no arch-
specific GD flags any more. Let's remove the comment about reserving the
upper 16 bits for arch-specific flags in the common header. This gives
us more flexibility with the usage of the GD flags.
As a matter of fact, we are already
> -Original Message-
> From: Jagdish Gediya
> Sent: 2019年8月16日 16:26
> To: Z.q. Hou ; u-boot@lists.denx.de;
> s...@chromium.org; Prabhakar Kushwaha ;
> Shengzhou Liu ; bmeng...@gmail.com; Jiafei Pan
> ; Priyanka Jain
> Subject: RE: [PATCH 00/13] powerpc: Enable device tree support
>
>
Hi Jagdish,
Thanks a lot for your comments!
> -Original Message-
> From: Jagdish Gediya
> Sent: 2019年8月16日 16:26
> To: Z.q. Hou ; u-boot@lists.denx.de;
> s...@chromium.org; Prabhakar Kushwaha ;
> Shengzhou Liu ; bmeng...@gmail.com; Jiafei Pan
> ; Priyanka Jain
> Subject: RE: [PATCH
Marek Vasut schrieb am Fr., 16. Aug. 2019, 13:09:
> On 8/15/19 7:42 PM, Simon Goldschmidt wrote:
> > Am 15.08.2019 um 19:07 schrieb Marek Vasut:
> >> On 8/15/19 6:57 PM, Simon Goldschmidt wrote:
> >>> Am 15.08.2019 um 18:34 schrieb Marek Vasut:
> On 8/15/19 6:22 PM, Simon Goldschmidt wrote:
This driver is ported from NXP i.MX U-Boot version imx_v2019.04
and some changes have also been made to adapt to U-Boot.
Add the Cadence USB3 IP(CDNS3) driver for the gadget (device mode).
The CDNS3 gadget driver support DM mode. CONFIG_DM_USB_GADGET should
be enabled when use this driver.
Dear Pankaj
> -Original Message-
> From: Pankaj Bansal
> Sent: Wednesday, July 17, 2019 3:54 PM
> To: Prabhakar Kushwaha ; Meenakshi
> Aggarwal
> Cc: Varun Sethi ; u-boot@lists.denx.de
> Subject: [PATCH v2] board: fsl: lx2160a: implement board_fix_fdt
>
> In lx2160a rev2 the pcie
On 8/16/19 8:10 AM, Sherry Sun wrote:
[...]
> diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
> index ac68aa2d27..cc1dfe463b 100644
> --- a/drivers/usb/host/Kconfig
> +++ b/drivers/usb/host/Kconfig
> @@ -95,6 +95,15 @@ config USB_XHCI_FSL
> depends on !SPL_NO_USB
>
On 8/15/19 7:42 PM, Simon Goldschmidt wrote:
> Am 15.08.2019 um 19:07 schrieb Marek Vasut:
>> On 8/15/19 6:57 PM, Simon Goldschmidt wrote:
>>> Am 15.08.2019 um 18:34 schrieb Marek Vasut:
On 8/15/19 6:22 PM, Simon Goldschmidt wrote:
> Hi Marek,
>
> Am 24.07.2019 um 09:45 schrieb
On 8/16/19 6:45 AM, Sherry Sun wrote:
> Hi Marek
>
>>
>> On 8/14/19 2:16 PM, sherry sun wrote:
>>> From: Sherry Sun
>>>
>>> This driver is ported from NXP i.MX U-Boot version imx_v2019.04 and
>>> some changes have also been made to adapt to U-Boot.
>>>
>>> Add the Cadence USB3 IP(CDNS3) driver
On Fri, Aug 16, 2019 at 01:59:20PM +0300, Sam Protsenko wrote:
[..]
> On Fri, Aug 16, 2019 at 1:36 PM Eugeniu Rosca wrote:
> > Thanks for the efforts. I get the same result, except the following
> > minor difference [*]. The diff is minor and non-functional, but I
> > think it's worth staying
Hi Eugeniu,
On Fri, Aug 16, 2019 at 1:36 PM Eugeniu Rosca wrote:
>
> Hi Sam,
>
> On Thu, Aug 15, 2019 at 11:04:02PM +0300, Sam Protsenko wrote:
> > Update libavb to commit 5fbb42a189aa in AOSP/master, because new version
> > has support for super partition [1], which we need for implementing
> >
On 16/08/19 2:16 PM, suni...@techveda.org wrote:
> From: Suniel Mahesh
>
> TI HS platforms generate *dtb_HS binary blobs and there is no
> rule for cleanup. Added entry for cleanup in clean-files target.
>
> Signed-off-by: Suniel Mahesh
Reviewed-by: Lokesh Vutla
Thanks and regards,
Lokesh
Hi Sam,
On Thu, Aug 15, 2019 at 11:04:02PM +0300, Sam Protsenko wrote:
> Update libavb to commit 5fbb42a189aa in AOSP/master, because new version
> has support for super partition [1], which we need for implementing
> Android dynamic partitions. All changes from previous patches for libavb
> in
The previous code only dump the clk list. This patch is
to support clk tree dump, and also dump the enable_cnt.
The code used in patch is similar to dm_dump_all, but
the code here only filter out the UCLASS_CLK devices.
On i.MX8MM, Partial output:
u-boot=> clk dump
Rate Usecnt
On i.MX8MM, thinking such as clk path
OSC->PLL->PLL GATE->CCM ROOT->CCGR GATE->Device
Only enabling CCGR GATE is not enough, we also need to enable PLL GATE
to make sure the clk path work. So when enabling CCGR GATE,
we could prograte to enabling PLL GATE to make life easier.
Signed-off-by: Peng
Since we added clk enable_count and prograte clk child enabling
operation to clk parent, so add a new function sandbox_clk_enable_count
to get enable_count for test usage.
And add test code to get the enable_count after we enable/disable
the device clk.
Signed-off-by: Peng Fan
---
V2:
New
As what Linux Kernel 5.3.0 provides when enable/disable clk,
there is an enable_count in clk_core_disable/enable. Introduce
enable_count to track the clk enable/disable count when
clk_enable/disable for CCF. And Initialize enable_count to 0 when
register the clk.
And clk tree dump with
Hi Stefan,
On Fri, Aug 16, 2019 at 1:11 PM Stefan Roese wrote:
>
> Hi Bin,
>
> On 15.08.19 16:19, Bin Meng wrote:
> > Hi Stefan,
> >
> > On Thu, Aug 15, 2019 at 2:07 PM Stefan Roese wrote:
> >>
> >> Hi Simon,
> >>
> >> On 14.08.19 21:35, Simon Glass wrote:
> >>> Hi,
> >>>
> >>> On Wed, 14 Aug
From: Suniel Mahesh
TI HS platforms generate *dtb_HS binary blobs and there is no
rule for cleanup. Added entry for cleanup in clean-files target.
Signed-off-by: Suniel Mahesh
---
Changes for v2:
- changed description to fit the change done.
- As suggested by Lokesh Vutla, moved cleaning
Hi Zhiqiang,
> -Original Message-
> From: Z.q. Hou
> Sent: Friday, August 16, 2019 11:58 AM
> To: Jagdish Gediya ; u-boot@lists.denx.de;
> s...@chromium.org; Prabhakar Kushwaha ;
> Shengzhou Liu ; bmeng...@gmail.com; Jiafei Pan
> ; Priyanka Jain
> Subject: RE: [PATCH 00/13] powerpc:
Hi Lukasz,
> Subject: Re: [PATCH 1/3] clk: introduce enable_cnt
>
> Hi Peng,
>
> > Introduce enable_cnt to track the clk enable/disable count
>
> As fair as I remember there was no reference counters for Linux original CCF
> (to be precise - they are in devices, but not explicitly used in
Hi Peng,
> Introduce enable_cnt to track the clk enable/disable count
As fair as I remember there was no reference counters for Linux original
CCF (to be precise - they are in devices, but not explicitly used in
CCF).
As the commit message is very short I would like to explicitly ask
what
The previous code only dump the clk list. This patch is
to support clk tree dump, and also dump the enable_cnt.
On i.MX8MM, Partial output:
u-boot=> clk dump
Rate Usecnt Name
--
2400 0|-- clock-osc-24m
2400
When enabling/disabling a clk, also need to enable/disable
the clk's parent. Implement this in clk_enable/disable.
Signed-off-by: Peng Fan
---
drivers/clk/clk-uclass.c | 68 +++-
1 file changed, 62 insertions(+), 6 deletions(-)
diff --git
Introduce enable_cnt to track the clk enable/disable count when
clk_enable/disable for CCF.
And Initialize enable_cnt to 0 when register the clk.
Signed-off-by: Peng Fan
---
drivers/clk/clk.c| 1 +
drivers/clk/clk_fixed_rate.c | 1 +
include/clk.h| 1 +
3 files
On 16/08/19 12:32 PM, suni...@techveda.org wrote:
> From: Suniel Mahesh
>
> All TI HS platforms generate HS images/binaries along with
> the normal images. These *dtb_HS are generated in dts dir
> and there is no rule for cleanup. Added entry for cleanup
> in clean and distclean targets.
>
>
>
> Hi,
>
> (James please can you use plain-text email for the mailing list?)
OK. Thanks Simon for pointing out this. I am using outlook, so most likely will
have "newline" difference. Hope can find a way out for this.
>
> For chromebook_link64 I get:
>
> output:
From: Suniel Mahesh
All TI HS platforms generate HS images/binaries along with
the normal images. These *dtb_HS are generated in dts dir
and there is no rule for cleanup. Added entry for cleanup
in clean and distclean targets.
Signed-off-by: Suniel Mahesh
---
Makefile | 4 ++--
1 file
On 15/08/2019 21:29, Eddie James wrote:
> Enable the MMC subsystem and the Aspeed SD controller. Also enable the
> use of the device tree for probing the controller.
>
> Signed-off-by: Eddie James
Reviewed-by: Cédric Le Goater
Thanks,
C.
> ---
> configs/evb-ast2500_defconfig | 8
On 15/08/2019 21:29, Eddie James wrote:
> Add support for the Aspeed SD host controller engine.
>
> Signed-off-by: Eddie James
Reviewed-by: Cédric Le Goater
Thanks,
C.
> ---
> arch/arm/include/asm/gpio.h | 3 +-
> drivers/mmc/Kconfig | 11 ++
> drivers/mmc/Makefile|
Hi Jagdish,
Thanks a lot for your comments!
> -Original Message-
> From: Jagdish Gediya
> Sent: 2019年8月16日 14:05
> To: Z.q. Hou ; u-boot@lists.denx.de;
> s...@chromium.org; Prabhakar Kushwaha ;
> Shengzhou Liu ; bmeng...@gmail.com; Jiafei Pan
> ; Priyanka Jain
> Subject: RE: [PATCH
This patch was copied from kernel commit: 67fdfda4a99ed.
Sometimes, the gadget driver we want to run has max_speed lower than
what the UDC supports. In such situations, UDC might want to make sure
we don't try to connect on speeds not supported by the gadget
driver because that will just fail.
Add the USB3 host driver for NXP imx8 platform, and the
cadence IP is in it. The USB3 host driver support DM
mode, it will probe USB3 host node in dts.
Signed-off-by: Sherry Sun
---
drivers/usb/host/Kconfig | 9 ++
drivers/usb/host/Makefile| 1 +
drivers/usb/host/xhci-imx8.c | 189
The cdns3-usb-phy driver supports both host and peripheral
mode of usb driver which use cadence usb3 IP.
Signed-off-by: Sherry Sun
---
drivers/phy/Kconfig | 8 ++
drivers/phy/Makefile| 1 +
drivers/phy/cdns3-usb-phy.c | 243
3 files
These patches introduce new Cadence driver to U-Boot.
The first patch is to add the Cadence USB3 IP(CDNS3) core and driver for
the usb gadget.
The second patch introduce the xhci-imx8 usb host driver separately.
The third patch introduce the cdns3 phy driver which can be used for both
cdns3 host
Hi Zhiqiang,
> -Original Message-
> From: Z.q. Hou
> Sent: Thursday, June 20, 2019 1:49 PM
> To: u-boot@lists.denx.de; s...@chromium.org; Prabhakar Kushwaha
> ; Shengzhou Liu
> ; bmeng...@gmail.com; Jagdish Gediya
> ; Jiafei Pan ; Priyanka Jain
>
> Cc: Z.q. Hou
> Subject: [PATCH 00/13]
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