Thanks Bin
Let me integrate his patch-set.
> -Original Message-
> From: Bin Meng
> Sent: Tuesday, August 27, 2019 10:32 AM
> To: Prabhakar Kushwaha
> Cc: Z.q. Hou ; u-boot@lists.denx.de
> Subject: Re: [PATCHv2 1/3] dm: pcie_fsl: Fix workaround of P4080 erratum A003
>
> Hi Prabhakar,
>
i.MX8MQ and i.MX8MM use different analog pll design, but they
share same ccm design.
Add clock_imx8mq.h for i.MX8MQ
keep common part in clock.h
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/clock.h| 489 +++--
arch/arm/include/asm/arch-imx8m/clock_imx8mq
When running with OPTEE, the MMU table in u-boot does not remove the OPTEE
memory from its settings. So ARM speculative prefetch in u-boot may access
that OPTEE memory. Due to trust zone is enabled by OPTEE and that memory
is set to secure access, then the speculative prefetch will fail and cause
v
Make reset_cpu only visible when CONFIG_SYSRESET not defined
or CONFIG_SPL_BUILD.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
ind
When DM_MMC enabled, the USDHC index in U-Boot is the USDHC port.
To directly return devno, we could avoid add board specific code.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/mmc_env.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-imx/mmc_env.c b/arch/arm/mach-imx/mmc_e
Add pin header file for i.MX8MM
To IMX8MM_PAD_NAND_WE_B_USDHC3_CLK, IOMUX_CONFIG_SION needs to be
selected.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/imx8mm_pins.h | 691 ++
1 file changed, 691 insertions(+)
create mode 100644 arch/arm/include/asm/arch
Import i.MX8MM dtsi from Linux Kernel,
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of
git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mm.dtsi | 733 +++
1 file changed, 733 insertion
i.MX8MM does not have LVTTL, it has a PE property
Signed-off-by: Peng Fan
---
arch/arm/include/asm/mach-imx/iomux-v3.h | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h
b/arch/arm/include/asm/mach-imx/iomux-v3.h
index b899a4ff6f..720e8f7043 100644
There are several variants based on i.MX8MM, add the support in
get_cpu_rev
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 57 +++
1 file changed, 47 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-im
Import i.MX8MM pin func from Linux Kernel,
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of
git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mm-pinfunc.h | 629 ++
1 file changed, 629 inser
Introduce clk implementation for i.MX8MM, including pll configuration,
ccm configuration. Mostly will be done clk dm driver,
but such as DRAM part, we still use non clk dm driver, because we
have limited sram.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/clock.h| 2 +
ar
set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index dd393
From: Ye Li
Set trustzone region 0 to allow both non-secure and secure access
when trust zone is enabled. We found USB controller fails to access
DDR if the default region 0 is secure access only.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 6 ++
1 fil
To i.MX8MM SCTR clock is disabled by ROM, so before timer init
need to enable it.
To i.MX8MQ, it does not hurt the clock is enabled again.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/
i.MX8MM has similar architecture with i.MX8MQ, but it has totally
different PLL design and register layout change.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/imx-regs.h | 69 +++---
1 file changed, 64 insertions(+), 5 deletions(-)
diff --git a/arch/arm/i
i.MX8MQ and i.MX8MM has totally different pll design, so
rename clock to clock_imx8mq.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/Makefile| 3 ++-
arch/arm/mach-imx/imx8m/{clock.c => clock_imx8mq.c} | 0
2 files changed, 2 insertions(+), 1 deletion(-)
rename arch/ar
Add board and SoC dts
Add ddr training code
support SD/MMC/GPIO/PINCTRL/UART
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile |3 +-
arch/arm/dts/imx8mm-evk-u-boot.dtsi| 92 ++
arch/arm/dts/imx8mm-evk.dts| 235
arch/arm/mach-imx/imx8m/Kco
Because we need to get cpu freq in print_cpuinfo at very early stage,
so we need to make sure the ccm be probed.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8
Drop unused register definitions and structures for i.MX8MQ
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/imx-regs.h | 222 +
1 file changed, 1 insertion(+), 221 deletions(-)
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h
b/arch/arm/include/as
Differnet board has different controller used, it is
hard to use one layout for them all.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/spl.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 1f230aca33..7ada60d7a2 100644
--- a/ar
Add IMX8MM kconfig entry
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 9c487870a6..35c978e863 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/
Import clock bindings header file from Linux 5.3.0-rc2
Signed-off-by: Peng Fan
---
include/dt-bindings/clock/imx8mm-clock.h | 253 +++
1 file changed, 253 insertions(+)
create mode 100644 include/dt-bindings/clock/imx8mm-clock.h
diff --git a/include/dt-bindings/cloc
Add IMX8MQ kconfig entry, preparing support IMX8MM
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/Kconfig | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 317dee9bc1..9c487870a6 100644
--- a/arch
With CONFIG_SPL_OF_CONTROL, the device tree will be padded to
end of the u-boot-spl-nodtb.bin, however we also put
the ddr firmware file to this location, so need to adapt
the code with SPL OF and align to 4 bytes to ease copy firmware.
Reviewed-by: Frieder Schrempf
Tested-by: Frieder Schrempf
S
There is no HDMI on i.MX8MM, so we need to remove HDMI entry, then
we could not reuse imximage.cfg, so create a new one.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg | 16
1 file changed, 16 insertions(+)
create mode 100644 arch/arm/mach-imx/imx8m
Add i.MX8MM cpu type and related helper functions
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx/cpu.h | 6 ++
arch/arm/include/asm/mach-imx/sys_proto.h | 8
arch/arm/mach-imx/cpu.c | 12
3 files changed, 26 insertions(+)
diff --git
From: Frieder Schrempf
Fix the FIT image metadata for i.MX8 to result in the intended boot
order (SPL -> ATF -> U-Boot).
Signed-off-by: Frieder Schrempf
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/mkimage_fit_atf.sh | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --gi
The loader for the DDR firmware in drivers/ddr/imx/imx8m/helper.c uses a
4-byte-aligned address to load the firmware. In cases where OF is
enabled in SPL the dtb will be appended to the SPL binary and can result
in a binary that is not aligned correctly. If OF is not enabled in SPL,
`_end` is alrea
V3:
Added a new patch from Frieder:
imx: mkimage_fit_atf: Fix FIT image for correct boot order
Tag fixes for Frieder
Drop rom_pointer use in patch 27/27 and clean up included files.
4bytes-> 4 bytes in patch 2/27
V2:
Fixed comments from Lukasz and Frieder
The following was newly added.
imx8m: imx
This patch enables the BBT in NAND on the AT91SAM based GARDENA smart
Gateway. This is especially important, since the Linux driver also
enables this option and uses the BBT table pages. Without setting this
option, U-Boot will try to re-use these pages again (e.g. UBI).
Signed-off-by: Stefan Roes
On 8/27/19 4:48 AM, Bin Meng wrote:
Hi Heinrich,
On Tue, Aug 27, 2019 at 10:43 AM Heinrich Schuchardt wrote:
On 8/27/19 3:18 AM, Bin Meng wrote:
Hi Heinrich,
On Tue, Aug 27, 2019 at 1:26 AM Heinrich Schuchardt wrote:
On 8/26/19 8:13 AM, Bin Meng wrote:
Hi Heinrich,
On Mon, Aug 26, 2019
Hi Prabhakar,
On Mon, Aug 26, 2019 at 9:00 PM Bin Meng wrote:
>
> Hi Prabhakar,
>
> On Mon, Aug 26, 2019 at 5:10 PM Prabhakar Kushwaha
> wrote:
> >
> > Dear Bin,
> >
> > > -Original Message-
> > > From: Bin Meng
> > > Sent: Monday, August 26, 2019 2:21 PM
> > > To: Z.q. Hou
> > > Cc: u
On Tue, Jul 23, 2019 at 9:31 PM Hou Zhiqiang wrote:
>
> Enable the DM PCIe driver in P5040DS defconfig.
>
> Signed-off-by: Hou Zhiqiang
> ---
> configs/P5040DS_NAND_defconfig | 4
> configs/P5040DS_SDCARD_defconfig | 4
> configs/P5040DS_SPIFLASH_defconfig | 4
> configs/P50
On Tue, Jul 23, 2019 at 9:26 PM Hou Zhiqiang wrote:
>
> Enable the DM PCIe driver in MPC8548CDS defconfig.
>
> Signed-off-by: Hou Zhiqiang
> ---
> configs/MPC8548CDS_36BIT_defconfig | 4
> configs/MPC8548CDS_defconfig| 4
> configs/MPC8548CDS_legacy_defconfig | 4
> 3 fil
On Tue, Jul 23, 2019 at 9:31 PM Hou Zhiqiang wrote:
>
> Enable the DM PCIe driver in P4080DS defconfig.
>
> Signed-off-by: Hou Zhiqiang
> ---
> configs/P4080DS_SDCARD_defconfig | 4
> configs/P4080DS_SPIFLASH_defconfig | 4
> configs/P4080DS_defconfig | 4
> 3 files cha
On Tue, Jul 23, 2019 at 9:32 PM Hou Zhiqiang wrote:
>
> Enable the DM PCIe driver in P3041DS defconfig.
>
> Signed-off-by: Hou Zhiqiang
> ---
> configs/P3041DS_NAND_defconfig | 4
> configs/P3041DS_SDCARD_defconfig | 4
> configs/P3041DS_SPIFLASH_defconfig | 4
> configs/P30
On Tue, Jul 23, 2019 at 9:29 PM Hou Zhiqiang wrote:
>
> Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
>
> Signed-off-by: Hou Zhiqiang
> ---
> include/configs/corenet_ds.h | 63
> +---
> 1 file changed, 19 insertions(+), 44 deletio
On Tue, Jul 23, 2019 at 9:43 PM Hou Zhiqiang wrote:
>
> Enable the DM PCIe driver in P2041RDB defconfig.
>
> Signed-off-by: Hou Zhiqiang
> ---
> configs/P2041RDB_NAND_defconfig | 4
> configs/P2041RDB_SDCARD_defconfig | 4
> configs/P2041RDB_SPIFLASH_defconfig | 4
> configs
On Tue, Jul 23, 2019 at 9:44 PM Hou Zhiqiang wrote:
>
> Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
>
> Signed-off-by: Hou Zhiqiang
> ---
> include/configs/P2041RDB.h | 55
> +-
> 1 file changed, 15 insertions(+), 40 deletio
On Tue, Jul 23, 2019 at 9:40 PM Hou Zhiqiang wrote:
>
> Enable the DM PCIe driver in P2020RDB defconfig.
>
> Signed-off-by: Hou Zhiqiang
> ---
> configs/P2020RDB-PC_36BIT_NAND_defconfig | 4
> configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 4
> configs/P2020RDB-PC_36BIT_SPIFLASH_de
On Tue, Jul 23, 2019 at 9:39 PM Hou Zhiqiang wrote:
>
> P2020 integrated 3 PCIe controllers, which is compatible with
> the PCI Express™ Base Specification, Revision 1.0a, and this
> patch is to add DT node for each PCIe controller.
>
> Signed-off-by: Hou Zhiqiang
> ---
> arch/powerpc/dts/p2020-
On Tue, Jul 23, 2019 at 9:41 PM Hou Zhiqiang wrote:
>
> Enable the DM PCIe driver in P1020RDB defconfig.
>
> Signed-off-by: Hou Zhiqiang
> ---
> configs/P1020RDB-PC_36BIT_NAND_defconfig | 4
> configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 4
> configs/P1020RDB-PC_36BIT_SPIFLASH_de
On Tue, Jul 23, 2019 at 9:33 PM Hou Zhiqiang wrote:
>
> P1020 integrated 2 PCIe controllers, which is compatible with
> the PCI Express™ Base Specification, Revision 1.0a, and this
> patch is to add DT node for each PCIe controller.
>
> Signed-off-by: Hou Zhiqiang
> ---
> arch/powerpc/dts/p1020-
On Tue, Jul 23, 2019 at 9:28 PM Hou Zhiqiang wrote:
>
> Enable the DM PCIe driver in T1042D4RDB defconfig.
>
> Signed-off-by: Hou Zhiqiang
> ---
> configs/T1042D4RDB_NAND_defconfig | 4
> configs/T1042D4RDB_SDCARD_defconfig | 4
> configs/T1042D4RDB_SPIFLASH_defconfig | 4
>
On Tue, Jul 23, 2019 at 9:29 PM Hou Zhiqiang wrote:
>
> Enable the DM PCIe driver in T1024RDB defconfig.
>
> Signed-off-by: Hou Zhiqiang
> ---
> configs/T1024RDB_NAND_defconfig | 4
> configs/T1024RDB_SDCARD_defconfig | 4
> configs/T1024RDB_SPIFLASH_defconfig | 4
> configs
On Tue, Jul 23, 2019 at 9:34 PM Hou Zhiqiang wrote:
>
> Enable the DM PCIe driver in T4240RDB defconfig.
>
> Signed-off-by: Hou Zhiqiang
> ---
> configs/T4240RDB_SDCARD_defconfig | 4
> configs/T4240RDB_defconfig| 4
> 2 files changed, 8 insertions(+)
>
Reviewed-by: Bin Meng
Hi Zhiqiang,
On Tue, Aug 27, 2019 at 11:09 AM Z.q. Hou wrote:
>
> Hi Bin,
>
> > -Original Message-
> > From: Bin Meng
> > Sent: 2019年8月27日 10:51
> > To: Z.q. Hou
> > Cc: U-Boot Mailing List ; Prabhakar Kushwaha
> > ; Wolfgang Denk ; Priyanka
> > Jain ; Shengzhou Liu
> > Subject: Re: [U
The rk3399 rockpro64 board can boot from emmc and sdcard.
TODO: add spiflash as boot device.
Signed-off-by: Kever Yang
---
arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
b/arch/arm/dts/rk3399-rockpro6
From: Hou Zhiqiang
The correct config entry is CONFIG_PCIE_LAYERSCAPE and this
typo results in skipping the fixup of Linux PCIe DT nodes.
Also enable the fixup when Layerscape Gen4 controller driver
is enabled.
Fixes: 4da0e52c9dc0 (armv8: fsl-layerscape: fix config dependency for
layerscape pc
> -Original Message-
> From: Peng Fan
> Sent: 2019年8月27日 9:10
> To: Schrempf Frieder ; lu...@denx.de;
> sba...@denx.de; feste...@gmail.com
> Cc: dl-uboot-imx ; u-boot@lists.denx.de
> Subject: RE: [PATCH 22/22] imx: Add i.MX8MM EVK board support.
>
> > Subject: Re: [PATCH 22/22] imx: Add
Hi Bin,
> -Original Message-
> From: Bin Meng
> Sent: 2019年8月27日 10:59
> To: Z.q. Hou
> Cc: U-Boot Mailing List ; Prabhakar Kushwaha
> ; Wolfgang Denk ; Priyanka
> Jain ; Shengzhou Liu
> Subject: Re: [U-Boot] [PATCH 22/47] P1020: dts: Added PCIe DT nodes
>
> Hi Zhiqiang,
>
> On Tue, A
Hi Bin,
> -Original Message-
> From: Bin Meng
> Sent: 2019年8月27日 10:56
> To: Z.q. Hou
> Cc: U-Boot Mailing List ; Prabhakar Kushwaha
> ; Wolfgang Denk ; Priyanka
> Jain ; Shengzhou Liu
> Subject: Re: [U-Boot] [PATCH 25/47] P2020: dts: Added PCIe DT nodes
>
> Hi Zhiqiang,
>
> On Tue, A
Hi Bin,
> -Original Message-
> From: Bin Meng
> Sent: 2019年8月27日 10:51
> To: Z.q. Hou
> Cc: U-Boot Mailing List ; Prabhakar Kushwaha
> ; Wolfgang Denk ; Priyanka
> Jain ; Shengzhou Liu
> Subject: Re: [U-Boot] [PATCH 03/47] configs: T2080RDB: Enable PCIe driver
>
> Hi Zhiqiang,
>
> On
On Mon, 2019-08-26 at 14:43 +0200, Felix Brack wrote:
> Hello Weijie,
>
> On 26.08.19 10:19, Weijie Gao wrote:
> > On Thu, 2019-08-22 at 15:58 +0200, Felix Brack wrote:
> >> On 11.07.19 09:10, Weijie Gao wrote:
> >>
> >>> Some storage devices have multiple hw partitions and both address from
> >>>
Hi Bin,
Thanks a lot for your comments!
> -Original Message-
> From: Bin Meng
> Sent: 2019年8月26日 22:50
> To: Z.q. Hou
> Cc: U-Boot Mailing List ; Prabhakar Kushwaha
> ; Wolfgang Denk ; Priyanka
> Jain ; Shengzhou Liu
> Subject: Re: [U-Boot] [PATCH 34/47] powerpc: corenet_ds: Disable le
Hi Zhiqiang,
On Tue, Aug 27, 2019 at 10:46 AM Z.q. Hou wrote:
>
> Hi Bin,
>
> Thanks a lot for your comments!
>
> > -Original Message-
> > From: Bin Meng
> > Sent: 2019年8月26日 22:50
> > To: Z.q. Hou
> > Cc: U-Boot Mailing List ; Prabhakar Kushwaha
> > ; Wolfgang Denk ; Priyanka
> > Jain
Hi Bin,
Thanks a lot for your comments!
> -Original Message-
> From: Bin Meng
> Sent: 2019年8月26日 22:50
> To: Z.q. Hou
> Cc: U-Boot Mailing List ; Prabhakar Kushwaha
> ; Wolfgang Denk ; Priyanka
> Jain ; Shengzhou Liu
> Subject: Re: [U-Boot] [PATCH 30/47] powerpc: P2041RDB: Disable lega
Hi Zhiqiang,
On Tue, Aug 27, 2019 at 10:52 AM Z.q. Hou wrote:
>
> Hi Bin,
>
> Thanks a lot for your comments!
>
> > -Original Message-
> > From: Bin Meng
> > Sent: 2019年8月26日 22:50
> > To: Z.q. Hou
> > Cc: U-Boot Mailing List ; Prabhakar Kushwaha
> > ; Wolfgang Denk ; Priyanka
> > Jain
On 8/22/19 9:47 AM, AKASHI Takahiro wrote:
With the patch below applied, host_block_dev structure was switched
to be placed in platdata rather than priv. The command "host info"
must be aligned with this change. Otherwise, we will see "Segmentation
Fault."
Fixes: 8f994c860d91 ("sandbox: blk: Swi
Hi Bin,
Thanks a lot for your comments!
> -Original Message-
> From: Bin Meng
> Sent: 2019年8月26日 22:50
> To: Z.q. Hou
> Cc: U-Boot Mailing List ; Prabhakar Kushwaha
> ; Wolfgang Denk ; Priyanka
> Jain ; Shengzhou Liu
> Subject: Re: [U-Boot] [PATCH 25/47] P2020: dts: Added PCIe DT nodes
Hi Zhiqiang,
On Tue, Aug 27, 2019 at 10:05 AM Z.q. Hou wrote:
>
> Hi Bin,
>
> Thanks a lot for your comments!
>
> > -Original Message-
> > From: Bin Meng
> > Sent: 2019年8月26日 22:48
> > To: Z.q. Hou
> > Cc: U-Boot Mailing List ; Prabhakar Kushwaha
> > ; Wolfgang Denk ; Priyanka
> > Jain
Hi Heinrich,
On Tue, Aug 27, 2019 at 10:43 AM Heinrich Schuchardt wrote:
>
> On 8/27/19 3:18 AM, Bin Meng wrote:
> > Hi Heinrich,
> >
> > On Tue, Aug 27, 2019 at 1:26 AM Heinrich Schuchardt
> > wrote:
> >>
> >> On 8/26/19 8:13 AM, Bin Meng wrote:
> >>> Hi Heinrich,
> >>>
> >>> On Mon, Aug 26, 2
Hi Zhiqiang,
On Tue, Aug 27, 2019 at 10:33 AM Z.q. Hou wrote:
>
> Hi Bin,
>
> Thanks a lot for your comments!
>
> > -Original Message-
> > From: Bin Meng
> > Sent: 2019年8月26日 22:49
> > To: Z.q. Hou
> > Cc: U-Boot Mailing List ; Prabhakar Kushwaha
> > ; Wolfgang Denk ; Priyanka
> > Jain
Hi Bin,
Thanks a lot for your comments!
> -Original Message-
> From: Bin Meng
> Sent: 2019年8月26日 22:50
> To: Z.q. Hou
> Cc: U-Boot Mailing List ; Prabhakar Kushwaha
> ; Wolfgang Denk ; Priyanka
> Jain ; Shengzhou Liu
> Subject: Re: [U-Boot] [PATCH 22/47] P1020: dts: Added PCIe DT nodes
On 8/27/19 3:18 AM, Bin Meng wrote:
Hi Heinrich,
On Tue, Aug 27, 2019 at 1:26 AM Heinrich Schuchardt wrote:
On 8/26/19 8:13 AM, Bin Meng wrote:
Hi Heinrich,
On Mon, Aug 26, 2019 at 1:55 AM Heinrich Schuchardt wrote:
If a crash occurs, show the loaded UEFI images to facilitate analysis.
Hi Bin,
Thanks a lot for your comments!
> -Original Message-
> From: Bin Meng
> Sent: 2019年8月26日 22:49
> To: Z.q. Hou
> Cc: U-Boot Mailing List ; Prabhakar Kushwaha
> ; Wolfgang Denk ; Priyanka
> Jain ; Shengzhou Liu
> Subject: Re: [U-Boot] [PATCH 13/47] powerpc: T102xRDB: Disable lega
Hi Bin,
Thanks a lot for your comments!
> -Original Message-
> From: Bin Meng
> Sent: 2019年8月26日 22:48
> To: Z.q. Hou
> Cc: U-Boot Mailing List ; Prabhakar Kushwaha
> ; Wolfgang Denk ; Priyanka
> Jain ; Shengzhou Liu
> Subject: Re: [U-Boot] [PATCH 03/47] configs: T2080RDB: Enable PCIe
Hi Heinrich,
On Tue, Aug 27, 2019 at 1:26 AM Heinrich Schuchardt wrote:
>
> On 8/26/19 8:13 AM, Bin Meng wrote:
> > Hi Heinrich,
> >
> > On Mon, Aug 26, 2019 at 1:55 AM Heinrich Schuchardt
> > wrote:
> >>
> >> If a crash occurs, show the loaded UEFI images to facilitate analysis.
> >>
> >> This
On Thu, Aug 22, 2019 at 3:45 PM AKASHI Takahiro
wrote:
>
> With the patch below applied, host_block_dev structure was switched
> to be placed in platdata rather than priv. The command "host info"
> must be aligned with this change. Otherwise, we will see "Segmentation
> Fault."
>
> Fixes: 8f994c86
> Subject: Re: [PATCH 22/22] imx: Add i.MX8MM EVK board support.
>
> On 15.08.19 02:57, Peng Fan wrote:
> >> Subject: Re: [PATCH 22/22] imx: Add i.MX8MM EVK board support.
> >>
> >> On 09.08.19 06:15, Peng Fan wrote:
> >>> Add board and SoC dts
> >>> Add ddr training code
> >>> support SD/MMC/GPIO
> Subject: Re: [PATCH v2 00/26] i.MX8MM support
>
> On 19.08.19 11:42, Peng Fan wrote:
> > V2:
> > Fixed comments from Lukasz and Frieder
>
> This set has 26 patches, while the previous version had 22. You should
> document all changes here, so one can easily figure out which patches were
> added
> Subject: Re: [PATCH v2 01/26] tools: imx8m_image: align spl bin image size
>
> On 19.08.19 11:42, Peng Fan wrote:
> > The loader for the DDR firmware in drivers/ddr/imx/imx8m/helper.c uses
> > a 4-byte-aligned address to load the firmware. In cases where OF is
> > enabled in SPL the dtb will be
On Thu, Aug 22, 2019 at 08:37:26PM -0700, Aaron Williams wrote:
> When large writes take place I saw a Samsung EVO 970+ return a status
> value of 0x13, PRP Offset Invalid. I tracked this down to the
> improper handling of PRP entries. The blocks the PRP entries are
> placed in cannot cross a pa
Hey all,
It's release day and here's v2019.10-rc3. We're well into what should
be the stabilization period at this point. Going forward I am hoping
for PRs that are bug fixes / regression fixes, Kconfig migrations or
very self contained new boards and similar. If you have a series is
"big" but
On Thu, Aug 22, 2019 at 03:32:42PM -0500, Adam Ford wrote:
> Some of the USB code is still being built into SPL even when the
> SPL menu options have it explicitly disabled for SPL. Unit there is
> a better solution, This patch undefines CONFIG_USB_EHCI_OMAP when
> building SPL which reduces the c
On Sun, Aug 25, 2019 at 10:01:14AM -0500, Adam Ford wrote:
> The SPI and NAND variants enable DM_GPIO, so this patch enables
> DM_GPIO for the NOR / XIP version of the da850-evm.
>
> Signed-off-by: Adam Ford
>
> diff --git a/configs/da850evm_direct_nor_defconfig
> b/configs/da850evm_direct_nor
On Sun, Aug 25, 2019 at 09:34:49AM -0500, Adam Ford wrote:
> The NAND configuration has had the ethernet missing, so this patch
> enables the on-board ethernet interface.
>
> Signed-off-by: Adam Ford
>
> diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig
> index 8bc5
On Fri, Aug 23, 2019 at 03:59:55PM +0200, Ricardo Ribalda Delgado wrote:
> Update my email address from gmail to my domain.
>
> Signed-off-by: Ricardo Ribalda Delgado
Applied to u-boot/master, thanks!
--
Tom
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On Thu, Aug 22, 2019 at 04:44:03PM -0500, Adam Ford wrote:
> Found accidentally in omap3_logic, CONFIG_USB_EHCI_OMAP adds some
> code size to SPL, so this patch disables it on the am3517-evm to
> reduce the code a bit since it's tight for space.
>
> Signed-off-by: Adam Ford
>
> diff --git a/inc
On Fri, Aug 16, 2019 at 09:57:44AM -0700, Vikas Manocha wrote:
> Noncached area at present is being initialized to random space after malloc
> area. It works in most the cases as it goes to stack area & stack is not
> overwriting it being far from it.
>
> Signed-off-by: Vikas Manocha
Applied to
On Fri, Aug 23, 2019 at 10:56:55AM +0900, Kunihiko Hayashi wrote:
> The command "pci bar" and "pci region" display the address and size in
> 16 characters including "0x", so the command can only display
> 14 hexadecimal digits if the number of digits in the address and size is
> less than 14.
>
>
On Fri, Aug 23, 2019 at 02:06:34PM +0530, suni...@techveda.org wrote:
> From: Suniel Mahesh
>
> To address the following warning message:
>
> = WARNING ==
> This board does not use CONFIG_DM_USB. Please update
> the board to use CONFIG_DM_USB before the v
On Wed, Aug 21, 2019 at 06:29:09PM +0100, Sudeep Holla wrote:
> earlyprintk no longer works on arm64 platforms. Replace it with earlycon
> which works fine.
>
> Cc: Ryan Harkin
> Cc: Liviu Dudau
> Cc: Linus Walleij
> Signed-off-by: Sudeep Holla
> Reviewed-by: Peng Fan
> Reviewed-by: Ryan Har
On Thu, Aug 22, 2019 at 12:32:42PM +0200, Heinrich Schuchardt wrote:
> include/video_logo.h once was created via the tool easylogo and than used
> in cpu/mpc8xx/video.c to display Tux. video_logo.h has been replaced by
> include/linux_logo.h and is not needed anymore.
>
> Delete the include and t
On Sat, Aug 24, 2019 at 01:50:34PM -0500, Adam Ford wrote:
> Several options are presenting themselves on a various boards
> where the options are clearly not used. (ie, SPL/TPL options
> when SPL or TPL are not defined)
>
> This patch is not attempting to be a complete list of items, but
> more
On Fri, Aug 23, 2019 at 04:11:45PM +0200, Samuel Egli wrote:
> Signed-off-by: Samuel Egli
> Acked-by: Roger Meier
> Cc: Heiko Schocher
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Aug 21, 2019 at 06:29:10PM +0100, Sudeep Holla wrote:
> To support KVM, we need to drop at EL2 and not EL1 before we boot Linux
> kernel. This causes issues on platform with VHE and secondaries booting
> at EL2 via TF-A PSCI CPU_ON call.
>
> Cc: Ryan Harkin
> Cc: Liviu Dudau
> Cc: Linus
On Tue, Aug 20, 2019 at 04:47:42PM +, Park, Aiden wrote:
> The scsi_scan_dev() is looping over the number of uc_plat->max_id.
> The number of actual ports a AHCI controller has can be greater than
> max_id. Update uc_plat->max_id to make SCSI scan all detected ports.
>
> Signed-off-by: Aiden
On Thu, Aug 22, 2019 at 10:19:41PM +0200, Heinrich Schuchardt wrote:
> The assigned value NULL is overwritten before being used. Remove the
> assignment.
>
> Signed-off-by: Heinrich Schuchardt
> Reviewed-by: Bin Meng
Applied to u-boot/master, thanks!
--
Tom
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On Tue, Aug 20, 2019 at 07:20:58AM -0500, Adam Ford wrote:
> When the pinmux configuration was added, it was accidentally placed into
> the omap3_pmx_wkup node when it should have been placed into the
> omap3_pmx_core. This error was accidentally propagated to U-Boot by
> me when I blindly copie
On Wed, Jul 10, 2019 at 01:46:57PM +0200, Nuno Gonçalves wrote:
> Hi,
>
> I found out that my Beaglebone didn't boot after:
>
> https://github.com/u-boot/u-boot/commit/13dd6665ed18f72380ca596931d609bc108d4b82
>
> I digged out the reason that this patch makes devnum a local variable,
> and it en
On Tue, Aug 20, 2019 at 10:18:30PM +0200, Martin Vystrčil wrote:
> File was found on specified location. Info about file was read,
> but then immediately destroyed using 'free' call. As a result
> file size was set to 0, hence fat process didn't read any data.
>
> Premature 'free' call removed. R
On Mon, Aug 26, 2019 at 04:25:31PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Support SPL and OpenSBI (FW_DYNAMIC firmware) boot.
> - Fix qemu kconfig build warning.
>
> https://travis-ci.org/rickchen36/u-boot-riscv/builds/576608303
>
> Thanks
> Rick
HS devices use the FIT post processing step to authenticate boot images.
Set the configured boot command to load FIT by default.
Signed-off-by: Andrew F. Davis
---
configs/am65x_hs_evm_a53_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/am65x_hs_evm_a53_defc
Some parts of these commands can be reused, add them to common files.
Signed-off-by: Andrew F. Davis
---
include/configs/am65x_evm.h | 3 +++
include/configs/ti_armv7_common.h | 8 +++-
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/include/configs/am65x_evm.h b/include
On Thu, Aug 22, 2019 at 03:41:45PM -0500, Adam Ford wrote:
> I have boards (omap3_logic and omap3_logic_somlv) which do not want
> USB enabled for SPL yet SPL is showing USB chunks being compiled into
> it.
>
> I had to create a patch [1] which disables the USB host controller
> when in SPL, yet
Add bootcount support for Rockchip rk3399.
The bootcount value is preserved in PMU_SYS_REG0 register,
this would help to support redundent boot.
Once the redundant boot triggers, the altboot command
will look for extlinux-rollback.conf on particular
bootable partition which supposed to be a recov
This patch handle a checks to not enable watchdog in TPL,
if TPL won't require to enable that.
This is useful, in rockchip platforms where watchdog would
require in SPL and U-Boot proper and optional to have it
in TPL. So, without this check, the TPL build failed to get
the watchdog_reset function
Add u-boot,dm-pre-reloc property for watchdog in rk3399-u-boot.dtsi
so-that SPL can access watchdog.
Signed-off-by: Jagan Teki
---
arch/arm/dts/rk3399-u-boot.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 273
Add Kconfig entry for CONFIG_WDT_DW, and it indeed
depends on DM WDT.
So, it can be avialable on particular board defconfig
only if they switch to use DW driver model code.
Signed-off-by: Jagan Teki
---
drivers/watchdog/Kconfig | 8
scripts/config_whitelist.txt | 1 -
2 files chang
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