On 10/18/19 10:53 PM, Tom Rini wrote:
- Modern pytest is more visible in telling us about parameters that we
had not described, so describe a few more.
- ConfigParser.readfp(...) is now configparser.read_file(...)
- As part of the "strings vs bytes" conversions in Python 3, we need to
encod
From: Tom Rini
Use the 2to3 tool to perform numerous automatic conversions from Python
2 syntax to Python 3. Also fix whitespace problems that Python 3
catches that Python 2 did not.
Signed-off-by: Tom Rini
Add missing Python 3 conversion.
Signed-off-by: Heinrich Schuchardt
---
test/py/con
On 10/18/19 10:53 PM, Tom Rini wrote:
Use the 2to3 tool to perform numerous automatic conversions from Python
2 syntax to Python 3. Also fix whitespace problems that Python 3
catches that Python 2 did not.
Signed-off-by: Tom Rini
This patch breaks
./test/py/test.py --bd=qemu-arm64 --build-d
Hi Bin,
On Wed, 9 Oct 2019 at 07:10, Bin Meng wrote:
> Hi Simon,
>
> On Wed, Sep 25, 2019 at 10:12 PM Simon Glass wrote:
> >
> > This provides access to SPI flash both through a read-only memory map and
> > with operations to erase and write flash. It supports 4KB or 64KB erase
> > sizes.
> >
>
There is a contributor in Linux kernel with a comma in their name, which
confuses patman and results in invalid to- or cc- addresses on some
patches. To avoid this, let's use \0 as a separator when generating cc
file.
Signed-off-by: Dmitry Torokhov
---
tools/patman/patman.py | 2 +-
tools/patman
On Fri, Oct 18, 2019 at 03:12:06PM -0600, Stephen Warren wrote:
> On 10/18/19 2:53 PM, Tom Rini wrote:
> > Use the 2to3 tool to perform numerous automatic conversions from Python
> > 2 syntax to Python 3. Also fix whitespace problems that Python 3
> > catches that Python 2 did not.
>
> > diff --g
On Fri, Oct 18, 2019 at 03:16:45PM -0600, Stephen Warren wrote:
> On 10/18/19 2:53 PM, Tom Rini wrote:
> > Currently, these tests are skipped when run in CI.
>
> How? If they're being skipped by some other mechanism, do we need to remove
> that other mechanism now that we're actively specifying "n
On 10/18/19 2:53 PM, Tom Rini wrote:
Hey all,
So, here's the first pass at moving our test/py code over to Python 3.
It's not quite ready to merge as noted by the WORKAROUND / HACK patches
at the end. The first two patches can go in any time and I will
probably pull them soon as well. The next
On 10/18/19 2:53 PM, Tom Rini wrote:
When running these tests currently we see both warnings about how
escape sequences need to be updated and then we see failures of some
tests related to finding expected strings and so forth. It seems quite
likely that these tests need work to function with Py
On 10/18/19 2:53 PM, Tom Rini wrote:
Currently, these tests are skipped when run in CI.
How? If they're being skipped by some other mechanism, do we need to
remove that other mechanism now that we're actively specifying "not fs"
when running under CI?
On 10/18/19 2:53 PM, Tom Rini wrote:
Use the 2to3 tool to perform numerous automatic conversions from Python
2 syntax to Python 3. Also fix whitespace problems that Python 3
catches that Python 2 did not.
diff --git a/test/py/conftest.py b/test/py/conftest.py
import pytest
from _pytest
We inconsistently note multiple dependencies today in our tests,
sometimes with a single line that declares multiple and sometimes
multiple single lines. Current pytest seems to fail on the single line
format so change to multiple declarations.
Signed-off-by: Tom Rini
---
test/py/tests/test_and
When running these tests currently we see both warnings about how
escape sequences need to be updated and then we see failures of some
tests related to finding expected strings and so forth. It seems quite
likely that these tests need work to function with Python 3 and it's
better unicode support.
- Modern pytest is more visible in telling us about parameters that we
had not described, so describe a few more.
- ConfigParser.readfp(...) is now configparser.read_file(...)
- As part of the "strings vs bytes" conversions in Python 3, we need to
encode / decode our pipes in a few areas, use u
Currently, these tests are skipped when run in CI. With the move to
python3 and a newer host they are being run, but showing failures that
need more investigation. For now, skip these tests as we had been
doing.
Signed-off-by: Tom Rini
---
.gitlab-ci.yml | 2 ++
1 file changed, 2 insertions(+)
As things stand today, buildman uses python 2. In order to have
virtualenv use python 3, so that we can use pip to install what we want,
we need to delay any use of virtualenv until after we have used
buildman. Further, to aid in speeding up work here, for now install
python3-pip in our task here
Use the 2to3 tool to perform numerous automatic conversions from Python
2 syntax to Python 3. Also fix whitespace problems that Python 3
catches that Python 2 did not.
Signed-off-by: Tom Rini
---
test/py/conftest.py | 9 ++--
test/py/multiplexed_log.py| 4 +-
test/py/tes
In the case of some unit tests we are working with providing a fake
flash device that we have written some text strings in to. In this case
we want to tell Python to encode things to bytes for us.
Signed-off-by: Tom Rini
---
test/py/tests/test_ut.py | 6 +++---
1 file changed, 3 insertions(+),
From: Marek Vasut
Fix the following spit from pytest:
u-boot/test/py/conftest.py:438: RemovedInPytest4Warning: MarkInfo objects are
deprecated as they contain merged marks which are hard to deal with correctly.
Please use node.get_closest_marker(name) or node.iter_markers(name).
Docs: https
We need to make sure that we prepend changes to PATH, so that any
binaries we need to provide ourselves are used not overwrite PATH for
this. Overwriting PATH like this breaks the python virtualenv PATH
changes.
Signed-off-by: Tom Rini
---
.gitlab-ci.yml | 2 +-
1 file changed, 1 insertion(+),
In a number of our stanzas we had multi-line commands that were one
space short of alignment, correct this.
Signed-off-by: Tom Rini
---
.gitlab-ci.yml | 40
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
in
Hey all,
So, here's the first pass at moving our test/py code over to Python 3.
It's not quite ready to merge as noted by the WORKAROUND / HACK patches
at the end. The first two patches can go in any time and I will
probably pull them soon as well. The next patch is an old one from
Marek that I
Hell Priyanka,
>-Original Message-
>From: Mathew McBride
>Sent: Friday, October 18, 2019 8:58 AM
>To: u-boot@lists.denx.de
>Cc: Priyanka Jain ; Mathew McBride
>
>Subject: [PATCH 1/2] armv8: dts: ls1088a: add PSCI binding for LS1088A
>
>2.19.1
[snip]
> Mathew, Have you tested this change
Hi Jean-Jacques,
On Tue, 1 Oct 2019 at 05:51, Jean-Jacques Hiblot wrote:
>
> Prepare the way for a managed GPIO API by handling NULL pointers without
> crashing nor failing.
> VALIDATE_DESC() and validate_desc() come straight from Linux.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
>
> drivers/
Hi Bin,
On Fri, 18 Oct 2019 at 09:38, Bin Meng wrote:
>
> Hi Simon,
>
> On Fri, Oct 18, 2019 at 10:14 PM Simon Glass wrote:
> >
> > Hi Bin,
> >
> > On Thu, 17 Oct 2019 at 20:32, Bin Meng wrote:
> > >
> > > Hi Simon,
> > >
> > > On Fri, Oct 18, 2019 at 10:22 AM Simon Glass wrote:
> > > >
> > >
Hi Anatolij,
> Loading U-Boot on i.MX8QXP MEK board is broken since recent changes
> in spl_mmc:
>
> U-Boot SPL 2019.10-00162-gff5bd397e4 (Oct 18 2019 - 15:50:45 +0200)
> Normal Boot
> WDT: Not found!
> Trying to boot from MMC2_2
> Load image from MMC/SD 0x46400
> spl: mmc partition
On Fri, 18 Oct 2019 20:29:22 +0200
Patrick Delaunay wrote:
> Correct the name of the define used in CONFIG_IS_ENABLED():
> it is not align with Kconfig name= CONFIG_$(SPL_)PINCONF_RECURSIVE.
>
> This correct a regression introduced by
> commit c20851b3d850 ("dm: pinctrl: introduce PINCONF_RECURS
Loading U-Boot on i.MX8QXP MEK board is broken since recent changes
in spl_mmc:
U-Boot SPL 2019.10-00162-gff5bd397e4 (Oct 18 2019 - 15:50:45 +0200)
Normal Boot
WDT: Not found!
Trying to boot from MMC2_2
Load image from MMC/SD 0x46400
spl: mmc partition switch failed
SPL: failed to
Correct the name of the define used in CONFIG_IS_ENABLED():
it is not align with Kconfig name= CONFIG_$(SPL_)PINCONF_RECURSIVE.
This correct a regression introduced by
commit c20851b3d850 ("dm: pinctrl: introduce PINCONF_RECURSIVE
option")
Signed-off-by: Patrick Delaunay
---
drivers/pinctrl/pi
On Thu, 2019-10-10 at 14:23 -0700, Atish Patra wrote:
> Add gz parsing logic so that booti can parse both Image
> and Image.gz to boot Linux. Currently, it is difficult to calculate
> a safe address for every board where the Image.gz can be
> decompressed.
> It is also not possible to figure out th
The following changes since commit c83b1bb923421e95e499b22b010d2f9f463c1226:
Merge tag 'dm-pull-15oct19' of
https://gitlab.denx.de/u-boot/custodians/u-boot-dm (2019-10-16 18:10:31
-0400)
are available in the Git repository at:
https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git
tags/efi
.-x-evo-quoted { -webkit-user-select: none; }a { color: #248a76;
}a.-x-evo-visited-link { color: #273134; }body {
font-family: 'Hack';
font-size: 11pt;
font-weight: 400;
font-style: normal;
-webkit-line-break: after-white-space;
-webkit-font-smoothing: subpixel-antialiased;
}
pre,code,.p
Hi Simon,
On Fri, Oct 18, 2019 at 10:14 PM Simon Glass wrote:
>
> Hi Bin,
>
> On Thu, 17 Oct 2019 at 20:32, Bin Meng wrote:
> >
> > Hi Simon,
> >
> > On Fri, Oct 18, 2019 at 10:22 AM Simon Glass wrote:
> > >
> > > Hi,
> > >
> > > On Thu, 17 Oct 2019 at 08:28, Simon Glass wrote:
> > > >
> > > >
of
https://gitlab.denx.de/u-boot/custodians/u-boot-ubi (2019-10-17 07:26:16 -0400)
are available in the Git repository at:
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic.git
tags/u-boot-amlogic-20191018
for you to fetch changes up to be2ffa1656509cc974910224a87443868d7037d9:
configs: s
On 28/08/2019 10:22, Neil Armstrong wrote:
> On 18/08/2019 15:42, Beniamino Galvani wrote:
>> Hi,
>>
>> these two patches enable the USB host controller on Odroid-C2. The
>> first patch adds a PHY driver; the second one enables the necessary
>> configuration options and updates the device tree.
>>
Hi Vignesh,
On Fri, 18 Oct 2019 at 03:48, Vignesh Raghavendra wrote:
>
>
>
> On 18/10/19 7:52 AM, Simon Glass wrote:
> > Hi,
> >
> > On Thu, 17 Oct 2019 at 08:28, Simon Glass wrote:
> >>
> >> Hi Vignesh,
> >>
> >> On Wed, 16 Oct 2019 at 04:28, Vignesh Raghavendra wrote:
> >>>
> >>> Hi Simon,
>
Hi Bin,
On Thu, 17 Oct 2019 at 20:32, Bin Meng wrote:
>
> Hi Simon,
>
> On Fri, Oct 18, 2019 at 10:22 AM Simon Glass wrote:
> >
> > Hi,
> >
> > On Thu, 17 Oct 2019 at 08:28, Simon Glass wrote:
> > >
> > > Hi Vignesh,
> > >
> > > On Wed, 16 Oct 2019 at 04:28, Vignesh Raghavendra wrote:
> > > >
Hi Vignesh,
On Fri, 18 Oct 2019 at 02:50, Vignesh Raghavendra wrote:
>
[..]
> As it stands we don't actually use that uclass with this SPI flash
> driver - it implements the SPI_FLASH interface directly.
>
> But given that I'm going to try to use the same ich.c driver this
>
Add stream_id_cur field to ls_pcie structure and initialize
it with 0 for all pcie controllers. This field will be used
for streamId calculation.
Signed-off-by: Wasim Khan
---
drivers/pci/pcie_layerscape.c | 3 ++-
drivers/pci/pcie_layerscape.h | 3 ++-
2 files changed, 4 insertions(+), 2 deleti
Update API names for layerscape fixup.
Signed-off-by: Wasim Khan
---
drivers/pci/pcie_layerscape_fixup.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/pci/pcie_layerscape_fixup.c
b/drivers/pci/pcie_layerscape_fixup.c
index 089e031..e0dcd97
Add FSL_PEX_STREAM_ID_END and remove FSL_PEX_STREAM_ID_NUM
for lx2160a.
Signed-off-by: Wasim Khan
---
arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
Move streamId allocation to layerscape common device tree fixup.
Calculate streamId based on SoC variant.
Signed-off-by: Wasim Khan
---
drivers/pci/pcie_layerscape_fixup.c| 16
drivers/pci/pcie_layerscape_fixup_common.c | 22 ++
drivers/pci/pcie_layer
Add Common device tree fixup for NXP SoCs. Based on
SoC and revision call pcie_layerscape or pcie_layerscape_gen4
fixup.
Signed-off-by: Wasim Khan
---
drivers/pci/Makefile | 5 +++--
drivers/pci/pcie_layerscape_fixup.c| 5 +++--
drivers/pci/pcie_layerscape_fixup_c
lx2 rev2 has SNP controller. Enable pcie_layerscape code
for CONFIG_PCIE_LAYERSCAPE_GEN4. Based on SoC and revision
pcie controller probe will be invoked.
Signed-off-by: Wasim Khan
---
drivers/pci/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/Makefile b
lx2 rev2 requires device tree fixup as it has SNP pcie controller.
Add device tree fixup for lx2 rev2 based on SoC and Version.
Signed-off-by: Wasim Khan
---
drivers/pci/pcie_layerscape_fixup.c| 1 +
drivers/pci/pcie_layerscape_fixup_common.c | 76 ++
drivers
Update API names for layerscape gen4 fixup.
Signed-off-by: Wasim Khan
---
drivers/pci/pcie_layerscape_gen4_fixup.c | 20
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c
b/drivers/pci/pcie_layerscape_gen4_fixup.c
index
LX2-Rev1 has MV PCIe controller which use pcie_layerscape_gen4 driver.
LX2-Rev2 and other layerscape devices has SNP PCIe controller which use
pcie_layerscape driver.
This patch set enables support for LX2-Rev2 and use pcie_layerscape or
pcie_layerscape_gen4 driver based on SoC variant and SoC V
Hi Priyanka,
On 18.10.2019 12:01, Laurentiu Tudor wrote:
> From: Laurentiu Tudor
>
> These macros should only be used when CONFIG_FSL_CAAM is present.
>
> Signed-off-by: Laurentiu Tudor
> Reviewed-by: Horia Geant??
Looks like our mail server messed Horia's name here. Do you think you
could
On 10/18/2019 12:01 PM, Laurentiu Tudor wrote:
> From: Laurentiu Tudor
>
> Add ICID setup for the platform devices contained on this chip: usb,
> sata, sdhc, sec.
>
> Signed-off-by: Laurentiu Tudor
Reviewed-by: Horia Geantă
Thanks,
Horia
___
U-Boot
On 10/18/2019 12:01 PM, Laurentiu Tudor wrote:
> From: Laurentiu Tudor
>
> If SEC FW support is not enabled (ARMV8_SEC_FIRMWARE_SUPPORT=n) this
> compilation error happens:
> arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h:169:4: error:
> 'CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT' undeclared here (n
Dear All,
after watching this mailing list some days I am not sure if I am right here.
But I will give it a try. Here my issue.
some years ago ( maybe almost 3 years ) I bought 5 Banana-Pi M3. They were
running successfully all over the time. A little bit more than a year ago I
replaced the
On Tue, Oct 15, 2019 at 02:29:27PM +0530, Vignesh Raghavendra wrote:
> Hi Tom,
>
> On 10/10/19 11:22 AM, Vignesh Raghavendra wrote:
> > This series adds support for HyperBus Memory Controller of TI's J721e
> > and AM654 SoCs.
> >
>
> Stefan has provided Reviewed-bys for CFI related changes. Coul
On Fri, Oct 18, 2019 at 2:40 PM Vignesh Raghavendra wrote:
>
> Hi,
>
> On 18/10/19 2:34 PM, Simon Goldschmidt wrote:
> > On Thu, Oct 17, 2019 at 2:55 PM Simon Goldschmidt
> > wrote:
> >>
> >> On Thu, Oct 17, 2019 at 2:44 PM Vignesh Raghavendra
> >> wrote:
> >>>
> >>> Hi,
> >>>
> >>> On 17/10/19
Hi,
On 18/10/19 2:34 PM, Simon Goldschmidt wrote:
> On Thu, Oct 17, 2019 at 2:55 PM Simon Goldschmidt
> wrote:
>>
>> On Thu, Oct 17, 2019 at 2:44 PM Vignesh Raghavendra wrote:
>>>
>>> Hi,
>>>
>>> On 17/10/19 5:09 PM, Simon Goldschmidt wrote:
On Mon, Oct 14, 2019 at 3:27 PM Vignesh Raghavend
On Fri, Oct 18, 2019 at 05:36:28PM +0900, AKASHI Takahiro wrote:
> Hi Tom,
>
> On Thu, Oct 17, 2019 at 11:23:21AM -0400, Tom Rini wrote:
> > On Tue, Oct 15, 2019 at 06:25:19PM +0900, AKASHI Takahiro wrote:
> > > On Tue, Oct 15, 2019 at 07:33:18AM +0200, Heinrich Schuchardt wrote:
> > > > On 10/15/
On 17/10/2019 20:07, Jagan Teki wrote:
Rockchip has documentation file, doc/README.rockchip but
which is not so readable to add or understand the existing
contents. Even the format that support is legacy readme
in U-Boot.
Add rockchip specific documentation file using new rst
format, which descr
Am 25.09.19 um 11:45 schrieb Weijie Gao:
> This patch series have the following changes:
>
> - Add pinctrl(both pinmux and pinconf) driver, reset controller driver and
>clock driver for mt7628.
> - Add mt7628 platform to mtk-sd driver.
> - Modify mt7628's ethernet & usb phy driver to take ad
Am 04.09.19 um 19:51 schrieb William Zhang:
> The current brcmnand driver is based on 4.18 linux kernel which uses
> mtd_set_ooblayout to set ecc layout. But nand base code in u-boot is from
> old kernel which does not use this new API and expect nand_chip.ecc.layout
> structure to be set. This c
On Fri, Oct 18, 2019 at 07:40:13AM +0200, Heiko Schocher wrote:
> Hello Tom,
>
> Am 16.10.2019 um 10:45 schrieb Heiko Schocher:
> > Hello Tom,
> >
> > Am 16.10.2019 um 06:56 schrieb Heiko Schocher:
> > > Hello Tom,
> > >
> > > I planned to send my patches which convert the imx6 based aristaineto
Am 16.09.19 um 17:15 schrieb Álvaro Fernández Rojas:
> Fixes commit 344db3f, which added missing bmips dtbs depending on their SoCs.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> arch/mips/dts/Makefile | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
applied to u-boot-mips,
Am 30.08.19 um 11:54 schrieb Álvaro Fernández Rojas:
> Signed-off-by: Álvaro Fernández Rojas
> ---
> include/configs/bmips_bcm3380.h | 6 --
> include/configs/bmips_bcm6318.h | 6 --
> include/configs/bmips_bcm63268.h | 6 --
> include/configs/bmips_bcm6
Am 30.08.19 um 12:00 schrieb Álvaro Fernández Rojas:
> Signed-off-by: Álvaro Fernández Rojas
> ---
> arch/mips/dts/brcm,bcm6362.dtsi | 2 +-
> arch/mips/dts/netgear,dgnd3700v2.dts| 2 +-
> board/netgear/dgnd3700v2/MAINTAINERS| 2 +-
Am 30.08.19 um 11:52 schrieb Álvaro Fernández Rojas:
> These are no longer needed.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> v2: CONFIG_SYS_MONITOR_BASE is used for relocation and can't be removed
>
> include/configs/bmips_common.h | 4
> 1 file changed, 4 deletions(-)
>
> diff
Am 28.08.19 um 19:12 schrieb Álvaro Fernández Rojas:
> These patches add support for brcmnand on bmips.
> The current brcmnand driver only supports controller >= 4.0,
> which means that only BCM63268 works right now.
>
> v3: Introduce changes suggested by Daniel Schwierzeck:
> - Introduce soc_t
Am 10.06.19 um 20:05 schrieb Ramon Fried:
> If configuration is set to skip low level init, automatic
> probe of L2 cache size is not performed and the size is set to 0.
> Flushing or invalidating the L2 cache will fail in this case.
>
> Add a static configuration (SYS_DCACHE_LINE_SIZE) with def
Jagan,
On 2019/10/18 上午3:07, Jagan Teki wrote:
idbloader.img name is specific to rockchip,
This is specific for rockchip, like rksd, rkspi type in mkimage, since
it's clear for what it stands for,
I think it can also used in U-Boot.
where it usually
created using rockchip tools.
No, i
>-Original Message-
>From: U-Boot On Behalf Of
>georg.kirschb...@siemens.com
>Sent: Tuesday, September 24, 2019 4:16 PM
>To: u-boot@lists.denx.de
>Subject: [U-Boot] [PATCH] LS1043A: Add bugfix for IFC beyond 4 GiB
>
>From b5691db49dc3844b650f78634c35f091df906095 Mon Sep 17 00:00:00
>2001
Hi Vagrant,
On 2019/10/18 上午3:08, Vagrant Cascadian wrote:
The instructions in doc/README.rockchip for installing rock64-rk3328
make use of u-boot.itb, but it is not built by default.
Add u-boot.itb to BUILD_TARGET for RK3328 platforms.
Signed-off-by: Vagrant Cascadian
---
Kconfig | 2 +-
On 2019/10/17 下午3:22, d...@t-chip.com.cn wrote:
From: Levin Du
Without the prefix, "same-as-spl" in `u-boot,spl-boot-order` will not work
as expected. When board_boot_order() `spl-boot-order.c` meets
"same-as-spl", it gets the conf by looking the boot_devices table by boot
source, and parse th
On 18/10/19 11:43, Parthiban Nallathambi wrote:
> Hello Stefano,
>
> On 10/8/19 10:23 AM, Stefano Babic wrote:
>> On 08/10/19 10:12, Parthiban Nallathambi wrote:
>>> Hi Stefano,
>>>
>>> On 10/7/19 6:06 PM, Stefano Babic wrote:
Hi Parthiban,
On 23/08/19 18:19, Parthiban Nallathambi w
On 18/10/19 7:52 AM, Simon Glass wrote:
> Hi,
>
> On Thu, 17 Oct 2019 at 08:28, Simon Glass wrote:
>>
>> Hi Vignesh,
>>
>> On Wed, 16 Oct 2019 at 04:28, Vignesh Raghavendra wrote:
>>>
>>> Hi Simon,
>>>
>>> On 12/10/19 10:03 AM, Bin Meng wrote:
Hi Simon,
On Sat, Oct 12, 2019 at 1
Firmware Configuration Block(FCB) for imx6ul(l) needs to be
BCH encoded.
Signed-off-by: Parthiban Nallathambi
Acked-by: Shyam Saini
Acked-by: Peng Fan
---
Notes:
Notes:
Changes in v3:
- Conditionally include BCH both in Kconfig and source
Changes in v2:
Hello Stefano,
On 10/8/19 10:23 AM, Stefano Babic wrote:
On 08/10/19 10:12, Parthiban Nallathambi wrote:
Hi Stefano,
On 10/7/19 6:06 PM, Stefano Babic wrote:
Hi Parthiban,
On 23/08/19 18:19, Parthiban Nallathambi wrote:
Firmware Configuration Block(FCB) for imx6ul(l) needs to be
BCH encoded
Hi Claudius,
On Wed, 2019-10-16 at 15:27 +0200, Claudius Heine wrote:
> The only register used in that function is gpr10, which is used to store
> the flag. So naming it after this makes sense.
I think the old name had a reason: The _value_ for bmode is stored in
GPR9 if this function returns tr
On 11/10/2019 17:33, Neil Armstrong wrote:
> Add support for the customer board SEI610 manufactured by SEI Robotics
> with the following specifications:
> - Amlogic S905X3 ARM Cortex-A35 quad-core SoC
> - 2GB DDR4 SDRAM
> - 10/100 Ethernet (Internal PHY)
> - 1 x USB 3.0 Host
> - 1 x USB Type-C
On Fri, Oct 18, 2019 at 5:22 AM Tom Rini wrote:
>
> On Thu, Oct 17, 2019 at 02:05:05PM +, liu hao wrote:
>
> > This adds platform code and the device tree for the Phytium Durian Board.
> > The initial support comprises the UART the GMAC and the PCIE.
> >
> > v3:
Please drop these changelog fr
On Thu, Oct 17, 2019 at 2:55 PM Simon Goldschmidt
wrote:
>
> On Thu, Oct 17, 2019 at 2:44 PM Vignesh Raghavendra wrote:
> >
> > Hi,
> >
> > On 17/10/19 5:09 PM, Simon Goldschmidt wrote:
> > > On Mon, Oct 14, 2019 at 3:27 PM Vignesh Raghavendra
> > > wrote:
> > >>
> > >> Add support for Direct A
From: Laurentiu Tudor
Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, sec.
Signed-off-by: Laurentiu Tudor
Reviewed-by: Horia Geant??
---
Changes in v2:
- added Reviewed-by tag
arch/arm/cpu/armv8/fsl-layerscape/Makefile| 1 +
.../arm/cpu/armv8/fsl-layers
From: Laurentiu Tudor
Erratum A-050382 states that the eDMA ICID programmed in the eDMA_AMQR
register in DCFG is not correctly forwarded to the SMMU.
The workaround consists in programming the eDMA ICID in the eDMA_AMQR
register in DCFG to 40.
Signed-off-by: Laurentiu Tudor
---
Changes in v2:
From: Laurentiu Tudor
LX2160A chips have 4 sata controllers. Add missing base addresses for
SATA3 and SATA4.
Signed-off-by: Laurentiu Tudor
---
Changes in v2:
- explicitly mention the chip on which these are needed (Priyanka)
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 2 ++
1 f
From: Laurentiu Tudor
If SEC FW support is not enabled (ARMV8_SEC_FIRMWARE_SUPPORT=n) this
compilation error happens:
arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h:169:4: error:
'CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT' undeclared here (not in a function)
Fix it by wrapping with CONFIG_IS_ENABLE
From: Laurentiu Tudor
Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, sec.
Signed-off-by: Laurentiu Tudor
---
Changes in v2:
- setup ICIDs for all 6 DECOs not only 4 (Horia)
arch/arm/cpu/armv8/fsl-layerscape/Makefile| 1 +
.../arm/cpu/armv8/fsl-layerscap
From: Laurentiu Tudor
These macros should only be used when CONFIG_FSL_CAAM is present.
Signed-off-by: Laurentiu Tudor
Reviewed-by: Horia Geant??
---
Changes in v2:
- added Reviewed-by tag
arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c | 2 ++
arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c
Hi Simon,
On 16/10/19 10:10 PM, Simon Glass wrote:
> Hi Vignesh,
>
> On Wed, 16 Oct 2019 at 04:28, Vignesh Raghavendra wrote:
>>
>> Hi Simon,
>>
>> On 12/10/19 10:03 AM, Bin Meng wrote:
>>> Hi Simon,
>>>
>>> On Sat, Oct 12, 2019 at 11:08 AM Simon Glass wrote:
Hi Bin,
On Wed,
Hi Tom,
On Thu, Oct 17, 2019 at 11:23:21AM -0400, Tom Rini wrote:
> On Tue, Oct 15, 2019 at 06:25:19PM +0900, AKASHI Takahiro wrote:
> > On Tue, Oct 15, 2019 at 07:33:18AM +0200, Heinrich Schuchardt wrote:
> > > On 10/15/19 5:18 AM, AKASHI Takahiro wrote:
> > > >On Sat, Oct 12, 2019 at 03:02:09PM
On 11/10/2019 17:33, Neil Armstrong wrote:
> Add support for the customer board SEI610 manufactured by SEI Robotics
> with the following specifications:
> - Amlogic S905X3 ARM Cortex-A35 quad-core SoC
/\
Cortex-A55, will fix while applying
> - 2GB DDR4 SDRAM
>
On 11/10/2019 15:12, Neil Armstrong wrote:
> For SM1 support a new Power Domain driver is needed to handle more than
> the VPU power domain.
>
> This Power Domain driver is also used for G12A to also control the Ethernet
> Power Domain for example.
>
> Neil Armstrong (2):
> power: domain: add A
On 10/17/2019 12:22 PM, Laurentiu Tudor wrote:
> From: Laurentiu Tudor
>
> Add ICID setup for the platform devices contained on this chip: usb,
> sata, sdhc, sec.
>
> Signed-off-by: Laurentiu Tudor
Reviewed-by: Horia Geantă
Thanks,
Horia
___
U-Boot
Use the same SPL_STACK_R_ADDR in Kconfig instead of each board config;
default to 0x400(64MB) instead of 0x8(512KB) for this address
can support all the SoCs including those may have only 64MB memory, and
also reserve enough space for atf, kernel(in falcon mode) loading.
After the ATF entr
We use to reserve IRAM to avoid the SPL text overlap with ATF M0 code,
and when we introduce the TPL, the SPL space is in DRAM, we reserve
space to avoid SPL text overlap with ATF bl31.
Now we decide to move ATF entry point to 0x4 instead of 0x1000,
so that the SPL can have 0x4000 as code size
Since we move the ATF bl31 entry for 64bit CPUs to 0x4, we need to
limit the SPL size in 0x4(start from 0) so that we don't need to do
the relocate for ATF loading.
Note that there will be separate BSS, STACK and MALLOC heap, so the size
0x4(256KB) should be enough for SPL text.
Signed
Dear Heinrich:
According to you comments, I have modified the files
in the https://github.com/phytium-durian/bpf Git repository,
such as chmod 755 dopack, create README, create LICENSE about BSD-3.
Although the BPF is created referring to the ATF, but it is very different from
ATF.
There are too
On 18.10.2019 09:20, Priyanka Jain wrote:
>
>
>> -Original Message-
>> From: u-boot-boun...@linux.nxdi.nxp.com > boun...@linux.nxdi.nxp.com> On Behalf Of Laurentiu Tudor
>> Sent: Thursday, October 17, 2019 2:52 PM
>> To: u-boot@lists.denx.de; Prabhakar X
>> Subject: [u-boot] [PATCH 5/6
On 18.10.2019 09:32, Horia Geanta wrote:
> On 10/17/2019 12:21 PM, Laurentiu Tudor wrote:
>> From: Laurentiu Tudor
>>
>> If SEC FW support is not enabled (ARMV8_SEC_FIRMWARE_SUPPORT=n) this
>> compilation error happens:
>> arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h:169:4: error:
>> 'CON
>-Original Message-
>From: Mathew McBride
>Sent: Friday, October 18, 2019 8:58 AM
>To: u-boot@lists.denx.de
>Cc: Priyanka Jain ; Mathew McBride
>
>Subject: [PATCH 1/2] armv8: dts: ls1088a: add PSCI binding for LS1088A
>
>This allows the use of PSCI calls to trusted firmware to initiate r
Hi Tom,
Please pull some riscv updates:
- Support sifive DM based gpio driver for FU540-SoC.
- Align boot image header with Linux v5.3
https://travis-ci.org/rickchen36/u-boot-riscv/builds/599424917
Thanks
Rick
The following changes since commit a2fce50455c9831f36765e5813b0b5e98f55d70b:
Mer
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