Re: [PATCH] Add CONFIG_OF_SEPARATE in sifive_fu540_defconfig

[Bin Meng]

Hi Pragnesh,

On Tue, Feb 11, 2020 at 2:53 PM Pragnesh Patel
 wrote:
>
> Added CONFIG_OF_SEPARATE again which removed by the following
> commit 052170c6a043 ("configs: Resync with savedefconfig")
>
> Signed-off-by: Pragnesh Patel 
> ---
>  configs/sifive_fu540_defconfig | 1 +
>  1 file changed, 1 insertion(+)
>

This patch is not needed because CONFIG_OF_SEPARATE is turned on by default.

Regards,
Bin

Re: [PATCH 1/1] log: syslog driver

[Heinrich Schuchardt]

On 2/11/20 12:13 AM, Simon Glass wrote:

Hi Heinrich,

On Sat, 8 Feb 2020 at 18:35, Heinrich Schuchardt  wrote:


Provide a log driver that broadcasts RFC 3164 messages to syslog servers.
rsyslog is one implementation of such a server.

The messages are sent to the local broadcast address 255.255.255.255 on
port 514.

The environment variable log_hostname can be used to provide the HOSTNAME
field for the messages. The optional TIMESTAMP field of RFC 3164 is not
provided.

Signed-off-by: Heinrich Schuchardt 
---
  MAINTAINERS |   2 +-
  common/Kconfig  |   7 +++
  common/Makefile |   1 +
  common/log_syslog.c | 117 
  doc/README.log  |   3 ++
  5 files changed, 129 insertions(+), 1 deletion(-)
  create mode 100644 common/log_syslog.c


Is it possible to add a test for this using sandbox networking?


test/dm/eth.c seems to contain templates.

I guess sandbox_eth_set_tx_handler() could be used for checking the
syslog message.

Best regards

Heinrich

[PATCH] Add CONFIG_OF_SEPARATE in sifive_fu540_defconfig

[Pragnesh Patel]

Added CONFIG_OF_SEPARATE again which removed by the following
commit 052170c6a043 ("configs: Resync with savedefconfig")

Signed-off-by: Pragnesh Patel 
---
 configs/sifive_fu540_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig
index 6d61e6c960..4dbd2b39d4 100644
--- a/configs/sifive_fu540_defconfig
+++ b/configs/sifive_fu540_defconfig
@@ -12,3 +12,4 @@ CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
+CONFIG_OF_SEPARATE=y
-- 
2.17.1

[Patch v2 1/3] mtd: spi-nor-ids: Enable SPI_NOR_OCTAL_READ flag for mt35xu*

[Kuldeep Singh]

Commit "658df8bd9464"(mtd: spi-nor-core: Add octal mode support) enables
octal mode(1-1-8) support in spi-nor framework.

mt35xu512aba and mt35xu02g supports SINGLE and OCTAL I/O.
Hence, enable SPI_NOR_OCTAL_READ flag for these flashes.

Signed-off-by: Kuldeep Singh 
---
v2: Reword commit message

 drivers/mtd/spi/spi-nor-ids.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 973b6f8..334c074 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -182,8 +182,8 @@ const struct flash_info spi_nor_ids[] = {
{ INFO("n25q00",  0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | 
SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
{ INFO("n25q00a", 0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | 
SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
{ INFO("mt25qu02g",   0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | 
SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
-   { INFO("mt35xu512aba", 0x2c5b1a, 0,  128 * 1024,  512, USE_FSR | 
SPI_NOR_4B_OPCODES) },
-   { INFO("mt35xu02g",  0x2c5b1c, 0, 128 * 1024,  2048, USE_FSR | 
SPI_NOR_4B_OPCODES) },
+   { INFO("mt35xu512aba", 0x2c5b1a, 0,  128 * 1024,  512, USE_FSR | 
SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
+   { INFO("mt35xu02g",  0x2c5b1c, 0, 128 * 1024,  2048, USE_FSR | 
SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
 #endif
 #ifdef CONFIG_SPI_FLASH_SPANSION   /* SPANSION */
/* Spansion/Cypress -- single (large) sector size only, at least
-- 
2.7.4

[Patch v2 3/3] arm: dts: lx2160a: Add RX, TX buswidth in qspi to use octal mode

[Kuldeep Singh]

Signed-off-by: Kuldeep Singh 
---
Depends on https://patchwork.ozlabs.org/patch/1236164/
v2:
-Add lx2160qds buswidth
-Update dependencies

 arch/arm/dts/fsl-lx2160a-qds.dts | 4 
 arch/arm/dts/fsl-lx2160a-rdb.dts | 4 
 2 files changed, 8 insertions(+)

diff --git a/arch/arm/dts/fsl-lx2160a-qds.dts b/arch/arm/dts/fsl-lx2160a-qds.dts
index cffefae..b29af20 100644
--- a/arch/arm/dts/fsl-lx2160a-qds.dts
+++ b/arch/arm/dts/fsl-lx2160a-qds.dts
@@ -36,6 +36,8 @@
compatible = "jedec,spi-nor";
spi-max-frequency = <5000>;
reg = <0>;
+   spi-rx-bus-width = <8>;
+   spi-tx-bus-width = <1>;
};
 
mt35xu512aba1: flash@1 {
@@ -44,6 +46,8 @@
compatible = "jedec,spi-nor";
spi-max-frequency = <5000>;
reg = <1>;
+   spi-rx-bus-width = <8>;
+   spi-tx-bus-width = <1>;
};
 };
 
diff --git a/arch/arm/dts/fsl-lx2160a-rdb.dts b/arch/arm/dts/fsl-lx2160a-rdb.dts
index e542c69..87617ca 100644
--- a/arch/arm/dts/fsl-lx2160a-rdb.dts
+++ b/arch/arm/dts/fsl-lx2160a-rdb.dts
@@ -39,6 +39,8 @@
compatible = "jedec,spi-nor";
spi-max-frequency = <5000>;
reg = <0>;
+   spi-rx-bus-width = <8>;
+   spi-tx-bus-width = <1>;
};
 
mt35xu512aba1: flash@1 {
@@ -47,6 +49,8 @@
compatible = "jedec,spi-nor";
spi-max-frequency = <5000>;
reg = <1>;
+   spi-rx-bus-width = <8>;
+   spi-tx-bus-width = <1>;
};
 };
 
-- 
2.7.4

[Patch v2 0/3] Enable octal read support for mt35xu* flashes

[Kuldeep Singh]

v2 version of series update dependencies of the patches and add lx2160aqds node
buswidth in patch3.
No dependency on patch1 and patch2.
Patch3 has dependency on https://patchwork.ozlabs.org/patch/1236164/.

Patch series enable octal read(1-1-8) support for LX2160ARDB and LS1028ARDB
which have mt35xu512aba and mt35xu02g flashes respectively.

mt35xu512aba and mt35xu02g flashes support SINGLE and OCTAL I/O.
Previously, 1 bit mode was used in u-boot and now use octal mode for the 
flashes.

Patch 1 enables octal read flag for flashes in framework.
Patch 2/3 adds RX,TX buswidth in qspi dts entries to use octal mode for
LS1028ARDB/QDS, LX2160ARDB/QDS.

Kuldeep Singh (3):
  mtd: spi-nor-ids: Enable SPI_NOR_OCTAL_READ flag for mt35xu*
  arm: dts: ls1028a: Add RX,TX buswidth in qspi to use octal mode
  arm: dts: lx2160a: Add RX,TX buswidth in qspi to use octal mode

 arch/arm/dts/fsl-ls1028a-qds.dts | 2 ++
 arch/arm/dts/fsl-ls1028a-rdb.dts | 2 ++
 arch/arm/dts/fsl-lx2160a-qds.dts | 4 
 arch/arm/dts/fsl-lx2160a-rdb.dts | 4 
 drivers/mtd/spi/spi-nor-ids.c| 4 ++--
 5 files changed, 14 insertions(+), 2 deletions(-)

-- 
2.7.4

[Patch v2 2/3] arm: dts: ls1028a: Add RX, TX buswidth in qspi to use octal mode

[Kuldeep Singh]

Signed-off-by: Kuldeep Singh 
---
v2: No change

 arch/arm/dts/fsl-ls1028a-qds.dts | 2 ++
 arch/arm/dts/fsl-ls1028a-rdb.dts | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/arm/dts/fsl-ls1028a-qds.dts b/arch/arm/dts/fsl-ls1028a-qds.dts
index 3fd37be..029a8e3 100644
--- a/arch/arm/dts/fsl-ls1028a-qds.dts
+++ b/arch/arm/dts/fsl-ls1028a-qds.dts
@@ -49,6 +49,8 @@
compatible = "jedec,spi-nor";
spi-max-frequency = <5000>;
reg = <0>;
+   spi-rx-bus-width = <8>;
+   spi-tx-bus-width = <1>;
};
 };
 
diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts
index a8f4085..85b4815 100644
--- a/arch/arm/dts/fsl-ls1028a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1028a-rdb.dts
@@ -48,6 +48,8 @@
compatible = "jedec,spi-nor";
spi-max-frequency = <5000>;
reg = <0>;
+   spi-rx-bus-width = <8>;
+   spi-tx-bus-width = <1>;
};
 };
 
-- 
2.7.4

Re: net: porting qe driver to DM

[Heiko Schocher]

Hello Qiang,

Am 10.02.2020 um 03:53 schrieb Qiang Zhao:

Hi,

I will work on porting driver/qe to DM.


Thanks for the info!

I already have a first rough DM/DTS based driver for the parallel
I/O ports and the uec ethernet working.

I clean it up, and post it hopefully this week as an RFC.

bye,
Heiko


Best Regards
Qiang Zhao


-Original Message-
From: Ran Wang 
Sent: 2020年2月3日 18:23
To: h...@denx.de; u-boot@lists.denx.de; Qiang Zhao 
Cc: Mario Six ; York Sun ; Xiaobo Xie

Subject: RE: net: porting qe driver to DM

Add Qiang

Thanks & Regards,
Ran


-Original Message-
From: Heiko Schocher 
Sent: Monday, February 03, 2020 16:11
To: u-boot@lists.denx.de
Cc: Mario Six ; York Sun ; Ran
Wang 
Subject: net: porting qe driver to DM

Hello all,

somebody working on porting the drivers/qe to DM ?

Thanks!

bye,
Heiko
--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email:

h...@denx.de


--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: h...@denx.de

[PATCH v4 13/17] riscv: Add K210 clock support

[Sean Anderson]

Due to the large number of clocks, I decided to use the CCF. The overall
structure is modeled after the imx code. A common pattern is to create a
composite clock composed of several component clocks. For these component
clocks, the clk_register_* functions are not used, since they will be
registered as part of the composite clock. To create these component
clocks, several helper k210_clk_comp_* functions are used. This
functionality seems like it would be useful to other drivers also creating
composite clocks, so perhaps some general versions should be created. I am
not particularly attached to the naming convention, suggestions are
welcome.

Signed-off-by: Sean Anderson 
---

Changes in v4:
- Reparent aclk before configuring pll0
- Update copyright
- Lint

Changes in v3:
- Removed sysctl struct, replacing it with defines. This is to have the same
  interface to sysctl from C as from the device tree.
- Fixed clocks having the same id
- Fixed clocks not using the correct register/bits
- Aligned the defines in headers

Changes in v2:
- Add clk.o to obj-y
- Don't probe before relocation

 drivers/clk/kendryte/Kconfig|   2 +-
 drivers/clk/kendryte/Makefile   |   2 +-
 drivers/clk/kendryte/clk.c  | 409 
 include/dt-bindings/clock/k210-sysctl.h |  53 +++
 include/dt-bindings/mfd/k210-sysctl.h   |  38 +++
 include/kendryte/clk.h  |  27 ++
 6 files changed, 529 insertions(+), 2 deletions(-)
 create mode 100644 drivers/clk/kendryte/clk.c
 create mode 100644 include/dt-bindings/clock/k210-sysctl.h
 create mode 100644 include/dt-bindings/mfd/k210-sysctl.h
 create mode 100644 include/kendryte/clk.h

diff --git a/drivers/clk/kendryte/Kconfig b/drivers/clk/kendryte/Kconfig
index 7b69c8afaf..073fca0781 100644
--- a/drivers/clk/kendryte/Kconfig
+++ b/drivers/clk/kendryte/Kconfig
@@ -1,6 +1,6 @@
 config CLK_K210
bool "Clock support for Kendryte K210"
-   depends on CLK && CLK_CCF
+   depends on CLK && CLK_CCF && CLK_COMPOSITE_CCF
help
  This enables support clock driver for Kendryte K210 platforms.
 
diff --git a/drivers/clk/kendryte/Makefile b/drivers/clk/kendryte/Makefile
index 47f682fce3..6fb68253ae 100644
--- a/drivers/clk/kendryte/Makefile
+++ b/drivers/clk/kendryte/Makefile
@@ -1 +1 @@
-obj-y += bypass.o pll.o
+obj-y += bypass.o clk.o pll.o
diff --git a/drivers/clk/kendryte/clk.c b/drivers/clk/kendryte/clk.c
new file mode 100644
index 00..bfc4896dfe
--- /dev/null
+++ b/drivers/clk/kendryte/clk.c
@@ -0,0 +1,409 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019-20 Sean Anderson 
+ */
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+static ulong k210_clk_get_rate(struct clk *clk)
+{
+   struct clk *c;
+   int err = clk_get_by_id(clk->id, );
+
+   if (err)
+   return err;
+   return clk_get_rate(c);
+}
+
+static ulong k210_clk_set_rate(struct clk *clk, unsigned long rate)
+{
+   struct clk *c;
+   int err = clk_get_by_id(clk->id, );
+
+   if (err)
+   return err;
+   return clk_set_rate(c, rate);
+}
+
+static int k210_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+   struct clk *c, *p;
+   int err = clk_get_by_id(clk->id, );
+
+   if (err)
+   return err;
+
+   err = clk_get_by_id(parent->id, );
+   if (err)
+   return err;
+
+   return clk_set_parent(c, p);
+}
+
+static int k210_clk_endisable(struct clk *clk, bool enable)
+{
+   struct clk *c;
+   int err = clk_get_by_id(clk->id, );
+
+   if (err)
+   return err;
+   return enable ? clk_enable(c) : clk_disable(c);
+}
+
+static int k210_clk_enable(struct clk *clk)
+{
+   return k210_clk_endisable(clk, true);
+}
+
+static int k210_clk_disable(struct clk *clk)
+{
+   return k210_clk_endisable(clk, false);
+}
+
+static const struct clk_ops k210_clk_ops = {
+   .set_rate = k210_clk_set_rate,
+   .get_rate = k210_clk_get_rate,
+   .set_parent = k210_clk_set_parent,
+   .enable = k210_clk_enable,
+   .disable = k210_clk_disable,
+};
+
+/* The first clock is in0, which is filled in by k210_clk_probe */
+static const char * const generic_sels[] = { "in0_half", "pll0_half" };
+static const char *pll2_sels[] = { NULL, "pll0", "pll1" };
+
+static struct clk_divider *k210_clk_comp_div_flags(void __iomem *reg, u8 shift,
+  u8 width, u8 flags)
+{
+   struct clk_divider *div;
+
+   div = kzalloc(sizeof(*div), GFP_KERNEL);
+   if (!div)
+   return div;
+   div->reg = reg;
+   div->shift = shift;
+   div->width = width;
+   div->flags = flags;
+   return div;
+}
+
+static inline struct clk_divider *k210_clk_comp_div(void __iomem *reg, u8 
shift,
+   u8 width)
+{
+   return 

[PATCH v4 11/17] riscv: Add K210 pll support

[Sean Anderson]

This pll code is primarily based on the code from the kendryte standalone
sdk in lib/drivers/sysctl.c. k210_pll_calc_params is roughly analogous to
the algorithm used to set the pll frequency, but it has been completely
rewritten to be fixed-point based.

Signed-off-by: Sean Anderson 
---

Changes in v4:
- Rename the reference clock to "divider clock", and input clock to "reference
  clock" to match the upstream documentation.
- Add a test for calc_params. This currently resides in test/dm, but perhaps it
  should be moved to its own directory.
- Update MAINTAINERS
- Update copyright
- Lint

Changes in v3:
- Add an option to not include support for setting the pll rate. This saves
  around 1K in the final executable.
- Remove udelays to suppress warnings
- Bypass PLL after enabling, instead of before
- Check if the PLL is enabled already before doing a reset
- Fix bug with locked mask

Changes in v2:
- Rename driver to "k210_clk_pll"
- Add additional in-line documentation on algorithm and PLLs
- Restrict the range of internal VCO and reference frequencies
- Don't load driver before relocation
- Remove spurious references to mach-k210

 MAINTAINERS   |   6 +
 drivers/clk/Kconfig   |   1 +
 drivers/clk/Makefile  |   1 +
 drivers/clk/kendryte/Kconfig  |  12 +
 drivers/clk/kendryte/Makefile |   1 +
 drivers/clk/kendryte/pll.c| 604 ++
 include/kendryte/pll.h|  57 
 include/test/export.h |  16 +
 test/dm/Makefile  |   1 +
 test/dm/k210_pll.c|  95 ++
 10 files changed, 794 insertions(+)
 create mode 100644 drivers/clk/kendryte/Kconfig
 create mode 100644 drivers/clk/kendryte/Makefile
 create mode 100644 drivers/clk/kendryte/pll.c
 create mode 100644 include/kendryte/pll.h
 create mode 100644 include/test/export.h
 create mode 100644 test/dm/k210_pll.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 438fb225ab..60bdf41ab7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -781,6 +781,12 @@ F: arch/riscv/
 F: cmd/riscv/
 F: tools/prelink-riscv.c
 
+RISC-V KENDRYTE
+M: Sean Anderson 
+S: Maintained
+F: drivers/clk/kendryte/
+F: include/kendryte/
+
 ROCKUSB
 M: Eddie Cai 
 S: Maintained
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 16d4237f89..af75c7c4cf 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -145,6 +145,7 @@ source "drivers/clk/analogbits/Kconfig"
 source "drivers/clk/at91/Kconfig"
 source "drivers/clk/exynos/Kconfig"
 source "drivers/clk/imx/Kconfig"
+source "drivers/clk/kendryte/Kconfig"
 source "drivers/clk/meson/Kconfig"
 source "drivers/clk/mvebu/Kconfig"
 source "drivers/clk/owl/Kconfig"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 06131edb9f..4f3893f6fc 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o
 obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
 obj-$(CONFIG_CLK_EXYNOS) += exynos/
 obj-$(CONFIG_CLK_HSDK) += clk-hsdk-cgu.o
+obj-$(CONFIG_CLK_K210) += kendryte/
 obj-$(CONFIG_CLK_MPC83XX) += mpc83xx_clk.o
 obj-$(CONFIG_CLK_OWL) += owl/
 obj-$(CONFIG_CLK_RENESAS) += renesas/
diff --git a/drivers/clk/kendryte/Kconfig b/drivers/clk/kendryte/Kconfig
new file mode 100644
index 00..7b69c8afaf
--- /dev/null
+++ b/drivers/clk/kendryte/Kconfig
@@ -0,0 +1,12 @@
+config CLK_K210
+   bool "Clock support for Kendryte K210"
+   depends on CLK && CLK_CCF
+   help
+ This enables support clock driver for Kendryte K210 platforms.
+
+config CLK_K210_SET_RATE
+   bool "Enable setting the Kendryte K210 PLL rate"
+   depends on CLK_K210
+   help
+ Add functionality to calculate new rates for K210 PLLs. Enabling this
+ feature adds around 1K to U-Boot's final size.
diff --git a/drivers/clk/kendryte/Makefile b/drivers/clk/kendryte/Makefile
new file mode 100644
index 00..c56d93ea1c
--- /dev/null
+++ b/drivers/clk/kendryte/Makefile
@@ -0,0 +1 @@
+obj-y += pll.o
diff --git a/drivers/clk/kendryte/pll.c b/drivers/clk/kendryte/pll.c
new file mode 100644
index 00..c554f9c419
--- /dev/null
+++ b/drivers/clk/kendryte/pll.c
@@ -0,0 +1,604 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019-20 Sean Anderson 
+ */
+#include 
+
+#define LOG_CATEGORY UCLASS_CLK
+#include 
+/* For DIV_ROUND_DOWN_ULL, defined in linux/kernel.h */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define CLK_K210_PLL "k210_clk_pll"
+
+#ifdef CONFIG_CLK_K210_SET_RATE
+static int k210_pll_enable(struct clk *clk);
+static int k210_pll_disable(struct clk *clk);
+
+/*
+ * The PLL included with the Kendryte K210 appears to be a True Circuits, Inc.
+ * General-Purpose PLL. The logical layout of the PLL with internal feedback is
+ * approximately the following:
+ *
+ *  +---+
+ *  |reference clock|
+ *  +---+
+ *  |
+ *  v
+ *+--+
+ *   

[PATCH v4 15/17] riscv: Enable cpu clock if it is present

[Sean Anderson]

The cpu clock is probably already enabled if we are executing code (though
we could be executing from a different core). This patch prevents the cpu
clock or its parents from being disabled.

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---
This patch was previously submitted on its own as
https://patchwork.ozlabs.org/patch/1232420/

Changes in v4:
- New

 drivers/cpu/riscv_cpu.c | 20 
 1 file changed, 20 insertions(+)

diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c
index 5309a49e60..52b74d9e69 100644
--- a/drivers/cpu/riscv_cpu.c
+++ b/drivers/cpu/riscv_cpu.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2018, Bin Meng 
+ * Copyright (C) 2020, Sean Anderson 
  */
 
 #include 
@@ -116,6 +117,24 @@ static int riscv_cpu_bind(struct udevice *dev)
return 0;
 }
 
+static int riscv_cpu_probe(struct udevice *dev)
+{
+   int ret = 0;
+   struct clk clk;
+
+   /* Get a clock if it exists */
+   ret = clk_get_by_index(dev, 0, );
+   if (ret)
+   return 0;
+
+   ret = clk_enable();
+   clk_free();
+   if (ret == -ENOSYS || ret == -ENOTSUPP)
+   return 0;
+   else
+   return ret;
+}
+
 static const struct cpu_ops riscv_cpu_ops = {
.get_desc   = riscv_cpu_get_desc,
.get_info   = riscv_cpu_get_info,
@@ -132,6 +151,7 @@ U_BOOT_DRIVER(riscv_cpu) = {
.id = UCLASS_CPU,
.of_match = riscv_cpu_ids,
.bind = riscv_cpu_bind,
+   .probe = riscv_cpu_probe,
.ops = _cpu_ops,
.flags = DM_FLAG_PRE_RELOC,
 };
-- 
2.25.0

[PATCH v4 17/17] riscv: Add Sipeed Maix support

[Sean Anderson]

The Sipeed Maix series is a collection of boards built around the RISC-V
Kendryte K210 processor. This processor contains several peripherals to
accelerate neural network processing and other "ai" tasks. This includes a
"KPU" neural network processor, an audio processor supporting beamforming
reception, and a digital video port supporting capture and output at VGA
resolution. Other peripherals include 8M of sram (accessible with and
without caching); remappable pins, including 40 GPIOs; AES, FFT, and SHA256
accelerators; a DMA controller; and I2C, I2S, and SPI controllers. Maix
peripherals vary, but include spi flash; on-board usb-serial bridges; ports
for cameras, displays, and sd cards; and ESP32 chips. Currently, only the
Sipeed Maix Bit V2.0 (bitm) is supported, but the boards are fairly
similar.

Documentation for Maix boards is located at
.  Documentation for the Kendryte K210 is
located at . However, hardware details are
rather lacking, so most technical reference has been taken from the
standalone sdk located at
.

Signed-off-by: Sean Anderson 
asdf

---

Changes in v4:
- Rework documentation to be organized by board mfg not cpu mfg
- Update docs to reflect working SPI support
- Add proper spi support
- Don't define unneecessary macros in config.h
- Lower the default stack so it isn't clobbered on relocation
- Update MAINTAINERS
- Update copyright

Changes in v3:
- Reorder to be last in the patch series
- Add documentation for the board
- Generate defconfig with "make savedefconfig"
- Update Kconfig to imply most features we need
- Update MAINTAINERS

Changes in v2:
- Select CONFIG_SYS_RISCV_NOCOUNTER
- Imply CONFIG_CLK_K210
- Remove spurious references to CONFIG_ARCH_K210
- Remove many configs from defconfig where the defaults were fine
- Add a few "not set" lines to suppress unneeded defaults
- Reduce pre-reloc malloc space, now that clocks initialization happens
  later

 arch/riscv/Kconfig |  4 ++
 board/sipeed/maix/Kconfig  | 56 ++
 board/sipeed/maix/MAINTAINERS  | 11 
 board/sipeed/maix/Makefile |  5 ++
 board/sipeed/maix/maix.c   |  9 +++
 configs/sipeed_maix_bitm_defconfig | 10 
 doc/board/index.rst|  1 +
 doc/board/sipeed/index.rst |  9 +++
 doc/board/sipeed/maix.rst  | 94 ++
 include/configs/sipeed-maix.h  | 17 ++
 10 files changed, 216 insertions(+)
 create mode 100644 board/sipeed/maix/Kconfig
 create mode 100644 board/sipeed/maix/MAINTAINERS
 create mode 100644 board/sipeed/maix/Makefile
 create mode 100644 board/sipeed/maix/maix.c
 create mode 100644 configs/sipeed_maix_bitm_defconfig
 create mode 100644 doc/board/sipeed/index.rst
 create mode 100644 doc/board/sipeed/maix.rst
 create mode 100644 include/configs/sipeed-maix.h

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 659d98e33d..709a44759c 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -20,6 +20,9 @@ config TARGET_QEMU_VIRT
 config TARGET_SIFIVE_FU540
bool "Support SiFive FU540 Board"
 
+config TARGET_SIPEED_MAIX
+   bool "Support Sipeed Maix Board"
+
 endchoice
 
 config SYS_ICACHE_OFF
@@ -53,6 +56,7 @@ source "board/AndesTech/ax25-ae350/Kconfig"
 source "board/emulation/qemu-riscv/Kconfig"
 source "board/microchip/mpfs_icicle/Kconfig"
 source "board/sifive/fu540/Kconfig"
+source "board/sipeed/maix/Kconfig"
 
 # platform-specific options below
 source "arch/riscv/cpu/ax25/Kconfig"
diff --git a/board/sipeed/maix/Kconfig b/board/sipeed/maix/Kconfig
new file mode 100644
index 00..580c7f06ba
--- /dev/null
+++ b/board/sipeed/maix/Kconfig
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2019-20 Sean Anderson 
+
+if TARGET_SIPEED_MAIX
+
+config SYS_BOARD
+   default "maix"
+
+config SYS_VENDOR
+   default "sipeed"
+
+config SYS_CPU
+   default "generic"
+
+config SYS_CONFIG_NAME
+   default "sipeed-maix"
+
+config SYS_TEXT_BASE
+   default 0x8000
+
+config DEFAULT_DEVICE_TREE
+   default "k210-maix-bit"
+
+config NR_CPUS
+   default 2
+
+config NR_DRAM_BANKS
+   default 3
+
+config SF_DEFAULT_BUS
+   default 3
+
+config BOARD_SPECIFIC_OPTIONS
+   def_bool y
+   select GENERIC_RISCV
+   select RISCV_PRIV_1_9_1
+   imply DM_SERIAL
+   imply SIFIVE_SERIAL
+   imply SIFIVE_CLINT
+   imply POWER_DOMAIN
+   imply SIMPLE_PM_BUS
+   imply CLK_CCF
+   imply CLK_COMPOSITE_CCF
+   imply CLK_K210
+   imply DM_RESET
+   imply RESET_SYSCON
+   imply SYSRESET
+   imply SYSRESET_SYSCON
+   imply SPI
+   imply DESIGNWARE_SPI
+   imply SPI_FLASH_WINBOND
+   imply MMC
+   imply MMC_SPI
+   imply MMC_BROKEN_CD
+   imply CMD_MMC
+endif
diff --git a/board/sipeed/maix/MAINTAINERS b/board/sipeed/maix/MAINTAINERS
new 

[PATCH v4 16/17] riscv: Add device tree for K210

[Sean Anderson]

The cache-line size is undocumented. Emphirical tests suggest that it is 32
bytes, but I've used 64-bytes to be on the safe side.

Where possible, I have tried to find compatible drivers based on the layout
of registers. However, I have not tested most of this functionality, and
most devices should be considered descriptive at best. I would appreciate
if anyone could help identify possibly compatible devices, especially for
the timers, watchdogs, and rtc.

Signed-off-by: Sean Anderson 
---

Changes in v4:
- Set regs sizes to full address range
- Remove clock-frequency property from cpus
- Add spi-max-frequency to spi devices from documentation
- Add more compatible strings for each device
- Add AI ram as a separate memory bank. Its clock is disabled on boot, and
  it cannot be accessed
- Reorder memory banks so u-boot relocates higher, leaving more room to
  load boot images
- Add designware ssi CTRL0 field shifts to spi devices
- Don't enable the MMC slot
- Update copyright
- Lint

Changes in v3:
- Move this patch to the end of the series
- Add a max frequency for spi3
- Remov unused compatible strings from spi-flash@0
- Add s and u to isa string
- Fix mmu-type
- Remove cache-line size since it is unused (in u-boot) and undocumented
  (upstream)
- Add timer interrupts to clint0
- Round up various registers
- Add riscv,max-priority to plic
- Add apb* busses, since they have clocks which need to be enabled to
  access their devices
- Change uart compatible strings to "snps,dw-apb-uart", since that appears
  to match their registers
- Add compatible string for wdt*
- Add system reset device under sysctl
- Add reset device under sysctl

Changes in v2:
- Model changed to "Sipeed Maix Bit" to match file name
- Value of stdout-path fixed
- SD card slot compatible changed to "mmc-spi-slot"
- "jedec,spi-nor" added to spi flash compatible list
- Aliases for spi busses added
- timebase-frequency divided by 50 to match timer speed
- cpu-frequency renamed to clock-frequency
- CPUX_intc restyled to cpuX_intc
- "kendryte,k210-soc" added to soc compatible list for future-proofing
- PLIC handle renamed to plic0 from pic0
- K210_RST_SOC removed from sysrst, due to not being located in the reset
  register
- K210_RST_* numbers changed to match their bit offset within the reset
  register
- gpio_controller restyled to gpio-controller
- Added a second clock to the dma binding to match what the driver expects
- Changed "snps,designware-spi" compatible string to "snps,dw-apb-ssi" to
  match the correct driver
- Added a name to the spi clocks
- Added reg-io-width property to spi bindings
- Assigned a default parent to K210_CLK_SPI3
- Removed assigned clocks for ACLK and PLLs
- Removed u-boot,dm-pre-reloc bindings

 arch/riscv/dts/Makefile |   1 +
 arch/riscv/dts/k210-maix-bit.dts|  41 ++
 arch/riscv/dts/k210.dtsi| 568 
 include/dt-bindings/clock/k210-sysctl.h |   2 +-
 include/dt-bindings/reset/k210-sysctl.h |  38 ++
 5 files changed, 649 insertions(+), 1 deletion(-)
 create mode 100644 arch/riscv/dts/k210-maix-bit.dts
 create mode 100644 arch/riscv/dts/k210.dtsi
 create mode 100644 include/dt-bindings/reset/k210-sysctl.h

diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index 4f30e6936f..3a6f96c67d 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -2,6 +2,7 @@
 
 dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
+dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
 
 targets += $(dtb-y)
 
diff --git a/arch/riscv/dts/k210-maix-bit.dts b/arch/riscv/dts/k210-maix-bit.dts
new file mode 100644
index 00..33c4da96f3
--- /dev/null
+++ b/arch/riscv/dts/k210-maix-bit.dts
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019-20 Sean Anderson 
+ */
+
+/dts-v1/;
+
+#include "k210.dtsi"
+
+/ {
+   model = "Sipeed Maix Bit";
+   compatible = "sipeed,maix-bit", "kendryte,k210";
+
+   chosen {
+   stdout-path = "serial0:115200";
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   //status = "okay";
+   slot@0 {
+   compatible = "mmc-spi-slot";
+   reg = <0>;
+   broken-cd;
+   disable-wp;
+   };
+};
+
+ {
+   status = "okay";
+   spi-flash@0 {
+   compatible = "jedec,spi-nor";
+   reg = <0>;
+   spi-max-frequency = <12000>;
+   m25p,fast-read;
+   };
+};
diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
new file mode 100644
index 00..a3c7be72ce
--- /dev/null
+++ b/arch/riscv/dts/k210.dtsi
@@ -0,0 +1,568 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019-20 Sean Anderson 
+ */
+
+#include 
+#include 
+#include 
+
+/ {
+   /*
+* Although the K210 is a 64-bit CPU, the address bus is only 32-bits
+* wide, and the upper half of 

[PATCH v4 08/17] riscv: Add headers for asm/global_data.h

[Sean Anderson]

This header depended on bd_t and ulong, but did not include the appropriate
headers.

Signed-off-by: Sean Anderson 
---

Changes in v4:
- Include compiler.h not linux/compiler.h

 arch/riscv/include/asm/global_data.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/include/asm/global_data.h 
b/arch/riscv/include/asm/global_data.h
index b74bd7e738..7276d9763f 100644
--- a/arch/riscv/include/asm/global_data.h
+++ b/arch/riscv/include/asm/global_data.h
@@ -11,6 +11,8 @@
 #define __ASM_GBL_DATA_H
 
 #include 
+#include 
+#include 
 
 /* Architecture-specific global data */
 struct arch_global_data {
-- 
2.25.0

[PATCH v4 10/17] riscv: Allow use of reset drivers

[Sean Anderson]

Currently, one cannot use a reset driver on RISC-V. Follow the MIPS
example, and disable the default reset handler when the sysreset driver is
enabled.

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---

Changes in v3:
- New

 arch/riscv/lib/reset.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/lib/reset.c b/arch/riscv/lib/reset.c
index b8cecb309d..6cf6387f10 100644
--- a/arch/riscv/lib/reset.c
+++ b/arch/riscv/lib/reset.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 
+#ifndef CONFIG_SYSRESET
 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
printf("resetting ...\n");
@@ -15,3 +16,4 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
return 0;
 }
+#endif
-- 
2.25.0

[PATCH v4 09/17] riscv: Add option to support RISC-V privileged spec 1.9.1

[Sean Anderson]

Some older processors (notably the Kendryte K210) use an older version of
the RISC-V privileged specification. The primary changes between the old
and new are in virtual memory, and in the merging of three separate counter
enable CSRs.  Using the new CSR on an old processor causes an illegal
instruction exception.  This patch adds an option to use the old CSRs
instead of the new one.

Signed-off-by: Sean Anderson 
---

Changes in v4:
- Fixed CSRs not being defined properly (thanks bmeng)
- Added ifdefs for all changed CSRs (e.g. for VM)
- Also properly disable VM on boot

Changes in v3:
- Renamed from "riscv: Add option to disable writes to mcounteren"
- Added original functionality back for older priv specs.

Changes in v2:
- Moved forward in the patch series

 arch/riscv/Kconfig   | 10 +
 arch/riscv/cpu/cpu.c |  9 
 arch/riscv/include/asm/csr.h | 40 
 3 files changed, 59 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 3338b788f8..659d98e33d 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -225,6 +225,16 @@ config XIP
 config SHOW_REGS
bool "Show registers on unhandled exception"
 
+config RISCV_PRIV_1_9_1
+   bool "Use version 1.9.1 of the RISC-V priviledged specification"
+   help
+ Older versions of the RISC-V priviledged specification had
+ separate counter enable CSRs for each privilege mode. Writing
+ to the unified mcounteren CSR on a processor implementing the
+ old specification will result in an illegal instruction
+ exception. In addition to counter CSR changes, the way virtual
+ memory is configured was also changed.
+
 config STACK_SIZE_SHIFT
int
default 14
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index e457f6acbf..1df2753edb 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -89,11 +89,20 @@ int arch_cpu_init_dm(void)
 * Enable perf counters for cycle, time,
 * and instret counters only
 */
+#ifdef CONFIG_RISCV_PRIV_1_9_1
+   csr_write(CSR_MSCOUNTEREN, GENMASK(2, 0));
+   csr_write(CSR_MUCOUNTEREN, GENMASK(2, 0));
+#else
csr_write(CSR_MCOUNTEREN, GENMASK(2, 0));
+#endif
 
/* Disable paging */
if (supports_extension('s'))
+#ifdef CONFIG_RISCV_PRIV_1_9_1
+   csr_read_clear(CSR_MSTATUS, SR_VM);
+#else
csr_write(CSR_SATP, 0);
+#endif
}
 
return 0;
diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index d1520743a2..b02accdc34 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -15,7 +15,11 @@
 #define SR_SIE _AC(0x0002, UL) /* Supervisor Interrupt Enable */
 #define SR_SPIE_AC(0x0020, UL) /* Previous Supervisor IE */
 #define SR_SPP _AC(0x0100, UL) /* Previously Supervisor */
+#ifdef CONFIG_RISCV_PRIV_1_9_1
+#define SR_PUM _AC(0x0004, UL) /* Protect User Memory Access */
+#else
 #define SR_SUM _AC(0x0004, UL) /* Supervisor User Memory Access */
+#endif
 
 #define SR_FS  _AC(0x6000, UL) /* Floating-point Status */
 #define SR_FS_OFF  _AC(0x, UL)
@@ -29,6 +33,22 @@
 #define SR_XS_CLEAN_AC(0x0001, UL)
 #define SR_XS_DIRTY_AC(0x00018000, UL)
 
+#ifdef CONFIG_RISCV_PRIV_1_9_1
+#define SR_VM  _AC(0x1F00, UL) /* Virtualization Management */
+#define SR_VM_MODE_BARE_AC(0x, UL) /* No translation or 
protection */
+#define SR_VM_MODE_BB  _AC(0x0100, UL) /* Single base-and-bound */
+#define SR_VM_MODE_BBID_AC(0x0200, UL) /* Separate instruction and
+  data base-and-bound */
+#ifndef CONFIG_64BIT
+#define SR_VM_MODE_32  _AC(0x0800, UL)
+#define SR_VM_MODE SR_VM_MODE_32
+#else
+#define SR_VM_MODE_39  _AC(0x0900, UL)
+#define SR_VM_MODE_48  _AC(0x0A00, UL)
+#define SR_VM_MODE SR_VM_MODE_39
+#endif
+#endif
+
 #ifndef CONFIG_64BIT
 #define SR_SD  _AC(0x8000, UL) /* FS/XS dirty */
 #else
@@ -36,6 +56,7 @@
 #endif
 
 /* SATP flags */
+#ifndef CONFIG_RISCV_PRIV_1_9_1
 #ifndef CONFIG_64BIT
 #define SATP_PPN   _AC(0x003F, UL)
 #define SATP_MODE_32   _AC(0x8000, UL)
@@ -45,6 +66,7 @@
 #define SATP_MODE_39   _AC(0x8000, UL)
 #define SATP_MODE  SATP_MODE_39
 #endif
+#endif
 
 /* SCAUSE */
 #define SCAUSE_IRQ_FLAG(_AC(1, UL) << (__riscv_xlen - 1))
@@ -88,17 +110,35 @@
 #define CSR_SCAUSE 0x142
 #define CSR_STVAL  0x143
 #define CSR_SIP0x144
+#ifdef CONFIG_RISCV_PRIV_1_9_1
+#define CSR_SPTBR  0x180
+#else
 #define CSR_SATP   0x180
+#endif
 #define CSR_MSTATUS0x300
 #define CSR_MISA   0x301
 #define CSR_MIE   

[PATCH v4 07/17] spi: dw: Add mem_ops

[Sean Anderson]

The dw spi devices on the Kendryte K210 must be operated in a specific
fasion which cannot be achived through multiple writes to via dw_spi_xfer
(as it is currently written). This patch adds an implementation of exec_op,
which gives correct behaviour when reading/writing spi flash.

I would like to be able to modify the existing dw_spi_xfer function such
that it works properly (e.g. with the mmc_spi driver). However, the only
example code I have to work off is Kendryte's sdk (which is written in the
exec_op style), and I do not have access to the datasheet (if anyone does,
I would love to have a look!).

Signed-off-by: Sean Anderson 
---

Changes in v4:
- New

 drivers/spi/designware_spi.c | 123 +--
 1 file changed, 119 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 04cc873754..277eb19a0b 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -107,8 +108,8 @@ struct dw_spi_priv {
int len;
 
u32 fifo_len;   /* depth of the FIFO buffer */
-   void *tx;
-   void *tx_end;
+   const void *tx;
+   const void *tx_end;
void *rx;
void *rx_end;
 
@@ -344,7 +345,7 @@ static void dw_writer(struct dw_spi_priv *priv)
txw = *(u16 *)(priv->tx);
}
dw_write(priv, DW_SPI_DR, txw);
-   debug("%s: tx=0x%02x\n", __func__, txw);
+   log_io("tx=0x%02x\n", txw);
priv->tx += priv->bits_per_word >> 3;
}
 }
@@ -356,7 +357,7 @@ static void dw_reader(struct dw_spi_priv *priv)
 
while (max--) {
rxw = dw_read(priv, DW_SPI_DR);
-   debug("%s: rx=0x%02x\n", __func__, rxw);
+   log_io("rx=0x%02x\n", rxw);
 
/* Care about rx if the transfer's original "rx" is not null */
if (priv->rx_end - priv->len) {
@@ -483,6 +484,115 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int 
bitlen,
return ret;
 }
 
+static int dw_spi_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
+{
+   bool read = op->data.dir == SPI_MEM_DATA_IN;
+   int pos, i, ret = 0;
+   struct udevice *bus = slave->dev->parent;
+   struct dw_spi_platdata *plat = dev_get_platdata(bus);
+   struct dw_spi_priv *priv = dev_get_priv(bus);
+   u8 op_len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes;
+   u8 op_buf[op_len];
+   u32 cr0;
+
+   if (read)
+   priv->tmode = SPI_TMOD_EPROMREAD;
+   else
+   priv->tmode = SPI_TMOD_TO;
+
+   debug("%s: buf=%p len=%u [bytes]\n",
+ __func__, op->data.buf.in, op->data.nbytes);
+
+   cr0 = GEN_CTRL0(priv, plat);
+   debug("%s: cr0=%08x\n", __func__, cr0);
+
+   spi_enable_chip(priv, 0);
+   dw_write(priv, DW_SPI_CTRL0, cr0);
+   if (read)
+   dw_write(priv, DW_SPI_CTRL1, op->data.nbytes - 1);
+   spi_enable_chip(priv, 1);
+
+   /* From spi_mem_exec_op */
+   pos = 0;
+   op_buf[pos++] = op->cmd.opcode;
+   if (op->addr.nbytes) {
+   for (i = 0; i < op->addr.nbytes; i++)
+   op_buf[pos + i] = op->addr.val >>
+   (8 * (op->addr.nbytes - i - 1));
+
+   pos += op->addr.nbytes;
+   }
+   if (op->dummy.nbytes)
+   memset(op_buf + pos, 0xff, op->dummy.nbytes);
+
+   priv->tx = _buf;
+   priv->tx_end = priv->tx + op_len;
+   while (priv->tx != priv->tx_end)
+   dw_writer(priv);
+
+   /*
+* XXX: The following are tight loops! Enabling debug messages may cause
+* them to fail because we are not reading/writing the fifo fast enough.
+*
+* We heuristically break out of the loop when we stop getting data.
+* This is to stop us from hanging if the device doesn't send any data
+* (either at all, or after sending a response). For example, one flash
+* chip I tested did not send anything back after the first 64K of data.
+*/
+   if (read) {
+   /* If we have gotten any data back yet */
+   bool got_data = false;
+   /* How many times we have looped without reading anything */
+   int loops_since_read = 0;
+   struct spi_mem_op *mut_op = (struct spi_mem_op *)op;
+
+   priv->rx = op->data.buf.in;
+   priv->rx_end = priv->rx + op->data.nbytes;
+
+   dw_write(priv, DW_SPI_SER, 1 << spi_chip_select(slave->dev));
+   while (priv->rx != priv->rx_end) {
+   void *last_rx = priv->rx;
+
+   dw_reader(priv);
+   if (priv->rx == last_rx) {
+   loops_since_read++;
+ 

[PATCH v4 14/17] riscv: Try to get cpu frequency from device tree

[Sean Anderson]

Instead of always using the "clock-frequency" property to determine cpu
frequency, try using a clock in "clocks" if it exists. This patch also
fixes a bug where there could be spurious higher frequencies if sizeof(u32)
!= sizeof(ulong).

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---
This patch was previously sumbitted on its own as
https://patchwork.ozlabs.org/patch/1232420/

This patch is the combination of the patches
https://patchwork.ozlabs.org/patch/1223933/
https://patchwork.ozlabs.org/patch/1224957/
"riscv: Fix incorrect cpu frequency on RV64"
"riscv: Try to get cpu frequency from device tree"

Changes in v4:
- New

 drivers/cpu/riscv_cpu.c | 18 +-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c
index 28ad0aa30f..5309a49e60 100644
--- a/drivers/cpu/riscv_cpu.c
+++ b/drivers/cpu/riscv_cpu.c
@@ -3,6 +3,7 @@
  * Copyright (C) 2018, Bin Meng 
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -27,9 +28,24 @@ static int riscv_cpu_get_desc(struct udevice *dev, char 
*buf, int size)
 
 static int riscv_cpu_get_info(struct udevice *dev, struct cpu_info *info)
 {
+   int ret;
+   struct clk clk;
const char *mmu;
 
-   dev_read_u32(dev, "clock-frequency", (u32 *)>cpu_freq);
+   /* Zero out the frequency, in case sizeof(ulong) != sizeof(u32) */
+   info->cpu_freq = 0;
+
+   /* First try getting the frequency from the assigned clock */
+   ret = clk_get_by_index(dev, 0, );
+   if (!ret) {
+   ret = clk_get_rate();
+   if (!IS_ERR_VALUE(ret))
+   info->cpu_freq = ret;
+   clk_free();
+   }
+
+   if (!info->cpu_freq)
+   dev_read_u32(dev, "clock-frequency", (u32 *)>cpu_freq);
 
mmu = dev_read_string(dev, "mmu-type");
if (!mmu)
-- 
2.25.0

[PATCH v4 12/17] riscv: Add a bypass clock for K210

[Sean Anderson]

This is a small driver to do a software bypass of a clock if hardware
bypass is not working. I have tried to write this in a generic fashion, so
that it could be potentially broken out of the kendryte code at some future
date. For the K210, it is used to have aclk bypass pll0 and use in0 instead
so that the CPU keeps on working.

Signed-off-by: Sean Anderson 
---

Changes in v4:
- New

 drivers/clk/kendryte/Makefile |   2 +-
 drivers/clk/kendryte/bypass.c | 268 ++
 include/kendryte/bypass.h |  28 
 3 files changed, 297 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/kendryte/bypass.c
 create mode 100644 include/kendryte/bypass.h

diff --git a/drivers/clk/kendryte/Makefile b/drivers/clk/kendryte/Makefile
index c56d93ea1c..47f682fce3 100644
--- a/drivers/clk/kendryte/Makefile
+++ b/drivers/clk/kendryte/Makefile
@@ -1 +1 @@
-obj-y += pll.o
+obj-y += bypass.o pll.o
diff --git a/drivers/clk/kendryte/bypass.c b/drivers/clk/kendryte/bypass.c
new file mode 100644
index 00..5276591bfd
--- /dev/null
+++ b/drivers/clk/kendryte/bypass.c
@@ -0,0 +1,268 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Sean Anderson 
+ */
+
+#include 
+
+#include 
+#include 
+#include 
+#define LOG_CATEGORY UCLASS_CLK
+#include 
+#include 
+
+#define CLK_K210_BYPASS "k210_clk_bypass"
+
+/*
+ * This is a small driver to do a software bypass of a clock if hardware bypass
+ * is not working. I have tried to write this in a generic fashion, so that it
+ * could be potentially broken out of the kendryte code at some future date.
+ *
+ * Say you have the following clock configuration
+ *
+ * +---+ +---+
+ * |osc| |pll|
+ * +---+ +---+
+ * ^
+ */|
+ *   / |
+ *  /  |
+ * /   |
+ */|
+ * +---+ +---+
+ * |clk| |clk|
+ * +---+ +---+
+ *
+ * But the pll does not have a bypass, so when you configure the pll, the
+ * configuration needs to change to look like
+ *
+ * +---+ +---+
+ * |osc| |pll|
+ * +---+ +---+
+ *   ^
+ *   |\
+ *   | \
+ *   |  \
+ *   |   \
+ *   |\
+ * +---+ +---+
+ * |clk| |clk|
+ * +---+ +---+
+ *
+ * To set this up, create a bypass clock with bypassee=pll and alt=osc. When
+ * creating the child clocks, set their parent to the bypass clock. After
+ * creating all the children, call k210_bypass_setchildren().
+ */
+
+static int k210_bypass_dobypass(struct k210_bypass *bypass)
+{
+   int ret, i;
+
+   /*
+* If we already have saved parents, then the children are already
+* bypassed
+*/
+   if (bypass->child_count && bypass->saved_parents[0])
+   return 0;
+
+   for (i = 0; i < bypass->child_count; i++) {
+   struct clk *child = bypass->children[i];
+   struct clk *parent = clk_get_parent(child);
+
+   if (IS_ERR(parent)) {
+   for (; i; i--)
+   bypass->saved_parents[i] = NULL;
+   return PTR_ERR(parent);
+   }
+   bypass->saved_parents[i] = parent;
+   }
+
+   for (i = 0; i < bypass->child_count; i++) {
+   struct clk *child = bypass->children[i];
+
+   ret = clk_set_parent(child, bypass->alt);
+   if (ret) {
+   for (; i; i--)
+   clk_set_parent(bypass->children[i],
+  bypass->saved_parents[i]);
+   for (i = 0; i < bypass->child_count; i++)
+   bypass->saved_parents[i] = NULL;
+   return ret;
+   }
+   }
+
+   return 0;
+}
+
+static int k210_bypass_unbypass(struct k210_bypass *bypass)
+{
+   int err, ret, i;
+
+   if (!bypass->child_count && !bypass->saved_parents[0]) {
+   log_warning("Cannot unbypass children; dobypass not called 
first\n");
+   return 0;
+   }
+
+   ret = 0;
+   for (i = 0; i < bypass->child_count; i++) {
+   err = clk_set_parent(bypass->children[i],
+bypass->saved_parents[i]);
+   if (err)
+   ret = err;
+   bypass->saved_parents[i] = NULL;
+   }
+   return ret;
+}
+
+static ulong k210_bypass_get_rate(struct clk *clk)
+{
+   struct k210_bypass *bypass = to_k210_bypass(clk);
+   const struct clk_ops *ops = bypass->bypassee_ops;
+
+   if (ops->get_rate)
+   return ops->get_rate(bypass->bypassee);
+   else
+   return clk_get_parent_rate(bypass->bypassee);
+}
+
+static ulong k210_bypass_set_rate(struct clk *clk, unsigned long rate)
+{
+   int ret;
+   struct k210_bypass *bypass = to_k210_bypass(clk);
+   const struct clk_ops *ops = bypass->bypassee_ops;
+
+   /* Don't bother bypassing if we aren't going to set the rate */
+   if (!ops->set_rate)
+   return k210_bypass_get_rate(clk);
+

[PATCH v4 06/17] spi: dw: Add device tree properties for fields in CTRL1

[Sean Anderson]

Some devices have different layouts for the fields in CTRL1 (e.g. the
Kendryte K210). Allow this layout to be configurable from the device tree.
The documentation has been taken from Linux.

Signed-off-by: Sean Anderson 
---

Changes in v4:
- New

 .../spi/snps,dw-apb-ssi.txt   | 43 +++
 drivers/spi/designware_spi.c  | 40 ++---
 2 files changed, 68 insertions(+), 15 deletions(-)
 create mode 100644 doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt

diff --git a/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt 
b/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt
new file mode 100644
index 00..4b6152f6b7
--- /dev/null
+++ b/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt
@@ -0,0 +1,43 @@
+Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface.
+
+Required properties:
+- compatible : "snps,dw-apb-ssi"
+- reg : The register base for the controller. For "mscc,-spi", a second
+  register set is required (named ICPU_CFG:SPI_MST)
+- #address-cells : <1>, as required by generic SPI binding.
+- #size-cells : <0>, also as required by generic SPI binding.
+- clocks : phandles for the clocks, see the description of clock-names below.
+   The phandle for the "ssi_clk" is required. The phandle for the "pclk" clock
+   is optional. If a single clock is specified but no clock-name, it is the
+   "ssi_clk" clock. If both clocks are listed, the "ssi_clk" must be first.
+
+Optional properties:
+- clock-names : Contains the names of the clocks:
+"ssi_clk", for the core clock used to generate the external SPI clock.
+"pclk", the interface clock, required for register access.
+- cs-gpios : Specifies the gpio pins to be used for chipselects.
+- num-cs : The number of chipselects. If omitted, this will default to 4.
+- reg-io-width : The I/O register width (in bytes) implemented by this
+  device.  Supported values are 2 or 4 (the default).
+- snps,dfs-offset The offset in bits of the DFS field in CTRL0, defaulting to 0
+- snps,frf-offset The offset in bits of the FRF field in CTRL0, defaulting to 4
+- snps,tmod-offset The offset in bits of the tmode field in CTRL0, defaulting
+  to 6
+- snps,mode-offset The offset in bits of the work mode field in CTRL0,
+  defaulting to 8
+
+Child nodes as per the generic SPI binding.
+
+Example:
+
+   spi@fff0 {
+   compatible = "snps,dw-apb-ssi";
+   reg = <0xfff0 0x1000>;
+   interrupts = <0 154 4>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clocks = <_m_clk>;
+   num-cs = <2>;
+   cs-gpios = < 13 0>,
+  < 14 0>;
+   };
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 66ff8eeccd..04cc873754 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -3,6 +3,7 @@
  * Designware master SPI core controller driver
  *
  * Copyright (C) 2014 Stefan Roese 
+ * Copyright (C) 2020 Sean Anderson 
  *
  * Very loosely based on the Linux driver:
  * drivers/spi/spi-dw.c, which is:
@@ -50,20 +51,14 @@
 #define DW_SPI_DR  0x60
 
 /* Bit fields in CTRLR0 */
-#define SPI_DFS_OFFSET 0
-
-#define SPI_FRF_OFFSET 4
 #define SPI_FRF_SPI0x0
 #define SPI_FRF_SSP0x1
 #define SPI_FRF_MICROWIRE  0x2
 #define SPI_FRF_RESV   0x3
 
-#define SPI_MODE_OFFSET6
-#define SPI_SCPH_OFFSET6
-#define SPI_SCOL_OFFSET7
+#define SPI_MODE_SCPH  0x1
+#define SPI_MODE_SCOL  0x2
 
-#define SPI_TMOD_OFFSET8
-#define SPI_TMOD_MASK  (0x3 << SPI_TMOD_OFFSET)
 #defineSPI_TMOD_TR 0x0 /* xmit & recv 
*/
 #define SPI_TMOD_TO0x1 /* xmit only */
 #define SPI_TMOD_RO0x2 /* recv only */
@@ -88,6 +83,12 @@
 struct dw_spi_platdata {
s32 frequency;  /* Default clock frequency, -1 for none */
void __iomem *regs;
+
+   /* Offsets in CTRL0 */
+   u8 dfs_off;
+   u8 frf_off;
+   u8 tmod_off;
+   u8 mode_off;
 };
 
 struct dw_spi_priv {
@@ -114,6 +115,15 @@ struct dw_spi_priv {
struct reset_ctl_bulk   resets;
 };
 
+static inline u32 GEN_CTRL0(struct dw_spi_priv *priv,
+   struct dw_spi_platdata *plat)
+{
+   return ((priv->bits_per_word - 1) << plat->dfs_off |
+ (priv->type << plat->frf_off) |
+ (priv->mode << plat->mode_off) |
+ (priv->tmode << plat->tmod_off));
+}
+
 static inline u32 dw_read(struct dw_spi_priv *priv, u32 offset)
 {
return __raw_readl(priv->regs + offset);
@@ -159,6 +169,10 @@ static int dw_spi_ofdata_to_platdata(struct udevice *bus)
/* Use 500KHz as a suitable default */

[PATCH v4 03/17] clk: Unconditionally recursively en-/dis-able clocks

[Sean Anderson]

For clocks not in the CCF, their parents will not have UCLASS_CLK, so we
just enable them as normal. The enable count is local to the struct clk,
but this will never result in the actual en-/dis-able op being called
(unless the same struct clk is enabled twice).

For clocks in the CCF, we always traverse up the tree when enabling.
Previously, CCF clocks without id set would be skipped, stopping the
traversal too early.

Signed-off-by: Sean Anderson 
Acked-by: Lukasz Majewski 
---

Changes in v4:
- Lint

Changes in v3:
- New

 drivers/clk/clk-uclass.c | 59 ++--
 1 file changed, 26 insertions(+), 33 deletions(-)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 246b9c0ab8..c5f87fee72 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -491,7 +491,6 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
 int clk_enable(struct clk *clk)
 {
const struct clk_ops *ops;
-   struct clk *clkp = NULL;
int ret;
 
debug("%s(clk=%p \"%s\")\n", __func__, clk, clk->dev->name);
@@ -500,32 +499,29 @@ int clk_enable(struct clk *clk)
ops = clk_dev_ops(clk->dev);
 
if (CONFIG_IS_ENABLED(CLK_CCF)) {
-   /* Take id 0 as a non-valid clk, such as dummy */
-   if (clk->id && !clk_get_by_id(clk->id, )) {
-   if (clkp->enable_count) {
-   clkp->enable_count++;
-   return 0;
-   }
-   if (clkp->dev->parent &&
-   device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
-   ret = 
clk_enable(dev_get_clk_ptr(clkp->dev->parent));
-   if (ret) {
-   printf("Enable %s failed\n",
-  clkp->dev->parent->name);
-   return ret;
-   }
+   if (clk->enable_count) {
+   clk->enable_count++;
+   return 0;
+   }
+   if (clk->dev->parent &&
+   device_get_uclass_id(clk->dev->parent) == UCLASS_CLK) {
+   ret = clk_enable(dev_get_clk_ptr(clk->dev->parent));
+   if (ret) {
+   printf("Enable %s failed\n",
+  clk->dev->parent->name);
+   return ret;
}
}
 
if (ops->enable) {
ret = ops->enable(clk);
if (ret) {
-   printf("Enable %s failed\n", clk->dev->name);
+   printf("Enable %s failed (error %d)\n",
+  clk->dev->name, ret);
return ret;
}
}
-   if (clkp)
-   clkp->enable_count++;
+   clk->enable_count++;
} else {
if (!ops->enable)
return -ENOSYS;
@@ -551,7 +547,6 @@ int clk_enable_bulk(struct clk_bulk *bulk)
 int clk_disable(struct clk *clk)
 {
const struct clk_ops *ops;
-   struct clk *clkp = NULL;
int ret;
 
debug("%s(clk=%p)\n", __func__, clk);
@@ -560,29 +555,27 @@ int clk_disable(struct clk *clk)
ops = clk_dev_ops(clk->dev);
 
if (CONFIG_IS_ENABLED(CLK_CCF)) {
-   if (clk->id && !clk_get_by_id(clk->id, )) {
-   if (clkp->enable_count == 0) {
-   printf("clk %s already disabled\n",
-  clkp->dev->name);
-   return 0;
-   }
-
-   if (--clkp->enable_count > 0)
-   return 0;
+   if (clk->enable_count == 0) {
+   printf("clk %s already disabled\n",
+  clk->dev->name);
+   return 0;
}
 
+   if (--clk->enable_count > 0)
+   return 0;
+
if (ops->disable) {
ret = ops->disable(clk);
if (ret)
return ret;
}
 
-   if (clkp && clkp->dev->parent &&
-   device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
-   ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
+   if (clk->dev->parent &&
+   device_get_uclass_id(clk->dev) == UCLASS_CLK) {
+   ret = clk_disable(dev_get_clk_ptr(clk->dev->parent));
if (ret) {
-   printf("Disable %s failed\n",
-  clkp->dev->parent->name);
+  

[PATCH v4 05/17] dm: Add support for simple-pm-bus

[Sean Anderson]

This type of bus is used in Linux to designate busses which have power
domains and/or clocks which need to be enabled before their child devices
can be used.  Because power domains are automatically enabled before
probing in u-boot, we just need to enable any clocks present.

Signed-off-by: Sean Anderson 
---

Changes in v4:
- Split the bus off into its own driver
- Add test
- Fix line spacing in Kconfig
- Lint

Changes in v3:
- New

 arch/sandbox/dts/test.dts |  6 ++
 arch/sandbox/include/asm/clk.h|  1 +
 configs/sandbox_defconfig |  1 +
 .../bus/simple-pm-bus.txt | 44 +++
 drivers/core/Kconfig  |  7 +++
 drivers/core/Makefile |  1 +
 drivers/core/simple-pm-bus.c  | 55 +++
 test/dm/Makefile  |  1 +
 test/dm/simple-pm-bus.c   | 44 +++
 9 files changed, 160 insertions(+)
 create mode 100644 doc/device-tree-bindings/bus/simple-pm-bus.txt
 create mode 100644 drivers/core/simple-pm-bus.c
 create mode 100644 test/dm/simple-pm-bus.c

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 23f2aefd43..648f21239a 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -929,6 +929,12 @@
compatible = "sandbox,mdio";
};
 
+   pm-bus-test {
+   compatible = "simple-pm-bus";
+   clocks = <_sandbox 4>;
+   power-domains = < 1>;
+   };
+
resetc2: syscon-reset {
compatible = "syscon-reset";
#reset-cells = <1>;
diff --git a/arch/sandbox/include/asm/clk.h b/arch/sandbox/include/asm/clk.h
index 1573e4a134..c184c4bffc 100644
--- a/arch/sandbox/include/asm/clk.h
+++ b/arch/sandbox/include/asm/clk.h
@@ -21,6 +21,7 @@ enum sandbox_clk_id {
SANDBOX_CLK_ID_I2C,
SANDBOX_CLK_ID_UART1,
SANDBOX_CLK_ID_UART2,
+   SANDBOX_CLK_ID_BUS,
 
SANDBOX_CLK_ID_COUNT,
 };
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 19970f1db5..c637b39b96 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -89,6 +89,7 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_DEVRES=y
 CONFIG_DEBUG_DEVRES=y
+CONFIG_SIMPLE_PM_BUS=y
 CONFIG_ADC=y
 CONFIG_ADC_SANDBOX=y
 CONFIG_AXI=y
diff --git a/doc/device-tree-bindings/bus/simple-pm-bus.txt 
b/doc/device-tree-bindings/bus/simple-pm-bus.txt
new file mode 100644
index 00..6f15037131
--- /dev/null
+++ b/doc/device-tree-bindings/bus/simple-pm-bus.txt
@@ -0,0 +1,44 @@
+Simple Power-Managed Bus
+
+
+A Simple Power-Managed Bus is a transparent bus that doesn't need a real
+driver, as it's typically initialized by the boot loader.
+
+However, its bus controller is part of a PM domain, or under the control of a
+functional clock.  Hence, the bus controller's PM domain and/or clock must be
+enabled for child devices connected to the bus (either on-SoC or externally)
+to function.
+
+While "simple-pm-bus" follows the "simple-bus" set of properties, as specified
+in the Devicetree Specification, it is not an extension of "simple-bus".
+
+
+Required properties:
+  - compatible: Must contain at least "simple-pm-bus".
+   Must not contain "simple-bus".
+   It's recommended to let this be preceded by one or more
+   vendor-specific compatible values.
+  - #address-cells, #size-cells, ranges: Must describe the mapping between
+   parent address and child address spaces.
+
+Optional platform-specific properties for clock or PM domain control (at least
+one of them is required):
+  - clocks: Must contain a reference to the functional clock(s),
+  - power-domains: Must contain a reference to the PM domain.
+Please refer to the binding documentation for the clock and/or PM domain
+providers for more details.
+
+
+Example:
+
+   bsc: bus@fec1 {
+   compatible = "renesas,bsc-sh73a0", "renesas,bsc",
+"simple-pm-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0 0x2000>;
+   reg = <0xfec1 0x400>;
+   interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
+   clocks = <_clk>;
+   power-domains = <_a4s>;
+   };
diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig
index 3b95b5387b..0cd687526e 100644
--- a/drivers/core/Kconfig
+++ b/drivers/core/Kconfig
@@ -195,6 +195,13 @@ config SPL_SIMPLE_BUS
  Supports the 'simple-bus' driver, which is used on some systems
  in SPL.
 
+config SIMPLE_PM_BUS
+   bool "Support simple-pm-bus driver"
+   depends on DM && OF_CONTROL && CLK && POWER_DOMAIN
+   help
+ Supports the 'simple-pm-bus' driver, which is used for busses that
+ have power domains and/or clocks which need to be enabled before use.
+

[PATCH v4 04/17] reset: Add generic reset driver

[Sean Anderson]

This patch adds a generic reset driver. It is designed to be useful when
one has a register in a regmap which contains bits that reset other
devices. I thought this seemed like a very generic use, so here is a
generic driver. The overall structure has been modeled on the syscon-reboot
driver.

Signed-off-by: Sean Anderson 
---

Changes in v4:
- Added basic test
- Fix incorrect usage of regmap_update_bits

Changes in v3:
- New

 arch/sandbox/dts/test.dts | 15 
 configs/sandbox_defconfig |  1 +
 .../reset/syscon-reset.txt| 36 +
 drivers/reset/Kconfig |  5 ++
 drivers/reset/Makefile|  1 +
 drivers/reset/reset-syscon.c  | 79 +++
 test/dm/Makefile  |  1 +
 test/dm/syscon-reset.c| 58 ++
 8 files changed, 196 insertions(+)
 create mode 100644 doc/device-tree-bindings/reset/syscon-reset.txt
 create mode 100644 drivers/reset/reset-syscon.c
 create mode 100644 test/dm/syscon-reset.c

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index e529c54d8d..23f2aefd43 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -928,6 +928,21 @@
mdio: mdio-test {
compatible = "sandbox,mdio";
};
+
+   resetc2: syscon-reset {
+   compatible = "syscon-reset";
+   #reset-cells = <1>;
+   regmap = <>;
+   offset = <1>;
+   mask = <0x27FF>;
+   assert-high = <0>;
+   };
+
+   syscon-reset-test {
+   compatible = "sandbox,misc_sandbox";
+   resets = < 15>, < 30>, < 60>;
+   reset-names = "valid", "no_mask", "out_of_range";
+   };
 };
 
 #include "sandbox_pmic.dtsi"
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index d8d8645425..19970f1db5 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -189,6 +189,7 @@ CONFIG_RAM=y
 CONFIG_REMOTEPROC_SANDBOX=y
 CONFIG_DM_RESET=y
 CONFIG_SANDBOX_RESET=y
+CONFIG_RESET_SYSCON=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_RV8803=y
 CONFIG_DEBUG_UART_SANDBOX=y
diff --git a/doc/device-tree-bindings/reset/syscon-reset.txt 
b/doc/device-tree-bindings/reset/syscon-reset.txt
new file mode 100644
index 00..f136b3d225
--- /dev/null
+++ b/doc/device-tree-bindings/reset/syscon-reset.txt
@@ -0,0 +1,36 @@
+Generic SYSCON mapped register reset driver
+
+This is a generic reset driver using syscon to map the reset register.
+The reset is generally performed with a write to the reset register
+defined by the register map pointed by syscon reference plus the offset and
+shifted by the reset specifier/
+
+To assert a reset on some device, the equivalent of the following operation is
+performed, where reset_id is the reset specifier from the device's resets
+property.
+
+   if (BIT(reset_id) & mask)
+   regmap[offset][reset_id] = assert-high;
+
+Required properties:
+- compatible: should contain "syscon-reset"
+- #reset-cells: must be 1
+- regmap: this is phandle to the register map node
+- offset: offset in the register map for the reboot register (in bytes)
+
+Optional properties:
+- mask: accept only the reset specifiers defined by the mask (32 bit)
+- assert-high: Bit to write when asserting a reset. Defaults to 1.
+
+Default will be little endian mode, 32 bit access only.
+
+Example:
+
+   reset-controller {
+   compatible = "syscon-reset";
+   #reset-cells = <1>;
+   regmap = <>;
+   offset = <0x20>;
+   mask = <0x27FF>;
+   assert-high = <0>;
+   };
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 75ccd65799..097bf32b21 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -148,4 +148,9 @@ config RESET_IMX7
help
  Support for reset controller on i.MX7/8 SoCs.
 
+config RESET_SYSCON
+   bool "Enable generic syscon reset driver support"
+   depends on DM_RESET
+   help
+ Support generic syscon mapped register reset devices.
 endmenu
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 0a044d5d8c..433f1eca54 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -23,3 +23,4 @@ obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o
 obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
 obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o
 obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
+obj-$(CONFIG_RESET_SYSCON) += reset-syscon.o
diff --git a/drivers/reset/reset-syscon.c b/drivers/reset/reset-syscon.c
new file mode 100644
index 00..37ca181981
--- /dev/null
+++ b/drivers/reset/reset-syscon.c
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Sean Anderson
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct syscon_reset_priv {
+   struct regmap 

[PATCH v4 02/17] clk: Check that ops of composite clock components exist before calling

[Sean Anderson]

clk_composite_ops was shared between all devices in the composite clock
driver.  If one clock had a feature (such as supporting set_parent) which
another clock did not, it could call a null pointer dereference.

This patch does three things
1. It adds null-pointer checks to all composite clock functions.
2. It makes clk_composite_ops const and sets its functions at compile-time.
3. It adds some basic sanity checks to num_parents.

The combined effect of these changes is that any of mux, rate, or gate can
be NULL, and composite clocks will still function normally. Previously, at
least mux had to exist, since clk_composite_get_parent was used to
determine the parent for clk_register.

Signed-off-by: Sean Anderson 
Acked-by: Lukasz Majewski 
---

Changes in v4:
- Return ENOTSUPP not ENOSYS with no set_parent

Changes in v3:
- Don't return an error code where a no-op would be fine

 drivers/clk/clk-composite.c | 57 +++--
 1 file changed, 35 insertions(+), 22 deletions(-)

diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index 3d84036c9e..bcf6b9c689 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -22,7 +22,10 @@ static u8 clk_composite_get_parent(struct clk *clk)
(struct clk *)dev_get_clk_ptr(clk->dev) : clk);
struct clk *mux = composite->mux;
 
-   return clk_mux_get_parent(mux);
+   if (mux)
+   return clk_mux_get_parent(mux);
+   else
+   return 0;
 }
 
 static int clk_composite_set_parent(struct clk *clk, struct clk *parent)
@@ -32,7 +35,10 @@ static int clk_composite_set_parent(struct clk *clk, struct 
clk *parent)
const struct clk_ops *mux_ops = composite->mux_ops;
struct clk *mux = composite->mux;
 
-   return mux_ops->set_parent(mux, parent);
+   if (mux && mux_ops)
+   return mux_ops->set_parent(mux, parent);
+   else
+   return -ENOTSUPP;
 }
 
 static unsigned long clk_composite_recalc_rate(struct clk *clk)
@@ -42,7 +48,10 @@ static unsigned long clk_composite_recalc_rate(struct clk 
*clk)
const struct clk_ops *rate_ops = composite->rate_ops;
struct clk *rate = composite->rate;
 
-   return rate_ops->get_rate(rate);
+   if (rate && rate_ops)
+   return rate_ops->get_rate(rate);
+   else
+   return clk_get_parent_rate(clk);
 }
 
 static ulong clk_composite_set_rate(struct clk *clk, unsigned long rate)
@@ -52,7 +61,10 @@ static ulong clk_composite_set_rate(struct clk *clk, 
unsigned long rate)
const struct clk_ops *rate_ops = composite->rate_ops;
struct clk *clk_rate = composite->rate;
 
-   return rate_ops->set_rate(clk_rate, rate);
+   if (rate && rate_ops)
+   return rate_ops->set_rate(clk_rate, rate);
+   else
+   return clk_get_rate(clk);
 }
 
 static int clk_composite_enable(struct clk *clk)
@@ -62,7 +74,10 @@ static int clk_composite_enable(struct clk *clk)
const struct clk_ops *gate_ops = composite->gate_ops;
struct clk *gate = composite->gate;
 
-   return gate_ops->enable(gate);
+   if (gate && gate_ops)
+   return gate_ops->enable(gate);
+   else
+   return 0;
 }
 
 static int clk_composite_disable(struct clk *clk)
@@ -72,15 +87,12 @@ static int clk_composite_disable(struct clk *clk)
const struct clk_ops *gate_ops = composite->gate_ops;
struct clk *gate = composite->gate;
 
-   gate_ops->disable(gate);
-
-   return 0;
+   if (gate && gate_ops)
+   return gate_ops->disable(gate);
+   else
+   return 0;
 }
 
-struct clk_ops clk_composite_ops = {
-   /* This will be set according to clk_register_composite */
-};
-
 struct clk *clk_register_composite(struct device *dev, const char *name,
   const char * const *parent_names,
   int num_parents, struct clk *mux,
@@ -94,7 +106,9 @@ struct clk *clk_register_composite(struct device *dev, const 
char *name,
struct clk *clk;
struct clk_composite *composite;
int ret;
-   struct clk_ops *composite_ops = _composite_ops;
+
+   if (!num_parents || (num_parents != 1 && !mux))
+   return ERR_PTR(-EINVAL);
 
composite = kzalloc(sizeof(*composite), GFP_KERNEL);
if (!composite)
@@ -103,8 +117,6 @@ struct clk *clk_register_composite(struct device *dev, 
const char *name,
if (mux && mux_ops) {
composite->mux = mux;
composite->mux_ops = mux_ops;
-   if (mux_ops->set_parent)
-   composite_ops->set_parent = clk_composite_set_parent;
mux->data = (ulong)composite;
}
 
@@ -113,11 +125,6 @@ struct clk *clk_register_composite(struct device *dev, 
const char *name,
clk = ERR_PTR(-EINVAL);
goto err;

[PATCH v4 01/17] clk: Always use the supplied struct clk

[Sean Anderson]

CCF clocks should always use the struct clock passed to their methods for
extracting the driver-specific clock information struct. Previously, many
functions would use the clk->dev->priv if the device was bound. This could
cause problems with composite clocks. The individual clocks in a composite
clock did not have the ->dev field filled in. This was fine, because the
device-specific clock information would be used. However, since there was
no ->dev, there was no way to get the parent clock. This caused the
recalc_rate method of the CCF divider clock to fail. One option would be to
use the clk->priv field to get the composite clock and from there get the
appropriate parent device. However, this would tie the implementation to
the composite clock. In general, different devices should not rely on the
contents of ->priv from another device.

The simple solution to this problem is to just always use the supplied
struct clock. The composite clock now fills in the ->dev pointer of its
child clocks.  This allows child clocks to make calls like clk_get_parent()
without issue.

imx avoided the above problem by using a custom get_rate function with
composite clocks.

Signed-off-by: Sean Anderson 
Acked-by: Lukasz Majewski 
---

Changes in v4:
- Lint

Changes in v3:
- Documented new assumptions in the CCF
- Wrapped docs to 80 columns

 doc/imx/clk/ccf.txt| 63 +-
 drivers/clk/clk-composite.c|  7 
 drivers/clk/clk-divider.c  |  6 ++--
 drivers/clk/clk-fixed-factor.c |  3 +-
 drivers/clk/clk-gate.c |  6 ++--
 drivers/clk/clk-mux.c  | 12 +++
 drivers/clk/imx/clk-gate2.c|  4 +--
 7 files changed, 50 insertions(+), 51 deletions(-)

diff --git a/doc/imx/clk/ccf.txt b/doc/imx/clk/ccf.txt
index 36b60dc438..e40ac360e8 100644
--- a/doc/imx/clk/ccf.txt
+++ b/doc/imx/clk/ccf.txt
@@ -1,42 +1,37 @@
 Introduction:
 =
 
-This documentation entry describes the Common Clock Framework [CCF]
-port from Linux kernel (v5.1.12) to U-Boot.
+This documentation entry describes the Common Clock Framework [CCF] port from
+Linux kernel (v5.1.12) to U-Boot.
 
-This code is supposed to bring CCF to IMX based devices (imx6q, imx7
-imx8). Moreover, it also provides some common clock code, which would
-allow easy porting of CCF Linux code to other platforms.
+This code is supposed to bring CCF to IMX based devices (imx6q, imx7 imx8).
+Moreover, it also provides some common clock code, which would allow easy
+porting of CCF Linux code to other platforms.
 
 Design decisions:
 =
 
-* U-Boot's driver model [DM] for clk differs from Linux CCF. The most
-  notably difference is the lack of support for hierarchical clocks and
-  "clock as a manager driver" (single clock DTS node acts as a starting
-  point for all other clocks).
+* U-Boot's driver model [DM] for clk differs from Linux CCF. The most notably
+  difference is the lack of support for hierarchical clocks and "clock as a
+  manager driver" (single clock DTS node acts as a starting point for all other
+  clocks).
 
-* The clk_get_rate() caches the previously read data if CLK_GET_RATE_NOCACHE
-  is not set (no need for recursive access).
+* The clk_get_rate() caches the previously read data if CLK_GET_RATE_NOCACHE is
+  not set (no need for recursive access).
 
-* On purpose the "manager" clk driver (clk-imx6q.c) is not using large
-  table to store pointers to clocks - e.g. clk[IMX6QDL_CLK_USDHC2_SEL] = 
-  Instead we use udevice's linked list for the same class (UCLASS_CLK).
+* On purpose the "manager" clk driver (clk-imx6q.c) is not using large table to
+  store pointers to clocks - e.g. clk[IMX6QDL_CLK_USDHC2_SEL] =  Instead we
+  use udevice's linked list for the same class (UCLASS_CLK).
 
   Rationale:
   --
-When porting the code as is from Linux, one would need ~1KiB of RAM to
-store it. This is way too much if we do plan to use this driver in SPL.
+When porting the code as is from Linux, one would need ~1KiB of RAM to 
store
+it. This is way too much if we do plan to use this driver in SPL.
 
 * The "central" structure of this patch series is struct udevice and its
   uclass_priv field contains the struct clk pointer (to the originally created
   one).
 
-* Up till now U-Boot's driver model (DM) CLK operates on udevice (main
-  access to clock is by udevice ops)
-  In the CCF the access to struct clk (embodying pointer to *dev) is
-  possible via dev_get_clk_ptr() (it is a wrapper on dev_get_uclass_priv()).
-
 * To keep things simple the struct udevice's uclass_priv pointer is used to
   store back pointer to corresponding struct clk. However, it is possible to
   modify clk-uclass.c file and add there struct uc_clk_priv, which would have
@@ -45,13 +40,17 @@ Design decisions:
   setting .per_device_auto_alloc_size = sizeof(struct uc_clk_priv)) the
   uclass_priv stores the pointer to struct clk.
 
+* Non-CCF clocks do not have a pointer to a clock in 

[PATCH v4 00/17] riscv: Add Sipeed Maix support

[Sean Anderson]

This patch series adds support for Sipeed Maix boards and the Kendryte
K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
models are similar. This series depends on

(clk: Include missing headers for linux/clk-provider.h).
In addition, there are optional dependencies on

 and

(wdt: Add DM support for Designware WDT)
(riscv: Try to get cpu frequency from device tree)
(serial: Set baudrate on boot)

To flash u-boot to a maix bit, run
kflash -tp /dev/ -B bit_mic u-boot-dtb.bin

Boot output should look like the following:

U-Boot 2020.01-00465-g1da52c6c9a (Feb 10 2020 - 20:26:50 -0500)

DRAM:  8 MiB
MMC:
In:serial@3800
Out:   serial@3800
Err:   serial@3800
=>

The MMC (SD-card reader) does not work yet (see the second spi patch for
details). I'm not sure how to set up autoboot.  Should I arbitrarily assign
partitions? Should I use MTD/UBI?

Changes for v4:
- Linted several patches
- Updated the copyright year for several files
- Added tests for syscon-reset, simple-pm-bus, and the pll calc_rate function
- Added/updated documentation
- Fixed SPI for the nor flash
- Fixed PLLs not enabling/setting rate properly
- RISCV_PRIV_1_9_1 now (un)defines all deferring CSRs, and also disables VM
- More devicetree changes

Changes for v3:
- Remove patch to set RV64I as default
- Remove patch for a separate sysctl driver
- Split off cpu frequency patch into its own series
- Reorder support/devicetree patches to come last
- Add patch for reset driver
- Add simple-pm-bus for busses with their own clocks
- Add additional documentation
- Reword mcounteren patch to refer to the RISC-V priv spec 1.9.1
- Many devicetree changes
- Switch to "make savedefconfig" to generate the config

Changes for v2:
- Many bugfixes for the device tree
- Modify the config to build without errors
- Add support for keeping internal PLL frequencies in-range
- Fix several rebase-induced artifacts

Sean Anderson (17):
  clk: Always use the supplied struct clk
  clk: Check that ops of composite clock components exist before calling
  clk: Unconditionally recursively en-/dis-able clocks
  reset: Add generic reset driver
  dm: Add support for simple-pm-bus
  spi: dw: Add device tree properties for fields in CTRL1
  spi: dw: Add mem_ops
  riscv: Add headers for asm/global_data.h
  riscv: Add option to support RISC-V privileged spec 1.9.1
  riscv: Allow use of reset drivers
  riscv: Add K210 pll support
  riscv: Add a bypass clock for K210
  riscv: Add K210 clock support
  riscv: Try to get cpu frequency from device tree
  riscv: Enable cpu clock if it is present
  riscv: Add device tree for K210
  riscv: Add Sipeed Maix support

 MAINTAINERS   |   6 +
 arch/riscv/Kconfig|  14 +
 arch/riscv/cpu/cpu.c  |   9 +
 arch/riscv/dts/Makefile   |   1 +
 arch/riscv/dts/k210-maix-bit.dts  |  41 ++
 arch/riscv/dts/k210.dtsi  | 568 
 arch/riscv/include/asm/csr.h  |  40 ++
 arch/riscv/include/asm/global_data.h  |   2 +
 arch/riscv/lib/reset.c|   2 +
 arch/sandbox/dts/test.dts |  21 +
 arch/sandbox/include/asm/clk.h|   1 +
 board/sipeed/maix/Kconfig |  56 ++
 board/sipeed/maix/MAINTAINERS |  11 +
 board/sipeed/maix/Makefile|   5 +
 board/sipeed/maix/maix.c  |   9 +
 configs/sandbox_defconfig |   2 +
 configs/sipeed_maix_bitm_defconfig|  10 +
 doc/board/index.rst   |   1 +
 doc/board/sipeed/index.rst|   9 +
 doc/board/sipeed/maix.rst |  94 +++
 .../bus/simple-pm-bus.txt |  44 ++
 .../reset/syscon-reset.txt|  36 ++
 .../spi/snps,dw-apb-ssi.txt   |  43 ++
 doc/imx/clk/ccf.txt   |  63 +-
 drivers/clk/Kconfig   |   1 +
 drivers/clk/Makefile  |   1 +
 drivers/clk/clk-composite.c   |  64 +-
 drivers/clk/clk-divider.c |   6 +-
 drivers/clk/clk-fixed-factor.c|   3 +-
 drivers/clk/clk-gate.c|   6 +-
 drivers/clk/clk-mux.c |  12 +-
 drivers/clk/clk-uclass.c  |  59 +-
 drivers/clk/imx/clk-gate2.c   |   4 +-
 drivers/clk/kendryte/Kconfig  |  12 +
 drivers/clk/kendryte/Makefile |   1 +
 drivers/clk/kendryte/bypass.c | 268 
 drivers/clk/kendryte/clk.c| 409 
 drivers/clk/kendryte/pll.c   

[PATCH] arm: dts: lx2160aqds: Enable FSPI node properties

[Kuldeep Singh]

Align flexspi node properties with linux device-tree properties.

Signed-off-by: Kuldeep Singh 
---
 arch/arm/dts/fsl-lx2160a-qds.dts | 24 
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/dts/fsl-lx2160a-qds.dts b/arch/arm/dts/fsl-lx2160a-qds.dts
index 34df0f5..cffefae 100644
--- a/arch/arm/dts/fsl-lx2160a-qds.dts
+++ b/arch/arm/dts/fsl-lx2160a-qds.dts
@@ -13,6 +13,10 @@
 / {
model = "NXP Layerscape LX2160AQDS Board";
compatible = "fsl,lx2160aqds", "fsl,lx2160a";
+
+   aliases {
+   spi0 = 
+   };
 };
 
  {
@@ -23,6 +27,26 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+
+   mt35xu512aba0: flash@0 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "jedec,spi-nor";
+   spi-max-frequency = <5000>;
+   reg = <0>;
+   };
+
+   mt35xu512aba1: flash@1 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "jedec,spi-nor";
+   spi-max-frequency = <5000>;
+   reg = <1>;
+   };
+};
+
  {
status = "okay";
u-boot,dm-pre-reloc;
-- 
2.7.4

[PATCH 1/1] test: log functions with CONFIG_LOG=n

[Heinrich Schuchardt]

If CONFIG_LOG=n, we still expect output for log_err(), log_warning(),
log_notice(), log_info() and in case of DEBUG=1 also for log_debug().

Provide unit tests verifying this.

The tests depend on:

CONFIG_CONSOLE_RECORD=y
CONFIG_LOG=n

It may be necessary to increase the value of CONFIG_SYS_MALLOC_F_LEN to
accommodate CONFIG_CONSOLE_RECORD=y.

Signed-off-by: Heinrich Schuchardt 
---
 MAINTAINERS   |   2 +-
 include/test/suites.h |   1 +
 test/Makefile |   2 +-
 test/cmd_ut.c |   6 ++
 test/log/Makefile |   4 ++
 test/log/nolog_test.c | 147 ++
 6 files changed, 160 insertions(+), 2 deletions(-)
 create mode 100644 test/log/nolog_test.c

diff --git a/MAINTAINERS b/MAINTAINERS
index d630176e33..ee80460fd7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -632,7 +632,7 @@ S:  Maintained
 T: git https://gitlab.denx.de/u-boot/u-boot.git
 F: common/log*
 F: cmd/log.c
-F: test/log/log_test.c
+F: test/log/
 F: test/py/tests/test_log.py

 MALI DISPLAY PROCESSORS
diff --git a/include/test/suites.h b/include/test/suites.h
index 0748185eaf..39ad81a90f 100644
--- a/include/test/suites.h
+++ b/include/test/suites.h
@@ -30,6 +30,7 @@ int do_ut_compression(cmd_tbl_t *cmdtp, int flag, int argc, 
char *const argv[]);
 int do_ut_dm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 int do_ut_env(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 int do_ut_lib(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_ut_log(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 int do_ut_optee(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 int do_ut_time(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
diff --git a/test/Makefile b/test/Makefile
index 2fe41f489c..2971d0d87f 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -10,5 +10,5 @@ obj-$(CONFIG_SANDBOX) += compression.o
 obj-$(CONFIG_SANDBOX) += print_ut.o
 obj-$(CONFIG_UT_TIME) += time_ut.o
 obj-$(CONFIG_UT_UNICODE) += unicode_ut.o
-obj-$(CONFIG_$(SPL_)LOG) += log/
+obj-y += log/
 obj-$(CONFIG_UNIT_TEST) += lib/
diff --git a/test/cmd_ut.c b/test/cmd_ut.c
index a3a9d49f7e..9b0d5e3e03 100644
--- a/test/cmd_ut.c
+++ b/test/cmd_ut.c
@@ -60,6 +60,9 @@ static cmd_tbl_t cmd_ut_sub[] = {
 #ifdef CONFIG_UT_LIB
U_BOOT_CMD_MKENT(lib, CONFIG_SYS_MAXARGS, 1, do_ut_lib, "", ""),
 #endif
+#if !defined(CONFIG_LOG) && defined(CONFIG_CONSOLE_RECORD)
+   U_BOOT_CMD_MKENT(log, CONFIG_SYS_MAXARGS, 1, do_ut_log, "", ""),
+#endif
 #ifdef CONFIG_UT_TIME
U_BOOT_CMD_MKENT(time, CONFIG_SYS_MAXARGS, 1, do_ut_time, "", ""),
 #endif
@@ -122,6 +125,9 @@ static char ut_help_text[] =
 #ifdef CONFIG_UT_ENV
"ut env [test-name]\n"
 #endif
+#if !defined(CONFIG_LOG) && defined(CONFIG_CONSOLE_RECORD)
+   "ut log [test-name] - test logging functions\n"
+#endif
 #ifdef CONFIG_UT_LIB
"ut lib [test-name] - test library functions\n"
 #endif
diff --git a/test/log/Makefile b/test/log/Makefile
index e0d0a4745f..ef82144759 100644
--- a/test/log/Makefile
+++ b/test/log/Makefile
@@ -3,3 +3,7 @@
 # Copyright (c) 2017 Google, Inc

 obj-$(CONFIG_LOG_TEST) += log_test.o
+
+ifndef CONFIG_LOG
+obj-$(CONFIG_CONSOLE_RECORD) += nolog_test.o
+endif
diff --git a/test/log/nolog_test.c b/test/log/nolog_test.c
new file mode 100644
index 00..a1c8afafb1
--- /dev/null
+++ b/test/log/nolog_test.c
@@ -0,0 +1,147 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2019, Heinrich Schuchardt 
+ *
+ * Logging function tests for CONFIG_LOG=n.
+ */
+
+/* Needed for testing log_debug() */
+#define DEBUG 1
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Linker list entry for a Unicode test */
+#define NOLOG_TEST(_name) UNIT_TEST(_name, 0, nolog_test)
+
+#define BUFFSIZE 32
+
+static int nolog_test_log_err(struct unit_test_state *uts)
+{
+   char buf[BUFFSIZE];
+
+   memset(buf, 0, BUFFSIZE);
+   console_record_reset_enable();
+   log_err("testing %s\n", "log_err");
+   membuff_get((struct membuff *)>console_out, buf, BUFFSIZE - 1);
+   gd->flags &= ~GD_FLG_RECORD;
+   ut_assert(!strcmp(buf, "testing log_err\n"));
+   return 0;
+}
+NOLOG_TEST(nolog_test_log_err);
+
+static int nolog_test_log_warning(struct unit_test_state *uts)
+{
+   char buf[BUFFSIZE];
+
+   memset(buf, 0, BUFFSIZE);
+   console_record_reset_enable();
+   log_warning("testing %s\n", "log_warning");
+   membuff_get((struct membuff *)>console_out, buf, BUFFSIZE - 1);
+   gd->flags &= ~GD_FLG_RECORD;
+   ut_assert(!strcmp(buf, "testing log_warning\n"));
+   return 0;
+}
+NOLOG_TEST(nolog_test_log_warning);
+
+static int nolog_test_log_notice(struct unit_test_state *uts)
+{
+   char buf[BUFFSIZE];
+
+   memset(buf, 0, BUFFSIZE);
+   console_record_reset_enable();
+   

Re: [PATCH 1/2] mmc: update guard for legacy part_init() call

[Tom Hebb]

On Mon, Feb 10, 2020, 19:13 Tom Rini  wrote:

> On Sat, Feb 01, 2020 at 11:35:37AM -0800, Thomas Hebb wrote:
>
> > commit eef05fd3ba68 ("mmc: bring back partition init for non-DM MMC
> > drivers") added this call to support drivers not yet migrated to driver
> > model. Slightly previously, however, commit 91ff6865629c ("blk: Rework
> > guard around part_init call") had removed the last reference in the code
> > to SPL_LIBDISK_SUPPORT, replacing it with a non-stage-specific check for
> > CONFIG_PARTITIONS and CONFIG_HAVE_BLOCK_DEVICE. Make that same change to
> > the guard here.
> >
> > Signed-off-by: Thomas Hebb 
>
> This breaks a large number of platforms including T1024QDS_SDCARD.
>

Thanks for the catch! Absolutely my fault for not testing on all platforms.
I'll figure out what I missed and send a v2 next week.


> --
> Tom
>

Re: [PATCH 1/1] log: output for CONFIG_LOG=n

[Heinrich Schuchardt]

On 2/11/20 12:13 AM, Simon Glass wrote:

Hi Heinrich,

On Sun, 9 Feb 2020 at 15:33, Heinrich Schuchardt  wrote:


On 2/9/20 11:21 PM, Sean Anderson wrote:

On 2/9/20 4:59 PM, Heinrich Schuchardt wrote:

If CONFIG_LOG=n, we should still output errors, warnings, notices, infos,
and for DEBUG=1 also debug messages.

Signed-off-by: Heinrich Schuchardt 


Why not just change the default for CONFIG_LOG to y? This is effectively
the same, except it still allows users to completely disable logging
altogether.

--Sean





Reviewed-by: Simon Glass 


I have tested your suggestion for qemu_arm64_defconfig:

Without my patch and CONFIG_LOG=n:

u-boot.bin 664200 bytes

With my patch and CONFIG_LOG=n:

u-boot.bin 664432 bytes

Without my patch but with CONFIG_LOG=y and CONFIG_CONSOLE=y:


What is CONFIG_CONSOLE?


This is a typo. It should be CONFIG_LOG_CONSOLE.

Thanks for reviewing.





u-boot.bin 48 bytes

So your suggestion consumes 2216 additional bytes to produce the
essentially the same console output.


OK. That is a lot more than I thought.

I'm not sure if it is possible to update the log test to cover your new case?


The current log test case in not a close fit, as filtering will be
irrelevant.

It should be possible to create a test using console recording
(CONFIG_CONSOLE_RECORD=y).

Looking at test/dm/test-main.c it seems that you once wanted to use
console recording in a test but I could not identify any test actually
using it up to now.

Best regards

Heinrich





IMHO CONFIG_LOG=y is currently only helpful in the following situation:

* You are debugging your board and want to interactively change
logging levels.
* You want to log to a remote syslog server.


Actually a major reason is that you want the full firmware log to be
reported to Linux so you can check for warnings, etc. However we don't
currently support this.

Regards,
Simon

[PATCH] ARM: keystone2: enable initrd fixup for LPAE addressing

[Lokesh Vutla]

From: Tero Kristo 

Keystone2 u-boot loads the initrd image into non-LPAE addressed memory
but linux kernel is running in LPAE. This causes a conflict as kernel
detects that non-memory address is passed and kernel ignores initrd.
There is an existing fixup logic to modify the address in the proper
configuration, but this is disabled at the moment. Enable the fixup
by setting the env variable for this so that initrd can be used
properly.

Signed-off-by: Tero Kristo 
Signed-off-by: Lokesh Vutla 
---
- This fixes boot on k2g platforms.

 include/configs/ti_armv7_keystone2.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/ti_armv7_keystone2.h 
b/include/configs/ti_armv7_keystone2.h
index ba12428dbe..1b014c1022 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -213,6 +213,7 @@
"tftp_root=/\0" \
"nfs_root=/export\0"\
"mem_lpae=1\0"  \
+   "uinitrd_fixup=1\0" \
"addr_ubi=0x8200\0" \
"addr_secdb_key=0xc00\0"\
"name_kern=zImage\0"\
-- 
2.23.0

Re: [PATCH 1/2] mmc: update guard for legacy part_init() call

[Tom Rini]

On Sat, Feb 01, 2020 at 11:35:37AM -0800, Thomas Hebb wrote:

> commit eef05fd3ba68 ("mmc: bring back partition init for non-DM MMC
> drivers") added this call to support drivers not yet migrated to driver
> model. Slightly previously, however, commit 91ff6865629c ("blk: Rework
> guard around part_init call") had removed the last reference in the code
> to SPL_LIBDISK_SUPPORT, replacing it with a non-stage-specific check for
> CONFIG_PARTITIONS and CONFIG_HAVE_BLOCK_DEVICE. Make that same change to
> the guard here.
> 
> Signed-off-by: Thomas Hebb 

This breaks a large number of platforms including T1024QDS_SDCARD.

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH v2 3/7] cmd: env: check real location for env info command

[Simon Glass]

On Mon, 10 Feb 2020 at 10:01, Patrick Delaunay  wrote:
>
> Check the current ENV location, dynamically provided by the weak
> function env_get_location to be sure that the environment can be
> persistent.
>
> The compilation flag ENV_IS_IN_DEVICE is not enough when the board
> dynamically select the available storage location (according boot
> device for example).
>
> This patch solves issue for stm32mp1 platform, when the boot device
> is USB.
>
> Signed-off-by: Patrick Delaunay 
> ---
>
> Changes in v2:
> - update prototype in env_internal.h  as done in
>   "env: add prototypes for weak function"
> - remove comment change in env.c (implementation information)
> - move env_location declaration
>
>  cmd/nvedit.c   | 15 ---
>  include/env_internal.h | 11 +++
>  2 files changed, 23 insertions(+), 3 deletions(-)

Definitely we need some more tests in the area of the environment.

Reviewed-by: Simon Glass 

Re: [PATCH v2 06/10] mmc: am654_sdhci: Implement workaround for card detect

[Simon Glass]

Hi,

On Mon, 10 Feb 2020 at 04:26, Simon Goldschmidt
 wrote:
>
> +Simon Glass for the xxx_get_ops() functions in DM
>
> On Mon, Feb 10, 2020 at 10:46 AM Faiz Abbas  wrote:
> >
> > Simon,
> >
> > On 29/01/20 7:48 pm, Simon Goldschmidt wrote:
> > > On Fri, Jan 24, 2020 at 12:52 PM Faiz Abbas  wrote:
> > >>
> > >> The 4 bit MMC controllers have an internal debounce for the SDCD line
> > >> with a debounce delay of 1 second. Therefore, after clocks to the IP are
> > >> enabled, software has to wait for this time before it can power on the
> > >> controller.
> > >>
> > >> Add an init() callback which polls on sdcd for a maximum of 2 seconds
> > >> before switching on power to the controller or (in the case of no card)
> > >> returning a ENOMEDIUM. This pushes the 1 second wait time to when the
> > >> card is actually needed rather than at every probe() making sure that
> > >> users who don't insert an SD card in the slot don't have to wait such a
> > >> long time.
> > >>
> > >> Signed-off-by: Faiz Abbas 
> > >> Signed-off-by: Lokesh Vutla 
> > >> ---
> > >>  drivers/mmc/am654_sdhci.c | 35 ---
> > >>  1 file changed, 32 insertions(+), 3 deletions(-)
> > >>
> > >> diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
> > >> index ff0a81eaab..ccae3fea31 100644
> > >> --- a/drivers/mmc/am654_sdhci.c
> > >> +++ b/drivers/mmc/am654_sdhci.c
> > >> @@ -254,7 +254,7 @@ const struct am654_driver_data j721e_4bit_drv_data = 
> > >> {
> > >> .flags = IOMUX_PRESENT,
> > >>  };
> > >>
> > >> -int am654_sdhci_init(struct am654_sdhci_plat *plat)
> > >> +int am654_sdhci_init_phy(struct am654_sdhci_plat *plat)
> > >>  {
> > >> u32 ctl_cfg_2 = 0;
> > >> u32 mask, val;
> > >> @@ -331,8 +331,37 @@ static int sdhci_am654_get_otap_delay(struct 
> > >> udevice *dev,
> > >> return 0;
> > >>  }
> > >>
> > >> +#define MAX_SDCD_DEBOUNCE_TIME 2000
> > >> +int am654_sdhci_init(struct udevice *dev)
> > >> +{
> > >> +   struct am654_sdhci_plat *plat = dev_get_platdata(dev);
> > >> +   struct mmc *mmc = mmc_get_mmc_dev(dev);
> > >> +   struct sdhci_host *host = mmc->priv;
> > >> +   unsigned long start;
> > >> +   int val;
> > >> +
> > >> +   /*
> > >> +* The controller takes about 1 second to debounce the card 
> > >> detect line
> > >> +* and doesn't let us power on until that time is up. Instead of 
> > >> waiting
> > >> +* for 1 second at every stage, poll on the CARD_PRESENT bit 
> > >> upto a
> > >> +* maximum of 2 seconds to be safe..
> > >> +*/
> > >> +   start = get_timer(0);
> > >> +   do {
> > >> +   if (get_timer(start) > MAX_SDCD_DEBOUNCE_TIME)
> > >> +   return -ENOMEDIUM;
> > >> +
> > >> +   val = mmc_getcd(host->mmc);
> > >> +   } while (!val);
> > >> +
> > >> +   am654_sdhci_init_phy(plat);
> > >> +
> > >> +   return sdhci_init(mmc);
> > >> +}
> > >> +
> > >>  static int am654_sdhci_probe(struct udevice *dev)
> > >>  {
> > >> +   struct dm_mmc_ops *ops = mmc_get_ops(dev);
> > >> struct am654_driver_data *drv_data =
> > >> (struct am654_driver_data 
> > >> *)dev_get_driver_data(dev);
> > >> struct am654_sdhci_plat *plat = dev_get_platdata(dev);
> > >> @@ -373,9 +402,9 @@ static int am654_sdhci_probe(struct udevice *dev)
> > >>
> > >> regmap_init_mem_index(dev_ofnode(dev), >base, 1);
> > >>
> > >> -   am654_sdhci_init(plat);
> > >> +   ops->init = am654_sdhci_init;
> > >
> > > Is this a valid approach? I mean, many drivers create their 'ops' const 
> > > like
> > > this:
> > >static const struct ram_ops altera_gen5_sdram_ops (...)
> > >
> > > That would mean you write to a const region. I know the U-Boot sources 
> > > make
> > > this easy for you by providing the ops non-const via mmc_get_ops, but I 
> > > still
> > > think this is not good.
> > >
> >
> > Sorry I missed this earlier.
> >
> > I do see other drivers following this approach (see
> > drivers/mmc/sdhci-cadence.c). The issue is that I then have to export
> > every API in drivers/mmc/sdhci.c:694
> >
> > const struct dm_mmc_ops sdhci_ops = {
> > .send_cmd   = sdhci_send_command,
> > .set_ios= sdhci_set_ios,
> > .get_cd = sdhci_get_cd,
> > #ifdef MMC_SUPPORTS_TUNING
> > .execute_tuning = sdhci_execute_tuning,
> > #endif
> > };
> >
> > and create a duplicate structure in my platform driver with an extra .init
> >
> > OR
> >
> > I have to create one more wrapper sdhci_pltaform_init() API in the sdhci
> > driver that just calls a platform init function inside it. So its
> >
> > include/sdhci.h:
> >
> > struct sdhci_ops {
> > ..
> > +   int (*platform_init)()
> >
> > and then drivers/mmc/sdhci.c:
> >
> >
> > +dm_sdhci_platform_init()
> > +{
> > +...
> > +   host->ops->platform_init();
> > +}
> >
> > const struct dm_mmc_ops sdhci_ops  = {
> > ...
> > + 

Re: [PATCH 11/11] fdt: video: omap: add framebuffer and panel bindings

[Simon Glass]

On Sun, 9 Feb 2020 at 11:48, Dario Binacchi  wrote:
>
> Add device-tree binding documentation for ti framebuffer and generic
> panel output driver.
>
> Signed-off-by: Dario Binacchi 
> ---
>
>  .../video/tilcdc/panel.txt| 66 +++
>  .../video/tilcdc/tilcdc.txt   | 82 +++
>  2 files changed, 148 insertions(+)
>  create mode 100644 doc/device-tree-bindings/video/tilcdc/panel.txt
>  create mode 100644 doc/device-tree-bindings/video/tilcdc/tilcdc.txt

Reviewed-by: Simon Glass 

Re: [PATCH 1/1] log: output for CONFIG_LOG=n

[Simon Glass]

Hi Heinrich,

On Sun, 9 Feb 2020 at 15:33, Heinrich Schuchardt  wrote:
>
> On 2/9/20 11:21 PM, Sean Anderson wrote:
> > On 2/9/20 4:59 PM, Heinrich Schuchardt wrote:
> >> If CONFIG_LOG=n, we should still output errors, warnings, notices, infos,
> >> and for DEBUG=1 also debug messages.
> >>
> >> Signed-off-by: Heinrich Schuchardt 
> >
> > Why not just change the default for CONFIG_LOG to y? This is effectively
> > the same, except it still allows users to completely disable logging
> > altogether.
> >
> > --Sean
> >
>

Reviewed-by: Simon Glass 

> I have tested your suggestion for qemu_arm64_defconfig:
>
> Without my patch and CONFIG_LOG=n:
>
> u-boot.bin 664200 bytes
>
> With my patch and CONFIG_LOG=n:
>
> u-boot.bin 664432 bytes
>
> Without my patch but with CONFIG_LOG=y and CONFIG_CONSOLE=y:

What is CONFIG_CONSOLE?

>
> u-boot.bin 48 bytes
>
> So your suggestion consumes 2216 additional bytes to produce the
> essentially the same console output.

OK. That is a lot more than I thought.

I'm not sure if it is possible to update the log test to cover your new case?

>
> IMHO CONFIG_LOG=y is currently only helpful in the following situation:
>
> * You are debugging your board and want to interactively change
>logging levels.
> * You want to log to a remote syslog server.

Actually a major reason is that you want the full firmware log to be
reported to Linux so you can check for warnings, etc. However we don't
currently support this.

Regards,
Simon

Re: [PATCH 1/1] log: syslog driver

[Simon Glass]

Hi Heinrich,

On Sat, 8 Feb 2020 at 18:35, Heinrich Schuchardt  wrote:
>
> Provide a log driver that broadcasts RFC 3164 messages to syslog servers.
> rsyslog is one implementation of such a server.
>
> The messages are sent to the local broadcast address 255.255.255.255 on
> port 514.
>
> The environment variable log_hostname can be used to provide the HOSTNAME
> field for the messages. The optional TIMESTAMP field of RFC 3164 is not
> provided.
>
> Signed-off-by: Heinrich Schuchardt 
> ---
>  MAINTAINERS |   2 +-
>  common/Kconfig  |   7 +++
>  common/Makefile |   1 +
>  common/log_syslog.c | 117 
>  doc/README.log  |   3 ++
>  5 files changed, 129 insertions(+), 1 deletion(-)
>  create mode 100644 common/log_syslog.c

Is it possible to add a test for this using sandbox networking?


- Simon

Re: [PATCH v2 6/7] configs: sandbox: Enable sub command 'env info'

[Simon Glass]

On Mon, 10 Feb 2020 at 10:01, Patrick Delaunay  wrote:
>
> Enable support for sub command 'env info' in sandbox
> with CONFIG_CMD_NVEDIT_INFO. This is aimed primarily
> at adding unit test.
>
> Signed-off-by: Patrick Delaunay 
> ---
>
> Changes in v2:
> - activate env info command in sandbox (new)
>
>  configs/sandbox64_defconfig| 1 +
>  configs/sandbox_defconfig  | 1 +
>  configs/sandbox_flattree_defconfig | 1 +
>  configs/sandbox_spl_defconfig  | 1 +
>  4 files changed, 4 insertions(+)

Reviewed-by: Simon Glass 

PCI / PCIe related dts issues

[Tom Rini]

Hey all,

I'm sending this message to folks that are listed as maintainer for a
platform that has some PCI / PCIe related DTS problems.  These problems
can be seen if you apply the following patch:

diff --git a/scripts/Makefile.extrawarn b/scripts/Makefile.extrawarn
index da6df1429fb8..07c65f170b82 100644
--- a/scripts/Makefile.extrawarn
+++ b/scripts/Makefile.extrawarn
@@ -71,8 +71,6 @@ else
 ifeq ($(findstring 1,$(KBUILD_ENABLE_EXTRA_GCC_CHECKS)),)
 DTC_FLAGS += -Wno-unit_address_vs_reg
 DTC_FLAGS += -Wno-unit_address_format
-DTC_FLAGS += -Wno-pci_bridge
-DTC_FLAGS += -Wno-pci_device_bus_num
 DTC_FLAGS += -Wno-pci_device_reg
 DTC_FLAGS += -Wno-avoid_unnecessary_addr_size
 DTC_FLAGS += -Wno-alias_paths

Doing this would bring us slightly closer to being in-line with current
Linux-kernel kbuild files, is why I bring this up.  A way to fix this on
sandbox for example, which also has this problem is:

diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index 4dd82f6a32fd..2d7db0249ebe 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -10,7 +10,7 @@
 
aliases {
i2c0 = _0;
-   pci0 = 
+   pci0 = 
rtc0 = _0;
axi0 = 
spi0 = 
@@ -52,9 +52,10 @@
pinctrl-0 = <_i2c0>;
};
 
-   pci: pci-controller {
+   pcic: pci@0 {
compatible = "sandbox,pci";
device_type = "pci";
+   bus-range = <0x00 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x0200 0 0x1000 0x1000 0 0x2000
diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi
index 7bf144f53265..f7f3de784292 100644
--- a/arch/sandbox/dts/sandbox.dtsi
+++ b/arch/sandbox/dts/sandbox.dtsi
@@ -99,7 +99,7 @@
};
};
 
-   pci-controller {
+   pci@0 {
pci@1e,0 {
compatible = "sandbox,pmc";
reg = <0xf000 0 0 0 0>;
diff --git a/arch/sandbox/dts/sandbox64.dts b/arch/sandbox/dts/sandbox64.dts
index 5c95cee9d7a9..97e33f110eef 100644
--- a/arch/sandbox/dts/sandbox64.dts
+++ b/arch/sandbox/dts/sandbox64.dts
@@ -10,7 +10,7 @@
 
aliases {
i2c0 = _0;
-   pci0 = 
+   pci0 = 
rtc0 = _0;
axi0 = 
spi0 = 
@@ -47,9 +47,10 @@
pinctrl-0 = <_i2c0>;
};
 
-   pci: pci-controller {
+   pcic: pci@0 {
compatible = "sandbox,pci";
device_type = "pci";
+   bus-range = <0x00 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x0200 0 0x1000 0 0x1000 0 0x2000
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index c22844743143..4d3c42077858 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -463,9 +463,10 @@
compatible = "sandbox,pch";
};
 
-   pci0: pci-controller0 {
+   pci0: pci@0 {
compatible = "sandbox,pci";
device_type = "pci";
+   bus-range = <0x00 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x0200 0 0x1000 0x1000 0 0x200
@@ -531,9 +532,10 @@
};
};
 
-   pci1: pci-controller1 {
+   pci1: pci@1 {
compatible = "sandbox,pci";
device_type = "pci";
+   bus-range = <0x00 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x0200 0 0x3000 0x3000 0 0x2000
@@ -546,9 +548,10 @@
};
};
 
-   pci2: pci-controller2 {
+   pci2: pci@2 {
compatible = "sandbox,pci";
device_type = "pci";
+   bus-range = <0x00 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x0200 0 0x5000 0x5000 0 0x2000

And as these are also warnings that are normally visible in Linux. you
may just need to re-sync your dts files.  Thanks!

-- 
Tom


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Description: PGP signature

Re: [PATCH] serial_lpuart: make clock failure less verbose

[Giulio Benetti]

+Cc Stefano

On 2/1/20 1:48 PM, Lukasz Majewski wrote:

Hi Giulio,


Hi Lukasz,

On 1/31/20 7:14 PM, Simon Glass wrote:

On Fri, 31 Jan 2020 at 06:39, Giulio Benetti
 wrote:


Some device may enable CONFIG_CLK but not still support this clock
in CC, so better use debug() in place of dev_warn() otherwise a
lot of


 ^^ this must be CCF. Can you correct commit log while applying?


I think that Stefano (or Tom) will apply this patch (as it is related to
i.MX SoC's uart).



Thanks in advance





Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de



--
Giulio Benetti
Benetti Engineering sas

Re: [PATCH v3 00/20] Refactor the architecture parts of mt7628

[Daniel Schwierzeck]

Hi Mauro,

Am 10.02.20 um 21:20 schrieb Mauro Condarelli:
> FYI
> I've been using this patchset for over a week without any adverse effect.
> It allowed me to port to VoCore2 board.
> Should I add a "Tested-by" flag?
> If so: how should I do it?
> 
> Regards
> Mauro Codarelli
> 

sorry that I could respond to your questions earlier. I've pushed the
complete patch set from Weijie to:

https://gitlab.denx.de/u-boot/custodians/u-boot-mips/commits/testing

Maybe this helps you with development. If you have a bootable patch set
(you can do MMC later) for your VoCore2 board, please submit a regular
patch series based on that branch so that we can review again.

Regarding the Tested-by, simply respond to a patch mail with a

Tested-by: Mauro Condarelli 

Then Patchwork will record that and automatically adds this line to the
patch when I download it. Personally I always remove all parts of the
mail beginning with the first "diff --git a/" when I send a
Tested-by or Reviewed-by.


-- 
- Daniel

Re: [PATCH v2 7/7] test: env: add test for env info sub-command

[Stephen Warren]

On 2/10/20 10:01 AM, Patrick Delaunay wrote:

Add a pytest for testing the env info sub-command:

test_env_info: test command with several option

test_env_info_test: test the result of the sub-commandi with quiet option,


Nit: Remove "i" from the end of "sub-commandi".


diff --git a/test/py/tests/test_env.py b/test/py/tests/test_env.py



+@pytest.mark.boardspec('sandbox')


I assume that's just so things like "environment can't be persisted" can 
be guaranteed, since other boards will be different to sandbox here?



+@pytest.mark.buildconfigspec('cmd_nvedit_info')
+@pytest.mark.buildconfigspec('cmd_echo')
+def test_env_info_test(state_test_env):
+
+"""Test 'env info' quiet command result with several options for test.
+"""


Nit: It took me a while to realized what the "for test" and "_test" 
function name suffix meant. Perhaps _retcode might be a better function 
name suffix?


Acked-by: Stephen Warren 

Re: [PATCH v3 00/20] Refactor the architecture parts of mt7628

[Mauro Condarelli]

FYI
I've been using this patchset for over a week without any adverse effect.
It allowed me to port to VoCore2 board.
Should I add a "Tested-by" flag?
If so: how should I do it?

Regards
Mauro Codarelli

On 2/10/20 6:20 PM, Daniel Schwierzeck wrote:
> Hi Weije,
>
> Am 21.01.20 um 09:17 schrieb Weijie Gao:
>> This patch series are divided into two parts:
>>
>> The main part is to rewrite the whole architecture code of mt7628:
>> * Lock parts of the d-cache for initial stack so the rest of the code can
>>   be reimplemented in C.
>> * Memory controller & DDR initialization have been fully written to support
>>   detecting DDR size automatically.
>> * DDR calibration has also been reimplemented with a clear logic.
>> * Implemented a new sysreset driver to take advantage of the reset
>>   controller so we can drop the use of syscon-based sysreset to reduce size.
>>
>> The second part is to add SPL support for mt7628:
>> * With SPL enabled we can build the ROM-bootable and RAM-bootable binary
>>   simultaneously, and we can drop RAM boot related configs and defconfig
>>   files.
>> * Generate compressed u-boot.bin image for SPL to reduce size of final
>>   combined binary.
>> * Enable DM support for SPL for a more flexible device probing.
>> * Add a demo board (mt7628_rfb) aims at router application.
>>
>> Changes since v2:
>> * Dropped a patch which removes unused parts of mt7628a.dtsi
>> * Move lzma decompression support to common spl_nor.c
>> * Move u-boot,dm-pre-reloc to u-boot-mt7628.dtsi
>>
> could you resend patches from 14/20 to 20/20? Patch 16/20 should get a
> test as requested by Simon. From the remaining generic patches I'd like
> to have some more acks before applying. Thanks.
>

Re: Please pull u-boot-video

[Tom Rini]

On Mon, Feb 10, 2020 at 06:07:56PM +0100, Anatolij Gustschin wrote:

> Hi Tom,
> 
> please pull a few fixes for v2020.04-rc1.
> 
> Travis-CI build logs with additional (already merged) patch:
> https://travis-ci.org/vdsao/u-boot-video/builds/646159863
> 
> Thanks,
> Anatolij
> 
> The following changes since commit d861183dc531b74479f92bf4c8de8ad60a0a0d56:
> 
>   Merge tag 'ti-v2020.04-rc2' of 
> https://gitlab.denx.de/u-boot/custodians/u-boot-ti (2020-02-04 08:16:01 -0500)
> 
> are available in the Git repository at:
> 
>   https://gitlab.denx.de/u-boot/custodians/u-boot-video.git 
> tags/fixes-for-v2020.04
> 
> for you to fetch changes up to 8382b1019283d2c1e9ba09cf0a10205deaf32fe1:
> 
>   video: mxsfb: call remove() when booting OS (2020-02-04 23:04:28 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Description: PGP signature

[PATCH] eth: Fixed-phy support in r-car

[Mikle Lappo]

>From 87bdd605d79f3c492cfc2634a51b17de161b87b5 Mon Sep 17 00:00:00 2001
From: Mikhail Lappo 
Date: Fri, 7 Feb 2020 12:37:53 +0100
Subject: [PATCH] eth: Fixed-phy support in r-car

Calling old Uboot API doesn't allow to use fixed phy.
Searching by mask is the part of new function, after
scanning FDT for a fixed-phy definition

Signed-off-by: Mikhail Lappo 
CC: Marek Vasut 
---
 drivers/net/ravb.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c
index 46e02ed14c..92b9a0767c 100644
--- a/drivers/net/ravb.c
+++ b/drivers/net/ravb.c
@@ -304,7 +304,7 @@ static int ravb_phy_config(struct udevice *dev)
  struct ravb_priv *eth = dev_get_priv(dev);
  struct eth_pdata *pdata = dev_get_platdata(dev);
  struct phy_device *phydev;
- int mask = 0x, reg;
+ int reg;

  if (dm_gpio_is_valid(>reset_gpio)) {
  dm_gpio_set_value(>reset_gpio, 1);
@@ -313,7 +313,7 @@ static int ravb_phy_config(struct udevice *dev)
  mdelay(1);
  }

- phydev = phy_find_by_mask(eth->bus, mask, pdata->phy_interface);
+ phydev = phy_connect(eth->bus, 0, dev, pdata->phy_interface);
  if (!phydev)
  return -ENODEV;

-- 
2.21.0 (Apple Git-122)

[PATCH] eth: Fix crash while enabling fixed-phy

[Mikle Lappo]

>From db35a238c5ae530e82d6de4cab180d570a3d8fc9 Mon Sep 17 00:00:00 2001
From: Mikhail Lappo 
Date: Fri, 7 Feb 2020 14:13:25 +0100
Subject: [PATCH] eth: Fix crash while enabling fixed-phy

Fixed phy is always enabled and doesn't
implement writeext function

Signed-off-by: Mikhail Lappo 
CC: Marek Vasut 
---
 drivers/net/ravb.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c
index fb4a628d63..46e02ed14c 100644
--- a/drivers/net/ravb.c
+++ b/drivers/net/ravb.c
@@ -434,7 +434,8 @@ static int ravb_config(struct udevice *dev)

  writel(mask, eth->iobase + RAVB_REG_ECMR);

- phy->drv->writeext(phy, -1, 0x02, 0x08, (0x0f << 5) | 0x19);
+ if (phy->drv->writeext)
+ phy->drv->writeext(phy, -1, 0x02, 0x08, (0x0f << 5) | 0x19);

  return 0;
 }
-- 
2.21.0 (Apple Git-122)

Re: [PATCH] sandbox: p2sb: Silence compiler warning

[Tom Rini]

On Mon, Feb 10, 2020 at 12:03:26PM -0700, Simon Glass wrote:
> Hi Stephen.
> 
> On Mon, 10 Feb 2020 at 11:28, Stephen Warren  wrote:
> >
> > On 2/8/20 8:21 AM, Bin Meng wrote:
> > > On Sat, Feb 8, 2020 at 10:53 PM Simon Glass  wrote:
> > >>
> > >> Some compilers produce a warning about 'child' being used before init.
> > >> Silence this by setting to NULL at the start.
> > >
> > > Should be a compiler bug I think. Which compiler has such issue?
> >
> > gcc 7.2.1 (Linaro build x86 -> ARM cross-compiler)
> >
> > I don't believe this is a compiler bug.
> 
> Well it is 'fixed' in 7.3.
> 
> >
> > For the compiler *not* to emit this warning, it would have to apply
> > cross-function data flow analysis, which isn't something guaranteed by
> > the C standard IIRC, since it's a very hard problem in general. So, not
> > a compiler *bug* even if we'd like to see the compiler be smart about
> > these things.
> 
> Yes it is hard. I do think it is worth avoiding these problems where
> we can. But in general I build with the latest kernel toolchain. I
> think, sadly, if we really want to solve this problem we may need a
> way to make buildman automatically build with multiple toolchains.

Well, lets see what's going on here a bit more.  We're at the point
right now where it's painful that we're on gcc-7.3 for the most part and
can't easily / universally move up to a 9.something.

-- 
Tom


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Description: PGP signature

Re: [PATCH] sandbox: p2sb: Silence compiler warning

[Simon Glass]

Hi Stephen.

On Mon, 10 Feb 2020 at 11:28, Stephen Warren  wrote:
>
> On 2/8/20 8:21 AM, Bin Meng wrote:
> > On Sat, Feb 8, 2020 at 10:53 PM Simon Glass  wrote:
> >>
> >> Some compilers produce a warning about 'child' being used before init.
> >> Silence this by setting to NULL at the start.
> >
> > Should be a compiler bug I think. Which compiler has such issue?
>
> gcc 7.2.1 (Linaro build x86 -> ARM cross-compiler)
>
> I don't believe this is a compiler bug.

Well it is 'fixed' in 7.3.

>
> For the compiler *not* to emit this warning, it would have to apply
> cross-function data flow analysis, which isn't something guaranteed by
> the C standard IIRC, since it's a very hard problem in general. So, not
> a compiler *bug* even if we'd like to see the compiler be smart about
> these things.

Yes it is hard. I do think it is worth avoiding these problems where
we can. But in general I build with the latest kernel toolchain. I
think, sadly, if we really want to solve this problem we may need a
way to make buildman automatically build with multiple toolchains.

Regards,
Simon

Re: [PATCH] sandbox: p2sb: Silence compiler warning

[Tom Rini]

On Mon, Feb 10, 2020 at 11:27:58AM -0700, Stephen Warren wrote:
> On 2/8/20 8:21 AM, Bin Meng wrote:
> > On Sat, Feb 8, 2020 at 10:53 PM Simon Glass  wrote:
> > > 
> > > Some compilers produce a warning about 'child' being used before init.
> > > Silence this by setting to NULL at the start.
> > 
> > Should be a compiler bug I think. Which compiler has such issue?
> 
> gcc 7.2.1 (Linaro build x86 -> ARM cross-compiler)
> 
> I don't believe this is a compiler bug.
> 
> For the compiler *not* to emit this warning, it would have to apply
> cross-function data flow analysis, which isn't something guaranteed by the C
> standard IIRC, since it's a very hard problem in general. So, not a compiler
> *bug* even if we'd like to see the compiler be smart about these things.

Is that a supported by them still compiler tho?  We don't see that
warning with the gcc-7.3.0 from the kernel.org toolchains we use (or
travis wouldn't have been clean for Simon).

I'm assuming you're using that compiler to test as it's something that
otherwise fits in your test workflow.

-- 
Tom


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Description: PGP signature

Re: [PATCH] sandbox: p2sb: Silence compiler warning

[Stephen Warren]

On 2/8/20 8:21 AM, Bin Meng wrote:

On Sat, Feb 8, 2020 at 10:53 PM Simon Glass  wrote:


Some compilers produce a warning about 'child' being used before init.
Silence this by setting to NULL at the start.


Should be a compiler bug I think. Which compiler has such issue?


gcc 7.2.1 (Linaro build x86 -> ARM cross-compiler)

I don't believe this is a compiler bug.

For the compiler *not* to emit this warning, it would have to apply 
cross-function data flow analysis, which isn't something guaranteed by 
the C standard IIRC, since it's a very hard problem in general. So, not 
a compiler *bug* even if we'd like to see the compiler be smart about 
these things.

Re: Please pull u-boot-x86

[Tom Rini]

On Mon, Feb 10, 2020 at 06:20:54PM +0100, Anatolij Gustschin wrote:
> On Mon, 10 Feb 2020 08:39:45 -0500
> Tom Rini tr...@konsulko.com wrote:
> ...
> > > The following changes since commit 
> > > 8a6ffeda97dfda5263ef40e1a4efb25b032ce04c:
> > > 
> > >   video: enable VIDEO_ANSI and all VIDEO_BBP options (2020-02-06 16:11:47 
> > > -0500)
> > > 
> > > are available in the git repository at:
> > > 
> > >   https://gitlab.denx.de/u-boot/custodians/u-boot-x86
> > > 
> > > for you to fetch changes up to 0f6a70e971b2d87de3e58e8f0b51b0cd6723bc96:
> > > 
> > >   x86: coral: Enable TPM (2020-02-07 22:46:36 +0800)
> > >   
> > 
> > Applied to u-boot/master, thanks!
> 
> it seems this hasn't been pulled into master branch yet, I don't see
> patches from this pull request in master. Could you please check? Thanks!

Thanks for catching that.  While I did test it over the weekend:
https://gitlab.denx.de/u-boot/u-boot/pipelines/2120
I seemed to have dropped it by accident testing something else.

-- 
Tom


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Description: PGP signature

Re: Please pull u-boot-x86

[Anatolij Gustschin]

On Mon, 10 Feb 2020 08:39:45 -0500
Tom Rini tr...@konsulko.com wrote:
...
> > The following changes since commit 8a6ffeda97dfda5263ef40e1a4efb25b032ce04c:
> > 
> >   video: enable VIDEO_ANSI and all VIDEO_BBP options (2020-02-06 16:11:47 
> > -0500)
> > 
> > are available in the git repository at:
> > 
> >   https://gitlab.denx.de/u-boot/custodians/u-boot-x86
> > 
> > for you to fetch changes up to 0f6a70e971b2d87de3e58e8f0b51b0cd6723bc96:
> > 
> >   x86: coral: Enable TPM (2020-02-07 22:46:36 +0800)
> >   
> 
> Applied to u-boot/master, thanks!

it seems this hasn't been pulled into master branch yet, I don't see
patches from this pull request in master. Could you please check? Thanks!

--
Anatolij

Re: [PATCH v3 00/20] Refactor the architecture parts of mt7628

[Daniel Schwierzeck]

Hi Weije,

Am 21.01.20 um 09:17 schrieb Weijie Gao:
> This patch series are divided into two parts:
> 
> The main part is to rewrite the whole architecture code of mt7628:
> * Lock parts of the d-cache for initial stack so the rest of the code can
>   be reimplemented in C.
> * Memory controller & DDR initialization have been fully written to support
>   detecting DDR size automatically.
> * DDR calibration has also been reimplemented with a clear logic.
> * Implemented a new sysreset driver to take advantage of the reset
>   controller so we can drop the use of syscon-based sysreset to reduce size.
> 
> The second part is to add SPL support for mt7628:
> * With SPL enabled we can build the ROM-bootable and RAM-bootable binary
>   simultaneously, and we can drop RAM boot related configs and defconfig
>   files.
> * Generate compressed u-boot.bin image for SPL to reduce size of final
>   combined binary.
> * Enable DM support for SPL for a more flexible device probing.
> * Add a demo board (mt7628_rfb) aims at router application.
> 
> Changes since v2:
> * Dropped a patch which removes unused parts of mt7628a.dtsi
> * Move lzma decompression support to common spl_nor.c
> * Move u-boot,dm-pre-reloc to u-boot-mt7628.dtsi
> 

could you resend patches from 14/20 to 20/20? Patch 16/20 should get a
test as requested by Simon. From the remaining generic patches I'd like
to have some more acks before applying. Thanks.

-- 
- Daniel

Re: [PATCH v3 10/20] mips: mtmips: rewrite lowlevel codes of mt7628

[Daniel Schwierzeck]

Am 21.01.20 um 09:19 schrieb Weijie Gao:
> This patch rewrites the mtmips architecture with the following changes:
> 
> 1. Move MT7628 soc parts into a subfolder.
> 2. Lock parts of D-Cache as temporary stack.
> 3. Reimplement DDR initialization in C language.
> 4. Reimplement DDR calibration in a clear logic.
> 5. Add full support for auto size detection for DDR1 and DDR2.
> 6. Use accurate CPU clock depending on the input xtal frequency for timer
>and delay functions.
> 
> Note:
> 
> print_cpuinfo() has incompatible parts with MT7620 so it's moved into
> mt7628 subfolder.
> 
> Signed-off-by: Weijie Gao 
> ---
> Changes since v2: none
> ---
>  arch/mips/mach-mtmips/Kconfig |  69 +---
>  arch/mips/mach-mtmips/Makefile|   7 +-
>  arch/mips/mach-mtmips/cpu.c   |  58 +---
>  arch/mips/mach-mtmips/ddr_cal.c   | 211 +++
>  arch/mips/mach-mtmips/ddr_calibrate.c | 309 -
>  arch/mips/mach-mtmips/ddr_init.c  | 194 +++
>  arch/mips/mach-mtmips/include/mach/ddr.h  |  52 +++
>  arch/mips/mach-mtmips/include/mach/mc.h   | 180 ++
>  arch/mips/mach-mtmips/lowlevel_init.S | 328 --
>  arch/mips/mach-mtmips/mt7628/Makefile |   5 +
>  arch/mips/mach-mtmips/mt7628/ddr.c| 173 +
>  arch/mips/mach-mtmips/mt7628/init.c   | 109 ++
>  arch/mips/mach-mtmips/mt7628/lowlevel_init.S  | 161 +
>  arch/mips/mach-mtmips/mt7628/mt7628.h | 104 ++
>  arch/mips/mach-mtmips/mt76xx.h|  32 --
>  .../gardena-smart-gateway-mt7688_defconfig|   2 -
>  configs/linkit-smart-7688_defconfig   |   2 -
>  17 files changed, 1202 insertions(+), 794 deletions(-)
>  create mode 100644 arch/mips/mach-mtmips/ddr_cal.c
>  delete mode 100644 arch/mips/mach-mtmips/ddr_calibrate.c
>  create mode 100644 arch/mips/mach-mtmips/ddr_init.c
>  create mode 100644 arch/mips/mach-mtmips/include/mach/ddr.h
>  create mode 100644 arch/mips/mach-mtmips/include/mach/mc.h
>  delete mode 100644 arch/mips/mach-mtmips/lowlevel_init.S
>  create mode 100644 arch/mips/mach-mtmips/mt7628/Makefile
>  create mode 100644 arch/mips/mach-mtmips/mt7628/ddr.c
>  create mode 100644 arch/mips/mach-mtmips/mt7628/init.c
>  create mode 100644 arch/mips/mach-mtmips/mt7628/lowlevel_init.S
>  create mode 100644 arch/mips/mach-mtmips/mt7628/mt7628.h
>  delete mode 100644 arch/mips/mach-mtmips/mt76xx.h
> 

applied to u-boot-mips, thanks.

-- 
- Daniel

Re: [PATCH v3 12/20] mips: enable support for appending dtb to spl binary

[Daniel Schwierzeck]

Am 21.01.20 um 09:19 schrieb Weijie Gao:
> If CONFIG_SPL_OF_CONTROL is enabled for SPL and CONFIG_OF_SEPARATE is also
> enabled, the dtb will be appended to the u-boot-spl.bin.
> 
> When calling dm_init_and_scan() in SPL, fdtdec_setup() will try to locate
> dtb at the end of u-boot-spl.bin, by referencing to _image_binary_end.
> 
> However _image_binary_end is currently missing in u-boot-spl.lds.
> This patch adds _image_binary_end to u-boot-spl.lds to make sure linking
> u-boot-spl will not fail.
> 
> Reviewed-by: Daniel Schwierzeck 
> Signed-off-by: Weijie Gao 
> ---
> Changes since v2: none
> ---
>  arch/mips/cpu/u-boot-spl.lds | 2 ++
>  1 file changed, 2 insertions(+)
> 

applied to u-boot-mips, thanks.

-- 
- Daniel

Re: [PATCH v3 11/20] dts: mtmips: add alternative pinmux node for uart2

[Daniel Schwierzeck]

Am 21.01.20 um 09:19 schrieb Weijie Gao:
> This patch adds a new pinmux for UART2, which shares the pins with SPIS.
> 
> Signed-off-by: Weijie Gao 
> ---
> Changes since v2: new patch
> ---
>  arch/mips/dts/mt7628a.dtsi | 5 +
>  1 file changed, 5 insertions(+)
> 

applied to u-boot-mips, thanks.

-- 
- Daniel

Re: [PATCH v3 13/20] mips: add an option to enable u_boot_list section for SPL loaders in u-boot-spl.lds

[Daniel Schwierzeck]

Am 21.01.20 um 09:19 schrieb Weijie Gao:
> u_boot_list is not only used by DM, but also by some SPL image load methods
> such as spl_nor.c.
> 
> This patch adds an option CONFIG_SPL_LOADER_SUPPORT in conjunction with
> CONFIG_SPL_DM surrounding the u_boot_list section to make sure SPL image
> loaders can be correctly built into u-boot SPL without DM enabled.
> 
> Reviewed-by: Daniel Schwierzeck 
> Signed-off-by: Weijie Gao 
> ---
> Changes since v2: move SPL_LOADER_SUPPORT to arch/mips/Kconfig
> ---
>  arch/mips/Kconfig| 6 ++
>  arch/mips/cpu/u-boot-spl.lds | 2 +-
>  2 files changed, 7 insertions(+), 1 deletion(-)
> 

applied to u-boot-mips, thanks.

-- 
- Daniel

Please pull u-boot-video

[Anatolij Gustschin]

Hi Tom,

please pull a few fixes for v2020.04-rc1.

Travis-CI build logs with additional (already merged) patch:
https://travis-ci.org/vdsao/u-boot-video/builds/646159863

Thanks,
Anatolij

The following changes since commit d861183dc531b74479f92bf4c8de8ad60a0a0d56:

  Merge tag 'ti-v2020.04-rc2' of 
https://gitlab.denx.de/u-boot/custodians/u-boot-ti (2020-02-04 08:16:01 -0500)

are available in the Git repository at:

  https://gitlab.denx.de/u-boot/custodians/u-boot-video.git 
tags/fixes-for-v2020.04

for you to fetch changes up to 8382b1019283d2c1e9ba09cf0a10205deaf32fe1:

  video: mxsfb: call remove() when booting OS (2020-02-04 23:04:28 +0100)


- fix Coverity CID 280902 issue in vid_console_color()
- fix vid_console_color() build warning
- fix for mxsfb to ensure correct Linux logo position


Anatolij Gustschin (2):
  video: fix Coverity missing break issue
  video: mxsfb: call remove() when booting OS

 drivers/video/mxsfb.c |  2 +-
 drivers/video/vidconsole-uclass.c | 20 
 2 files changed, 13 insertions(+), 9 deletions(-)

[PATCH v2 0/7] cmd: env: add option for quiet output on env info

[Patrick Delaunay]

Hi,

It is a V2 after Wolfgang and Simon remarks for
"cmd: env: add option for quiet output on env info"
http://patchwork.ozlabs.org/project/uboot/list/?series=155122

I also add pytest for command env info.

Test for ENV_IS_IN_DEVICE will be include in future serie
(I will activate ENV_IS_IN_EXT4 support in sandbox)

To avoid compilation warning, I add prototype for
env_get_location for the patch 3/7
"cmd: env: check real location for env info command"
as it is done in
http://patchwork.ozlabs.org/patch/1230200/

Regards

Patrick


Changes in v2:
- update prototype in env_internal.h  as done in
  "env: add prototypes for weak function"
- remove comment change in env.c (implementation information)
- move env_location declaration
- activate CMD_NVEDIT_INFO in sandbox (new patch)
- activate env info command in sandbox (new)
- add pytest test_env_info and test_env_info_test (new)

Patrick Delaunay (7):
  cmd: env: add option for quiet output on env info
  cmd: env: use ENV_IS_IN_DEVICE in env info
  cmd: env: check real location for env info command
  stm32mp1: use the command env info in env_check
  stm32mp1: configs: activate CMD_ERASEENV
  configs: sandbox: Enable sub command 'env info'
  test: env: add test for env info sub-command

 arch/arm/mach-stm32mp/Kconfig   |  1 +
 cmd/Kconfig |  1 +
 cmd/nvedit.c| 39 +++--
 configs/sandbox64_defconfig |  1 +
 configs/sandbox_defconfig   |  1 +
 configs/sandbox_flattree_defconfig  |  1 +
 configs/sandbox_spl_defconfig   |  1 +
 configs/stm32mp15_basic_defconfig   |  1 +
 configs/stm32mp15_optee_defconfig   |  1 +
 configs/stm32mp15_trusted_defconfig |  1 +
 include/configs/stm32mp1.h  |  4 +--
 include/env_internal.h  | 11 
 test/py/tests/test_env.py   | 44 +
 13 files changed, 95 insertions(+), 12 deletions(-)

-- 
2.17.1

[PATCH v2 3/7] cmd: env: check real location for env info command

[Patrick Delaunay]

Check the current ENV location, dynamically provided by the weak
function env_get_location to be sure that the environment can be
persistent.

The compilation flag ENV_IS_IN_DEVICE is not enough when the board
dynamically select the available storage location (according boot
device for example).

This patch solves issue for stm32mp1 platform, when the boot device
is USB.

Signed-off-by: Patrick Delaunay 
---

Changes in v2:
- update prototype in env_internal.h  as done in
  "env: add prototypes for weak function"
- remove comment change in env.c (implementation information)
- move env_location declaration

 cmd/nvedit.c   | 15 ---
 include/env_internal.h | 11 +++
 2 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 3d1054e763..218fdfbc55 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -1228,6 +1228,9 @@ static int do_env_info(cmd_tbl_t *cmdtp, int flag,
int eval_flags = 0;
int eval_results = 0;
bool quiet = false;
+#if defined(CONFIG_CMD_SAVEENV) && defined(ENV_IS_IN_DEVICE)
+   enum env_location loc;
+#endif
 
/* display environment information */
if (argc <= 1)
@@ -1269,9 +1272,15 @@ static int do_env_info(cmd_tbl_t *cmdtp, int flag,
/* evaluate whether environment can be persisted */
if (eval_flags & ENV_INFO_IS_PERSISTED) {
 #if defined(CONFIG_CMD_SAVEENV) && defined(ENV_IS_IN_DEVICE)
-   if (!quiet)
-   printf("Environment can be persisted\n");
-   eval_results |= ENV_INFO_IS_PERSISTED;
+   loc = env_get_location(ENVOP_SAVE, gd->env_load_prio);
+   if (ENVL_NOWHERE != loc && ENVL_UNKNOWN != loc) {
+   if (!quiet)
+   printf("Environment can be persisted\n");
+   eval_results |= ENV_INFO_IS_PERSISTED;
+   } else {
+   if (!quiet)
+   printf("Environment cannot be persisted\n");
+   }
 #else
if (!quiet)
printf("Environment cannot be persisted\n");
diff --git a/include/env_internal.h b/include/env_internal.h
index 90a4df8a72..cfb60738d0 100644
--- a/include/env_internal.h
+++ b/include/env_internal.h
@@ -209,6 +209,17 @@ struct env_driver {
 
 extern struct hsearch_data env_htab;
 
+/**
+ * env_get_location()- Provide the best location for the U-Boot environment
+ *
+ * It is a weak function allowing board to overidde the environment location
+ *
+ * @op: operations performed on the environment
+ * @prio: priority between the multiple environments, 0 being the
+ *highest priority
+ * @return  an enum env_location value on success, or -ve error code.
+ */
+enum env_location env_get_location(enum env_operation op, int prio);
 #endif /* DO_DEPS_ONLY */
 
 #endif /* _ENV_INTERNAL_H_ */
-- 
2.17.1

[PATCH v2 7/7] test: env: add test for env info sub-command

[Patrick Delaunay]

Add a pytest for testing the env info sub-command:

test_env_info: test command with several option

test_env_info_test: test the result of the sub-commandi with quiet option,
'-q' as used for support in shell test; for example:
  if env info -p -d -q; then env save; fi

Signed-off-by: Patrick Delaunay 
---

Changes in v2:
- add pytest test_env_info and test_env_info_test (new)

 test/py/tests/test_env.py | 44 +++
 1 file changed, 44 insertions(+)

diff --git a/test/py/tests/test_env.py b/test/py/tests/test_env.py
index 6ff38f1020..7b78ec4e40 100644
--- a/test/py/tests/test_env.py
+++ b/test/py/tests/test_env.py
@@ -336,3 +336,47 @@ def test_env_import_whitelist_delete(state_test_env):
 unset_var(state_test_env, 'foo2')
 unset_var(state_test_env, 'foo3')
 unset_var(state_test_env, 'foo4')
+
+@pytest.mark.boardspec('sandbox')
+@pytest.mark.buildconfigspec('cmd_nvedit_info')
+def test_env_info(state_test_env):
+
+"""Test 'env info' command with several options.
+"""
+c = state_test_env.u_boot_console
+
+response = c.run_command('env info')
+assert 'env_valid = invalid' in response
+assert 'env_ready = true' in response
+assert 'env_use_default = true' in response
+
+response = c.run_command('env info -p -d')
+assert 'Default environment is used' in response
+assert 'Environment cannot be persisted' in response
+
+response = c.run_command('env info -p -d -q')
+assert response == ""
+
+@pytest.mark.boardspec('sandbox')
+@pytest.mark.buildconfigspec('cmd_nvedit_info')
+@pytest.mark.buildconfigspec('cmd_echo')
+def test_env_info_test(state_test_env):
+
+"""Test 'env info' quiet command result with several options for test.
+"""
+c = state_test_env.u_boot_console
+
+response = c.run_command('env info -d -q')
+assert response == ""
+response = c.run_command('echo $?')
+assert response == "0"
+
+response = c.run_command('env info -p -q')
+assert response == ""
+response = c.run_command('echo $?')
+assert response == "1"
+
+response = c.run_command('env info -d -p -q')
+assert response == ""
+response = c.run_command('echo $?')
+assert response == "1"
-- 
2.17.1

[PATCH v2 5/7] stm32mp1: configs: activate CMD_ERASEENV

[Patrick Delaunay]

Activate the command env erase to reset the environment with the command:
> env erase

it is simpler than:
> env default -a
> env save

Signed-off-by: Patrick Delaunay 
---

Changes in v2: None

 configs/stm32mp15_basic_defconfig   | 1 +
 configs/stm32mp15_optee_defconfig   | 1 +
 configs/stm32mp15_trusted_defconfig | 1 +
 3 files changed, 3 insertions(+)

diff --git a/configs/stm32mp15_basic_defconfig 
b/configs/stm32mp15_basic_defconfig
index f691306800..1fd23a 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -26,6 +26,7 @@ CONFIG_SYS_PROMPT="STM32MP> "
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_EXPORTENV is not set
 # CONFIG_CMD_IMPORTENV is not set
+CONFIG_CMD_ERASEENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_ADC=y
diff --git a/configs/stm32mp15_optee_defconfig 
b/configs/stm32mp15_optee_defconfig
index 521b24e2cb..c2006291f1 100644
--- a/configs/stm32mp15_optee_defconfig
+++ b/configs/stm32mp15_optee_defconfig
@@ -15,6 +15,7 @@ CONFIG_SYS_PROMPT="STM32MP> "
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_EXPORTENV is not set
 # CONFIG_CMD_IMPORTENV is not set
+CONFIG_CMD_ERASEENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_ADC=y
diff --git a/configs/stm32mp15_trusted_defconfig 
b/configs/stm32mp15_trusted_defconfig
index c8b328d01a..fc6e6a555e 100644
--- a/configs/stm32mp15_trusted_defconfig
+++ b/configs/stm32mp15_trusted_defconfig
@@ -14,6 +14,7 @@ CONFIG_SYS_PROMPT="STM32MP> "
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_EXPORTENV is not set
 # CONFIG_CMD_IMPORTENV is not set
+CONFIG_CMD_ERASEENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_ADC=y
-- 
2.17.1

[PATCH v2 1/7] cmd: env: add option for quiet output on env info

[Patrick Delaunay]

The "env info" can be use for test with -d and -p parameter,
in scripting case the output of the command is not needed.

This patch allows to deactivate this output with a new option "-q".

For example, we can save the environment if default
environment is used and persistent storage is managed with:
  if env info -p -d -q; then env save; fi

Without the quiet option, I have the unnecessary traces
First boot:
  Default environment is used
  Environment can be persisted
  Saving Environment to EXT4... File System is consistent

Next boot:
  Environment was loaded from persistent storage
  Environment can be persisted

Signed-off-by: Patrick Delaunay 
Reviewed-by: Simon Glass 
---

Changes in v2: None

 cmd/Kconfig  |  1 +
 cmd/nvedit.c | 26 +++---
 2 files changed, 20 insertions(+), 7 deletions(-)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index e6ba57035e..5c859199b6 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -591,6 +591,7 @@ config CMD_NVEDIT_INFO
  This command can be optionally used for evaluation in scripts:
  [-d] : evaluate whether default environment is used
  [-p] : evaluate whether environment can be persisted
+ [-q] : quiet output
  The result of multiple evaluations will be combined with AND.
 
 endmenu
diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 81d94cd193..aaa032cd96 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -1219,12 +1219,15 @@ static int print_env_info(void)
  * env info - display environment information
  * env info [-d] - evaluate whether default environment is used
  * env info [-p] - evaluate whether environment can be persisted
+ *  Add [-q] - quiet mode, use only for command result, for test by 
example:
+ * test env info -p -d -q
  */
 static int do_env_info(cmd_tbl_t *cmdtp, int flag,
   int argc, char * const argv[])
 {
int eval_flags = 0;
int eval_results = 0;
+   bool quiet = false;
 
/* display environment information */
if (argc <= 1)
@@ -1242,6 +1245,9 @@ static int do_env_info(cmd_tbl_t *cmdtp, int flag,
case 'p':
eval_flags |= ENV_INFO_IS_PERSISTED;
break;
+   case 'q':
+   quiet = true;
+   break;
default:
return CMD_RET_USAGE;
}
@@ -1251,20 +1257,24 @@ static int do_env_info(cmd_tbl_t *cmdtp, int flag,
/* evaluate whether default environment is used */
if (eval_flags & ENV_INFO_IS_DEFAULT) {
if (gd->flags & GD_FLG_ENV_DEFAULT) {
-   printf("Default environment is used\n");
+   if (!quiet)
+   printf("Default environment is used\n");
eval_results |= ENV_INFO_IS_DEFAULT;
} else {
-   printf("Environment was loaded from persistent 
storage\n");
+   if (!quiet)
+   printf("Environment was loaded from persistent 
storage\n");
}
}
 
/* evaluate whether environment can be persisted */
if (eval_flags & ENV_INFO_IS_PERSISTED) {
 #if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE)
-   printf("Environment can be persisted\n");
+   if (!quiet)
+   printf("Environment can be persisted\n");
eval_results |= ENV_INFO_IS_PERSISTED;
 #else
-   printf("Environment cannot be persisted\n");
+   if (!quiet)
+   printf("Environment cannot be persisted\n");
 #endif
}
 
@@ -1321,7 +1331,7 @@ static cmd_tbl_t cmd_env_sub[] = {
U_BOOT_CMD_MKENT(import, 5, 0, do_env_import, "", ""),
 #endif
 #if defined(CONFIG_CMD_NVEDIT_INFO)
-   U_BOOT_CMD_MKENT(info, 2, 0, do_env_info, "", ""),
+   U_BOOT_CMD_MKENT(info, 3, 0, do_env_info, "", ""),
 #endif
U_BOOT_CMD_MKENT(print, CONFIG_SYS_MAXARGS, 1, do_env_print, "", ""),
 #if defined(CONFIG_CMD_RUN)
@@ -1400,8 +1410,10 @@ static char env_help_text[] =
 #endif
 #if defined(CONFIG_CMD_NVEDIT_INFO)
"env info - display environment information\n"
-   "env info [-d] - whether default environment is used\n"
-   "env info [-p] - whether environment can be persisted\n"
+   "env info [-d] [-p] [-q] - evaluate environment information\n"
+   "  \"-d\": default environment is used\n"
+   "  \"-p\": environment can be persisted\n"
+   "  \"-q\": quiet output\n"
 #endif
"env print [-a | name ...] - print environment\n"
 #if defined(CONFIG_CMD_NVEDIT_EFI)
-- 
2.17.1

[PATCH v2 2/7] cmd: env: use ENV_IS_IN_DEVICE in env info

[Patrick Delaunay]

Use the define ENV_IS_IN_DEVICE to test if one the
CONFIG_ENV_IS_IN_...  is defined and correct the detection of
persistent storage support in the command "env info"
if CONFIG_ENV_IS_NOWHERE is activated.

Since commit 60d5ed2593c9 ("env: allow ENV_IS_NOWHERE with
other storage target") test CONFIG_ENV_IS_NOWHERE is not
enough; see also commit 953db29a1e9c6 ("env: enable saveenv
command when one CONFIG_ENV_IS_IN is activated").

This patch avoids issue for this command in stm32mp1 platform.

Signed-off-by: Patrick Delaunay 
Reviewed-by: Simon Glass 
---

Changes in v2: None

 cmd/nvedit.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index aaa032cd96..3d1054e763 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -1268,7 +1268,7 @@ static int do_env_info(cmd_tbl_t *cmdtp, int flag,
 
/* evaluate whether environment can be persisted */
if (eval_flags & ENV_INFO_IS_PERSISTED) {
-#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE)
+#if defined(CONFIG_CMD_SAVEENV) && defined(ENV_IS_IN_DEVICE)
if (!quiet)
printf("Environment can be persisted\n");
eval_results |= ENV_INFO_IS_PERSISTED;
-- 
2.17.1

[PATCH v2 4/7] stm32mp1: use the command env info in env_check

[Patrick Delaunay]

Activate CMD_NVEDIT_INFO and use the new command "env info -d -p -q"
to automatically save the environment on first boot.

This patch allows to remove the env_default variable.

Signed-off-by: Patrick Delaunay 
---

Changes in v2:
- activate CMD_NVEDIT_INFO in sandbox (new patch)

 arch/arm/mach-stm32mp/Kconfig | 1 +
 include/configs/stm32mp1.h| 4 +---
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index 137178aa45..63dc94f894 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -45,6 +45,7 @@ config STM32MP15x
select STM32_RESET
select STM32_SERIAL
select SYS_ARCH_TIMER
+   imply CMD_NVEDIT_INFO
imply SYSRESET_PSCI if STM32MP1_TRUSTED
imply SYSRESET_SYSCON if !STM32MP1_TRUSTED
help
diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h
index a66534e027..02d32f2040 100644
--- a/include/configs/stm32mp1.h
+++ b/include/configs/stm32mp1.h
@@ -218,9 +218,7 @@
"fdt_high=0x\0" \
"initrd_high=0x\0" \
"altbootcmd=run bootcmd\0" \
-   "env_default=1\0" \
-   "env_check=if test $env_default -eq 1;"\
-   " then env set env_default 0;env save;fi\0" \
+   "env_check=if env info -p -d -q; then env save; fi\0" \
STM32MP_BOOTCMD \
STM32MP_MTDPARTS \
STM32MP_DFU_ALT_RAM \
-- 
2.17.1

[PATCH v2 6/7] configs: sandbox: Enable sub command 'env info'

[Patrick Delaunay]

Enable support for sub command 'env info' in sandbox
with CONFIG_CMD_NVEDIT_INFO. This is aimed primarily
at adding unit test.

Signed-off-by: Patrick Delaunay 
---

Changes in v2:
- activate env info command in sandbox (new)

 configs/sandbox64_defconfig| 1 +
 configs/sandbox_defconfig  | 1 +
 configs/sandbox_flattree_defconfig | 1 +
 configs/sandbox_spl_defconfig  | 1 +
 4 files changed, 4 insertions(+)

diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index 941b1fd2c7..cdcb0acbdc 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_ENV_CALLBACK=y
 CONFIG_CMD_ENV_FLAGS=y
+CONFIG_CMD_NVEDIT_INFO=y
 CONFIG_LOOPW=y
 CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_MEMINFO=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 7b02b8de7c..33a103edab 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_ENV_CALLBACK=y
 CONFIG_CMD_ENV_FLAGS=y
+CONFIG_CMD_NVEDIT_INFO=y
 CONFIG_LOOPW=y
 CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_MEMINFO=y
diff --git a/configs/sandbox_flattree_defconfig 
b/configs/sandbox_flattree_defconfig
index 0049da3d48..2bfbb66453 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_ELF is not set
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_NVEDIT_INFO=y
 CONFIG_LOOPW=y
 CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_MEMINFO=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index f55692c2b5..3bf27c974a 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_ENV_CALLBACK=y
 CONFIG_CMD_ENV_FLAGS=y
+CONFIG_CMD_NVEDIT_INFO=y
 CONFIG_LOOPW=y
 CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_MEMINFO=y
-- 
2.17.1

Re: [PATCH v3 10/20] mips: mtmips: rewrite lowlevel codes of mt7628

[Daniel Schwierzeck]

Am 21.01.20 um 09:19 schrieb Weijie Gao:
> This patch rewrites the mtmips architecture with the following changes:
> 
> 1. Move MT7628 soc parts into a subfolder.
> 2. Lock parts of D-Cache as temporary stack.
> 3. Reimplement DDR initialization in C language.
> 4. Reimplement DDR calibration in a clear logic.
> 5. Add full support for auto size detection for DDR1 and DDR2.
> 6. Use accurate CPU clock depending on the input xtal frequency for timer
>and delay functions.
> 
> Note:
> 
> print_cpuinfo() has incompatible parts with MT7620 so it's moved into
> mt7628 subfolder.
> 
> Signed-off-by: Weijie Gao 
> ---
> Changes since v2: none
> ---
>  arch/mips/mach-mtmips/Kconfig |  69 +---
>  arch/mips/mach-mtmips/Makefile|   7 +-
>  arch/mips/mach-mtmips/cpu.c   |  58 +---
>  arch/mips/mach-mtmips/ddr_cal.c   | 211 +++
>  arch/mips/mach-mtmips/ddr_calibrate.c | 309 -
>  arch/mips/mach-mtmips/ddr_init.c  | 194 +++
>  arch/mips/mach-mtmips/include/mach/ddr.h  |  52 +++
>  arch/mips/mach-mtmips/include/mach/mc.h   | 180 ++
>  arch/mips/mach-mtmips/lowlevel_init.S | 328 --
>  arch/mips/mach-mtmips/mt7628/Makefile |   5 +
>  arch/mips/mach-mtmips/mt7628/ddr.c| 173 +
>  arch/mips/mach-mtmips/mt7628/init.c   | 109 ++
>  arch/mips/mach-mtmips/mt7628/lowlevel_init.S  | 161 +
>  arch/mips/mach-mtmips/mt7628/mt7628.h | 104 ++
>  arch/mips/mach-mtmips/mt76xx.h|  32 --
>  .../gardena-smart-gateway-mt7688_defconfig|   2 -
>  configs/linkit-smart-7688_defconfig   |   2 -
>  17 files changed, 1202 insertions(+), 794 deletions(-)
>  create mode 100644 arch/mips/mach-mtmips/ddr_cal.c
>  delete mode 100644 arch/mips/mach-mtmips/ddr_calibrate.c
>  create mode 100644 arch/mips/mach-mtmips/ddr_init.c
>  create mode 100644 arch/mips/mach-mtmips/include/mach/ddr.h
>  create mode 100644 arch/mips/mach-mtmips/include/mach/mc.h
>  delete mode 100644 arch/mips/mach-mtmips/lowlevel_init.S
>  create mode 100644 arch/mips/mach-mtmips/mt7628/Makefile
>  create mode 100644 arch/mips/mach-mtmips/mt7628/ddr.c
>  create mode 100644 arch/mips/mach-mtmips/mt7628/init.c
>  create mode 100644 arch/mips/mach-mtmips/mt7628/lowlevel_init.S
>  create mode 100644 arch/mips/mach-mtmips/mt7628/mt7628.h
>  delete mode 100644 arch/mips/mach-mtmips/mt76xx.h
> 

Reviewed-by: Daniel Schwierzeck 

-- 
- Daniel

Re: [GIT PULL] Pull request: u-boot-imx u-boot-imx-20200210

[Tom Rini]

On Mon, Feb 10, 2020 at 02:52:47PM +0100, Stefano Babic wrote:

> Hi Tom,
> 
> please pull from u-boot-imx, thanks !
> 
> The following changes since commit e1dff2d69e5a21a61c3eb28e5d230a6d48749b6c:
> 
>   Merge branch '2020-02-07-master-imports' (2020-02-07 19:04:23 -0500)
> 
> are available in the Git repository at:
> 
>   https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git
> tags/u-boot-imx-20200210
> 
> for you to fetch changes up to a19d73708fc017475e5635b4809b6b07c6a61afd:
> 
>   board: ge: bx50v3, imx53ppd: configure CONFIG_SYS_BOOTMAPSZ
> (2020-02-09 21:47:20 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH v1] dfu: Reset timeout in case of DFU request

[Andy Shevchenko]

On Thu, Jan 30, 2020 at 10:27:20AM +0100, Ferry Toth wrote:
> Op 29-01-2020 om 16:23 schreef Andy Shevchenko:
> > In case dfu command is being executed with timeout option,
> > the timer may expire in the middle of DFU operation. If there
> > is DFU request coming, we may simple reset timeout value
> > to prevent aborting of ongoing DFU operation.
> > 
> > Signed-off-by: Andy Shevchenko 
> > ---
> >   drivers/usb/gadget/f_dfu.c | 5 +
> >   1 file changed, 5 insertions(+)
> > 
> > diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c
> > index 6756155133..a4a57ba5f5 100644
> > --- a/drivers/usb/gadget/f_dfu.c
> > +++ b/drivers/usb/gadget/f_dfu.c
> > @@ -596,6 +596,11 @@ dfu_handle(struct usb_function *f, const struct 
> > usb_ctrlrequest *ctrl)
> > debug("req_type: 0x%x ctrl->bRequest: 0x%x f_dfu->dfu_state: 0x%x\n",
> >req_type, ctrl->bRequest, f_dfu->dfu_state);
> > +#ifdef CONFIG_DFU_TIMEOUT
> > +   /* Forbid aborting by timeout. Next dfu command may update this */
> > +   dfu_set_timeout(0);
> > +#endif
> > +
> > if (req_type == USB_TYPE_STANDARD) {
> > if (ctrl->bRequest == USB_REQ_GET_DESCRIPTOR &&
> > (w_value >> 8) == DFU_DT_FUNC) {
> > 
> Tested-by: Ferry Toth 

Thanks, Ferry!

Lukasz, can this be applied for 2020.04 release?

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v3 09/20] mips: add a option to support not reserving malloc space on initial stack

[Daniel Schwierzeck]

Am 21.01.20 um 09:18 schrieb Weijie Gao:
> The initial stack on some platforms is too small to hold a large malloc
> space. This patch adds a option to allow these platforms not reserving the
> malloc space on initial stack. These platforms should set the malloc base
> after DRAM is usable.
> 
> Signed-off-by: Weijie Gao 
> ---
> Changes since v2: none
> ---
>  arch/mips/Kconfig | 18 ++
>  arch/mips/cpu/start.S |  6 --
>  2 files changed, 22 insertions(+), 2 deletions(-)
> 

applied to u-boot-mips, thanks.

-- 
- Daniel

Re: [PATCH v3 08/20] mips: add a mtmips-specific field to architecture-specific global data

[Daniel Schwierzeck]

Am 21.01.20 um 09:18 schrieb Weijie Gao:
> SoCs of mtmips can use different CPU frequencies depending on the HW/SW
> configurations. For example mt7628 uses 580MHz clock if the input xtal
> frequency is 40MHz, and 575MHz clock if the xtal is 25MHz. Upon cold boot
> the CPU uses the xtal frequency directly.
> 
> So hardcoding the timer frequency (half of the CPU frequency) in
> CONFIG_SYS_MIPS_TIMER_FREQ is not a good idea for this case.
> 
> This patch adds a mtmips-specific field timer_freq to arch_global_data.
> This field will be used later in mtmips-specific get_tbclk() to provide
> accurate timer frequency in different boot stage.
> 
> Reviewed-by: Daniel Schwierzeck 
> Signed-off-by: Weijie Gao 
> ---
> Changes since v2: none
> ---
>  arch/mips/include/asm/global_data.h | 3 +++
>  1 file changed, 3 insertions(+)
> 

applied to u-boot-mips, thanks.

-- 
- Daniel

Re: [PATCH v3 07/20] configs: enable CONFIG_RESTORE_EXCEPTION_VECTOR_BASE for all mtmips boards

[Daniel Schwierzeck]

Am 21.01.20 um 09:18 schrieb Weijie Gao:
> This patch enables CONFIG_RESTORE_EXCEPTION_VECTOR_BASE for all mtmips
> boards.
> 
> Reviewed-by: Daniel Schwierzeck 
> Signed-off-by: Weijie Gao 
> ---
> Changes since v2: none
> ---
>  configs/gardena-smart-gateway-mt7688-ram_defconfig | 1 +
>  configs/gardena-smart-gateway-mt7688_defconfig | 1 +
>  configs/linkit-smart-7688-ram_defconfig| 1 +
>  configs/linkit-smart-7688_defconfig| 1 +
>  4 files changed, 4 insertions(+)
> 

applied to u-boot-mips, thanks.

-- 
- Daniel

Re: [PATCH v2] mx6sabresd: Convert ethernet to driver model

[Fabio Estevam]

On Mon, Feb 10, 2020 at 11:28 AM Alifer Moraes  wrote:
>
> Convert imx6sabresd ethernet to driver model to fix the following warning:
>
> = WARNING ==
> This board does not use CONFIG_DM_ETH (Driver Model
> for Ethernet drivers). Please update the board to use
> CONFIG_DM_ETH before the v2020.07 release. Failure to
> update by the deadline may result in board removal.
> See doc/driver-model/migration.rst for more info.
> 
>
> Signed-off-by: Alifer Moraes 

Reviewed-by: Fabio Estevam 

Re: [PATCH 10/11] arm: fdt: omap: update dts panel node

[Tom Rini]

On Mon, Feb 10, 2020 at 10:15:27AM -0500, Tom Rini wrote:
> On Mon, Feb 10, 2020 at 09:52:59AM +0530, Lokesh Vutla wrote:
> > 
> > 
> > On 10/02/20 12:17 AM, Dario Binacchi wrote:
> > > Add the "u-boot,dm-pre-reloc" property to the "ti,tilcdc,panel"
> > > compatible node. In this way the video-uclass module can allocate the
> > > amount of memory needed to be assigned to the frame buffer.
> > 
> > hmm..why do you need to add pre-reloc for allocating the memory? pre-reloc 
> > flag
> > is needed only when probing before relocation.
> > 
> > > 
> > > Signed-off-by: Dario Binacchi 
> > 
> > $subject should be : arm: dts: am335x:
> > 
> > > ---
> > > 
> > >  arch/arm/dts/am335x-brppt1-mmc.dts  | 2 ++
> > >  arch/arm/dts/am335x-brppt1-nand.dts | 2 ++
> > >  arch/arm/dts/am335x-brppt1-spi.dts  | 2 ++
> > >  arch/arm/dts/am335x-brsmarc1.dts| 1 +
> > >  arch/arm/dts/am335x-brxre1.dts  | 2 ++
> > >  arch/arm/dts/am335x-evm.dts | 1 +
> > >  arch/arm/dts/am335x-evmsk.dts   | 1 +
> > >  arch/arm/dts/am335x-guardian.dts| 1 +
> > >  arch/arm/dts/am335x-pdu001.dts  | 1 +
> > >  arch/arm/dts/am335x-pxm50.dts   | 1 +
> > >  arch/arm/dts/am335x-rut.dts | 1 +
> > >  arch/arm/dts/da850-evm.dts  | 1 +
> > >  12 files changed, 16 insertions(+)
> > > 
> > > diff --git a/arch/arm/dts/am335x-brppt1-mmc.dts 
> > > b/arch/arm/dts/am335x-brppt1-mmc.dts
> > > index 9be34d9da0..6f919711f0 100644
> > > --- a/arch/arm/dts/am335x-brppt1-mmc.dts
> > > +++ b/arch/arm/dts/am335x-brppt1-mmc.dts
> > > @@ -53,6 +53,8 @@
> > >   bkl-pwm = <>;
> > >   bkl-tps = <_bl>;
> > >  
> > > + u-boot,dm-pre-reloc;
> > 
> > This is u-boot specific dt flag. Please use it under *-u-boot.dtsi file.
> 
> Note that these boards don't support Linux (VxWorks only) and as such we
> allow the u-boot, nodes here.

To clarify (after an off-list ping), I'm referring to the am335x-br*
boards only here.

-- 
Tom


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Re: [PATCH v3 05/20] sysreset: add reset controller based reboot driver

[Bin Meng]

Hi,

On Mon, Feb 10, 2020 at 11:40 PM Daniel Schwierzeck
 wrote:
>
>
>
> Am 21.01.20 um 09:18 schrieb Weijie Gao:
> > Some chips provide their sysreset function in reset controller, which is
> > normally a bit written to 1 to perform the sysreset.
> >
> > This patch adds a new sysreset driver to take advantage of it.
> >
> > Reviewed-by: Daniel Schwierzeck 
> > Reviewed-by: Simon Glass 
> > Signed-off-by: Weijie Gao 
> > ---
> > Changes since v2: none
> > ---
> >  drivers/sysreset/Kconfig |  6 
> >  drivers/sysreset/Makefile|  1 +
> >  drivers/sysreset/sysreset_resetctl.c | 48 
> >  3 files changed, 55 insertions(+)
> >  create mode 100644 drivers/sysreset/sysreset_resetctl.c
> >
>
> applied to u-boot-mips, thanks.

Sorry I might be late, but by looking at the compatible string, I did
not find any in the Linux kernel DT bindings.

Is this a chipset-specific driver, or generic driver?

Regards,
Bin

Re: [PATCH v3 06/20] mips: mtmips: make use of sysreset-resetctrl for mt7628 soc

[Daniel Schwierzeck]

Am 21.01.20 um 09:18 schrieb Weijie Gao:
> This patch replaces sysreset-syscon with sysreset-resetctrl for mt7628 soc.
> 
> Reviewed-by: Daniel Schwierzeck 
> Signed-off-by: Weijie Gao 
> ---
> Changes since v2: none
> ---
>  arch/mips/dts/mt7628a.dtsi | 10 +-
>  arch/mips/mach-mtmips/Kconfig  |  1 +
>  configs/gardena-smart-gateway-mt7688-ram_defconfig |  1 -
>  configs/gardena-smart-gateway-mt7688_defconfig |  1 -
>  configs/linkit-smart-7688-ram_defconfig|  1 -
>  configs/linkit-smart-7688_defconfig|  1 -
>  6 files changed, 6 insertions(+), 9 deletions(-)
> 

applied to u-boot-mips, thanks.

-- 
- Daniel

Re: [PATCH v3 05/20] sysreset: add reset controller based reboot driver

[Daniel Schwierzeck]

Am 21.01.20 um 09:18 schrieb Weijie Gao:
> Some chips provide their sysreset function in reset controller, which is
> normally a bit written to 1 to perform the sysreset.
> 
> This patch adds a new sysreset driver to take advantage of it.
> 
> Reviewed-by: Daniel Schwierzeck 
> Reviewed-by: Simon Glass 
> Signed-off-by: Weijie Gao 
> ---
> Changes since v2: none
> ---
>  drivers/sysreset/Kconfig |  6 
>  drivers/sysreset/Makefile|  1 +
>  drivers/sysreset/sysreset_resetctl.c | 48 
>  3 files changed, 55 insertions(+)
>  create mode 100644 drivers/sysreset/sysreset_resetctl.c
> 

applied to u-boot-mips, thanks.

-- 
- Daniel

Re: [PATCH v3 04/20] mips: start.S: avoid overwriting outside gd when clearing global data in stack

[Daniel Schwierzeck]

Am 21.01.20 um 09:18 schrieb Weijie Gao:
> When setting up initial stack, global data will also be put in the stack,
> and being cleared.
> 
> The assembler instructions for clearing gd is as follows:
> 
>   movet0, k0
> 1:
>   PTR_S   zero, 0(t0)
>   blt t0, t1, 1b
>PTR_ADDIU t0, PTRSIZE
> 
> t0 is the start address of gd, t1 is the end address of gd (t0 + GD_SIZE).
> 
> [PTR_ADDIU t0, PTRSIZE] is in the delay slot of [blt t0, t1, 1b], so it
> will be executed before the branch operation.
> 
> However the comparison for the BLT instruction is done before executing the
> delay slot. This means when the last word just before k1 is cleared, the
> loop will continue to run once. This will clear an extra word at k1, which
> is outside the global data.
> 
> Global data is placed at the top of the stack. If the initial stack is a
> SRAM or locked cache, the area outside them may be inaccessible. A write
> operation performed in this area may cause an exception.
> 
> To solve this, [PTR_ADDIU t0, PTRSIZE] should be placed before the BLT
> instruction.
> 
> Reviewed-by: Daniel Schwierzeck 
> Reviewed-by: Stefan Roese 
> Signed-off-by: Weijie Gao 
> ---
> Changes since v2: none
> ---
>  arch/mips/cpu/start.S | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 

applied to u-boot-mips, thanks.

-- 
- Daniel

Re: [PATCH 020/108] acpi: Add a method to write tables for a device

[Bin Meng]

Hi Simon,

On Mon, Jan 27, 2020 at 1:08 PM Simon Glass  wrote:
>
> A device may want to write out ACPI tables to describe itself to Linux.
> Add a method to permit this.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/sandbox/dts/test.dts |  4 
>  drivers/core/acpi.c   | 33 ++
>  include/acpi_table.h  |  1 +
>  include/dm/acpi.h | 30 +++
>  test/dm/acpi.c| 43 +++
>  5 files changed, 111 insertions(+)
>
> diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
> index 34dc7fda98..82208de5a8 100644
> --- a/arch/sandbox/dts/test.dts
> +++ b/arch/sandbox/dts/test.dts
> @@ -210,6 +210,10 @@
> compatible = "denx,u-boot-acpi-test";
> };
>
> +   acpi-test2 {
> +   compatible = "denx,u-boot-acpi-test";
> +   };
> +
> clocks {
> clk_fixed: clk-fixed {
> compatible = "fixed-clock";
> diff --git a/drivers/core/acpi.c b/drivers/core/acpi.c
> index 45542199f5..f748aa3f33 100644
> --- a/drivers/core/acpi.c
> +++ b/drivers/core/acpi.c
> @@ -30,3 +30,36 @@ int acpi_get_name(const struct udevice *dev, char 
> *out_name)
>
> return -ENOSYS;
>  }
> +
> +int _acpi_write_dev_tables(struct acpi_ctx *ctx, const struct udevice 
> *parent)

Is this supposed to a public API? Otherwise we have to use static.

nits: to align with the signature of aops->write_tables(), can we
exchange the parameter order to have parent come first?

> +{
> +   struct acpi_ops *aops;
> +   struct udevice *dev;
> +   int ret;
> +
> +   aops = device_get_acpi_ops(parent);
> +   if (aops && aops->write_tables) {
> +   log_debug("- %s\n", parent->name);
> +   ret = aops->write_tables(parent, ctx);
> +   if (ret)
> +   return ret;
> +   }
> +   device_foreach_child(dev, parent) {
> +   ret = _acpi_write_dev_tables(ctx, dev);
> +   if (ret)
> +   return ret;
> +   }
> +
> +   return 0;
> +}
> +
> +int acpi_write_dev_tables(struct acpi_ctx *ctx)
> +{
> +   int ret;
> +
> +   log_debug("Writing device tables\n");
> +   ret = _acpi_write_dev_tables(ctx, dm_root());
> +   log_debug("Writing finished, err=%d\n", ret);
> +
> +   return ret;
> +}
> diff --git a/include/acpi_table.h b/include/acpi_table.h
> index 9904e421c3..20b8904fe7 100644
> --- a/include/acpi_table.h
> +++ b/include/acpi_table.h
> @@ -17,6 +17,7 @@
>  #define OEM_ID "U-BOOT"/* U-Boot */
>  #define OEM_TABLE_ID   "U-BOOTBL"  /* U-Boot Table */
>  #define ASLC_ID"INTL"  /* Intel ASL Compiler 
> */
> +#define ACPI_TABLE_CREATOR OEM_TABLE_ID

This macro is not used in this patch. Probably need to move it to the
commit where it gets used.

>
>  #define ACPI_RSDP_REV_ACPI_1_0 0
>  #define ACPI_RSDP_REV_ACPI_2_0 2
> diff --git a/include/dm/acpi.h b/include/dm/acpi.h
> index 8d6c3fd424..dcfcf5c347 100644
> --- a/include/dm/acpi.h
> +++ b/include/dm/acpi.h
> @@ -24,6 +24,17 @@
>
>  #if !defined(__ACPI__)
>
> +/**
> + * struct acpi_ctx - Context used for writing ACPI tables
> + *
> + * This contains a few useful pieces of information used when writing
> + *
> + * @current: Current address for writing
> + */
> +struct acpi_ctx {
> +   void *current;
> +};
> +
>  /**
>   * struct acpi_ops - ACPI operations supported by driver model
>   */
> @@ -38,6 +49,15 @@ struct acpi_ops {
>  *  other error
>  */
> int (*get_name)(const struct udevice *dev, char *out_name);
> +
> +   /**
> +* write_tables() - Write out any tables required by this device
> +*
> +* @dev: Device to write
> +* @ctx: ACPI context to use
> +* @return 0 if OK, -ve on error
> +*/
> +   int (*write_tables)(const struct udevice *dev, struct acpi_ctx *ctx);
>  };
>
>  #define device_get_acpi_ops(dev)   ((dev)->driver->acpi_ops)
> @@ -72,6 +92,16 @@ int acpi_get_name(const struct udevice *dev, char 
> *out_name);
>   */
>  int acpi_return_name(char *out_name, const char *name);
>
> +/**
> + * acpi_write_dev_tables() - Write ACPI tables required by devices
> + *
> + * This scans through all devices and tells them to write any tables they 
> want
> + * to write.
> + *
> + * @return 0 if OK, -ve if any device returned an error
> + */
> +int acpi_write_dev_tables(struct acpi_ctx *ctx);
> +
>  #endif /* __ACPI__ */
>
>  #endif
> diff --git a/test/dm/acpi.c b/test/dm/acpi.c
> index e28ebf4f90..b87fbd16b0 100644
> --- a/test/dm/acpi.c
> +++ b/test/dm/acpi.c
> @@ -15,6 +15,19 @@
>  #include 
>
>  #define ACPI_TEST_DEV_NAME "ABCD"
> +#define BUF_SIZE   4096
> +
> +static int testacpi_write_tables(const struct udevice *dev,
> +struct acpi_ctx *ctx)
> +{
> +   struct 

Re: [PATCH 016/108] acpi: Add an __ACPI__ preprocessor symbol

[Bin Meng]

On Mon, Jan 27, 2020 at 1:08 PM Simon Glass  wrote:
>
> The ASL compiler cannot handle C structures and the like so needs some
> sort of header guard around these.
>
> We already have an __ASSEMBLY__ #define but it seems best to create a new
> one for ACPI since the rules may be different.
>
> Add the check to a few files that ACPI always includes.
>
> Signed-off-by: Simon Glass 
> ---
>
>  include/acpi_table.h | 4 
>  include/dm/acpi.h| 4 
>  scripts/Makefile.lib | 4 ++--
>  3 files changed, 10 insertions(+), 2 deletions(-)
>

Reviewed-by: Bin Meng 

Re: [PATCH 019/108] acpi: Move acpi_fill_header() to generic code

[Bin Meng]

On Mon, Jan 27, 2020 at 1:08 PM Simon Glass  wrote:
>
> This function needs to be used by sandbox for tests. Move it into the
> generic directory.
>
> Signed-off-by: Simon Glass 
> ---
>
>  include/acpi_table.h  | 10 ++
>  lib/acpi/acpi_table.c | 10 ++
>  test/dm/acpi.c| 28 
>  3 files changed, 48 insertions(+)
>

Reviewed-by: Bin Meng 

Re: [PATCH 017/108] acpi: Add a central location for table version numbers

[Bin Meng]

Hi Simon,

On Mon, Jan 27, 2020 at 1:08 PM Simon Glass  wrote:
>
> Each ACPI table has its own version number. Add the version numbers in a
> single function so we can keep them consistent and easily see what
> versions are supported.
>
> Start a new acpi_table file in a generic directory to house this function.
> We can move things over to this file from x86 as needed.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/sandbox/include/asm/acpi_table.h |  9 
>  include/acpi_table.h  | 53 
>  lib/Makefile  |  1 +
>  lib/acpi/Makefile |  4 ++
>  lib/acpi/acpi_table.c | 59 +++
>  test/dm/acpi.c| 14 +++
>  6 files changed, 140 insertions(+)
>  create mode 100644 arch/sandbox/include/asm/acpi_table.h
>  create mode 100644 lib/acpi/Makefile
>  create mode 100644 lib/acpi/acpi_table.c
>
> diff --git a/arch/sandbox/include/asm/acpi_table.h 
> b/arch/sandbox/include/asm/acpi_table.h
> new file mode 100644
> index 00..921c7f4201
> --- /dev/null
> +++ b/arch/sandbox/include/asm/acpi_table.h
> @@ -0,0 +1,9 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright 2019 Google LLC
> + */
> +
> +#ifndef __ASM_ACPI_TABLE_H__
> +#define __ASM_ACPI_TABLE_H__
> +
> +#endif /* __ASM_ACPI_TABLE_H__ */

I suspect this file should be added in patch [014/108] acpi: Add a
simple sandbox test, otherwise patch [014/108] cannot be built.

> diff --git a/include/acpi_table.h b/include/acpi_table.h
> index dd74895813..91496ac047 100644
> --- a/include/acpi_table.h
> +++ b/include/acpi_table.h
> @@ -202,6 +202,18 @@ struct __packed acpi_fadt {
> struct acpi_gen_regaddr x_gpe1_blk;
>  };
>
> +/* FADT TABLE Revision values */
> +#define ACPI_FADT_REV_ACPI_1_0 1
> +#define ACPI_FADT_REV_ACPI_2_0 3
> +#define ACPI_FADT_REV_ACPI_3_0 4
> +#define ACPI_FADT_REV_ACPI_4_0 4
> +#define ACPI_FADT_REV_ACPI_5_0 5
> +#define ACPI_FADT_REV_ACPI_6_0 6
> +
> +/* IVRS Revision Field */
> +#define IVRS_FORMAT_FIXED  0x01/* Type 10h & 11h only */
> +#define IVRS_FORMAT_MIXED  0x02/* Type 10h, 11h, & 40h */
> +
>  /* FACS flags */
>  #define ACPI_FACS_S4BIOS_F BIT(0)
>  #define ACPI_FACS_64BIT_WAKE_F BIT(1)
> @@ -391,6 +403,47 @@ struct __packed acpi_spcr {
> u32 reserved2;
>  };
>
> +/* Tables defined by ACPI and generated by U-Boot */
> +enum acpi_tables {
> +   ACPITAB_BERT,
> +   ACPITAB_DBG2,
> +   ACPITAB_DMAR,
> +   ACPITAB_DSDT,
> +   ACPITAB_FACS,
> +   ACPITAB_FADT,
> +   ACPITAB_HEST,
> +   ACPITAB_HPET,
> +   ACPITAB_IVRS,
> +   ACPITAB_MADT,
> +   ACPITAB_MCFG,
> +   ACPITAB_RSDP,
> +   ACPITAB_RSDT,
> +   ACPITAB_SLIT,
> +   ACPITAB_SRAT,
> +   ACPITAB_SSDT,
> +   ACPITAB_TCPA,
> +   ACPITAB_TPM2,
> +   ACPITAB_XSDT,
> +   ACPITAB_ECDT,
> +
> +   /* Additional proprietary tables */
> +   ACPITAB_VFCT,
> +   ACPITAB_NHLT,
> +   ACPITAB_SPMI,
> +
> +   ACPITAB_COUNT,
> +};
> +
> +/**
> + * acpi_get_table_revision() - Get the revision number generated for a table
> + *
> + * This keeps the version-number information in one place
> + *
> + * @table: ACPI table to check
> + * @return version number that U-Boot generates
> + */
> +int acpi_get_table_revision(enum acpi_tables table);
> +
>  #endif /* !__ACPI__*/
>
>  #include 
> diff --git a/lib/Makefile b/lib/Makefile
> index e82e32dfe9..46fe03003d 100644
> --- a/lib/Makefile
> +++ b/lib/Makefile
> @@ -5,6 +5,7 @@
>
>  ifndef CONFIG_SPL_BUILD
>
> +obj-$(CONFIG_$(SPL_TPL_)ACPIGEN) += acpi/
>  obj-$(CONFIG_EFI) += efi/
>  obj-$(CONFIG_EFI_LOADER) += efi_driver/
>  obj-$(CONFIG_EFI_LOADER) += efi_loader/
> diff --git a/lib/acpi/Makefile b/lib/acpi/Makefile
> new file mode 100644
> index 00..660491ef71
> --- /dev/null
> +++ b/lib/acpi/Makefile
> @@ -0,0 +1,4 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +obj-y += acpi_table.o
> diff --git a/lib/acpi/acpi_table.c b/lib/acpi/acpi_table.c
> new file mode 100644
> index 00..971191f428
> --- /dev/null
> +++ b/lib/acpi/acpi_table.c
> @@ -0,0 +1,59 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Tests for ACPI table generation
> + *
> + * Copyright 2019 Google LLC
> + */
> +
> +#include 
> +#include 
> +
> +int acpi_get_table_revision(enum acpi_tables table)
> +{
> +   switch (table) {
> +   case ACPITAB_FADT:
> +   return ACPI_FADT_REV_ACPI_3_0;
> +   case ACPITAB_MADT: /* ACPI 3.0: 2, ACPI 4.0/5.0: 3, ACPI 6.2b/6.3: 5 
> */
> +   return 2;

Why magic number of 2? In the FADT case ACPI_FADT_REV_ACPI_3_0 is used.

> +   case ACPITAB_MCFG:
> +   return 1;

ditto

> +   case ACPITAB_TCPA:
> +   return 2;
> +   case ACPITAB_TPM2:
> +   return 4;
> +   case ACPITAB_SSDT: /* ACPI 3.0 

Re: [PATCH 018/108] acpi: Add support for DMAR

[Bin Meng]

Hi Simon,

On Mon, Jan 27, 2020 at 1:08 PM Simon Glass  wrote:
>
> The DMA Remapping Reporting (DMAR) table contains information about DMA
> remapping.
>
> Add a version simple version of this table with only the minimum fields
> filled out. i.e. no entries.
>
> Signed-off-by: Simon Glass 
> ---
>
>  include/acpi_table.h  | 57 +++
>  lib/acpi/acpi_table.c | 26 
>  test/dm/acpi.c| 14 +++
>  3 files changed, 97 insertions(+)
>
> diff --git a/include/acpi_table.h b/include/acpi_table.h
> index 91496ac047..d5a9e1c96f 100644
> --- a/include/acpi_table.h
> +++ b/include/acpi_table.h
> @@ -21,6 +21,9 @@
>  #define ACPI_RSDP_REV_ACPI_1_0 0
>  #define ACPI_RSDP_REV_ACPI_2_0 2
>
> +/* TODO(s...@chromium.org): Figure out how to get compiler revision */
> +#define ASL_REVISION   0
> +
>  #if !defined(__ACPI__)
>
>  /*
> @@ -352,6 +355,51 @@ struct acpi_csrt_shared_info {
> u32 max_block_size;
>  };
>
> +enum dmar_type {
> +   DMAR_DRHD = 0,
> +   DMAR_RMRR = 1,
> +   DMAR_ATSR = 2,
> +   DMAR_RHSA = 3,
> +   DMAR_ANDD = 4
> +};
> +
> +enum {
> +   DRHD_INCLUDE_PCI_ALL = 1
> +};
> +
> +enum dmar_flags {
> +   DMAR_INTR_REMAP = 1 << 0,
> +   DMAR_X2APIC_OPT_OUT = 1 << 1,
> +   DMA_CTRL_PLATFORM_OPT_IN_FLAG   = 1 << 2,
> +};
> +
> +struct __packed dmar_entry {

__packed is not necessary.

> +   u16 type;
> +   u16 length;
> +   u8 flags;
> +   u8 reserved;
> +   u16 segment;
> +   u64 bar;
> +};
> +
> +struct __packed dmar_rmrr_entry {

__packed is not necessary.

> +   u16 type;
> +   u16 length;
> +   u16 reserved;
> +   u16 segment;
> +   u64 bar;
> +   u64 limit;
> +};
> +
> +/* DMAR (DMA Remapping Reporting Structure) */
> +struct acpi_dmar {
> +   struct acpi_table_header header;
> +   u8 host_address_width;
> +   u8 flags;
> +   u8 reserved[10];
> +   struct dmar_entry structure[0];
> +} __packed;

nits: put __packed after struct

> +
>  /* DBG2 definitions are partially used for SPCR interface_type */
>
>  /* Types for port_type field */
> @@ -444,6 +492,15 @@ enum acpi_tables {
>   */
>  int acpi_get_table_revision(enum acpi_tables table);
>
> +/**
> + * acpi_create_dmar() - Create a DMA Remapping Reporting (DMAR) table
> + *
> + * @dmar: Place to put the table
> + * @flags: DMAR flags to use
> + * @return 0 if OK, -ve on error
> + */
> +int acpi_create_dmar(struct acpi_dmar *dmar, enum dmar_flags flags);
> +
>  #endif /* !__ACPI__*/
>
>  #include 
> diff --git a/lib/acpi/acpi_table.c b/lib/acpi/acpi_table.c
> index 971191f428..85147ac61a 100644
> --- a/lib/acpi/acpi_table.c
> +++ b/lib/acpi/acpi_table.c
> @@ -6,7 +6,33 @@
>   */
>
>  #include 
> +#include 
>  #include 
> +#include 
> +
> +int acpi_create_dmar(struct acpi_dmar *dmar, enum dmar_flags flags)
> +{
> +   struct acpi_table_header *header = >header;
> +   struct cpu_info info;
> +   struct udevice *cpu;
> +   int ret;
> +
> +   ret = uclass_first_device(UCLASS_CPU, );
> +   if (ret)
> +   return log_msg_ret("cpu", ret);
> +   ret = cpu_get_info(cpu, );
> +   memset((void *)dmar, 0, sizeof(struct acpi_dmar));
> +
> +   /* Fill out header fields. */
> +   acpi_fill_header(>header, "DMAR");
> +   header->length = sizeof(struct acpi_dmar);
> +   header->revision = acpi_get_table_revision(ACPITAB_DMAR);
> +
> +   dmar->host_address_width = info.address_width - 1;
> +   dmar->flags = flags;
> +
> +   return 0;
> +}
>
>  int acpi_get_table_revision(enum acpi_tables table)
>  {
> diff --git a/test/dm/acpi.c b/test/dm/acpi.c
> index e65295b7ca..2737896643 100644
> --- a/test/dm/acpi.c
> +++ b/test/dm/acpi.c
> @@ -67,3 +67,17 @@ static int dm_test_acpi_get_table_revision(struct 
> unit_test_state *uts)
>  }
>  DM_TEST(dm_test_acpi_get_table_revision,
> DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
> +
> +/* Test acpi_create_dmar() */
> +static int dm_test_acpi_create_dmar(struct unit_test_state *uts)
> +{
> +   struct acpi_dmar dmar;
> +
> +   ut_assertok(acpi_create_dmar(, DMAR_INTR_REMAP));
> +   ut_asserteq(DMAR_INTR_REMAP, dmar.flags);
> +   ut_asserteq(DMAR_INTR_REMAP, dmar.flags);
> +   ut_asserteq(32 - 1, dmar.host_address_width);
> +
> +   return 0;
> +}
> +DM_TEST(dm_test_acpi_create_dmar, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
> --

Other than above,
Reviewed-by: Bin Meng 

Regards,
Bin

Re: [PATCH v3 03/20] mips: add an option to support initialize SRAM for initial stack

[Daniel Schwierzeck]

Am 21.01.20 um 09:18 schrieb Weijie Gao:
> Currently CONFIG_MIPS_INIT_STACK_IN_SRAM assumes the memory space for the
> initial stack can be used directly. However on some platform the SRAM needs
> initialization, e.g. lock cache.
> 
> This patch adds an option to allow a new function mips_sram_init() being
> called before setup_stack_gd.
> 
> Reviewed-by: Daniel Schwierzeck 
> Reviewed-by: Stefan Roese 
> Signed-off-by: Weijie Gao 
> ---
> Changes since v2: none
> ---
>  arch/mips/Kconfig | 9 +
>  arch/mips/cpu/start.S | 7 +++
>  2 files changed, 16 insertions(+)
> 

applied to u-boot-mips, thanks.

-- 
- Daniel

Re: [PATCH v3 02/20] mips: mtmips: add predefined i-cache/d-cache size and linesize

[Daniel Schwierzeck]

Am 21.01.20 um 09:18 schrieb Weijie Gao:
> Both mt7620 and mt7628 has the same cache configuration. There is no need
> to use CONFIG_SYS_CACHE_SIZE_AUTO to probe it at runtime.
> 
> Add them into Kconfig to reduce some code size.
> 
> Reviewed-by: Stefan Roese 
> Signed-off-by: Weijie Gao 
> ---
> Changes since v2: none
> ---
>  arch/mips/mach-mtmips/Kconfig | 12 
>  1 file changed, 12 insertions(+)
> 

applied to u-boot-mips, thanks.

-- 
- Daniel

Re: [PATCH 10/11] arm: fdt: omap: update dts panel node

[Tom Rini]

On Mon, Feb 10, 2020 at 09:52:59AM +0530, Lokesh Vutla wrote:
> 
> 
> On 10/02/20 12:17 AM, Dario Binacchi wrote:
> > Add the "u-boot,dm-pre-reloc" property to the "ti,tilcdc,panel"
> > compatible node. In this way the video-uclass module can allocate the
> > amount of memory needed to be assigned to the frame buffer.
> 
> hmm..why do you need to add pre-reloc for allocating the memory? pre-reloc 
> flag
> is needed only when probing before relocation.
> 
> > 
> > Signed-off-by: Dario Binacchi 
> 
> $subject should be : arm: dts: am335x:
> 
> > ---
> > 
> >  arch/arm/dts/am335x-brppt1-mmc.dts  | 2 ++
> >  arch/arm/dts/am335x-brppt1-nand.dts | 2 ++
> >  arch/arm/dts/am335x-brppt1-spi.dts  | 2 ++
> >  arch/arm/dts/am335x-brsmarc1.dts| 1 +
> >  arch/arm/dts/am335x-brxre1.dts  | 2 ++
> >  arch/arm/dts/am335x-evm.dts | 1 +
> >  arch/arm/dts/am335x-evmsk.dts   | 1 +
> >  arch/arm/dts/am335x-guardian.dts| 1 +
> >  arch/arm/dts/am335x-pdu001.dts  | 1 +
> >  arch/arm/dts/am335x-pxm50.dts   | 1 +
> >  arch/arm/dts/am335x-rut.dts | 1 +
> >  arch/arm/dts/da850-evm.dts  | 1 +
> >  12 files changed, 16 insertions(+)
> > 
> > diff --git a/arch/arm/dts/am335x-brppt1-mmc.dts 
> > b/arch/arm/dts/am335x-brppt1-mmc.dts
> > index 9be34d9da0..6f919711f0 100644
> > --- a/arch/arm/dts/am335x-brppt1-mmc.dts
> > +++ b/arch/arm/dts/am335x-brppt1-mmc.dts
> > @@ -53,6 +53,8 @@
> > bkl-pwm = <>;
> > bkl-tps = <_bl>;
> >  
> > +   u-boot,dm-pre-reloc;
> 
> This is u-boot specific dt flag. Please use it under *-u-boot.dtsi file.

Note that these boards don't support Linux (VxWorks only) and as such we
allow the u-boot, nodes here.

-- 
Tom


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Re: [PATCH v3 01/20] mips: add support to restore exception vector base before booting linux

[Daniel Schwierzeck]

Am 21.01.20 um 09:18 schrieb Weijie Gao:
> In U-Boot the exception vector base will be moved to top of memory, to be
> used to display register dump when exception occurs.
> 
> But some old linux kernel does not honor the base set in CP0_EBASE. A
> modified exception vector base will cause kernel crash.
> 
> This patch adds an option to enable reset exception vector base to its
> previous value, or a user configured value before booting linux kernel.
> 
> Signed-off-by: Weijie Gao 
> ---
> Changes since v2: none
> ---
>  arch/mips/Kconfig   | 30 +
>  arch/mips/include/asm/u-boot-mips.h |  2 ++
>  arch/mips/lib/bootm.c   |  3 +++
>  arch/mips/lib/traps.c   | 19 ++
>  4 files changed, 54 insertions(+)
> 

applied to u-boot-mips, thanks.

-- 
- Daniel

Re: [PATCH v3 01/20] mips: add support to restore exception vector base before booting linux

[Daniel Schwierzeck]

Am 21.01.20 um 09:18 schrieb Weijie Gao:
> In U-Boot the exception vector base will be moved to top of memory, to be
> used to display register dump when exception occurs.
> 
> But some old linux kernel does not honor the base set in CP0_EBASE. A
> modified exception vector base will cause kernel crash.
> 
> This patch adds an option to enable reset exception vector base to its
> previous value, or a user configured value before booting linux kernel.
> 
> Signed-off-by: Weijie Gao 
> ---
> Changes since v2: none
> ---
>  arch/mips/Kconfig   | 30 +
>  arch/mips/include/asm/u-boot-mips.h |  2 ++
>  arch/mips/lib/bootm.c   |  3 +++
>  arch/mips/lib/traps.c   | 19 ++
>  4 files changed, 54 insertions(+)
> 

Reviewed-by: Daniel Schwierzeck 

-- 
- Daniel

Re: [PATCH] stm32mp1: remove fdt_high and initrd_high in environment

[Tom Rini]

On Mon, Feb 10, 2020 at 11:54:11AM +0100, Patrick Delaunay wrote:

> Remove fdt_high and initrd_high (set to 0x) in stm32mp1 board
> enviromnent, and U-Boot always relocate FDT and initrd in bootm command.
> 
> This relocation is limited by CONFIG_SYS_BOOTMAPSZ which indicates
> the size of the memory region where it is safe to place data passed
> to the Linux kernel (DTB, initrd), it is
> a) Less than or equal to RAM size.
> b) not within the kernel's highmem region
> 
> So 256M seems large enough in most circumstances and users
> can override this value via environment variable "bootm_mapsize"
> if needed.
> 
> This modification increases the boot time but avoid assumption
> on aligned address for bootm command.
> 
> A user can still define this variables themselves if the FDT or
> initrd is either left in-place or copied to a specific location.
> 
> Signed-off-by: Patrick Delaunay 

Reviewed-by: Tom Rini 

-- 
Tom


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Re: [PATCH] mips: vcoreiii: Fix cache coherency issues

[Daniel Schwierzeck]

Am 06.02.20 um 10:45 schrieb Lars Povlsen:
> This patch fixes an stability issue seen on some vcoreiii targets,
> which was root caused to a cache inconsistency situation.
> 
> The inconsistency was caused by having kuseg pointing to NOR area but
> used as a stack/gd/heap area during initialization, while only
> relatively late remapping the RAM area into kuseg position.
> 
> The fix is to initialize the DDR right after the TLB setup, and then
> remapping it into position before gd/stack/heap usage.
> 
> Reported-by: Ramin Seyed-Moussavi 
> Reviewed-by: Alexandre Belloni 
> Reviewed-by: Horatiu Vultur 
> Signed-off-by: Lars Povlsen 
> ---
>  arch/mips/mach-mscc/cpu.c  |  9 +
>  arch/mips/mach-mscc/dram.c | 14 +-
>  arch/mips/mach-mscc/include/mach/ddr.h |  4 
>  arch/mips/mach-mscc/lowlevel_init.S| 17 -
>  4 files changed, 26 insertions(+), 18 deletions(-)
> 

applied to u-boot-mips, thanks.

-- 
- Daniel

Re: [PATCH] mips: vcoreiii: Ajust CONFIG_SYS_MEMTEST_END

[Daniel Schwierzeck]

Am 06.02.20 um 10:43 schrieb Lars Povlsen:
> This patch ajust CONFIG_SYS_MEMTEST_END for vcoreiii-based systems to
> avoid overwriting the relocated u-boot. The former setting was too
> agressive with networking etc. enabled on some platforms.
> 
> Reviewed-by: Alexandre Belloni 
> Reviewed-by: Horatiu Vultur 
> Signed-off-by: Lars Povlsen 
> ---
>  include/configs/vcoreiii.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 

applied to u-boot-mips, thanks.

-- 
- Daniel

Re: [PATCH v3][ 4/6] board: tbs2910: enable CONFIG_DISTRO_DEFAULTS

[Tom Rini]

On Sat, Feb 08, 2020 at 04:47:08PM +0100, Soeren Moch wrote:
> On 08.02.20 06:38, Denis 'GNUtoo' Carikli wrote:
> > The side effect is that it increase the size of the
> > resultimg image, which is already very close to the
> > size limit.
> >
> > With arm-linux-gnueabi-gcc 9.2.0-1 from the Parabola
> > GNU/Linux distribution, we have the following size
> > increase:
> > - text: 8744 bytes
> > - data: 132 bytes
> > - bss: 60 bytes
> > - total: 8936 bytes
> >
> > Signed-off-by: Denis 'GNUtoo' Carikli 
> Thank you very much for splitting up the patches and for your thorough
> size analysis. This makes it very easy to understand the size
> contributions of the several parts.
> 
> It was really surprising for me that CONFIG_DISTRO_DEFAULTS brings so
> much additional text. I thought this would only enable
> CONFIG_CMD_SYSBOOT, but we also get PXE support. I wasn't aware of this
> before.

Distro boot brings in a ton of "support booting via any supported IO
device" code.

That said, the "bring in PXE" part of DISTRO_DEFAULTS predates sysboot
being pulled out of the PXE code, where it was historically introduced.
I would like to see a patch to change this part, stand-alone and CC'ing
the distribution folks that might have something to say about this.  I
know there are use-cases for it, but I don't know how critical they are
to be everywhere by default vs opt-in.  Thanks all!

-- 
Tom


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[PATCH v2] mx6sabresd: Convert ethernet to driver model

[Alifer Moraes]

Convert imx6sabresd ethernet to driver model to fix the following warning:

= WARNING ==
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.


Signed-off-by: Alifer Moraes 
---

Changes since v1:

- Also removed unused function board_eth_init() to avoid building warnings 
(Stefano)

 board/freescale/mx6sabresd/mx6sabresd.c | 36 -
 configs/mx6sabresd_defconfig|  5 
 include/configs/mx6sabresd.h|  9 ---
 3 files changed, 5 insertions(+), 45 deletions(-)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c 
b/board/freescale/mx6sabresd/mx6sabresd.c
index 4a208277ac..07d3b0edb3 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -21,7 +21,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -44,9 +43,6 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
 
-#define ENET_PAD_CTRL  (PAD_CTL_PUS_100K_UP |  \
-   PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
 #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
  PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
 
@@ -73,31 +69,6 @@ static iomux_v3_cfg_t const uart1_pads[] = {
IOMUX_PADS(PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
 };
 
-static iomux_v3_cfg_t const enet_pads[] = {
-   IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
-   IOMUX_PADS(PAD_ENET_MDC__ENET_MDC   | MUX_PAD_CTRL(ENET_PAD_CTRL)),
-   IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
-   IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
-   IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
-   IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
-   IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
-   IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL   | 
MUX_PAD_CTRL(ENET_PAD_CTRL)),
-   IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK| 
MUX_PAD_CTRL(ENET_PAD_CTRL)),
-   IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
-   IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
-   IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
-   IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
-   IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
-   IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL   | 
MUX_PAD_CTRL(ENET_PAD_CTRL)),
-   /* AR8031 PHY Reset */
-   IOMUX_PADS(PAD_ENET_CRS_DV__GPIO1_IO25  | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
-static void setup_iomux_enet(void)
-{
-   SETUP_IOMUX_PADS(enet_pads);
-}
-
 static iomux_v3_cfg_t const usdhc2_pads[] = {
IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
@@ -495,13 +466,6 @@ int overwrite_console(void)
return 1;
 }
 
-int board_eth_init(bd_t *bis)
-{
-   setup_iomux_enet();
-
-   return cpu_eth_init(bis);
-}
-
 #ifdef CONFIG_USB_EHCI_MX6
 static void setup_usb(void)
 {
diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig
index 8629554fba..f218408832 100644
--- a/configs/mx6sabresd_defconfig
+++ b/configs/mx6sabresd_defconfig
@@ -81,6 +81,11 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=2000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_FEC_MXC=y
+CONFIG_RGMII=y
 CONFIG_MII=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index d810202117..ec1537541a 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -62,13 +62,4 @@
 #define CONFIG_USB_MAX_CONTROLLER_COUNT1 /* Enabled USB controller 
number */
 #endif
 
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE   ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPERGMII
-#define CONFIG_ETHPRIME"FEC"
-#define CONFIG_FEC_MXC_PHYADDR 1
-
-#define CONFIG_PHY_ATHEROS
-
-
 #endif /* __MX6SABRESD_CONFIG_H */
-- 
2.17.1

Re: [PATCH v2 02/10] mmc: Add init() API

[Tom Rini]

On Sun, Feb 09, 2020 at 02:38:15PM +0100, Wolfgang Denk wrote:
> Dear Faiz,
> 
> In message <04e0144c-cad3-d242-0393-ba33afa3d...@ti.com> you wrote:
> >
> > > I am in the cc list of your first mail, but not from Simon's reply mail.
> >
> > So Peng got the email but the list is dropping CCs after it gets them.
> > How do I avoid this in the future? Should I always add maintainers in To?
> 
> We are investigating this.  I _think_ (but this needs to be
> verified, I just had a short look) that Mailman might try to bee too
> clever; my speculation is that it might remove addresses from the
> Cc: list wich have the "nodupes" option set in their profile.
> Maybe mailman "thinks" that this is what it should do - otherwise
> the recipient would receive dupes at least for a reply-to-all, one
> trough the mailing list and the other through the Cc:
> 
> But as mentioned, this needs to be investigated.
> 
> I can see this ancient bug report [1], where a reply reads:
> 
> In any case, this behavior is intentional by design. Cc:
> recipients who are list members with their 'avoid duplicates'
> option set are removed from the Cc: list to keep that list
> from growing excessively in long threads with many
> 'reply-all' replies.
> 
> [1] https://bugs.launchpad.net/mailman/+bug/1216960
> 
> 
> So apparently a solution/workaoround could be to globally remove the
> "nodupes" option for all subscribers, but I'm not sure if this is
> what we should do.
> 
> 
> I feel the key problem here is that we expect something from the
> mailing list that it has not been designed for - the differentiation
> between "this is just some random posting" and "this is a posting
> which is specifically addressed to you".  this may or may not work,
> and it depends on several factors - how the mailing list tool works,
> and how the recipient filters his incoming e-mail.
> 
> But I don't have any clever solution either.

I'm a little wary of changing the global setting for everyone as well.
Perhaps we just need to note the problem happened for now and see if it
really happens again in the future, such that we need to consider such a
heavy-handed work-around.  Thanks for looking into this more!

-- 
Tom


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Re: [PATCH] configs: imxrt1050-evk: enable D/I cache

[Giulio Benetti]

+Cc Stefano

On 2/1/20 3:29 PM, Giulio Benetti wrote:

Soc supports cache so let's enable it.

Signed-off-by: Giulio Benetti 
---
  configs/imxrt1050-evk_defconfig | 2 --
  1 file changed, 2 deletions(-)

diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig
index 102e663886..71970552c0 100644
--- a/configs/imxrt1050-evk_defconfig
+++ b/configs/imxrt1050-evk_defconfig
@@ -1,6 +1,4 @@
  CONFIG_ARM=y
-CONFIG_SYS_ICACHE_OFF=y
-CONFIG_SYS_DCACHE_OFF=y
  CONFIG_ARCH_IMXRT=y
  CONFIG_SYS_TEXT_BASE=0x80002000
  CONFIG_SPL_GPIO_SUPPORT=y



--
Giulio Benetti
Benetti Engineering sas

[GIT PULL] Pull request: u-boot-imx u-boot-imx-20200210

[Stefano Babic]

Hi Tom,

please pull from u-boot-imx, thanks !

The following changes since commit e1dff2d69e5a21a61c3eb28e5d230a6d48749b6c:

  Merge branch '2020-02-07-master-imports' (2020-02-07 19:04:23 -0500)

are available in the Git repository at:

  https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git
tags/u-boot-imx-20200210

for you to fetch changes up to a19d73708fc017475e5635b4809b6b07c6a61afd:

  board: ge: bx50v3, imx53ppd: configure CONFIG_SYS_BOOTMAPSZ
(2020-02-09 21:47:20 +0100)


- Convert to DM:
- bx50v3, mx53ppd, novena, mx6sabresd
- Fixes for Xea Board
- Toradex im8m Verdin
- Cleanup (warp7, mx6sxsabresd)

Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/648131788


Alifer Moraes (1):
  mx6sabresd: Convert PCI to driver model

Anatolij Gustschin (1):
  imx: mx6ul_14x14_evk: turn of backlight and LCD before booting OS

Fabio Estevam (5):
  gpio: Let DM_74X164 be built without CONFIG_SPL_GPIO
  mx6ul_14x14_evk: Move CONFIG_DM_74X164 to defconfig
  mx6sxsabresd: Keep only one target
  mx7ulp_com: Remove unneeded SoC definitions
  mx6sabre_common: Remove FEC related settings

Heiko Schocher (1):
  imx6: aristainetos: fix NAND detection with latest mainline

Ian Ray (4):
  board: ge: mx53ppd: enable DM_VIDEO
  board: ge: bx50v3: override panel
  board: ge: mx53ppd: use DM for uart
  board: ge: bx50v3, imx53ppd: configure CONFIG_SYS_BOOTMAPSZ

Igor Opaniuk (3):
  board: toradex: Add Verdin iMX8M Mini support
  board: toradex: verdin-imx8mm: add README
  board: toradex: verdin-imx8mm: add MAINTAINERS

Joel Johnson (1):
  cmd: mdc/mwc: normalize disjoint MX_CYCLIC usage

Joris Offouga (4):
  warp7: Fix the pmic_get() parameter in the DM case
  warp7: remove unused usb configs
  arm: dts: imx7s-warp7: Move u-boot specific node in u-boot.dtsi
  mx7dsabre: Fix usbtog probe when use dfu or ums

Lukasz Majewski (5):
  arm: xea: defconfig: Define space for redundant envs in SPI-NOR flash
  arm: xea: Provide function to set L2 switch 'local-mac-address'
property
  arm: xea: config: Enable support for XEA board specific device
tree tweaks
  arm: xea: spl: Add GPIO0_0 setup on spl_board_init
  arm: xea: dts: Add 'fec-3v3' regulator properties to prevent
accidental disablement

Marcel Ziswiler (4):
  arm: dts: imx8mm-pinfunc: sync latest linux-next pin func header
  toradex: tdx-cfg-block: add Apalis iMX8X support
  toradex: tdx-cfg-block: add Verdin iMX8M Mini/Nano support
  imx: imx8mm_evk: spelling in readme file

Marek Vasut (3):
  ARM: imx: novena: Move defconfig bits to arch Kconfig
  ARM: imx: novena: Enable DM ethernet
  ARM: imx: novena: Enable DM thermal

Robert Beckett (9):
  misc: i2c_eeprom: set offset len and chip addr offset mask
  board: ge: bx50v3, imx53ppd: add eeprom partitions
  board: ge: bx50v3, imx53ppd: use DM I2C
  board: ge: bx50v3: add i2c eeprom bootcount storage
  board: ge: mx53ppd: add i2c eeprom bootcount storage
  board: ge: bx50v3: Enable DM PWM for backlight
  board: ge: mx53ppd: Use DM for ethernet
  board: ge: bx50v3: use DM for uart
  board: ge: bx50v3, mx53ppd: fix firstboot detection

Sébastien Szymanski (1):
  tools: imx8m_image: fix warning message

 README|2 +-
 arch/arm/dts/Makefile |1 +
 arch/arm/dts/imx28-xea.dts|2 +
 arch/arm/dts/imx53-ppd-uboot.dtsi |   46 ++
 arch/arm/dts/imx53-ppd.dts|5 +-
 arch/arm/dts/imx6q-b450v3.dts |2 +
 arch/arm/dts/imx6q-b650v3.dts |2 +
 arch/arm/dts/imx6q-b850v3.dts |2 +
 arch/arm/dts/imx6q-bx50v3-uboot.dtsi  |   25 ++
 arch/arm/dts/imx6q-bx50v3.dtsi|3 +-
 arch/arm/dts/imx7d-sdb-u-boot.dtsi|4 +
 arch/arm/dts/imx7s-warp-u-boot.dtsi   |   10 +
 arch/arm/dts/imx7s-warp.dts   |9 -
 arch/arm/dts/imx8mm-pinfunc.h |   20 +-
 arch/arm/dts/imx8mm-verdin-u-boot.dtsi|  103 +
 arch/arm/dts/imx8mm-verdin.dts| 1007
+
 arch/arm/mach-imx/imx8m/Kconfig   |7 +
 arch/arm/mach-imx/mx6/Kconfig |9 +
 board/aristainetos/aristainetos.c |2 +-
 board/freescale/imx8mm_evk/README |2 +-
 board/freescale/mx6sabresd/mx6sabresd.c   |   11 -
 board/freescale/mx6sxsabresd/MAINTAINERS  |1 -
 board/freescale/mx6sxsabresd/mx6sxsabresd.c   |  236 --
 board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c |9 +
 board/ge/bx50v3/Kconfig

Re: Please pull u-boot-x86

[Tom Rini]

On Sat, Feb 08, 2020 at 09:54:37AM +0800, Bin Meng wrote:

> Hi Tom,
> 
> This PR includes the following changes for v2020.04:
> 
> - Move P2SB from Apollo Lake to a more generic location
> - Add a function to find a device by drvdata in DM core
> - Enhancement of DM IRQ uclass driver
> - Add a clock driver for Intel devices
> - Add support for ACPI general-purpose events
> - Add a TPM driver for H1/Cr50
> - Enable TPM on Google Chromebook Coral
> 
> The following changes since commit 8a6ffeda97dfda5263ef40e1a4efb25b032ce04c:
> 
>   video: enable VIDEO_ANSI and all VIDEO_BBP options (2020-02-06 16:11:47 
> -0500)
> 
> are available in the git repository at:
> 
>   https://gitlab.denx.de/u-boot/custodians/u-boot-x86
> 
> for you to fetch changes up to 0f6a70e971b2d87de3e58e8f0b51b0cd6723bc96:
> 
>   x86: coral: Enable TPM (2020-02-07 22:46:36 +0800)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] Pull request: u-boot-riscv/master

[Tom Rini]

On Mon, Feb 10, 2020 at 03:29:56PM +0800, ub...@andestech.com wrote:

> Hi Tom,
> 
> Please pull some riscv updates:
> 
> - Fix ax25-ae350.rst document.
> - Refine RISC-V linker script and start.S.
> - Add option to print more information on exception.
> 
> https://travis-ci.org/rickchen36/u-boot-riscv/builds/646697243
> 
> Thanks
> Rick
> 
> 
> The following changes since commit e1dff2d69e5a21a61c3eb28e5d230a6d48749b6c:
> 
>   Merge branch '2020-02-07-master-imports' (2020-02-07 19:04:23 -0500)
> 
> are available in the Git repository at:
> 
>   g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git
> 
> for you to fetch changes up to 404339759ef5e0bcd4fa7768d1148b1ace2d2bb6:
> 
>   riscv: Remove unnecessary instruction (2020-02-10 14:51:52 +0800)
> 

Applied to u-boot/master, thanks!


-- 
Tom


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RE: [PATCH 2/5] cmd: env: use ENV_IS_IN_DEVICE in env info

[Patrick DELAUNAY]

Hi Simon,

> From: Simon Glass 
> Sent: jeudi 30 janvier 2020 03:18
> 
> On Fri, 24 Jan 2020 at 05:34, Patrick Delaunay 
> wrote:
> >
> > Use the define ENV_IS_IN_DEVICE to test if one the
> > CONFIG_ENV_IS_IN_...  is defined and correct the detection of
> > persistent storage support in the command "env info"
> > if CONFIG_ENV_IS_NOWHERE is activated.
> >
> > Since commit 60d5ed2593c9 ("env: allow ENV_IS_NOWHERE with other
> > storage target") test CONFIG_ENV_IS_NOWHERE is not enough; see also
> > commit 953db29a1e9c6 ("env: enable saveenv command when one
> > CONFIG_ENV_IS_IN is activated").
> >
> > This patch avoids issue for this command in stm32mp1 platform.
> >
> > Signed-off-by: Patrick Delaunay 
> > ---
> >
> >  cmd/nvedit.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> Reviewed-by: Simon Glass 
> 
> We should add more tests for the environment functionality.

Sorry for the delay,

I need to activate a location in sandbox to test this feature

I am working on a other serie for it (I am trying to add test for env in EXT4).

Patrick

RE: [PATCH v3 01/10] misc: add driver for the Sifive otp controller

[Pragnesh Patel]

Hi Jagan,

>-Original Message-
>From: Pragnesh Patel
>Sent: 27 January 2020 15:48
>To: Jagan Teki 
>Cc: U-Boot-Denx ; Atish Patra
>; palmerdabb...@google.com; Bin Meng
>; Paul Walmsley ( Sifive)
>; Troy Benjegerdes ( Sifive)
>; Anup Patel ; Sagar
>Kadam ; Rick Chen ; Simon
>Glass ; Heiko Stuebner systems.com>; Michal Simek ; Marcel Ziswiler
>; Finley Xiao ;
>Peng Fan ; Tero Kristo ; Eugen Hristev
>
>Subject: RE: [PATCH v3 01/10] misc: add driver for the Sifive otp controller
>
>
>>-Original Message-
>>From: Jagan Teki 
>>Sent: 24 January 2020 12:12
>>To: Pragnesh Patel 
>>Cc: U-Boot-Denx ; Atish Patra
>>; palmerdabb...@google.com; Bin Meng
>>; Paul Walmsley ( Sifive)
>>; Troy Benjegerdes ( Sifive)
>>; Anup Patel ; Sagar
>>Kadam ; Rick Chen ; Simon
>>Glass ; Heiko Stuebner >systems.com>; Michal Simek ; Marcel Ziswiler
>>; Finley Xiao
>>; Peng Fan ; Tero Kristo
>>; Eugen Hristev 
>>Subject: Re: [PATCH v3 01/10] misc: add driver for the Sifive otp
>>controller
>>
>>On Fri, Jan 24, 2020 at 11:21 AM Pragnesh Patel
>>
>>wrote:
>>>
>>> Added a misc driver to handle OTP memory in FU540.
>>>
>>> Signed-off-by: Pragnesh Patel 
>>> Reviewed-by: Anup Patel 
>>> ---
>>>  arch/riscv/dts/fu540-c000-u-boot.dtsi |  13 ++
>>>  .../dts/hifive-unleashed-a00-u-boot.dtsi  |   6 +
>>>  board/sifive/fu540/fu540.c| 113 --
>>>  configs/sifive_fu540_defconfig|   2 +
>>>  drivers/misc/Kconfig  |   7 +
>>>  drivers/misc/Makefile |   1 +
>>>  drivers/misc/ememory-otp.c| 207 ++
>>
>>This patch need to break into
>>1. add sifive otp driver
>>2. enable the otp driver - board, dts, defconfig changes.
>
>Will split in v4.
>
>>
>>>  7 files changed, 276 insertions(+), 73 deletions(-)  create mode
>>> 100644 arch/riscv/dts/fu540-c000-u-boot.dtsi
>>>  create mode 100644 arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
>>>  create mode 100644 drivers/misc/ememory-otp.c
>>>
>>> diff --git a/arch/riscv/dts/fu540-c000-u-boot.dtsi
>>> b/arch/riscv/dts/fu540-c000-u-boot.dtsi
>>> new file mode 100644
>>> index 00..615a68c0e9
>>> --- /dev/null
>>> +++ b/arch/riscv/dts/fu540-c000-u-boot.dtsi
>>> @@ -0,0 +1,13 @@
>>> +// SPDX-License-Identifier: GPL-2.0+
>>> +/*
>>> + * (C) Copyright 2019 SiFive, Inc
>>> + */
>>> +
>>> +/ {
>>> +   soc {
>>> +   otp: otp@1007 {
>>> +   compatible = "sifive,fu540-otp";
>>> +   reg = <0x0 0x1007 0x0 0x0FFF>;
>>> +   };
>>> +   };
>>> +};
>>> diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
>>> b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
>>> new file mode 100644
>>> index 00..bec0d19134
>>> --- /dev/null
>>> +++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
>>> @@ -0,0 +1,6 @@
>>> +// SPDX-License-Identifier: GPL-2.0+
>>> +/*
>>> + * Copyright (C) 2019 SiFive, Inc
>>> + */
>>> +
>>> +#include "fu540-c000-u-boot.dtsi"
>>> diff --git a/board/sifive/fu540/fu540.c b/board/sifive/fu540/fu540.c
>>> index 47a2090251..3a5e74f1fb 100644
>>> --- a/board/sifive/fu540/fu540.c
>>> +++ b/board/sifive/fu540/fu540.c
>>> @@ -10,94 +10,61 @@
>>>  #include 
>>>  #include 
>>>  #include 
>>> +#include 
>>>
>>> -#ifdef CONFIG_MISC_INIT_R
>>> -
>>> -#define FU540_OTP_BASE_ADDR0x1007
>>> -
>>> -struct fu540_otp_regs {
>>> -   u32 pa; /* Address input */
>>> -   u32 paio;   /* Program address input */
>>> -   u32 pas;/* Program redundancy cell selection input */
>>> -   u32 pce;/* OTP Macro enable input */
>>> -   u32 pclk;   /* Clock input */
>>> -   u32 pdin;   /* Write data input */
>>> -   u32 pdout;  /* Read data output */
>>> -   u32 pdstb;  /* Deep standby mode enable input (active low) */
>>> -   u32 pprog;  /* Program mode enable input */
>>> -   u32 ptc;/* Test column enable input */
>>> -   u32 ptm;/* Test mode enable input */
>>> -   u32 ptm_rep;/* Repair function test mode enable input */
>>> -   u32 ptr;/* Test row enable input */
>>> -   u32 ptrim;  /* Repair function enable input */
>>> -   u32 pwe;/* Write enable input (defines program cycle) */
>>> -} __packed;
>>> -
>>> -#define BYTES_PER_FUSE 4
>>> -#define NUM_FUSES  0x1000
>>> -
>>> -static int fu540_otp_read(int offset, void *buf, int size) -{
>>> -   struct fu540_otp_regs *regs = (void __iomem
>>*)FU540_OTP_BASE_ADDR;
>>> -   unsigned int i;
>>> -   int fuseidx = offset / BYTES_PER_FUSE;
>>> -   int fusecount = size / BYTES_PER_FUSE;
>>> -   u32 fusebuf[fusecount];
>>> -
>>> -   /* check bounds */
>>> -   if (offset < 0 || size < 0)
>>> -   return -EINVAL;
>>> -   if (fuseidx >= NUM_FUSES)
>>> -   return -EINVAL;
>>> -   if ((fuseidx + fusecount) > NUM_FUSES)
>>> -