[PATCH 2/2] efi_selftest: add selftests for loadfile2 used to load initramfs

Provide a unit test loading an initial ramdisk using the EFI_LOAD_FILE2_PROTOCOL. The test is only executed on request. An example usage - given a file image with a file system in partition 1 holding file initrd - is: * Configure the sandbox with CONFIG_EFI_SELFTEST=y

[PATCH 1/2] efi_loader: Implement FileLoad2 for initramfs loading

Following kernel's proposal for an arch-agnostic initrd loading mechanism [1] let's implement the U-boot counterpart. This new approach has a number of advantages compared to what we did up to now. The file is loaded into memory only when requested limiting the area of TOCTOU attacks. Users will

Re: [PATCH 0/3] Remove CONFIG_MMC_BROKEN_CD

On 2/21/20 10:07 AM, Jaehoon Chung wrote: > Hi Tom, > > On 2/21/20 4:57 AM, Tom Rini wrote: >> On Thu, Feb 20, 2020 at 01:45:31PM +0900, Jaehoon Chung wrote: >> >>> CONFIG_MMC_BROKEN_CD needs not to define to Kconfig. >>> broken-cd is already provide to dt-property. >>> If want to poll

Re: [PATCH v3] dm: uclass: don't assign aliased seq numbers

On 20. 02. 20 21:16, Michael Walle wrote: > > Hi Michal, > > Am 2020-02-20 11:14, schrieb Michal Simek: >> On 20. 02. 20 10:52, Michael Walle wrote: >>> Hi Michal, >>> >>> Am 2020-02-20 09:30, schrieb Michal Simek: On 03. 02. 20 18:11, Michael Walle wrote: > If there are aliases for an

Re: [PATCH v1 1/2] fu540: prci: add request and free clock handlers

On 2/18/20 11:13 AM, Sagar Shrikant Kadam wrote: > +static int sifive_fu540_prci_clk_free(struct clk *clk) > +{ > + debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, > + clk->id); > + > + if (clk->id >= ARRAY_SIZE(__prci_init_clocks)) > + return -EINVAL;

Re: [PATCH v1 2/2] cpu: clk: riscv: populate proper CPU core clk frequency

On 2/21/20 12:59 AM, Sagar Kadam wrote: >> What you were trying to do in this patch, I believe the following 2 >> patches already did it. >> >> http://patchwork.ozlabs.org/patch/1236177/ >> http://patchwork.ozlabs.org/patch/1236180/ >> > > Thanks for sharing the links. Unfortunately I didn’t come

[PATCH v7 6/7] test: add rsa_verify() unit test

In this patch, a very simple test is added to verify that rsa_verify() using rsa_verify_with_pkey() work correctly. To keep the code simple, all the test data, either public key and verified binary data, are embedded in the source. Signed-off-by: AKASHI Takahiro --- test/Kconfig | 10 +++

[PATCH v7 4/7] lib: rsa: generate additional parameters for public key

In the current implementation of FIT_SIGNATURE, five parameters for a RSA public key are required while only two of them are essential. (See rsa-mod-exp.h and uImage.FIT/signature.txt) This is a result of considering relatively limited computer power and resources on embedded systems, while such a

[PATCH v7 3/7] include: image.h: add key info to image_sign_info

For FIT verification, all the properties of a public key come from "control fdt" pointed to by fdt_blob. In UEFI secure boot, on the other hand, a public key is located and retrieved from dedicated signature database stored as UEFI variables. Added two fields may hold values of a public key if

[PATCH v7 5/7] lib: rsa: add rsa_verify_with_pkey()

This function, and hence rsa_verify(), will perform RSA verification with two essential parameters for a RSA public key in contract of rsa_verify_with_keynode(), which requires additional three parameters stored in FIT image. It will be used in implementing UEFI secure boot, i.e. image

[PATCH v7 7/7] test: enable RSA library test on sandbox

We want to always run RSA library test on sandbox build in Travis CI. Just adding CONFIG_RSA_VERIFY_WITH_PKEY would be good enough for this purpose. Signed-off-by: AKASHI Takahiro --- configs/sandbox64_defconfig| 1 + configs/sandbox_defconfig | 1 +

[PATCH v7 0/7] rsa: extend rsa_verify() for UEFI secure boot

# This patch set is a prerequisite for UEFI secure boot. The current rsa_verify() requires five parameters for a RSA public key for efficiency while RSA, in theory, requires only two. In addition, those parameters are expected to come from FIT image. So this function won't fit very well when we

[PATCH v7 2/7] rsa: add CONFIG_RSA_VERIFY_WITH_PKEY config

In the next couple of commits, under new CONFIG_RSA_VERIFY_WITH_PKEY, rsa_verify() will be extended to be able to perform RSA decryption without additional RSA key properties from FIT image, i.e. rr and n0inv. Signed-off-by: AKASHI Takahiro Reviewed-by: Simon Glass --- lib/rsa/Kconfig | 14

[PATCH v7 1/7] lib: rsa: decouple rsa from FIT image verification

Introduce new configuration, CONFIG_RSA_VERIFY which will decouple building RSA functions from FIT verification and allow for adding a RSA-based signature verification for other file formats, in particular PE file for UEFI secure boot. Signed-off-by: AKASHI Takahiro Reviewed-by: Simon Glass ---

RE: [PATCH v1 2/2] cpu: clk: riscv: populate proper CPU core clk frequency

Hello Bin, > -Original Message- > From: Bin Meng > Sent: Wednesday, February 19, 2020 9:40 PM > To: Sagar Kadam ; Sean Anderson > > Cc: U-Boot Mailing List ; Lukasz Majewski > ; Anup Patel ; Paul Walmsley ( > Sifive) ; Vincent Chen > > Subject: Re: [PATCH v1 2/2] cpu: clk: riscv:

Re: [PATCH v2 2/3] mmc: sdhci: not return error when SDMA is not supported

On 18/02/2020 10:25, Jaehoon Chung wrote: > If Host controller doesn't support SDMA, it doesn't need to return > error. Because it can be worked with PIO mode. > > Signed-off-by: Jaehoon Chung > Reviewed-by: Peng Fan > --- > Changelog on V2 > - Keep printf message instead of debug > >

Re: [PATCH v2 3/3] configs: rpi_4_32b_defconfig: enable SDHCI_SDMA config

On 18/02/2020 10:25, Jaehoon Chung wrote: > Enable SDHCI_SDMA configuration. > > Signed-off-by: Jaehoon Chung > Reviewed-by: Peng Fan > --- > Changelog on V2 > - None > > configs/rpi_4_32b_defconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/configs/rpi_4_32b_defconfig

Re: [PATCH v2 1/3] mmc: sdhci: use phys2bus macro when dma address is accessed

On 18/02/2020 10:25, Jaehoon Chung wrote: > Use phys2bus macro when dma address is accessed. > Some targets need to use pyhs2bus macro. (e.g, RPI4) > After applied it, SDMA mode can be used. > > Signed-off-by: Jaehoon Chung > Reviewed-by: Peng Fan > --- > Changelog on V2 > - None > >

[PATCH v3 20/21] arm: socfpga: mailbox: Add 'SYSTEM_RESET' PSCI support to mbox_reset_cold()

From: Chee Hong Ang mbox_reset_cold() will invoke ATF's PSCI service when running in non-secure mode (EL2). Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpga/mailbox_s10.c | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-socfpga/mailbox_s10.c

[PATCH v3 19/21] arm: socfpga: stratix10: Add ATF support to FPGA reconfig driver

From: Chee Hong Ang FPGA recpnfiguration driver will call the ATF's PSCI runtime services if it's running in non-secure mode (EL2). Signed-off-by: Chee Hong Ang --- drivers/fpga/stratix10.c | 141 ++- 1 file changed, 140 insertions(+), 1 deletion(-)

[PATCH v3 21/21] configs: socfpga: Add defconfig for Agilex and Stratix 10 without ATF support

From: Chee Hong Ang Booting Agilex and Stratix 10 without ATF support. SPL -> U-Boot proper -> OS (Linux) Signed-off-by: Chee Hong Ang --- configs/socfpga_agilex_nofw_defconfig| 59 ++ configs/socfpga_stratix10_nofw_defconfig | 63

[PATCH v3 15/21] net: designware: socfpga: Secure register access in MAC driver

From: Chee Hong Ang Allow MAC driver to access System Manager's EMAC control registers in non-secure mode. Signed-off-by: Chee Hong Ang --- drivers/net/dwmac_socfpga.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/dwmac_socfpga.c

[PATCH v3 16/21] arm: socfpga: Secure register access in Reset Manager driver

From: Chee Hong Ang Allow socfpga_bridges_reset() function in Reset Manager driver to access System Manager's register in non-secure mode (EL2). Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpga/reset_manager_s10.c | 31 ++- 1 file changed, 18 insertions(+),

[PATCH v3 18/21] arm: socfpga: Bridge reset invokes SMC service calls in EL2

From: Chee Hong Ang In EL3, do_bridge_reset() directly send mailbox commands to SDM to query the FPGA configuration status. If running in non-secure mode (EL2), it invokes SMC service calls to ATF (EL3) to perform the query. Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpga/misc_s10.c |

[PATCH v3 17/21] arm: socfpga: stratix10: Initialize timer in SPL

From: Chee Hong Ang Initialize timer in SPL running in secure mode (EL3) and skip timer initialization in U-Boot proper running in non-secure mode (EL2). Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpga/timer_s10.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git

[PATCH v3 14/21] mmc: dwmmc: socfpga: Secure register access in MMC driver

From: Chee Hong Ang Allow MMC driver to access System Manager's SDMMC control register in non-secure mode (EL2). Signed-off-by: Chee Hong Ang --- drivers/mmc/socfpga_dw_mmc.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/socfpga_dw_mmc.c

[PATCH v3 08/21] arm: socfpga: Add SMC helper function for Intel SOCFPGA (64bits)

From: Chee Hong Ang Allow U-Boot proper running in non-secure mode (EL2) to invoke SMC call to ATF's PSCI runtime services such as System Manager's registers access, 2nd phase bitstream FPGA reconfiguration, Remote System Update (RSU) and etc. Signed-off-by: Chee Hong Ang ---

[PATCH v3 11/21] arm: socfpga: Secure register access for clock manager (SoC 64bits)

From: Chee Hong Ang Allow clock manager driver to access the System Manager's Boot Scratch Register 0 in non-secure mode (EL2) on SoC 64bits platform. Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpga/clock_manager_agilex.c | 5 +++-- arch/arm/mach-socfpga/clock_manager_s10.c| 5

[PATCH v3 12/21] arm: socfpga: Secure register access in PHY mode setup

From: Chee Hong Ang Allow access to System Manager's EMAC control register from non-secure mode during PHY mode setup. Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpga/misc_s10.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-socfpga/misc_s10.c

[PATCH v3 09/21] arm: socfpga: Define SMC function identifiers for PSCI SiP services

From: Chee Hong Ang This header file defines the Secure Monitor Call (SMC) message protocol for ATF (BL31) PSCI runtime services. It includes all the PSCI SiP function identifiers for the secure runtime services provided by ATF. The secure runtime services include System Manager's registers

[PATCH v3 13/21] arm: socfpga: Secure register access for reading PLL frequency

From: Chee Hong Ang Allow reading external oscillator and FPGA clock's frequency from System Manager's Boot Scratch Register 1 and Boot Scratch Register 2 in non-secure mode (EL2) on SoC 64bits platform. Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpga/wrap_pll_config_s10.c | 9

[PATCH v3 10/21] arm: socfpga: Add secure register access helper functions for SoC 64bits

From: Chee Hong Ang These secure register access functions allow U-Boot proper running at EL2 (non-secure) to access System Manager's secure registers by calling the ATF's PSCI runtime services (EL3/secure). If these helper functions are called from secure mode (EL3), the helper function will

[PATCH v3 04/21] arm: socfpga: Load FIT image with ATF support

From: Chee Hong Ang Instead of loading u-boot proper image (u-boot.img), SPL now loads FIT image (u-boot.itb) which includes u-boot proper, ATF and u-boot proper's DTB. Signed-off-by: Chee Hong Ang --- include/configs/socfpga_soc64_common.h | 4 1 file changed, 4 insertions(+) diff

[PATCH v3 05/21] arm: socfpga: Override 'lowlevel_init' to support ATF

From: Chee Hong Ang Override 'lowlevel_init' to support booting ATF from SPL on Intel SOCFPGA (64bits) platforms. Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpga/Makefile | 2 + arch/arm/mach-socfpga/lowlevel_init_64.S | 81 2 files changed,

[PATCH v3 06/21] configs: socfpga: Enable FIT image loading with ATF support

From: Chee Hong Ang SPL now loads ATF (BL31), U-Boot proper and DTB from FIT image. The new boot flow with ATF support is as follow: SPL -> ATF (BL31) -> U-Boot proper -> OS (Linux) U-Boot proper now starts at 0x20 (CONFIG_SYS_TEXT_BASE). ATF will occupy the address range starting from

[PATCH v3 02/21] arm: socfpga: add fit source file for pack itb with ATF

From: Chee Hong Ang Generate a FIT image for Intel SOCFPGA(64bits) which include U-boot proper, ATF and DTB for U-boot proper. Signed-off-by: Chee Hong Ang --- board/altera/soc64/its/fit_spl_atf.its | 52 ++ 1 file changed, 52 insertions(+) create mode 100644

[PATCH v3 03/21] arm: socfpga: Add function for checking description from FIT image

From: Chee Hong Ang Add board_fit_config_name_match() for matching board name with device tree files in FIT image. This will ensure correct DTB file is loaded for different board type. Currently, we are not supporting multiple device tree files in FIT image therefore this function basically do

[PATCH v3 07/21] arm: socfpga: Disable "spin-table" method for booting Linux

From: Chee Hong Ang Standard PSCI function "CPU_ON" provided by ATF is now used by Linux kernel to bring up the secondary CPUs to enable SMP booting in Linux on SoC 64bits platform. Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpga/Kconfig | 2 -- 1 file changed, 2 deletions(-) diff

[PATCH v3 01/21] configs: agilex: Remove CONFIG_OF_EMBED

From: Chee Hong Ang CONFIG_OF_EMBED was primarily enabled to support the agilex spl hex file requirements. Since this option now produces a warning during build, and the spl hex can be created using alternate methods, CONFIG_OF_EMBED is no longer needed. Signed-off-by: Chee Hong Ang ---

[PATCH v3 00/21] Enable ARM Trusted Firmware for U-Boot

From: "Ang, Chee Hong" v3 changes: [v3 03/21] arm: socfpga: Add function for checking description from FIT image - documented the 'weak' function in commit message [v3 05/21] arm: socfpga: Override 'lowlevel_init' to support ATF - changed the source file name to 'lowlevel_init_64.S' - removed

[PATCH 1/1] azure: build HTML documentation

Several patches delivered incorrect restructured text as documentation. We should be able to discover this in Azure CI. Provide a build step for 'make htmldocs'. Signed-off-by: Heinrich Schuchardt --- Hello Tom, I have no Azure account to check if this actually works. The patch depends on:

[PATCH 1/1] gitlab: build HTML documentation

Several patches delivered incorrect restructured text as documentation. We should be able to discover this in Gitlab CI. Provide a build step for 'make htmldocs'. Signed-off-by: Heinrich Schuchardt --- This patch requires a new Docker image. Cf. [PATCH 1/1] Dockerfile: add imagemagick

[PATCH 1/1] Dockerfile: add imagemagick

In reStructured text documentation we sometimes find formatting problems. So we should add 'make htmldocs' to our Gitlab Ci steps and let all warning result in a build failure. For building the htmldocs target without warnings we need the ImageMagick package. Signed-off-by: Heinrich Schuchardt

Re: [PATCH 1/2] doc/Makefile: turn warnings into errors

On 2/21/20 5:31 AM, Heinrich Schuchardt wrote: On 2/21/20 5:06 AM, Tom Rini wrote: On Fri, Feb 21, 2020 at 04:26:36AM +0100, Heinrich Schuchardt wrote: Several patches delivered incorrect restructured text as documentation. We should be able to discover this in Travis CI or Gitlab CI. So let

Re: [PATCH 1/2] doc/Makefile: turn warnings into errors

On 2/21/20 5:06 AM, Tom Rini wrote: On Fri, Feb 21, 2020 at 04:26:36AM +0100, Heinrich Schuchardt wrote: Several patches delivered incorrect restructured text as documentation. We should be able to discover this in Travis CI or Gitlab CI. So let us turn all build warnings into errors. We

[PATCH 1/1] .dockerignore: remove .git/ from build context

We do not need .git in the build context. Signed-off-by: Heinrich Schuchardt --- .dockerignore | 2 ++ 1 file changed, 2 insertions(+) create mode 100644 .dockerignore diff --git a/.dockerignore b/.dockerignore new file mode 100644 index 000..bbaab15 --- /dev/null +++ b/.dockerignore @@

Re: [PATCH 1/2] doc/Makefile: turn warnings into errors

On Fri, Feb 21, 2020 at 04:26:36AM +0100, Heinrich Schuchardt wrote: > Several patches delivered incorrect restructured text as documentation. We > should be able to discover this in Travis CI or Gitlab CI. > > So let us turn all build warnings into errors. > > We cannot add --keep-going as

[PATCH 0/2] doc: build HTML docs in CI

We are on the move to a restructured text based documentation for U-Boot. Build target htmldocs is used to transform the restructured text into HTML. We should avoid syntax errors in the restructured text documents that may lead to incorrect HTML. This patch series turns the 'make htmldocs'

[PATCH 2/2] travis: build HTML docs

Several patches delivered incorrect restructured text as documentation. We should be able to discover this in Travis CI. Provide a build step for 'make htmldocs'. Add required package graphviz. Signed-off-by: Heinrich Schuchardt --- .travis.yml | 5 + 1 file changed, 5 insertions(+) diff

[PATCH 1/2] doc/Makefile: turn warnings into errors

Several patches delivered incorrect restructured text as documentation. We should be able to discover this in Travis CI or Gitlab CI. So let us turn all build warnings into errors. We cannot add --keep-going as Gitlab does not use sphinx-build version 1.8 or later yet. Signed-off-by: Heinrich

[PATCH 1/2] mmc: ca_dw_mmc: add DesignWare based DM support for CAxxxx SoCs

From: Arthur Li Initial DesignWare based DM support for Cortina Access CA SoCs. Signed-off-by: Arthur Li Signed-off-by: Alex Nemirovsky --- MAINTAINERS | 2 + drivers/mmc/Kconfig | 11 +++ drivers/mmc/Makefile| 1 + drivers/mmc/ca_dw_mmc.c | 181

[PATCH 2/2] board: presidio-asic: Add eMMC board support

Add initial eMMC support for Cortina Access Presidio Engineering Board Signed-off-by: Alex Nemirovsky --- configs/cortina_presidio-asic-emmc_defconfig | 33 1 file changed, 33 insertions(+) create mode 100644 configs/cortina_presidio-asic-emmc_defconfig diff

[PATCH] configs: socfpga: cyclone5: Enable CONFIG_NET_RANDOM_ETHADDR

Enable random ethaddr CONFIG_NET_RANDOM_ETHADDR for Cyclone 5. Ethernet failed to work if ethaddr is empty when Ethernet driver is probed. Setting ethaddr in Uboot command prompt can't solve this. Enable random ethaddr to solve it. Fix issue below: => setenv ethaddr 00:07:ed:00:64:04 => setenv

[PATCH 2/2] configs: socfpga: Add QSPI boot for Arria 10 SoCDK

Add QSPI boot settings for Arria 10 SoCDK. Signed-off-by: Ley Foon Tan --- include/configs/socfpga_arria10_socdk.h | 9 + 1 file changed, 9 insertions(+) diff --git a/include/configs/socfpga_arria10_socdk.h b/include/configs/socfpga_arria10_socdk.h index 645e66e6b0..e1d01c095f 100644

[PATCH 1/2] configs: socfpga: Add QSPI support for Cyclone 5

Add QSPI boot support to boot target devices list. Platform can provide their own boot settings through SOCFPGA_BOOT_SETTINGS macro if needed. Add SOCFPGA_BOOT_SETTINGS for Cyclone 5. Signed-off-by: Ley Foon Tan --- include/configs/socfpga_common.h | 18 ++

Pull request: u-boot-rockchip-20200220

-rockchip-20200220 for you to fetch changes up to f9561d8e3671415c7780df4b5e70f0f1e2d2bf57: arch: arm: rockchip: order the rk3399 entries alphabetically (2020-02-20 09:18:14 +0800) Heiko Stuebner (3): rockchip: make_fit_atf: use

Re: [PATCH 0/3] Remove CONFIG_MMC_BROKEN_CD

Hi Tom, On 2/21/20 4:57 AM, Tom Rini wrote: > On Thu, Feb 20, 2020 at 01:45:31PM +0900, Jaehoon Chung wrote: > >> CONFIG_MMC_BROKEN_CD needs not to define to Kconfig. >> broken-cd is already provide to dt-property. >> If want to poll card-detect, set to broken-cd instead of enabling >>

Re: [PATCH] bootcounter: add DM support for memory based bootcounter

Hi Heiko, On Thu, 20 Feb 2020 at 02:28, Heiko Schocher wrote: > > add DM/DTS support for the memory based bootcounter > in drivers/bootcount/bootcount.c. > > Let the old implementation in, so boards which have > not yet convert to DM/DTS do not break. > > Signed-off-by: Heiko Schocher > --- >

Re: [PATCH 5/5] Add support for i.MXRT1020-EVK board

On Tue, 18 Feb 2020 20:02:55 +0100 Giulio Benetti wrote: > Signed-off-by: Giulio Benetti > --- > arch/arm/dts/Makefile | 3 +- > arch/arm/dts/imxrt1020-evk-u-boot.dtsi| 44 > arch/arm/dts/imxrt1020-evk.dts| 198 > ++

Re: [PATCH 4/5] dt-bindings: pinctrl: add i.MXRT1020 pins definition

Hi Lukasz, On 2/20/20 11:51 PM, Lukasz Majewski wrote: On Tue, 18 Feb 2020 20:02:54 +0100 Giulio Benetti wrote: Add i.MXRT1020 pins definition. Are those definitions ported from Linux kernel? No, this is the first implementation for U-Boot, I'll do it for Linux later. Best regards --

Re: [PATCH 4/5] dt-bindings: pinctrl: add i.MXRT1020 pins definition

On Tue, 18 Feb 2020 20:02:54 +0100 Giulio Benetti wrote: > Add i.MXRT1020 pins definition. Are those definitions ported from Linux kernel? > > Signed-off-by: Giulio Benetti > --- > include/dt-bindings/pinctrl/pins-imxrt1020.h | 763 > +++ 1 file changed, 763 insertions(+) >

Re: [PATCH 3/5] ARM: dts: imxrt1020: add dtsi file

Hi Lukasz, On 2/20/20 11:45 PM, Lukasz Majewski wrote: Hi Giulio, Add dtsi file for i.MXRT1020. Has this file been ported from Linux kernel? Or is it only available in U-Boot? Only available in U-Boot at the moment. And thank you for reviewing! Best regards -- Giulio Benetti Benetti

Re: [PATCH 3/5] ARM: dts: imxrt1020: add dtsi file

Hi Giulio, > Add dtsi file for i.MXRT1020. > Has this file been ported from Linux kernel? Or is it only available in U-Boot? Reviewed-by: Lukasz Majewski > Signed-off-by: Giulio Benetti > --- > arch/arm/dts/imxrt1020.dtsi | 133 > 1 file changed, 133

Re: [PATCH 2/5] Add i.MXRT1020 support

On Tue, 18 Feb 2020 20:02:52 +0100 Giulio Benetti wrote: > Signed-off-by: Giulio Benetti > --- > arch/arm/mach-imx/imxrt/Kconfig | 4 > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm/mach-imx/imxrt/Kconfig > b/arch/arm/mach-imx/imxrt/Kconfig index e3aff11d48..f28d52d3b7 100644

Re: [PATCH 1/5] clk: imx: add i.IMXRT1020 clk driver

On Tue, 18 Feb 2020 20:02:51 +0100 Giulio Benetti wrote: > Add i.MXRT1020 clk driver support. > > Signed-off-by: Giulio Benetti > --- > drivers/clk/imx/Kconfig | 16 ++ > drivers/clk/imx/Makefile| 1 + > drivers/clk/imx/clk-imxrt1020.c |

Re: [PATCH 1/3] clk: imx: imx8mn: add enet clk

Hi Alifer, > Add enet ref/timer/PHY_REF/root clk wich are required to make enet > work properly Why have you sent those patches twice? > > Signed-off-by: Alifer Moraes > --- > drivers/clk/imx/clk-imx8mn.c | 19 +++ > 1 file changed, 19 insertions(+) > > diff --git

Re: [U-Boot] [RFC/RFT PATCH v4 3/3] image: Add compressed Image parsing support in booti.

On Thu, Feb 20, 2020 at 1:14 PM David Abdurachmanov wrote: > > On Tue, Feb 18, 2020 at 10:38 PM Tom Rini wrote: > > > > On Sun, Feb 16, 2020 at 04:48:22PM -0800, Atish Patra wrote: > > > On Fri, Feb 14, 2020 at 8:43 AM Tom Rini wrote: > > > > > > > > On Thu, Feb 13, 2020 at 11:32:52PM +0200,

Re: [PATCH v2 06/21] configs: socfpga: Enable FIT image loading with ATF support

On Thu, 2020-02-20 at 21:00 +0100, Simon Goldschmidt wrote: Am 20.02.2020 um 17:45 schrieb Marek Vasut: On 2/20/20 3:15 AM, Ang, Chee Hong wrote: On 2/19/20 1:25 PM, chee.hong@intel.com wrote: From: Chee Hong Ang <

Re: [PATCH] board: nitrogen6x: migrate to CONFIG_DM_VIDEO

On Thu, Feb 20, 2020 at 6:52 PM Troy Kisky wrote: > Or I can just skip the dts changes. I don't think they are needed. Yes, that's what I thought as well. Skipping the dts changes is fine. > Do we have a policy for dead dts code ? Not really. We try to keep the U-Boot dts in sync with

Re: [PATCH] board: nitrogen6x: migrate to CONFIG_DM_VIDEO

On 2/20/2020 1:43 PM, Fabio Estevam wrote: > Hi Troy, > > On Thu, Feb 20, 2020 at 6:37 PM Troy Kisky > wrote: >> >> Enable driver model for Video to remove compiler warning. >> To enable display, issue >> >> setenv stdout serial,vidconsole; >> >> Add CONFIG_DM_VIDEO to all defconfigs whose board

Re: [PATCH] board: nitrogen6x: migrate to CONFIG_DM_VIDEO

Hi Troy, On Thu, Feb 20, 2020 at 6:37 PM Troy Kisky wrote: > > Enable driver model for Video to remove compiler warning. > To enable display, issue > > setenv stdout serial,vidconsole; > > Add CONFIG_DM_VIDEO to all defconfigs whose board is > nitrogen6x. > mx6qsabrelite_defconfig >

[PATCH] board: nitrogen6x: migrate to CONFIG_DM_VIDEO

Enable driver model for Video to remove compiler warning. To enable display, issue setenv stdout serial,vidconsole; Add CONFIG_DM_VIDEO to all defconfigs whose board is nitrogen6x. mx6qsabrelite_defconfig nitrogen6dl2g_defconfig nitrogen6dl_defconfig

Re: [U-Boot] [RFC/RFT PATCH v4 3/3] image: Add compressed Image parsing support in booti.

On Tue, Feb 18, 2020 at 10:38 PM Tom Rini wrote: > > On Sun, Feb 16, 2020 at 04:48:22PM -0800, Atish Patra wrote: > > On Fri, Feb 14, 2020 at 8:43 AM Tom Rini wrote: > > > > > > On Thu, Feb 13, 2020 at 11:32:52PM +0200, David Abdurachmanov wrote: > > > > On Thu, Feb 13, 2020 at 6:17 PM Tom Rini

Re: [PATCH] env: ti: boot: Fix Android boot on AM57x EVM

Hi Eugeniu, On Thu, Feb 20, 2020 at 4:33 PM Eugeniu Rosca wrote: > > Hi Sam, > > On Wed, Feb 19, 2020 at 08:27:52PM +0200, Sam Protsenko wrote: > > When applying DTBO on top of DTB (with "fdt apply" command) on AM57x EVM > > board, there is not enough memory reserved in RAM for DTB blob. Hence,

Re: [PATCH v3] dm: uclass: don't assign aliased seq numbers

Hi Michal, Am 2020-02-20 11:14, schrieb Michal Simek: On 20. 02. 20 10:52, Michael Walle wrote: Hi Michal, Am 2020-02-20 09:30, schrieb Michal Simek: On 03. 02. 20 18:11, Michael Walle wrote: If there are aliases for an uclass, set the base for the "dynamically" allocated numbers next to

Re: [PATCH v2 06/21] configs: socfpga: Enable FIT image loading with ATF support

Am 20.02.2020 um 17:45 schrieb Marek Vasut: > On 2/20/20 3:15 AM, Ang, Chee Hong wrote: >>> On 2/19/20 1:25 PM, chee.hong@intel.com wrote: From: Chee Hong Ang SPL now loads ATF (BL31), U-Boot proper and DTB from FIT image. The new boot flow with ATF support is as follow:

Re: [PATCH 0/3] Remove CONFIG_MMC_BROKEN_CD

On Thu, Feb 20, 2020 at 01:45:31PM +0900, Jaehoon Chung wrote: > CONFIG_MMC_BROKEN_CD needs not to define to Kconfig. > broken-cd is already provide to dt-property. > If want to poll card-detect, set to broken-cd instead of enabling > CONFIG_MMC_BROKEN_CD. > > When checked the boards that is

RE: [PATCH v2 05/21] arm: socfpga: Override 'lowlevel_init' to support ATF

> On 2/20/20 3:27 AM, Ang, Chee Hong wrote: > >> On 2/19/20 1:25 PM, chee.hong@intel.com wrote: > >> [...] > >>> diff --git a/arch/arm/mach-socfpga/lowlevel_init.S > >>> b/arch/arm/mach-socfpga/lowlevel_init.S > >>> new file mode 100644 > >>> index 000..68053a0 > >>> --- /dev/null > >>>

Re: [PATCH] net: bcmgenet: Don't set ID_MODE_DIS when not using RGMII

On 2/20/20 8:36 AM, Nicolas Saenz Julienne wrote: > As per Linux's driver, ID_MODE_DIS is only set when the PHY interface is > RGMII. Don't enable it for the rest of setups. > > This has been seen to misconfigure RPi4's PHY when booting Linux. > > Signed-off-by: Nicolas Saenz Julienne Does the

Re: [PATCH] net: bcmgenet: Don't set ID_MODE_DIS when not using RGMII

On 20/02/2020 17:36, Nicolas Saenz Julienne wrote: > As per Linux's driver, ID_MODE_DIS is only set when the PHY interface is > RGMII. Don't enable it for the rest of setups. > > This has been seen to misconfigure RPi4's PHY when booting Linux. > > Signed-off-by: Nicolas Saenz Julienne > ---

[PATCH 2/2] sunxi: Remove no longer needed default options from defconfigs

Now that those common Allwinner config symbols are defined automatically for all boards in their Kconfig files, we can remove the now redundant definitions from the boards' _defconfig files. Some boards had a differing definiton for some of those symbols, it looks like mostly to "merge races"

Re: [PATCH] net: bcmgenet: Don't set ID_MODE_DIS when not using RGMII

On Thu, 2020-02-20 at 17:36 +0100, Nicolas Saenz Julienne wrote: > As per Linux's driver, ID_MODE_DIS is only set when the PHY interface is > RGMII. Don't enable it for the rest of setups. > > This has been seen to misconfigure RPi4's PHY when booting Linux. > > Signed-off-by: Nicolas Saenz

RE: [PATCH v2 11/21] arm: socfpga: Secure register access for clock manager (SoC 64bits)

> -Original Message- > From: Marek Vasut > Sent: Friday, February 21, 2020 12:48 AM > To: Ang, Chee Hong ; u-boot@lists.denx.de > Cc: Simon Goldschmidt ; See, Chin Liang > ; Tan, Ley Foon ; > Westergreen, Dalon ; Gong, Richard > ; Tom Rini ; Michal Simek > > Subject: Re: [PATCH v2

Re: [PATCH 0/2] sunxi: clean up defconfig files

On Thu, Feb 20, 2020 at 05:51:13PM +, Andre Przywara wrote: > With some recent additions and some old cruft, there are some config > options that were defined in *almost* every board defconfig file for > Allwinner SoCs. > This "almost" seems to point to bugs, either those options were missed

RE: [PATCH v2 10/21] arm: socfpga: Add secure register access helper functions for SoC 64bits

> On 2/20/20 3:02 AM, Ang, Chee Hong wrote: > [...] > >>> +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF) > >>> +u32 socfpga_secure_reg_read32(phys_addr_t reg_addr); void > >>> +socfpga_secure_reg_write32(u32 val, phys_addr_t reg_addr); void > >>>

[PATCH 1/2] sunxi: Move common defconfig options to Kconfig

Some config symbols are found in *almost* every _defconfig file for Allwinner boards, because those options are actually a platform choice, and not a per-board decision. Some of these options are older, some have recently been added. Move those options to be set for all Allwinner boards in their

[PATCH 0/2] sunxi: clean up defconfig files

With some recent additions and some old cruft, there are some config options that were defined in *almost* every board defconfig file for Allwinner SoCs. This "almost" seems to point to bugs, either those options were missed by mistake or failed to properly synchronise (when a new board defconfig

Re: [RFC PATCH 03/10] i2c: mmc: add nexell driver (gpio, i2c, mmc, pwm)

Hello Heiko, see below my feedback, please give me further advise where indicated. Unfortunately there have been some Bugs in the i2c-driver and I learned that this driver has not been used at all ("i2c-gpio" has been used instead). So I have done several Bugfixes and improvements appart from

[Patch v5 7/7] treewide: Update fsl qspi node dt properties as per spi-mem driver

According to new qspi driver, some properties like "bus-num, num-cs, big-endian" are no longer used. Device endiannes can be determined from device-type data in driver. Now use board specific compatibles, generic node names and specific labels to align with linux device-tree properties. Also

[Patch v5 5/7] configs: ls1012a: Enable CONFIG_SPI_FLASH_SPANSION in defconfigs

Since CONFIG_FSL_QSPI is already enabled for LS1012A in defconfigs. Also enable CONFIG_SPI_FLASH_SPANSION for LS1012A boards having spansion flashes. Signed-off-by: Ashish Kumar Signed-off-by: Kuldeep Singh --- v5: No change v4: Reword commit message. Add "in defconfigs" v3: Reword commit

[Patch v5 2/7] treewide: Remove unused FSL QSPI config options for Layerscape platforms

Some of these options are not used by the driver anymore and some of them are obsolete as the information is gathered from the dt. Also consolidating defines in common headers. Signed-off-by: Frieder Schrempf Signed-off-by: Ashish Kumar Signed-off-by: Kuldeep Singh --- v5: Keep only layerscape

[Patch v5 1/7] spi: Transform the FSL QuadSPI driver to use the SPI MEM API

To support the SPI MEM API, instead of modifying the existing U-Boot driver, this patch adds a port of the existing Linux driver. This also has the advantage that porting changes and fixes from Linux will be easier. Porting of driver left most of the functions unchanged while few of the changes

[Patch v5 6/7] configs: ls1046a: Move SPI_FLASH_SPANSION to defconfig

Enable CONFIG_SPI_FLASH_SPANSION in defconfigs of LS1046ARDB and LS1046AQDS which have two spansion flases i.e s25fs512s each of size 64M. Signed-off-by: Kuldeep Singh --- v5: No change v4: No change v3: No change v2: No change configs/ls1046aqds_qspi_defconfig | 1 +

[Patch v5 4/7] configs: ls1043a: Move CONFIG_FSL_QSPI and SPI_FLASH_SPANSION to defconfig

Move CONFIG_FSL_QSPI to the board defconfigs and while at it also move CONFIG_SPI_FLASH_SPANSION for LS1043AQDS. Signed-off-by: Frieder Schrempf Signed-off-by: Kuldeep Singh --- v5: No change v4: Move SPI_FLASH_SPANSION to defconfig v3: no change v2: No change

[Patch v5 3/7] treewide: Remove unused FSL QSPI config options for IMX platforms

Some of these options are not used by the driver anymore and some of them are obsolete as the information is gathered from the dt. So, remove the unused config options now. Signed-off-by: Frieder Schrempf Signed-off-by: Ashish Kumar Signed-off-by: Kuldeep Singh --- v5: New patch. Only imx

[Patch v5 0/7] Transition of fsl qspi driver to spi-mem framework

This entire patch series migrate freescale qspi driver to spi-mem framework. Patch 1 adds new qspi driver incorporating spi-mem framework and also removal of old driver which was based on spi-nor. The driver is a ported version of linux qspi driver. Initial port was done by Frieder. Now, no more

Re: [PATCH v2 01/21] configs: agilex: Remove CONFIG_OF_EMBED

On Thu, 2020-02-20 at 17:44 +0100, Marek Vasut wrote: On 2/20/20 3:12 AM, Ang, Chee Hong wrote: On 2/19/20 1:25 PM, chee.hong@intel.com wrote: From: Chee Hong Ang < chee.hong@intel.com > CONFIG_OF_EMBED was

[PATCH] net: bcmgenet: Don't set ID_MODE_DIS when not using RGMII

As per Linux's driver, ID_MODE_DIS is only set when the PHY interface is RGMII. Don't enable it for the rest of setups. This has been seen to misconfigure RPi4's PHY when booting Linux. Signed-off-by: Nicolas Saenz Julienne --- drivers/net/bcmgenet.c | 5 - 1 file changed, 4 insertions(+),

Re: [PATCH v2 10/21] arm: socfpga: Add secure register access helper functions for SoC 64bits

On 2/20/20 3:02 AM, Ang, Chee Hong wrote: [...] >>> +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF) >>> +u32 socfpga_secure_reg_read32(phys_addr_t reg_addr); void >>> +socfpga_secure_reg_write32(u32 val, phys_addr_t reg_addr); void >>> +socfpga_secure_reg_update32(phys_addr_t reg_addr,

Re: [PATCH v2 11/21] arm: socfpga: Secure register access for clock manager (SoC 64bits)

On 2/20/20 3:32 AM, Ang, Chee Hong wrote: >> On 2/19/20 1:25 PM, chee.hong@intel.com wrote: >>> From: Chee Hong Ang >>> >>> Allow clock manager driver to access the System Manager's Boot Scratch >>> Register 0 in non-secure mode (EL2) on SoC 64bits platform. >>> >>> Signed-off-by: Chee Hong

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