On 10/03/20 8:38 PM, Andrew F. Davis wrote:
> Additions have been made to the non-HS defconfig without the same
> being made to the HS defconfig, sync them.
>
> Signed-off-by: Andrew F. Davis
Applied to u-boot-ti/next
Thanks and regards,
Lokesh
Hi Andy,
On Tue, 10 Mar 2020 at 08:51, Andy Shevchenko
wrote:
>
> On Sat, Mar 07, 2020 at 04:22:13PM -0700, Simon Glass wrote:
> > This little series adds a few checks into the code to allow better
> > operation when booting a build from a previous-state loader such as
> > coreboot.
> >
> > At
Hi Tom,
On Mon, 9 Mar 2020 at 11:42, Tom Rini wrote:
>
> On Mon, Mar 09, 2020 at 11:10:55AM -0600, Stephen Warren wrote:
> > On 3/6/20 8:07 PM, Simon Glass wrote:
> > > It is a pain to have to set the ARCH and CROSS_COMPILE environment
> > > variables when using test.py's --build option. It is
Hi Sean
> On 3/10/20 2:51 AM, Rick Chen wrote:
> > Hi Sean
> >
> >>> For clocks not in the CCF, their parents will not have UCLASS_CLK, so we
> >>> just enable them as normal. The enable count is local to the struct clk,
> >>> but this will never result in the actual en-/dis-able op being called
Hi Sean
> On 3/10/20 5:04 AM, Rick Chen wrote:
> > Hi Sean
> >
> >> The Sipeed Maix series is a collection of boards built around the RISC-V
> >> Kendryte K210 processor. This processor contains several peripherals to
> >> accelerate neural network processing and other "ai" tasks. This includes a
On Tue, 10 Mar 2020 at 04:33, Alex Kiernan wrote:
>
> 4dbc107f4683 ("cmd: gpio: Correct do_gpio() return value") correctly
> changed the behaviour of the gpio command to return CMD_RET_SUCCESS or
> CMD_RET_FAILURE.
>
> But any existing script which expects the return value to be the pin
> value
Hi Sean
> On 3/10/20 5:08 AM, Rick Chen wrote:
> > Hi Sean
> >
> >> Where possible, I have tried to find compatible drivers based on the layout
> >> of registers. However, many devices remain untested. All untested devices
> >> have been left disabled, but some tentative properties (such as
Hi Sean
> On 3/10/20 4:20 AM, Rick Chen wrote:
> > Hi Sean
> >
> >> The IPI code could have race conditions in several places.
> >> * Several harts could race on the value of gd->arch->clint/plic
> >> * Non-boot harts could race with the main hart on the DM subsystem In
> >> addition, if an IPI
The R5F subsystem/cluster on K3 SoCs can support both LockStep and
Split-modes (superset) or just Split-mode depending on an eFUSE
capability register. The LockStep configuration bit is Read-only
though on Split-mode _only_ devices and as such the System Firmware
does not allow the LockStep mode
Hi Tom,
Please pull mmc-2020-3-9
--
DM support for CA SoCs
eMMC board for presidio-asic
Add defer probe for mmc sdhci
TI SoCs mmc misc update
--
CI: https://travis-ci.org/MrVan/u-boot/builds/659943777
Thanks,
Peng.
The
Tom,
On Tue, Mar 10, 2020 at 09:56:42AM -0600, Stephen Warren wrote:
> On 3/9/20 6:20 PM, AKASHI Takahiro wrote:
> > The commit 5fed97af20da ("Makefile: ensure DTB doesn't overflow into
> > initial stack") adds an extra check for stack size in BSS if
> > CONFIG_SYS_INIT_SP_BSS_OFFSET is enabled.
The Main R5FSS0 cluster is also enabled to probe the R5F remoteproc
driver within R5 SPL for booting the Core0 very early. This results
in a ti_sci_power_domain_on failure during the probe from the A72
U-Boot when "rproc init" is executed at U-Boot prompt, and doesn't
enumerate all the rproc
Hi Stephen,
On Mon, 9 Mar 2020 at 11:10, Stephen Warren wrote:
>
> On 3/6/20 8:07 PM, Simon Glass wrote:
> > It is a pain to have to set the ARCH and CROSS_COMPILE environment
> > variables when using test.py's --build option. It is possible to get these
> > using the -A and -a options from
Hi Andy,
On Mon, 9 Mar 2020 at 01:44, Andy Shevchenko wrote:
>
> On Mon, Mar 9, 2020 at 5:47 AM Simon Glass wrote:
> >
> > Some files are taken or modified from coreboot, but the files are
> > no-longer part of the coreboot project. Fix the wording in a few places.
> >
> > Signed-off-by: Simon
Hi Tom,
On Mon, 9 Mar 2020 at 11:46, Tom Rini wrote:
>
> On Fri, Mar 06, 2020 at 08:07:21PM -0700, Simon Glass wrote:
>
> > The current method of selecting the board to build is a bit error-prone,
> > e.g. with "^sandbox$" it actually builds 5 boards (all of those in the
> > sandbox
On Wed, Mar 04, 2020 at 08:03:48PM +0800, Sam Shih wrote:
> The binman-option BINMAN_FDT is introduced by this commit:
> commit 3c10dc95bdd0 ("binman: Add a library to access binman entries")
> BINMAN_FDT being selected when BINMAN=y that resulting in mt7623
> and mt7622 are unable to boot. The
The global module reset is deasserted through the ti_sci_power_domain_on()
call in k3_dsp_start(), but is not asserted back if the local module reset
fails. Fix this.
While at this, remove the stale comment about assigned-clock-rates that
seems to have been copied from the K3 ARM64 Remoteproc
The A72 U-Boot code supports early load and boot of a number of
remote processors including the C66_0 and C66_1 DSPs. The current
code supports only loading into the DDR regions which were already
given the appropriate memory attributes. The C66 DSPs also have L1
and L2 internal memory regions
The resets for the DSP processors on K3 SoCs are managed through the
Power and Sleep Controller (PSC) module. Each DSP typically has two
resets - a global module reset for powering on the device, and a local
reset that affects only the CPU while allowing access to the other
sub-modules within the
Hi All,
The following series updates the K3 DSP remoteproc driver to fix couple
of issues, and add the internal memory loading support on C66x DSPs.
Patches are on top of latest master branch.
Following is the patch summary:
- Patch 1 fixes a minor issue with the existing driver
- Patch 2 is a
The DSP remote processors on K3 SoCs require a boot register to be
programmed with a boot address, and these boot addresses need to be
aligned on certain address boundaries. The current code does not have
any error checks, and relies on the System Firmware to perform the
checking. Add logic to
On Mon, Feb 17, 2020 at 09:42:11AM +0100, Anatolij Gustschin wrote:
> Currently when booting the kernel on i.MX8 U-Boot hangs in an
> endless loop when switching off dma, connectivity or lsio power
> domains during device removal. It hapens first when removing
> gpio0 (gpio@5d08) device, here
2020-03-05
> 07:51:12 -0500)
>
> are available in the Git repository at:
>
> https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git
> tags/u-boot-imx-20200310
>
> for you to fetch changes up to 9f656fbee3b433ae1e9daf5d92d46bbdcc9551eb:
>
> mx6slevk: Convert to
On Tue, Mar 10, 2020 at 01:21:26PM +, eugen.hris...@microchip.com wrote:
> Hello Tom,
>
> Please pull tag u-boot-atmel-fixes-2020.04-a , the first set of fixes
> for the 2020.04 cycle.
> Includes two small configuration fixes that will solve the SPL booting
> on sama5d3_xplained board.
>
On Tue, Mar 10, 2020 at 09:26:06PM +0100, Anatolij Gustschin wrote:
> On Tue, 10 Mar 2020 13:37:32 -0400
> Tom Rini tr...@konsulko.com wrote:
>
> > On Tue, Mar 10, 2020 at 02:34:26PM -0300, Fabio Estevam wrote:
> > > On Tue, Mar 10, 2020 at 2:15 PM Tom Rini wrote:
> > >
> > > > I probably
On Tue, 10 Mar 2020 13:37:32 -0400
Tom Rini tr...@konsulko.com wrote:
> On Tue, Mar 10, 2020 at 02:34:26PM -0300, Fabio Estevam wrote:
> > On Tue, Mar 10, 2020 at 2:15 PM Tom Rini wrote:
> >
> > > I probably messed things up here then. With
> > > https://patchwork.ozlabs.org/patch/1239143/
On Tue, 10 Mar 2020 13:15:52 -0400
Tom Rini tr...@konsulko.com wrote:
> On Tue, Mar 10, 2020 at 01:37:33PM -0300, Fabio Estevam wrote:
> > Hi Stefano,
> >
> > On Tue, Mar 10, 2020 at 12:43 PM Stefano Babic wrote:
> > >
> > > Hi Tom,
> > >
> > > please pull (fixes) from u-boot-imx, thanks !
Am 10.03.2020 um 11:09 schrieb Patrick Delaunay:
> Add stub for functions clk_...() when CONFIG_CLK is deactivated.
>
> This patch avoids compilation issues for driver using these API
> without protection (#if CONFIG_IS_ENABLED(CLK))
>
> For example, before this patch we have undefined reference
Am 10.03.2020 um 11:09 schrieb Patrick Delaunay:
> Assert reset before deassert in dwc2_reset;
> this patch solve issues when the DWC2 registers are already
> initialized with value incompatible with host mode.
>
> Force a hardware reset of the IP reset all the DWC2 registers at
> default value,
Am 10.03.2020 um 17:42 schrieb Ang, Chee Hong:
>> -Original Message-
>> From: Simon Goldschmidt
>> Sent: Wednesday, March 11, 2020 12:17 AM
>> To: Ang, Chee Hong
>> Cc: u-boot@lists.denx.de; Marek Vasut ; See, Chin Liang
>> ; Tan, Ley Foon ;
>> Westergreen, Dalon ; Gong, Richard
>>
>>
Hi Joe,
On Tue, Mar 10, 2020 at 2:45 PM Joe Hershberger wrote:
> I tried to apply this but it breaks the unit tests. I guess you didn't
> try "ut dm" in sandbox?
>
> https://travis-ci.org/jhershbe/u-boot/builds/660395782
>
> Please test those and update the tests to pass with your change.
Ok,
On 3/10/20 6:01 PM, Patrick DELAUNAY wrote:
> Hi Marek,
>
>> From: Marek Vasut
>> Sent: mardi 10 mars 2020 16:20
>> Subject: Re: [PATCH v6 0/5] usb: host: dwc2: use driver model for PHY and
>> CLOCK
>> Importance: High
>>
>> On 3/10/20 11:09 AM, Patrick Delaunay wrote:
>>>
>>> In this serie I
On Tue, Mar 10, 2020 at 12:46:36PM -0500, Joe Hershberger wrote:
> Hi Michael,
>
> On Tue, Jan 7, 2020 at 5:07 AM Michael Walle wrote:
> >
> > Hi all,
> >
> > Am 2019-12-05 23:57, schrieb Michael Walle:
> > > [RESEND because I've forgot to add the mailinglist. Sorry!]
> > >
> > > This patch
Hi Michael,
On Tue, Jan 7, 2020 at 5:07 AM Michael Walle wrote:
>
> Hi all,
>
> Am 2019-12-05 23:57, schrieb Michael Walle:
> > [RESEND because I've forgot to add the mailinglist. Sorry!]
> >
> > This patch series superseeds the following two:
> > From Vladimir Oltean
> >
Hi Fabio,
On Thu, Jan 9, 2020 at 12:29 PM Fabio Estevam wrote:
>
> On some i.MX8QXP MEK boards with no MAC address stored, the following
> hang is seen:
>
> Error: ethernet@5b04 address not set.
>
> (Board hangs)
>
> One way to avoid this issue is to select CONFIG_NET_RANDOM_ETHADDR, so
>
On Tue, Mar 10, 2020 at 02:34:26PM -0300, Fabio Estevam wrote:
> On Tue, Mar 10, 2020 at 2:15 PM Tom Rini wrote:
>
> > I probably messed things up here then. With
> > https://patchwork.ozlabs.org/patch/1239143/ and
> > https://patchwork.ozlabs.org/patch/1239144/ is there not a different fix
> >
On Tue, Mar 10, 2020 at 2:15 PM Tom Rini wrote:
> I probably messed things up here then. With
> https://patchwork.ozlabs.org/patch/1239143/ and
> https://patchwork.ozlabs.org/patch/1239144/ is there not a different fix
> needed for i.MX8 now, or were there two issues here that I confused?
My
On Tue, Mar 10, 2020 at 01:37:33PM -0300, Fabio Estevam wrote:
> Hi Stefano,
>
> On Tue, Mar 10, 2020 at 12:43 PM Stefano Babic wrote:
> >
> > Hi Tom,
> >
> > please pull (fixes) from u-boot-imx, thanks !
>
> It seems that Anatolij's fix is still missing:
>
On Mon, Mar 09, 2020 at 11:10:28PM -0500, Joe Hershberger wrote:
> Hi Tom,
>
> Net changes that didn't cause regressions.
>
> https://travis-ci.org/jhershbe/u-boot/builds/660395685
>
> There are some other patches that are causing problems, so I'll just send
> these
> now and work with the
On Mon, Mar 09, 2020 at 01:25:17PM -0400, Tom Rini wrote:
> We keep both of these jobs in sync as much as possible even when the
> primary motivation is to keep Travis from exceeding the build time limit
> there. With that in mind:
> - Use "rk" not "rockchip" to get all Rockchip SoC platforms in
Am 09.03.2020 um 10:07 schrieb chee.hong@intel.com:
> From: Chee Hong Ang
>
> In device tree for all socfpga platforms, a phandle to System Manager
> ('altr,sysmgr-syscon') is needed for MMC node to enable the MMC driver
> to configure the SDMMC's clock phase shift via System Manager driver
Am 09.03.2020 um 10:07 schrieb chee.hong@intel.com:
> From: Chee Hong Ang
>
> Enable this misc driver model for 'altera_sysmgr' driver for
> socfpga platforms.
>
> Signed-off-by: Chee Hong Ang
> ---
> arch/arm/Kconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git
Am 09.03.2020 um 10:07 schrieb chee.hong@intel.com:
> From: "Ang, Chee Hong"
>
> v4 changes:
> [PATCH v4 11/21] misc: altera_sysmgr: Add Altera System Manager
> - Add System Manager driver (UCLASS_MISC) to handle secure access for SoC64
>
> [PATCH v4 13/21] mmc: dwmmc: socfpga: MMC driver
Hi Marek,
> From: Marek Vasut
> Sent: mardi 10 mars 2020 16:20
> Subject: Re: [PATCH v6 0/5] usb: host: dwc2: use driver model for PHY and
> CLOCK
> Importance: High
>
> On 3/10/20 11:09 AM, Patrick Delaunay wrote:
> >
> > In this serie I update the DWC2 host driver to use the device tree
> >
Am 10.03.2020 um 17:42 schrieb Ang, Chee Hong:
>> -Original Message-
>> From: Simon Goldschmidt
>> Sent: Wednesday, March 11, 2020 12:17 AM
>> To: Ang, Chee Hong
>> Cc: u-boot@lists.denx.de; Marek Vasut ; See, Chin Liang
>> ; Tan, Ley Foon ;
>> Westergreen, Dalon ; Gong, Richard
>>
>>
> -Original Message-
> From: Simon Goldschmidt
> Sent: Wednesday, March 11, 2020 12:17 AM
> To: Ang, Chee Hong
> Cc: u-boot@lists.denx.de; Marek Vasut ; See, Chin Liang
> ; Tan, Ley Foon ;
> Westergreen, Dalon ; Gong, Richard
>
> Subject: Re: [PATCH v4 11/21] misc: altera_sysmgr: Add
Hi Stefano,
On Tue, Mar 10, 2020 at 12:43 PM Stefano Babic wrote:
>
> Hi Tom,
>
> please pull (fixes) from u-boot-imx, thanks !
It seems that Anatolij's fix is still missing:
https://patchwork.ozlabs.org/patch/1239043/
It is needed for booting i.MX8/8X.
Thanks
Am 09.03.2020 um 10:07 schrieb chee.hong@intel.com:
> From: Chee Hong Ang
>
> This driver (misc uclass) handle the read/write access to
> System Manager. For 64 bits platforms, processor needs to be
> in secure mode to has write access to most of the System Manager's
> registers (except boot
On 3/9/20 6:20 PM, AKASHI Takahiro wrote:
The commit 5fed97af20da ("Makefile: ensure DTB doesn't overflow into
initial stack") adds an extra check for stack size in BSS if
CONFIG_SYS_INIT_SP_BSS_OFFSET is enabled.
This check, however, doesn't make sense under the configuration where
control dtb
/custodians/u-boot-imx.git
tags/u-boot-imx-20200310
for you to fetch changes up to 9f656fbee3b433ae1e9daf5d92d46bbdcc9551eb:
mx6slevk: Convert to DM_ETH (2020-03-10 10:59:08 +0100)
Fixes for 2020.04
-
- DM
> From: Igor Opaniuk
> Let pinctrl configuration for eMMC node (usdhc1) also be
> accessible in SPL.
> Signed-off-by: Igor Opaniuk
> Reviewed-by: Peng Fan
> Reviewed-by: Oleksandr Suvorov
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
> I would like to help co-maintaining this board.
> Signed-off-by: Fabio Estevam
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> Set CONFIG_SYS_BOOTMAPSZ to the amount of memory available which is needed
> to relocate the kernel, device tree and initrd.
> Remove 'fdt_high' and 'initrd_high' environment variables from default
> environment which prevents relocation of FDT and initrd.
> Signed-off-by: Oliver Graute
> Cc:
> Booting a mainline kernel in secure mode on i.MX7D causes only
> one CPU to be brought up.
> Change it to booting in non secure mode by default, which
> allows the two CPUs to be brought up.
> It does have a side effect of not probing the CAAM driver.
> If CAAM driver is needed then a secure
> This fixes the following warning:
> = WARNING ==
> This board does not use CONFIG_DM_ETH (Driver Model
> for Ethernet drivers). Please update the board to use
> CONFIG_DM_ETH before the v2020.07 release. Failure to
> update by the deadline may result in
> I would like to help co-maintaining this board.
> Signed-off-by: Fabio Estevam
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> added missing ahab.o in Makefile
> Signed-off-by: Oliver Graute
> Cc: Stefano Babic
> Cc: Fabio Estevam
> Cc: Peng Fan
> Cc: Simon Glass
> Cc: Ye Li
> Cc: uboot-imx
> Reviewed-by: Fabio Estevam
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
> From: Frieder Schrempf
> The current implementation in arch/arm/mach-imx/cpu.c uses non-DM
> code to retrieve the core clock frequency. As the root clock is not
> listed we currently get:
> CPU: Freescale i.MX8MMQ rev1.0 at 0 MHz
> Fix this by adding the missing entry, which results in:
>
> Sync the imx6sx dts files with kernel 5.4.16.
> Signed-off-by: Fabio Estevam
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB
> On the aristainetos2c boards the PMIC needs to be initialized,
> because the Ethernet PHY uses a different regulator that is not
> setup per hardware default. This does not influence the other
> versions as this regulator isn't used there at all.
> Signed-off-by: Heiko Schocher
Applied to
> Currently the expansion of the console variable leads to
> the following kernel command line:
> console=ttyLP0,${baudrate} earlycon root=/dev/mmcblk1p2 rootwait rw
> , which causes the console to not show characters after the LPUART driver
> is probed as the 'baudrate' variable is not properly
> From: Max Krummenacher
> The FEC in the i.MX8MM doesn't support this feature. So don't pretend one
> can use it.
> Signed-off-by: Max Krummenacher
> Signed-off-by: Igor Opaniuk
> Acked-by: Peng Fan
> Reviewed-by: Oleksandr Suvorov
Applied to u-boot-imx, master, thanks !
Best regards,
> Instead of resetting the ethernet phy through functions in imx8mq_evk.c, let
> the
> driver reset the phy via dts description adding a reset duration of 10 ms
> following atheros 8031's datasheet recommendation.
> Signed-off-by: Alifer Moraes
Applied to u-boot-imx, master, thanks !
Best
> This fixes the following warning:
> = WARNING ==
> This board does not use CONFIG_DM_ETH (Driver Model
> for Ethernet drivers). Please update the board to use
> CONFIG_DM_ETH before the v2020.07 release. Failure to
> update by the deadline may result in
> Convert imx6sabresd ethernet to driver model to fix the following warning:
> = WARNING ==
> This board does not use CONFIG_DM_ETH (Driver Model
> for Ethernet drivers). Please update the board to use
> CONFIG_DM_ETH before the v2020.07 release. Failure to
> Enale DM_PCI support in order to avoid board removal from
> the project.
> Signed-off-by: Fabio Estevam
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing
> Some device may enable CONFIG_CLK but not still support this clock in
> CC, so better use debug() in place of dev_warn() otherwise a lot of
> boards will throw useless dev_warn()s.
> Signed-off-by: Giulio Benetti
> Reviewed-by: Simon Glass
Applied to u-boot-imx, master, thanks !
Best regards,
> Sync the imx6sx-sdb dts files with kernel 5.4.16.
> Signed-off-by: Fabio Estevam
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> Before DM_VIDEO conversion this board used 24bpp
> display configuration, so use it again.
> Signed-off-by: Anatolij Gustschin
> Reviewed-by: Fabio Estevam
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
> Board is not longer used, remove it.
> Signed-off-by: Stefano Babic
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235
> fdt_high value of 0x disables fdt relocation on boot. We don't
> need that for Cubox-i/Hummingboard. Rely on generic code to find the
> optimal fdt location at boot time.
> Signed-off-by: Baruch Siach
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
> Added missing USDHC Base address defines
> Signed-off-by: Oliver Graute
> Cc: Stefano Babic
> Cc: Fabio Estevam
> Cc: Peng Fan
> Cc: Simon Glass
> Cc: Ye Li
> Cc: uboot-imx
> Reviewed-by: Fabio Estevam
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
> Soc supports cache so let's enable it.
> Signed-off-by: Giulio Benetti
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235
Hi Patrick
On 3/10/20 4:05 PM, Patrick Delaunay wrote:
> Correct the dependency for STM32 ETZPC protection, linked to SOC
> STM32MP identified by CONFIG_STM32MP15x and not linked to
> CONFIG_TARGET_STM32MP1 (no more existing).
>
> This patch fix an issue introduced by commit 846254888e2e
On 3/10/20 11:09 AM, Patrick Delaunay wrote:
>
> In this serie I update the DWC2 host driver to use the device tree
> information and the associated PHY and CLOCK drivers when they are
> availables.
>
> V6 is minor update of the first patch of the serie;
> I update some clk stub to return
On 3/10/20 4:15 AM, Lokesh Vutla wrote:
>
>
> On 09/03/20 9:56 PM, Andrew F. Davis wrote:
>> Additions have been made to the non-HS defconfig without the same
>> being made to the HS defconfig, sync them.
>
> As I said earlier, It is not easy for everyone to enable and test HS
> platforms.
>
Additions have been made to the non-HS defconfig without the same
being made to the HS defconfig, sync them.
Signed-off-by: Andrew F. Davis
---
Changes from v1:
- Rebased on u-boot-ti/next
configs/am65x_hs_evm_a53_defconfig | 49 +++---
Correct the dependency for STM32 ETZPC protection, linked to SOC
STM32MP identified by CONFIG_STM32MP15x and not linked to
CONFIG_TARGET_STM32MP1 (no more existing).
This patch fix an issue introduced by commit 846254888e2e ("stm32mp1:
split board and SOC support for STM32MP15x family").
On Sat, Mar 07, 2020 at 04:22:13PM -0700, Simon Glass wrote:
> This little series adds a few checks into the code to allow better
> operation when booting a build from a previous-state loader such as
> coreboot.
>
> At present we have a 'coreboot' target but this runs very different code
> from
On Sun, Mar 08, 2020 at 09:44:37PM -0600, Simon Glass wrote:
> Devices need to report various identifiers in the ACPI tables. Rather than
> hard-coding these in drivers it is typically better to put them in the
> device tree.
>
> Add a binding file to describe this.
...
> +Device bindings are
On Sun, Mar 08, 2020 at 09:44:36PM -0600, Simon Glass wrote:
> ACPI (Advanced Configuration and Power Interface) is an Intel standard
Not Intel for a long time. Or more precisely, not *only* Intel.
Also this should be corrected (I guess dropping Intel would work) everywhere in
this series.
>
On Sun, Mar 08, 2020 at 09:44:33PM -0600, Simon Glass wrote:
> With P2SB the initial BAR (base-address register) is set up by TPL and
> this is used unchanged right through U-Boot.
>
> At present the reading of this address is split between the ofdata() and
> probe() methods. There are a few
Hi Philippe,
On Mon, Mar 9, 2020 at 8:25 PM Philippe Schenker
wrote:
>
> This patches uses the existing functions for interacting with the
> KSZ9031 and uses the values appropriate for our board.
>
> Signed-off-by: Philippe Schenker
> ---
>
> board/toradex/verdin-imx8mm/verdin-imx8mm.c | 32
Hi Philippe,
On Mon, Mar 9, 2020 at 8:26 PM Philippe Schenker
wrote:
>
> This patch determines which phy is placed on the board with the PHY ID
> then it sets the same settings for KSZ9031 as before but for KSZ9131
> it enables both RXC and TXC delay lines in the PHY.
> This will compensate the
On Tue, Mar 10, 2020 at 12:37 PM Tom Rini wrote:
>
> On Tue, Mar 10, 2020 at 09:47:33AM +, Alex Kiernan wrote:
> > On Sat, Feb 8, 2020 at 12:06 AM Tom Rini wrote:
> > >
> > > On Sun, Jan 05, 2020 at 08:10:56PM +0100, Luka Kovacic wrote:
> > >
> > > > Use the correct return value in function
Hello Tom,
Please pull tag u-boot-atmel-fixes-2020.04-a , the first set of fixes
for the 2020.04 cycle.
Includes two small configuration fixes that will solve the SPL booting
on sama5d3_xplained board.
Thanks!
Eugen
The following changes since commit 548ce227d3d852455c6395c0cec30af0cda77b09:
On 3/10/20 5:04 AM, Rick Chen wrote:
> Hi Sean
>
>> The Sipeed Maix series is a collection of boards built around the RISC-V
>> Kendryte K210 processor. This processor contains several peripherals to
>> accelerate neural network processing and other "ai" tasks. This includes a
>> "KPU" neural
On 3/10/20 5:08 AM, Rick Chen wrote:
> Hi Sean
>
>> Where possible, I have tried to find compatible drivers based on the layout
>> of registers. However, many devices remain untested. All untested devices
>> have been left disabled, but some tentative properties (such as compatible
>> strings,
On 3/10/20 4:20 AM, Rick Chen wrote:
> Hi Sean
>
>> The IPI code could have race conditions in several places.
>> * Several harts could race on the value of gd->arch->clint/plic
>> * Non-boot harts could race with the main hart on the DM subsystem In
>> addition, if an IPI was pending when
Hi Pratik,
On Tue, Mar 10, 2020 at 2:11 PM Pratik Rajyaguru
wrote:
>
> Hi Igor,
>
> I have already posted query in NXP Community. Here's thread:
> https://community.nxp.com/message/1270693
>
> I received suggestion to post in u-boot mailing list, because the query is
> specific to u-boot
On 3/10/20 2:51 AM, Rick Chen wrote:
> Hi Sean
>
>>> For clocks not in the CCF, their parents will not have UCLASS_CLK, so we
>>> just enable them as normal. The enable count is local to the struct clk,
>>> but this will never result in the actual en-/dis-able op being called
>>> (unless the same
Hi Simon,
-"Simon Glass" schrieb: -
>
> Add a sandbox test for the basic ACPI functionality we have so far.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Bin Meng
> ---
>
> Changes in v2:
> - Add in the acpi_table.h header file to this patch
>
> arch/sandbox/dts/test.dts
On Tue, Mar 10, 2020 at 09:47:33AM +, Alex Kiernan wrote:
> On Sat, Feb 8, 2020 at 12:06 AM Tom Rini wrote:
> >
> > On Sun, Jan 05, 2020 at 08:10:56PM +0100, Luka Kovacic wrote:
> >
> > > Use the correct return value in function do_gpio() and update
> > > commands documentation with the
Hi Simon,
-"Simon Glass" schrieb: -
>
> This function needs to be used by sandbox for tests. Move it into the
> generic directory.
Nit: Move it into the generic directory and add a test for it.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Bin Meng
> ---
>
> Changes in v2: None
>
Hi Simon,
-"Simon Glass" schrieb: -
>
> The DMA Remapping Reporting (DMAR) table contains information about DMA
> remapping.
>
> Add a version simple version of this table with only the minimum fields
> filled out. i.e. no entries.
>
> Reviewed-by: Bin Meng
> Signed-off-by: Simon
On Tue, Mar 10, 2020 at 01:05:31PM +0100, Stefano Babic wrote:
> Hi Tom,
>
> On 10.03.20 12:55, Tom Rini wrote:
> > On Tue, Mar 10, 2020 at 10:48:43AM +0100, Stefano Babic wrote:
> >
> >> Hi,
> >>
> >> was the job time on travis reduced ? Even if jobs are high split, I get
> >> several task
Hi Igor,
I have already posted query in NXP Community. Here's thread:
https://community.nxp.com/message/1270693
I received suggestion to post in u-boot mailing list, because the query is
specific to u-boot booting counter mechanism and commands.
Please suggest, if any insight related to
Hi Philippe,
On Mon, Mar 9, 2020 at 8:25 PM Philippe Schenker
wrote:
>
> Those properties are not supported by MAC on i.MX8MM
>
> Signed-off-by: Philippe Schenker
> ---
>
> arch/arm/dts/imx8mm-verdin.dts | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/arm/dts/imx8mm-verdin.dts
Hi Tom,
On 10.03.20 12:55, Tom Rini wrote:
> On Tue, Mar 10, 2020 at 10:48:43AM +0100, Stefano Babic wrote:
>
>> Hi,
>>
>> was the job time on travis reduced ? Even if jobs are high split, I get
>> several task failures due to "job time". This comprises "non i.MX6 catch
>> all", "catch all ARM"
Hi Pratik,
On Tue, Mar 10, 2020 at 12:37 PM Pratik Rajyaguru
wrote:
>
> Hello All,
>
> I want to set boot count to 5 for iMX.6 to set attempt counter, in case of
> failures at boot time. I am using both Dual and Dual lite modules.
>
> U-boot source code reference: Freescale's U-Boot 2014.04.
>
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