> Subject: RE: [PATCH 20/27] dm: ppc: MPC8548CDS: add i2c DM support
>
> >-Original Message-
> >From: U-Boot On Behalf Of Biwen Li
> >Sent: Sunday, April 12, 2020 2:24 PM
> >To: Jagdish Gediya ; Priyanka Jain
> >; h...@denx.de; ja...@amarulasolutions.com;
> >aford...@gmail.com; Alison
On 4/16/20 8:02 PM, Tom Rini wrote:
[...]
> I will not grow 200+ boards when there's
> an easy way not to.
By ~6 bytes, which happens with almost every DM patch.
I am not buying the size argument.
>>>
>>> Nope, not true. Boards with tiny printf rarely grow their SPL size
On Mon, Apr 06, 2020 at 05:58:19PM +0530, Amit Singh Tomar wrote:
> This adds Cubieboard7[1] support based on Action Semi's S700 SoC[2], It's
> Quad-core ARMv8 SoC
> with Cortex-A53 cores. Peripheral like UART seems to be compatible with S900
> SoC(basic support
> for it is alreay present in
Hi Atish,
On Fri, Apr 17, 2020 at 10:14 AM Bin Meng wrote:
>
> Correct Palmer's email address
>
> On Fri, Apr 17, 2020 at 10:12 AM Bin Meng wrote:
> >
> > Hi Rick,
> >
> > On Fri, Apr 17, 2020 at 9:12 AM Rick Chen wrote:
> > >
> > > Hi Bin
> > >
> > > > Hi Rick,
> > > >
> > > > On Fri, Apr 17,
Correct Palmer's email address
On Fri, Apr 17, 2020 at 10:12 AM Bin Meng wrote:
>
> Hi Rick,
>
> On Fri, Apr 17, 2020 at 9:12 AM Rick Chen wrote:
> >
> > Hi Bin
> >
> > > Hi Rick,
> > >
> > > On Fri, Apr 17, 2020 at 8:51 AM Rick Chen wrote:
> > > >
> > > > 於 2020年4月17日 週五 上午8:39寫道：
> > > > >
On Thu, Apr 16, 2020 at 07:01:54PM +0200, Heinrich Schuchardt wrote:
> The following changes since commit 9cb3ce2558ba1fc058dfb26a07fc02603773a211:
>
> Merge branch 'master' of git://git.denx.de/u-boot-marvell (2020-04-15
> 08:30:16 -0400)
>
> are available in the Git repository at:
>
>
On Thu, Apr 16, 2020 at 08:49:16PM +, Alexey Brodkin wrote:
> Hi Tom,
>
> The following changes since commit dba0a6ae1907bbff3ebda06e4874d006f10db1bb:
>
> Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86 (2020-04-16
> 08:56:37 -0400)
>
> are available in the Git repository at:
Hi Rick,
On Fri, Apr 17, 2020 at 9:12 AM Rick Chen wrote:
>
> Hi Bin
>
> > Hi Rick,
> >
> > On Fri, Apr 17, 2020 at 8:51 AM Rick Chen wrote:
> > >
> > > 於 2020年4月17日 週五 上午8:39寫道：
> > > >
> > > >
> > > >
> > > > -Original Message-
> > > > From: Atish Patra [mailto:ati...@atishpatra.org]
Hi Tom,
Perhaps I missed something other than pressing efforts for a 2020.04 release.
Could we review open patches submitted by myself
and let us know if there is anything we can do to move them along for further
feedback? Feels like they have been in a holding pattern for
a while now.
Hi Tom,
Perhaps I missed something other than pressing efforts for a 2020.04 release.
Could you review open patches submitted by myself
and let me know if there is anything we can do to move them along for further
feedback? Feels like they have been in a holding pattern for
a while now.
The current recommendation for best security practice from the US government
is to use SHA384 for TOP SECRET [1].
This patch adds support for SHA384 and SHA512 in the hash command, and also
allows FIT images to be hashed with these algorithms, and signed with
sha384,rsa and sha512,rsa
Hello all,
I am encountering considerable difficulty with the networking functionality on
Raspberry Pi 4 on the latest release (2020.04). In particular, I have observed:
* any network operation that fails renders networking functionality
inoperable until reboot.
* ping always fails.
Signed-off-by: Mizan R
---
arch/arm/dts/Makefile | 1 +
.../dts/sun8i-h2-plus-bananapi-p2-zero.dts| 181 ++
configs/Sinovoip_BPI_P2_Zero_defconfig| 20 ++
3 files changed, 202 insertions(+)
create mode 100644
From: Pengpeng Chen
Add SPI Flash controller driver for Cortina Access
CA SoCs
Signed-off-by: Pengpeng Chen
Signed-off-by: Alex Nemirovsky
CC: Jagan Teki
CC: Vignesh R
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Fixup syntax issues related to checkpatch.pl cleanup
Add SPI NOR support for Cortina Access
Presidio Engineering Board
Signed-off-by: Alex Nemirovsky
CC: Jagan Teki
CC: Vignesh R
---
Changes in v5:
- NAND support removed from presidio-asic board DT.
Changes in v4: None
Changes in v3: None
Changes in v2: None
From: Jway Lin
Add Cortina Access LED controller support for CA SOCs
Signed-off-by: Jway Lin
Signed-off-by: Alex Nemirovsky
CC: Simon Glass
---
Changes in v5: None
Changes in v4:
- remove unused macros
- remove cortina prefix from macros
- remove use BSS variable
- further cleanup to
On Wed, Apr 15, 2020 at 5:25 AM Lukas Auer
wrote:
>
> The commit was added as a workaround required in QEMU when using BBL as
> the supervisor binary interface (SBI) for Linux. We are now using
> OpenSBI to provide the SBI, the workaround is therefore not required
> anymore and can be removed.
>
From: Jway Lin
Add LED support for Cortina Access Presidio Engineering Board
Signed-off-by: Jway Lin
Signed-off-by: Alex Nemirovsky
Reviewed-by: Simon Glass
CC: Simon Glass
---
Changes in v5: None
Changes in v4:
- rename DT blink rate symbol
Changes in v3: None
Changes in v2: None
From: Arthur Li
- Rename DT compatible name
- Remove uneccessary if-statement to support 8-bit buswidth
- Remove redundant error msg
- Use symbolic constants in switch statement
Signed-off-by: Arthur Li
Signed-off-by: Alex Nemirovsky
CC: Peng Fan
---
Changes in v5:
- Rebase code basis on
Change DT compatiblity name to match change in driver's name.
Remove unused io_ds and fifo_mode fields from DT.
Signed-off-by: Alex Nemirovsky
CC: Peng Fan
---
Changes in v5:
- Rebase on codebase basis v2020.04-rc5 which already incorporated
initial baseline of eMMC DT information
Changes
This release adds the following drivers and
integrates support into the Cortina Access
Presidio Engineering Board:
CA SoC eMMC/SD controller
CA SoC I2C controller
CA Soc LED controller
CA SPI NAND and NOR controller
Changes in v5:
- Rebase code basis on v2020.04-rc5 which has
From: Arthur Li
Add I2C controller support for Cortina Access CA SoCs
Signed-off-by: Arthur Li
Signed-off-by: Alex Nemirovsky
CC: Heiko Schocher
---
Changes in v5: None
Changes in v4:
- Utilize standard I2C macros from
- Return ETIMEDOUT in funcs that can timeout
- Return
Add I2C board support for Cortina Access Presidio Engineering Board
Signed-off-by: Alex Nemirovsky
CC: Heiko Schocher
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
configs/cortina_presidio-asic-emmc_defconfig | 3 +++
1 file changed, 3 insertions(+)
From: Pengpeng Chen
Add SPI Flash controller driver for Cortina Access
CA SoCs
Signed-off-by: Pengpeng Chen
Signed-off-by: Alex Nemirovsky
CC: Jagan Teki
CC: Vignesh R
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Fixup syntax issues related to checkpatch.pl cleanup
From: Jway Lin
Add LED support for Cortina Access Presidio Engineering Board
Signed-off-by: Jway Lin
Signed-off-by: Alex Nemirovsky
Reviewed-by: Simon Glass
CC: Simon Glass
---
Changes in v5: None
Changes in v4:
- rename DT blink rate symbol
Changes in v3: None
Changes in v2: None
Change DT compatiblity name to match change in driver's name.
Remove unused io_ds and fifo_mode fields from DT.
Signed-off-by: Alex Nemirovsky
CC: Peng Fan
---
Changes in v5:
- Rebase on codebase basis v2020.04-rc5 which already incorporated
initial baseline of eMMC DT information
Changes
Add SPI NOR support for Cortina Access
Presidio Engineering Board
Signed-off-by: Alex Nemirovsky
CC: Jagan Teki
CC: Vignesh R
---
Changes in v5:
- NAND support removed from presidio-asic board DT.
Changes in v4: None
Changes in v3: None
Changes in v2: None
Add I2C board support for Cortina Access Presidio Engineering Board
Signed-off-by: Alex Nemirovsky
CC: Heiko Schocher
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
configs/cortina_presidio-asic-emmc_defconfig | 3 +++
1 file changed, 3 insertions(+)
From: Arthur Li
Add I2C controller support for Cortina Access CA SoCs
Signed-off-by: Arthur Li
Signed-off-by: Alex Nemirovsky
CC: Heiko Schocher
---
Changes in v5: None
Changes in v4:
- Utilize standard I2C macros from
- Return ETIMEDOUT in funcs that can timeout
- Return
From: Jway Lin
Add Cortina Access LED controller support for CA SOCs
Signed-off-by: Jway Lin
Signed-off-by: Alex Nemirovsky
CC: Simon Glass
---
Changes in v5: None
Changes in v4:
- remove unused macros
- remove cortina prefix from macros
- remove use BSS variable
- further cleanup to
This release adds the following drivers and
integrates support into the Cortina Access
Presidio Engineering Board:
CA SoC eMMC/SD controller
CA SoC I2C controller
CA Soc LED controller
CA SPI NAND and NOR controller
Changes in v5:
- Rebase code basis on v2020.04-rc5 which has
From: Arthur Li
- Rename DT compatible name
- Remove uneccessary if-statement to support 8-bit buswidth
- Remove redundant error msg
- Use symbolic constants in switch statement
Signed-off-by: Arthur Li
Signed-off-by: Alex Nemirovsky
CC: Peng Fan
---
Changes in v5:
- Rebase code basis on
Hi Bin
> Hi Rick,
>
> On Fri, Apr 17, 2020 at 8:51 AM Rick Chen wrote:
> >
> > 於 2020年4月17日 週五 上午8:39寫道：
> > >
> > >
> > >
> > > -Original Message-
> > > From: Atish Patra [mailto:ati...@atishpatra.org]
> > > Sent: Wednesday, April 15, 2020 7:18 AM
> > > To: Bin Meng
> > > Cc: Ard
Hi Rick,
On Fri, Apr 17, 2020 at 8:51 AM Rick Chen wrote:
>
> 於 2020年4月17日 週五 上午8:39寫道：
> >
> >
> >
> > -Original Message-
> > From: Atish Patra [mailto:ati...@atishpatra.org]
> > Sent: Wednesday, April 15, 2020 7:18 AM
> > To: Bin Meng
> > Cc: Ard Biesheuvel; Heinrich Schuchardt;
於 2020年4月17日 週五 上午8:39寫道：
>
>
>
> -Original Message-
> From: Atish Patra [mailto:ati...@atishpatra.org]
> Sent: Wednesday, April 15, 2020 7:18 AM
> To: Bin Meng
> Cc: Ard Biesheuvel; Heinrich Schuchardt; U-Boot Mailing List; Anup Patel;
> Lukas Auer; Alexander Graf; Rick Jian-Zhi
Sorry for sending this twice.
The first submission had the wrong patch 3/5.
On Thu, Apr 16, 2020 at 9:10 PM Fabio Estevam wrote:
>
> The detection of the revD1 version is based on the presence of the PMIC.
>
> Currently revb1 device trees are used for mx6q/mx6dl variants, which
> do not have
On systems that can run on multiple board variants, such as wandboard,
which versions with and without the PMIC populated, it is not useful
to get PMIC error on systems that do not have the PMIC populated.
Change error message level to debug instead.
Signed-off-by: Fabio Estevam
---
Since we are using revD1 device tree for all board revisions, the
following can be seen on a revB1 board:
Model: Wandboard i.MX6 Quad Board revD1
Board: Wandboard rev B1
To avoid such confusing messages, disable CONFIG_DISPLAY_BOARDINFO_LATE.
Signed-off-by: Fabio Estevam
---
Since the variant revision is no longer show, simply get rid
of checkboard().
Move the gpio_request() prior to its usage.
Signed-off-by: Fabio Estevam
---
board/wandboard/wandboard.c | 15 +--
1 file changed, 1 insertion(+), 14 deletions(-)
diff --git a/board/wandboard/wandboard.c
On wandboard variants prior to revD1, there is no PMIC populated, so
do not print an error when the reading of the device ID register fails.
Signed-off-by: Fabio Estevam
---
board/wandboard/wandboard.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
The detection of the revD1 version is based on the presence of the PMIC.
Currently revb1 device trees are used for mx6q/mx6dl variants, which
do not have the PMIC nodes.
This causes revD1 boards to be incorrectly be detected as revB1.
Use the revd1 device trees, so that the PMIC node can be
After the conversion to DM_PMIC the following output is seen:
PMIC: PMIC: PFUZE100 ID=0x10
Remove the unnecessary PMIC string from the board file to
avoid the repetead string.
Signed-off-by: Fabio Estevam
---
Changes since v2:
- None
board/wandboard/wandboard.c | 2 --
1 file changed, 2
Since the variant revision is no longer show, simply get rid
of checkboard().
Move the gpio_request() prior to its usage.
Signed-off-by: Fabio Estevam
---
board/wandboard/wandboard.c | 15 +--
1 file changed, 1 insertion(+), 14 deletions(-)
diff --git a/board/wandboard/wandboard.c
Since we are using revD1 device tree for all board revisions, the
following can be seen on a revB1 board:
Model: Wandboard i.MX6 Quad Board revD1
Board: Wandboard rev B1
To avoid such confusing messages, disable CONFIG_DISPLAY_BOARDINFO_LATE.
Signed-off-by: Fabio Estevam
---
On systems that can run on multiple board variants, such as wandboard,
which versions with and without the PMIC populated, it is not useful
to get PMIC error on systems that do not have the PMIC populated.
Change error message level to debug instead.
Signed-off-by: Fabio Estevam
---
The detection of the revD1 version is based on the presence of the PMIC.
Currently revb1 device trees are used for mx6q/mx6dl variants, which
do not have the PMIC nodes.
This causes revD1 boards to be incorrectly be detected as revB1.
Use the revd1 device trees, so that the PMIC node can be
Heinrich,
On Thu, Apr 16, 2020 at 04:20:35PM +0200, Heinrich Schuchardt wrote:
> On 14.04.20 04:51, AKASHI Takahiro wrote:
> > UEFI specification defines several global variables which are related to
> > the current secure boot state. In this commit, those values will be
> > maintained according
On Tuesday 14 April 2020 14:01:44 Pali Rohár wrote:
> On Tuesday 14 April 2020 17:21:24 Lokesh Vutla wrote:
> > On 14/04/20 4:47 PM, Pali Rohár wrote:
> > > On Tuesday 14 April 2020 16:14:08 Lokesh Vutla wrote:
> > >> On 14/04/20 4:01 PM, Pali Rohár wrote:
> > >>> On Tuesday 14 April 2020 15:53:14
Hi Tom,
The following changes since commit dba0a6ae1907bbff3ebda06e4874d006f10db1bb:
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86 (2020-04-16
08:56:37 -0400)
are available in the Git repository at:
g...@gitlab.denx.de:u-boot/custodians/u-boot-arc.git
On Thu, Apr 16, 2020 at 09:15:39AM -0600, Simon Glass wrote:
> Hi Tom,
>
> This one is against master since you have pulled in the -next branch
> now. I have dropped the offending commit.
>
> https://gitlab.denx.de/u-boot/custodians/u-boot-dm/pipelines/2786
>
>
>
> The following changes
We set wrong tunnel PLL frequency when we request 125MHz tunnel clock.
Fix that.
Signed-off-by: Eugeniy Paltsev
---
drivers/clk/clk-hsdk-cgu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c
index
On Wed, Apr 15, 2020 at 06:14:18PM +0200, Neil Armstrong wrote:
> Tom, Marek,
>
> On 30/03/2020 11:27, Neil Armstrong wrote:
> > Add generic_phy_get_by_node() to get a PHY phandle from a node instead
> > of a udevice.
> >
> > Signed-off-by: Neil Armstrong
> > ---
> > drivers/phy/phy-uclass.c |
On Thu, Apr 16, 2020 at 03:39:19PM +0200, Marek Vasut wrote:
> On 4/16/20 3:21 PM, Tom Rini wrote:
> > On Thu, Apr 16, 2020 at 03:11:45PM +0200, Marek Vasut wrote:
> >> On 4/16/20 2:55 PM, Tom Rini wrote:
> >>> On Wed, Apr 15, 2020 at 08:06:45PM +0200, Marek Vasut wrote:
> On 4/15/20 7:44 PM,
On Thu, Apr 16, 2020 at 07:11:12PM +0800, Bin Meng wrote:
> Hi Tom,
>
> This includes the following changes for v2020.07:
>
> - Provide serial base clock speed via getinfo() for ACPI SPCR
> - Initial ACPI support from DM core by leveraging existing ACPI support in x86
>
> The following changes
Hi Matt,
On Thu, Apr 9, 2020 at 6:51 PM Matt Porter wrote:
Hopefully this dts will be sent upstream.
> +/ {
> + model = "InnoComm i.MX8MM WB15EVK";
> + compatible = "fsl,imx8mm-wb15evk", "fsl,imx8mm";
Should be "innocomm,imx8mm-wb15evk", "fsl,imx8mm" instead, since the
board
On 4/16/20 11:06 AM, Tom Rini wrote:
> On Thu, Apr 16, 2020 at 05:47:41PM +0200, Michal Simek wrote:
>> On 16. 04. 20 17:39, Tom Rini wrote:
>>> On Mon, Apr 13, 2020 at 10:03:04AM +0200, Michal Simek wrote:
>>>
From: Ashok Reddy Soma
FDT memory is aligned by 4KB. This is hardcoded
On 16.04.20 19:00, Tom Rini wrote:
> On Thu, Apr 16, 2020 at 05:37:56PM +0200, Heinrich Schuchardt
> wrote:
>> On 4/16/20 4:32 AM, Tom Rini wrote:
>>> On Wed, Apr 15, 2020 at 06:46:23PM +0200, Heinrich Schuchardt
>>> wrote:
>>>
We cannot run unit tests in SPL. So remove the unit test
On Thu, Apr 16, 2020 at 05:47:41PM +0200, Michal Simek wrote:
> On 16. 04. 20 17:39, Tom Rini wrote:
> > On Mon, Apr 13, 2020 at 10:03:04AM +0200, Michal Simek wrote:
> >
> >> From: Ashok Reddy Soma
> >>
> >> FDT memory is aligned by 4KB. This is hardcoded in common/board_f.c.
> >> Add Kconfig
On Thu, Apr 16, 2020 at 06:30:48PM +0200, Heinrich Schuchardt wrote:
> On 4/16/20 4:32 AM, Tom Rini wrote:
> > On Wed, Apr 15, 2020 at 06:46:20PM +0200, Heinrich Schuchardt wrote:
> >
> >> Date functions are only needed in SPL if SPL contains RTC drivers.
> >>
> >> Fixes: 05429b6cf5b3 ("rtc: move
On Thu, Apr 16, 2020 at 06:27:00PM +0200, Heinrich Schuchardt wrote:
> On 4/16/20 4:32 AM, Tom Rini wrote:
> > On Wed, Apr 15, 2020 at 06:46:22PM +0200, Heinrich Schuchardt wrote:
> >
> >> SPL should not be enlarged by building with CONFIG_HEXDUMP=y.
> >>
> >> Signed-off-by: Heinrich Schuchardt
>
Hi Marek,
On Wed, Apr 1, 2020 at 9:42 PM Marek Vasut wrote:
> @@ -0,0 +1,416 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2018 Wandboard, Org.
> + * Copyright 2017 NXP
> + *
> + * Author: Richard Hu
> + */
> +
> +/dts-v1/;
> +
> +/* First 128KB is for PSCI ATF. */
>
The following changes since commit 9cb3ce2558ba1fc058dfb26a07fc02603773a211:
Merge branch 'master' of git://git.denx.de/u-boot-marvell (2020-04-15
08:30:16 -0400)
are available in the Git repository at:
https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git
tags/efi-2020-07-rc1
for you to
On Thu, Apr 16, 2020 at 05:49:13PM +0200, Heinrich Schuchardt wrote:
> On 4/16/20 4:32 AM, Tom Rini wrote:
> > On Wed, Apr 15, 2020 at 06:46:19PM +0200, Heinrich Schuchardt wrote:
> >
> >> The OID registry is only used by crypto functions that are not built in
> >> SPL. So we should not build it
On Thu, Apr 16, 2020 at 05:37:56PM +0200, Heinrich Schuchardt wrote:
> On 4/16/20 4:32 AM, Tom Rini wrote:
> > On Wed, Apr 15, 2020 at 06:46:23PM +0200, Heinrich Schuchardt wrote:
> >
> >> We cannot run unit tests in SPL. So remove the unit test support.
> >>
> >> Signed-off-by: Heinrich
On 4/14/20 9:46 AM, Michal Simek wrote:
> On 14. 04. 20 1:38, Heinrich Schuchardt wrote:
>> On 4/13/20 10:03 AM, Michal Simek wrote:
>>> From: Ashok Reddy Soma
>>>
>>> FDT memory is aligned by 4KB. This is hardcoded in common/board_f.c.
>>> Add Kconfig option, assign default value of 0x1000 and
On 4/16/20 4:32 AM, Tom Rini wrote:
> On Wed, Apr 15, 2020 at 06:46:20PM +0200, Heinrich Schuchardt wrote:
>
>> Date functions are only needed in SPL if SPL contains RTC drivers.
>>
>> Fixes: 05429b6cf5b3 ("rtc: move date.c from drivers/rtc/ to lib/")
>> Signed-off-by: Heinrich Schuchardt
>
>
On 4/16/20 4:32 AM, Tom Rini wrote:
> On Wed, Apr 15, 2020 at 06:46:22PM +0200, Heinrich Schuchardt wrote:
>
>> SPL should not be enlarged by building with CONFIG_HEXDUMP=y.
>>
>> Signed-off-by: Heinrich Schuchardt
>> ---
>> lib/hexdump.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
Hi Tom,
On 23/03/2020 19:42, Simon Glass wrote:
Hi Fred,
On Mon, 23 Mar 2020 at 10:20, Frédéric Danis
wrote:
Hi Simon,
On 19/03/2020 17:18, Simon Glass wrote:
On Wed, 18 Mar 2020 at 02:17, Frédéric Danis
wrote:
Hi Simon,
Sorry I missed to add the change log.
Since v1:
- Add
Hi Fabio, Simon and Anatolij,
On 4/16/20 5:23 PM, Fabio Estevam wrote:
Hi Giulio,
On Thu, Apr 16, 2020 at 12:20 PM Giulio Benetti
wrote:
Ah I didn't know I had to point someone.
So in this case would be either Stefano or Fabio and indeed Fabio
answered before here:
On 4/16/20 4:32 AM, Tom Rini wrote:
> On Wed, Apr 15, 2020 at 06:46:19PM +0200, Heinrich Schuchardt wrote:
>
>> The OID registry is only used by crypto functions that are not built in
>> SPL. So we should not build it in SPL.
>>
>> Fixes: a9b45e6e8382 ("lib: add oid registry utility")
>>
On 16. 04. 20 17:39, Tom Rini wrote:
> On Mon, Apr 13, 2020 at 10:03:04AM +0200, Michal Simek wrote:
>
>> From: Ashok Reddy Soma
>>
>> FDT memory is aligned by 4KB. This is hardcoded in common/board_f.c.
>> Add Kconfig option, assign default value of 0x1000 and enable option to
>> change this
On Mon, Apr 13, 2020 at 10:03:04AM +0200, Michal Simek wrote:
> From: Ashok Reddy Soma
>
> FDT memory is aligned by 4KB. This is hardcoded in common/board_f.c.
> Add Kconfig option, assign default value of 0x1000 and enable option to
> change this value.
>
> Signed-off-by: Ashok Reddy Soma
>
On 4/16/20 4:32 AM, Tom Rini wrote:
> On Wed, Apr 15, 2020 at 06:46:23PM +0200, Heinrich Schuchardt wrote:
>
>> We cannot run unit tests in SPL. So remove the unit test support.
>>
>> Signed-off-by: Heinrich Schuchardt
>> ---
>> common/dlmalloc.c | 2 +-
>> 1 file changed, 1 insertion(+), 1
Hi Giulio,
On Thu, Apr 16, 2020 at 12:20 PM Giulio Benetti
wrote:
> Ah I didn't know I had to point someone.
>
> So in this case would be either Stefano or Fabio and indeed Fabio
> answered before here:
> https://lists.denx.de/pipermail/u-boot/2020-April/406857.html
Since this series touches
Hi Fabio,
On 4/16/20 3:26 AM, Fabio Estevam wrote:
Hi Giulio,
On Wed, Apr 8, 2020 at 12:10 PM Giulio Benetti
wrote:
This patchset add support for LCDIF on i.MXRT1050 evk. This requires
PLL5 to be setup, mxsfb needs to use display_timing to retrieve if Lcd
has inverted PIXCLOCK from dts.
On 4/16/20 5:08 AM, Simon Glass wrote:
Hi Giulio,
On Wed, 15 Apr 2020 at 14:05, Giulio Benetti
wrote:
I've pinged the wrong patchset, sorry for the noise, the right one is v3.
--
Giulio Benetti
Benetti Engineering sas
On 4/15/20 9:51 PM, Giulio Benetti wrote:
Kindly ping
Who are you
SBI v0.2 is more scalable and extendable to handle future needs
for RISC-V supervisor interfaces. For example, with SBI v0.2 HSM
extension, only a single hart need to boot and enter operating
system. The booting hart can bring up secondary harts one by one
afterwards.
Signed-off-by: Bin Meng
Hi Tom,
This one is against master since you have pulled in the -next branch
now. I have dropped the offending commit.
https://gitlab.denx.de/u-boot/custodians/u-boot-dm/pipelines/2786
The following changes since commit 66b8669d7709cecedf2e0403bb17b48bab86f644:
Merge tag
With SBI v0.2 HSM extension, only a single hart need to boot and
enter operating system. The booting hart can bring up secondary
harts one by one afterwards.
For U-Boot running in SPL, SMP can be turned on, while in U-Boot
proper, SMP can be optionally turned off if using SBI v0.2 HSM.
Introduce
To work with latest OpenSBI release (v0.7 or above) that has the HSM
extension support, select the SBI v0.2 support by default.
Signed-off-by: Bin Meng
Reviewed-by: Atish Patra
---
Changes in v2:
- drop patch: "riscv: Remove CONFIG_IS_ENABLED(SMP) in global data"
arch/riscv/Kconfig | 2 +-
U-Boot proper running in S-mode only need SMP support when using
SBI v0.1. With SBI v0.2 HSM extension, it does not need implement
multicore boot in U-Boot proper.
Signed-off-by: Bin Meng
---
Changes in v2:
- add "!RISCV_SMODE" to the dependency
arch/riscv/Kconfig | 1 +
1 file changed, 1
Prior to QEMU v3.1.0, QEMU generated the 'virt' SoC node with a
"riscv-virtio-soc" compatible string, and a "simple-bus" driver
was created to accommodate that special case in U-Boot.
Starting from QEMU v3.1.0, the SoC node was set as a "simple-bus",
hence the special simple-bus driver is no
Two consecutive SMP ifdefs blocks can be combined into one.
Signed-off-by: Bin Meng
Reviewed-by: Atish Patra
---
Changes in v2: None
arch/riscv/cpu/start.S | 4
1 file changed, 4 deletions(-)
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 6b3ff99..ecf0482 100644
---
This series makes SBI v0.2 the default SBI version to work with
OpenSBI v0.7, that is scheduled to be released soon.
Hart State Management (HSM) SBI extension is supported from OpenSBI
v0.7. HSM extension allows S-mode software to boot all the harts a
defined order rather than legacy method of
Hi Sean,
On Wed, Apr 8, 2020 at 10:20 PM Sean Anderson wrote:
>
> On 4/8/20 9:41 AM, Bin Meng wrote:
> > U-Boot proper running in S-mode only need SMP support when using
> > SBI v0.1. With SBI v0.2 HSM extension, it does not need implement
> > multicore boot in U-Boot proper.
> >
> >
On 2020-04-16 06:38, Stefan Roese wrote:
Hi Baruch,
On 16.04.20 14:22, Baruch Siach wrote:
Hi Stefan,
On Wed, Apr 15 2020, Stefan Roese wrote:
On 19.01.20 08:10, Joel Johnson wrote:
This set of patches applies on top of
https://patchwork.ozlabs.org/cover/1200324/,
based on testing using
On Sun, Apr 12, 2020 at 5:04 PM Marek Vasut wrote:
>
> The macro assumes ee_addr variable to be present when it's being
> used. Rework the macro into a function instead and pass it an
> argument specifying the register base address, to make it future
> proof for DM conversion.
>
> Signed-off-by:
On Sun, Apr 12, 2020 at 5:04 PM Marek Vasut wrote:
>
> Clean up the horrible register definitions in the RTL8139 driver.
> This does create a couple of checkpatch errors, but the driver is
> full of them anyway, and those will be cleaned up later.
>
> No functional change.
>
> Signed-off-by:
On 16/04/2020 10:42, Neil Armstrong wrote:
> The Linux VPU bindings have changed and dropped the dmc register range.
>
> Add it back in the meson-gx-u-boot.dtsi file until a proper canvas driver
> is available.
>
> Signed-off-by: Neil Armstrong
> ---
> arch/arm/dts/meson-gx-u-boot.dtsi | 4
Hi Masahiro,
On Thu, Apr 16, 2020 at 12:39 PM Masahiro Yamada wrote:
>
> Currently generic-asm-offsets.h and asm-offsets.h are generated based
> on U-Boot proper config options. The same asm-offsets headers are used
> for building U-Boot SPL/TPL, which causes potential offset mismatch if
>
On 14.04.20 04:51, AKASHI Takahiro wrote:
> UEFI specification defines several global variables which are related to
> the current secure boot state. In this commit, those values will be
> maintained according to operations. Currently, AuditMode and DeployedMode
> are defined but not implemented.
On Wed, Mar 25, 2020 at 1:45 PM Marek Vasut wrote:
>
> Replace combination of malloc()+memset() with calloc() as the behavior
> is exactly the same and the amount of code is reduced. Moreover, remove
> printf() in the fail path, as it is useless, and return proper -ENOMEM
> return code.
>
>
On 4/16/20 3:21 PM, Tom Rini wrote:
> On Thu, Apr 16, 2020 at 03:11:45PM +0200, Marek Vasut wrote:
>> On 4/16/20 2:55 PM, Tom Rini wrote:
>>> On Wed, Apr 15, 2020 at 08:06:45PM +0200, Marek Vasut wrote:
On 4/15/20 7:44 PM, Tom Rini wrote:
> On Wed, Apr 15, 2020 at 05:16:52PM +0200, Marek
On Thu, Apr 16, 2020 at 03:11:45PM +0200, Marek Vasut wrote:
> On 4/16/20 2:55 PM, Tom Rini wrote:
> > On Wed, Apr 15, 2020 at 08:06:45PM +0200, Marek Vasut wrote:
> >> On 4/15/20 7:44 PM, Tom Rini wrote:
> >>> On Wed, Apr 15, 2020 at 05:16:52PM +0200, Marek Vasut wrote:
> On 4/15/20 5:14 PM,
On 4/16/20 2:55 PM, Tom Rini wrote:
> On Wed, Apr 15, 2020 at 08:06:45PM +0200, Marek Vasut wrote:
>> On 4/15/20 7:44 PM, Tom Rini wrote:
>>> On Wed, Apr 15, 2020 at 05:16:52PM +0200, Marek Vasut wrote:
On 4/15/20 5:14 PM, Tom Rini wrote:
> On Wed, Apr 15, 2020 at 04:58:31PM +0200, Marek
On 3/25/20 7:44 PM, Marek Vasut wrote:
> Replace combination of malloc()+memset() with calloc() as the behavior
> is exactly the same and the amount of code is reduced. Moreover, remove
> printf() in the fail path, as it is useless, and return proper -ENOMEM
> return code.
>
> Signed-off-by:
On Wed, Apr 15, 2020 at 08:06:45PM +0200, Marek Vasut wrote:
> On 4/15/20 7:44 PM, Tom Rini wrote:
> > On Wed, Apr 15, 2020 at 05:16:52PM +0200, Marek Vasut wrote:
> >> On 4/15/20 5:14 PM, Tom Rini wrote:
> >>> On Wed, Apr 15, 2020 at 04:58:31PM +0200, Marek Vasut wrote:
> On 4/15/20 4:56 PM,
Hi Baruch,
On 16.04.20 14:22, Baruch Siach wrote:
Hi Stefan,
On Wed, Apr 15 2020, Stefan Roese wrote:
On 19.01.20 08:10, Joel Johnson wrote:
This set of patches applies on top of
https://patchwork.ozlabs.org/cover/1200324/,
based on testing using the static configuration fallback updates
Hi Stefan,
On Wed, Apr 15 2020, Stefan Roese wrote:
> On 19.01.20 08:10, Joel Johnson wrote:
>>
>> This set of patches applies on top of
>> https://patchwork.ozlabs.org/cover/1200324/,
>> based on testing using the static configuration fallback updates in a
>> related patch series.
>>
>>
>> Joel
From: T Karthik Reddy
Add memory-controller@e000e000 node in zynq-ces-nand.dts as
zynq_nand driver utilizes flash@e100 node. Without this
dt node mini nand u-boot does not probe.
Signed-off-by: T Karthik Reddy
Signed-off-by: Michal Simek
---
arch/arm/dts/zynq-cse-nand.dts | 15
1 - 100 of 151 matches
Mail list logo
