Re: [RFC PATCH v3 3/3] rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 32bit)

[Marek Szyprowski]

Hi Simon,

On 19.05.2020 18:47, Simon Glass wrote:
> On Tue, 19 May 2020 at 06:00, Marek Szyprowski  
> wrote:
>> On 19.05.2020 00:38, Simon Glass wrote:
>>> On Mon, 18 May 2020 at 07:18, Marek Szyprowski  
>>> wrote:
 Create a non-cacheable mapping for the 0x6 physical memory region,
 where MMIO registers for the PCIe XHCI controller are instantiated by the
 PCIe bridge. Due to 32bit limit in the CPU virtual address space in ARM
 32bit mode, this region is mapped at 0xff80 CPU virtual address.

 Signed-off-by: Marek Szyprowski 
 ---
arch/arm/mach-bcm283x/Kconfig |  1 +
arch/arm/mach-bcm283x/include/mach/base.h |  8 
arch/arm/mach-bcm283x/init.c  | 20 
include/configs/rpi.h |  7 +++
4 files changed, 36 insertions(+)

 diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig
 index 00419bf..bcb7f1d 100644
 --- a/arch/arm/mach-bcm283x/Kconfig
 +++ b/arch/arm/mach-bcm283x/Kconfig
 @@ -36,6 +36,7 @@ config BCM2711_32B
   select BCM2711
   select ARMV7_LPAE
   select CPU_V7A
 +   select PHYS_64BIT

config BCM2711_64B
   bool "Broadcom BCM2711 SoC 64-bit support"
 diff --git a/arch/arm/mach-bcm283x/include/mach/base.h 
 b/arch/arm/mach-bcm283x/include/mach/base.h
 index c4ae398..4ccaf69 100644
 --- a/arch/arm/mach-bcm283x/include/mach/base.h
 +++ b/arch/arm/mach-bcm283x/include/mach/base.h
 @@ -8,4 +8,12 @@

extern unsigned long rpi_bcm283x_base;

 +#ifdef CONFIG_ARMV7_LPAE
 +#ifdef CONFIG_TARGET_RPI_4_32B
 +#include 
 +#define phys_to_virt addrmap_phys_to_virt
 +#define virt_to_phys addrmap_virt_to_phys
 +#endif
 +#endif
 +
#endif
 diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
 index 9f5bca3..008b312 100644
 --- a/arch/arm/mach-bcm283x/init.c
 +++ b/arch/arm/mach-bcm283x/init.c
 @@ -145,6 +145,26 @@ int mach_cpu_init(void)
}

#ifdef CONFIG_ARMV7_LPAE
 +#ifdef CONFIG_TARGET_RPI_4_32B
 +#define BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT   0xff80UL
 +#include 
 +
 +void init_addr_map(void)
 +{
 +   
 mmu_set_region_dcache_behaviour_phys(BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT,
 +
 BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
 +
 BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE,
 +DCACHE_OFF);
 +
 +   /* identity mapping for 0..BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT */
 +   addrmap_set_entry(0, 0, BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT, 0);
 +   /* XHCI MMIO on PCIe at BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT */
 +   addrmap_set_entry(BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT,
 + BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
 + BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE, 1);
 +}
 +#endif
 +
void enable_caches(void)
{
   dcache_enable();
 diff --git a/include/configs/rpi.h b/include/configs/rpi.h
 index b53a4b6..296e8ee 100644
 --- a/include/configs/rpi.h
 +++ b/include/configs/rpi.h
 @@ -63,6 +63,13 @@
#define CONFIG_SYS_BOOTM_LEN   SZ_64M
#endif

 +#ifdef CONFIG_ARMV7_LPAE
 +#ifdef CONFIG_TARGET_RPI_4_32B
 +#define CONFIG_ADDR_MAP 1
 +#define CONFIG_SYS_NUM_ADDR_MAP 2
 +#endif
 +#endif
>>> We should be removing things from the config files. Can you move this
>>> to devicetree or Kconfig?
>> I can move them to Kconfig, no problem. However I would like to get some
>> comments if the approach I presented in this patchset is fine.
> Yes, no problem.
>
> I suspect we may need to expand the DMA drivers, perhaps, or some
> other way to map memory on a per-device basis using driver model.

I'm not sure that we really need such a complex solution. Usually the 
board (or even SoC), if ever, needs one or two such non-identity 
mappings, which can be easily created by the respective init code. The 
PowerPC case mentioned here looks a bit different, because it simply 
copies the mappings already configured in the CPU registers by the 
earlier firmware. Anyway, I don't think that we would ever need to 
manage physical/virtual mapping dynamically in the u-boot. All that 
cover current (and most future?) cases would be a simple function to map 
an arbitrary physical address at the predefined virtual one.

Best regards
-- 
Marek Szyprowski, PhD
Samsung R Institute Poland

Re: Issue with 'ubi part' ubi_io_read: error -74 (ECC error)

[Heiko Schocher]

Hello Jupiter,

Am 19.05.2020 um 14:06 schrieb Jupiter:

Thanks Richard for the response.

On 5/19/20, Richard Weinberger  wrote:

Neither UBI nor UBIFS care about ECC. The MTD stack does.
If you write something in Linux you cannot read back in u-boot a common
problem is that u-boot and Linux use different MTD settings (layout,
ECC, etc...).


That is exactly the problem I have, the MTD layout in both Linux and
u-boot is the same:

# mtdinfo
Count of MTD devices:   3
Present MTD devices:mtd0, mtd1, mtd2
Sysfs interface supported:  yes

Are there any ways or tools in Linux to change MTD settings (most
likely the ECC or DTB) to the same setting in u-boot? I do have mtd
and fw_setenv in Linux.


No for U-Boot (as I am aware of). You need to fix the DTS or may if
older U-Boot your code.

May you need to add in your U-Boot DTS gpmi node the property:

fsl,legacy-bch-geometry;

?

see commit:

51cdf83eea - mtd: gpmi: provide the option to use legacy bch geometry

bye,
Heiko
--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: h...@denx.de

Re: [PATCH v3 6/6] rockchip: Enable PCIe/M.2 on rock960 board

[Kever Yang]

Hi Jagan,

On 2020/5/10 上午12:56, Jagan Teki wrote:

Due to board limitation some SSD's would work
on rock960 PCIe M.2 only with 1.8V IO domain.

So, this patch enables grf io_sel explicitly to
make PCIe/M.2 to work.

Cc: Tom Cubie 
Signed-off-by: Jagan Teki 
Acked-by: Manivannan Sadhasivam 
---
Changes for v3:
- collect mani a-b
- add comments

  board/vamrs/rock960_rk3399/rock960-rk3399.c | 23 +
  configs/rock960-rk3399_defconfig|  5 +
  2 files changed, 28 insertions(+)

diff --git a/board/vamrs/rock960_rk3399/rock960-rk3399.c 
b/board/vamrs/rock960_rk3399/rock960-rk3399.c
index 68a127b9ac..ef1eb2d0b7 100644
--- a/board/vamrs/rock960_rk3399/rock960-rk3399.c
+++ b/board/vamrs/rock960_rk3399/rock960-rk3399.c
@@ -2,3 +2,26 @@
  /*
   * Copyright (C) 2018 Manivannan Sadhasivam 
   */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+   struct rk3399_grf_regs *grf =
+   syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+   /**
+* Some SSD's to work on rock960 would require explicit
+* domain voltage change, so BT565 is in 1.8v domain
+*/
+   rk_setreg(>io_vsel, BIT(0));

+  rk_setreg(>io_vsel, BIT(0));
+   ^
+arch/arm/include/asm/io.h:118:34: note: in definition of macro ‘writel’
+ #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
+  ^
+board/vamrs/rock960_rk3399/rock960-rk3399.c:23:2: note: in expansion of 
macro ‘rk_setreg’

+  ^
+board/vamrs/rock960_rk3399/built-in.o: In function `misc_init_r':
+board/vamrs/rock960_rk3399/rock960-rk3399.c:23: undefined reference to 
`BIT'

+make[1]: *** [u-boot] Error 139


Did you get this error when build the code?


Thanks,

- Kever


+
+   return 0;
+}
+#endif
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
index 045d989a19..64517f9623 100644
--- a/configs/rock960-rk3399_defconfig
+++ b/configs/rock960-rk3399_defconfig
@@ -9,6 +9,7 @@ CONFIG_DEBUG_UART_BASE=0xFF1A
  CONFIG_DEBUG_UART_CLOCK=2400
  CONFIG_DEBUG_UART=y
  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb"
+CONFIG_MISC_INIT_R=y
  CONFIG_DISPLAY_BOARDINFO_LATE=y
  # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
  CONFIG_SPL_STACK_R=y
@@ -19,6 +20,7 @@ CONFIG_CMD_BOOTZ=y
  CONFIG_CMD_GPT=y
  CONFIG_CMD_MMC=y
  CONFIG_CMD_USB=y
+CONFIG_CMD_PCI=y
  # CONFIG_CMD_SETEXPR is not set
  CONFIG_CMD_TIME=y
  CONFIG_CMD_PMIC=y
@@ -36,10 +38,13 @@ CONFIG_MMC_SDHCI=y
  CONFIG_MMC_SDHCI_SDMA=y
  CONFIG_MMC_SDHCI_ROCKCHIP=y
  CONFIG_DM_ETH=y
+CONFIG_NVME=y
+CONFIG_PCI=y
  CONFIG_PMIC_RK8XX=y
  CONFIG_REGULATOR_PWM=y
  CONFIG_REGULATOR_RK8XX=y
  CONFIG_PWM_ROCKCHIP=y
+CONFIG_DM_RESET=y
  CONFIG_BAUDRATE=150
  CONFIG_DEBUG_UART_SHIFT=2
  CONFIG_SYSRESET=y

[PATCH v2 13/13] cbfs: Don't require the CBFS size with cbfs_init_mem()

[Simon Glass]

The size is not actually used since it is present in the header. Drop this
parameter. Also tidy up error handling while we are here.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Rebase to master (with x86/master cherry-picked in too)

 arch/x86/lib/fsp2/fsp_init.c |  3 +--
 fs/cbfs/cbfs.c   | 10 ++
 include/cbfs.h   |  3 +--
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c
index 8c577902b27..85cae54a0ca 100644
--- a/arch/x86/lib/fsp2/fsp_init.c
+++ b/arch/x86/lib/fsp2/fsp_init.c
@@ -81,11 +81,10 @@ static int get_cbfs_fsp(enum fsp_type_t type, ulong 
map_base,
 * 'COREBOOT' (CBFS, size 1814528, offset 2117632).
 */
ulong cbfs_base = 0x205000;
-   ulong cbfs_size = 0x1bb000;
struct cbfs_priv *cbfs;
int ret;
 
-   ret = cbfs_init_mem(map_base + cbfs_base, cbfs_size, );
+   ret = cbfs_init_mem(map_base + cbfs_base, );
if (ret)
return ret;
if (!ret) {
diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c
index 9772962ceec..b17cc6dc841 100644
--- a/fs/cbfs/cbfs.c
+++ b/fs/cbfs/cbfs.c
@@ -5,6 +5,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -275,7 +276,7 @@ int file_cbfs_init(ulong end_of_rom)
return cbfs_init(_s, end_of_rom);
 }
 
-int cbfs_init_mem(ulong base, ulong size, struct cbfs_priv **privp)
+int cbfs_init_mem(ulong base, struct cbfs_priv **privp)
 {
struct cbfs_priv priv_s, *priv = _s;
int ret;
@@ -288,9 +289,10 @@ int cbfs_init_mem(ulong base, ulong size, struct cbfs_priv 
**privp)
if (ret)
return ret;
 
-   file_cbfs_fill_cache(priv, priv->header.rom_size, priv->header.align);
-   if (priv->result != CBFS_SUCCESS)
-   return -EINVAL;
+   ret = file_cbfs_fill_cache(priv, priv->header.rom_size,
+  priv->header.align);
+   if (ret)
+   return log_msg_ret("fill", ret);
 
priv->initialised = true;
priv = malloc(sizeof(priv_s));
diff --git a/include/cbfs.h b/include/cbfs.h
index 2a4eca05050..56d5c1680c6 100644
--- a/include/cbfs.h
+++ b/include/cbfs.h
@@ -149,11 +149,10 @@ const struct cbfs_cachenode *cbfs_find_file(struct 
cbfs_priv *cbfs,
  * cbfs_init_mem() - Set up a new CBFS
  *
  * @base: Base address of CBFS
- * @size: Size of CBFS in bytes
  * @cbfsp: Returns a pointer to CBFS on success
  * @return 0 if OK, -ve on error
  */
-int cbfs_init_mem(ulong base, ulong size, struct cbfs_priv **privp);
+int cbfs_init_mem(ulong base, struct cbfs_priv **privp);
 
 
 /***/
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v2 12/13] cbfs: Allow reading a file from a CBFS given its base addr

[Simon Glass]

Currently we support reading a file from CBFS given the address of the end
of the ROM. Sometimes we only know the start of the CBFS. Add a function
to find a file given that.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Use void * instead of u8 * in file_cbfs_find_uncached_base()
- Fix and expand comments in file_cbfs_find_uncached_base()

 fs/cbfs/cbfs.c | 13 +
 include/cbfs.h | 14 ++
 2 files changed, 27 insertions(+)

diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c
index 5b8f7dc451b..9772962ceec 100644
--- a/fs/cbfs/cbfs.c
+++ b/fs/cbfs/cbfs.c
@@ -413,6 +413,19 @@ int file_cbfs_find_uncached(ulong end_of_rom, const char 
*name,
return find_uncached(, name, start, node);
 }
 
+int file_cbfs_find_uncached_base(ulong base, const char *name,
+struct cbfs_cachenode *node)
+{
+   struct cbfs_priv priv;
+   int ret;
+
+   ret = cbfs_load_header_ptr(, base);
+   if (ret)
+   return ret;
+
+   return find_uncached(, name, (void *)base, node);
+}
+
 const char *file_cbfs_name(const struct cbfs_cachenode *file)
 {
cbfs_s.result = CBFS_SUCCESS;
diff --git a/include/cbfs.h b/include/cbfs.h
index 29708626b15..2a4eca05050 100644
--- a/include/cbfs.h
+++ b/include/cbfs.h
@@ -174,6 +174,20 @@ int cbfs_init_mem(ulong base, ulong size, struct cbfs_priv 
**privp);
 int file_cbfs_find_uncached(ulong end_of_rom, const char *name,
struct cbfs_cachenode *node);
 
+/**
+ * file_cbfs_find_uncached_base() - Find a file in CBFS given the base address
+ *
+ * Note that @node should be declared by the caller. This design is to avoid
+ * the need for allocation here.
+ *
+ * @base: Points to the base of the CBFS
+ * @name: The name to search for
+ * @node: Returns the contents of the node if found (i.e. copied into *node)
+ * @return 0 on success, -ENOENT if not found, -EFAULT on bad header
+ */
+int file_cbfs_find_uncached_base(ulong base, const char *name,
+struct cbfs_cachenode *node);
+
 /**
  * file_cbfs_name() - Get the name of a file in CBFS.
  *
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v2 07/13] cbfs: Unify the two header loaders

[Simon Glass]

These two functions have mostly the same code. Pull this out into a common
function.

Also make this function zero the private data so that callers don't have
to do it. Finally, update cbfs_load_header_ptr() to take the base of the
ROM as its parameter, which makes more sense than passing the address of
the header within the ROM.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Fix incorrect function comments

 fs/cbfs/cbfs.c | 59 +++---
 1 file changed, 37 insertions(+), 22 deletions(-)

diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c
index 05de58cf19a..86375d7aec5 100644
--- a/fs/cbfs/cbfs.c
+++ b/fs/cbfs/cbfs.c
@@ -177,47 +177,63 @@ static int file_cbfs_fill_cache(struct cbfs_priv *priv, 
u8 *start, u32 size,
return 0;
 }
 
-/* Get the CBFS header out of the ROM and do endian conversion. */
-static int file_cbfs_load_header(struct cbfs_priv *priv, ulong end_of_rom)
+/**
+ * load_header() - Load the CBFS header
+ *
+ * Get the CBFS header out of the ROM and do endian conversion.
+ *
+ * @priv: Private data, which is inited by this function
+ * @addr: Address of CBFS header in memory-mapped SPI flash
+ * @return 0 if OK, -ENXIO if the header is bad
+ */
+static int load_header(struct cbfs_priv *priv, ulong addr)
 {
struct cbfs_header *header = >header;
struct cbfs_header *header_in_rom;
-   int32_t offset = *(u32 *)(end_of_rom - 3);
 
-   header_in_rom = (struct cbfs_header *)(end_of_rom + offset + 1);
+   memset(priv, '\0', sizeof(*priv));
+   header_in_rom = (struct cbfs_header *)addr;
swap_header(header, header_in_rom);
 
if (header->magic != good_magic || header->offset >
header->rom_size - header->boot_block_size) {
priv->result = CBFS_BAD_HEADER;
-   return 1;
+   return -ENXIO;
}
+
return 0;
 }
 
-static int cbfs_load_header_ptr(struct cbfs_priv *priv, ulong base)
+/**
+ * file_cbfs_load_header() - Get the CBFS header out of the ROM, given the end
+ *
+ * @priv: Private data, which is inited by this function
+ * @end_of_rom: Address of the last byte of the ROM (typically 0x)
+ * @return 0 if OK, -ENXIO if the header is bad
+ */
+static int file_cbfs_load_header(struct cbfs_priv *priv, ulong end_of_rom)
 {
-   struct cbfs_header *header = >header;
-   struct cbfs_header *header_in_rom;
-
-   header_in_rom = (struct cbfs_header *)base;
-   swap_header(header, header_in_rom);
+   int offset = *(u32 *)(end_of_rom - 3);
 
-   if (header->magic != good_magic || header->offset >
-   header->rom_size - header->boot_block_size) {
-   priv->result = CBFS_BAD_HEADER;
-   return -EFAULT;
-   }
+   return load_header(priv, end_of_rom + offset + 1);
+}
 
-   return 0;
+/**
+ * cbfs_load_header_ptr() - Get the CBFS header out of the ROM, given the base
+ *
+ * @priv: Private data, which is inited by this function
+ * @base: Address of the first byte of the ROM (e.g. 0xff00)
+ * @return 0 if OK, -ENXIO if the header is bad
+ */
+static int cbfs_load_header_ptr(struct cbfs_priv *priv, ulong base)
+{
+   return load_header(priv, base + MASTER_HDR_OFFSET);
 }
 
 static void cbfs_init(struct cbfs_priv *priv, ulong end_of_rom)
 {
u8 *start_of_rom;
 
-   priv->initialised = false;
-
if (file_cbfs_load_header(priv, end_of_rom))
return;
 
@@ -241,10 +257,9 @@ int cbfs_init_mem(ulong base, ulong size, struct cbfs_priv 
**privp)
 
/*
 * Use a local variable to start with until we know that the CBFS is
-* valid. Assume that a master header appears at the start, at offset
-* 0x38.
+* valid.
 */
-   ret = cbfs_load_header_ptr(priv, base + MASTER_HDR_OFFSET);
+   ret = cbfs_load_header_ptr(priv, base);
if (ret)
return ret;
 
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v2 11/13] cbfs: Change file_cbfs_find_uncached() to return an error

[Simon Glass]

This function currently returns a node pointer so there is no way to know
the error code. Also it uses data in BSS which seems unnecessary since the
caller might prefer to use a local variable.

Update the function and split its body out into a separate function so we
can use it later.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Fix s/u8/void/ in find_uncached()
- Fix setting of start in file_cbfs_find_uncached()
- Add more comments on @node in file_cbfs_find_uncached()

 fs/cbfs/cbfs.c | 48 +++-
 include/cbfs.h | 17 +
 2 files changed, 36 insertions(+), 29 deletions(-)

diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c
index 91744d0ca48..5b8f7dc451b 100644
--- a/fs/cbfs/cbfs.c
+++ b/fs/cbfs/cbfs.c
@@ -371,40 +371,46 @@ const struct cbfs_cachenode *file_cbfs_find(const char 
*name)
return cbfs_find_file(_s, name);
 }
 
-const struct cbfs_cachenode *file_cbfs_find_uncached(ulong end_of_rom,
-const char *name)
+static int find_uncached(struct cbfs_priv *priv, const char *name, void *start,
+struct cbfs_cachenode *node)
 {
-   struct cbfs_priv *priv = _s;
-   void *start;
-   u32 size;
-   u32 align;
-   static struct cbfs_cachenode node;
-
-   if (file_cbfs_load_header(priv, end_of_rom))
-   return NULL;
-
-   start = priv->start;
-   size = priv->header.rom_size;
-   align = priv->header.align;
+   int size = priv->header.rom_size;
+   int align = priv->header.align;
 
while (size >= align) {
-   int ret;
int used;
+   int ret;
 
-   ret = file_cbfs_next_file(priv, start, size, align, ,
+   ret = file_cbfs_next_file(priv, start, size, align, node,
  );
if (ret == -ENOENT)
break;
else if (ret)
-   return NULL;
-   if (!strcmp(name, node.name))
-   return 
+   return ret;
+   if (!strcmp(name, node->name))
+   return 0;
 
size -= used;
start += used;
}
-   cbfs_s.result = CBFS_FILE_NOT_FOUND;
-   return NULL;
+   priv->result = CBFS_FILE_NOT_FOUND;
+
+   return -ENOENT;
+}
+
+int file_cbfs_find_uncached(ulong end_of_rom, const char *name,
+   struct cbfs_cachenode *node)
+{
+   struct cbfs_priv priv;
+   void *start;
+   int ret;
+
+   ret = file_cbfs_load_header(, end_of_rom);
+   if (ret)
+   return ret;
+   start = priv.start;
+
+   return find_uncached(, name, start, node);
 }
 
 const char *file_cbfs_name(const struct cbfs_cachenode *file)
diff --git a/include/cbfs.h b/include/cbfs.h
index bd1dd60648b..29708626b15 100644
--- a/include/cbfs.h
+++ b/include/cbfs.h
@@ -161,17 +161,18 @@ int cbfs_init_mem(ulong base, ulong size, struct 
cbfs_priv **privp);
 /***/
 
 /**
- * file_cbfs_find_uncached() - Find a file with a particular name in CBFS
- * without using the heap.
+ * file_cbfs_find_uncached() - Find a file in CBFS given the end of the ROM
  *
- * @end_of_rom:Points to the end of the ROM the CBFS should be 
read
- *  from.
- * @name:  The name to search for.
+ * Note that @node should be declared by the caller. This design is to avoid
+ * the need for allocation here.
  *
- * @return A handle to the file, or NULL on error.
+ * @end_of_rom: Points to the end of the ROM the CBFS should be read from
+ * @name: The name to search for
+ * @node: Returns the contents of the node if found (i.e. copied into *node)
+ * @return 0 on success, -ENOENT if not found, -EFAULT on bad header
  */
-const struct cbfs_cachenode *file_cbfs_find_uncached(ulong end_of_rom,
-const char *name);
+int file_cbfs_find_uncached(ulong end_of_rom, const char *name,
+   struct cbfs_cachenode *node);
 
 /**
  * file_cbfs_name() - Get the name of a file in CBFS.
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v2 08/13] cbfs: Use void * for the position pointers

[Simon Glass]

It doesn't make sense to use u8 * as the pointer type for accessing the
CBFS since we do not access it as bytes, but via structures. Change it to
void *, which allows us to avoid a cast.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 fs/cbfs/cbfs.c | 17 -
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c
index 86375d7aec5..689f574cf12 100644
--- a/fs/cbfs/cbfs.c
+++ b/fs/cbfs/cbfs.c
@@ -83,7 +83,7 @@ static void swap_file_header(struct cbfs_fileheader *dest,
  * @return 0 if a file is found, -ENOENT if one isn't, -EBADF if a bad header
  * is found.
  */
-static int file_cbfs_next_file(struct cbfs_priv *priv, u8 *start, int size,
+static int file_cbfs_next_file(struct cbfs_priv *priv, void *start, int size,
   int align, struct cbfs_cachenode *new_node,
   int *used)
 {
@@ -92,8 +92,7 @@ static int file_cbfs_next_file(struct cbfs_priv *priv, u8 
*start, int size,
*used = 0;
 
while (size >= align) {
-   const struct cbfs_fileheader *file_header =
-   (const struct cbfs_fileheader *)start;
+   const struct cbfs_fileheader *file_header = start;
u32 name_len;
u32 step;
 
@@ -133,7 +132,7 @@ static int file_cbfs_next_file(struct cbfs_priv *priv, u8 
*start, int size,
 }
 
 /* Look through a CBFS instance and copy file metadata into regular memory. */
-static int file_cbfs_fill_cache(struct cbfs_priv *priv, u8 *start, u32 size,
+static int file_cbfs_fill_cache(struct cbfs_priv *priv, void *start, u32 size,
u32 align)
 {
struct cbfs_cachenode *cache_node;
@@ -232,12 +231,12 @@ static int cbfs_load_header_ptr(struct cbfs_priv *priv, 
ulong base)
 
 static void cbfs_init(struct cbfs_priv *priv, ulong end_of_rom)
 {
-   u8 *start_of_rom;
+   void *start_of_rom;
 
if (file_cbfs_load_header(priv, end_of_rom))
return;
 
-   start_of_rom = (u8 *)(end_of_rom + 1 - priv->header.rom_size);
+   start_of_rom = (void *)(end_of_rom + 1 - priv->header.rom_size);
 
file_cbfs_fill_cache(priv, start_of_rom, priv->header.rom_size,
 priv->header.align);
@@ -263,7 +262,7 @@ int cbfs_init_mem(ulong base, ulong size, struct cbfs_priv 
**privp)
if (ret)
return ret;
 
-   file_cbfs_fill_cache(priv, (u8 *)base, priv->header.rom_size,
+   file_cbfs_fill_cache(priv, (void *)base, priv->header.rom_size,
 priv->header.align);
if (priv->result != CBFS_SUCCESS)
return -EINVAL;
@@ -351,7 +350,7 @@ const struct cbfs_cachenode *file_cbfs_find_uncached(ulong 
end_of_rom,
 const char *name)
 {
struct cbfs_priv *priv = _s;
-   u8 *start;
+   void *start;
u32 size;
u32 align;
static struct cbfs_cachenode node;
@@ -359,7 +358,7 @@ const struct cbfs_cachenode *file_cbfs_find_uncached(ulong 
end_of_rom,
if (file_cbfs_load_header(priv, end_of_rom))
return NULL;
 
-   start = (u8 *)(end_of_rom + 1 - priv->header.rom_size);
+   start = (void *)(end_of_rom + 1 - priv->header.rom_size);
size = priv->header.rom_size;
align = priv->header.align;
 
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v2 10/13] cbfs: Return the error code from file_cbfs_init()

[Simon Glass]

We may as well return the error code and use it directly in the command
code. CBFS still uses its own error enum which we may be able to remove,
but leave it for now.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 cmd/cbfs.c |  3 +--
 fs/cbfs/cbfs.c | 23 +++
 include/cbfs.h |  6 +++---
 3 files changed, 19 insertions(+), 13 deletions(-)

diff --git a/cmd/cbfs.c b/cmd/cbfs.c
index 8e91d4bb8c2..10c2c929c37 100644
--- a/cmd/cbfs.c
+++ b/cmd/cbfs.c
@@ -28,8 +28,7 @@ static int do_cbfs_init(struct cmd_tbl *cmdtp, int flag, int 
argc,
return 1;
}
}
-   file_cbfs_init(end_of_rom);
-   if (cbfs_get_result() != CBFS_SUCCESS) {
+   if (file_cbfs_init(end_of_rom)) {
printf("%s.\n", file_cbfs_error());
return 1;
}
diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c
index abdc2731a14..91744d0ca48 100644
--- a/fs/cbfs/cbfs.c
+++ b/fs/cbfs/cbfs.c
@@ -253,19 +253,26 @@ static int cbfs_load_header_ptr(struct cbfs_priv *priv, 
ulong base)
return 0;
 }
 
-static void cbfs_init(struct cbfs_priv *priv, ulong end_of_rom)
+static int cbfs_init(struct cbfs_priv *priv, ulong end_of_rom)
 {
-   if (file_cbfs_load_header(priv, end_of_rom))
-   return;
+   int ret;
 
-   file_cbfs_fill_cache(priv, priv->header.rom_size, priv->header.align);
-   if (priv->result == CBFS_SUCCESS)
-   priv->initialised = true;
+   ret = file_cbfs_load_header(priv, end_of_rom);
+   if (ret)
+   return ret;
+
+   ret = file_cbfs_fill_cache(priv, priv->header.rom_size,
+  priv->header.align);
+   if (ret)
+   return ret;
+   priv->initialised = true;
+
+   return 0;
 }
 
-void file_cbfs_init(ulong end_of_rom)
+int file_cbfs_init(ulong end_of_rom)
 {
-   cbfs_init(_s, end_of_rom);
+   return cbfs_init(_s, end_of_rom);
 }
 
 int cbfs_init_mem(ulong base, ulong size, struct cbfs_priv **privp)
diff --git a/include/cbfs.h b/include/cbfs.h
index 8b297c23d5a..bd1dd60648b 100644
--- a/include/cbfs.h
+++ b/include/cbfs.h
@@ -98,10 +98,10 @@ enum cbfs_result cbfs_get_result(void);
 /**
  * file_cbfs_init() - Initialize the CBFS driver and load metadata into RAM.
  *
- * @end_of_rom: Points to the end of the ROM the CBFS should be read
- *  from.
+ * @end_of_rom: Points to the end of the ROM the CBFS should be read from
+ * @return 0 if OK, -ve on error
  */
-void file_cbfs_init(ulong end_of_rom);
+int file_cbfs_init(ulong end_of_rom);
 
 /**
  * file_cbfs_get_header() - Get the header structure for the current CBFS.
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v2 06/13] cbfs: Adjust cbfs_load_header_ptr() to use cbfs_priv

[Simon Glass]

This function is strange at the moment in that it takes a header pointer
but then accesses the cbfs_s global. Currently clients have their own priv
pointer, so update the function to take that as a parameter instead.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 fs/cbfs/cbfs.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c
index 765e0784230..05de58cf19a 100644
--- a/fs/cbfs/cbfs.c
+++ b/fs/cbfs/cbfs.c
@@ -8,6 +8,9 @@
 #include 
 #include 
 
+/* Offset of master header from the start of a coreboot ROM */
+#define MASTER_HDR_OFFSET  0x38
+
 static const u32 good_magic = 0x4f524243;
 static const u8 good_file_magic[] = "LARCHIVE";
 
@@ -192,9 +195,9 @@ static int file_cbfs_load_header(struct cbfs_priv *priv, 
ulong end_of_rom)
return 0;
 }
 
-static int cbfs_load_header_ptr(struct cbfs_priv *priv, ulong base,
-   struct cbfs_header *header)
+static int cbfs_load_header_ptr(struct cbfs_priv *priv, ulong base)
 {
+   struct cbfs_header *header = >header;
struct cbfs_header *header_in_rom;
 
header_in_rom = (struct cbfs_header *)base;
@@ -241,7 +244,7 @@ int cbfs_init_mem(ulong base, ulong size, struct cbfs_priv 
**privp)
 * valid. Assume that a master header appears at the start, at offset
 * 0x38.
 */
-   ret = cbfs_load_header_ptr(priv, base + 0x38, >header);
+   ret = cbfs_load_header_ptr(priv, base + MASTER_HDR_OFFSET);
if (ret)
return ret;
 
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v2 09/13] cbfs: Record the start address in cbfs_priv

[Simon Glass]

The start address of the CBFS is used when scanning for files. It makes
sense to put this in our cbfs_priv struct and calculate it when we read
the header.

Update the code accordingly.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 fs/cbfs/cbfs.c | 44 +++-
 1 file changed, 31 insertions(+), 13 deletions(-)

diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c
index 689f574cf12..abdc2731a14 100644
--- a/fs/cbfs/cbfs.c
+++ b/fs/cbfs/cbfs.c
@@ -14,8 +14,18 @@
 static const u32 good_magic = 0x4f524243;
 static const u8 good_file_magic[] = "LARCHIVE";
 
+/**
+ * struct cbfs_priv - Private data for this driver
+ *
+ * @initialised: true if this CBFS has been inited
+ * @start: Start position of CBFS in memory, typically memory-mapped SPI flash
+ * @header: Header read from the CBFS, byte-swapped so U-Boot can access it
+ * @file_cache: List of file headers read from CBFS
+ * @result: Success/error result
+ */
 struct cbfs_priv {
bool initialised;
+   void *start;
struct cbfs_header header;
struct cbfs_cachenode *file_cache;
enum cbfs_result result;
@@ -132,12 +142,12 @@ static int file_cbfs_next_file(struct cbfs_priv *priv, 
void *start, int size,
 }
 
 /* Look through a CBFS instance and copy file metadata into regular memory. */
-static int file_cbfs_fill_cache(struct cbfs_priv *priv, void *start, u32 size,
-   u32 align)
+static int file_cbfs_fill_cache(struct cbfs_priv *priv, int size, int align)
 {
struct cbfs_cachenode *cache_node;
struct cbfs_cachenode *new_node;
struct cbfs_cachenode **cache_tail = >file_cache;
+   void *start;
 
/* Clear out old information. */
cache_node = priv->file_cache;
@@ -148,6 +158,7 @@ static int file_cbfs_fill_cache(struct cbfs_priv *priv, 
void *start, u32 size,
}
priv->file_cache = NULL;
 
+   start = priv->start;
while (size >= align) {
int used;
int ret;
@@ -213,8 +224,14 @@ static int load_header(struct cbfs_priv *priv, ulong addr)
 static int file_cbfs_load_header(struct cbfs_priv *priv, ulong end_of_rom)
 {
int offset = *(u32 *)(end_of_rom - 3);
+   int ret;
+
+   ret = load_header(priv, end_of_rom + offset + 1);
+   if (ret)
+   return ret;
+   priv->start = (void *)(end_of_rom + 1 - priv->header.rom_size);
 
-   return load_header(priv, end_of_rom + offset + 1);
+   return 0;
 }
 
 /**
@@ -226,20 +243,22 @@ static int file_cbfs_load_header(struct cbfs_priv *priv, 
ulong end_of_rom)
  */
 static int cbfs_load_header_ptr(struct cbfs_priv *priv, ulong base)
 {
-   return load_header(priv, base + MASTER_HDR_OFFSET);
+   int ret;
+
+   ret = load_header(priv, base + MASTER_HDR_OFFSET);
+   if (ret)
+   return ret;
+   priv->start = (void *)base;
+
+   return 0;
 }
 
 static void cbfs_init(struct cbfs_priv *priv, ulong end_of_rom)
 {
-   void *start_of_rom;
-
if (file_cbfs_load_header(priv, end_of_rom))
return;
 
-   start_of_rom = (void *)(end_of_rom + 1 - priv->header.rom_size);
-
-   file_cbfs_fill_cache(priv, start_of_rom, priv->header.rom_size,
-priv->header.align);
+   file_cbfs_fill_cache(priv, priv->header.rom_size, priv->header.align);
if (priv->result == CBFS_SUCCESS)
priv->initialised = true;
 }
@@ -262,8 +281,7 @@ int cbfs_init_mem(ulong base, ulong size, struct cbfs_priv 
**privp)
if (ret)
return ret;
 
-   file_cbfs_fill_cache(priv, (void *)base, priv->header.rom_size,
-priv->header.align);
+   file_cbfs_fill_cache(priv, priv->header.rom_size, priv->header.align);
if (priv->result != CBFS_SUCCESS)
return -EINVAL;
 
@@ -358,7 +376,7 @@ const struct cbfs_cachenode *file_cbfs_find_uncached(ulong 
end_of_rom,
if (file_cbfs_load_header(priv, end_of_rom))
return NULL;
 
-   start = (void *)(end_of_rom + 1 - priv->header.rom_size);
+   start = priv->start;
size = priv->header.rom_size;
align = priv->header.align;
 
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v2 05/13] cbfs: Adjust file_cbfs_load_header() to use cbfs_priv

[Simon Glass]

This function is strange at the moment in that it takes a header pointer
but then accesses the cbfs_s global. Currently clients have their own priv
pointer, so update the function to take that as a parameter instead.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 fs/cbfs/cbfs.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c
index 1037d192257..765e0784230 100644
--- a/fs/cbfs/cbfs.c
+++ b/fs/cbfs/cbfs.c
@@ -175,8 +175,9 @@ static int file_cbfs_fill_cache(struct cbfs_priv *priv, u8 
*start, u32 size,
 }
 
 /* Get the CBFS header out of the ROM and do endian conversion. */
-static int file_cbfs_load_header(ulong end_of_rom, struct cbfs_header *header)
+static int file_cbfs_load_header(struct cbfs_priv *priv, ulong end_of_rom)
 {
+   struct cbfs_header *header = >header;
struct cbfs_header *header_in_rom;
int32_t offset = *(u32 *)(end_of_rom - 3);
 
@@ -185,7 +186,7 @@ static int file_cbfs_load_header(ulong end_of_rom, struct 
cbfs_header *header)
 
if (header->magic != good_magic || header->offset >
header->rom_size - header->boot_block_size) {
-   cbfs_s.result = CBFS_BAD_HEADER;
+   priv->result = CBFS_BAD_HEADER;
return 1;
}
return 0;
@@ -214,7 +215,7 @@ static void cbfs_init(struct cbfs_priv *priv, ulong 
end_of_rom)
 
priv->initialised = false;
 
-   if (file_cbfs_load_header(end_of_rom, >header))
+   if (file_cbfs_load_header(priv, end_of_rom))
return;
 
start_of_rom = (u8 *)(end_of_rom + 1 - priv->header.rom_size);
@@ -337,7 +338,7 @@ const struct cbfs_cachenode *file_cbfs_find_uncached(ulong 
end_of_rom,
u32 align;
static struct cbfs_cachenode node;
 
-   if (file_cbfs_load_header(end_of_rom, >header))
+   if (file_cbfs_load_header(priv, end_of_rom))
return NULL;
 
start = (u8 *)(end_of_rom + 1 - priv->header.rom_size);
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v2 03/13] cbfs: Use bool type for whether initialised

[Simon Glass]

At present this uses an int type. U-Boot now supports bool so use this
instead. Also use English spelling for initialised which we are here.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 fs/cbfs/cbfs.c | 28 ++--
 include/cbfs.h |  2 +-
 2 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c
index 846102dce38..322778d1c82 100644
--- a/fs/cbfs/cbfs.c
+++ b/fs/cbfs/cbfs.c
@@ -12,7 +12,7 @@ static const u32 good_magic = 0x4f524243;
 static const u8 good_file_magic[] = "LARCHIVE";
 
 struct cbfs_priv {
-   int initialized;
+   bool initialised;
struct cbfs_header header;
struct cbfs_cachenode *file_cache;
enum cbfs_result result;
@@ -25,8 +25,8 @@ const char *file_cbfs_error(void)
switch (cbfs_s.result) {
case CBFS_SUCCESS:
return "Success";
-   case CBFS_NOT_INITIALIZED:
-   return "CBFS not initialized";
+   case CBFS_NOT_INITIALISED:
+   return "CBFS not initialised";
case CBFS_BAD_HEADER:
return "Bad CBFS header";
case CBFS_BAD_FILE:
@@ -207,7 +207,7 @@ static void cbfs_init(struct cbfs_priv *priv, ulong 
end_of_rom)
 {
u8 *start_of_rom;
 
-   priv->initialized = 0;
+   priv->initialised = false;
 
if (file_cbfs_load_header(end_of_rom, >header))
return;
@@ -217,7 +217,7 @@ static void cbfs_init(struct cbfs_priv *priv, ulong 
end_of_rom)
file_cbfs_fill_cache(priv, start_of_rom, priv->header.rom_size,
 priv->header.align);
if (priv->result == CBFS_SUCCESS)
-   priv->initialized = 1;
+   priv->initialised = true;
 }
 
 void file_cbfs_init(ulong end_of_rom)
@@ -244,7 +244,7 @@ int cbfs_init_mem(ulong base, ulong size, struct cbfs_priv 
**privp)
if (priv->result != CBFS_SUCCESS)
return -EINVAL;
 
-   priv->initialized = 1;
+   priv->initialised = true;
priv = malloc(sizeof(priv_s));
if (!priv)
return -ENOMEM;
@@ -258,11 +258,11 @@ const struct cbfs_header *file_cbfs_get_header(void)
 {
struct cbfs_priv *priv = _s;
 
-   if (priv->initialized) {
+   if (priv->initialised) {
priv->result = CBFS_SUCCESS;
return >header;
} else {
-   priv->result = CBFS_NOT_INITIALIZED;
+   priv->result = CBFS_NOT_INITIALISED;
return NULL;
}
 }
@@ -271,8 +271,8 @@ const struct cbfs_cachenode *file_cbfs_get_first(void)
 {
struct cbfs_priv *priv = _s;
 
-   if (!priv->initialized) {
-   priv->result = CBFS_NOT_INITIALIZED;
+   if (!priv->initialised) {
+   priv->result = CBFS_NOT_INITIALISED;
return NULL;
} else {
priv->result = CBFS_SUCCESS;
@@ -284,8 +284,8 @@ void file_cbfs_get_next(const struct cbfs_cachenode **file)
 {
struct cbfs_priv *priv = _s;
 
-   if (!priv->initialized) {
-   priv->result = CBFS_NOT_INITIALIZED;
+   if (!priv->initialised) {
+   priv->result = CBFS_NOT_INITIALISED;
*file = NULL;
return;
}
@@ -300,8 +300,8 @@ const struct cbfs_cachenode *cbfs_find_file(struct 
cbfs_priv *priv,
 {
struct cbfs_cachenode *cache_node = priv->file_cache;
 
-   if (!priv->initialized) {
-   priv->result = CBFS_NOT_INITIALIZED;
+   if (!priv->initialised) {
+   priv->result = CBFS_NOT_INITIALISED;
return NULL;
}
 
diff --git a/include/cbfs.h b/include/cbfs.h
index 07bbcfd2cff..8b297c23d5a 100644
--- a/include/cbfs.h
+++ b/include/cbfs.h
@@ -11,7 +11,7 @@
 
 enum cbfs_result {
CBFS_SUCCESS = 0,
-   CBFS_NOT_INITIALIZED,
+   CBFS_NOT_INITIALISED,
CBFS_BAD_HEADER,
CBFS_BAD_FILE,
CBFS_FILE_NOT_FOUND
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v2 01/13] cbfs: Rename the result variable

[Simon Glass]

At present the result variable in the cbfs_priv is called 'result' as is
the local variable in a few functions. Change the latter to 'ret' which is
more common in U-Boot and avoids confusion.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 fs/cbfs/cbfs.c | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c
index 1aa6f8ee847..70440aa80b6 100644
--- a/fs/cbfs/cbfs.c
+++ b/fs/cbfs/cbfs.c
@@ -145,18 +145,18 @@ static void file_cbfs_fill_cache(struct cbfs_priv *priv, 
u8 *start, u32 size,
priv->file_cache = NULL;
 
while (size >= align) {
-   int result;
+   int ret;
u32 used;
 
new_node = (struct cbfs_cachenode *)
malloc(sizeof(struct cbfs_cachenode));
-   result = file_cbfs_next_file(priv, start, size, align, new_node,
-);
+   ret = file_cbfs_next_file(priv, start, size, align, new_node,
+ );
 
-   if (result < 0) {
+   if (ret < 0) {
free(new_node);
return;
-   } else if (result == 0) {
+   } else if (ret == 0) {
free(new_node);
break;
}
@@ -341,15 +341,15 @@ const struct cbfs_cachenode 
*file_cbfs_find_uncached(uintptr_t end_of_rom,
align = priv->header.align;
 
while (size >= align) {
-   int result;
+   int ret;
u32 used;
 
-   result = file_cbfs_next_file(priv, start, size, align, ,
-);
+   ret = file_cbfs_next_file(priv, start, size, align, ,
+ );
 
-   if (result < 0)
+   if (ret < 0)
return NULL;
-   else if (result == 0)
+   else if (ret == 0)
break;
 
if (!strcmp(name, node.name))
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v2 04/13] cbfs: Adjust return value of file_cbfs_next_file()

[Simon Glass]

At present his uses a true return to indicate it found a file. Adjust it
to use 0 for this, so it is consistent with other functions.

Update its callers accordingling and add a check for malloc() failure in
file_cbfs_fill_cache().

Signed-off-by: Simon Glass 
---

Changes in v2: None

 fs/cbfs/cbfs.c | 43 +++
 1 file changed, 23 insertions(+), 20 deletions(-)

diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c
index 322778d1c82..1037d192257 100644
--- a/fs/cbfs/cbfs.c
+++ b/fs/cbfs/cbfs.c
@@ -77,11 +77,12 @@ static void swap_file_header(struct cbfs_fileheader *dest,
  * @param used A pointer to the count of of bytes scanned through,
  * including the file if one is found.
  *
- * @return 1 if a file is found, 0 if one isn't.
+ * @return 0 if a file is found, -ENOENT if one isn't, -EBADF if a bad header
+ * is found.
  */
-static int file_cbfs_next_file(struct cbfs_priv *priv, u8 *start, u32 size,
-  u32 align, struct cbfs_cachenode *new_node,
-  u32 *used)
+static int file_cbfs_next_file(struct cbfs_priv *priv, u8 *start, int size,
+  int align, struct cbfs_cachenode *new_node,
+  int *used)
 {
struct cbfs_fileheader header;
 
@@ -105,7 +106,7 @@ static int file_cbfs_next_file(struct cbfs_priv *priv, u8 
*start, u32 size,
swap_file_header(, file_header);
if (header.offset < sizeof(struct cbfs_fileheader)) {
priv->result = CBFS_BAD_FILE;
-   return -1;
+   return -EBADF;
}
new_node->next = NULL;
new_node->type = header.type;
@@ -122,14 +123,15 @@ static int file_cbfs_next_file(struct cbfs_priv *priv, u8 
*start, u32 size,
step = step + align - step % align;
 
*used += step;
-   return 1;
+   return 0;
}
-   return 0;
+
+   return -ENOENT;
 }
 
 /* Look through a CBFS instance and copy file metadata into regular memory. */
-static void file_cbfs_fill_cache(struct cbfs_priv *priv, u8 *start, u32 size,
-u32 align)
+static int file_cbfs_fill_cache(struct cbfs_priv *priv, u8 *start, u32 size,
+   u32 align)
 {
struct cbfs_cachenode *cache_node;
struct cbfs_cachenode *new_node;
@@ -145,20 +147,21 @@ static void file_cbfs_fill_cache(struct cbfs_priv *priv, 
u8 *start, u32 size,
priv->file_cache = NULL;
 
while (size >= align) {
+   int used;
int ret;
-   u32 used;
 
new_node = (struct cbfs_cachenode *)
malloc(sizeof(struct cbfs_cachenode));
+   if (!new_node)
+   return -ENOMEM;
ret = file_cbfs_next_file(priv, start, size, align, new_node,
  );
 
if (ret < 0) {
free(new_node);
-   return;
-   } else if (ret == 0) {
-   free(new_node);
-   break;
+   if (ret == -ENOENT)
+   break;
+   return ret;
}
*cache_tail = new_node;
cache_tail = _node->next;
@@ -167,6 +170,8 @@ static void file_cbfs_fill_cache(struct cbfs_priv *priv, u8 
*start, u32 size,
start += used;
}
priv->result = CBFS_SUCCESS;
+
+   return 0;
 }
 
 /* Get the CBFS header out of the ROM and do endian conversion. */
@@ -341,16 +346,14 @@ const struct cbfs_cachenode 
*file_cbfs_find_uncached(ulong end_of_rom,
 
while (size >= align) {
int ret;
-   u32 used;
+   int used;
 
ret = file_cbfs_next_file(priv, start, size, align, ,
  );
-
-   if (ret < 0)
-   return NULL;
-   else if (ret == 0)
+   if (ret == -ENOENT)
break;
-
+   else if (ret)
+   return NULL;
if (!strcmp(name, node.name))
return 
 
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v2 02/13] cbfs: Use ulong consistently

[Simon Glass]

U-Boot uses ulong for addresses but there are a few places in this driver
that don't use it. Convert this driver over to follow this convention
fully.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 fs/cbfs/cbfs.c | 9 -
 include/cbfs.h | 4 ++--
 2 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c
index 70440aa80b6..846102dce38 100644
--- a/fs/cbfs/cbfs.c
+++ b/fs/cbfs/cbfs.c
@@ -170,8 +170,7 @@ static void file_cbfs_fill_cache(struct cbfs_priv *priv, u8 
*start, u32 size,
 }
 
 /* Get the CBFS header out of the ROM and do endian conversion. */
-static int file_cbfs_load_header(uintptr_t end_of_rom,
-struct cbfs_header *header)
+static int file_cbfs_load_header(ulong end_of_rom, struct cbfs_header *header)
 {
struct cbfs_header *header_in_rom;
int32_t offset = *(u32 *)(end_of_rom - 3);
@@ -204,7 +203,7 @@ static int cbfs_load_header_ptr(struct cbfs_priv *priv, 
ulong base,
return 0;
 }
 
-static void cbfs_init(struct cbfs_priv *priv, uintptr_t end_of_rom)
+static void cbfs_init(struct cbfs_priv *priv, ulong end_of_rom)
 {
u8 *start_of_rom;
 
@@ -221,7 +220,7 @@ static void cbfs_init(struct cbfs_priv *priv, uintptr_t 
end_of_rom)
priv->initialized = 1;
 }
 
-void file_cbfs_init(uintptr_t end_of_rom)
+void file_cbfs_init(ulong end_of_rom)
 {
cbfs_init(_s, end_of_rom);
 }
@@ -324,7 +323,7 @@ const struct cbfs_cachenode *file_cbfs_find(const char 
*name)
return cbfs_find_file(_s, name);
 }
 
-const struct cbfs_cachenode *file_cbfs_find_uncached(uintptr_t end_of_rom,
+const struct cbfs_cachenode *file_cbfs_find_uncached(ulong end_of_rom,
 const char *name)
 {
struct cbfs_priv *priv = _s;
diff --git a/include/cbfs.h b/include/cbfs.h
index d18001da76e..07bbcfd2cff 100644
--- a/include/cbfs.h
+++ b/include/cbfs.h
@@ -101,7 +101,7 @@ enum cbfs_result cbfs_get_result(void);
  * @end_of_rom: Points to the end of the ROM the CBFS should be read
  *  from.
  */
-void file_cbfs_init(uintptr_t end_of_rom);
+void file_cbfs_init(ulong end_of_rom);
 
 /**
  * file_cbfs_get_header() - Get the header structure for the current CBFS.
@@ -170,7 +170,7 @@ int cbfs_init_mem(ulong base, ulong size, struct cbfs_priv 
**privp);
  *
  * @return A handle to the file, or NULL on error.
  */
-const struct cbfs_cachenode *file_cbfs_find_uncached(uintptr_t end_of_rom,
+const struct cbfs_cachenode *file_cbfs_find_uncached(ulong end_of_rom,
 const char *name);
 
 /**
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v2 00/13] x86: cbfs: Various clean-ups to CBFS implementation

[Simon Glass]

This code is very old and has not had much of a clean-up since it was
written. This series aims to tidy it up to use error codes, avoid using
BSS when not necessary and to add a few more features.

Changes in v2:
- Fix incorrect function comments
- Fix s/u8/void/ in find_uncached()
- Fix setting of start in file_cbfs_find_uncached()
- Add more comments on @node in file_cbfs_find_uncached()
- Use void * instead of u8 * in file_cbfs_find_uncached_base()
- Fix and expand comments in file_cbfs_find_uncached_base()
- Rebase to master (with x86/master cherry-picked in too)

Simon Glass (13):
  cbfs: Rename the result variable
  cbfs: Use ulong consistently
  cbfs: Use bool type for whether initialised
  cbfs: Adjust return value of file_cbfs_next_file()
  cbfs: Adjust file_cbfs_load_header() to use cbfs_priv
  cbfs: Adjust cbfs_load_header_ptr() to use cbfs_priv
  cbfs: Unify the two header loaders
  cbfs: Use void * for the position pointers
  cbfs: Record the start address in cbfs_priv
  cbfs: Return the error code from file_cbfs_init()
  cbfs: Change file_cbfs_find_uncached() to return an error
  cbfs: Allow reading a file from a CBFS given its base addr
  cbfs: Don't require the CBFS size with cbfs_init_mem()

 arch/x86/lib/fsp2/fsp_init.c |   3 +-
 cmd/cbfs.c   |   3 +-
 fs/cbfs/cbfs.c   | 260 ++-
 include/cbfs.h   |  42 --
 4 files changed, 193 insertions(+), 115 deletions(-)

-- 
2.27.0.rc0.183.gde8f92d652-goog

Re: [PATCH 12/13] cbfs: Allow reading a file from a CBFS given its base addr

[Simon Glass]

Hi Bin,

On Wed, 20 May 2020 at 20:59, Bin Meng  wrote:
>
> Hi Simon,
>
> On Wed, May 13, 2020 at 10:24 PM Simon Glass  wrote:
> >
> > Currently we support reading a file from CBFS given the address of the end
> > of the ROM. Sometimes we only know the start of the CBFS. Add a function
> > to find a file given that.
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> >  fs/cbfs/cbfs.c | 13 +
> >  include/cbfs.h | 11 +++
> >  2 files changed, 24 insertions(+)
> >

Thanks for the comments. I had a change of plan at some point and the
series lost its consistency. Will send v2 soon.

Regards,
Simon

Re: Cortina Package 2 driver split up

[Simon Glass]

+U-Boot Mailing List

On Thu, 21 May 2020 at 18:15, Alex Nemirovsky
 wrote:
>
> Hi All,
>
> Thank you for reviewing various drivers in this package. Many of the drivers 
> have been reviewed and should be ready for incorporation.
> However, there seems to be some lone holdouts which are preventing the entire 
> series from entering the master code base.
>
> To accelerate the inclusion of the Cortina drivers into the mainline, we are 
> going to split up the drivers
> into individual patch series instead of packaging them up in one large series 
> of patches.   Hopefully this will help manage
> the flow into the code base.
>
> You should see these individual drivers come across shortly over the u-boot 
> mailing list.
>
> Thank you
> Alex

Re: [PATCH v5 1/2] usb: provide a device tree node to USB devices

[Simon Glass]

Hi Michael,

On Thu, 21 May 2020 at 17:28, Michael Walle  wrote:
>
> Am 2020-05-21 16:13, schrieb Bin Meng:
> > On Thu, May 21, 2020 at 12:40 AM Michael Walle 
> > wrote:
> >>
> >> It is possible to specify a device tree node for an USB device. This
> >> is
> >> useful if you have a static USB setup and want to use aliases which
> >> point to these nodes, like on the Raspberry Pi.
> >> The nodes are matched against their hub port number, the compatible
> >> strings are not matched for now.
> >>
> >> Signed-off-by: Michael Walle 
> >> ---
> >> This is a new patch in v5:
> >>   Fixes the ethernet0 alias on Raspberry Pis. This has never been
> >>   working, but wasn't a problem until recently. Patch 2/2 changes
> >>   the allocation of the numbers and reserves possible aliases.
> >>
> >>  drivers/usb/host/usb-uclass.c | 41
> >> ++-
> >>  1 file changed, 36 insertions(+), 5 deletions(-)
> >>
> >> diff --git a/drivers/usb/host/usb-uclass.c
> >> b/drivers/usb/host/usb-uclass.c
> >> index cb79dfbbd5..f42c0625cb 100644
> >> --- a/drivers/usb/host/usb-uclass.c
> >> +++ b/drivers/usb/host/usb-uclass.c
> >> @@ -494,6 +494,35 @@ static int usb_match_one_id(struct
> >> usb_device_descriptor *desc,
> >> return usb_match_one_id_intf(desc, int_desc, id);
> >>  }
> >>
> >> +static ofnode usb_get_ofnode(struct udevice *hub, int port)
> >> +{
> >> +   ofnode node;
> >> +   u32 reg;
> >> +
> >> +   if (!dev_has_of_node(hub))
> >> +   return ofnode_null();
> >> +
> >> +   /*
> >> +* The USB controller and its USB hub are two different
> >> udevices,
> >> +* but the device tree has only one node for both. Thus we are
> >> +* assigning this node to both udevices.
> >> +* If port is zero, the controller scans its root hub, thus we
> >> +* are using the same ofnode as the controller here.
> >> +*/
> >> +   if (!port)
> >> +   return dev_ofnode(hub);
> >> +
> >> +   ofnode_for_each_subnode(node, dev_ofnode(hub)) {
> >> +   if (ofnode_read_u32(node, "reg", ))
> >> +   continue;
> >> +
> >> +   if (reg == port)
> >> +   return node;
> >> +   }
> >> +
> >> +   return ofnode_null();
> >> +}
> >> +
> >>  /**
> >>   * usb_find_and_bind_driver() - Find and bind the right USB driver
> >>   *
> >> @@ -502,13 +531,14 @@ static int usb_match_one_id(struct
> >> usb_device_descriptor *desc,
> >>  static int usb_find_and_bind_driver(struct udevice *parent,
> >> struct usb_device_descriptor
> >> *desc,
> >> struct usb_interface_descriptor
> >> *iface,
> >> -   int bus_seq, int devnum,
> >> +   int bus_seq, int devnum, int port,
> >> struct udevice **devp)
> >>  {
> >> struct usb_driver_entry *start, *entry;
> >> int n_ents;
> >> int ret;
> >> char name[30], *str;
> >> +   ofnode node = usb_get_ofnode(parent, port);
> >>
> >> *devp = NULL;
> >> debug("%s: Searching for driver\n", __func__);
> >> @@ -533,8 +563,8 @@ static int usb_find_and_bind_driver(struct udevice
> >> *parent,
> >>  * find another driver. For now this doesn't
> >> seem
> >>  * necesssary, so just bind the first match.
> >>  */
> >> -   ret = device_bind(parent, drv, drv->name,
> >> NULL, -1,
> >> - );
> >> +   ret = device_bind_ofnode(parent, drv,
> >> drv->name, NULL,
> >> +node, );
> >> if (ret)
> >> goto error;
> >> debug("%s: Match found: %s\n", __func__,
> >> drv->name);
> >> @@ -651,9 +681,10 @@ int usb_scan_device(struct udevice *parent, int
> >> port,
> >> if (ret) {
> >> if (ret != -ENOENT)
> >> return ret;
> >> -   ret = usb_find_and_bind_driver(parent,
> >> >descriptor, iface,
> >> +   ret = usb_find_and_bind_driver(parent,
> >> >descriptor,
> >> +  iface,
> >>
> >> udev->controller_dev->seq,
> >> -  udev->devnum, );
> >> +  udev->devnum, port,
> >> );
> >> if (ret)
> >> return ret;
> >> created = true;
> >> --
> >
> > Do we have tests added ?
>
> Adding tests for this isn't straight forward. Mostly because the device
> tree
> is used to add the emulated USB devices. OTOH we try to match the device
> tree
> to the scanned devices. To make things worse, the hierarchy of the USB
> hubs
> and usb devices doesn't seem 

[GIT PULL] UniPhier SoC updates for v2020.07

[Masahiro Yamada]

Hi Tom,

Please pull changes for v2020.07
Thanks.



The following changes since commit 2fa581ba910368d0f7f995fb906d6c5e4218b594:

  Merge git://git.denx.de/u-boot-sh (2020-05-21 08:26:40 -0400)

are available in the Git repository at:

  https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier.git
tags/uniphier-v2020.07

for you to fetch changes up to 6cbe90486c581db5be84f0a0d9384705f54edabc:

  ARM: uniphier: remove board_eth_init() (2020-05-22 11:21:06 +0900)


UniPhier SoC updates for v2020.07

 - De-assert write protect for Denali NAND driver

 - Clean up include directives

 - Migrate to DM_ETH, and remove legacy board_eth_init()


Masahiro Yamada (9):
  mtd: rawnand: denali: configure SPARE_AREA_SKIP_BYTES only for denali_spl
  ARM: uniphier: select DM_ETH
  mtd: rawnand: denali: deassert write protect pin
  ARM: uniphier: include  instead of  from psci.c
  ARM: uniphier: remove #include  again from micro-support-card.c
  ARM: uniphier: drop #include  again from umc-pxs2.c
  ARM: uniphier: drop #include  again
  ARM: uniphier: delete or replace  includes
  ARM: uniphier: remove board_eth_init()

 arch/arm/Kconfig   |  1 +
 .../arm32/cache-uniphier.c |  1 -
 arch/arm/mach-uniphier/arm32/psci.c|  3 +--
 arch/arm/mach-uniphier/arm32/timer.c   |  2 +-
 arch/arm/mach-uniphier/arm64/mem_map.c |  1 -
 arch/arm/mach-uniphier/base-address.c  |  2 +-
 arch/arm/mach-uniphier/board_init.c|  1 -
 .../mach-uniphier/board_late_init.c|  1 -
 arch/arm/mach-uniphier/boards.c|  2 +-
 .../boot-device/boot-device-ld11.c |  1 -
 .../boot-device/boot-device-ld4.c  |  1 -
 .../boot-device/boot-device-pro5.c |  1 -
 .../boot-device/boot-device-pxs2.c |  1 -
 .../boot-device/boot-device-pxs3.c |  1 -
 .../boot-device/boot-device.c  |  2 +-
 .../mach-uniphier/clk/clk-dram-ld4.c   |  1 -
 .../mach-uniphier/clk/clk-dram-pxs2.c  |  1 -
 .../mach-uniphier/clk/clk-early-ld4.c  |  1 -
 arch/arm/mach-uniphier/clk/clk-ld11.c  |  1 -
 arch/arm/mach-uniphier/clk/dpll-ld4.c  |  1 -
 arch/arm/mach-uniphier/clk/dpll-pro4.c |  1 -
 .../debug-uart/debug-uart.c|  1 -
 .../mach-uniphier/dram/cmd_ddrmphy.c   |  1 -
 .../mach-uniphier/dram/cmd_ddrphy.c|  1 -
 .../dram/ddrphy-training.c |  1 -
 arch/arm/mach-uniphier/dram/umc-ld4.c  |  1 -
 arch/arm/mach-uniphier/dram/umc-pro4.c |  1 -
 arch/arm/mach-uniphier/dram/umc-pxs2.c |  2 --
 arch/arm/mach-uniphier/dram/umc-sld8.c |  1 -
 arch/arm/mach-uniphier/dram_init.c |  2 +-
 arch/arm/mach-uniphier/fdt-fixup.c |  2 +-
 arch/arm/mach-uniphier/memconf.c   |  1 -
 .../mach-uniphier/micro-support-card.c | 19 +++---
 arch/arm/mach-uniphier/mmc-boot-mode.c |  1 -
 arch/arm/mach-uniphier/mmc-first-dev.c |  1 -
 arch/arm/mach-uniphier/nand-reset.c|  1 -
 arch/arm/mach-uniphier/pinctrl-glue.c  |  1 -
 arch/arm/mach-uniphier/reset.c |  1 -
 arch/arm/mach-uniphier/sbc/sbc-ld11.c  |  1 -
 arch/arm/mach-uniphier/sbc/sbc.c   |  1 -
 .../arm/mach-uniphier/spl_board_init.c |  1 -
 configs/uniphier_ld4_sld8_defconfig|  1 -
 configs/uniphier_v7_defconfig  |  1 -
 configs/uniphier_v8_defconfig  |  1 -
 drivers/mtd/nand/raw/Kconfig   | 18 ++---
 drivers/mtd/nand/raw/denali.c  |  1 +
 46 files changed, 21 insertions(+), 69 deletions(-)

[PATCH v3 5/5] patman: Avoid importing gitutil in settings

[Simon Glass]

Pass this module in so that settings does not need to import it.

Signed-off-by: Simon Glass 
Reported-by: Stefan Bosch 
---

Changes in v3:
- Add more patches based on testing on a dusty Ubuntu 14.04

Changes in v2:
- Update gitutil as well

 tools/patman/main.py | 2 +-
 tools/patman/settings.py | 7 +++
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/tools/patman/main.py b/tools/patman/main.py
index f3d9c0c4348..c5f247ed514 100755
--- a/tools/patman/main.py
+++ b/tools/patman/main.py
@@ -77,7 +77,7 @@ specified by tags you place in the commits. Use -n to do a 
dry run first."""
 # Parse options twice: first to get the project and second to handle
 # defaults properly (which depends on project).
 (options, args) = parser.parse_args()
-settings.Setup(parser, options.project, '')
+settings.Setup(gitutil, parser, options.project, '')
 (options, args) = parser.parse_args()
 
 if __name__ != "__main__":
diff --git a/tools/patman/settings.py b/tools/patman/settings.py
index ca74fc611ff..635561ac056 100644
--- a/tools/patman/settings.py
+++ b/tools/patman/settings.py
@@ -11,7 +11,6 @@ import os
 import re
 
 from patman import command
-from patman import gitutil
 from patman import tools
 
 """Default settings per-project.
@@ -185,7 +184,7 @@ def ReadGitAliases(fname):
 
 fd.close()
 
-def CreatePatmanConfigFile(config_fname):
+def CreatePatmanConfigFile(gitutil, config_fname):
 """Creates a config file under $(HOME)/.patman if it can't find one.
 
 Args:
@@ -301,7 +300,7 @@ def GetItems(config, section):
 except:
 raise
 
-def Setup(parser, project_name, config_fname=''):
+def Setup(gitutil, parser, project_name, config_fname=''):
 """Set up the settings module by reading config files.
 
 Args:
@@ -318,7 +317,7 @@ def Setup(parser, project_name, config_fname=''):
 
 if not os.path.exists(config_fname):
 print("No config file found ~/.patman\nCreating one...\n")
-CreatePatmanConfigFile(config_fname)
+CreatePatmanConfigFile(gitutil, config_fname)
 
 config.read(config_fname)
 
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v3 2/5] patman: Avoid circular dependency between command and tools

[Simon Glass]

This seems to cause problems in some cases. Split the dependency by
copying the code to command.

Reported-by: Stefan Bosch 
Signed-off-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 tools/patman/command.py | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/tools/patman/command.py b/tools/patman/command.py
index e67ac159e5a..bf8ea6c8c3c 100644
--- a/tools/patman/command.py
+++ b/tools/patman/command.py
@@ -5,7 +5,6 @@
 import os
 
 from patman import cros_subprocess
-from patman import tools
 
 """Shell command ease-ups for Python."""
 
@@ -35,9 +34,9 @@ class CommandResult:
 
 def ToOutput(self, binary):
 if not binary:
-self.stdout = tools.ToString(self.stdout)
-self.stderr = tools.ToString(self.stderr)
-self.combined = tools.ToString(self.combined)
+self.stdout = self.stdout.decode('utf-8')
+self.stderr = self.stderr.decode('utf-8')
+self.combined = self.combined.decode('utf-8')
 return self
 
 
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v3 4/5] patman: Pass in maintainer dirs to avoid and import

[Simon Glass]

Adjust the get_maintainer module to accept a list of directories to search
for the script. This avoids needing to import gitutil.

Signed-off-by: Simon Glass 
Reported-by: Stefan Bosch 
---

Changes in v3: None
Changes in v2: None

 tools/patman/get_maintainer.py | 14 +++---
 tools/patman/series.py |  3 ++-
 2 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/tools/patman/get_maintainer.py b/tools/patman/get_maintainer.py
index 473f0feebf4..af4ba15bcdd 100644
--- a/tools/patman/get_maintainer.py
+++ b/tools/patman/get_maintainer.py
@@ -5,17 +5,16 @@
 import os
 
 from patman import command
-from patman import gitutil
 
-def FindGetMaintainer():
+def FindGetMaintainer(try_list):
 """Look for the get_maintainer.pl script.
 
+Args:
+try_list: List of directories to try for the get_maintainer.pl script
+
 Returns:
 If the script is found we'll return a path to it; else None.
 """
-try_list = [
-os.path.join(gitutil.GetTopLevel(), 'scripts'),
-]
 # Look in the list
 for path in try_list:
 fname = os.path.join(path, 'get_maintainer.pl')
@@ -24,7 +23,7 @@ def FindGetMaintainer():
 
 return None
 
-def GetMaintainer(fname, verbose=False):
+def GetMaintainer(dir_list, fname, verbose=False):
 """Run get_maintainer.pl on a file if we find it.
 
 We look for get_maintainer.pl in the 'scripts' directory at the top of
@@ -32,12 +31,13 @@ def GetMaintainer(fname, verbose=False):
 then we fail silently.
 
 Args:
+dir_list: List of directories to try for the get_maintainer.pl script
 fname: Path to the patch file to run get_maintainer.pl on.
 
 Returns:
 A list of email addresses to CC to.
 """
-get_maintainer = FindGetMaintainer()
+get_maintainer = FindGetMaintainer(dir_list)
 if not get_maintainer:
 if verbose:
 print("WARNING: Couldn't find get_maintainer.pl")
diff --git a/tools/patman/series.py b/tools/patman/series.py
index e5e28cebdf5..e6c72a9317b 100644
--- a/tools/patman/series.py
+++ b/tools/patman/series.py
@@ -233,7 +233,8 @@ class Series(dict):
 if type(add_maintainers) == type(cc):
 cc += add_maintainers
 elif add_maintainers:
-cc += get_maintainer.GetMaintainer(commit.patch)
+dir_list = [os.path.join(gitutil.GetTopLevel(), 'scripts')]
+cc += get_maintainer.GetMaintainer(dir_list, commit.patch)
 for x in set(cc) & set(settings.bounces):
 print(col.Color(col.YELLOW, 'Skipping "%s"' % x))
 cc = set(cc) - set(settings.bounces)
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v3 3/5] patman: Use a dict in gitutil to avoid importing series

[Simon Glass]

Only a few members of this class are used and only in a test. To avoid
importing the module, convert the test to use a dict.

Signed-off-by: Simon Glass 
Reported-by: Stefan Bosch 
---

Changes in v3: None
Changes in v2: None

 tools/patman/gitutil.py | 9 -
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py
index 844f8759dec..0bac9824811 100644
--- a/tools/patman/gitutil.py
+++ b/tools/patman/gitutil.py
@@ -8,7 +8,6 @@ import subprocess
 import sys
 
 from patman import command
-from patman import series
 from patman import settings
 from patman import terminal
 from patman import tools
@@ -366,9 +365,9 @@ def EmailPatches(series, cover_fname, args, dry_run, 
raise_on_error, cc_fname,
 >>> alias['boys'] = ['fred', ' john']
 >>> alias['all'] = ['fred ', 'john', '   mary   ']
 >>> alias[os.getenv('USER')] = ['this-is...@me.com']
->>> series = series.Series()
->>> series.to = ['fred']
->>> series.cc = ['mary']
+>>> series = {}
+>>> series['to'] = ['fred']
+>>> series['cc'] = ['mary']
 >>> EmailPatches(series, 'cover', ['p1', 'p2'], True, True, 'cc-fname', \
 False, alias)
 'git send-email --annotate --to "f.blo...@napier.co.nz" --cc \
@@ -377,7 +376,7 @@ def EmailPatches(series, cover_fname, args, dry_run, 
raise_on_error, cc_fname,
 alias)
 'git send-email --annotate --to "f.blo...@napier.co.nz" --cc \
 "m.popp...@cloud.net" --cc-cmd "./patman --cc-cmd cc-fname" p1'
->>> series.cc = ['all']
+>>> series['cc'] = ['all']
 >>> EmailPatches(series, 'cover', ['p1', 'p2'], True, True, 'cc-fname', \
 True, alias)
 'git send-email --annotate --to "this-is...@me.com" --cc-cmd "./patman \
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v3 1/5] patman: Drop unnecessary import in gitutil

[Simon Glass]

The checkpatch module is not used, so drop it.

Signed-off-by: Simon Glass 
Reported-by: Stefan Bosch 
---

Changes in v3:
- Split out the gitutil change into a separate patch

Changes in v2: None

 tools/patman/gitutil.py | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py
index 770a0510142..844f8759dec 100644
--- a/tools/patman/gitutil.py
+++ b/tools/patman/gitutil.py
@@ -7,7 +7,6 @@ import os
 import subprocess
 import sys
 
-from patman import checkpatch
 from patman import command
 from patman import series
 from patman import settings
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 22/22] x86: mtrr: Enhance 'mtrr' command to list MTRRs on any CPU

[Simon Glass]

Update this command so it can list the MTRRs on a selected CPU. If
'-c all' is used, then all CPUs are listed.

Signed-off-by: Simon Glass 
---

 cmd/x86/mtrr.c | 22 +-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c
index 8365a7978ff..66ef48ff9f3 100644
--- a/cmd/x86/mtrr.c
+++ b/cmd/x86/mtrr.c
@@ -131,7 +131,27 @@ static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int 
argc,
}
}
if (cmd == 'l') {
-   return do_mtrr_list(cpu_select);
+   bool first;
+   int i;
+
+   i = mp_first_cpu(cpu_select);
+   if (i < 0) {
+   printf("Invalid CPU (err=%d)\n", i);
+   return CMD_RET_FAILURE;
+   }
+   first = true;
+   for (; i >= 0; i = mp_next_cpu(cpu_select, i)) {
+   if (!first)
+   printf("\n");
+   printf("CPU %d:\n", i);
+   ret = do_mtrr_list(i);
+   if (ret) {
+   printf("Failed to read CPU %d (err=%d)\n", i,
+  ret);
+   return CMD_RET_FAILURE;
+   }
+   first = false;
+   }
} else {
switch (cmd) {
case 'e':
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 19/22] x86: mtrr: Update the command to use the new mtrr calls

[Simon Glass]

Use the multi-CPU calls to set the MTRR values. This still supports only
the boot CPU for now.

Signed-off-by: Simon Glass 
---

 cmd/x86/mtrr.c | 34 --
 1 file changed, 8 insertions(+), 26 deletions(-)

diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c
index 01197044452..4e48a16cf43 100644
--- a/cmd/x86/mtrr.c
+++ b/cmd/x86/mtrr.c
@@ -59,14 +59,14 @@ static int do_mtrr_list(int cpu_select)
return 0;
 }
 
-static int do_mtrr_set(uint reg, int argc, char *const argv[])
+static int do_mtrr_set(int cpu_select, uint reg, int argc, char *const argv[])
 {
const char *typename = argv[0];
-   struct mtrr_state state;
uint32_t start, size;
uint64_t base, mask;
int i, type = -1;
bool valid;
+   int ret;
 
if (argc < 3)
return CMD_RET_USAGE;
@@ -88,27 +88,9 @@ static int do_mtrr_set(uint reg, int argc, char *const 
argv[])
if (valid)
mask |= MTRR_PHYS_MASK_VALID;
 
-   mtrr_open(, true);
-   wrmsrl(MTRR_PHYS_BASE_MSR(reg), base);
-   wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask);
-   mtrr_close(, true);
-
-   return 0;
-}
-
-static int mtrr_set_valid(int reg, bool valid)
-{
-   struct mtrr_state state;
-   uint64_t mask;
-
-   mtrr_open(, true);
-   mask = native_read_msr(MTRR_PHYS_MASK_MSR(reg));
-   if (valid)
-   mask |= MTRR_PHYS_MASK_VALID;
-   else
-   mask &= ~MTRR_PHYS_MASK_VALID;
-   wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask);
-   mtrr_close(, true);
+   ret = mtrr_set(cpu_select, reg, base, mask);
+   if (ret)
+   return CMD_RET_FAILURE;
 
return 0;
 }
@@ -134,11 +116,11 @@ static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int 
argc,
return CMD_RET_USAGE;
}
if (*cmd == 'e')
-   return mtrr_set_valid(reg, true);
+   return mtrr_set_valid(cpu_select, reg, true);
else if (*cmd == 'd')
-   return mtrr_set_valid(reg, false);
+   return mtrr_set_valid(cpu_select, reg, false);
else if (*cmd == 's')
-   return do_mtrr_set(reg, argc - 1, argv + 1);
+   return do_mtrr_set(cpu_select, reg, argc - 1, argv + 1);
else
return CMD_RET_USAGE;
 
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 20/22] x86: mtrr: Restructure so command execution is in one place

[Simon Glass]

At present do_mtrr() does the 'list' subcommand at the top and the rest
below. Update it to do them all in the same place so we can (in a later
patch) add parsing of the CPU number for all subcommands.

Signed-off-by: Simon Glass 
---

 cmd/x86/mtrr.c | 55 +-
 1 file changed, 36 insertions(+), 19 deletions(-)

diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c
index 4e48a16cf43..fea7a437db8 100644
--- a/cmd/x86/mtrr.c
+++ b/cmd/x86/mtrr.c
@@ -98,31 +98,48 @@ static int do_mtrr_set(int cpu_select, uint reg, int argc, 
char *const argv[])
 static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int argc,
   char *const argv[])
 {
-   const char *cmd;
+   int cmd;
int cpu_select;
uint reg;
+   int ret;
 
cpu_select = MP_SELECT_BSP;
-   cmd = argv[1];
-   if (argc < 2 || *cmd == 'l')
+   argc--;
+   argv++;
+   cmd = argv[0] ? *argv[0] : 0;
+   if (argc < 1 || !cmd) {
+   cmd = 'l';
+   reg = 0;
+   } else {
+   if (argc < 2)
+   return CMD_RET_USAGE;
+   reg = simple_strtoul(argv[1], NULL, 16);
+   if (reg >= MTRR_COUNT) {
+   printf("Invalid register number\n");
+   return CMD_RET_USAGE;
+   }
+   }
+   if (cmd == 'l') {
return do_mtrr_list(cpu_select);
-   argc -= 2;
-   argv += 2;
-   if (argc <= 0)
-   return CMD_RET_USAGE;
-   reg = simple_strtoul(argv[0], NULL, 16);
-   if (reg >= MTRR_COUNT) {
-   printf("Invalid register number\n");
-   return CMD_RET_USAGE;
+   } else {
+   switch (cmd) {
+   case 'e':
+   ret = mtrr_set_valid(cpu_select, reg, true);
+   break;
+   case 'd':
+   ret = mtrr_set_valid(cpu_select, reg, false);
+   break;
+   case 's':
+   ret = do_mtrr_set(cpu_select, reg, argc - 2, argv + 2);
+   break;
+   default:
+   return CMD_RET_USAGE;
+   }
+   if (ret) {
+   printf("Operation failed (err=%d)\n", ret);
+   return CMD_RET_FAILURE;
+   }
}
-   if (*cmd == 'e')
-   return mtrr_set_valid(cpu_select, reg, true);
-   else if (*cmd == 'd')
-   return mtrr_set_valid(cpu_select, reg, false);
-   else if (*cmd == 's')
-   return do_mtrr_set(cpu_select, reg, argc - 1, argv + 1);
-   else
-   return CMD_RET_USAGE;
 
return 0;
 }
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 21/22] x86: mtrr: Update 'mtrr' to allow setting MTRRs on any CPU

[Simon Glass]

Add a -c option to mtrr to allow any CPU to be updated with this command.

Signed-off-by: Simon Glass 
---

 cmd/x86/mtrr.c | 18 --
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c
index fea7a437db8..8365a7978ff 100644
--- a/cmd/x86/mtrr.c
+++ b/cmd/x86/mtrr.c
@@ -104,6 +104,17 @@ static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int 
argc,
int ret;
 
cpu_select = MP_SELECT_BSP;
+   if (argc >= 3 && !strcmp("-c", argv[1])) {
+   const char *cpustr;
+
+   cpustr = argv[2];
+   if (*cpustr == 'a')
+   cpu_select = MP_SELECT_ALL;
+   else
+   cpu_select = simple_strtol(cpustr, NULL, 16);
+   argc -= 2;
+   argv += 2;
+   }
argc--;
argv++;
cmd = argv[0] ? *argv[0] : 0;
@@ -145,11 +156,14 @@ static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int 
argc,
 }
 
 U_BOOT_CMD(
-   mtrr,   6,  1,  do_mtrr,
+   mtrr,   8,  1,  do_mtrr,
"Use x86 memory type range registers (32-bit only)",
"[list]- list current registers\n"
"set   - set a register\n"
"\t is Uncacheable, Combine, Through, Protect, Back\n"
"disable   - disable a register\n"
-   "enable- enable a register"
+   "enable- enable a register\n"
+   "\n"
+   "Precede command with '-c |all' to access a particular CPU, e.g.\n"
+   "   mtrr -c all list; mtrr -c 2e list"
 );
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 16/22] x86: mtrr: Use MP calls to list the MTRRs

[Simon Glass]

Update the mtrr command to use mp_run_on_cpus() to obtain its information.
Since the selected CPU is the boot CPU this does not change the result,
but it sets the stage for supporting other CPUs.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/mtrr.c | 11 +++
 arch/x86/include/asm/mtrr.h | 30 ++
 cmd/x86/mtrr.c  | 25 +
 3 files changed, 62 insertions(+), 4 deletions(-)

diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c
index 7ec077d..11f3ef08172 100644
--- a/arch/x86/cpu/mtrr.c
+++ b/arch/x86/cpu/mtrr.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -63,6 +64,16 @@ static void set_var_mtrr(uint reg, uint type, uint64_t 
start, uint64_t size)
wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask | MTRR_PHYS_MASK_VALID);
 }
 
+void mtrr_save_all(struct mtrr_info *info)
+{
+   int i;
+
+   for (i = 0; i < MTRR_COUNT; i++) {
+   info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i));
+   info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i));
+   }
+}
+
 int mtrr_commit(bool do_caches)
 {
struct mtrr_request *req = gd->arch.mtrr_req;
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
index 212a699c1b2..476d6f8a9cf 100644
--- a/arch/x86/include/asm/mtrr.h
+++ b/arch/x86/include/asm/mtrr.h
@@ -70,6 +70,26 @@ struct mtrr_state {
bool enable_cache;
 };
 
+/**
+ * struct mtrr - Information about a single MTRR
+ *
+ * @base: Base address and MTRR_BASE_TYPE_MASK
+ * @mask: Mask and MTRR_PHYS_MASK_VALID
+ */
+struct mtrr {
+   u64 base;
+   u64 mask;
+};
+
+/**
+ * struct mtrr_info - Information about all MTRRs
+ *
+ * @mtrr: Information about each mtrr
+ */
+struct mtrr_info {
+   struct mtrr mtrr[MTRR_COUNT];
+};
+
 /**
  * mtrr_open() - Prepare to adjust MTRRs
  *
@@ -129,6 +149,16 @@ int mtrr_commit(bool do_caches);
  */
 int mtrr_set_next_var(uint type, uint64_t base, uint64_t size);
 
+/**
+ * mtrr_save_all() - Save all the MTRRs
+ *
+ * This writes all MTRRs from the boot CPU into a struct so they can be loaded
+ * onto other CPUs
+ *
+ * @info: Place to put the MTRR info
+ */
+void mtrr_save_all(struct mtrr_info *info);
+
 #endif
 
 #if ((CONFIG_XIP_ROM_SIZE & (CONFIG_XIP_ROM_SIZE - 1)) != 0)
diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c
index 5d25c5802af..01197044452 100644
--- a/cmd/x86/mtrr.c
+++ b/cmd/x86/mtrr.c
@@ -5,7 +5,9 @@
 
 #include 
 #include 
+#include 
 #include 
+#include 
 #include 
 
 static const char *const mtrr_type_name[MTRR_TYPE_COUNT] = {
@@ -18,19 +20,32 @@ static const char *const mtrr_type_name[MTRR_TYPE_COUNT] = {
"Back",
 };
 
-static int do_mtrr_list(void)
+static void save_mtrrs(void *arg)
 {
+   struct mtrr_info *info = arg;
+
+   mtrr_save_all(info);
+}
+
+static int do_mtrr_list(int cpu_select)
+{
+   struct mtrr_info info;
+   int ret;
int i;
 
printf("Reg Valid Write-type   %-16s %-16s %-16s\n", "Base   ||",
   "Mask   ||", "Size   ||");
+   memset(, '\0', sizeof(info));
+   ret = mp_run_on_cpus(cpu_select, save_mtrrs, );
+   if (ret)
+   return log_msg_ret("run", ret);
for (i = 0; i < MTRR_COUNT; i++) {
const char *type = "Invalid";
uint64_t base, mask, size;
bool valid;
 
-   base = native_read_msr(MTRR_PHYS_BASE_MSR(i));
-   mask = native_read_msr(MTRR_PHYS_MASK_MSR(i));
+   base = info.mtrr[i].base;
+   mask = info.mtrr[i].mask;
size = ~mask & ((1ULL << CONFIG_CPU_ADDR_BITS) - 1);
size |= (1 << 12) - 1;
size += 1;
@@ -102,11 +117,13 @@ static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int 
argc,
   char *const argv[])
 {
const char *cmd;
+   int cpu_select;
uint reg;
 
+   cpu_select = MP_SELECT_BSP;
cmd = argv[1];
if (argc < 2 || *cmd == 'l')
-   return do_mtrr_list();
+   return do_mtrr_list(cpu_select);
argc -= 2;
argv += 2;
if (argc <= 0)
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 15/22] x86: mp: Add iterators for CPUs

[Simon Glass]

It is convenient to iterate through the CPUs performing work on each one
and processing the result. Add a few iterator functions which handle this.
These can be used by any client code. It can call mp_run_on_cpus() on
each CPU that is returned, handling them one at a time.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/mp_init.c| 62 +++
 arch/x86/include/asm/mp.h | 40 +
 2 files changed, 102 insertions(+)

diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index a16be28647a..ef33a380171 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -627,6 +627,68 @@ int mp_park_aps(void)
return get_timer(start);
 }
 
+int mp_first_cpu(int cpu_select)
+{
+   struct udevice *dev;
+   int num_cpus;
+   int ret;
+
+   /*
+* This assumes that CPUs are numbered from 0. This function tries to
+* avoid assuming the CPU 0 is the boot CPU
+*/
+   if (cpu_select == MP_SELECT_ALL)
+   return 0;   /* start with the first one */
+
+   ret = get_bsp(, _cpus);
+   if (ret < 0)
+   return log_msg_ret("bsp", ret);
+
+   /* Return boot CPU if requested */
+   if (cpu_select == MP_SELECT_BSP)
+   return ret;
+
+   /* Return something other than the boot CPU, if APs requested */
+   if (cpu_select == MP_SELECT_APS && num_cpus > 1)
+   return ret == 0 ? 1 : 0;
+
+   /* Try to check for an invalid value */
+   if (cpu_select < 0 || cpu_select >= num_cpus)
+   return -EINVAL;
+
+   return cpu_select;  /* return the only selected one */
+}
+
+int mp_next_cpu(int cpu_select, int prev_cpu)
+{
+   struct udevice *dev;
+   int num_cpus;
+   int ret;
+   int bsp;
+
+   /* If we selected the BSP or a particular single CPU, we are done */
+   if (cpu_select == MP_SELECT_BSP || cpu_select >= 0)
+   return -EFBIG;
+
+   /* Must be doing MP_SELECT_ALL or MP_SELECT_APS; return the next CPU */
+   ret = get_bsp(, _cpus);
+   if (ret < 0)
+   return log_msg_ret("bsp", ret);
+   bsp = ret;
+
+   /* Move to the next CPU */
+   assert(prev_cpu >= 0);
+   ret = prev_cpu + 1;
+
+   /* Skip the BSP if needed */
+   if (cpu_select == MP_SELECT_APS && ret == bsp)
+   ret++;
+   if (ret >= num_cpus)
+   return -EFBIG;
+
+   return ret;
+}
+
 int mp_init(void)
 {
int num_aps, num_cpus;
diff --git a/arch/x86/include/asm/mp.h b/arch/x86/include/asm/mp.h
index 38961ca44b3..9f4223ae8c3 100644
--- a/arch/x86/include/asm/mp.h
+++ b/arch/x86/include/asm/mp.h
@@ -115,6 +115,31 @@ int mp_run_on_cpus(int cpu_select, mp_run_func func, void 
*arg);
  * @return 0 on success, -ve on error
  */
 int mp_park_aps(void);
+
+/**
+ * mp_first_cpu() - Get the first CPU to process, from a selection
+ *
+ * This is used to iterate through selected CPUs. Call this function first, 
then
+ * call mp_next_cpu() repeatedly until it returns -EFBIG.
+ *
+ * @cpu_select: Selected CPUs (either a CPU number or MP_SELECT_...)
+ * @return next CPU number to run on (e.g. 0)
+ */
+int mp_first_cpu(int cpu_select);
+
+/**
+ * mp_next_cpu() - Get the next CPU to process, from a selection
+ *
+ * This is used to iterate through selected CPUs. After first calling
+ * mp_first_cpu() once, call this function repeatedly until it returns -EFBIG.
+ *
+ * The value of @cpu_select must be the same for all calls.
+ *
+ * @cpu_select: Selected CPUs (either a CPU number or MP_SELECT_...)
+ * @prev_cpu: Previous value returned by mp_first_cpu()/mp_next_cpu()
+ * @return next CPU number to run on (e.g. 0)
+ */
+int mp_next_cpu(int cpu_select, int prev_cpu);
 #else
 static inline int mp_run_on_cpus(int cpu_select, mp_run_func func, void *arg)
 {
@@ -131,6 +156,21 @@ static inline int mp_park_aps(void)
return 0;
 }
 
+static inline int mp_first_cpu(int cpu_select)
+{
+   /* We cannot run on any APs, nor a selected CPU */
+   return cpu_select == MP_SELECT_APS ? -EFBIG : MP_SELECT_BSP;
+}
+
+static inline int mp_next_cpu(int cpu_select, int prev_cpu)
+{
+   /*
+* When MP is not enabled, there is only one CPU and we did it in
+* mp_first_cpu()
+*/
+   return -EFBIG;
+}
+
 #endif
 
 #endif /* _X86_MP_H_ */
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 18/22] x86: mtrr: Add support for writing to MTRRs on any CPU

[Simon Glass]

To enable support for the 'mtrr' command, add a way to perform MTRR
operations on selected CPUs.

This works by setting up a little 'operation' structure and sending it
around the CPUs for action.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/mtrr.c | 81 +
 arch/x86/include/asm/mtrr.h | 21 ++
 2 files changed, 102 insertions(+)

diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c
index a48c9d8232e..25f317d4298 100644
--- a/arch/x86/cpu/mtrr.c
+++ b/arch/x86/cpu/mtrr.c
@@ -221,3 +221,84 @@ int mtrr_set_next_var(uint type, uint64_t start, uint64_t 
size)
 
return 0;
 }
+
+/** enum mtrr_opcode - supported operations for mtrr_do_oper() */
+enum mtrr_opcode {
+   MTRR_OP_SET,
+   MTRR_OP_SET_VALID,
+};
+
+/**
+ * struct mtrr_oper - An MTRR operation to perform on a CPU
+ *
+ * @opcode: Indicates operation to perform
+ * @reg: MTRR reg number to select (0-7, -1 = all)
+ * @valid: Valid value to write for MTRR_OP_SET_VALID
+ * @base: Base value to write for MTRR_OP_SET
+ * @mask: Mask value to write for MTRR_OP_SET
+ */
+struct mtrr_oper {
+   enum mtrr_opcode opcode;
+   int reg;
+   bool valid;
+   u64 base;
+   u64 mask;
+};
+
+static void mtrr_do_oper(void *arg)
+{
+   struct mtrr_oper *oper = arg;
+   u64 mask;
+
+   switch (oper->opcode) {
+   case MTRR_OP_SET_VALID:
+   mask = native_read_msr(MTRR_PHYS_MASK_MSR(oper->reg));
+   if (oper->valid)
+   mask |= MTRR_PHYS_MASK_VALID;
+   else
+   mask &= ~MTRR_PHYS_MASK_VALID;
+   wrmsrl(MTRR_PHYS_MASK_MSR(oper->reg), mask);
+   break;
+   case MTRR_OP_SET:
+   wrmsrl(MTRR_PHYS_BASE_MSR(oper->reg), oper->base);
+   wrmsrl(MTRR_PHYS_MASK_MSR(oper->reg), oper->mask);
+   break;
+   }
+}
+
+static int mtrr_start_op(int cpu_select, struct mtrr_oper *oper)
+{
+   struct mtrr_state state;
+   int ret;
+
+   mtrr_open(, true);
+   ret = mp_run_on_cpus(cpu_select, mtrr_do_oper, oper);
+   mtrr_close(, true);
+   if (ret)
+   return log_msg_ret("run", ret);
+
+   return 0;
+}
+
+int mtrr_set_valid(int cpu_select, int reg, bool valid)
+{
+   struct mtrr_oper oper;
+
+   oper.opcode = MTRR_OP_SET_VALID;
+   oper.reg = reg;
+   oper.valid = valid;
+
+   return mtrr_start_op(cpu_select, );
+}
+
+int mtrr_set(int cpu_select, int reg, u64 base, u64 mask)
+{
+   struct mtrr_oper oper;
+
+   oper.opcode = MTRR_OP_SET;
+   oper.reg = reg;
+   oper.base = base;
+   oper.mask = mask;
+
+   return mtrr_start_op(cpu_select, );
+}
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
index 476d6f8a9cf..6c50a67e1fe 100644
--- a/arch/x86/include/asm/mtrr.h
+++ b/arch/x86/include/asm/mtrr.h
@@ -159,6 +159,27 @@ int mtrr_set_next_var(uint type, uint64_t base, uint64_t 
size);
  */
 void mtrr_save_all(struct mtrr_info *info);
 
+/**
+ * mtrr_set_valid() - Set the valid flag for a selected MTRR and CPU(s)
+ *
+ * @cpu_select: Selected CPUs (either a CPU number or MP_SELECT_...)
+ * @reg: MTRR register to write (0-7)
+ * @valid: Valid flag to write
+ * @return 0 on success, -ve on error
+ */
+int mtrr_set_valid(int cpu_select, int reg, bool valid);
+
+/**
+ * mtrr_set() - Set the valid flag for a selected MTRR and CPU(s)
+ *
+ * @cpu_select: Selected CPUs (either a CPU number or MP_SELECT_...)
+ * @reg: MTRR register to write (0-7)
+ * @base: Base address and MTRR_BASE_TYPE_MASK
+ * @mask: Mask and MTRR_PHYS_MASK_VALID
+ * @return 0 on success, -ve on error
+ */
+int mtrr_set(int cpu_select, int reg, u64 base, u64 mask);
+
 #endif
 
 #if ((CONFIG_XIP_ROM_SIZE & (CONFIG_XIP_ROM_SIZE - 1)) != 0)
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 14/22] x86: mp: Park CPUs before running the OS

[Simon Glass]

With the new MP features the CPUs are no-longer parked when the OS is run.
Fix this by calling a special function to park them, just before the OS is
started.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/cpu.c|  5 +
 arch/x86/cpu/mp_init.c| 18 ++
 arch/x86/include/asm/mp.h | 17 +
 3 files changed, 40 insertions(+)

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index d0720fb7fb5..baa7dae172e 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -66,6 +66,11 @@ static const char *const x86_vendor_name[] = {
 
 int __weak x86_cleanup_before_linux(void)
 {
+   int ret;
+
+   ret = mp_park_aps();
+   if (ret)
+   return log_msg_ret("park", ret);
bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR,
CONFIG_BOOTSTAGE_STASH_SIZE);
 
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 9f97dc7a9ba..a16be28647a 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -609,6 +609,24 @@ int mp_run_on_cpus(int cpu_select, mp_run_func func, void 
*arg)
return 0;
 }
 
+static void park_this_cpu(void *unused)
+{
+   stop_this_cpu();
+}
+
+int mp_park_aps(void)
+{
+   unsigned long start;
+   int ret;
+
+   start = get_timer(0);
+   ret = mp_run_on_cpus(MP_SELECT_APS, park_this_cpu, NULL);
+   if (ret)
+   return ret;
+
+   return get_timer(start);
+}
+
 int mp_init(void)
 {
int num_aps, num_cpus;
diff --git a/arch/x86/include/asm/mp.h b/arch/x86/include/asm/mp.h
index 0272b3c0b6a..38961ca44b3 100644
--- a/arch/x86/include/asm/mp.h
+++ b/arch/x86/include/asm/mp.h
@@ -106,6 +106,15 @@ typedef void (*mp_run_func)(void *arg);
  * @return 0 on success, -ve on error
  */
 int mp_run_on_cpus(int cpu_select, mp_run_func func, void *arg);
+
+/**
+ * mp_park_aps() - Park the APs ready for the OS
+ *
+ * This halts all CPUs except the main one, ready for the OS to use them
+ *
+ * @return 0 on success, -ve on error
+ */
+int mp_park_aps(void);
 #else
 static inline int mp_run_on_cpus(int cpu_select, mp_run_func func, void *arg)
 {
@@ -114,6 +123,14 @@ static inline int mp_run_on_cpus(int cpu_select, 
mp_run_func func, void *arg)
 
return 0;
 }
+
+static inline int mp_park_aps(void)
+{
+   /* No APs to park */
+
+   return 0;
+}
+
 #endif
 
 #endif /* _X86_MP_H_ */
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 13/22] x86: mp: Allow running functions on multiple CPUs

[Simon Glass]

Add a way to run a function on a selection of CPUs. This supports either
a single CPU, all CPUs, just the main CPU or just the 'APs', in Intel
terminology.

It works by writing into a mailbox and then waiting for the CPUs to notice
it, take action and indicate they are done.

When SMP is not yet enabled, this just calls the function on the main CPU.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/mp_init.c| 82 ---
 arch/x86/include/asm/mp.h | 30 ++
 2 files changed, 106 insertions(+), 6 deletions(-)

diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 139e9749e74..9f97dc7a9ba 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -50,12 +50,7 @@ struct cpu_map {
 };
 
 struct mp_callback {
-   /**
-* func() - Function to call on the AP
-*
-* @arg: Argument to pass
-*/
-   void (*func)(void *arg);
+   mp_run_func func;
void *arg;
int logical_cpu_number;
 };
@@ -483,6 +478,50 @@ static void store_callback(struct mp_callback **slot, 
struct mp_callback *val)
);
 }
 
+static int run_ap_work(struct mp_callback *callback, struct udevice *bsp,
+  int num_cpus, uint expire_ms)
+{
+   int cur_cpu = bsp->req_seq;
+   int num_aps = num_cpus - 1; /* number of non-BSPs to get this message */
+   int cpus_accepted;
+   ulong start;
+   int i;
+
+   /* Signal to all the APs to run the func. */
+   for (i = 0; i < num_cpus; i++) {
+   if (cur_cpu != i)
+   store_callback(_callbacks[i], callback);
+   }
+   mfence();
+
+   /* Wait for all the APs to signal back that call has been accepted. */
+   start = get_timer(0);
+
+   do {
+   mdelay(1);
+   cpus_accepted = 0;
+
+   for (i = 0; i < num_cpus; i++) {
+   if (cur_cpu == i)
+   continue;
+   if (!read_callback(_callbacks[i]))
+   cpus_accepted++;
+   }
+
+   if (expire_ms && get_timer(start) >= expire_ms) {
+   log(UCLASS_CPU, LOGL_CRIT,
+   "AP call expired; %d/%d CPUs accepted\n",
+   cpus_accepted, num_aps);
+   return -ETIMEDOUT;
+   }
+   } while (cpus_accepted != num_aps);
+
+   /* Make sure we can see any data written by the APs */
+   mfence();
+
+   return 0;
+}
+
 /**
  * ap_wait_for_instruction() - Wait for and process requests from the main CPU
  *
@@ -539,6 +578,37 @@ static struct mp_flight_record mp_steps[] = {
MP_FR_BLOCK_APS(ap_wait_for_instruction, NULL, NULL, NULL),
 };
 
+int mp_run_on_cpus(int cpu_select, mp_run_func func, void *arg)
+{
+   struct mp_callback lcb = {
+   .func = func,
+   .arg = arg,
+   .logical_cpu_number = cpu_select,
+   };
+   struct udevice *dev;
+   int num_cpus;
+   int ret;
+
+   if (!(gd->flags & GD_FLG_SMP_INIT))
+   return -ENXIO;
+
+   ret = get_bsp(, _cpus);
+   if (ret < 0)
+   return log_msg_ret("bsp", ret);
+   if (cpu_select == MP_SELECT_ALL || cpu_select == MP_SELECT_BSP ||
+   cpu_select == ret) {
+   /* Run on BSP first */
+   func(arg);
+   }
+
+   /* Allow up to 1 second for all APs to finish */
+   ret = run_ap_work(, dev, num_cpus, 1000 /* ms */);
+   if (ret)
+   return log_msg_ret("aps", ret);
+
+   return 0;
+}
+
 int mp_init(void)
 {
int num_aps, num_cpus;
diff --git a/arch/x86/include/asm/mp.h b/arch/x86/include/asm/mp.h
index 41b1575f4be..0272b3c0b6a 100644
--- a/arch/x86/include/asm/mp.h
+++ b/arch/x86/include/asm/mp.h
@@ -86,4 +86,34 @@ int mp_init(void);
 /* Set up additional CPUs */
 int x86_mp_init(void);
 
+/**
+ * mp_run_func() - Function to call on the AP
+ *
+ * @arg: Argument to pass
+ */
+typedef void (*mp_run_func)(void *arg);
+
+#if defined(CONFIG_SMP) && !CONFIG_IS_ENABLED(X86_64)
+/**
+ * mp_run_on_cpus() - Run a function on one or all CPUs
+ *
+ * This does not return until all CPUs have completed the work
+ *
+ * @cpu_select: CPU to run on, or MP_SELECT_ALL for all, or MP_SELECT_BSP for
+ * BSP
+ * @func: Function to run
+ * @arg: Argument to pass to the function
+ * @return 0 on success, -ve on error
+ */
+int mp_run_on_cpus(int cpu_select, mp_run_func func, void *arg);
+#else
+static inline int mp_run_on_cpus(int cpu_select, mp_run_func func, void *arg)
+{
+   /* There is only one CPU, so just call the function here */
+   func(arg);
+
+   return 0;
+}
+#endif
+
 #endif /* _X86_MP_H_ */
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 17/22] x86: mtrr: Update MTRRs on all CPUs

[Simon Glass]

When the boot CPU MTRRs are updated, perform the same update on all other
CPUs so they are kept in sync.

This avoids kernel warnings about mismatched MTRRs.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/mtrr.c | 57 +
 1 file changed, 57 insertions(+)

diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c
index 11f3ef08172..a48c9d8232e 100644
--- a/arch/x86/cpu/mtrr.c
+++ b/arch/x86/cpu/mtrr.c
@@ -74,10 +74,61 @@ void mtrr_save_all(struct mtrr_info *info)
}
 }
 
+void mtrr_load_all(struct mtrr_info *info)
+{
+   struct mtrr_state state;
+   int i;
+
+   for (i = 0; i < MTRR_COUNT; i++) {
+   mtrr_open(, true);
+   wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base);
+   wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask);
+   mtrr_close(, true);
+   }
+}
+
+static void save_mtrrs(void *arg)
+{
+   struct mtrr_info *info = arg;
+
+   mtrr_save_all(info);
+}
+
+static void load_mtrrs(void *arg)
+{
+   struct mtrr_info *info = arg;
+
+   mtrr_load_all(info);
+}
+
+/**
+ * mtrr_copy_to_aps() - Copy the MTRRs from the boot CPU to other CPUs
+ *
+ * @return 0 on success, -ve on failure
+ */
+static int mtrr_copy_to_aps(void)
+{
+   struct mtrr_info info;
+   int ret;
+
+   ret = mp_run_on_cpus(MP_SELECT_BSP, save_mtrrs, );
+   if (ret == -ENXIO)
+   return 0;
+   else if (ret)
+   return log_msg_ret("bsp", ret);
+
+   ret = mp_run_on_cpus(MP_SELECT_APS, load_mtrrs, );
+   if (ret)
+   return log_msg_ret("bsp", ret);
+
+   return 0;
+}
+
 int mtrr_commit(bool do_caches)
 {
struct mtrr_request *req = gd->arch.mtrr_req;
struct mtrr_state state;
+   int ret;
int i;
 
debug("%s: enabled=%d, count=%d\n", __func__, gd->arch.has_mtrr,
@@ -99,6 +150,12 @@ int mtrr_commit(bool do_caches)
mtrr_close(, do_caches);
debug("mtrr done\n");
 
+   if (gd->flags & GD_FLG_RELOC) {
+   ret = mtrr_copy_to_aps();
+   if (ret)
+   return log_msg_ret("copy", ret);
+   }
+
return 0;
 }
 
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 10/22] x86: mp: Support APs waiting for instructions

[Simon Glass]

At present the APs (non-boot CPUs) are inited once and then parked ready
for the OS to use them. However in some cases we want to send new requests
through, such as to change MTRRs and keep them consistent across CPUs.

Change the last state of the flight plan to go into a wait loop, accepting
instructions from the main CPU.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/mp_init.c| 99 ---
 arch/x86/include/asm/mp.h | 11 +
 2 files changed, 104 insertions(+), 6 deletions(-)

diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index ccb68b8b89b..c424f283807 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -43,14 +43,36 @@ struct mp_flight_plan {
struct mp_flight_record *records;
 };
 
-static struct mp_flight_plan mp_info;
-
 struct cpu_map {
struct udevice *dev;
int apic_id;
int err_code;
 };
 
+struct mp_callback {
+   /**
+* func() - Function to call on the AP
+*
+* @arg: Argument to pass
+*/
+   void (*func)(void *arg);
+   void *arg;
+   int logical_cpu_number;
+};
+
+static struct mp_flight_plan mp_info;
+
+/*
+ * ap_callbacks - Callback mailbox array
+ *
+ * Array of callback, one entry for each available CPU, indexed by the CPU
+ * number, which is dev->req_seq. The entry for the main CPU is never used.
+ * When this is NULL, there is no pending work for the CPU to run. When
+ * non-NULL it points to the mp_callback structure. This is shared between all
+ * CPUs, so should only be written by the main CPU.
+ */
+static struct mp_callback **ap_callbacks;
+
 static inline void barrier_wait(atomic_t *b)
 {
while (atomic_read(b) == 0)
@@ -147,11 +169,9 @@ static void ap_init(unsigned int cpu_index)
debug("AP: slot %d apic_id %x, dev %s\n", cpu_index, apic_id,
  dev ? dev->name : "(apic_id not found)");
 
-   /* Walk the flight plan */
+   /* Walk the flight plan, which never returns */
ap_do_flight_plan(dev);
-
-   /* Park the AP */
-   debug("parking\n");
+   debug("Unexpected return\n");
 done:
stop_this_cpu();
 }
@@ -442,6 +462,68 @@ static int get_bsp(struct udevice **devp, int *cpu_countp)
return dev->req_seq;
 }
 
+static struct mp_callback *read_callback(struct mp_callback **slot)
+{
+   struct mp_callback *ret;
+
+   asm volatile ("mov  %1, %0\n"
+   : "=r" (ret)
+   : "m" (*slot)
+   : "memory"
+   );
+   return ret;
+}
+
+static void store_callback(struct mp_callback **slot, struct mp_callback *val)
+{
+   asm volatile ("mov  %1, %0\n"
+   : "=m" (*slot)
+   : "r" (val)
+   : "memory"
+   );
+}
+
+/**
+ * ap_wait_for_instruction() - Wait for and process requests from the main CPU
+ *
+ * This is called by APs (here, everything other than the main boot CPU) to
+ * await instructions. They arrive in the form of a function call and argument,
+ * which is then called. This uses a simple mailbox with atomic read/set
+ *
+ * @cpu: CPU that is waiting
+ * @unused: Optional argument provided by struct mp_flight_record, not used 
here
+ * @return Does not return
+ */
+static int ap_wait_for_instruction(struct udevice *cpu, void *unused)
+{
+   struct mp_callback lcb;
+   struct mp_callback **per_cpu_slot;
+
+   per_cpu_slot = _callbacks[cpu->req_seq];
+
+   while (1) {
+   struct mp_callback *cb = read_callback(per_cpu_slot);
+
+   if (!cb) {
+   asm ("pause");
+   continue;
+   }
+
+   /* Copy to local variable before using the value */
+   memcpy(, cb, sizeof(lcb));
+   mfence();
+   if (lcb.logical_cpu_number == MP_SELECT_ALL ||
+   lcb.logical_cpu_number == MP_SELECT_APS ||
+   cpu->req_seq == lcb.logical_cpu_number)
+   lcb.func(lcb.arg);
+
+   /* Indicate we are finished */
+   store_callback(per_cpu_slot, NULL);
+   }
+
+   return 0;
+}
+
 static int mp_init_cpu(struct udevice *cpu, void *unused)
 {
struct cpu_platdata *plat = dev_get_parent_platdata(cpu);
@@ -454,6 +536,7 @@ static int mp_init_cpu(struct udevice *cpu, void *unused)
 
 static struct mp_flight_record mp_steps[] = {
MP_FR_BLOCK_APS(mp_init_cpu, NULL, mp_init_cpu, NULL),
+   MP_FR_BLOCK_APS(ap_wait_for_instruction, NULL, NULL, NULL),
 };
 
 int mp_init(void)
@@ -491,6 +574,10 @@ int mp_init(void)
if (ret)
log_warning("Warning: Device tree does not describe all CPUs. 
Extra ones will not be started correctly\n");
 
+   ap_callbacks = calloc(num_cpus, sizeof(struct mp_callback *));
+   if (!ap_callbacks)
+   return -ENOMEM;
+
/* Copy needed parameters so that APs have a reference to the plan */
mp_info.num_records 

[PATCH 11/22] global_data: Add a generic global_data flag for SMP state

[Simon Glass]

Allow keeping track of whether all CPUs have been enabled yet. This allows
us to know whether other CPUs need to be considered when updating
CPU-specific settings such as MTRRs on x86.

Signed-off-by: Simon Glass 
---

 include/asm-generic/global_data.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/asm-generic/global_data.h 
b/include/asm-generic/global_data.h
index 8c78792cc98..345f365d794 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -167,5 +167,6 @@ typedef struct global_data {
 #define GD_FLG_LOG_READY   0x08000 /* Log system is ready for use */
 #define GD_FLG_WDT_READY   0x1 /* Watchdog is ready for use   */
 #define GD_FLG_SKIP_LL_INIT0x2 /* Don't perform low-level init*/
+#define GD_FLG_SMP_INIT0x4 /* SMP init is complete 
   */
 
 #endif /* __ASM_GENERIC_GBL_DATA_H */
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 09/22] x86: cpu: Remove unnecessary #ifdefs

[Simon Glass]

Drop some #ifdefs that are not needed or can be converted to compile-time
checks.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/cpu.c  | 58 -
 arch/x86/cpu/i386/cpu.c |  2 --
 2 files changed, 28 insertions(+), 32 deletions(-)

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 23a4d633d2d..d0720fb7fb5 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -66,10 +66,8 @@ static const char *const x86_vendor_name[] = {
 
 int __weak x86_cleanup_before_linux(void)
 {
-#ifdef CONFIG_BOOTSTAGE_STASH
bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR,
CONFIG_BOOTSTAGE_STASH_SIZE);
-#endif
 
return 0;
 }
@@ -200,18 +198,19 @@ int last_stage_init(void)
 
write_tables();
 
-#ifdef CONFIG_GENERATE_ACPI_TABLE
-   fadt = acpi_find_fadt();
+   if (IS_ENABLED(CONFIG_GENERATE_ACPI_TABLE)) {
+   fadt = acpi_find_fadt();
 
-   /* Don't touch ACPI hardware on HW reduced platforms */
-   if (fadt && !(fadt->flags & ACPI_FADT_HW_REDUCED_ACPI)) {
-   /*
-* Other than waiting for OSPM to request us to switch to ACPI
-* mode, do it by ourselves, since SMI will not be triggered.
-*/
-   enter_acpi_mode(fadt->pm1a_cnt_blk);
+   /* Don't touch ACPI hardware on HW reduced platforms */
+   if (fadt && !(fadt->flags & ACPI_FADT_HW_REDUCED_ACPI)) {
+   /*
+* Other than waiting for OSPM to request us to switch
+* to ACPI * mode, do it by ourselves, since SMI will
+* not be triggered.
+*/
+   enter_acpi_mode(fadt->pm1a_cnt_blk);
+   }
}
-#endif
 
return 0;
 }
@@ -219,19 +218,20 @@ int last_stage_init(void)
 
 static int x86_init_cpus(void)
 {
-#ifdef CONFIG_SMP
-   debug("Init additional CPUs\n");
-   x86_mp_init();
-#else
-   struct udevice *dev;
+   if (IS_ENABLED(CONFIG_SMP)) {
+   debug("Init additional CPUs\n");
+   x86_mp_init();
+   } else {
+   struct udevice *dev;
 
-   /*
-* This causes the cpu-x86 driver to be probed.
-* We don't check return value here as we want to allow boards
-* which have not been converted to use cpu uclass driver to boot.
-*/
-   uclass_first_device(UCLASS_CPU, );
-#endif
+   /*
+* This causes the cpu-x86 driver to be probed.
+* We don't check return value here as we want to allow boards
+* which have not been converted to use cpu uclass driver to
+* boot.
+*/
+   uclass_first_device(UCLASS_CPU, );
+   }
 
return 0;
 }
@@ -269,13 +269,11 @@ int cpu_init_r(void)
 #ifndef CONFIG_EFI_STUB
 int reserve_arch(void)
 {
-#ifdef CONFIG_ENABLE_MRC_CACHE
-   mrccache_reserve();
-#endif
+   if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE))
+   mrccache_reserve();
 
-#ifdef CONFIG_SEABIOS
-   high_table_reserve();
-#endif
+   if (IS_ENABLED(CONFIG_SEABIOS))
+   high_table_reserve();
 
if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) {
acpi_s3_reserve();
diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c
index 9809ac51117..fca3f79b697 100644
--- a/arch/x86/cpu/i386/cpu.c
+++ b/arch/x86/cpu/i386/cpu.c
@@ -626,7 +626,6 @@ int cpu_jump_to_64bit_uboot(ulong target)
return -EFAULT;
 }
 
-#ifdef CONFIG_SMP
 int x86_mp_init(void)
 {
int ret;
@@ -639,4 +638,3 @@ int x86_mp_init(void)
 
return 0;
 }
-#endif
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 12/22] x86: Set the SMP flag when MP init is complete

[Simon Glass]

Set this flag so we can track when it is safe to use CPUs other than the
main one.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/mp_init.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index c424f283807..139e9749e74 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -609,6 +609,7 @@ int mp_init(void)
debug("CPU init failed: err=%d\n", ret);
return ret;
}
+   gd->flags |= GD_FLG_SMP_INIT;
 
return 0;
 }
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 05/22] x86: mp_init: Drop the num_cpus static variable

[Simon Glass]

This does not need to be global across all functions in this file. Pass a
parameter instead.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/mp_init.c | 22 +++---
 1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 4b678cde313..bb39fd30d18 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -31,9 +31,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* Total CPUs include BSP */
-static int num_cpus;
-
 /* This also needs to match the sipi.S assembly code for saved MSR encoding */
 struct saved_msr {
uint32_t index;
@@ -371,13 +368,23 @@ static int start_aps(int num_aps, atomic_t *ap_count)
return 0;
 }
 
-static int bsp_do_flight_plan(struct udevice *cpu, struct mp_flight_plan *plan)
+/**
+ * bsp_do_flight_plan() - Do the flight plan on all CPUs
+ *
+ * This runs the flight plan on the main CPU used to boot U-Boot
+ *
+ * @cpu: Device for the main CPU
+ * @plan: Flight plan to run
+ * @num_aps: Number of APs (CPUs other than the BSP)
+ * @returns 0 on success, -ETIMEDOUT if an AP failed to come up
+ */
+static int bsp_do_flight_plan(struct udevice *cpu, struct mp_flight_plan *plan,
+ int num_aps)
 {
int i;
int ret = 0;
const int timeout_us = 10;
const int step_us = 100;
-   int num_aps = num_cpus - 1;
 
for (i = 0; i < plan->num_records; i++) {
struct mp_flight_record *rec = >records[i];
@@ -397,6 +404,7 @@ static int bsp_do_flight_plan(struct udevice *cpu, struct 
mp_flight_plan *plan)
 
release_barrier(>barrier);
}
+
return ret;
 }
 
@@ -441,7 +449,7 @@ static struct mp_flight_record mp_steps[] = {
 
 int mp_init(void)
 {
-   int num_aps;
+   int num_aps, num_cpus;
atomic_t *ap_count;
struct udevice *cpu;
int ret;
@@ -503,7 +511,7 @@ int mp_init(void)
}
 
/* Walk the flight plan for the BSP */
-   ret = bsp_do_flight_plan(cpu, _info);
+   ret = bsp_do_flight_plan(cpu, _info, num_aps);
if (ret) {
debug("CPU init failed: err=%d\n", ret);
return ret;
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 06/22] x86: mtrr: Fix 'ensable' typo

[Simon Glass]

Fix a typo in the command help.

Signed-off-by: Simon Glass 
---

 cmd/x86/mtrr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c
index 084d7315f43..5d25c5802af 100644
--- a/cmd/x86/mtrr.c
+++ b/cmd/x86/mtrr.c
@@ -135,5 +135,5 @@ U_BOOT_CMD(
"set   - set a register\n"
"\t is Uncacheable, Combine, Through, Protect, Back\n"
"disable   - disable a register\n"
-   "ensable   - enable a register"
+   "enable- enable a register"
 );
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 07/22] x86: mp_init: Set up the CPU numbers at the start

[Simon Glass]

At present each CPU is given a number when it starts itself up. While this
saves a tiny amount of time by doing the device-tree read in parallel, it
is confusing that the numbering happens on the fly.

Move this code into mp_init() and do it at the start.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/mp_init.c | 21 +
 1 file changed, 9 insertions(+), 12 deletions(-)

diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index bb39fd30d18..8b4c72bbcf2 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -431,12 +431,6 @@ static int mp_init_cpu(struct udevice *cpu, void *unused)
 {
struct cpu_platdata *plat = dev_get_parent_platdata(cpu);
 
-   /*
-* Multiple APs are brought up simultaneously and they may get the same
-* seq num in the uclass_resolve_seq() during device_probe(). To avoid
-* this, set req_seq to the reg number in the device tree in advance.
-*/
-   cpu->req_seq = dev_read_u32_default(cpu, "reg", -1);
plat->ucode_version = microcode_read_rev();
plat->device_id = gd->arch.x86_device;
 
@@ -452,13 +446,8 @@ int mp_init(void)
int num_aps, num_cpus;
atomic_t *ap_count;
struct udevice *cpu;
-   int ret;
-
-   /* This will cause the CPUs devices to be bound */
struct uclass *uc;
-   ret = uclass_get(UCLASS_CPU, );
-   if (ret)
-   return ret;
+   int ret;
 
if (IS_ENABLED(CONFIG_QFW)) {
ret = qemu_cpu_fixup();
@@ -466,6 +455,14 @@ int mp_init(void)
return ret;
}
 
+   /*
+* Multiple APs are brought up simultaneously and they may get the same
+* seq num in the uclass_resolve_seq() during device_probe(). To avoid
+* this, set req_seq to the reg number in the device tree in advance.
+*/
+   uclass_id_foreach_dev(UCLASS_CPU, cpu, uc)
+   cpu->req_seq = dev_read_u32_default(cpu, "reg", -1);
+
ret = init_bsp();
if (ret) {
debug("Cannot init boot CPU: err=%d\n", ret);
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 08/22] x86: mp_init: Adjust bsp_init() to return more information

[Simon Glass]

This function is misnamed since it does not actually init the BSP. Also
it is convenient to adjust it to return a little more information.

Rename and update the function, to allow it to return the BSP CPU device
and number, as well as the total number of CPUs.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/mp_init.c | 35 ++-
 include/dm/uclass.h|  2 +-
 2 files changed, 23 insertions(+), 14 deletions(-)

diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 8b4c72bbcf2..ccb68b8b89b 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -408,9 +408,17 @@ static int bsp_do_flight_plan(struct udevice *cpu, struct 
mp_flight_plan *plan,
return ret;
 }
 
-static int init_bsp(struct udevice **devp)
+/**
+ * get_bsp() - Get information about the bootstrap processor
+ *
+ * @devp: If non-NULL, returns CPU device corresponding to the BSP
+ * @cpu_countp: If non-NULL, returns the total number of CPUs
+ * @return CPU number of the BSP
+ */
+static int get_bsp(struct udevice **devp, int *cpu_countp)
 {
char processor_name[CPU_MAX_NAME_LEN];
+   struct udevice *dev;
int apic_id;
int ret;
 
@@ -418,13 +426,20 @@ static int init_bsp(struct udevice **devp)
debug("CPU: %s\n", processor_name);
 
apic_id = lapicid();
-   ret = find_cpu_by_apic_id(apic_id, devp);
-   if (ret) {
+   ret = find_cpu_by_apic_id(apic_id, );
+   if (ret < 0) {
printf("Cannot find boot CPU, APIC ID %d\n", apic_id);
return ret;
}
+   ret = cpu_get_count(dev);
+   if (ret < 0)
+   return log_msg_ret("count", ret);
+   if (devp)
+   *devp = dev;
+   if (cpu_countp)
+   *cpu_countp = ret;
 
-   return 0;
+   return dev->req_seq;
 }
 
 static int mp_init_cpu(struct udevice *cpu, void *unused)
@@ -463,24 +478,18 @@ int mp_init(void)
uclass_id_foreach_dev(UCLASS_CPU, cpu, uc)
cpu->req_seq = dev_read_u32_default(cpu, "reg", -1);
 
-   ret = init_bsp();
-   if (ret) {
+   ret = get_bsp(, _cpus);
+   if (ret < 0) {
debug("Cannot init boot CPU: err=%d\n", ret);
return ret;
}
 
-   num_cpus = cpu_get_count(cpu);
-   if (num_cpus < 0) {
-   debug("Cannot get number of CPUs: err=%d\n", num_cpus);
-   return num_cpus;
-   }
-
if (num_cpus < 2)
debug("Warning: Only 1 CPU is detected\n");
 
ret = check_cpu_devices(num_cpus);
if (ret)
-   debug("Warning: Device tree does not describe all CPUs. Extra 
ones will not be started correctly\n");
+   log_warning("Warning: Device tree does not describe all CPUs. 
Extra ones will not be started correctly\n");
 
/* Copy needed parameters so that APs have a reference to the plan */
mp_info.num_records = ARRAY_SIZE(mp_steps);
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index 70fca79b449..67ff7466c86 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -390,7 +390,7 @@ int uclass_resolve_seq(struct udevice *dev);
  * @id: enum uclass_id ID to use
  * @pos: struct udevice * to hold the current device. Set to NULL when there
  * are no more devices.
- * @uc: temporary uclass variable (struct udevice *)
+ * @uc: temporary uclass variable (struct uclass *)
  */
 #define uclass_id_foreach_dev(id, pos, uc) \
if (!uclass_get(id, )) \
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 04/22] x86: mp_init: Switch parameter names in start_aps()

[Simon Glass]

These parameters are named differently from elsewhere in this file. Switch
them to avoid confusion.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/mp_init.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index e77d7f2cd6c..4b678cde313 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -308,13 +308,13 @@ static int apic_wait_timeout(int total_delay, const char 
*msg)
return 0;
 }
 
-static int start_aps(int ap_count, atomic_t *num_aps)
+static int start_aps(int num_aps, atomic_t *ap_count)
 {
int sipi_vector;
/* Max location is 4KiB below 1MiB */
const int max_vector_loc = ((1 << 20) - (1 << 12)) >> 12;
 
-   if (ap_count == 0)
+   if (num_aps == 0)
return 0;
 
/* The vector is sent as a 4k aligned address in one byte */
@@ -326,7 +326,7 @@ static int start_aps(int ap_count, atomic_t *num_aps)
return -ENOSPC;
}
 
-   debug("Attempting to start %d APs\n", ap_count);
+   debug("Attempting to start %d APs\n", num_aps);
 
if (apic_wait_timeout(1000, "ICR not to be busy"))
return -ETIMEDOUT;
@@ -349,7 +349,7 @@ static int start_aps(int ap_count, atomic_t *num_aps)
return -ETIMEDOUT;
 
/* Wait for CPUs to check in up to 200 us */
-   wait_for_aps(num_aps, ap_count, 200, 15);
+   wait_for_aps(ap_count, num_aps, 200, 15);
 
/* Send 2nd SIPI */
if (apic_wait_timeout(1000, "ICR not to be busy"))
@@ -362,9 +362,9 @@ static int start_aps(int ap_count, atomic_t *num_aps)
return -ETIMEDOUT;
 
/* Wait for CPUs to check in */
-   if (wait_for_aps(num_aps, ap_count, 1, 50)) {
+   if (wait_for_aps(ap_count, num_aps, 1, 50)) {
debug("Not all APs checked in: %d/%d\n",
- atomic_read(num_aps), ap_count);
+ atomic_read(ap_count), num_aps);
return -EIO;
}
 
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 03/22] x86: mp_init: Avoid declarations in header files

[Simon Glass]

The functions used by the flight plan are declared in the header file but
are not used in any other file.

Move the flight plan steps down to just above where it is used so that we
can make these function static.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/mp_init.c| 40 +++
 arch/x86/include/asm/mp.h |  3 ---
 2 files changed, 20 insertions(+), 23 deletions(-)

diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 831fd7035d1..e77d7f2cd6c 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -41,10 +41,6 @@ struct saved_msr {
uint32_t hi;
 } __packed;
 
-static struct mp_flight_record mp_steps[] = {
-   MP_FR_BLOCK_APS(mp_init_cpu, NULL, mp_init_cpu, NULL),
-};
-
 struct mp_flight_plan {
int num_records;
struct mp_flight_record *records;
@@ -423,6 +419,26 @@ static int init_bsp(struct udevice **devp)
return 0;
 }
 
+static int mp_init_cpu(struct udevice *cpu, void *unused)
+{
+   struct cpu_platdata *plat = dev_get_parent_platdata(cpu);
+
+   /*
+* Multiple APs are brought up simultaneously and they may get the same
+* seq num in the uclass_resolve_seq() during device_probe(). To avoid
+* this, set req_seq to the reg number in the device tree in advance.
+*/
+   cpu->req_seq = dev_read_u32_default(cpu, "reg", -1);
+   plat->ucode_version = microcode_read_rev();
+   plat->device_id = gd->arch.x86_device;
+
+   return device_probe(cpu);
+}
+
+static struct mp_flight_record mp_steps[] = {
+   MP_FR_BLOCK_APS(mp_init_cpu, NULL, mp_init_cpu, NULL),
+};
+
 int mp_init(void)
 {
int num_aps;
@@ -495,19 +511,3 @@ int mp_init(void)
 
return 0;
 }
-
-int mp_init_cpu(struct udevice *cpu, void *unused)
-{
-   struct cpu_platdata *plat = dev_get_parent_platdata(cpu);
-
-   /*
-* Multiple APs are brought up simultaneously and they may get the same
-* seq num in the uclass_resolve_seq() during device_probe(). To avoid
-* this, set req_seq to the reg number in the device tree in advance.
-*/
-   cpu->req_seq = dev_read_u32_default(cpu, "reg", -1);
-   plat->ucode_version = microcode_read_rev();
-   plat->device_id = gd->arch.x86_device;
-
-   return device_probe(cpu);
-}
diff --git a/arch/x86/include/asm/mp.h b/arch/x86/include/asm/mp.h
index db02904ecb5..94af819ad9a 100644
--- a/arch/x86/include/asm/mp.h
+++ b/arch/x86/include/asm/mp.h
@@ -72,9 +72,6 @@ struct mp_flight_record {
  */
 int mp_init(void);
 
-/* Probes the CPU device */
-int mp_init_cpu(struct udevice *cpu, void *unused);
-
 /* Set up additional CPUs */
 int x86_mp_init(void);
 
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 00/22] x86: Enhance MTRR functionality to support multiple CPUs

[Simon Glass]

At present MTRRs are mirrored to the secondary CPUs only once, as those
CPUs are started up. But U-Boot may add more MTRRs later, e.g. if it
decides that a video console must be set up.

This series enhances the x86 multi-processor support to allow MTRRs to
be updated at any time. It also updates the 'mtrr' command to support
setting the MTRRs on CPUs other than the boot CPU.


Simon Glass (22):
  x86: mp_init: Switch to livetree
  x86: Move MP code into mp_init
  x86: mp_init: Avoid declarations in header files
  x86: mp_init: Switch parameter names in start_aps()
  x86: mp_init: Drop the num_cpus static variable
  x86: mtrr: Fix 'ensable' typo
  x86: mp_init: Set up the CPU numbers at the start
  x86: mp_init: Adjust bsp_init() to return more information
  x86: cpu: Remove unnecessary #ifdefs
  x86: mp: Support APs waiting for instructions
  global_data: Add a generic global_data flag for SMP state
  x86: Set the SMP flag when MP init is complete
  x86: mp: Allow running functions on multiple CPUs
  x86: mp: Park CPUs before running the OS
  x86: mp: Add iterators for CPUs
  x86: mtrr: Use MP calls to list the MTRRs
  x86: mtrr: Update MTRRs on all CPUs
  x86: mtrr: Add support for writing to MTRRs on any CPU
  x86: mtrr: Update the command to use the new mtrr calls
  x86: mtrr: Restructure so command execution is in one place
  x86: mtrr: Update 'mtrr' to allow setting MTRRs on any CPU
  x86: mtrr: Enhance 'mtrr' command to list MTRRs on any CPU

 arch/x86/cpu/cpu.c|  63 ++---
 arch/x86/cpu/i386/cpu.c   |  26 +--
 arch/x86/cpu/mp_init.c| 377 +-
 arch/x86/cpu/mtrr.c   | 149 
 arch/x86/include/asm/mp.h | 118 --
 arch/x86/include/asm/mtrr.h   |  51 
 cmd/x86/mtrr.c| 148 
 include/asm-generic/global_data.h |   1 +
 include/dm/uclass.h   |   2 +-
 9 files changed, 751 insertions(+), 184 deletions(-)

-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 01/22] x86: mp_init: Switch to livetree

[Simon Glass]

Update this code to use livetree calls instead of flat-tree.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/mp_init.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 7fde4ff7e16..c25d17c6474 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -507,8 +507,7 @@ int mp_init_cpu(struct udevice *cpu, void *unused)
 * seq num in the uclass_resolve_seq() during device_probe(). To avoid
 * this, set req_seq to the reg number in the device tree in advance.
 */
-   cpu->req_seq = fdtdec_get_int(gd->fdt_blob, dev_of_offset(cpu), "reg",
- -1);
+   cpu->req_seq = dev_read_u32_default(cpu, "reg", -1);
plat->ucode_version = microcode_read_rev();
plat->device_id = gd->arch.x86_device;
 
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 02/22] x86: Move MP code into mp_init

[Simon Glass]

At present the 'flight plan' for CPUs is passed into mp_init. But it is
always the same. Move it into the mp_init file so everything is in one
place. Also drop the SMI function since it does nothing. If we implement
SMIs, more refactoring will be needed anyway.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/i386/cpu.c   | 24 +---
 arch/x86/cpu/mp_init.c| 22 ++
 arch/x86/include/asm/mp.h | 17 +
 3 files changed, 16 insertions(+), 47 deletions(-)

diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c
index d27324cb4e2..9809ac51117 100644
--- a/arch/x86/cpu/i386/cpu.c
+++ b/arch/x86/cpu/i386/cpu.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -626,29 +627,14 @@ int cpu_jump_to_64bit_uboot(ulong target)
 }
 
 #ifdef CONFIG_SMP
-static int enable_smis(struct udevice *cpu, void *unused)
-{
-   return 0;
-}
-
-static struct mp_flight_record mp_steps[] = {
-   MP_FR_BLOCK_APS(mp_init_cpu, NULL, mp_init_cpu, NULL),
-   /* Wait for APs to finish initialization before proceeding */
-   MP_FR_BLOCK_APS(NULL, NULL, enable_smis, NULL),
-};
-
 int x86_mp_init(void)
 {
-   struct mp_params mp_params;
-
-   mp_params.parallel_microcode_load = 0,
-   mp_params.flight_plan = _steps[0];
-   mp_params.num_records = ARRAY_SIZE(mp_steps);
-   mp_params.microcode_pointer = 0;
+   int ret;
 
-   if (mp_init(_params)) {
+   ret = mp_init();
+   if (ret) {
printf("Warning: MP init failure\n");
-   return -EIO;
+   return log_ret(ret);
}
 
return 0;
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index c25d17c6474..831fd7035d1 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -41,6 +41,9 @@ struct saved_msr {
uint32_t hi;
 } __packed;
 
+static struct mp_flight_record mp_steps[] = {
+   MP_FR_BLOCK_APS(mp_init_cpu, NULL, mp_init_cpu, NULL),
+};
 
 struct mp_flight_plan {
int num_records;
@@ -372,7 +375,7 @@ static int start_aps(int ap_count, atomic_t *num_aps)
return 0;
 }
 
-static int bsp_do_flight_plan(struct udevice *cpu, struct mp_params *mp_params)
+static int bsp_do_flight_plan(struct udevice *cpu, struct mp_flight_plan *plan)
 {
int i;
int ret = 0;
@@ -380,8 +383,8 @@ static int bsp_do_flight_plan(struct udevice *cpu, struct 
mp_params *mp_params)
const int step_us = 100;
int num_aps = num_cpus - 1;
 
-   for (i = 0; i < mp_params->num_records; i++) {
-   struct mp_flight_record *rec = _params->flight_plan[i];
+   for (i = 0; i < plan->num_records; i++) {
+   struct mp_flight_record *rec = >records[i];
 
/* Wait for APs if the record is not released */
if (atomic_read(>barrier) == 0) {
@@ -420,7 +423,7 @@ static int init_bsp(struct udevice **devp)
return 0;
 }
 
-int mp_init(struct mp_params *p)
+int mp_init(void)
 {
int num_aps;
atomic_t *ap_count;
@@ -445,11 +448,6 @@ int mp_init(struct mp_params *p)
return ret;
}
 
-   if (p == NULL || p->flight_plan == NULL || p->num_records < 1) {
-   printf("Invalid MP parameters\n");
-   return -EINVAL;
-   }
-
num_cpus = cpu_get_count(cpu);
if (num_cpus < 0) {
debug("Cannot get number of CPUs: err=%d\n", num_cpus);
@@ -464,8 +462,8 @@ int mp_init(struct mp_params *p)
debug("Warning: Device tree does not describe all CPUs. Extra 
ones will not be started correctly\n");
 
/* Copy needed parameters so that APs have a reference to the plan */
-   mp_info.num_records = p->num_records;
-   mp_info.records = p->flight_plan;
+   mp_info.num_records = ARRAY_SIZE(mp_steps);
+   mp_info.records = mp_steps;
 
/* Load the SIPI vector */
ret = load_sipi_vector(_count, num_cpus);
@@ -489,7 +487,7 @@ int mp_init(struct mp_params *p)
}
 
/* Walk the flight plan for the BSP */
-   ret = bsp_do_flight_plan(cpu, p);
+   ret = bsp_do_flight_plan(cpu, _info);
if (ret) {
debug("CPU init failed: err=%d\n", ret);
return ret;
diff --git a/arch/x86/include/asm/mp.h b/arch/x86/include/asm/mp.h
index 9dddf88b5a1..db02904ecb5 100644
--- a/arch/x86/include/asm/mp.h
+++ b/arch/x86/include/asm/mp.h
@@ -51,21 +51,6 @@ struct mp_flight_record {
 #define MP_FR_NOBLOCK_APS(ap_func, ap_arg, bsp_func, bsp_arg) \
MP_FLIGHT_RECORD(1, ap_func, ap_arg, bsp_func, bsp_arg)
 
-/*
- * The mp_params structure provides the arguments to the mp subsystem
- * for bringing up APs.
- *
- * At present this is overkill for U-Boot, but it may make it easier to add
- * SMM support.
- */
-struct mp_params {
-   int parallel_microcode_load;
-   const void *microcode_pointer;
-   /* Flight plan  for APs and BSP */
-

Re: [PATCH 2/6] kconfig: Add support for conditional values

[Masahiro Yamada]

On Fri, May 22, 2020 at 11:02 AM Simon Glass  wrote:
>
> At present if an optional Kconfig value needs to be used it must be
> bracketed by #ifdef. For example, with this Kconfig setup:
>
> config WIBBLE
> bool "Support wibbles, the world needs more wibbles"
>
> config WIBBLE_ADDR
> hex "Address of the wibble"
> depends on WIBBLE




I am not sure if this is a good idea.


If you want to always use CONFIG_WIBBLE_ADDR,
you can get rid of 'depends on WIBBLE'.




> then the following code must be used:
>
>  #ifdef CONFIG_WIBBLE
>  static void handle_wibble(void)
>  {
> int val = CONFIG_WIBBLE_ADDR;
>
> ...
>  }
>  #endif
>
>  static void init_machine()
>  {
>  ...
>  #ifdef CONFIG_WIBBLE
> handle_wibble();
>  #endif
>  }
>
> Add a new IF_ENABLED_INT() to help with this. So now it is possible to
> write, without #ifdefs:
>
>  static void handle_wibble(void)
>  {
> int val = IF_ENABLED_INT(CONFIG_WIBBLE, CONFIG_WIBBLE_ADDR);
>
> ...
>  }
>
>  static void init_machine()
>  {
>  ...
>  if (IS_ENABLED(CONFIG_WIBBLE))
> handle_wibble();
>  }
>
> The value will be 0 if CONFIG_WIBBLE is not defined, and
> CONFIG_WIBBLE_ADDR if it is. This allows us to reduce the use of #ifdef in
> the code, ensuring that the compiler still checks the code even if it is
> not ultimately used for a particular build.
>
> Signed-off-by: Simon Glass 
> ---
>
>  include/linux/kconfig.h | 12 
>  1 file changed, 12 insertions(+)
>
> diff --git a/include/linux/kconfig.h b/include/linux/kconfig.h
> index 3a2da738c4..86cd266540 100644
> --- a/include/linux/kconfig.h
> +++ b/include/linux/kconfig.h
> @@ -79,6 +79,18 @@
>   */
>  #define CONFIG_VAL(option)  config_val(option)
>
> +/* This use a similar mechanism to config_enabled() above */
> +#define config_opt_enabled(cfg, opt_cfg) _config_opt_enabled(cfg, opt_cfg)
> +#define _config_opt_enabled(cfg_val, opt_value) \
> +   __config_opt_enabled(__ARG_PLACEHOLDER_##cfg_val, opt_value)
> +#define __config_opt_enabled(arg1_or_junk, arg2) \
> +   ___config_opt_enabled(arg1_or_junk arg2, 0)
> +#define ___config_opt_enabled(__ignored, val, ...) val
> +
> +/* Evaluates to 0 if option is not defined, int_option if it is defined */
> +#define IF_ENABLED_INT(option, int_option) \
> +   config_opt_enabled(option, int_option)
> +
>  /*
>   * CONFIG_IS_ENABLED(FOO) evaluates to
>   *  1 if CONFIG_SPL_BUILD is undefined and CONFIG_FOO is set to 'y' or 'm',
> --
> 2.27.0.rc0.183.gde8f92d652-goog
>


-- 
Best Regards
Masahiro Yamada

[PATCH 6/6] x86: fsp: Support a warning message when DRAM init is slow

[Simon Glass]

With DDR4, Intel SOCs take quite a long time to init their memory. During
this time, if the user is watching, it looks like SPL has hung. Add a
message in this case.

This works by adding a return code to fspm_update_config() that indicates
whether MRC data was found and a new property to the device tree.

Also add one more debug message while starting.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/apollolake/fsp_m.c   | 12 --
 arch/x86/dts/chromebook_coral.dts |  1 +
 arch/x86/include/asm/fsp2/fsp_internal.h  |  3 ++-
 arch/x86/lib/fsp2/fsp_meminit.c   | 24 +++
 .../fsp/fsp2/apollolake/fsp-m.txt |  3 +++
 5 files changed, 35 insertions(+), 8 deletions(-)

diff --git a/arch/x86/cpu/apollolake/fsp_m.c b/arch/x86/cpu/apollolake/fsp_m.c
index 1301100cd5..65461d85b8 100644
--- a/arch/x86/cpu/apollolake/fsp_m.c
+++ b/arch/x86/cpu/apollolake/fsp_m.c
@@ -16,10 +16,14 @@ int fspm_update_config(struct udevice *dev, struct fspm_upd 
*upd)
 {
struct fsp_m_config *cfg = >config;
struct fspm_arch_upd *arch = >arch;
+   int cache_ret = 0;
ofnode node;
+   int ret;
 
arch->nvs_buffer_ptr = NULL;
-   prepare_mrc_cache(upd);
+   cache_ret = prepare_mrc_cache(upd);
+   if (cache_ret && cache_ret != -ENOENT)
+   return log_msg_ret("mrc", cache_ret);
arch->stack_base = (void *)0xfef96000;
arch->boot_loader_tolum_size = 0;
arch->boot_mode = FSP_BOOT_WITH_FULL_CONFIGURATION;
@@ -28,7 +32,11 @@ int fspm_update_config(struct udevice *dev, struct fspm_upd 
*upd)
if (!ofnode_valid(node))
return log_msg_ret("fsp-m settings", -ENOENT);
 
-   return fsp_m_update_config_from_dtb(node, cfg);
+   ret = fsp_m_update_config_from_dtb(node, cfg);
+   if (ret)
+   return log_msg_ret("dtb", cache_ret);
+
+   return cache_ret;
 }
 
 /*
diff --git a/arch/x86/dts/chromebook_coral.dts 
b/arch/x86/dts/chromebook_coral.dts
index dea35b73a0..aad12f2c4d 100644
--- a/arch/x86/dts/chromebook_coral.dts
+++ b/arch/x86/dts/chromebook_coral.dts
@@ -117,6 +117,7 @@
reg = <0x 0 0 0 0>;
compatible = "intel,apl-hostbridge";
pciex-region-size = <0x1000>;
+   fspm,training-delay = <21>;
/*
 * Parameters used by the FSP-S binary blob. This is
 * really unfortunate since these parameters mostly
diff --git a/arch/x86/include/asm/fsp2/fsp_internal.h 
b/arch/x86/include/asm/fsp2/fsp_internal.h
index f751fbf961..b4a4fbbd84 100644
--- a/arch/x86/include/asm/fsp2/fsp_internal.h
+++ b/arch/x86/include/asm/fsp2/fsp_internal.h
@@ -57,7 +57,8 @@ int arch_fsps_preinit(void);
  *
  * @dev: Hostbridge device containing config
  * @upd: Config data to fill in
- * @return 0 if OK, -ve on error
+ * @return 0 if OK, -ENOENT if OK but no MRC-cache data was found, other -ve on
+ * error
  */
 int fspm_update_config(struct udevice *dev, struct fspm_upd *upd);
 
diff --git a/arch/x86/lib/fsp2/fsp_meminit.c b/arch/x86/lib/fsp2/fsp_meminit.c
index faf9c29aef..ce0b0aff76 100644
--- a/arch/x86/lib/fsp2/fsp_meminit.c
+++ b/arch/x86/lib/fsp2/fsp_meminit.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -63,8 +64,10 @@ int fsp_memory_init(bool s3wake, bool use_spi_flash)
struct fsp_header *hdr;
struct hob_header *hob;
struct udevice *dev;
+   int delay;
int ret;
 
+   log_debug("Locating FSP\n");
ret = fsp_locate_fsp(FSP_M, , use_spi_flash, , , NULL);
if (ret)
return log_msg_ret("locate FSP", ret);
@@ -76,21 +79,32 @@ int fsp_memory_init(bool s3wake, bool use_spi_flash)
return log_msg_ret("Bad UPD signature", -EPERM);
memcpy(, fsp_upd, sizeof(upd));
 
+   delay = dev_read_u32_default(dev, "fspm,training-delay", 0);
ret = fspm_update_config(dev, );
-   if (ret)
-   return log_msg_ret("Could not setup config", ret);
-
-   debug("SDRAM init...");
+   if (ret) {
+   if (ret != -ENOENT)
+   return log_msg_ret("Could not setup config", ret);
+   } else {
+   delay = 0;
+   }
+
+   if (delay)
+   printf("SDRAM training (%d seconds)...", delay);
+   else
+   log_debug("SDRAM init...");
bootstage_start(BOOTSTAGE_ID_ACCUM_FSP_M, "fsp-m");
func = (fsp_memory_init_func)(hdr->img_base + hdr->fsp_mem_init);
ret = func(, );
bootstage_accum(BOOTSTAGE_ID_ACCUM_FSP_M);
cpu_reinit_fpu();
+   if (delay)
+   printf("done\n");
+   else
+   log_debug("done\n");
if (ret)
return log_msg_ret("SDRAM init fail\n", ret);
 
gd->arch.hob_list = hob;
-   

[PATCH] mmc: davinci_mmc: Cleanup to use dt in U-boot and static platdata in SPL

[Faiz Abbas]

Cleanup this driver to use dt in U-boot and static platdata in SPL.
This requires the following steps:

1. Move all platdata assignment from probe() to ofdata_to_platdata().
   This function is only called in U-boot.
2. Replicate all the platdata assignment being done in
   ofdata_to_platdata() in the omapl138 board file. This data is used in
   the SPL case where SPL_OF_CONTROL is not enabled.
3. Remove SPL_OF_CONTROL and related configs from omapl138_lcdk_defconfig

This cleanup effectively reverts 3ef94715cc ('mmc: davinci: fix mmc boot in 
SPL')

Signed-off-by: Faiz Abbas 
---

This patch fixes things being broken by Simon's series disabling
libfdt when using of-platdata:
https://patchwork.ozlabs.org/project/uboot/cover/20191107155318.103300-1-...@chromium.org/


 .../mach-davinci/include/mach/sdmmc_defs.h|  7 +++
 board/davinci/da8xxevm/omapl138_lcdk.c| 12 
 configs/omapl138_lcdk_defconfig   |  4 --
 drivers/mmc/davinci_mmc.c | 63 ---
 4 files changed, 45 insertions(+), 41 deletions(-)

diff --git a/arch/arm/mach-davinci/include/mach/sdmmc_defs.h 
b/arch/arm/mach-davinci/include/mach/sdmmc_defs.h
index 46f6391aa2..f95a607e52 100644
--- a/arch/arm/mach-davinci/include/mach/sdmmc_defs.h
+++ b/arch/arm/mach-davinci/include/mach/sdmmc_defs.h
@@ -152,6 +152,13 @@ struct davinci_mmc {
struct mmc_config cfg;
 };
 
+#define DAVINCI_MAX_BLOCKS (32)
+struct davinci_mmc_plat {
+   struct davinci_mmc_regs *reg_base;  /* Register base address */
+   struct mmc_config cfg;
+   struct mmc mmc;
+};
+
 int davinci_mmc_init(bd_t *bis, struct davinci_mmc *host);
 
 #endif /* _SDMMC_DEFS_H */
diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c 
b/board/davinci/da8xxevm/omapl138_lcdk.c
index adb56c6c87..84603cb117 100644
--- a/board/davinci/da8xxevm/omapl138_lcdk.c
+++ b/board/davinci/da8xxevm/omapl138_lcdk.c
@@ -368,8 +368,20 @@ U_BOOT_DEVICE(omapl138_uart) = {
.platdata = _pdata,
 };
 
+static const struct davinci_mmc_plat mmc_platdata = {
+   .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
+   .cfg = {
+   .f_min = 20,
+   .f_max = 2500,
+   .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
+   .host_caps = MMC_MODE_4BIT,
+   .b_max = DAVINCI_MAX_BLOCKS,
+   .name = "da830-mmc",
+   },
+};
 U_BOOT_DEVICE(omapl138_mmc) = {
.name = "davinci_mmc",
+   .platdata = _platdata,
 };
 
 void spl_board_init(void)
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index 50cf09c7f1..b0a58de03d 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -40,16 +40,13 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_CMD_DIAG=y
 CONFIG_CMD_UBI=y
 CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="da850-lcdk"
-CONFIG_SPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_DA8XX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DAVINCI=y
@@ -82,4 +79,3 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_DA8XX=y
 CONFIG_USB_MUSB_PIO_ONLY=y
 CONFIG_USB_STORAGE=y
-# CONFIG_SPL_OF_LIBFDT is not set
diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c
index 2408a687d2..4ef9f7cc8b 100644
--- a/drivers/mmc/davinci_mmc.c
+++ b/drivers/mmc/davinci_mmc.c
@@ -18,7 +18,6 @@
 #include 
 #include 
 
-#define DAVINCI_MAX_BLOCKS (32)
 #define WATCHDOG_COUNT (10)
 
 #define get_val(addr)  REG(addr)
@@ -34,12 +33,6 @@ struct davinci_mmc_priv {
struct gpio_desc cd_gpio;   /* Card Detect GPIO */
struct gpio_desc wp_gpio;   /* Write Protect GPIO */
 };
-
-struct davinci_mmc_plat
-{
-   struct mmc_config cfg;
-   struct mmc mmc;
-};
 #endif
 
 /* Set davinci clock prescalar value based on the required clock in HZ */
@@ -487,43 +480,16 @@ static int davinci_mmc_probe(struct udevice *dev)
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct davinci_mmc_plat *plat = dev_get_platdata(dev);
struct davinci_mmc_priv *priv = dev_get_priv(dev);
-   struct mmc_config *cfg = >cfg;
-#ifdef CONFIG_SPL_BUILD
-   int ret;
-#endif
-
-   cfg->f_min = 20;
-   cfg->f_max = 2500;
-   cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
-   cfg->host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */
-   cfg->b_max = DAVINCI_MAX_BLOCKS;
-   cfg->name = "da830-mmc";
 
-   priv->reg_base = (struct davinci_mmc_regs *)dev_read_addr(dev);
+   priv->reg_base = plat->reg_base;
priv->input_clk = clk_get(DAVINCI_MMCSD_CLKID);
-
 #if CONFIG_IS_ENABLED(DM_GPIO)
/* These GPIOs are optional */
gpio_request_by_name(dev, "cd-gpios", 0, >cd_gpio, GPIOD_IS_IN);
gpio_request_by_name(dev, "wp-gpios", 0, >wp_gpio, 

[PATCH 5/6] x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME

[Simon Glass]

At present this enables a few arch-specific members of the global_data
struct which are otherwise not part of the struct. As a result we have to
use #ifdef in various places.

The cost of always having these in the struct is small. Adjust things so
that we can use compile-time code instead of #ifdefs.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/apollolake/cpu_spl.c| 13 +-
 arch/x86/cpu/apollolake/fsp_s.c  | 10 
 arch/x86/cpu/baytrail/acpi.c |  2 --
 arch/x86/cpu/broadwell/power_state.c |  5 ++--
 arch/x86/cpu/cpu.c   | 38 ++--
 arch/x86/include/asm/global_data.h   |  2 --
 arch/x86/lib/coreboot_table.c|  6 ++---
 arch/x86/lib/fsp/fsp_common.c|  2 --
 arch/x86/lib/fsp/fsp_dram.c  | 26 +++
 arch/x86/lib/fsp1/fsp_common.c   | 16 +++-
 arch/x86/lib/fsp2/fsp_dram.c |  7 +++--
 11 files changed, 63 insertions(+), 64 deletions(-)

diff --git a/arch/x86/cpu/apollolake/cpu_spl.c 
b/arch/x86/cpu/apollolake/cpu_spl.c
index 707ceb3e64..9f32f2e27e 100644
--- a/arch/x86/cpu/apollolake/cpu_spl.c
+++ b/arch/x86/cpu/apollolake/cpu_spl.c
@@ -247,12 +247,13 @@ static int arch_cpu_init_spl(void)
ret = pmc_init(pmc);
if (ret < 0)
return log_msg_ret("Could not init PMC", ret);
-#ifdef CONFIG_HAVE_ACPI_RESUME
-   ret = pmc_prev_sleep_state(pmc);
-   if (ret < 0)
-   return log_msg_ret("Could not get PMC sleep state", ret);
-   gd->arch.prev_sleep_state = ret;
-#endif
+   if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) {
+   ret = pmc_prev_sleep_state(pmc);
+   if (ret < 0)
+   return log_msg_ret("Could not get PMC sleep state",
+  ret);
+   gd->arch.prev_sleep_state = ret;
+   }
 
return 0;
 }
diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c
index c5c953f2f8..76cadbe1ca 100644
--- a/arch/x86/cpu/apollolake/fsp_s.c
+++ b/arch/x86/cpu/apollolake/fsp_s.c
@@ -192,16 +192,16 @@ int arch_fsps_preinit(void)
 
 int arch_fsp_init_r(void)
 {
-#ifdef CONFIG_HAVE_ACPI_RESUME
-   bool s3wake = gd->arch.prev_sleep_state == ACPI_S3;
-#else
-   bool s3wake = false;
-#endif
+   bool s3wake;
struct udevice *dev, *itss;
int ret;
 
if (!ll_boot_init())
return 0;
+
+   s3wake = IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) &&
+   gd->arch.prev_sleep_state == ACPI_S3;
+
/*
 * This must be called before any devices are probed. Put any probing
 * into arch_fsps_preinit() above.
diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c
index 65f2006a0a..b17bc62a2d 100644
--- a/arch/x86/cpu/baytrail/acpi.c
+++ b/arch/x86/cpu/baytrail/acpi.c
@@ -161,7 +161,6 @@ void acpi_create_gnvs(struct acpi_global_nvs *gnvs)
gnvs->iuart_en = 0;
 }
 
-#ifdef CONFIG_HAVE_ACPI_RESUME
 /*
  * The following two routines are called at a very early stage, even before
  * FSP 2nd phase API fsp_init() is called. Registers off ACPI_BASE_ADDRESS
@@ -204,4 +203,3 @@ void chipset_clear_sleep_state(void)
pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT);
outl(pm1_cnt & ~(SLP_TYP), ACPI_BASE_ADDRESS + PM1_CNT);
 }
-#endif
diff --git a/arch/x86/cpu/broadwell/power_state.c 
b/arch/x86/cpu/broadwell/power_state.c
index 99d6f72cf6..62fd2e8d2c 100644
--- a/arch/x86/cpu/broadwell/power_state.c
+++ b/arch/x86/cpu/broadwell/power_state.c
@@ -23,11 +23,10 @@ static int prev_sleep_state(struct chipset_power_state *ps)
 
if (ps->pm1_sts & WAK_STS) {
switch ((ps->pm1_cnt & SLP_TYP) >> SLP_TYP_SHIFT) {
-#if CONFIG_HAVE_ACPI_RESUME
case SLP_TYP_S3:
-   prev_sleep_state = SLEEP_STATE_S3;
+   if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME))
+   prev_sleep_state = SLEEP_STATE_S3;
break;
-#endif
case SLP_TYP_S5:
prev_sleep_state = SLEEP_STATE_S5;
break;
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index a814e7d7a6..23a4d633d2 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -163,10 +163,10 @@ int default_print_cpuinfo(void)
   cpu_has_64bit() ? "x86_64" : "x86",
   cpu_vendor_name(gd->arch.x86_vendor), gd->arch.x86_device);
 
-#ifdef CONFIG_HAVE_ACPI_RESUME
-   debug("ACPI previous sleep state: %s\n",
- acpi_ss_string(gd->arch.prev_sleep_state));
-#endif
+   if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) {
+   debug("ACPI previous sleep state: %s\n",
+ acpi_ss_string(gd->arch.prev_sleep_state));
+   }
 
return 0;
 }
@@ -191,12 +191,12 @@ int last_stage_init(void)
 
board_final_cleanup();
 
-#ifdef CONFIG_HAVE_ACPI_RESUME
-   fadt = acpi_find_fadt();
+   if 

[PATCH 2/6] kconfig: Add support for conditional values

[Simon Glass]

At present if an optional Kconfig value needs to be used it must be
bracketed by #ifdef. For example, with this Kconfig setup:

config WIBBLE
bool "Support wibbles, the world needs more wibbles"

config WIBBLE_ADDR
hex "Address of the wibble"
depends on WIBBLE

then the following code must be used:

 #ifdef CONFIG_WIBBLE
 static void handle_wibble(void)
 {
int val = CONFIG_WIBBLE_ADDR;

...
 }
 #endif

 static void init_machine()
 {
 ...
 #ifdef CONFIG_WIBBLE
handle_wibble();
 #endif
 }

Add a new IF_ENABLED_INT() to help with this. So now it is possible to
write, without #ifdefs:

 static void handle_wibble(void)
 {
int val = IF_ENABLED_INT(CONFIG_WIBBLE, CONFIG_WIBBLE_ADDR);

...
 }

 static void init_machine()
 {
 ...
 if (IS_ENABLED(CONFIG_WIBBLE))
handle_wibble();
 }

The value will be 0 if CONFIG_WIBBLE is not defined, and
CONFIG_WIBBLE_ADDR if it is. This allows us to reduce the use of #ifdef in
the code, ensuring that the compiler still checks the code even if it is
not ultimately used for a particular build.

Signed-off-by: Simon Glass 
---

 include/linux/kconfig.h | 12 
 1 file changed, 12 insertions(+)

diff --git a/include/linux/kconfig.h b/include/linux/kconfig.h
index 3a2da738c4..86cd266540 100644
--- a/include/linux/kconfig.h
+++ b/include/linux/kconfig.h
@@ -79,6 +79,18 @@
  */
 #define CONFIG_VAL(option)  config_val(option)
 
+/* This use a similar mechanism to config_enabled() above */
+#define config_opt_enabled(cfg, opt_cfg) _config_opt_enabled(cfg, opt_cfg)
+#define _config_opt_enabled(cfg_val, opt_value) \
+   __config_opt_enabled(__ARG_PLACEHOLDER_##cfg_val, opt_value)
+#define __config_opt_enabled(arg1_or_junk, arg2) \
+   ___config_opt_enabled(arg1_or_junk arg2, 0)
+#define ___config_opt_enabled(__ignored, val, ...) val
+
+/* Evaluates to 0 if option is not defined, int_option if it is defined */
+#define IF_ENABLED_INT(option, int_option) \
+   config_opt_enabled(option, int_option)
+
 /*
  * CONFIG_IS_ENABLED(FOO) evaluates to
  *  1 if CONFIG_SPL_BUILD is undefined and CONFIG_FOO is set to 'y' or 'm',
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 4/6] coral: Enable the copy framebuffer

[Simon Glass]

Enable this feature on chromebook_coral to speed up the display.

With this change, the time taken to print the environment to the display
without CONFIG_CONSOLE_SCROLL_LINES is reduced from 1830ms to 62ms.

Signed-off-by: Simon Glass 
---

 configs/chromebook_coral_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/chromebook_coral_defconfig 
b/configs/chromebook_coral_defconfig
index 2039ea6186..0bcdbea8d6 100644
--- a/configs/chromebook_coral_defconfig
+++ b/configs/chromebook_coral_defconfig
@@ -93,6 +93,7 @@ CONFIG_TPM2_CR50_I2C=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
+CONFIG_VIDEO_COPY=y
 CONFIG_SPL_FS_CBFS=y
 # CONFIG_SPL_USE_TINY_PRINTF is not set
 CONFIG_TPL_USE_TINY_PRINTF=y
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 3/6] timer: Allow delays with a 32-bit microsecond timer

[Simon Glass]

The current get_timer_us() uses 64-bit arithmetic. When implementing
microsecond-level timeouts, 32-bits is plenty. Add a new function to
support this.

Signed-off-by: Simon Glass 
---

 include/time.h | 11 +++
 lib/time.c |  5 +
 2 files changed, 16 insertions(+)

diff --git a/include/time.h b/include/time.h
index e99f9c8012..434e63b075 100644
--- a/include/time.h
+++ b/include/time.h
@@ -17,6 +17,17 @@ unsigned long get_timer(unsigned long base);
 unsigned long timer_get_us(void);
 uint64_t get_timer_us(uint64_t base);
 
+/**
+ * get_timer_us_long() - Get the number of elapsed microseconds
+ *
+ * This uses 32-bit arithmetic on 32-bit machines, which is enough to handle
+ * delays of over an hour.
+ *
+ *@base: Base time to consider
+ *@return elapsed time since @base
+ */
+unsigned long get_timer_us_long(unsigned long base);
+
 /*
  * timer_test_add_offset()
  *
diff --git a/lib/time.c b/lib/time.c
index 65db0f6cda..47f8c84327 100644
--- a/lib/time.c
+++ b/lib/time.c
@@ -152,6 +152,11 @@ uint64_t __weak get_timer_us(uint64_t base)
return tick_to_time_us(get_ticks()) - base;
 }
 
+unsigned long __weak get_timer_us_long(unsigned long base)
+{
+   return timer_get_us() - base;
+}
+
 unsigned long __weak notrace timer_get_us(void)
 {
return tick_to_time(get_ticks() * 1000);
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH 1/6] bootstage: Fix 'stacked' typo

[Simon Glass]

This should be 'stashed'. Fix it.

Signed-off-by: Simon Glass 
---

 include/bootstage.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/bootstage.h b/include/bootstage.h
index f507271375..00c85fb86a 100644
--- a/include/bootstage.h
+++ b/include/bootstage.h
@@ -338,7 +338,7 @@ int bootstage_stash(void *base, int size);
  * @param base Base address of memory buffer
  * @param size Size of memory buffer (-1 if unknown)
  * @return 0 if unstashed ok, -ENOENT if bootstage info not found, -ENOSPC if
- * there is not space for read the stacked data, or other error if
+ * there is not space for read the stashed data, or other error if
  * something else went wrong
  */
 int bootstage_unstash(const void *base, int size);
-- 
2.27.0.rc0.183.gde8f92d652-goog

[PATCH v8 2/2] board: presidio-asic: Add SPI NOR support

[Alex Nemirovsky]

Add SPI NOR support for Cortina Access
Presidio Engineering Board

Signed-off-by: Alex Nemirovsky 
CC: Jagan Teki 
CC: Vignesh R 
CC: Tom Rini 

---

Changes in v8: None
Changes in v7: None
Changes in v5:
- NAND support removed from presidio-asic board DT.

Changes in v3: None

 arch/arm/dts/ca-presidio-engboard.dts|  6 +--
 board/cortina/presidio-asic/presidio.c   | 16 ++-
 configs/cortina_presidio-asic-spi-nand_defconfig | 48 +++
 configs/cortina_presidio-asic-spi-nor_defconfig  | 59 
 4 files changed, 124 insertions(+), 5 deletions(-)
 create mode 100644 configs/cortina_presidio-asic-spi-nand_defconfig
 create mode 100644 configs/cortina_presidio-asic-spi-nor_defconfig

diff --git a/arch/arm/dts/ca-presidio-engboard.dts 
b/arch/arm/dts/ca-presidio-engboard.dts
index c03dacc..34148b9 100644
--- a/arch/arm/dts/ca-presidio-engboard.dts
+++ b/arch/arm/dts/ca-presidio-engboard.dts
@@ -55,15 +55,13 @@
};
 
sflash: sflash-controller@f4324000 {
-   #address-cells = <2>;
-   #size-cells = <1>;
compatible = "cortina,ca-sflash";
reg = <0x0 0xf4324000 0x50>;
reg-names = "sflash-regs";
flash@0 {
compatible = "jedec,spi-nor";
-   spi-rx-bus-width = <1>;
-   spi-max-frequency = <10800>;
+   spi-rx-bus-width = <4>;
+   spi-tx-bus-width = <4>;
};
};
 };
diff --git a/board/cortina/presidio-asic/presidio.c 
b/board/cortina/presidio-asic/presidio.c
index 3c132f1..883bd2e 100644
--- a/board/cortina/presidio-asic/presidio.c
+++ b/board/cortina/presidio-asic/presidio.c
@@ -16,7 +16,7 @@
 #include 
 #include 
 #include 
-
+#include 
 DECLARE_GLOBAL_DATA_PTR;
 
 #define CA_PERIPH_BASE  0xE000UL
@@ -72,9 +72,23 @@ static noinline int invoke_psci_fn_smc(u64 function_id, u64 
arg0, u64 arg1,
return function_id;
 }
 
+#ifdef CONFIG_CORTINA_SFLASH
+static int init_sflash(void)
+{
+   struct udevice *dev;
+
+   uclass_first_device(UCLASS_SPI, );
+
+   return 0;
+}
+#endif
+
 int board_early_init_r(void)
 {
dcache_disable();
+#ifdef CONFIG_CORTINA_SFLASH
+   init_sflash();
+#endif
return 0;
 }
 
diff --git a/configs/cortina_presidio-asic-spi-nand_defconfig 
b/configs/cortina_presidio-asic-spi-nand_defconfig
new file mode 100644
index 000..515ad22
--- /dev/null
+++ b/configs/cortina_presidio-asic-spi-nand_defconfig
@@ -0,0 +1,48 @@
+CONFIG_ARM=y
+# CONFIG_SYS_ARCH_TIMER is not set
+CONFIG_TARGET_PRESIDIO_ASIC=y
+CONFIG_SYS_TEXT_BASE=0x0400
+CONFIG_ENV_SIZE=0x2
+CONFIG_DM_GPIO=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_IDENT_STRING="Presidio-SoC"
+CONFIG_SHOW_BOOT_PROGRESS=y
+CONFIG_BOOTDELAY=3
+CONFIG_LOGLEVEL=7
+CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_SYS_PROMPT="G3#"
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF_TEST=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_WDT=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_SMC=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard"
+# CONFIG_NET is not set
+CONFIG_DM=y
+CONFIG_CORTINA_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CA=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_CORTINA=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_DM_SERIAL=y
+CONFIG_CORTINA_UART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_CORTINA_SFLASH=y
+CONFIG_WDT=y
+CONFIG_WDT_CORTINA=y
diff --git a/configs/cortina_presidio-asic-spi-nor_defconfig 
b/configs/cortina_presidio-asic-spi-nor_defconfig
new file mode 100644
index 000..d7ecec3
--- /dev/null
+++ b/configs/cortina_presidio-asic-spi-nor_defconfig
@@ -0,0 +1,59 @@
+CONFIG_ARM=y
+# CONFIG_SYS_ARCH_TIMER is not set
+CONFIG_TARGET_PRESIDIO_ASIC=y
+CONFIG_SYS_TEXT_BASE=0x0400
+CONFIG_ENV_SIZE=0x2
+CONFIG_DM_GPIO=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_IDENT_STRING="Presidio-SoC"
+CONFIG_SHOW_BOOT_PROGRESS=y
+CONFIG_BOOTDELAY=3
+CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_SYS_PROMPT="G3#"
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF_TEST=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_WDT=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_SMC=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard"
+# CONFIG_NET is not set
+CONFIG_DM=y
+CONFIG_CORTINA_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CA=y
+CONFIG_LED=y
+CONFIG_LED_CORTINA=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_CORTINA=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y

[PATCH v8 1/2] spi: ca_sflash: Add CAxxxx SPI Flash Controller

[Alex Nemirovsky]

From: Pengpeng Chen 

Add SPI Flash controller driver for Cortina Access
CA SoCs

Signed-off-by: Pengpeng Chen 
Signed-off-by: Alex Nemirovsky 
CC: Jagan Teki 
CC: Vignesh R 
CC: Tom Rini 

---

Changes in v8:
- No code change
- Split out individual driver from Cortina Package 2 patch series
to help streamline acceptence into master

Changes in v7:
- Replace substring "OPCODE" with "OP" in MACROs to help
reduce code line lengths
- Replace substring "_MASK" with "_MSK" in MACROs to help
reduce code line lengths

Changes in v5: None
Changes in v3:
- Fixup syntax issues related to checkpatch.pl cleanup

 MAINTAINERS |   8 +
 drivers/spi/Kconfig |   8 +
 drivers/spi/Makefile|   1 +
 drivers/spi/ca_sflash.c | 576 
 4 files changed, 593 insertions(+)
 create mode 100644 drivers/spi/ca_sflash.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 8add9d4..57ce45e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -181,6 +181,10 @@ F: drivers/gpio/cortina_gpio.c
 F: drivers/watchdog/cortina_wdt.c
 F: drivers/serial/serial_cortina.c
 F: drivers/mmc/ca_dw_mmc.c
+F: drivers/i2c/i2c-cortina.c
+F: drivers/i2c/i2c-cortina.h
+F: drivers/led/led_cortina.c
+F: drivers/spi/ca_sflash.c
 
 ARM/CZ.NIC TURRIS MOX SUPPORT
 M: Marek Behun 
@@ -732,6 +736,10 @@ F: drivers/gpio/cortina_gpio.c
 F: drivers/watchdog/cortina_wdt.c
 F: drivers/serial/serial_cortina.c
 F: drivers/mmc/ca_dw_mmc.c
+F: drivers/i2c/i2c-cortina.c
+F: drivers/i2c/i2c-cortina.h
+F: drivers/led/led_cortina.c
+F: drivers/spi/ca_sflash.c
 
 MIPS MSCC
 M: Gregory CLEMENT 
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index dccd5ea..09f2a2a 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -106,6 +106,14 @@ config BCMSTB_SPI
  be used to access the SPI flash on platforms embedding this
  Broadcom SPI core.
 
+config CORTINA_SFLASH
+   bool "Cortina-Access Serial Flash controller driver"
+   depends on DM_SPI && SPI_MEM
+   help
+ Enable the Cortina-Access Serial Flash controller driver. This driver
+ can be used to access the SPI NOR/NAND flash on platforms embedding 
this
+ Cortina-Access IP core.
+
 config CADENCE_QSPI
bool "Cadence QSPI driver"
help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 6441694..5e53f11 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o
 obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o
 obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
 obj-$(CONFIG_CF_SPI) += cf_spi.o
+obj-$(CONFIG_CORTINA_SFLASH) += ca_sflash.o
 obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
 obj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o
 obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o
diff --git a/drivers/spi/ca_sflash.c b/drivers/spi/ca_sflash.c
new file mode 100644
index 000..00af6bf
--- /dev/null
+++ b/drivers/spi/ca_sflash.c
@@ -0,0 +1,576 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Driver for Cortina SPI-FLASH Controller
+ *
+ * Copyright (C) 2020 Cortina Access Inc. All Rights Reserved.
+ *
+ * Author: PengPeng Chen 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct ca_sflash_regs {
+   u32 idr;/* 0x00:Flash word ID Register */
+   u32 tc; /* 0x04:Flash Timeout Counter Register */
+   u32 sr; /* 0x08:Flash Status Register */
+   u32 tr; /* 0x0C:Flash Type Register */
+   u32 asr;/* 0x10:Flash ACCESS START/BUSY Register */
+   u32 isr;/* 0x14:Flash Interrupt Status Register */
+   u32 imr;/* 0x18:Flash Interrupt Mask Register */
+   u32 fcr;/* 0x1C:NAND Flash FIFO Control Register */
+   u32 ffsr;   /* 0x20:Flash FIFO Status Register */
+   u32 ffar;   /* 0x24:Flash FIFO ADDRESS Register */
+   u32 ffmar;  /* 0x28:Flash FIFO MATCHING ADDRESS Register */
+   u32 ffdr;   /* 0x2C:Flash FIFO Data Register */
+   u32 ar; /* 0x30:Serial Flash Access Register */
+   u32 ear;/* 0x34:Serial Flash Extend Access Register */
+   u32 adr;/* 0x38:Serial Flash ADdress Register */
+   u32 dr; /* 0x3C:Serial Flash Data Register */
+   u32 tmr;/* 0x40:Serial Flash Timing Register */
+};
+
+/*
+ * FLASH_TYPE
+ */
+#define CA_FLASH_TR_PINBIT(15)
+#define CA_FLASH_TR_TYPE_MSK   GENMASK(14, 12)
+#define CA_FLASH_TR_TYPE(tp)   (((tp) << 12) & CA_FLASH_TR_TYPE_MSK)
+#define CA_FLASH_TR_WIDTH  BIT(11)
+#define CA_FLASH_TR_SIZE_MSK   GENMASK(10, 9)

[PATCH v8 1/2] led: led_cortina: Add CAxxx LED support

[Alex Nemirovsky]

From: Jway Lin 

Add Cortina Access LED controller support for CA SOCs

Signed-off-by: Jway Lin 
Signed-off-by: Alex Nemirovsky 
CC: Simon Glass 

---

Changes in v8:
- No code change
- Split out individual driver from Cortina Package 2 patch series
to help streamline acceptence into master

Changes in v7:
- rename OFFSET to SHIFT from macros
- add additinal struct comments
- Reading the DT should really happen in the ofdata_to_platdata method

Changes in v4:
- remove unused macros
- remove cortina prefix from macros
- remove use BSS variable
- further cleanup to meet code style guidelines
- add additinal struct comments
- rename DT blink rate symbol

 MAINTAINERS   |   8 +-
 drivers/led/Kconfig   |   8 ++
 drivers/led/Makefile  |   1 +
 drivers/led/led_cortina.c | 305 ++
 4 files changed, 321 insertions(+), 1 deletion(-)
 create mode 100644 drivers/led/led_cortina.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 8add9d4..7a624bd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -181,6 +181,9 @@ F:  drivers/gpio/cortina_gpio.c
 F: drivers/watchdog/cortina_wdt.c
 F: drivers/serial/serial_cortina.c
 F: drivers/mmc/ca_dw_mmc.c
+F: drivers/i2c/i2c-cortina.c
+F: drivers/i2c/i2c-cortina.h
+F: drivers/led/led_cortina.c
 
 ARM/CZ.NIC TURRIS MOX SUPPORT
 M: Marek Behun 
@@ -732,6 +735,9 @@ F:  drivers/gpio/cortina_gpio.c
 F: drivers/watchdog/cortina_wdt.c
 F: drivers/serial/serial_cortina.c
 F: drivers/mmc/ca_dw_mmc.c
+F: drivers/i2c/i2c-cortina.c
+F: drivers/i2c/i2c-cortina.h
+F: drivers/led/led_cortina.c
 
 MIPS MSCC
 M: Gregory CLEMENT 
@@ -824,7 +830,7 @@ S:  Maintained
 F: arch/powerpc/
 
 POWERPC MPC8XX
-M: Christophe Leroy 
+M: Christophe Leroy 
 S: Maintained
 T: git https://gitlab.denx.de/u-boot/custodians/u-boot-mpc8xx.git
 F: arch/powerpc/cpu/mpc8xx/
diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig
index 6675934..cc87fbf 100644
--- a/drivers/led/Kconfig
+++ b/drivers/led/Kconfig
@@ -35,6 +35,14 @@ config LED_BCM6858
  This option enables support for LEDs connected to the BCM6858
  HW has blinking capabilities and up to 32 LEDs can be controlled.
 
+config LED_CORTINA
+   bool "LED Support for Cortina Access CA SoCs"
+   depends on LED && (CORTINA_PLATFORM)
+   help
+ This option enables support for LEDs connected to the Cortina
+ Access CA SOCs.
+
+
 config LED_BLINK
bool "Support LED blinking"
depends on LED
diff --git a/drivers/led/Makefile b/drivers/led/Makefile
index 3654dd3..8e3ae7f 100644
--- a/drivers/led/Makefile
+++ b/drivers/led/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_LED_BCM6328) += led_bcm6328.o
 obj-$(CONFIG_LED_BCM6358) += led_bcm6358.o
 obj-$(CONFIG_LED_BCM6858) += led_bcm6858.o
 obj-$(CONFIG_$(SPL_)LED_GPIO) += led_gpio.o
+obj-$(CONFIG_LED_CORTINA) += led_cortina.o
diff --git a/drivers/led/led_cortina.c b/drivers/led/led_cortina.c
new file mode 100644
index 000..a6d9159
--- /dev/null
+++ b/drivers/led/led_cortina.c
@@ -0,0 +1,305 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/*
+ * Copyright (C) 2020 Cortina-Access
+ * Author: Jway Lin 
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define LED_MAX_HW_BLINK   127
+#define LED_MAX_COUNT  16
+
+/* LED_CONTROL fields */
+#define LED_BLINK_RATE1_SHIFT  0
+#define LED_BLINK_RATE1_MASK   0xff
+#define LED_BLINK_RATE2_SHIFT  8
+#define LED_BLINK_RATE2_MASK   0xff
+#define LED_CLK_TEST   BIT(16)
+#define LED_CLK_POLARITY   BIT(17)
+#define LED_CLK_TEST_MODE  BIT(16)
+#define LED_CLK_TEST_RX_TEST   BIT(30)
+#define LED_CLK_TEST_TX_TEST   BIT(31)
+
+/* LED_CONFIG fields */
+#define LED_EVENT_ON_SHIFT 0
+#define LED_EVENT_ON_MASK  0x7
+#define LED_EVENT_BLINK_SHIFT  3
+#define LED_EVENT_BLINK_MASK   0x7
+#define LED_EVENT_OFF_SHIFT6
+#define LED_EVENT_OFF_MASK 0x7
+#define LED_OFF_ON_SHIFT   9
+#define LED_OFF_ON_MASK0x3
+#define LED_PORT_SHIFT 11
+#define LED_PORT_MASK  0x7
+#define LED_OFF_VALBIT(14)
+#define LED_SW_EVENT   BIT(15)
+#define LED_BLINK_SEL  BIT(16)
+
+/* LED_CONFIG structures */
+struct cortina_led_cfg {
+   void __iomem *regs;
+   u32 pin;/* LED pin nubmer */
+   bool active_low;/*Active-High or Active-Low*/
+   u32 off_event;  /* set led off event (RX,TX,SW)*/
+   u32 blink_event;/* set led blink event (RX,TX,SW)*/
+   u32 on_event;   /* set led on event (RX,TX,SW)*/
+   u32 port;   /* corresponding ethernet port */
+   int blink_sel;  /* select blink-rate1 or blink-rate2  */
+};
+
+/* LED_control structures */
+struct cortina_led_platdata {
+   void 

[PATCH v8 2/2] board: presidio: add LED support

[Alex Nemirovsky]

From: Jway Lin 

Add LED support for Cortina Access Presidio Engineering Board

Signed-off-by: Jway Lin 
Signed-off-by: Alex Nemirovsky 
Reviewed-by: Simon Glass 

CC: Simon Glass 

---

Changes in v8: None
Changes in v7: None
Changes in v4:
- rename DT blink rate symbol

 arch/arm/dts/ca-presidio-engboard.dts | 31 +++
 1 file changed, 31 insertions(+)

diff --git a/arch/arm/dts/ca-presidio-engboard.dts 
b/arch/arm/dts/ca-presidio-engboard.dts
index c03dacc..2075539 100644
--- a/arch/arm/dts/ca-presidio-engboard.dts
+++ b/arch/arm/dts/ca-presidio-engboard.dts
@@ -66,4 +66,35 @@
spi-max-frequency = <10800>;
};
};
+
+   leds: led-controller@f43200f0 {
+   compatible = "cortina,ca-leds";
+   reg = <0x0 0xf43200f0 0x40>;
+
+   cortina,blink-rate1 = <256>;
+   cortina,blink-rate2 = <512>;
+
+   led@0 {
+   pin = <0>;
+   active-low;
+   blink-sel =<0>;
+   port = <0>;
+   off-event = <0>;
+   label = "led0";
+   };
+
+   led@1 {
+   pin = <1>;
+   active-low;
+   blink-sel =<1>;
+   label = "led1";
+   };
+
+   led@2 {
+   pin = <2>;
+   active-low;
+   label = "led2";
+   };
+
+   };
 };
-- 
2.7.4

[PATCH v8 1/2] i2c: i2c-cortina: added CAxxxx I2C support

[Alex Nemirovsky]

From: Arthur Li 

Add I2C controller support for Cortina Access CA SoCs

Signed-off-by: Arthur Li 
Signed-off-by: Alex Nemirovsky 
CC: Heiko Schocher 
Reviewed-by: Heiko Schocher 

CA_I2C: DT binding for I2C controller

DT binding document for Cortina I2C driver

---

Changes in v8:
- No code change
- Split out individual driver from Cortina Package 2 patch series
to help streamline acceptence into master

Changes in v7:
- Added additional description info in I2C KConfig

Changes in v6:
- Add I2C DT binding document

Changes in v4:
- Utilize standard I2C macros from 
- Return ETIMEDOUT in funcs that can timeout
- Return i2c_xfer_init() result to caller of i2c_read() if it
fails within i2c_read() execution
- Fix misc. style guide conformance issues
- Use printf() to report i2c_xfer() runtime errors
instead of debug()

 MAINTAINERS  |   4 +
 doc/device-tree-bindings/i2c/i2c-cortina.txt |  18 ++
 drivers/i2c/Kconfig  |   8 +
 drivers/i2c/Makefile |   1 +
 drivers/i2c/i2c-cortina.c| 346 +++
 drivers/i2c/i2c-cortina.h|  84 +++
 6 files changed, 461 insertions(+)
 create mode 100644 doc/device-tree-bindings/i2c/i2c-cortina.txt
 create mode 100644 drivers/i2c/i2c-cortina.c
 create mode 100644 drivers/i2c/i2c-cortina.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 8add9d4..ce70ca9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -181,6 +181,8 @@ F:  drivers/gpio/cortina_gpio.c
 F: drivers/watchdog/cortina_wdt.c
 F: drivers/serial/serial_cortina.c
 F: drivers/mmc/ca_dw_mmc.c
+F: drivers/i2c/i2c-cortina.c
+F: drivers/i2c/i2c-cortina.h
 
 ARM/CZ.NIC TURRIS MOX SUPPORT
 M: Marek Behun 
@@ -732,6 +734,8 @@ F:  drivers/gpio/cortina_gpio.c
 F: drivers/watchdog/cortina_wdt.c
 F: drivers/serial/serial_cortina.c
 F: drivers/mmc/ca_dw_mmc.c
+F: drivers/i2c/i2c-cortina.c
+F: drivers/i2c/i2c-cortina.h
 
 MIPS MSCC
 M: Gregory CLEMENT 
diff --git a/doc/device-tree-bindings/i2c/i2c-cortina.txt 
b/doc/device-tree-bindings/i2c/i2c-cortina.txt
new file mode 100644
index 000..59d5235
--- /dev/null
+++ b/doc/device-tree-bindings/i2c/i2c-cortina.txt
@@ -0,0 +1,18 @@
+* I2C for Cortina platforms
+
+Required properties :
+- compatible : Must be "cortina,ca-i2c"
+- reg : Offset and length of the register set for the device
+
+Recommended properties :
+- clock-frequency : desired I2C bus clock frequency in Hz. If not specified,
+   default value is 10. Possible values are 10,
+   40 and 100.
+
+Examples :
+
+   i2c: i2c@f4329120 {
+   compatible = "cortina,ca-i2c";
+   reg = <0x0 0xf4329120 0x28>;
+   clock-frequency = <40>;
+   };
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index f8b18de..b56e0d9 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -93,6 +93,14 @@ config SYS_I2C_CADENCE
  Say yes here to select Cadence I2C Host Controller. This controller is
  e.g. used by Xilinx Zynq.
 
+config SYS_I2C_CA
+   tristate "Cortina-Access I2C Controller"
+   depends on DM_I2C && CORTINA_PLATFORM
+   default n
+   help
+ Add support for the Cortina Access I2C host controller.
+ Say yes here to select Cortina-Access I2C Host Controller.
+
 config SYS_I2C_DAVINCI
bool "Davinci I2C Controller"
depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 62935b7..d2b07ce 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_SYS_I2C) += i2c_core.o
 obj-$(CONFIG_SYS_I2C_ASPEED) += ast_i2c.o
 obj-$(CONFIG_SYS_I2C_AT91) += at91_i2c.o
 obj-$(CONFIG_SYS_I2C_CADENCE) += i2c-cdns.o
+obj-$(CONFIG_SYS_I2C_CA) += i2c-cortina.o
 obj-$(CONFIG_SYS_I2C_DAVINCI) += davinci_i2c.o
 obj-$(CONFIG_SYS_I2C_DW) += designware_i2c.o
 ifdef CONFIG_DM_PCI
diff --git a/drivers/i2c/i2c-cortina.c b/drivers/i2c/i2c-cortina.c
new file mode 100644
index 000..08b812a
--- /dev/null
+++ b/drivers/i2c/i2c-cortina.c
@@ -0,0 +1,346 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2020
+ * Arthur Li, Cortina Access, arthur...@cortina-access.com.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "i2c-cortina.h"
+
+static void set_speed(struct i2c_regs *regs, int i2c_spd)
+{
+   union ca_biw_cfg i2c_cfg;
+
+   i2c_cfg.wrd = readl(>i2c_cfg);
+   i2c_cfg.bf.core_en = 0;
+   writel(i2c_cfg.wrd, >i2c_cfg);
+
+   switch (i2c_spd) {
+   case IC_SPEED_MODE_FAST_PLUS:
+   i2c_cfg.bf.prer = CORTINA_PER_IO_FREQ /
+ (5 * I2C_SPEED_FAST_PLUS_RATE) - 1;
+   break;
+
+   case IC_SPEED_MODE_STANDARD:
+   i2c_cfg.bf.prer = CORTINA_PER_IO_FREQ /
+ (5 * 

[PATCH v8 2/2] board: presidio-asic: Add I2C support

[Alex Nemirovsky]

Add I2C board support for Cortina Access Presidio Engineering Board

Signed-off-by: Alex Nemirovsky 
CC: Heiko Schocher 
Reviewed-by: Heiko Schocher 
---

Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v4: None

 configs/cortina_presidio-asic-emmc_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/cortina_presidio-asic-emmc_defconfig 
b/configs/cortina_presidio-asic-emmc_defconfig
index e10008a..e45e23c 100644
--- a/configs/cortina_presidio-asic-emmc_defconfig
+++ b/configs/cortina_presidio-asic-emmc_defconfig
@@ -10,6 +10,7 @@ CONFIG_SHOW_BOOT_PROGRESS=y
 CONFIG_BOOTDELAY=3
 CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_SYS_PROMPT="G3#"
+CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PART=y
 CONFIG_CMD_WDT=y
@@ -24,6 +25,8 @@ CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard"
 # CONFIG_NET is not set
 CONFIG_DM=y
 CONFIG_CORTINA_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CA=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_CORTINA=y
-- 
2.7.4

Re: [PATCH v4] net: tftp: Add client support for RFC 7440

[rahasij]

Ramon Fried-4 wrote
> + if (strcmp((char *)pkt + i,  "windowsize") == 0) {
> + tftp_windowsize =
> + simple_strtoul((char *)pkt + i + 11,
> +NULL, 10);
> + debug("windowsize = %s, %d\n",
> +   (char *)pkt + i + 11, tftp_windowsize);
> + }
> +
>   }
> -- 
> 2.26.2

As per RFC2347, the option string is case insensitive. I fixed this for
other options in following patch

https://lists.denx.de/pipermail/u-boot/2020-May/412472.html

Please use strcasecmp() instead of strcmp().

As per RFC7440, the value received from server should be less than or equal
to the value proposed by client . This check should be added here, and error
packet must be generated in case of failure. 

Above patch implements ERR pkt generation and should be applied first.




--
Sent from: http://u-boot.10912.n7.nabble.com/

[PATCH v8 1/2] mmc: ca_dw_mmc: Misc cleanup of driver

[Alex Nemirovsky]

From: Arthur Li 

- Rename DT compatible name
- Remove uneccessary if-statement to support 8-bit buswidth
- Remove redundant error msg
- Use symbolic constants in switch statement

Signed-off-by: Arthur Li 
Signed-off-by: Alex Nemirovsky 
CC: Peng Fan 
CC: Jaehoon Chung 
CC: Tom Rini 
---

Changes in v8:
- No code change
- Split out individual driver from Cortina Package 2 patch series
to help streamline acceptence into master

Changes in v7: None
Changes in v5:
- Rebase code basis on v2020.04-rc5 which has
  already incorporated CA eMMC initial baseline

Changes in v4:
- Rename DT compatible name
- Remove uneccessary if-statement to support 8-bit buswidth
- Remove redundant error msg
- Use symbolic constants in switch statement

 drivers/mmc/ca_dw_mmc.c | 34 --
 1 file changed, 12 insertions(+), 22 deletions(-)

diff --git a/drivers/mmc/ca_dw_mmc.c b/drivers/mmc/ca_dw_mmc.c
index acbc850..198c41f 100644
--- a/drivers/mmc/ca_dw_mmc.c
+++ b/drivers/mmc/ca_dw_mmc.c
@@ -19,6 +19,7 @@
 
 #define SD_CLK_SEL_200MHZ (0x2)
 #define SD_CLK_SEL_100MHZ (0x1)
+#define SD_CLK_SEL_50MHZ (0x0)
 
 #define IO_DRV_SD_DS_OFFSET (16)
 #define IO_DRV_SD_DS_MASK   (0xff << IO_DRV_SD_DS_OFFSET)
@@ -44,15 +45,11 @@ static void ca_dwmci_clksel(struct dwmci_host *host)
struct ca_dwmmc_priv_data *priv = host->priv;
u32 val = readl(priv->sd_dll_reg);
 
-   if (host->bus_hz >= 2) {
-   val &= ~SD_CLK_SEL_MASK;
+   val &= ~SD_CLK_SEL_MASK;
+   if (host->bus_hz >= 2)
val |= SD_CLK_SEL_200MHZ;
-   } else if (host->bus_hz >= 1) {
-   val &= ~SD_CLK_SEL_MASK;
+   else if (host->bus_hz >= 1)
val |= SD_CLK_SEL_100MHZ;
-   } else {
-   val &= ~SD_CLK_SEL_MASK;
-   }
 
writel(val, priv->sd_dll_reg);
 }
@@ -77,14 +74,14 @@ unsigned int ca_dwmci_get_mmc_clock(struct dwmci_host 
*host, uint freq)
u8 clk_div;
 
switch (sd_clk_sel) {
-   case 2:
-   clk_div = 1;
+   case SD_CLK_SEL_50MHZ:
+   clk_div = 4;
break;
-   case 1:
+   case SD_CLK_SEL_100MHZ:
clk_div = 2;
break;
default:
-   clk_div = 4;
+   clk_div = 1;
}
 
return SD_SCLK_MAX / clk_div / (host->div + 1);
@@ -100,9 +97,6 @@ static int ca_dwmmc_ofdata_to_platdata(struct udevice *dev)
host->dev_index = 0;
 
host->buswidth = dev_read_u32_default(dev, "bus-width", 1);
-   if (host->buswidth != 1 && host->buswidth != 4)
-   return -EINVAL;
-
host->bus_hz = dev_read_u32_default(dev, "max-frequency", 5000);
priv->ds = dev_read_u32_default(dev, "io_ds", 0x33);
host->fifo_mode = dev_read_bool(dev, "fifo-mode");
@@ -118,10 +112,8 @@ static int ca_dwmmc_ofdata_to_platdata(struct udevice *dev)
return -EINVAL;
 
host->ioaddr = dev_read_addr_ptr(dev);
-   if (host->ioaddr == (void *)FDT_ADDR_T_NONE) {
-   printf("DWMMC: base address is invalid\n");
+   if (!host->ioaddr)
return -EINVAL;
-   }
 
host->priv = priv;
 
@@ -140,10 +132,8 @@ static int ca_dwmmc_probe(struct udevice *dev)
memcpy(_dwmci_dm_ops, _dwmci_ops, sizeof(struct dm_mmc_ops));
 
dwmci_setup_cfg(>cfg, host, host->bus_hz, MIN_FREQ);
-   if (host->buswidth == 1) {
-   (>cfg)->host_caps &= ~MMC_MODE_8BIT;
-   (>cfg)->host_caps &= ~MMC_MODE_4BIT;
-   }
+   if (host->buswidth == 1)
+   (>cfg)->host_caps &= ~(MMC_MODE_8BIT | MMC_MODE_4BIT);
 
host->mmc = >mmc;
host->mmc->priv = >host;
@@ -164,7 +154,7 @@ static int ca_dwmmc_bind(struct udevice *dev)
 }
 
 static const struct udevice_id ca_dwmmc_ids[] = {
-   { .compatible = "snps,dw-cortina" },
+   { .compatible = "cortina,ca-mmc" },
{ }
 };
 
-- 
2.7.4

[PATCH v8 2/2] board: presidio-asic: update eMMC DT information

[Alex Nemirovsky]

Change DT compatibility name to match change in driver's name.
Remove unused io_ds and fifo_mode fields from DT.

Signed-off-by: Alex Nemirovsky 
CC: Peng Fan 
CC: Jaehoon Chung 
CC: Tom Rini 

---

Changes in v8: None
Changes in v7:
- Cleanup typos in commit subject line and description

Changes in v5:
- Rebase on codebase basis v2020.04-rc5 which already incorporated
 initial baseline of eMMC DT information

Changes in v4:
- Change DT compatiblity name to match change in driver's name
- Remove unused io_ds and fifo_mode fields from DT

 arch/arm/dts/ca-presidio-engboard.dts | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/arm/dts/ca-presidio-engboard.dts 
b/arch/arm/dts/ca-presidio-engboard.dts
index c03dacc..40c93d7 100644
--- a/arch/arm/dts/ca-presidio-engboard.dts
+++ b/arch/arm/dts/ca-presidio-engboard.dts
@@ -10,11 +10,9 @@
#size-cells = <1>;
 
mmc0: mmc@f440 {
-   compatible = "snps,dw-cortina";
+   compatible = "cortina,ca-mmc";
reg = <0x0 0xf440 0x1000>;
bus-width = <4>;
-   io_ds = <0x77>;
-   fifo-mode;
sd_dll_ctrl = <0xf43200e8>;
io_drv_ctrl = <0xf432004c>;
};
-- 
2.7.4

Re: [PATCH v5 1/2] usb: provide a device tree node to USB devices

[Michael Walle]

Am 2020-05-21 16:13, schrieb Bin Meng:
On Thu, May 21, 2020 at 12:40 AM Michael Walle  
wrote:


It is possible to specify a device tree node for an USB device. This 
is

useful if you have a static USB setup and want to use aliases which
point to these nodes, like on the Raspberry Pi.
The nodes are matched against their hub port number, the compatible
strings are not matched for now.

Signed-off-by: Michael Walle 
---
This is a new patch in v5:
  Fixes the ethernet0 alias on Raspberry Pis. This has never been
  working, but wasn't a problem until recently. Patch 2/2 changes
  the allocation of the numbers and reserves possible aliases.

 drivers/usb/host/usb-uclass.c | 41 
++-

 1 file changed, 36 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/host/usb-uclass.c 
b/drivers/usb/host/usb-uclass.c

index cb79dfbbd5..f42c0625cb 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -494,6 +494,35 @@ static int usb_match_one_id(struct 
usb_device_descriptor *desc,

return usb_match_one_id_intf(desc, int_desc, id);
 }

+static ofnode usb_get_ofnode(struct udevice *hub, int port)
+{
+   ofnode node;
+   u32 reg;
+
+   if (!dev_has_of_node(hub))
+   return ofnode_null();
+
+   /*
+* The USB controller and its USB hub are two different 
udevices,

+* but the device tree has only one node for both. Thus we are
+* assigning this node to both udevices.
+* If port is zero, the controller scans its root hub, thus we
+* are using the same ofnode as the controller here.
+*/
+   if (!port)
+   return dev_ofnode(hub);
+
+   ofnode_for_each_subnode(node, dev_ofnode(hub)) {
+   if (ofnode_read_u32(node, "reg", ))
+   continue;
+
+   if (reg == port)
+   return node;
+   }
+
+   return ofnode_null();
+}
+
 /**
  * usb_find_and_bind_driver() - Find and bind the right USB driver
  *
@@ -502,13 +531,14 @@ static int usb_match_one_id(struct 
usb_device_descriptor *desc,

 static int usb_find_and_bind_driver(struct udevice *parent,
struct usb_device_descriptor 
*desc,
struct usb_interface_descriptor 
*iface,

-   int bus_seq, int devnum,
+   int bus_seq, int devnum, int port,
struct udevice **devp)
 {
struct usb_driver_entry *start, *entry;
int n_ents;
int ret;
char name[30], *str;
+   ofnode node = usb_get_ofnode(parent, port);

*devp = NULL;
debug("%s: Searching for driver\n", __func__);
@@ -533,8 +563,8 @@ static int usb_find_and_bind_driver(struct udevice 
*parent,
 * find another driver. For now this doesn't 
seem

 * necesssary, so just bind the first match.
 */
-   ret = device_bind(parent, drv, drv->name, 
NULL, -1,

- );
+   ret = device_bind_ofnode(parent, drv, 
drv->name, NULL,

+node, );
if (ret)
goto error;
debug("%s: Match found: %s\n", __func__, 
drv->name);
@@ -651,9 +681,10 @@ int usb_scan_device(struct udevice *parent, int 
port,

if (ret) {
if (ret != -ENOENT)
return ret;
-   ret = usb_find_and_bind_driver(parent, 
>descriptor, iface,
+   ret = usb_find_and_bind_driver(parent, 
>descriptor,

+  iface,
   
udev->controller_dev->seq,

-  udev->devnum, );
+  udev->devnum, port, 
);

if (ret)
return ret;
created = true;
--


Do we have tests added ?


Adding tests for this isn't straight forward. Mostly because the device 
tree
is used to add the emulated USB devices. OTOH we try to match the device 
tree
to the scanned devices. To make things worse, the hierarchy of the USB 
hubs

and usb devices doesn't seem to fit a "normal" device tree.

Eg. in sandbox/dts/test.dts it is:
usb@1 {
  /* this is the controller */
  hub {
/* I don't know what this is */
hub-emul {
  /* this is the root hub */
  flash-stick@0 {
reg = <0>;
/* this is an usb device on port _1_ of the root hub */
  };
};
  };
};

On a real device tree (eg. the raspberry pi one) it is:
usb {
  /* this is the controller & root hub */
  usb1@1 {
/* this is another _external_ hub on port 1 of the root hub */
reg = <1>;
usbether@1 {
  /* this is an usb device on port 1 

[PATCH] ARM: imx: soc: Add reset for non-DM case

[Marek Vasut]

This is another in series of patches which remove ad-hoc reset_cpu()
hacks from board files. This one is for iMX7, so implement default
reset_cpu() there to prevent it from showing up in board files.

Signed-off-by: Marek Vasut 
Cc: Fabio Estevam 
Cc: NXP i.MX U-Boot Team 
Cc: Peng Fan 
Cc: Stefano Babic 
---
 arch/arm/mach-imx/mx7/soc.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index 798fe74a3d..e7c71dfe8e 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -18,6 +18,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -419,3 +420,15 @@ void reset_misc(void)
 #endif
 }
 
+#if !CONFIG_IS_ENABLED(SYSRESET)
+void reset_cpu(ulong addr)
+{
+   struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
+
+   /* Clear WDA to trigger WDOG_B immediately */
+   writew(SET_WCR_WT(1) | WCR_WDT | WCR_WDE | WCR_SRS, >wcr);
+
+   while (1)
+   ;
+}
+#endif
-- 
2.25.1

[PATCH] ARM: imx: soc: Select default TEXT_BASE for MX7

[Marek Vasut]

Select default U-Boot and SPL text base for the MX7 SoC. The U-Boot
text base is picked as the one used by various MX7 boards. The SPL
text base however is different.

The SPL text base is set to 0x912000 instead of the usual 0x911000,
that is because the 0x911000 value cannot work. Using 0x911000 as a
SPL text base will result in the DCD header being placed below the
0x911000 address, which is a reserved SRAM area which must not be
used. This will actually trigger eMMC boot failure on MX7D at least.
Hence the increment.

Update all boards affected by this SPL problem to the new SPL_TEXT_BASE.

Signed-off-by: Marek Vasut 
Cc: Fabio Estevam 
Cc: NXP i.MX U-Boot Team 
Cc: Peng Fan 
Cc: Stefano Babic 
---
 arch/arm/mach-imx/mx7/Kconfig   | 7 +++
 configs/cl-som-imx7_defconfig   | 2 --
 configs/pico-dwarf-imx7d_defconfig  | 2 --
 configs/pico-hobbit-imx7d_defconfig | 2 --
 configs/pico-imx7d_defconfig| 2 --
 configs/pico-nymph-imx7d_defconfig  | 2 --
 configs/pico-pi-imx7d_defconfig | 2 --
 7 files changed, 7 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig
index 286d36589d..c8146c3509 100644
--- a/arch/arm/mach-imx/mx7/Kconfig
+++ b/arch/arm/mach-imx/mx7/Kconfig
@@ -16,6 +16,13 @@ config MX7D
select ROM_UNIFIED_SECTIONS
imply CMD_FUSE
 
+config SYS_TEXT_BASE
+   default 0x8780
+
+config SPL_TEXT_BASE
+   depends on SPL
+   default 0x00912000
+
 choice
prompt "MX7 board select"
optional
diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig
index d2766190de..b54048343f 100644
--- a/configs/cl-som-imx7_defconfig
+++ b/configs/cl-som-imx7_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX7=y
-CONFIG_SYS_TEXT_BASE=0x8780
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -17,7 +16,6 @@ CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
-CONFIG_SPL_TEXT_BASE=0x00911000
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
 CONFIG_SPI_BOOT=y
 CONFIG_BOOTDELAY=3
diff --git a/configs/pico-dwarf-imx7d_defconfig 
b/configs/pico-dwarf-imx7d_defconfig
index 8a1e15de65..07b17f52ec 100644
--- a/configs/pico-dwarf-imx7d_defconfig
+++ b/configs/pico-dwarf-imx7d_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX7=y
-CONFIG_SYS_TEXT_BASE=0x8780
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -15,7 +14,6 @@ CONFIG_SPL=y
 CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
-CONFIG_SPL_TEXT_BASE=0x00911000
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
diff --git a/configs/pico-hobbit-imx7d_defconfig 
b/configs/pico-hobbit-imx7d_defconfig
index 830fddeee9..d04b0d7dd6 100644
--- a/configs/pico-hobbit-imx7d_defconfig
+++ b/configs/pico-hobbit-imx7d_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX7=y
-CONFIG_SYS_TEXT_BASE=0x8780
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -15,7 +14,6 @@ CONFIG_SPL=y
 CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
-CONFIG_SPL_TEXT_BASE=0x00911000
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig
index 545acd2c89..f3719187ef 100644
--- a/configs/pico-imx7d_defconfig
+++ b/configs/pico-imx7d_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX7=y
-CONFIG_SYS_TEXT_BASE=0x8780
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -15,7 +14,6 @@ CONFIG_SPL=y
 CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
-CONFIG_SPL_TEXT_BASE=0x00911000
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
diff --git a/configs/pico-nymph-imx7d_defconfig 
b/configs/pico-nymph-imx7d_defconfig
index 8a1e15de65..07b17f52ec 100644
--- a/configs/pico-nymph-imx7d_defconfig
+++ b/configs/pico-nymph-imx7d_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX7=y
-CONFIG_SYS_TEXT_BASE=0x8780
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -15,7 +14,6 @@ CONFIG_SPL=y
 CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
-CONFIG_SPL_TEXT_BASE=0x00911000
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig
index c9e6abc7d2..13b6a2f35c 100644
--- a/configs/pico-pi-imx7d_defconfig
+++ 

[PATCH] ARM: imx: soc: Switch BOARD_EARLY_INIT_F to imply on MX7

[Marek Vasut]

There are systems where board_early_init_f() is plain empty. Switch
the config option from "select" to "imply", to permit user to unset
the BOARD_EARLY_INIT_F if it were to be empty.

Signed-off-by: Marek Vasut 
Cc: Fabio Estevam 
Cc: NXP i.MX U-Boot Team 
Cc: Peng Fan 
Cc: Stefano Babic 
---
 arch/arm/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ef7da27877..a581cfb0f7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -873,11 +873,11 @@ config ARCH_MX7ULP
 config ARCH_MX7
bool "Freescale MX7"
select ARCH_MISC_INIT
-   select BOARD_EARLY_INIT_F
select CPU_V7A
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
+   imply BOARD_EARLY_INIT_F
imply MXC_GPIO
imply SYS_THUMB_BUILD
 
-- 
2.25.1

[PATCH] ARM: imx: ddr: Fill in missing DDRC ZQCTLx on i.MX7

[Marek Vasut]

The iMX7 defines further DDRC ZQCTLx registers, however those were
thus far missing from the list of registers and not programmed. On
systems with LPDDR2 or DDR3, those registers must be programmed with
correct values, otherwise the DRAM may not work. However, existing
systems which worked without programming these registers before are
now setting those registers to 0, which is the default value, so no
functional change there.

Signed-off-by: Marek Vasut 
Cc: Fabio Estevam 
Cc: NXP i.MX U-Boot Team 
Cc: Peng Fan 
Cc: Stefano Babic 
---
 arch/arm/include/asm/arch-mx7/mx7-ddr.h | 4 +++-
 arch/arm/mach-imx/mx7/ddr.c | 1 +
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-mx7/mx7-ddr.h 
b/arch/arm/include/asm/arch-mx7/mx7-ddr.h
index 37aaee0ad7..bea5dd8ec5 100644
--- a/arch/arm/include/asm/arch-mx7/mx7-ddr.h
+++ b/arch/arm/include/asm/arch-mx7/mx7-ddr.h
@@ -39,7 +39,9 @@ struct ddrc {
u32 dramtmg8;   /* 0x0120 */
u32 reserved7[0x17];
u32 zqctl0; /* 0x0180 */
-   u32 reserved8[0x03];
+   u32 zqctl1; /* 0x0184 */
+   u32 zqctl2; /* 0x0188 */
+   u32 zqstat; /* 0x018c */
u32 dfitmg0;/* 0x0190 */
u32 dfitmg1;/* 0x0194 */
u32 reserved9[0x02];
diff --git a/arch/arm/mach-imx/mx7/ddr.c b/arch/arm/mach-imx/mx7/ddr.c
index 9713835bf2..9ffd8c6c66 100644
--- a/arch/arm/mach-imx/mx7/ddr.c
+++ b/arch/arm/mach-imx/mx7/ddr.c
@@ -58,6 +58,7 @@ void mx7_dram_cfg(struct ddrc *ddrc_regs_val, struct ddrc_mp 
*ddrc_mp_val,
writel(ddrc_regs_val->dramtmg5, _regs->dramtmg5);
writel(ddrc_regs_val->dramtmg8, _regs->dramtmg8);
writel(ddrc_regs_val->zqctl0, _regs->zqctl0);
+   writel(ddrc_regs_val->zqctl1, _regs->zqctl1);
writel(ddrc_regs_val->dfitmg0, _regs->dfitmg0);
writel(ddrc_regs_val->dfitmg1, _regs->dfitmg1);
writel(ddrc_regs_val->dfiupd0, _regs->dfiupd0);
-- 
2.25.1

[PATCH 2/2] usb: ehci-mx6: Print error code on failure

[Marek Vasut]

Print the error code if the regulator enable fails, otherwise the error
message is rather useless and confusing.

Signed-off-by: Marek Vasut 
---
 drivers/usb/host/ehci-mx6.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 470eddd0c9..5f84c7b91d 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -448,7 +448,7 @@ static int mx6_init_after_reset(struct ehci_ctrl *dev)
   (type == USB_INIT_DEVICE) ?
   false : true);
if (ret && ret != -ENOSYS) {
-   puts("Error enabling VBUS supply\n");
+   printf("Error enabling VBUS supply (ret=%i)\n", ret);
return ret;
}
}
@@ -615,7 +615,7 @@ static int ehci_usb_probe(struct udevice *dev)
   (type == USB_INIT_DEVICE) ?
   false : true);
if (ret && ret != -ENOSYS) {
-   puts("Error enabling VBUS supply\n");
+   printf("Error enabling VBUS supply (ret=%i)\n", ret);
return ret;
}
}
-- 
2.25.1

[PATCH 1/2] usb: ehci-mx6: Handle fixed regulators correctly

[Marek Vasut]

The regulator-fixed would return -ENOSYS when enabled/disabled,
because this operation is not supported, but this is not an error
e.g. on systems where the VBUS cannot be controlled, so if this
is the error code reported by the regulator core, consider it a
success and continue.

Signed-off-by: Marek Vasut 
---
 drivers/usb/host/ehci-mx6.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 24f8ad7af8..470eddd0c9 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -447,7 +447,7 @@ static int mx6_init_after_reset(struct ehci_ctrl *dev)
ret = regulator_set_enable(priv->vbus_supply,
   (type == USB_INIT_DEVICE) ?
   false : true);
-   if (ret) {
+   if (ret && ret != -ENOSYS) {
puts("Error enabling VBUS supply\n");
return ret;
}
@@ -614,7 +614,7 @@ static int ehci_usb_probe(struct udevice *dev)
ret = regulator_set_enable(priv->vbus_supply,
   (type == USB_INIT_DEVICE) ?
   false : true);
-   if (ret) {
+   if (ret && ret != -ENOSYS) {
puts("Error enabling VBUS supply\n");
return ret;
}
-- 
2.25.1

Re: PINE64 Rock64 - How to get SPI driver working

[Johannes Krottmayer]

Hi Kever,

I think you answered the wrong person. :)

Okay, thanks for the suggestions.

I will check the sources. There was also a missing alias
in the Device-Tree source. I have added the specific alias
for the SPI bus. Now I'm getting the error code -2.

I'm new with U-Boot and the source code itself, but I
think the problem occurs still in the device tree file for
the specific board.

Cheers,

Johannes K.


On 21.05.20 at 15:35,  Kever Yang wrote:
> Jagan may some idea here.
> 
> 
> I would suggest you to add some log in the spi/flash driver for bind, 
> probe and etc
> 
> to check what's wrong.
> 
> 
> Thanks,
> 
> - Kever
> 
> On 2020/5/20 上午7:41, Johannes Krottmayer wrote:
>> Hello,
>>
>> I just compiled U-Boot v2020.04 for a PINE64 Rock media board.
>> It compiles fine without errors, but when I try to probe the
>> on board flash I get an error:
>>
>> => sf probe
>> Invalid bus 0 (err=-19)
>> Failed to initialize SPI flash at 0:0 (error -19)
>> =>
>>
>> SPI is activated in the Device-Tree blob. I also added support
>> to the Rockchip SPI driver (added IDS strings for this SoC).
>>
>> In the device config I added the following:
>>
>> CONFIG_SPI=y
>> CONFIG_ROCKCHIP_SPI=y
>> CONFIG_SPI_FLASH=y
>>
>> But the driver still doesn't work. Output of DM (shortened):
>>
>> => dm tree
>> [...]
>>spi   0  [   ]   rockchip_spi  |-- spi@ff19
>>
>>spi_flash 0  [   ]   spi_flash_std |   `-- spiflash@0
>> [...]
>>
>> What is missing? Is there a way to load driver?
>>
>> Any kind of help is highly appreciated.
>>
> 
> 

[PATCH] env: Convert ENV_ACCESS_IGNORE_FORCE to Kconfig

[Marek Vasut]

Convert ENV_ACCESS_IGNORE_FORCE to Kconfig, no functional change.

Signed-off-by: Marek Vasut 
Cc: Tom Rini 
---
 README   | 4 
 env/Kconfig  | 7 +++
 scripts/config_whitelist.txt | 1 -
 3 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/README b/README
index be9e6391d6..17dc0ee33b 100644
--- a/README
+++ b/README
@@ -2729,10 +2729,6 @@ Configuration Settings:
regular expression. This allows multiple variables to define the same
flags without explicitly listing them for each variable.
 
-- CONFIG_ENV_ACCESS_IGNORE_FORCE
-   If defined, don't allow the -f switch to env set override variable
-   access flags.
-
 The following definitions that deal with the placement and management
 of environment data (variable area); in general, we support the
 following configurations:
diff --git a/env/Kconfig b/env/Kconfig
index ed94e83ec1..ca7fef682b 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -604,6 +604,13 @@ config DELAY_ENVIRONMENT
  later by U-Boot code. With CONFIG_OF_CONTROL this is instead
  controlled by the value of /config/load-environment.
 
+config ENV_ACCESS_IGNORE_FORCE
+   bool "Block forced environment operations"
+   default n
+   help
+ If defined, don't allow the -f switch to env set override variable
+ access flags.
+
 if SPL_ENV_SUPPORT
 config SPL_ENV_IS_NOWHERE
bool "SPL Environment is not stored"
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 3f5e6504e1..0b3fb728a0 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -415,7 +415,6 @@ CONFIG_ENABLE_36BIT_PHYS
 CONFIG_ENABLE_MMU
 CONFIG_ENABLE_MUST_CHECK
 CONFIG_ENABLE_WARN_DEPRECATED
-CONFIG_ENV_ACCESS_IGNORE_FORCE
 CONFIG_ENV_ADDR_FLEX
 CONFIG_ENV_CALLBACK_LIST_DEFAULT
 CONFIG_ENV_CALLBACK_LIST_STATIC
-- 
2.25.1

Re: [PULL] u-boot-sh/master

[Tom Rini]

On Thu, May 21, 2020 at 02:12:10PM +0200, Marek Vasut wrote:

> I had to update the PR...
> 
> The following changes since commit c2279d784e35fa25ee3a9fa28a74a1ba545f8c1e:
> 
>   Merge branch '2020-05-18-reduce-size-of-common.h' (2020-05-19 10:51:43
> -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-sh.git master
> 
> for you to fetch changes up to 56f01746ab5c6950bd0f76d02252ee4450f86659:
> 
>   sh: Enable ffunction-sections and fdata-sections (2020-05-20 13:20:25
> +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


signature.asc
Description: PGP signature

[PATCH] checkpatch.pl: Add check for defining CONFIG_CMD_xxx via config files

[Tom Rini]

All of our cmds have a Kconfig entry.  Making enabling a CMD via the
config file an error to checkpatch.pl.

Signed-off-by: Tom Rini 
---
 scripts/checkpatch.pl | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index c2641bc995e8..5c0317c67fdb 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -6502,6 +6502,12 @@ sub process {
  "#define of '$1' is wrong - use Kconfig variables 
or standard guards instead\n" . $herecurr);
}
 
+# Defining new CONFIG_CMD is wrong.
+   if ($line =~ /\+\s*#\s*define\s+(CONFIG_CMD\w*)\b/) {
+   ERROR("DEFINE_CONFIG_CMD",
+ "#define of '$1' is wrong - use Kconfig entries 
instead\n" . $herecurr);
+   }
+
 # likely/unlikely comparisons similar to "(likely(foo) > 0)"
if ($perl_version_ok &&
$line =~ 
/\b((?:un)?likely)\s*\(\s*$FuncArg\s*\)\s*$Compare/) {
-- 
2.17.1

[PATCH] Convert CONFIG_CMD_MMC to Kconfig

[Tom Rini]

This converts the following to Kconfig:
   CONFIG_CMD_MMC

Signed-off-by: Tom Rini 
---
 configs/bcm7260_defconfig   | 1 +
 configs/bcm7445_defconfig   | 1 +
 configs/gurnard_defconfig   | 1 +
 configs/imx8mq_evk_defconfig| 1 +
 configs/imx8mq_phanbell_defconfig   | 1 +
 configs/ls1021aiot_qspi_defconfig   | 1 +
 configs/ls1021aiot_sdcard_defconfig | 1 +
 configs/pico-imx8mq_defconfig   | 1 +
 configs/s32v234evb_defconfig| 1 +
 include/configs/bcmstb.h| 1 -
 include/configs/imx8mq_evk.h| 2 --
 include/configs/imx8mq_phanbell.h   | 2 --
 include/configs/ls1021aiot.h| 1 -
 include/configs/pico-imx8mq.h   | 2 --
 include/configs/s32v234evb.h| 1 -
 include/configs/snapper9g45.h   | 1 -
 16 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig
index afb59ec8847e..d467e62deef1 100644
--- a/configs/bcm7260_defconfig
+++ b/configs/bcm7260_defconfig
@@ -13,6 +13,7 @@ CONFIG_USE_PREBOOT=y
 CONFIG_PREBOOT="fdt addr ${fdtcontroladdr};fdt move ${fdtcontroladdr} 
${fdtsaveaddr};fdt addr ${fdtsaveaddr};"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot>"
+CONFIG_CMD_MMC=y
 CONFIG_EFI_PARTITION=y
 CONFIG_OF_PRIOR_STAGE=y
 CONFIG_ENV_IS_IN_MMC=y
diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig
index 0ae0595903ce..2c71a5efedd1 100644
--- a/configs/bcm7445_defconfig
+++ b/configs/bcm7445_defconfig
@@ -14,6 +14,7 @@ CONFIG_USE_PREBOOT=y
 CONFIG_PREBOOT="fdt addr ${fdtcontroladdr};fdt move ${fdtcontroladdr} 
${fdtsaveaddr};fdt addr ${fdtsaveaddr};"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot>"
+CONFIG_CMD_MMC=y
 CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SPI=y
 CONFIG_OF_PRIOR_STAGE=y
diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig
index a5d51ce61018..7e394d9aec17 100644
--- a/configs/gurnard_defconfig
+++ b/configs/gurnard_defconfig
@@ -16,6 +16,7 @@ CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
 CONFIG_CMD_PART=y
 CONFIG_CMD_USB=y
diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig
index 1504ecbbd647..7472bad9e62b 100644
--- a/configs/imx8mq_evk_defconfig
+++ b/configs/imx8mq_evk_defconfig
@@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y
 # CONFIG_BOOTM_NETBSD is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_EXT2=y
diff --git a/configs/imx8mq_phanbell_defconfig 
b/configs/imx8mq_phanbell_defconfig
index 651940ccf696..045d20489706 100644
--- a/configs/imx8mq_phanbell_defconfig
+++ b/configs/imx8mq_phanbell_defconfig
@@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y
 # CONFIG_BOOTM_NETBSD is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_EXT2=y
diff --git a/configs/ls1021aiot_qspi_defconfig 
b/configs/ls1021aiot_qspi_defconfig
index dba33e2a9b7e..cb73a04b3520 100644
--- a/configs/ls1021aiot_qspi_defconfig
+++ b/configs/ls1021aiot_qspi_defconfig
@@ -12,6 +12,7 @@ CONFIG_MISC_INIT_R=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
diff --git a/configs/ls1021aiot_sdcard_defconfig 
b/configs/ls1021aiot_sdcard_defconfig
index fc6df70db738..10b6930914f2 100644
--- a/configs/ls1021aiot_sdcard_defconfig
+++ b/configs/ls1021aiot_sdcard_defconfig
@@ -17,6 +17,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig
index 2d68fe152c78..470fd3a35524 100644
--- a/configs/pico-imx8mq_defconfig
+++ b/configs/pico-imx8mq_defconfig
@@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y
 # CONFIG_BOOTM_NETBSD is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_EXT2=y
diff --git a/configs/s32v234evb_defconfig b/configs/s32v234evb_defconfig
index 99720a9193a9..78450c23d6a1 100644
--- a/configs/s32v234evb_defconfig
+++ b/configs/s32v234evb_defconfig
@@ -13,6 +13,7 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_MEMTEST_START=0xc000
 CONFIG_SYS_MEMTEST_END=0xc7c0
+CONFIG_CMD_MMC=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h
index e58a9510de9e..5f6bf62524a9 100644
--- a/include/configs/bcmstb.h
+++ b/include/configs/bcmstb.h
@@ -130,7 +130,6 @@ extern phys_addr_t prior_stage_fdt_address;
 #define CONFIG_CMD_ASKENV
 #define CONFIG_CMD_CACHE
 #define CONFIG_CMD_EXT2
-#define CONFIG_CMD_MMC
 
 /*
  * Flash configuration.
diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h
index 632c4eaf77db..94183269cd67 100644
--- a/include/configs/imx8mq_evk.h

Re: [PATCH 1/2] serial: Add riscv_sbi console support

[Sean Anderson]

Hi,

There are a couple instances where your code is not formatted in the
correct style [1]. You can use tools/checkpatch.pl to help you fix
these.

[1] https://www.denx.de/wiki/U-Boot/CodingStyle

On 5/20/20 1:33 AM, Kongou Hikari wrote:
>   - This patch supports debug serial and console from SBI syscall.
> 
> Signed-off-by: Kongou Hikari 
> ---
>  drivers/serial/Kconfig|  17 +
>  drivers/serial/Makefile   |   1 +
>  drivers/serial/serial_riscv_sbi.c | 104 ++
>  3 files changed, 122 insertions(+)
>  create mode 100644 drivers/serial/serial_riscv_sbi.c
> 
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index 90e3983170..60dcf9bc9a 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -388,12 +388,20 @@ config DEBUG_UART_MTK
> driver will be available until the real driver model serial is
> running.
>  
> +
> +config DEBUG_UART_RISCV_SBI
> +bool "RISC-V SBI CONSOLE"
> +depends on RISCV_SBI_CONSOLE
> +help
> +  Select this to enable a debug UART using RISC-V SBI console driver.
> +
>  endchoice
>  
>  config DEBUG_UART_BASE
>   hex "Base address of UART"
>   depends on DEBUG_UART
>   default 0 if DEBUG_UART_SANDBOX
> + default 0 if DEBUG_UART_RISCV_SBI
>   help
> This is the base address of your UART for memory-mapped UARTs.
>  
> @@ -404,6 +412,7 @@ config DEBUG_UART_CLOCK
>   int "UART input clock"
>   depends on DEBUG_UART
>   default 0 if DEBUG_UART_SANDBOX
> + default 0 if DEBUG_UART_RISCV_SBI
>   help
> The UART input clock determines the speed of the internal UART
> circuitry. The baud rate is derived from this by dividing the input
> @@ -481,6 +490,14 @@ config ALTERA_JTAG_UART_BYPASS
> output will wait forever until a JTAG terminal is connected. If you
> not are sure, say Y.
>  
> +config RISCV_SBI_CONSOLE
> + bool "RISC-V SBI console support"
> + depends on RISCV
> + help
> +   This enables support for console via RISC-V SBI calls.
> +
> +   If you don't know what do to here, say Y.
> +
>  config ALTERA_UART
>   bool "Altera UART support"
>   depends on DM_SERIAL
> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> index e4a927..15b2a3ea6f 100644
> --- a/drivers/serial/Makefile
> +++ b/drivers/serial/Makefile
> @@ -46,6 +46,7 @@ obj-$(CONFIG_MXC_UART) += serial_mxc.o
>  obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o
>  obj-$(CONFIG_MESON_SERIAL) += serial_meson.o
>  obj-$(CONFIG_INTEL_MID_SERIAL) += serial_intel_mid.o
> +obj-$(CONFIG_RISCV_SBI_CONSOLE) += serial_riscv_sbi.o
>  ifdef CONFIG_SPL_BUILD
>  obj-$(CONFIG_ROCKCHIP_SERIAL) += serial_rockchip.o
>  endif
> diff --git a/drivers/serial/serial_riscv_sbi.c 
> b/drivers/serial/serial_riscv_sbi.c
> new file mode 100644
> index 00..add11be04e
> --- /dev/null
> +++ b/drivers/serial/serial_riscv_sbi.c
> @@ -0,0 +1,104 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2008 David Gibson, IBM Corporation
> + * Copyright (C) 2012 Regents of the University of California
> + * Copyright (C) 2020 Nuclei System Technologies
> + * Copyright (C) 2020 Ruigang Wan 
> + */
> +
> +#include 

The following includes should be sorted alphabetially

> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +

I believe it's conventional to put the debug uart at the end of a file.

> +#ifdef CONFIG_DEBUG_UART_RISCV_SBI
> +

This include should probably be at the top and outside of this ifdef.

> +#include 
> +
> +
> +static inline void _debug_uart_init(void)
> +{

Don't use C++-style comments, except in SPDX identifiers.

> + //Nothing
> +}
> +
> +static inline void _debug_uart_putc(int ch)
> +{
> + sbi_console_putchar(ch);
> +}
> +
> +DEBUG_UART_FUNCS
> +
> +#endif
> +
> +static int sbi_tty_pending_char = -1;
> +
> +static int sbi_tty_put(struct udevice *dev, const char ch)
> +{
> +
> + sbi_console_putchar(ch);
> +
> + return 0;
> +}
> +
> +static int sbi_tty_get(struct udevice *dev)
> +{
> + int c;

There should be a blank line here.

> + if (sbi_tty_pending_char != -1)

Opening braces go on the same line as statement; the only exception are
functions. For example,

if (foo) {

} else {

}

> + {
> + c = sbi_tty_pending_char;
> + sbi_tty_pending_char = -1;
> + }
> + else
> + {
> + c = sbi_console_getchar();
> + if (c < 0)
> + return -EAGAIN;
> + }
> +
> + return c;
> +}
> +
> +static int sbi_tty_setbrg(struct udevice *dev, int baudrate)
> +{
> + return 0;
> +}
> +
> +static int sbi_tty_pending(struct udevice *dev, bool input)
> +{
> + int c;
> + if (input)
> + {
> + if (sbi_tty_pending_char != -1)
> + return 1;
> +
> + c = sbi_console_getchar();
> + if(c < 0)
> + return 0;
> + 

Re: [PATCH v1 1/3] board: ns3: add optee based bnxt fw load driver

[Simon Glass]

Hi,

On Tue, 19 May 2020 at 20:15, Thomas Fitzsimmons  wrote:
>
> Hi Rayagonda and Vikas,
>
> Rayagonda Kokatanur  writes:
>
> > From: Vikas Gupta 
> >
> > Add optee based bnxt fw load driver.
>
> What is "bnxt"?  Maybe you could add a comment explaining what it is, or
> at least expanding it if it's an acronym?
>
Also how about putting it in drivers/ ?

Also are there docs somewhere on how an image is put together?


- Simon

Re: [U-Boot] [ANN] Monthly developer call

[Tom Rini]

On Thu, May 21, 2020 at 08:24:55PM +0200, Marek Vasut wrote:
> On 5/21/20 8:15 PM, Simon Glass wrote:
> > Hi Marek,
> > 
> > On Thu, 21 May 2020 at 12:14, Marek Vasut  wrote:
> > 
> >> On 5/21/20 8:09 PM, Simon Glass wrote:
> >>> Hi Marek,
> >>
> >> Hi,
> >>
> >>> On Thu, 21 May 2020 at 12:06, Marek Vasut  wrote:
> >>>
>  On 5/21/20 7:52 PM, Simon Glass wrote:
> > Hi Marek,
> 
>  Hi,
> 
> > You don't have to be signed in to view, just to edit. Etherpad is
> >> pretty
> > crappy IMO.
> 
>  Seems to work fine. But maybe there is some other alternative?
> 
>  (we can just log some irc channel?)
> 
> > I believe the next one will be 3rd week of June.
> 
>  Is there already some more precise date ?
> 
> >>>
> >>> At present it is the 3rd Monday of every month at 4PM UTC / 11AM US
> >> Eastern
> >>> / 8AM US Pacific.
> >>
> >> Oh, did I miss some of the previous ones ?
> >>
> >> Also, it might actually be better to make this an IRC meeting, to
> >> mitigate language barrier issues. I sometimes have trouble following
> >> fast spoken english myself.
> >>
> > 
> > We already discussed this further up the thread...we already have IRC, but
> > what we don't have is an actual meeting. We can try to speak slowly!
> 
> I suspect you want to get feedback on this part from others who don't
> have english as their native language. If others are fine with this, so
> be it.
> 
> What is the benefit of a telco compared to IRC anyway ?

Frankly with the current state of the world I feel like there's a lot of
people in video conf overload, so a scheduled IRC meeting might be
better anyhow.

-- 
Tom


signature.asc
Description: PGP signature

Re: [U-Boot] [ANN] Monthly developer call

[Marek Vasut]

On 5/21/20 8:15 PM, Simon Glass wrote:
> Hi Marek,
> 
> On Thu, 21 May 2020 at 12:14, Marek Vasut  wrote:
> 
>> On 5/21/20 8:09 PM, Simon Glass wrote:
>>> Hi Marek,
>>
>> Hi,
>>
>>> On Thu, 21 May 2020 at 12:06, Marek Vasut  wrote:
>>>
 On 5/21/20 7:52 PM, Simon Glass wrote:
> Hi Marek,

 Hi,

> You don't have to be signed in to view, just to edit. Etherpad is
>> pretty
> crappy IMO.

 Seems to work fine. But maybe there is some other alternative?

 (we can just log some irc channel?)

> I believe the next one will be 3rd week of June.

 Is there already some more precise date ?

>>>
>>> At present it is the 3rd Monday of every month at 4PM UTC / 11AM US
>> Eastern
>>> / 8AM US Pacific.
>>
>> Oh, did I miss some of the previous ones ?
>>
>> Also, it might actually be better to make this an IRC meeting, to
>> mitigate language barrier issues. I sometimes have trouble following
>> fast spoken english myself.
>>
> 
> We already discussed this further up the thread...we already have IRC, but
> what we don't have is an actual meeting. We can try to speak slowly!

I suspect you want to get feedback on this part from others who don't
have english as their native language. If others are fine with this, so
be it.

What is the benefit of a telco compared to IRC anyway ?

Re: [U-Boot] [ANN] Monthly developer call

[Simon Glass]

Hi Marek,

On Thu, 21 May 2020 at 12:14, Marek Vasut  wrote:

> On 5/21/20 8:09 PM, Simon Glass wrote:
> > Hi Marek,
>
> Hi,
>
> > On Thu, 21 May 2020 at 12:06, Marek Vasut  wrote:
> >
> >> On 5/21/20 7:52 PM, Simon Glass wrote:
> >>> Hi Marek,
> >>
> >> Hi,
> >>
> >>> You don't have to be signed in to view, just to edit. Etherpad is
> pretty
> >>> crappy IMO.
> >>
> >> Seems to work fine. But maybe there is some other alternative?
> >>
> >> (we can just log some irc channel?)
> >>
> >>> I believe the next one will be 3rd week of June.
> >>
> >> Is there already some more precise date ?
> >>
> >
> > At present it is the 3rd Monday of every month at 4PM UTC / 11AM US
> Eastern
> > / 8AM US Pacific.
>
> Oh, did I miss some of the previous ones ?
>
> Also, it might actually be better to make this an IRC meeting, to
> mitigate language barrier issues. I sometimes have trouble following
> fast spoken english myself.
>

We already discussed this further up the thread...we already have IRC, but
what we don't have is an actual meeting. We can try to speak slowly!

Regards,
Simon

Re: [U-Boot] [ANN] Monthly developer call

[Marek Vasut]

On 5/21/20 8:09 PM, Simon Glass wrote:
> Hi Marek,

Hi,

> On Thu, 21 May 2020 at 12:06, Marek Vasut  wrote:
> 
>> On 5/21/20 7:52 PM, Simon Glass wrote:
>>> Hi Marek,
>>
>> Hi,
>>
>>> You don't have to be signed in to view, just to edit. Etherpad is pretty
>>> crappy IMO.
>>
>> Seems to work fine. But maybe there is some other alternative?
>>
>> (we can just log some irc channel?)
>>
>>> I believe the next one will be 3rd week of June.
>>
>> Is there already some more precise date ?
>>
> 
> At present it is the 3rd Monday of every month at 4PM UTC / 11AM US Eastern
> / 8AM US Pacific.

Oh, did I miss some of the previous ones ?

Also, it might actually be better to make this an IRC meeting, to
mitigate language barrier issues. I sometimes have trouble following
fast spoken english myself.

Re: [U-Boot] [ANN] Monthly developer call

[Simon Glass]

Hi Marek,

On Thu, 21 May 2020 at 12:06, Marek Vasut  wrote:

> On 5/21/20 7:52 PM, Simon Glass wrote:
> > Hi Marek,
>
> Hi,
>
> > You don't have to be signed in to view, just to edit. Etherpad is pretty
> > crappy IMO.
>
> Seems to work fine. But maybe there is some other alternative?
>
> (we can just log some irc channel?)
>
> > I believe the next one will be 3rd week of June.
>
> Is there already some more precise date ?
>

At present it is the 3rd Monday of every month at 4PM UTC / 11AM US Eastern
/ 8AM US Pacific.

So 15 June.

Regards,
Simon

Re: [U-Boot] [ANN] Monthly developer call

[Marek Vasut]

On 5/21/20 7:52 PM, Simon Glass wrote:
> Hi Marek,

Hi,

> You don't have to be signed in to view, just to edit. Etherpad is pretty
> crappy IMO.

Seems to work fine. But maybe there is some other alternative?

(we can just log some irc channel?)

> I believe the next one will be 3rd week of June.

Is there already some more precise date ?

Re: [U-Boot] [ANN] Monthly developer call

[Tom Rini]

On Thu, May 21, 2020 at 11:52:24AM -0600, Simon Glass wrote:
> Hi Marek,
> 
> You don't have to be signed in to view, just to edit. Etherpad is pretty
> crappy IMO.
> 
> I believe the next one will be 3rd week of June.

I don't think we managed to ever have more than the first meeting.  So
if people want to start by suggesting a better time, we should start
there.

-- 
Tom


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Description: PGP signature

Re: [U-Boot] [ANN] Monthly developer call

[Simon Glass]

Hi Marek,

You don't have to be signed in to view, just to edit. Etherpad is pretty
crappy IMO.

I believe the next one will be 3rd week of June.

Regards,
Simon


On Thu, 21 May 2020 at 11:44, Marek Vasut  wrote:

> On 5/21/20 5:41 PM, Simon Glass wrote:
> > Hi,
> >
> > On Mon, 18 Feb 2019 at 04:10, Marek Vasut  wrote:
> >>
> >> On 2/18/19 5:00 AM, Tom Rini wrote:
> >>> On Mon, Feb 18, 2019 at 03:48:58AM +0100, Marek Vasut wrote:
>  On 2/13/19 9:36 PM, Tom Rini wrote:
> > On Thu, Feb 14, 2019 at 02:01:02AM +0530, Jagan Teki wrote:
> >> On Mon, Feb 11, 2019 at 10:28 PM Tom Rini 
> wrote:
> >>>
> >>> Hey all,
> >>>
> >>> So as I mentioned back in December[1], I was thinking of doing a
> >>> recurring community conference call.  I've gone ahead and
> scheduled one
> >>> now with Zoom (https://zoom.us/) as they work well enough with
> Linux as
> >>> a host.  For now, the time is 4PM UTC, which is 11AM US Eastern,
> 8AM US
> >>> Pacific.
> >>>
> >>> The meeting URL is: https://zoom.us/j/203089062 (and so the
> meeting
> >>> number is 203089062)
> >>>
> >>> For dial-in: +1 (646) 876-9923 <(646)%20876-9923> and world-wide
> local dial-in numbers are
> >>> found on: https://zoom.us/u/acnOQeSN
> >>
> >> Is this call scheduled? I'm trying zoom but unable to join.
> >
> > I can't believe I forgot that part in the plain text of the message
> and
> > not just the ics part.  The call is the 3rd Monday of every month at
> 4PM
> > UTC / 11AM US Eastern / 8AM US Pacific.
> 
>  That, sadly, excludes me from each and every one of those calls.
> 
>  Will there be any transcript for people who cannot join ?
> >>>
> >>> I don't plan to transcribe them, no.  I plan to treat these like the
> >>> in-person meetings we've had before, so there won't be any final
> >>> decisions made on the call.  But hopefully some topics to bring back to
> >>> the ML with more clarity.
> >>
> >> This doesn't help, I'd certainly like to know what was said in the
> meeting.
> >>
>  I think we should postpone the call, advertise it more first and
> decide
>  on a suitable time _before_ scheduling it again.
> >>>
> >>> I was hoping for more feedback, but we'll see who shows up tomorrow.
> >>> There's no good time for everyone, but as I've stated before if we get
> >>> interest in a more Asia-friendly time, we can do that.
> >>
> >> Maybe CCing some of the active contributors would help with that.
> >> And awareness, I talked to some and they were seldom aware of this call.
> >>
>  btw the zoom dial-in numbers link doesn't work, but I think this one
>  https://zoom.us/zoomconference should work.
> >>>
> >>> The meeting link won't work until closer to the call, yes.
> >
> > I forgot it but I just added it to my calendar for next time.
> >
> > It is easy enough to share a google doc with edit access so anyone can
> > write notes.
>
> Anyone with google account anyway, why not e.g. etherpad ?
> When is the next time ?
>

Re: [U-Boot] [ANN] Monthly developer call

[Marek Vasut]

On 5/21/20 5:41 PM, Simon Glass wrote:
> Hi,
> 
> On Mon, 18 Feb 2019 at 04:10, Marek Vasut  wrote:
>>
>> On 2/18/19 5:00 AM, Tom Rini wrote:
>>> On Mon, Feb 18, 2019 at 03:48:58AM +0100, Marek Vasut wrote:
 On 2/13/19 9:36 PM, Tom Rini wrote:
> On Thu, Feb 14, 2019 at 02:01:02AM +0530, Jagan Teki wrote:
>> On Mon, Feb 11, 2019 at 10:28 PM Tom Rini  wrote:
>>>
>>> Hey all,
>>>
>>> So as I mentioned back in December[1], I was thinking of doing a
>>> recurring community conference call.  I've gone ahead and scheduled one
>>> now with Zoom (https://zoom.us/) as they work well enough with Linux as
>>> a host.  For now, the time is 4PM UTC, which is 11AM US Eastern, 8AM US
>>> Pacific.
>>>
>>> The meeting URL is: https://zoom.us/j/203089062 (and so the meeting
>>> number is 203089062)
>>>
>>> For dial-in: +1 (646) 876-9923 and world-wide local dial-in numbers are
>>> found on: https://zoom.us/u/acnOQeSN
>>
>> Is this call scheduled? I'm trying zoom but unable to join.
>
> I can't believe I forgot that part in the plain text of the message and
> not just the ics part.  The call is the 3rd Monday of every month at 4PM
> UTC / 11AM US Eastern / 8AM US Pacific.

 That, sadly, excludes me from each and every one of those calls.

 Will there be any transcript for people who cannot join ?
>>>
>>> I don't plan to transcribe them, no.  I plan to treat these like the
>>> in-person meetings we've had before, so there won't be any final
>>> decisions made on the call.  But hopefully some topics to bring back to
>>> the ML with more clarity.
>>
>> This doesn't help, I'd certainly like to know what was said in the meeting.
>>
 I think we should postpone the call, advertise it more first and decide
 on a suitable time _before_ scheduling it again.
>>>
>>> I was hoping for more feedback, but we'll see who shows up tomorrow.
>>> There's no good time for everyone, but as I've stated before if we get
>>> interest in a more Asia-friendly time, we can do that.
>>
>> Maybe CCing some of the active contributors would help with that.
>> And awareness, I talked to some and they were seldom aware of this call.
>>
 btw the zoom dial-in numbers link doesn't work, but I think this one
 https://zoom.us/zoomconference should work.
>>>
>>> The meeting link won't work until closer to the call, yes.
> 
> I forgot it but I just added it to my calendar for next time.
> 
> It is easy enough to share a google doc with edit access so anyone can
> write notes.

Anyone with google account anyway, why not e.g. etherpad ?
When is the next time ?

[rockchip] rockpro64: Enable HDMI output

[Marcin Juszkiewicz]

Enable config options and console setting like on other rk3399 boards.

Signed-off-by: Marcin Juszkiewicz 

---
 configs/rockpro64-rk3399_defconfig | 4 
 include/configs/rockpro64_rk3399.h | 5 +
 2 files changed, 9 insertions(+)

diff --git configs/rockpro64-rk3399_defconfig
configs/rockpro64-rk3399_defconfig
index 8074e4665a..c815cc646d 100644
--- configs/rockpro64-rk3399_defconfig
+++ configs/rockpro64-rk3399_defconfig
@@ -58,5 +58,9 @@ CONFIG_USB_ETHER_ASIX88179=y
 CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git include/configs/rockpro64_rk3399.h
include/configs/rockpro64_rk3399.h
index 5f52c1e4f6..8e82131762 100644
--- include/configs/rockpro64_rk3399.h
+++ include/configs/rockpro64_rk3399.h
@@ -6,6 +6,11 @@
 #ifndef __ROCKPRO64_RK3399_H
 #define __ROCKPRO64_RK3399_H

+#define ROCKCHIP_DEVICE_SETTINGS \
+   "stdin=serial,usbkbd\0" \
+   "stdout=serial,vidconsole\0" \
+   "stderr=serial,vidconsole\0"
+
 #include 

 #define CONFIG_SYS_MMC_ENV_DEV 0
-- 
2.26.2

Re: TI boards vs. distro boot

[Lokesh Vutla]

+Tom

Hi Jan,

On 19/05/20 1:05 pm, Jan Kiszka wrote:
> Hi Lokesh,
> 
> seems like all boards including include/environment/ti/mmc.h will only search
> for ${boot_scripts} in the root of the target fs, not in ${boot_prefixes}. 
> Known

It searches in boot partitions of SD cards and this was always the case from a
long time.

> bug? Used to work fine with your downstream U-Boot some years ago. Just 
> updated

Any chance you re collect which U-Boot version?

> an SD card, only replacing the bootloader artifacts, and that card now no 
> longer
> boots.

We are planning to move to distro boot completely. It should clean all the env
variables.

Thanks and regards,
Lokesh

> 
> Jan
> 

[PATCH v13 18/21] riscv: Enable cpu clock if it is present

[Sean Anderson]

The cpu clock is probably already enabled if we are executing code (though
we could be executing from a different core). This patch prevents the cpu
clock or its parents from being disabled.

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---
This patch was previously submitted on its own as
https://patchwork.ozlabs.org/patch/1232420/

Changes in v4:
- New

 drivers/cpu/riscv_cpu.c | 20 
 1 file changed, 20 insertions(+)

diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c
index 2d44d1c17b..76b0489d2a 100644
--- a/drivers/cpu/riscv_cpu.c
+++ b/drivers/cpu/riscv_cpu.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2018, Bin Meng 
+ * Copyright (C) 2020, Sean Anderson 
  */
 
 #include 
@@ -119,6 +120,24 @@ static int riscv_cpu_bind(struct udevice *dev)
return 0;
 }
 
+static int riscv_cpu_probe(struct udevice *dev)
+{
+   int ret = 0;
+   struct clk clk;
+
+   /* Get a clock if it exists */
+   ret = clk_get_by_index(dev, 0, );
+   if (ret)
+   return 0;
+
+   ret = clk_enable();
+   clk_free();
+   if (ret == -ENOSYS || ret == -ENOTSUPP)
+   return 0;
+   else
+   return ret;
+}
+
 static const struct cpu_ops riscv_cpu_ops = {
.get_desc   = riscv_cpu_get_desc,
.get_info   = riscv_cpu_get_info,
@@ -135,6 +154,7 @@ U_BOOT_DRIVER(riscv_cpu) = {
.id = UCLASS_CPU,
.of_match = riscv_cpu_ids,
.bind = riscv_cpu_bind,
+   .probe = riscv_cpu_probe,
.ops = _cpu_ops,
.flags = DM_FLAG_PRE_RELOC,
 };
-- 
2.26.2

[PATCH v13 21/21] riscv: Add Sipeed Maix support

[Sean Anderson]

The Sipeed Maix series is a collection of boards built around the RISC-V
Kendryte K210 processor. This processor contains several peripherals to
accelerate neural network processing and other "ai" tasks. This includes a
"KPU" neural network processor, an audio processor supporting beamforming
reception, and a digital video port supporting capture and output at VGA
resolution. Other peripherals include 8M of sram (accessible with and
without caching); remappable pins, including 40 GPIOs; AES, FFT, and SHA256
accelerators; a DMA controller; and I2C, I2S, and SPI controllers. Maix
peripherals vary, but include spi flash; on-board usb-serial bridges; ports
for cameras, displays, and sd cards; and ESP32 chips. Currently, only the
Sipeed Maix Bit V2.0 (bitm) is supported, but the boards are fairly
similar.

Documentation for Maix boards is located at
.  Documentation for the Kendryte K210 is
located at . However, hardware details are
rather lacking, so most technical reference has been taken from the
standalone sdk located at
.

Signed-off-by: Sean Anderson 
---

Changes in v9:
- Update MAINTAINERS to reflect defconfig name change

Changes in v8:
- Remove unnecessary fdt fixup for sipeed maix

Changes in v7:
- Split docs off into their own patch
- Enable ram clocks by name

Changes in v6:
- Remove trailing whitespace from documentation
- Remove configuration for spi/pinmux/gpio features
- Flesh out documentation some more

Changes in v5:
- Configure relocation location with CONFIG_SYS_SDRAM_*
- Enable ram clocks
- Add pinmux/gpio/led support
- Remove (broken) MMC support
- Store the environment in flash
- Add partitions
- Add bootcmd
- Add docs for pinctrl and booting

Changes in v4:
- Rework documentation to be organized by board mfg not cpu mfg
- Update docs to reflect working SPI support
- Add proper spi support
- Don't define unneecessary macros in config.h
- Lower the default stack so it isn't clobbered on relocation
- Update MAINTAINERS
- Update copyright

Changes in v3:
- Reorder to be last in the patch series
- Add documentation for the board
- Generate defconfig with "make savedefconfig"
- Update Kconfig to imply most features we need
- Update MAINTAINERS

Changes in v2:
- Select CONFIG_SYS_RISCV_NOCOUNTER
- Imply CONFIG_CLK_K210
- Remove spurious references to CONFIG_ARCH_K210
- Remove many configs from defconfig where the defaults were fine
- Add a few "not set" lines to suppress unneeded defaults
- Reduce pre-reloc malloc space, now that clocks initialization happens
  later

 arch/riscv/Kconfig |  4 +++
 board/sipeed/maix/Kconfig  | 47 ++
 board/sipeed/maix/MAINTAINERS  | 11 +++
 board/sipeed/maix/Makefile |  5 
 board/sipeed/maix/maix.c   | 41 ++
 configs/sipeed_maix_bitm_defconfig |  8 +
 include/configs/sipeed-maix.h  | 24 +++
 7 files changed, 140 insertions(+)
 create mode 100644 board/sipeed/maix/Kconfig
 create mode 100644 board/sipeed/maix/MAINTAINERS
 create mode 100644 board/sipeed/maix/Makefile
 create mode 100644 board/sipeed/maix/maix.c
 create mode 100644 configs/sipeed_maix_bitm_defconfig
 create mode 100644 include/configs/sipeed-maix.h

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index a611f890a1..82d58ea370 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -20,6 +20,9 @@ config TARGET_QEMU_VIRT
 config TARGET_SIFIVE_FU540
bool "Support SiFive FU540 Board"
 
+config TARGET_SIPEED_MAIX
+   bool "Support Sipeed Maix Board"
+
 endchoice
 
 config SYS_ICACHE_OFF
@@ -53,6 +56,7 @@ source "board/AndesTech/ax25-ae350/Kconfig"
 source "board/emulation/qemu-riscv/Kconfig"
 source "board/microchip/mpfs_icicle/Kconfig"
 source "board/sifive/fu540/Kconfig"
+source "board/sipeed/maix/Kconfig"
 
 # platform-specific options below
 source "arch/riscv/cpu/ax25/Kconfig"
diff --git a/board/sipeed/maix/Kconfig b/board/sipeed/maix/Kconfig
new file mode 100644
index 00..0cdcd32adc
--- /dev/null
+++ b/board/sipeed/maix/Kconfig
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2019-20 Sean Anderson 
+
+if TARGET_SIPEED_MAIX
+
+config SYS_BOARD
+   default "maix"
+
+config SYS_VENDOR
+   default "sipeed"
+
+config SYS_CPU
+   default "generic"
+
+config SYS_CONFIG_NAME
+   default "sipeed-maix"
+
+config SYS_TEXT_BASE
+   default 0x8000
+
+config DEFAULT_DEVICE_TREE
+   default "k210-maix-bit"
+
+config NR_CPUS
+   default 2
+
+config NR_DRAM_BANKS
+   default 3
+
+config BOARD_SPECIFIC_OPTIONS
+   def_bool y
+   select GENERIC_RISCV
+   select RISCV_PRIV_1_9
+   imply SMP
+   imply DM_SERIAL
+   imply SIFIVE_SERIAL
+   imply SIFIVE_CLINT
+   imply POWER_DOMAIN
+   imply SIMPLE_PM_BUS
+   imply CLK_CCF
+   imply CLK_COMPOSITE_CCF

[PATCH v13 19/21] riscv: Add device tree for K210 and Sipeed Maix BitM

[Sean Anderson]

Where possible, I have tried to find compatible drivers based on the layout
of registers. However, many devices remain untested. All untested devices
have been left disabled, but some tentative properties (such as compatible
strings, and clocks, interrupts, and resets properties) have been added.

Signed-off-by: Sean Anderson 
---

Changes in v7:
- Move clocks node to be just before soc node, matching linux's tree
- Merge memory nodes into one node with different registers
- Add aliases for uclasses which use them
- Fix size of clint

Changes in v6:
- Remove spi, gpio, pinmux, wdt, and led bindings
- Use consistent capitalization for hex digits

Changes in v5:
- Add more compatible strings
- Add cache line size
- Document CPUs as rocket cores
- Flesh out the gpio devices
- Add ports for audio and video devices
- Add fpioa pinctrl support
- Configure pins for MMC on SPI1
- Enable MMC
- Fix a couple uart properties (Thanks laanwj)
- Reorder ram now that relocation is handled with CONFIG_SYS defines
- Enable WDT
- Add pinctrl properties
- Add gpio support
- Add led support
- Add assorted AV bindings
- Add compatible strings for ram
- Use GPIO-based CS for MMC
- Limit SPI flash to 50 MHz

Changes in v4:
- Set regs sizes to full address range
- Remove clock-frequency property from cpus
- Add spi-max-frequency to spi devices from documentation
- Add more compatible strings for each device
- Add AI ram as a separate memory bank. Its clock is disabled on boot, and
  it cannot be accessed
- Reorder memory banks so u-boot relocates higher, leaving more room to
  load boot images
- Add designware ssi CTRL0 field shifts to spi devices
- Don't enable the MMC slot
- Update copyright
- Lint

Changes in v3:
- Move this patch to the end of the series
- Add a max frequency for spi3
- Remov unused compatible strings from spi-flash@0
- Add s and u to isa string
- Fix mmu-type
- Remove cache-line size since it is unused (in u-boot) and undocumented
  (upstream)
- Add timer interrupts to clint0
- Round up various registers
- Add riscv,max-priority to plic
- Add apb* busses, since they have clocks which need to be enabled to
  access their devices
- Change uart compatible strings to "snps,dw-apb-uart", since that appears
  to match their registers
- Add compatible string for wdt*
- Add system reset device under sysctl
- Add reset device under sysctl

Changes in v2:
- Model changed to "Sipeed Maix Bit" to match file name
- Value of stdout-path fixed
- SD card slot compatible changed to "mmc-spi-slot"
- "jedec,spi-nor" added to spi flash compatible list
- Aliases for spi busses added
- timebase-frequency divided by 50 to match timer speed
- cpu-frequency renamed to clock-frequency
- CPUX_intc restyled to cpuX_intc
- "kendryte,k210-soc" added to soc compatible list for future-proofing
- PLIC handle renamed to plic0 from pic0
- K210_RST_SOC removed from sysrst, due to not being located in the reset
  register
- K210_RST_* numbers changed to match their bit offset within the reset
  register
- gpio_controller restyled to gpio-controller
- Added a second clock to the dma binding to match what the driver expects
- Changed "snps,designware-spi" compatible string to "snps,dw-apb-ssi" to
  match the correct driver
- Added a name to the spi clocks
- Added reg-io-width property to spi bindings
- Assigned a default parent to K210_CLK_SPI3
- Removed assigned clocks for ACLK and PLLs
- Removed u-boot,dm-pre-reloc bindings

 arch/riscv/dts/Makefile |   1 +
 arch/riscv/dts/k210-maix-bit.dts|  47 ++
 arch/riscv/dts/k210.dtsi| 594 
 include/dt-bindings/reset/k210-sysctl.h |  38 ++
 4 files changed, 680 insertions(+)
 create mode 100644 arch/riscv/dts/k210-maix-bit.dts
 create mode 100644 arch/riscv/dts/k210.dtsi
 create mode 100644 include/dt-bindings/reset/k210-sysctl.h

diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index 4f30e6936f..3a6f96c67d 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -2,6 +2,7 @@
 
 dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
+dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
 
 targets += $(dtb-y)
 
diff --git a/arch/riscv/dts/k210-maix-bit.dts b/arch/riscv/dts/k210-maix-bit.dts
new file mode 100644
index 00..5b32c5fd5f
--- /dev/null
+++ b/arch/riscv/dts/k210-maix-bit.dts
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019-20 Sean Anderson 
+ */
+
+/dts-v1/;
+
+#include "k210.dtsi"
+
+#include 
+
+/ {
+   model = "Sipeed Maix Bit 2.0";
+   compatible = "sipeed,maix-bitm", "sipeed,maix-bit", "kendryte,k210";
+
+   chosen {
+   stdout-path = "serial0:115200";
+   };
+
+   sound {
+   compatible = "simple-audio-card";
+   simple-audio-card,format = "i2s";
+   status = "disabled";
+
+   simple-audio-card,cpu {
+  

[PATCH v13 20/21] doc: riscv: Add documentation for Sipeed Maix Bit

[Sean Anderson]

This patch adds documentation for the Sipeed Maix bit, and more generally
for the Kendryte K210 processor.

Signed-off-by: Sean Anderson 
---

Changes in v9:
- Mark dts code block as "none" explicitly
Changes in v7:
- Split off into its own patch
- Fix size of clint

 doc/board/index.rst|   1 +
 doc/board/sipeed/index.rst |   9 ++
 doc/board/sipeed/maix.rst  | 298 +
 3 files changed, 308 insertions(+)
 create mode 100644 doc/board/sipeed/index.rst
 create mode 100644 doc/board/sipeed/maix.rst

diff --git a/doc/board/index.rst b/doc/board/index.rst
index 01b233f737..126dcc2438 100644
--- a/doc/board/index.rst
+++ b/doc/board/index.rst
@@ -17,6 +17,7 @@ Board-specific doc
renesas/index
rockchip/index
sifive/index
+   sipeed/index
st/index
toradex/index
xilinx/index
diff --git a/doc/board/sipeed/index.rst b/doc/board/sipeed/index.rst
new file mode 100644
index 00..3518e2d8f4
--- /dev/null
+++ b/doc/board/sipeed/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Sipeed
+==
+
+.. toctree::
+   :maxdepth: 2
+
+   maix
diff --git a/doc/board/sipeed/maix.rst b/doc/board/sipeed/maix.rst
new file mode 100644
index 00..06e0008b9f
--- /dev/null
+++ b/doc/board/sipeed/maix.rst
@@ -0,0 +1,298 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2020 Sean Anderson 
+
+Maix Bit
+
+
+Several of the Sipeed Maix series of boards cotain the Kendryte K210 processor,
+a 64-bit RISC-V CPU. This processor contains several peripherals to accelerate
+neural network processing and other "ai" tasks. This includes a "KPU" neural
+network processor, an audio processor supporting beamforming reception, and a
+digital video port supporting capture and output at VGA resolution. Other
+peripherals include 8M of SRAM (accessible with and without caching); 
remappable
+pins, including 40 GPIOs; AES, FFT, and SHA256 accelerators; a DMA controller;
+and I2C, I2S, and SPI controllers. Maix peripherals vary, but include spi 
flash;
+on-board usb-serial bridges; ports for cameras, displays, and sd cards; and
+ESP32 chips. Currently, only the Sipeed Maix Bit V2.0 (bitm) is supported, but
+the boards are fairly similar.
+
+Documentation for Maix boards is available from
+`Sipeed's website `_.
+Documentation for the Kendryte K210 is available from
+`Kendryte's website `_. However, hardware
+details are rather lacking, so most technical reference has been taken from the
+`standalone sdk `_.
+
+Build and boot steps
+
+
+To build u-boot, run
+
+.. code-block:: none
+
+make sipeed_maix_bitm_defconfig
+make CROSS_COMPILE=
+
+To flash u-boot to a maix bit, run
+
+.. code-block:: none
+
+kflash -tp /dev/ -B bit_mic u-boot-dtb.bin
+
+Boot output should look like the following:
+
+.. code-block:: none
+
+U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500)
+
+DRAM:  8 MiB
+In:serial@3800
+Out:   serial@3800
+Err:   serial@3800
+=>
+
+Loading Images
+^^
+
+To load a kernel, transfer it over serial.
+
+.. code-block:: none
+
+=> loady 8000 150
+## Switch baudrate to 150 bps and press ENTER ...
+
+*** baud: 150
+
+*** baud: 150 ***
+## Ready for binary (ymodem) download to 0x8000 at 150 bps...
+C
+*** file: loader.bin
+$ sz -vv loader.bin
+Sending: loader.bin
+Bytes Sent:2478208   BPS:72937
+Sending:
+Ymodem sectors/kbytes sent:   0/ 0k
+Transfer complete
+
+*** exit status: 0 ***
+## Total Size  = 0x0025d052 = 2478162 Bytes
+## Switch baudrate to 115200 bps and press ESC ...
+
+*** baud: 115200
+
+*** baud: 115200 ***
+=>
+
+Running Programs
+
+
+Binaries
+
+
+To run a bare binary, use the ``go`` command:
+
+.. code-block:: none
+
+=> loady
+## Ready for binary (ymodem) download to 0x8000 at 115200 bps...
+C
+*** file: ./examples/standalone/hello_world.bin
+$ sz -vv ./examples/standalone/hello_world.bin
+Sending: hello_world.bin
+Bytes Sent:   4864   BPS:649
+Sending:
+Ymodem sectors/kbytes sent:   0/ 0k
+Transfer complete
+
+*** exit status: 0 ***
+(CAN) packets, 5 retries
+## Total Size  = 0x12f8 = 4856 Bytes
+=> go 8000
+## Starting application at 0x8000 ...
+Example expects ABI version 9
+Actual U-Boot ABI version 9
+Hello World
+argc = 1
+argv[0] = "8000"
+argv[1] = ""
+Hit any key to exit ...
+
+Legacy Images
+"
+
+To run legacy images, use the ``bootm`` command:
+
+.. code-block:: none
+
+$ tools/mkimage -A riscv -O u-boot -T standalone -C none -a 8000 -e 
8000 -d examples/standalone/hello_world.bin hello_world.img
+Image Name:
+Created:  Thu 

[PATCH v13 15/21] riscv: Add option to support RISC-V privileged spec 1.9

[Sean Anderson]

Some older processors (notably the Kendryte K210) use an older version of
the RISC-V privileged specification. The primary changes between the old
and new are in virtual memory, and in the merging of three separate counter
enable CSRs.  Using the new CSR on an old processor causes an illegal
instruction exception.  This patch adds an option to use the old CSRs
instead of the new one.

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---

Changes in v6:
- Reformat so chechpatch errors less

Changes in v5:
- Rename to 1.9 to reflect the spec as implemented by the k210

Changes in v4:
- Fixed CSRs not being defined properly (thanks bmeng)
- Added ifdefs for all changed CSRs (e.g. for VM)
- Also properly disable VM on boot

Changes in v3:
- Renamed from "riscv: Add option to disable writes to mcounteren"
- Added original functionality back for older priv specs.

Changes in v2:
- Moved forward in the patch series

 arch/riscv/Kconfig   | 10 +
 arch/riscv/cpu/cpu.c |  9 
 arch/riscv/include/asm/csr.h | 40 
 3 files changed, 59 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index fb5fe5afff..a611f890a1 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -268,6 +268,16 @@ config XIP
 config SHOW_REGS
bool "Show registers on unhandled exception"
 
+config RISCV_PRIV_1_9
+   bool "Use version 1.9 of the RISC-V priviledged specification"
+   help
+ Older versions of the RISC-V priviledged specification had
+ separate counter enable CSRs for each privilege mode. Writing
+ to the unified mcounteren CSR on a processor implementing the
+ old specification will result in an illegal instruction
+ exception. In addition to counter CSR changes, the way virtual
+ memory is configured was also changed.
+
 config STACK_SIZE_SHIFT
int
default 14
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index d75a3f045a..bbd6c15352 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -91,11 +91,20 @@ int arch_cpu_init_dm(void)
 * Enable perf counters for cycle, time,
 * and instret counters only
 */
+#ifdef CONFIG_RISCV_PRIV_1_9
+   csr_write(CSR_MSCOUNTEREN, GENMASK(2, 0));
+   csr_write(CSR_MUCOUNTEREN, GENMASK(2, 0));
+#else
csr_write(CSR_MCOUNTEREN, GENMASK(2, 0));
+#endif
 
/* Disable paging */
if (supports_extension('s'))
+#ifdef CONFIG_RISCV_PRIV_1_9
+   csr_read_clear(CSR_MSTATUS, SR_VM);
+#else
csr_write(CSR_SATP, 0);
+#endif
}
 
 #ifdef CONFIG_SMP
diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index d1520743a2..1a15089cae 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -15,7 +15,11 @@
 #define SR_SIE _AC(0x0002, UL) /* Supervisor Interrupt Enable */
 #define SR_SPIE_AC(0x0020, UL) /* Previous Supervisor IE */
 #define SR_SPP _AC(0x0100, UL) /* Previously Supervisor */
+#ifdef CONFIG_RISCV_PRIV_1_9
+#define SR_PUM _AC(0x0004, UL) /* Protect User Memory Access */
+#else
 #define SR_SUM _AC(0x0004, UL) /* Supervisor User Memory Access */
+#endif
 
 #define SR_FS  _AC(0x6000, UL) /* Floating-point Status */
 #define SR_FS_OFF  _AC(0x, UL)
@@ -29,6 +33,22 @@
 #define SR_XS_CLEAN_AC(0x0001, UL)
 #define SR_XS_DIRTY_AC(0x00018000, UL)
 
+#ifdef CONFIG_RISCV_PRIV_1_9
+#define SR_VM  _AC(0x1F00, UL) /* Virtualization Management */
+#define SR_VM_MODE_BARE_AC(0x, UL) /* No translation or 
protection */
+#define SR_VM_MODE_BB  _AC(0x0100, UL) /* Single base-and-bound */
+/* Separate instruction and data base-and-bound */
+#define SR_VM_MODE_BBID_AC(0x0200, UL)
+#ifndef CONFIG_64BIT
+#define SR_VM_MODE_32  _AC(0x0800, UL)
+#define SR_VM_MODE SR_VM_MODE_32
+#else
+#define SR_VM_MODE_39  _AC(0x0900, UL)
+#define SR_VM_MODE_48  _AC(0x0A00, UL)
+#define SR_VM_MODE SR_VM_MODE_39
+#endif
+#endif
+
 #ifndef CONFIG_64BIT
 #define SR_SD  _AC(0x8000, UL) /* FS/XS dirty */
 #else
@@ -36,6 +56,7 @@
 #endif
 
 /* SATP flags */
+#ifndef CONFIG_RISCV_PRIV_1_9
 #ifndef CONFIG_64BIT
 #define SATP_PPN   _AC(0x003F, UL)
 #define SATP_MODE_32   _AC(0x8000, UL)
@@ -45,6 +66,7 @@
 #define SATP_MODE_39   _AC(0x8000, UL)
 #define SATP_MODE  SATP_MODE_39
 #endif
+#endif
 
 /* SCAUSE */
 #define SCAUSE_IRQ_FLAG(_AC(1, UL) << (__riscv_xlen - 1))
@@ -88,17 +110,35 @@
 #define CSR_SCAUSE 0x142
 #define CSR_STVAL  0x143
 #define CSR_SIP0x144
+#ifdef CONFIG_RISCV_PRIV_1_9
+#define CSR_SPTBR  0x180
+#else
 #define CSR_SATP   0x180
+#endif
 #define CSR_MSTATUS 

[PATCH v13 14/21] riscv: Clean up IPI initialization code

[Sean Anderson]

The previous IPI code initialized the device whenever the first call was
made to a riscv_*_ipi function. This made it difficult to determine when
the IPI device was initialized. This patch introduces a new function
riscv_init_ipi. It is called once during arch_cpu_init_dm. In SPL, it is
called in spl_invoke_opensbi. Before this point, no riscv_*_ipi functions
should be called.

Signed-off-by: Sean Anderson 
Reviewed-by: Rick Chen 
---

Changes in v12:
- Remove sanity check as requested

Changes in v11:
- Initialize IPI when used by SPL
Changes in v9:
- Fix type of ret variable in riscv_ipi_init
Changes in v7:
- Split IPI clearing off into its own patch

Changes in v6:
- Fix some formatting
- Clear IPIs before enabling interrupts instead of using a ipi_ready flag
- Only print messages on error in smp code

Changes in v5:
- New

 arch/riscv/cpu/cpu.c  |  6 +
 arch/riscv/include/asm/smp.h  | 43 ++
 arch/riscv/lib/andes_plic.c   | 34 +---
 arch/riscv/lib/sbi_ipi.c  |  5 
 arch/riscv/lib/sifive_clint.c | 33 ---
 arch/riscv/lib/smp.c  | 49 +--
 common/spl/spl_opensbi.c  |  5 
 7 files changed, 89 insertions(+), 86 deletions(-)

diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index 5804aa8e73..d75a3f045a 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -98,6 +98,12 @@ int arch_cpu_init_dm(void)
csr_write(CSR_SATP, 0);
}
 
+#ifdef CONFIG_SMP
+   ret = riscv_init_ipi();
+   if (ret)
+   return ret;
+#endif
+
return 0;
 }
 
diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
index 74de92ed13..1b428856b2 100644
--- a/arch/riscv/include/asm/smp.h
+++ b/arch/riscv/include/asm/smp.h
@@ -51,4 +51,47 @@ void handle_ipi(ulong hart);
  */
 int smp_call_function(ulong addr, ulong arg0, ulong arg1, int wait);
 
+/**
+ * riscv_init_ipi() - Initialize inter-process interrupt (IPI) driver
+ *
+ * Platform code must provide this function. This function is called once after
+ * the cpu driver is initialized. No other riscv_*_ipi() calls will be made
+ * before this function is called.
+ *
+ * @return 0 if OK, -ve on error
+ */
+int riscv_init_ipi(void);
+
+/**
+ * riscv_send_ipi() - Send inter-processor interrupt (IPI)
+ *
+ * Platform code must provide this function.
+ *
+ * @hart: Hart ID of receiving hart
+ * @return 0 if OK, -ve on error
+ */
+int riscv_send_ipi(int hart);
+
+/**
+ * riscv_clear_ipi() - Clear inter-processor interrupt (IPI)
+ *
+ * Platform code must provide this function.
+ *
+ * @hart: Hart ID of hart to be cleared
+ * @return 0 if OK, -ve on error
+ */
+int riscv_clear_ipi(int hart);
+
+/**
+ * riscv_get_ipi() - Get status of inter-processor interrupt (IPI)
+ *
+ * Platform code must provide this function.
+ *
+ * @hart: Hart ID of hart to be checked
+ * @pending: Pointer to variable with result of the check,
+ *   1 if IPI is pending, 0 otherwise
+ * @return 0 if OK, -ve on error
+ */
+int riscv_get_ipi(int hart, int *pending);
+
 #endif
diff --git a/arch/riscv/lib/andes_plic.c b/arch/riscv/lib/andes_plic.c
index 20529ab3eb..5cf29df670 100644
--- a/arch/riscv/lib/andes_plic.c
+++ b/arch/riscv/lib/andes_plic.c
@@ -30,20 +30,6 @@
 #define SEND_IPI_TO_HART(hart)  (0x80 >> (hart))
 
 DECLARE_GLOBAL_DATA_PTR;
-static int init_plic(void);
-
-#define PLIC_BASE_GET(void)\
-   do {\
-   long *ret;  \
-   \
-   if (!gd->arch.plic) {   \
-   ret = syscon_get_first_range(RISCV_SYSCON_PLIC); \
-   if (IS_ERR(ret))\
-   return PTR_ERR(ret);\
-   gd->arch.plic = ret;\
-   init_plic();\
-   }   \
-   } while (0)
 
 static int enable_ipi(int hart)
 {
@@ -93,13 +79,21 @@ static int init_plic(void)
return -ENODEV;
 }
 
+int riscv_init_ipi(void)
+{
+   long *ret = syscon_get_first_range(RISCV_SYSCON_PLIC);
+
+   if (IS_ERR(ret))
+   return PTR_ERR(ret);
+   gd->arch.plic = ret;
+
+   return init_plic();
+}
+
 int riscv_send_ipi(int hart)
 {
-   unsigned int ipi;
+   unsigned int ipi = (SEND_IPI_TO_HART(hart) << (8 * gd->arch.boot_hart));
 
-   PLIC_BASE_GET();
-
-   ipi = (SEND_IPI_TO_HART(hart) << (8 * gd->arch.boot_hart));
writel(ipi, (void __iomem *)PENDING_REG(gd->arch.plic,
gd->arch.boot_hart));
 
@@ -110,8 +104,6 @@ int 

[PATCH v13 12/21] riscv: Add headers for asm/global_data.h

[Sean Anderson]

This header depended on bd_t and ulong, but did not include the appropriate
headers.

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---

Changes in v4:
- Include compiler.h not linux/compiler.h

 arch/riscv/include/asm/global_data.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/include/asm/global_data.h 
b/arch/riscv/include/asm/global_data.h
index 6c50149218..2eb14815bc 100644
--- a/arch/riscv/include/asm/global_data.h
+++ b/arch/riscv/include/asm/global_data.h
@@ -11,6 +11,8 @@
 #define __ASM_GBL_DATA_H
 
 #include 
+#include 
+#include 
 
 /* Architecture-specific global data */
 struct arch_global_data {
-- 
2.26.2

[PATCH v13 17/21] riscv: Try to get cpu frequency from a "clocks" node if it exists

[Sean Anderson]

Instead of always using the "clock-frequency" property to determine cpu
frequency, try using a clock in "clocks" if it exists. This patch also
fixes a bug where there could be spurious higher frequencies if sizeof(u32)
!= sizeof(ulong).

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---
This patch was previously sumbitted on its own as
https://patchwork.ozlabs.org/patch/1232420/

This patch is the combination of the patches
https://patchwork.ozlabs.org/patch/1223933/
https://patchwork.ozlabs.org/patch/1224957/
"riscv: Fix incorrect cpu frequency on RV64"
"riscv: Try to get cpu frequency from device tree"

Changes in v5:
- Include linux/err.h explicitly
- Reword commit message

Changes in v4:
- New

 drivers/cpu/riscv_cpu.c | 19 ++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c
index cb04f5638d..2d44d1c17b 100644
--- a/drivers/cpu/riscv_cpu.c
+++ b/drivers/cpu/riscv_cpu.c
@@ -3,6 +3,7 @@
  * Copyright (C) 2018, Bin Meng 
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -11,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -29,9 +31,24 @@ static int riscv_cpu_get_desc(struct udevice *dev, char 
*buf, int size)
 
 static int riscv_cpu_get_info(struct udevice *dev, struct cpu_info *info)
 {
+   int ret;
+   struct clk clk;
const char *mmu;
 
-   dev_read_u32(dev, "clock-frequency", (u32 *)>cpu_freq);
+   /* Zero out the frequency, in case sizeof(ulong) != sizeof(u32) */
+   info->cpu_freq = 0;
+
+   /* First try getting the frequency from the assigned clock */
+   ret = clk_get_by_index(dev, 0, );
+   if (!ret) {
+   ret = clk_get_rate();
+   if (!IS_ERR_VALUE(ret))
+   info->cpu_freq = ret;
+   clk_free();
+   }
+
+   if (!info->cpu_freq)
+   dev_read_u32(dev, "clock-frequency", (u32 *)>cpu_freq);
 
mmu = dev_read_string(dev, "mmu-type");
if (!mmu)
-- 
2.26.2

[PATCH v13 13/21] riscv: Clear pending interrupts before enabling IPIs

[Sean Anderson]

On some platforms (k210), the previous stage bootloader may have not
cleared pending IPIs before transferring control to U-Boot. This can cause
race conditions, as multiple harts all attempt to initialize the IPI
controller at once. This patch clears IPIs before enabling them, ensuring
that only one hart modifies shared memory at once.

Signed-off-by: Sean Anderson 
Reviewed-by: Rick Chen 
---

Changes in v7:
- Split of into its own patch

 arch/riscv/cpu/start.S | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 5f1c220e0c..f408e41ab9 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -65,6 +65,8 @@ _start:
 #else
li  t0, SIE_SSIE
 #endif
+   /* Clear any pending IPIs */
+   csrcMODE_PREFIX(ip), t0
csrsMODE_PREFIX(ie), t0
 #endif
 
-- 
2.26.2